Christopher H / Mbed 2 deprecated Laster_Radar_test

lightradar

Dependencies:   TextLCD mbed

Fork of Laster_Radar_test by Christopher H

main.cpp@0:36109edfc712, 2015-06-22 (annotated)

Committer:
chrish
Date:
Mon Jun 22 08:52:27 2015 +0000
Revision:
0:36109edfc712
Child:
1:ee1640b8be78
Test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
chrish 0:36109edfc712 1 #include "mbed.h"
chrish 0:36109edfc712 2 #include "TextLCD.h"
chrish 0:36109edfc712 3 #include "cdef.h"
chrish 0:36109edfc712 4 #include "I2C.h"
chrish 0:36109edfc712 5 DigitalOut myled(LED1);
chrish 0:36109edfc712 6 TextLCD display(PA_9, PC_7, PB_5, PB_4, PB_10, PA_8, TextLCD::LCD16x2);
chrish 0:36109edfc712 7
chrish 0:36109edfc712 8 /******************************************************
chrish 0:36109edfc712 9 * void vInitSystemClock(void)
chrish 0:36109edfc712 10 * Purpose:
chrish 0:36109edfc712 11 * Initialisiert Clocksystem HSI,HSE,PLL, Setzt HSE als
chrish 0:36109edfc712 12 * Taktquelle und PLL für SystemClock = 84 Mhz.
chrish 0:36109edfc712 13 * Aktiviert Clock Secuity System für fall das HSE versagt
chrish 0:36109edfc712 14 * Parameter:
chrish 0:36109edfc712 15 * -Keine Parameter-
chrish 0:36109edfc712 16 * Return value:
chrish 0:36109edfc712 17 * -Keine Return Values
chrish 0:36109edfc712 18 * Interrupt:
chrish 0:36109edfc712 19 * Im HSE Ausfall wird RCC Interrupt aufgerufen
chrish 0:36109edfc712 20 *******************************************************/
chrish 0:36109edfc712 21 void vInitSystemClock(void)
chrish 0:36109edfc712 22 {
chrish 0:36109edfc712 23
chrish 0:36109edfc712 24 /***Flash wait states 2 */
chrish 0:36109edfc712 25 FLASH->ACR |= Bit1 ;
chrish 0:36109edfc712 26 /** Enable the High Speed Internal Clock and wait for HSI to be stable.*/
chrish 0:36109edfc712 27 RCC->CR |= RCC_CR_HSION;
chrish 0:36109edfc712 28 while (!(RCC->CR & RCC_CR_HSIRDY));
chrish 0:36109edfc712 29 RCC->CFGR = 0x00000000; // HSI enabled and used as System Clock. No Clock Division.
chrish 0:36109edfc712 30 while( (RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI ); // WAITING HSI IS SYSTEM CLOCK
chrish 0:36109edfc712 31 /**ENABLE HSE CLOCK and wait for HSE to be stable */
chrish 0:36109edfc712 32 RCC->CR |= RCC_CR_HSEON ;
chrish 0:36109edfc712 33 while( (RCC->CR & RCC_CR_HSERDY) == 0);
chrish 0:36109edfc712 34 RCC->CR &= ~(RCC_CR_PLLI2SON
chrish 0:36109edfc712 35 | RCC_CR_CSSON
chrish 0:36109edfc712 36 | RCC_CR_PLLON)
chrish 0:36109edfc712 37 ; // Turn off PLL and CSS (clock security system).
chrish 0:36109edfc712 38 while(RCC->CR & RCC_CR_PLLRDY); // WAITING PLL OF
chrish 0:36109edfc712 39 /** Disable all clock generated interrupts. */
chrish 0:36109edfc712 40 RCC->CIR = 0x00000000;
chrish 0:36109edfc712 41 RCC->PLLCFGR = 0x20000000; // SETZE PLL COMFIG REGISTERINHALT KOMPLETT AUF 0
chrish 0:36109edfc712 42 /** SETTINGS FOR PLL OVER HSE 8Mhz **/
chrish 0:36109edfc712 43 RCC->PLLCFGR |= (8 << 0) // 16 / 8 = 2MHz
chrish 0:36109edfc712 44 |(168 << 6) // 2 * 168 = 336MHz
chrish 0:36109edfc712 45 |(1 << 16) // 336MHz / 4 = 84MHz (0x01 corresponds to /4)
chrish 0:36109edfc712 46 |(RCC_PLLCFGR_PLLSRC_HSI) // HSI selected.
chrish 0:36109edfc712 47 |(7 << 24); // 336Mhz / 7 = 48MHz
chrish 0:36109edfc712 48 RCC->CFGR |= RCC_CFGR_PPRE1_DIV2; // Low speed peripheral clock setup set to 42Mhz. (84Mhz / 2)
chrish 0:36109edfc712 49 RCC->CR |= (RCC_CR_PLLON); // Start the PLL clock.
chrish 0:36109edfc712 50 while (!(RCC->CR & RCC_CR_PLLRDY)); // Wait for the PLL to start.
chrish 0:36109edfc712 51 RCC->CFGR &= ~(RCC_CFGR_SW); // SET PLL AS SYSTEM CLOCK
chrish 0:36109edfc712 52 RCC->CFGR |= RCC_CFGR_SW_PLL;
chrish 0:36109edfc712 53 while ((RCC->CFGR & RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL); // Wait for configuration to take place.
chrish 0:36109edfc712 54 /** ENABLE CLOCK SECUITY SYSTEM */
chrish 0:36109edfc712 55 RCC->CR |= Bit19 ;
chrish 0:36109edfc712 56 NVIC_EnableIRQ(RCC_IRQn);
chrish 0:36109edfc712 57
chrish 0:36109edfc712 58 }
chrish 0:36109edfc712 59
chrish 0:36109edfc712 60
chrish 0:36109edfc712 61
chrish 0:36109edfc712 62
chrish 0:36109edfc712 63
chrish 0:36109edfc712 64
chrish 0:36109edfc712 65
chrish 0:36109edfc712 66
chrish 0:36109edfc712 67 int main() {
chrish 0:36109edfc712 68 byte arr[2];
chrish 0:36109edfc712 69 display.cls();
chrish 0:36109edfc712 70 vInitSystemClock();
chrish 0:36109edfc712 71 display.printf("Hallo\n");
chrish 0:36109edfc712 72 PRESSURE_vInit();
chrish 0:36109edfc712 73 while(1) {
chrish 0:36109edfc712 74 myled = 1; // LED is ON
chrish 0:36109edfc712 75 wait(0.1); // 200 ms
chrish 0:36109edfc712 76 I2C_write(0xC4, 0x00, 0x04);
chrish 0:36109edfc712 77 myled = 0; // LED is OFF
chrish 0:36109edfc712 78 wait(0.3); // 1 sec
chrish 0:36109edfc712 79 I2C_read(0xC4,0xC5, 0x8f, 2, arr);
chrish 0:36109edfc712 80 display.cls();
chrish 0:36109edfc712 81 display.printf("Distanz:%d cm\n", ((arr[0]<<8) | arr[1]) );
chrish 0:36109edfc712 82
chrish 0:36109edfc712 83 }
chrish 0:36109edfc712 84 }