OSCtoCV Library
OSCtoCV.h@0:cd43a974c54c, 2016-01-17 (annotated)
- Committer:
- casiotone401
- Date:
- Sun Jan 17 09:30:32 2016 +0000
- Revision:
- 0:cd43a974c54c
- Child:
- 1:981b62bb5c87
added random, lfo mode
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
casiotone401 | 0:cd43a974c54c | 1 | /* |
casiotone401 | 0:cd43a974c54c | 2 | OSCtoCV Converter Configulation |
casiotone401 | 0:cd43a974c54c | 3 | */ |
casiotone401 | 0:cd43a974c54c | 4 | |
casiotone401 | 0:cd43a974c54c | 5 | #pragma O3 |
casiotone401 | 0:cd43a974c54c | 6 | #pragma Otime |
casiotone401 | 0:cd43a974c54c | 7 | |
casiotone401 | 0:cd43a974c54c | 8 | #ifndef OSCtoCV_H |
casiotone401 | 0:cd43a974c54c | 9 | #define OSCtoCV_H |
casiotone401 | 0:cd43a974c54c | 10 | |
casiotone401 | 0:cd43a974c54c | 11 | #include "mbed.h" |
casiotone401 | 0:cd43a974c54c | 12 | #include "FastIO.h" // https://developer.mbed.org/users/Sissors/code/FastIO/ |
casiotone401 | 0:cd43a974c54c | 13 | //#include "FastAnalogIn.h" |
casiotone401 | 0:cd43a974c54c | 14 | #include "DebouncedInterrupt.h" // https://developer.mbed.org/users/kandangath/code/DebouncedInterrupt/ |
casiotone401 | 0:cd43a974c54c | 15 | #include "BurstSPI.h" // https://developer.mbed.org/users/Sissors/code/BurstSPI/ |
casiotone401 | 0:cd43a974c54c | 16 | #include "TextLCD.h" //edit "writeCommand" "writeData" protected -> public |
casiotone401 | 0:cd43a974c54c | 17 | #include "EthernetNetIf.h" |
casiotone401 | 0:cd43a974c54c | 18 | #include "UDPSocket.h" |
casiotone401 | 0:cd43a974c54c | 19 | #include "OSCReceiver.h" |
casiotone401 | 0:cd43a974c54c | 20 | #include "mbedOSC.h" |
casiotone401 | 0:cd43a974c54c | 21 | #include "MIDI.h" // https://developer.mbed.org/users/okini3939/code/MIDI/ |
casiotone401 | 0:cd43a974c54c | 22 | |
casiotone401 | 0:cd43a974c54c | 23 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 24 | // DAC8568 Control Bits (See datasheet) |
casiotone401 | 0:cd43a974c54c | 25 | |
casiotone401 | 0:cd43a974c54c | 26 | #define WRITE 0x00 |
casiotone401 | 0:cd43a974c54c | 27 | #define UPDATE 0x01 |
casiotone401 | 0:cd43a974c54c | 28 | #define WRITE_UPDATE_ALL 0x02 // LDAC Write to Selected Update All |
casiotone401 | 0:cd43a974c54c | 29 | #define WRITE_UPDATE_N 0x03 // LDAC Write to Selected Update Respective |
casiotone401 | 0:cd43a974c54c | 30 | #define POWER 0x04 |
casiotone401 | 0:cd43a974c54c | 31 | #define CLR 0x05 // Clear Code Register |
casiotone401 | 0:cd43a974c54c | 32 | #define WRITE_LDAC_REG 0x06 |
casiotone401 | 0:cd43a974c54c | 33 | #define RESET 0x07 // Software Reset DAC8568 |
casiotone401 | 0:cd43a974c54c | 34 | #define SETUP_INTERNAL_REF 0x08 |
casiotone401 | 0:cd43a974c54c | 35 | |
casiotone401 | 0:cd43a974c54c | 36 | #define SPI_RATE 20000000 // 20Mbps SPI Clock |
casiotone401 | 0:cd43a974c54c | 37 | #define POLLING_INTERVAL 28 // Polling Interval (us) |
casiotone401 | 0:cd43a974c54c | 38 | |
casiotone401 | 0:cd43a974c54c | 39 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 40 | // OSCtoCV Converter Macros |
casiotone401 | 0:cd43a974c54c | 41 | |
casiotone401 | 0:cd43a974c54c | 42 | #define Lin 0 // Linear LinearCV |
casiotone401 | 0:cd43a974c54c | 43 | #define Chr 1 // Chromatic |
casiotone401 | 0:cd43a974c54c | 44 | #define Maj 2 // Major |
casiotone401 | 0:cd43a974c54c | 45 | #define M7 3 // Major7 |
casiotone401 | 0:cd43a974c54c | 46 | #define Min7 4 // Minor7 |
casiotone401 | 0:cd43a974c54c | 47 | #define Dor 5 // Dorian |
casiotone401 | 0:cd43a974c54c | 48 | #define Min 6 // Minor |
casiotone401 | 0:cd43a974c54c | 49 | #define S5th 7 // 5th |
casiotone401 | 0:cd43a974c54c | 50 | #define Wht 8 // Wholetone |
casiotone401 | 0:cd43a974c54c | 51 | |
casiotone401 | 0:cd43a974c54c | 52 | #define SCALE_NUM 9 // Scales total |
casiotone401 | 0:cd43a974c54c | 53 | |
casiotone401 | 0:cd43a974c54c | 54 | #define SCALE_AOUT (65535 / SCALE_NUM - 1) |
casiotone401 | 0:cd43a974c54c | 55 | |
casiotone401 | 0:cd43a974c54c | 56 | #define QUAN_RES1 116 // Quantize voltage Steps |
casiotone401 | 0:cd43a974c54c | 57 | #define QUAN_RES2 68 |
casiotone401 | 0:cd43a974c54c | 58 | #define QUAN_RES3 46 |
casiotone401 | 0:cd43a974c54c | 59 | #define QUAN_RES4 40 |
casiotone401 | 0:cd43a974c54c | 60 | #define QUAN_RES5 68 |
casiotone401 | 0:cd43a974c54c | 61 | #define QUAN_RES6 68 |
casiotone401 | 0:cd43a974c54c | 62 | #define QUAN_RES7 16 |
casiotone401 | 0:cd43a974c54c | 63 | #define QUAN_RES8 58 |
casiotone401 | 0:cd43a974c54c | 64 | |
casiotone401 | 0:cd43a974c54c | 65 | #define SCALING_N 32256.0f |
casiotone401 | 0:cd43a974c54c | 66 | |
casiotone401 | 0:cd43a974c54c | 67 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 68 | // Ethernet Setting |
casiotone401 | 0:cd43a974c54c | 69 | |
casiotone401 | 0:cd43a974c54c | 70 | //#define DHCP // address assigned by DHCP |
casiotone401 | 0:cd43a974c54c | 71 | #define INPUT_PORT 12345 // Input Port Number |
casiotone401 | 0:cd43a974c54c | 72 | #define TOSC_PORT 9000 // touchOSC Port Number |
casiotone401 | 0:cd43a974c54c | 73 | |
casiotone401 | 0:cd43a974c54c | 74 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 75 | // SubModeCount |
casiotone401 | 0:cd43a974c54c | 76 | #define SUBMODE1_TOTAL 8 |
casiotone401 | 0:cd43a974c54c | 77 | #define SUBMODE2_TOTAL 8 |
casiotone401 | 0:cd43a974c54c | 78 | |
casiotone401 | 0:cd43a974c54c | 79 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 80 | // Gate Sequencer Macros |
casiotone401 | 0:cd43a974c54c | 81 | |
casiotone401 | 0:cd43a974c54c | 82 | #define _DISABLE 0 |
casiotone401 | 0:cd43a974c54c | 83 | #define _ENABLE 1 |
casiotone401 | 0:cd43a974c54c | 84 | |
casiotone401 | 0:cd43a974c54c | 85 | #define GATE1 0 |
casiotone401 | 0:cd43a974c54c | 86 | #define GATE2 1 |
casiotone401 | 0:cd43a974c54c | 87 | #define GATE3 2 |
casiotone401 | 0:cd43a974c54c | 88 | #define GATE4 3 |
casiotone401 | 0:cd43a974c54c | 89 | #define SUBGATE 4 |
casiotone401 | 0:cd43a974c54c | 90 | #define GATE_TOTAL 5 |
casiotone401 | 0:cd43a974c54c | 91 | |
casiotone401 | 0:cd43a974c54c | 92 | #define INVERT 1 |
casiotone401 | 0:cd43a974c54c | 93 | #define NON_INVERT 0 |
casiotone401 | 0:cd43a974c54c | 94 | |
casiotone401 | 0:cd43a974c54c | 95 | #define GATESOUT_ON 0 |
casiotone401 | 0:cd43a974c54c | 96 | #define GATESOUT_OFF 1 |
casiotone401 | 0:cd43a974c54c | 97 | |
casiotone401 | 0:cd43a974c54c | 98 | #define SYNC_ON 0 |
casiotone401 | 0:cd43a974c54c | 99 | #define SYNC_OFF 1 |
casiotone401 | 0:cd43a974c54c | 100 | |
casiotone401 | 0:cd43a974c54c | 101 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 102 | // Beats (Note values) |
casiotone401 | 0:cd43a974c54c | 103 | |
casiotone401 | 0:cd43a974c54c | 104 | #define N1ST 1 // whole |
casiotone401 | 0:cd43a974c54c | 105 | #define N2ND 2 // harf |
casiotone401 | 0:cd43a974c54c | 106 | #define N4TH 4 // quarter |
casiotone401 | 0:cd43a974c54c | 107 | #define N8TH 8 |
casiotone401 | 0:cd43a974c54c | 108 | #define N16TH 16 |
casiotone401 | 0:cd43a974c54c | 109 | #define N32TH 32 |
casiotone401 | 0:cd43a974c54c | 110 | #define N64TH 64 |
casiotone401 | 0:cd43a974c54c | 111 | #define NDOT2 3 // dotted |
casiotone401 | 0:cd43a974c54c | 112 | #define NDOT4 7 |
casiotone401 | 0:cd43a974c54c | 113 | #define NDOT8 9 |
casiotone401 | 0:cd43a974c54c | 114 | #define NDOT16 11 |
casiotone401 | 0:cd43a974c54c | 115 | #define NDOT32 13 |
casiotone401 | 0:cd43a974c54c | 116 | #define TRIP2 3 // triplets |
casiotone401 | 0:cd43a974c54c | 117 | #define TRIP4 6 |
casiotone401 | 0:cd43a974c54c | 118 | #define TRIP8 12 |
casiotone401 | 0:cd43a974c54c | 119 | #define TRIP16 24 |
casiotone401 | 0:cd43a974c54c | 120 | #define TRIP32 48 |
casiotone401 | 0:cd43a974c54c | 121 | #define SYNC24 96 |
casiotone401 | 0:cd43a974c54c | 122 | #define NRESET 0 // Gate Reset |
casiotone401 | 0:cd43a974c54c | 123 | |
casiotone401 | 0:cd43a974c54c | 124 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 125 | // Sequencer Macros |
casiotone401 | 0:cd43a974c54c | 126 | |
casiotone401 | 0:cd43a974c54c | 127 | #define STEP_INDICATOR_ADDRESS "/seqstep/" // touchOSC multi toggle(1x16(8)) for Current Step Indicator |
casiotone401 | 0:cd43a974c54c | 128 | #define RESET_COUNTER_ADDRESS "/reset" // touchOSC label for Sequencer reset count |
casiotone401 | 0:cd43a974c54c | 129 | |
casiotone401 | 0:cd43a974c54c | 130 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 131 | // M185 Macros |
casiotone401 | 0:cd43a974c54c | 132 | |
casiotone401 | 0:cd43a974c54c | 133 | #define PULSE_COUNT_ADDRESS "/pulse" // /pulse1 ~ pulse8 M185 Pulse Count |
casiotone401 | 0:cd43a974c54c | 134 | #define GATE_MODE_ADDRESS "/gatemode" // /gatemode1 ~ gatemode8 M185 Gate Mode |
casiotone401 | 0:cd43a974c54c | 135 | |
casiotone401 | 0:cd43a974c54c | 136 | #define SINGLE 0 |
casiotone401 | 0:cd43a974c54c | 137 | #define MUTE 1 |
casiotone401 | 0:cd43a974c54c | 138 | #define MULTI 2 |
casiotone401 | 0:cd43a974c54c | 139 | #define HOLD 3 |
casiotone401 | 0:cd43a974c54c | 140 | |
casiotone401 | 0:cd43a974c54c | 141 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 142 | // Euclidean Sequencer Macros |
casiotone401 | 0:cd43a974c54c | 143 | |
casiotone401 | 0:cd43a974c54c | 144 | #define READ_DELAY 10 // for debouncing |
casiotone401 | 0:cd43a974c54c | 145 | #define MAXCHANNELS 4 |
casiotone401 | 0:cd43a974c54c | 146 | #define MAXSTEPS 16 // max step length |
casiotone401 | 0:cd43a974c54c | 147 | #define TRIGGER_DURATION 2200 |
casiotone401 | 0:cd43a974c54c | 148 | |
casiotone401 | 0:cd43a974c54c | 149 | #define DISPLAY_UPDATE 2000 // how long active channel display is shown |
casiotone401 | 0:cd43a974c54c | 150 | #define MATRIX_ADDRESS "/matrix/" // touchOSC multi toggle(9x16) OSC address |
casiotone401 | 0:cd43a974c54c | 151 | |
casiotone401 | 0:cd43a974c54c | 152 | |
casiotone401 | 0:cd43a974c54c | 153 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 154 | // Functions |
casiotone401 | 0:cd43a974c54c | 155 | |
casiotone401 | 0:cd43a974c54c | 156 | /* Map Function |
casiotone401 | 0:cd43a974c54c | 157 | Remaps float value from one range to another range. |
casiotone401 | 0:cd43a974c54c | 158 | |
casiotone401 | 0:cd43a974c54c | 159 | float MapFloat(float x, float in_min, float in_max, float out_min, float out_max) |
casiotone401 | 0:cd43a974c54c | 160 | |
casiotone401 | 0:cd43a974c54c | 161 | */ |
casiotone401 | 0:cd43a974c54c | 162 | extern inline float MapFloat(float x, float in_min, float in_max, float out_min, float out_max) |
casiotone401 | 0:cd43a974c54c | 163 | { |
casiotone401 | 0:cd43a974c54c | 164 | return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min; |
casiotone401 | 0:cd43a974c54c | 165 | } |
casiotone401 | 0:cd43a974c54c | 166 | |
casiotone401 | 0:cd43a974c54c | 167 | // Fast strlen function http://www.strchr.com/optimized_strlen_function |
casiotone401 | 0:cd43a974c54c | 168 | extern inline size_t strlength(const char *s) |
casiotone401 | 0:cd43a974c54c | 169 | { |
casiotone401 | 0:cd43a974c54c | 170 | size_t len = 0; |
casiotone401 | 0:cd43a974c54c | 171 | |
casiotone401 | 0:cd43a974c54c | 172 | for (;;) |
casiotone401 | 0:cd43a974c54c | 173 | { |
casiotone401 | 0:cd43a974c54c | 174 | unsigned x = *(unsigned*)s; |
casiotone401 | 0:cd43a974c54c | 175 | if ((x & 0xFF) == 0) return len; |
casiotone401 | 0:cd43a974c54c | 176 | if ((x & 0xFF00) == 0) return len + 1; |
casiotone401 | 0:cd43a974c54c | 177 | if ((x & 0xFF0000) == 0) return len + 2; |
casiotone401 | 0:cd43a974c54c | 178 | if ((x & 0xFF000000) == 0) return len + 3; |
casiotone401 | 0:cd43a974c54c | 179 | s += 4, len += 4; |
casiotone401 | 0:cd43a974c54c | 180 | } |
casiotone401 | 0:cd43a974c54c | 181 | } |
casiotone401 | 0:cd43a974c54c | 182 | |
casiotone401 | 0:cd43a974c54c | 183 | // set touchOSC Matrix Address |
casiotone401 | 0:cd43a974c54c | 184 | extern inline char * SetMatrixAddress(int row, int column, bool euclid) |
casiotone401 | 0:cd43a974c54c | 185 | { |
casiotone401 | 0:cd43a974c54c | 186 | |
casiotone401 | 0:cd43a974c54c | 187 | static char address[32]; |
casiotone401 | 0:cd43a974c54c | 188 | |
casiotone401 | 0:cd43a974c54c | 189 | if (euclid) |
casiotone401 | 0:cd43a974c54c | 190 | { |
casiotone401 | 0:cd43a974c54c | 191 | sprintf(address, "%s%d/%d", MATRIX_ADDRESS, column + 1, row + 1); |
casiotone401 | 0:cd43a974c54c | 192 | |
casiotone401 | 0:cd43a974c54c | 193 | } else { |
casiotone401 | 0:cd43a974c54c | 194 | |
casiotone401 | 0:cd43a974c54c | 195 | sprintf(address, "%s%d/1", STEP_INDICATOR_ADDRESS, column + 1); |
casiotone401 | 0:cd43a974c54c | 196 | } |
casiotone401 | 0:cd43a974c54c | 197 | |
casiotone401 | 0:cd43a974c54c | 198 | return address; |
casiotone401 | 0:cd43a974c54c | 199 | |
casiotone401 | 0:cd43a974c54c | 200 | /* |
casiotone401 | 0:cd43a974c54c | 201 | static char address[32]; |
casiotone401 | 0:cd43a974c54c | 202 | char col[2]; |
casiotone401 | 0:cd43a974c54c | 203 | char ch[2]; |
casiotone401 | 0:cd43a974c54c | 204 | |
casiotone401 | 0:cd43a974c54c | 205 | if(euclid) |
casiotone401 | 0:cd43a974c54c | 206 | { |
casiotone401 | 0:cd43a974c54c | 207 | strcpy(address, MATRIX_ADDRESS); |
casiotone401 | 0:cd43a974c54c | 208 | |
casiotone401 | 0:cd43a974c54c | 209 | } else { |
casiotone401 | 0:cd43a974c54c | 210 | |
casiotone401 | 0:cd43a974c54c | 211 | strcpy(address, STEP_INDICATOR_ADDRESS); |
casiotone401 | 0:cd43a974c54c | 212 | } |
casiotone401 | 0:cd43a974c54c | 213 | |
casiotone401 | 0:cd43a974c54c | 214 | sprintf(col, "%d", column + 1); |
casiotone401 | 0:cd43a974c54c | 215 | strcat(address, col); |
casiotone401 | 0:cd43a974c54c | 216 | |
casiotone401 | 0:cd43a974c54c | 217 | if(euclid) |
casiotone401 | 0:cd43a974c54c | 218 | { |
casiotone401 | 0:cd43a974c54c | 219 | strcat(address, "/"); |
casiotone401 | 0:cd43a974c54c | 220 | |
casiotone401 | 0:cd43a974c54c | 221 | sprintf(ch, "%d", row + 1); |
casiotone401 | 0:cd43a974c54c | 222 | strcat(address, ch); |
casiotone401 | 0:cd43a974c54c | 223 | |
casiotone401 | 0:cd43a974c54c | 224 | } else { |
casiotone401 | 0:cd43a974c54c | 225 | |
casiotone401 | 0:cd43a974c54c | 226 | strcat(address, "/1"); |
casiotone401 | 0:cd43a974c54c | 227 | } |
casiotone401 | 0:cd43a974c54c | 228 | |
casiotone401 | 0:cd43a974c54c | 229 | return address; |
casiotone401 | 0:cd43a974c54c | 230 | */ |
casiotone401 | 0:cd43a974c54c | 231 | } |
casiotone401 | 0:cd43a974c54c | 232 | |
casiotone401 | 0:cd43a974c54c | 233 | // SPI Transfer |
casiotone401 | 0:cd43a974c54c | 234 | // DAC8568 data word length 32bit (8bit shift out) |
casiotone401 | 0:cd43a974c54c | 235 | extern void UpdateCV(int, int, const unsigned int *); |
casiotone401 | 0:cd43a974c54c | 236 | |
casiotone401 | 0:cd43a974c54c | 237 | // Update CV Meter(Text LCD bar meter) |
casiotone401 | 0:cd43a974c54c | 238 | extern void UpdateCVMeter(int, const unsigned int *); |
casiotone401 | 0:cd43a974c54c | 239 | |
casiotone401 | 0:cd43a974c54c | 240 | // Check subMode1(gArdSW[0]) |
casiotone401 | 0:cd43a974c54c | 241 | extern int CheckSubMode1(void); |
casiotone401 | 0:cd43a974c54c | 242 | |
casiotone401 | 0:cd43a974c54c | 243 | // Check subMode2(gArdSW[1]) |
casiotone401 | 0:cd43a974c54c | 244 | extern int CheckSubMode2(void); |
casiotone401 | 0:cd43a974c54c | 245 | |
casiotone401 | 0:cd43a974c54c | 246 | // Update subMode Text LCD |
casiotone401 | 0:cd43a974c54c | 247 | extern void UpdateSubModeLCD(const char *); |
casiotone401 | 0:cd43a974c54c | 248 | |
casiotone401 | 0:cd43a974c54c | 249 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 250 | // Global Variables |
casiotone401 | 0:cd43a974c54c | 251 | |
casiotone401 | 0:cd43a974c54c | 252 | // Silentway Calibration Data Mapping |
casiotone401 | 0:cd43a974c54c | 253 | // http://www.expert-sleepers.co.uk/silentway.html |
casiotone401 | 0:cd43a974c54c | 254 | |
casiotone401 | 0:cd43a974c54c | 255 | // Chromatic Scale |
casiotone401 | 0:cd43a974c54c | 256 | extern const float calibMap1[QUAN_RES1]; |
casiotone401 | 0:cd43a974c54c | 257 | |
casiotone401 | 0:cd43a974c54c | 258 | // Major Scale |
casiotone401 | 0:cd43a974c54c | 259 | extern const float calibMap2[QUAN_RES2]; |
casiotone401 | 0:cd43a974c54c | 260 | |
casiotone401 | 0:cd43a974c54c | 261 | // M7(9) |
casiotone401 | 0:cd43a974c54c | 262 | extern const float calibMap3[QUAN_RES3]; |
casiotone401 | 0:cd43a974c54c | 263 | |
casiotone401 | 0:cd43a974c54c | 264 | // m7(9) |
casiotone401 | 0:cd43a974c54c | 265 | extern const float calibMap4[QUAN_RES4]; |
casiotone401 | 0:cd43a974c54c | 266 | |
casiotone401 | 0:cd43a974c54c | 267 | // Dorian Scale |
casiotone401 | 0:cd43a974c54c | 268 | extern const float calibMap5[QUAN_RES5]; |
casiotone401 | 0:cd43a974c54c | 269 | |
casiotone401 | 0:cd43a974c54c | 270 | // Minor Scale |
casiotone401 | 0:cd43a974c54c | 271 | extern const float calibMap6[QUAN_RES6]; |
casiotone401 | 0:cd43a974c54c | 272 | |
casiotone401 | 0:cd43a974c54c | 273 | // 5th |
casiotone401 | 0:cd43a974c54c | 274 | extern const float calibMap7[QUAN_RES7]; |
casiotone401 | 0:cd43a974c54c | 275 | |
casiotone401 | 0:cd43a974c54c | 276 | // Whole tone |
casiotone401 | 0:cd43a974c54c | 277 | extern const float calibMap8[QUAN_RES8]; |
casiotone401 | 0:cd43a974c54c | 278 | |
casiotone401 | 0:cd43a974c54c | 279 | extern float gOSC_cv[8]; |
casiotone401 | 0:cd43a974c54c | 280 | extern float gSeq_cv[16]; |
casiotone401 | 0:cd43a974c54c | 281 | extern float gGlide; |
casiotone401 | 0:cd43a974c54c | 282 | |
casiotone401 | 0:cd43a974c54c | 283 | // Sub Mode |
casiotone401 | 0:cd43a974c54c | 284 | extern int gSubModeCount1; |
casiotone401 | 0:cd43a974c54c | 285 | extern int gSubModeCount2; |
casiotone401 | 0:cd43a974c54c | 286 | |
casiotone401 | 0:cd43a974c54c | 287 | // Variables for Sequencer |
casiotone401 | 0:cd43a974c54c | 288 | extern float gPulseCount[8]; |
casiotone401 | 0:cd43a974c54c | 289 | extern float gGateMode[16]; |
casiotone401 | 0:cd43a974c54c | 290 | extern float gSlide[16]; |
casiotone401 | 0:cd43a974c54c | 291 | extern float gAccent[16]; |
casiotone401 | 0:cd43a974c54c | 292 | |
casiotone401 | 0:cd43a974c54c | 293 | // Euclidean SEQ Variables |
casiotone401 | 0:cd43a974c54c | 294 | extern float gEucA[6], gEucB[6]; |
casiotone401 | 0:cd43a974c54c | 295 | |
casiotone401 | 0:cd43a974c54c | 296 | // Variables for Control |
casiotone401 | 0:cd43a974c54c | 297 | /* |
casiotone401 | 0:cd43a974c54c | 298 | gCtrl[0] /ctrl1 BPM |
casiotone401 | 0:cd43a974c54c | 299 | gCtrl[1] /ctrl2 Quantize mode |
casiotone401 | 0:cd43a974c54c | 300 | gCtrl[3] /ctrl4 Glide |
casiotone401 | 0:cd43a974c54c | 301 | gCtrl[4] /ctrl5 M185 Reset Count |
casiotone401 | 0:cd43a974c54c | 302 | |
casiotone401 | 0:cd43a974c54c | 303 | gCtrlSW[0] /ctrlsw1 Sequencer STOP |
casiotone401 | 0:cd43a974c54c | 304 | gCtrlSW[1] /ctrlsw2 Euclidean Sequencer reset |
casiotone401 | 0:cd43a974c54c | 305 | gCtrlSW[2] /ctrlsw3 Sequencer Loop |
casiotone401 | 0:cd43a974c54c | 306 | gCtrlSW[3] /ctrlsw4 Euclid Seq ON |
casiotone401 | 0:cd43a974c54c | 307 | gCtrlSW[4] /ctrlsggSubModeCount1w5 ASR Analog Mode |
casiotone401 | 0:cd43a974c54c | 308 | |
casiotone401 | 0:cd43a974c54c | 309 | gArdPot[0] /pot1 Arduino pot1 |
casiotone401 | 0:cd43a974c54c | 310 | gArdPot[1] /pot2 Arduino pot2 |
casiotone401 | 0:cd43a974c54c | 311 | gArdSW[0] /sw1 Arduino sw1 |
casiotone401 | 0:cd43a974c54c | 312 | gArdSW[1] /sw2 Arduino sw2 |
casiotone401 | 0:cd43a974c54c | 313 | |
casiotone401 | 0:cd43a974c54c | 314 | */ |
casiotone401 | 0:cd43a974c54c | 315 | |
casiotone401 | 0:cd43a974c54c | 316 | extern float gCtrl[8]; |
casiotone401 | 0:cd43a974c54c | 317 | extern bool gCtrlSW[8]; |
casiotone401 | 0:cd43a974c54c | 318 | |
casiotone401 | 0:cd43a974c54c | 319 | // Variables for Arduino OSC |
casiotone401 | 0:cd43a974c54c | 320 | extern uint16_t gArdCV[4]; |
casiotone401 | 0:cd43a974c54c | 321 | extern float gArdPot[2]; |
casiotone401 | 0:cd43a974c54c | 322 | extern bool gArdSW[2]; |
casiotone401 | 0:cd43a974c54c | 323 | |
casiotone401 | 0:cd43a974c54c | 324 | //------------------------------------------------------------- |
casiotone401 | 0:cd43a974c54c | 325 | // mbed Functions |
casiotone401 | 0:cd43a974c54c | 326 | |
casiotone401 | 0:cd43a974c54c | 327 | extern TextLCD gLCD; // rs, e, d4-d7 |
casiotone401 | 0:cd43a974c54c | 328 | |
casiotone401 | 0:cd43a974c54c | 329 | extern BurstSPI gSPI; // SPI (p6 unconnected) |
casiotone401 | 0:cd43a974c54c | 330 | |
casiotone401 | 0:cd43a974c54c | 331 | extern FastOut<p15> gSYNCMODE; // SYNC DAC8568 |
casiotone401 | 0:cd43a974c54c | 332 | extern FastOut<p16> gLDAC; // LDAC DAC8568 |
casiotone401 | 0:cd43a974c54c | 333 | |
casiotone401 | 0:cd43a974c54c | 334 | extern DigitalOut gGATES[4]; // GateOut |
casiotone401 | 0:cd43a974c54c | 335 | extern FastOut<p19> gSUBGATE; // SubGateOut |
casiotone401 | 0:cd43a974c54c | 336 | extern FastOut<p25> gCLOCKOUT; // ClockOut |
casiotone401 | 0:cd43a974c54c | 337 | |
casiotone401 | 0:cd43a974c54c | 338 | extern AnalogOut gAOUT; |
casiotone401 | 0:cd43a974c54c | 339 | |
casiotone401 | 0:cd43a974c54c | 340 | extern AnalogIn gAIN; |
casiotone401 | 0:cd43a974c54c | 341 | extern DebouncedInterrupt gSW; // Mode SW |
casiotone401 | 0:cd43a974c54c | 342 | |
casiotone401 | 0:cd43a974c54c | 343 | // MIDI OUT |
casiotone401 | 0:cd43a974c54c | 344 | extern MIDI midi; |
casiotone401 | 0:cd43a974c54c | 345 | |
casiotone401 | 0:cd43a974c54c | 346 | extern Timer gTimer; // Timer |
casiotone401 | 0:cd43a974c54c | 347 | extern Ticker gPoller; // Ticker for Polling |
casiotone401 | 0:cd43a974c54c | 348 | |
casiotone401 | 0:cd43a974c54c | 349 | // Ethernet |
casiotone401 | 0:cd43a974c54c | 350 | extern EthernetNetIf gEth; |
casiotone401 | 0:cd43a974c54c | 351 | |
casiotone401 | 0:cd43a974c54c | 352 | // touchOSC Address |
casiotone401 | 0:cd43a974c54c | 353 | extern uint8_t touchOSCAddress[]; |
casiotone401 | 0:cd43a974c54c | 354 | extern int touchOSCPort; |
casiotone401 | 0:cd43a974c54c | 355 | |
casiotone401 | 0:cd43a974c54c | 356 | // Set OSC message for sending |
casiotone401 | 0:cd43a974c54c | 357 | extern OSCClass osc; |
casiotone401 | 0:cd43a974c54c | 358 | extern OSCMessage sendMes; |
casiotone401 | 0:cd43a974c54c | 359 | |
casiotone401 | 0:cd43a974c54c | 360 | #endif |