casiotone 401 / OSCtoCV

OSCtoCV Library

Dependents:   OSCtoCVConverter

OSCtoCV.h@6:7fb15b1b5459, 2016-02-25 (annotated)

Committer:
casiotone401
Date:
Thu Feb 25 11:21:37 2016 +0000
Revision:
6:7fb15b1b5459
Parent:
4:fe335dc8d53d 
minor change

Who changed what in which revision?

UserRevisionLine numberNew contents of line
casiotone401 0:cd43a974c54c 1 /*
casiotone401 0:cd43a974c54c 2 OSCtoCV Converter Configulation
casiotone401 0:cd43a974c54c 3 */
casiotone401 0:cd43a974c54c 4
casiotone401 0:cd43a974c54c 5 #pragma O3
casiotone401 0:cd43a974c54c 6 #pragma Otime
casiotone401 0:cd43a974c54c 7
casiotone401 0:cd43a974c54c 8 #ifndef OSCtoCV_H
casiotone401 0:cd43a974c54c 9 #define OSCtoCV_H
casiotone401 0:cd43a974c54c 10
casiotone401 0:cd43a974c54c 11 #include "mbed.h"
casiotone401 0:cd43a974c54c 12 #include "FastIO.h" // https://developer.mbed.org/users/Sissors/code/FastIO/
casiotone401 0:cd43a974c54c 13 //#include "FastAnalogIn.h"
casiotone401 0:cd43a974c54c 14 #include "DebouncedInterrupt.h" // https://developer.mbed.org/users/kandangath/code/DebouncedInterrupt/
casiotone401 0:cd43a974c54c 15 #include "BurstSPI.h" // https://developer.mbed.org/users/Sissors/code/BurstSPI/
casiotone401 0:cd43a974c54c 16 #include "TextLCD.h" //edit "writeCommand" "writeData" protected -> public
casiotone401 0:cd43a974c54c 17 #include "EthernetNetIf.h"
casiotone401 0:cd43a974c54c 18 #include "UDPSocket.h"
casiotone401 0:cd43a974c54c 19 #include "OSCReceiver.h"
casiotone401 0:cd43a974c54c 20 #include "mbedOSC.h"
casiotone401 0:cd43a974c54c 21 #include "MIDI.h" // https://developer.mbed.org/users/okini3939/code/MIDI/
casiotone401 0:cd43a974c54c 22
casiotone401 0:cd43a974c54c 23 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 24 // DAC8568 Control Bits (See datasheet)
casiotone401 0:cd43a974c54c 25
casiotone401 0:cd43a974c54c 26 #define WRITE 0x00
casiotone401 0:cd43a974c54c 27 #define UPDATE 0x01
casiotone401 0:cd43a974c54c 28 #define WRITE_UPDATE_ALL 0x02 // LDAC Write to Selected Update All
casiotone401 0:cd43a974c54c 29 #define WRITE_UPDATE_N 0x03 // LDAC Write to Selected Update Respective
casiotone401 0:cd43a974c54c 30 #define POWER 0x04
casiotone401 0:cd43a974c54c 31 #define CLR 0x05 // Clear Code Register
casiotone401 0:cd43a974c54c 32 #define WRITE_LDAC_REG 0x06
casiotone401 0:cd43a974c54c 33 #define RESET 0x07 // Software Reset DAC8568
casiotone401 0:cd43a974c54c 34 #define SETUP_INTERNAL_REF 0x08
casiotone401 0:cd43a974c54c 35
casiotone401 0:cd43a974c54c 36 #define SPI_RATE 20000000 // 20Mbps SPI Clock
casiotone401 4:fe335dc8d53d 37 #define POLLING_INTERVAL 19 // Polling Interval (us)
casiotone401 0:cd43a974c54c 38
casiotone401 0:cd43a974c54c 39 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 40 // OSCtoCV Converter Macros
casiotone401 0:cd43a974c54c 41
casiotone401 0:cd43a974c54c 42 #define Lin 0 // Linear LinearCV
casiotone401 0:cd43a974c54c 43 #define Chr 1 // Chromatic
casiotone401 0:cd43a974c54c 44 #define Maj 2 // Major
casiotone401 0:cd43a974c54c 45 #define M7 3 // Major7
casiotone401 0:cd43a974c54c 46 #define Min7 4 // Minor7
casiotone401 0:cd43a974c54c 47 #define Dor 5 // Dorian
casiotone401 0:cd43a974c54c 48 #define Min 6 // Minor
casiotone401 0:cd43a974c54c 49 #define S5th 7 // 5th
casiotone401 0:cd43a974c54c 50 #define Wht 8 // Wholetone
casiotone401 0:cd43a974c54c 51
casiotone401 4:fe335dc8d53d 52 #define SCALE_TOTAL 9 // Scales total
casiotone401 0:cd43a974c54c 53
casiotone401 4:fe335dc8d53d 54 #define SCALE_AOUT (65535 / SCALE_TOTAL - 1)
casiotone401 0:cd43a974c54c 55
casiotone401 0:cd43a974c54c 56 #define QUAN_RES1 116 // Quantize voltage Steps
casiotone401 0:cd43a974c54c 57 #define QUAN_RES2 68
casiotone401 0:cd43a974c54c 58 #define QUAN_RES3 46
casiotone401 0:cd43a974c54c 59 #define QUAN_RES4 40
casiotone401 0:cd43a974c54c 60 #define QUAN_RES5 68
casiotone401 0:cd43a974c54c 61 #define QUAN_RES6 68
casiotone401 0:cd43a974c54c 62 #define QUAN_RES7 16
casiotone401 0:cd43a974c54c 63 #define QUAN_RES8 58
casiotone401 0:cd43a974c54c 64
casiotone401 0:cd43a974c54c 65 #define SCALING_N 32256.0f
casiotone401 0:cd43a974c54c 66
casiotone401 0:cd43a974c54c 67 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 68 // Ethernet Setting
casiotone401 0:cd43a974c54c 69
casiotone401 4:fe335dc8d53d 70 #define DHCP // address assigned by DHCP
casiotone401 0:cd43a974c54c 71 #define INPUT_PORT 12345 // Input Port Number
casiotone401 0:cd43a974c54c 72 #define TOSC_PORT 9000 // touchOSC Port Number
casiotone401 0:cd43a974c54c 73
casiotone401 0:cd43a974c54c 74 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 75 // SubModeCount
casiotone401 0:cd43a974c54c 76 #define SUBMODE1_TOTAL 8
casiotone401 0:cd43a974c54c 77 #define SUBMODE2_TOTAL 8
casiotone401 0:cd43a974c54c 78
casiotone401 0:cd43a974c54c 79 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 80 // Gate Sequencer Macros
casiotone401 0:cd43a974c54c 81
casiotone401 0:cd43a974c54c 82 #define _DISABLE 0
casiotone401 0:cd43a974c54c 83 #define _ENABLE 1
casiotone401 0:cd43a974c54c 84
casiotone401 0:cd43a974c54c 85 #define GATE1 0
casiotone401 0:cd43a974c54c 86 #define GATE2 1
casiotone401 0:cd43a974c54c 87 #define GATE3 2
casiotone401 0:cd43a974c54c 88 #define GATE4 3
casiotone401 0:cd43a974c54c 89 #define SUBGATE 4
casiotone401 0:cd43a974c54c 90 #define GATE_TOTAL 5
casiotone401 0:cd43a974c54c 91
casiotone401 0:cd43a974c54c 92 #define INVERT 1
casiotone401 0:cd43a974c54c 93 #define NON_INVERT 0
casiotone401 0:cd43a974c54c 94
casiotone401 0:cd43a974c54c 95 #define GATESOUT_ON 0
casiotone401 0:cd43a974c54c 96 #define GATESOUT_OFF 1
casiotone401 0:cd43a974c54c 97
casiotone401 0:cd43a974c54c 98 #define SYNC_ON 0
casiotone401 0:cd43a974c54c 99 #define SYNC_OFF 1
casiotone401 0:cd43a974c54c 100
casiotone401 0:cd43a974c54c 101 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 102 // Beats (Note values)
casiotone401 0:cd43a974c54c 103
casiotone401 0:cd43a974c54c 104 #define N1ST 1 // whole
casiotone401 0:cd43a974c54c 105 #define N2ND 2 // harf
casiotone401 0:cd43a974c54c 106 #define N4TH 4 // quarter
casiotone401 0:cd43a974c54c 107 #define N8TH 8
casiotone401 0:cd43a974c54c 108 #define N16TH 16
casiotone401 0:cd43a974c54c 109 #define N32TH 32
casiotone401 0:cd43a974c54c 110 #define N64TH 64
casiotone401 0:cd43a974c54c 111 #define NDOT2 3 // dotted
casiotone401 0:cd43a974c54c 112 #define NDOT4 7
casiotone401 0:cd43a974c54c 113 #define NDOT8 9
casiotone401 0:cd43a974c54c 114 #define NDOT16 11
casiotone401 0:cd43a974c54c 115 #define NDOT32 13
casiotone401 0:cd43a974c54c 116 #define TRIP2 3 // triplets
casiotone401 0:cd43a974c54c 117 #define TRIP4 6
casiotone401 0:cd43a974c54c 118 #define TRIP8 12
casiotone401 0:cd43a974c54c 119 #define TRIP16 24
casiotone401 0:cd43a974c54c 120 #define TRIP32 48
casiotone401 0:cd43a974c54c 121 #define SYNC24 96
casiotone401 0:cd43a974c54c 122 #define NRESET 0 // Gate Reset
casiotone401 0:cd43a974c54c 123
casiotone401 0:cd43a974c54c 124 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 125 // Sequencer Macros
casiotone401 1:981b62bb5c87 126 #define SHIFTSEQ 0
casiotone401 1:981b62bb5c87 127 #define M185SEQ 1
casiotone401 1:981b62bb5c87 128 #define EUCLID 2
casiotone401 1:981b62bb5c87 129 #define BEATSSEQ 3
casiotone401 0:cd43a974c54c 130
casiotone401 1:981b62bb5c87 131 #define CV_CHANNEL1 1
casiotone401 1:981b62bb5c87 132 #define CV_CHANNEL2 2
casiotone401 1:981b62bb5c87 133 #define CV_CHANNEL3 3
casiotone401 1:981b62bb5c87 134 #define CV_CHANNEL4 4
casiotone401 1:981b62bb5c87 135 #define CV_CHANNEL5 5
casiotone401 1:981b62bb5c87 136 #define CV_CHANNEL6 6
casiotone401 1:981b62bb5c87 137 #define CV_CHANNEL7 7
casiotone401 1:981b62bb5c87 138 #define CV_CHANNEL8 8
casiotone401 1:981b62bb5c87 139
casiotone401 1:981b62bb5c87 140 #define GATE_MODE_ADDRESS "/gatemode" // /gatemode1 ~ gatemode16
casiotone401 0:cd43a974c54c 141 #define STEP_INDICATOR_ADDRESS "/seqstep/" // touchOSC multi toggle(1x16(8)) for Current Step Indicator
casiotone401 1:981b62bb5c87 142 #define RESET_COUNTER_ADDRESS "/reset" // touchOSC label for Sequencer reset count
casiotone401 1:981b62bb5c87 143
casiotone401 1:981b62bb5c87 144 #define ANALOG_JITTER (rand() % 70 - 35)
casiotone401 0:cd43a974c54c 145
casiotone401 0:cd43a974c54c 146 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 147 // M185 Macros
casiotone401 0:cd43a974c54c 148
casiotone401 1:981b62bb5c87 149 #define PULSE_COUNT_ADDRESS "/pulse" // /pulse1 ~ pulse8 M185 Pulse Count
casiotone401 1:981b62bb5c87 150 #define GATE185_MODE_ADDRESS "/185gmode" // /gatemode1 ~ gatemode8 M185 Gate Mode
casiotone401 1:981b62bb5c87 151 #define STEP185_INDICATOR_ADDRESS "/185step/" // touchOSC multi toggle(1x16(8)) for Current Step Indicator
casiotone401 1:981b62bb5c87 152 #define RESET185_COUNTER_ADDRESS "/185reset" // touchOSC label for Sequencer reset count
casiotone401 0:cd43a974c54c 153
casiotone401 0:cd43a974c54c 154 #define SINGLE 0
casiotone401 0:cd43a974c54c 155 #define MUTE 1
casiotone401 0:cd43a974c54c 156 #define MULTI 2
casiotone401 0:cd43a974c54c 157 #define HOLD 3
casiotone401 0:cd43a974c54c 158
casiotone401 0:cd43a974c54c 159 //-------------------------------------------------------------
casiotone401 1:981b62bb5c87 160 // Beats Sequencer Macros
casiotone401 1:981b62bb5c87 161
casiotone401 1:981b62bb5c87 162 #define BEATS_MATRIX_ADDRESS "/bm/" // touchOSC multi toggle(16x16) OSC address
casiotone401 1:981b62bb5c87 163 #define BEATS_PULSE_COUNT_ADDRESS "/bp" // /pulse1 ~ pulse16 BeatsSeq Pulse Count
casiotone401 1:981b62bb5c87 164 #define BEATS_INDICATOR_ADDRESS "/bps/" // touchOSC multi toggle(1x16(8)) for Current Step Indicator
casiotone401 1:981b62bb5c87 165 #define BEATS_COUNTER_ADDRESS "/bprst" // touchOSC label for Sequencer reset count
casiotone401 1:981b62bb5c87 166
casiotone401 1:981b62bb5c87 167 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 168 // Euclidean Sequencer Macros
casiotone401 0:cd43a974c54c 169
casiotone401 0:cd43a974c54c 170 #define READ_DELAY 10 // for debouncing
casiotone401 0:cd43a974c54c 171 #define MAXCHANNELS 4
casiotone401 0:cd43a974c54c 172 #define MAXSTEPS 16 // max step length
casiotone401 0:cd43a974c54c 173 #define TRIGGER_DURATION 2200
casiotone401 0:cd43a974c54c 174
casiotone401 0:cd43a974c54c 175 #define DISPLAY_UPDATE 2000 // how long active channel display is shown
casiotone401 0:cd43a974c54c 176 #define MATRIX_ADDRESS "/matrix/" // touchOSC multi toggle(9x16) OSC address
casiotone401 0:cd43a974c54c 177
casiotone401 0:cd43a974c54c 178
casiotone401 0:cd43a974c54c 179 //-------------------------------------------------------------
casiotone401 1:981b62bb5c87 180 // Global Variables
casiotone401 1:981b62bb5c87 181
casiotone401 1:981b62bb5c87 182 // Silentway Calibration Data Mapping
casiotone401 1:981b62bb5c87 183 // http://www.expert-sleepers.co.uk/silentway.html
casiotone401 1:981b62bb5c87 184
casiotone401 1:981b62bb5c87 185 // Chromatic Scale
casiotone401 1:981b62bb5c87 186 extern const float calibMap1[QUAN_RES1];
casiotone401 1:981b62bb5c87 187
casiotone401 1:981b62bb5c87 188 // Major Scale
casiotone401 1:981b62bb5c87 189 extern const float calibMap2[QUAN_RES2];
casiotone401 1:981b62bb5c87 190
casiotone401 1:981b62bb5c87 191 // M7(9)
casiotone401 1:981b62bb5c87 192 extern const float calibMap3[QUAN_RES3];
casiotone401 1:981b62bb5c87 193
casiotone401 1:981b62bb5c87 194 // m7(9)
casiotone401 1:981b62bb5c87 195 extern const float calibMap4[QUAN_RES4];
casiotone401 1:981b62bb5c87 196
casiotone401 1:981b62bb5c87 197 // Dorian Scale
casiotone401 1:981b62bb5c87 198 extern const float calibMap5[QUAN_RES5];
casiotone401 1:981b62bb5c87 199
casiotone401 1:981b62bb5c87 200 // Minor Scale
casiotone401 1:981b62bb5c87 201 extern const float calibMap6[QUAN_RES6];
casiotone401 1:981b62bb5c87 202
casiotone401 1:981b62bb5c87 203 // 5th
casiotone401 1:981b62bb5c87 204 extern const float calibMap7[QUAN_RES7];
casiotone401 1:981b62bb5c87 205
casiotone401 1:981b62bb5c87 206 // Whole tone
casiotone401 1:981b62bb5c87 207 extern const float calibMap8[QUAN_RES8];
casiotone401 1:981b62bb5c87 208 //-------------------------------------------------------------
casiotone401 1:981b62bb5c87 209
casiotone401 1:981b62bb5c87 210 // Control Voltage
casiotone401 1:981b62bb5c87 211 extern float gOSC_cv[8];
casiotone401 1:981b62bb5c87 212 extern float gSeq_cv[16];
casiotone401 1:981b62bb5c87 213 extern float g185_cv[8];
casiotone401 1:981b62bb5c87 214
casiotone401 1:981b62bb5c87 215 // Glide
casiotone401 1:981b62bb5c87 216 extern float gGlide;
casiotone401 1:981b62bb5c87 217
casiotone401 1:981b62bb5c87 218 // Sub Mode
casiotone401 1:981b62bb5c87 219 extern int gSubModeCount1;
casiotone401 1:981b62bb5c87 220 extern int gSubModeCount2;
casiotone401 1:981b62bb5c87 221
casiotone401 1:981b62bb5c87 222 // Variables for Sequencer
casiotone401 1:981b62bb5c87 223 extern float gPulseCount[8];
casiotone401 1:981b62bb5c87 224 extern float gGateMode[16];
casiotone401 1:981b62bb5c87 225 extern float gGateMode185[8];
casiotone401 1:981b62bb5c87 226 extern float gSlide[16];
casiotone401 1:981b62bb5c87 227 extern float gSlide185[8];
casiotone401 1:981b62bb5c87 228 extern float gAccent[16];
casiotone401 1:981b62bb5c87 229 extern float gAccent185[8];
casiotone401 1:981b62bb5c87 230
casiotone401 1:981b62bb5c87 231 // Variables for Beats Seq
casiotone401 1:981b62bb5c87 232 extern float gPulseCountBeats[16];
casiotone401 1:981b62bb5c87 233 extern float gBeatsLevel[8];
casiotone401 1:981b62bb5c87 234 extern float gBeatsDecay[8];
casiotone401 1:981b62bb5c87 235 extern unsigned int gBeatsMatrix[8][16];
casiotone401 1:981b62bb5c87 236
casiotone401 1:981b62bb5c87 237 // Euclidean SEQ Variables
casiotone401 1:981b62bb5c87 238 extern float gEucA[6], gEucB[6];
casiotone401 1:981b62bb5c87 239
casiotone401 1:981b62bb5c87 240 // Variables for Control
casiotone401 1:981b62bb5c87 241 /*
casiotone401 1:981b62bb5c87 242 gCtrl[0] /ctrl1 BPM
casiotone401 1:981b62bb5c87 243 gCtrl[1] /ctrl2 Quantize mode
casiotone401 1:981b62bb5c87 244 gCtrl[3] /ctrl4 Glide
casiotone401 1:981b62bb5c87 245 gCtrl[4] /ctrl5 Shift CV Seq Reset Count
casiotone401 1:981b62bb5c87 246 gCtrl[5] /ctrl6 M185 Seq Reset Count
casiotone401 1:981b62bb5c87 247 gCtrl[6] /ctrl7 Gate Length
casiotone401 1:981b62bb5c87 248 gCtrl[7] /ctrl8 Beats Seq Reset Count
casiotone401 1:981b62bb5c87 249
casiotone401 1:981b62bb5c87 250 gCtrlSW[0] /ctrlsw1 Sequencer STOP
casiotone401 1:981b62bb5c87 251 gCtrlSW[1] /ctrlsw2 Euclidean Sequencer reset
casiotone401 1:981b62bb5c87 252 gCtrlSW[2] /ctrlsw3 Sequencer Loop
casiotone401 1:981b62bb5c87 253 gCtrlSW[3] /ctrlsw4 Euclid Seq ON
casiotone401 1:981b62bb5c87 254 gCtrlSW[4] /ctrlsw5 ASR Analog Mode
casiotone401 1:981b62bb5c87 255 gCtrlSW[5] /ctrlsw6 Beats Sequencer Random Vel
casiotone401 1:981b62bb5c87 256
casiotone401 1:981b62bb5c87 257 gArdPot[0] /pot1 Arduino pot1 control for Random, LFO
casiotone401 1:981b62bb5c87 258 gArdPot[1] /pot2 Arduino pot2 control for Random, LFO
casiotone401 1:981b62bb5c87 259 gArdSW[0] /sw1 Arduino sw1 control for Sub Mode1
casiotone401 1:981b62bb5c87 260 gArdSW[1] /sw2 Arduino sw2 control for Sub Mode2
casiotone401 1:981b62bb5c87 261 */
casiotone401 1:981b62bb5c87 262
casiotone401 1:981b62bb5c87 263 extern float gCtrl[8];
casiotone401 1:981b62bb5c87 264 extern bool gCtrlSW[8];
casiotone401 1:981b62bb5c87 265
casiotone401 1:981b62bb5c87 266 // Variables for Arduino OSC
casiotone401 1:981b62bb5c87 267 extern uint16_t gArdCV[4];
casiotone401 1:981b62bb5c87 268 extern float gArdPot[2];
casiotone401 1:981b62bb5c87 269 extern bool gArdSW[2];
casiotone401 1:981b62bb5c87 270
casiotone401 1:981b62bb5c87 271
casiotone401 1:981b62bb5c87 272 //-------------------------------------------------------------
casiotone401 1:981b62bb5c87 273 // mbed Functions
casiotone401 1:981b62bb5c87 274
casiotone401 1:981b62bb5c87 275 extern TextLCD gLCD; // rs, e, d4-d7
casiotone401 1:981b62bb5c87 276
casiotone401 1:981b62bb5c87 277 extern BurstSPI gSPI; // SPI (p6 unconnected)
casiotone401 1:981b62bb5c87 278
casiotone401 1:981b62bb5c87 279 extern FastOut<p15> gSYNCMODE; // SYNC DAC8568
casiotone401 1:981b62bb5c87 280 extern FastOut<p16> gLDAC; // LDAC DAC8568
casiotone401 1:981b62bb5c87 281
casiotone401 1:981b62bb5c87 282 // GateOut
casiotone401 1:981b62bb5c87 283 extern DigitalOut gGATES[4]; // GateOut
casiotone401 1:981b62bb5c87 284 extern FastOut<p19> gSUBGATE; // SubGateOut
casiotone401 1:981b62bb5c87 285 extern FastOut<p25> gCLOCKOUT; // ClockOut
casiotone401 1:981b62bb5c87 286
casiotone401 1:981b62bb5c87 287 extern AnalogOut gAOUT;
casiotone401 1:981b62bb5c87 288
casiotone401 1:981b62bb5c87 289 extern AnalogIn gAIN;
casiotone401 1:981b62bb5c87 290 extern DebouncedInterrupt gSW; // Mode SW
casiotone401 1:981b62bb5c87 291
casiotone401 1:981b62bb5c87 292 // MIDI OUT
casiotone401 1:981b62bb5c87 293 extern MIDI midi;
casiotone401 1:981b62bb5c87 294
casiotone401 1:981b62bb5c87 295 extern Timer gTimer; // Timer
casiotone401 1:981b62bb5c87 296 extern Ticker gPoller; // Ticker for Polling
casiotone401 1:981b62bb5c87 297
casiotone401 1:981b62bb5c87 298 // Ethernet
casiotone401 1:981b62bb5c87 299 extern EthernetNetIf gEth;
casiotone401 1:981b62bb5c87 300
casiotone401 1:981b62bb5c87 301 // touchOSC Address
casiotone401 1:981b62bb5c87 302 extern uint8_t touchOSCAddress[];
casiotone401 1:981b62bb5c87 303 extern int touchOSCPort;
casiotone401 1:981b62bb5c87 304
casiotone401 1:981b62bb5c87 305 // Set OSC message for sending
casiotone401 1:981b62bb5c87 306 extern OSCClass osc;
casiotone401 1:981b62bb5c87 307 extern OSCMessage sendMes;
casiotone401 1:981b62bb5c87 308
casiotone401 1:981b62bb5c87 309
casiotone401 1:981b62bb5c87 310 //-------------------------------------------------------------
casiotone401 0:cd43a974c54c 311 // Functions
casiotone401 0:cd43a974c54c 312
casiotone401 0:cd43a974c54c 313 /* Map Function
casiotone401 0:cd43a974c54c 314 Remaps float value from one range to another range.
casiotone401 0:cd43a974c54c 315
casiotone401 0:cd43a974c54c 316 float MapFloat(float x, float in_min, float in_max, float out_min, float out_max)
casiotone401 0:cd43a974c54c 317
casiotone401 0:cd43a974c54c 318 */
casiotone401 0:cd43a974c54c 319 extern inline float MapFloat(float x, float in_min, float in_max, float out_min, float out_max)
casiotone401 0:cd43a974c54c 320 {
casiotone401 0:cd43a974c54c 321 return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
casiotone401 0:cd43a974c54c 322 }
casiotone401 0:cd43a974c54c 323
casiotone401 4:fe335dc8d53d 324 // Check current quantize scale
casiotone401 4:fe335dc8d53d 325 extern inline uint8_t CheckQuantizeMode(void)
casiotone401 4:fe335dc8d53d 326 {
casiotone401 4:fe335dc8d53d 327 static uint8_t _qmode;
casiotone401 4:fe335dc8d53d 328 uint8_t qmode;
casiotone401 4:fe335dc8d53d 329
casiotone401 4:fe335dc8d53d 330 qmode = gCtrl[1] * (SCALE_TOTAL - 1); // Sequencer Quantize Mode (gCtrl[1])
casiotone401 4:fe335dc8d53d 331
casiotone401 4:fe335dc8d53d 332 if (_qmode != qmode)
casiotone401 4:fe335dc8d53d 333 {
casiotone401 4:fe335dc8d53d 334 gAOUT.write_u16(SCALE_AOUT * qmode); // write Analog out for send current scale
casiotone401 4:fe335dc8d53d 335 _qmode = qmode;
casiotone401 4:fe335dc8d53d 336 }
casiotone401 4:fe335dc8d53d 337
casiotone401 4:fe335dc8d53d 338 return qmode;
casiotone401 4:fe335dc8d53d 339 }
casiotone401 4:fe335dc8d53d 340
casiotone401 0:cd43a974c54c 341 // Fast strlen function http://www.strchr.com/optimized_strlen_function
casiotone401 0:cd43a974c54c 342 extern inline size_t strlength(const char *s)
casiotone401 0:cd43a974c54c 343 {
casiotone401 0:cd43a974c54c 344 size_t len = 0;
casiotone401 0:cd43a974c54c 345
casiotone401 0:cd43a974c54c 346 for (;;)
casiotone401 0:cd43a974c54c 347 {
casiotone401 0:cd43a974c54c 348 unsigned x = *(unsigned*)s;
casiotone401 0:cd43a974c54c 349 if ((x & 0xFF) == 0) return len;
casiotone401 0:cd43a974c54c 350 if ((x & 0xFF00) == 0) return len + 1;
casiotone401 0:cd43a974c54c 351 if ((x & 0xFF0000) == 0) return len + 2;
casiotone401 0:cd43a974c54c 352 if ((x & 0xFF000000) == 0) return len + 3;
casiotone401 0:cd43a974c54c 353 s += 4, len += 4;
casiotone401 0:cd43a974c54c 354 }
casiotone401 0:cd43a974c54c 355 }
casiotone401 0:cd43a974c54c 356
casiotone401 0:cd43a974c54c 357 // set touchOSC Matrix Address
casiotone401 1:981b62bb5c87 358 extern inline char * SetMatrixAddress(int row, int column, int mode)
casiotone401 0:cd43a974c54c 359 {
casiotone401 0:cd43a974c54c 360 static char address[32];
casiotone401 0:cd43a974c54c 361
casiotone401 1:981b62bb5c87 362 switch (mode)
casiotone401 0:cd43a974c54c 363 {
casiotone401 1:981b62bb5c87 364 case SHIFTSEQ:
casiotone401 1:981b62bb5c87 365
casiotone401 1:981b62bb5c87 366 sprintf(address, "%s%d/1", STEP_INDICATOR_ADDRESS, column + 1);
casiotone401 1:981b62bb5c87 367 break;
casiotone401 1:981b62bb5c87 368
casiotone401 1:981b62bb5c87 369 case M185SEQ:
casiotone401 1:981b62bb5c87 370
casiotone401 1:981b62bb5c87 371 sprintf(address, "%s%d/1", STEP185_INDICATOR_ADDRESS, column + 1);
casiotone401 1:981b62bb5c87 372 break;
casiotone401 0:cd43a974c54c 373
casiotone401 1:981b62bb5c87 374 case BEATSSEQ:
casiotone401 1:981b62bb5c87 375
casiotone401 1:981b62bb5c87 376 sprintf(address, "%s%d/1", BEATS_INDICATOR_ADDRESS, column + 1);
casiotone401 1:981b62bb5c87 377 break;
casiotone401 1:981b62bb5c87 378
casiotone401 1:981b62bb5c87 379 case EUCLID:
casiotone401 1:981b62bb5c87 380
casiotone401 1:981b62bb5c87 381 sprintf(address, "%s%d/%d", MATRIX_ADDRESS, column + 1, row + 1);
casiotone401 1:981b62bb5c87 382 break;
casiotone401 0:cd43a974c54c 383 }
casiotone401 0:cd43a974c54c 384
casiotone401 0:cd43a974c54c 385 return address;
casiotone401 0:cd43a974c54c 386
casiotone401 0:cd43a974c54c 387 /*
casiotone401 0:cd43a974c54c 388 static char address[32];
casiotone401 0:cd43a974c54c 389 char col[2];
casiotone401 0:cd43a974c54c 390 char ch[2];
casiotone401 0:cd43a974c54c 391
casiotone401 0:cd43a974c54c 392 if(euclid)
casiotone401 0:cd43a974c54c 393 {
casiotone401 0:cd43a974c54c 394 strcpy(address, MATRIX_ADDRESS);
casiotone401 0:cd43a974c54c 395
casiotone401 0:cd43a974c54c 396 } else {
casiotone401 0:cd43a974c54c 397
casiotone401 0:cd43a974c54c 398 strcpy(address, STEP_INDICATOR_ADDRESS);
casiotone401 0:cd43a974c54c 399 }
casiotone401 0:cd43a974c54c 400
casiotone401 0:cd43a974c54c 401 sprintf(col, "%d", column + 1);
casiotone401 0:cd43a974c54c 402 strcat(address, col);
casiotone401 0:cd43a974c54c 403
casiotone401 0:cd43a974c54c 404 if(euclid)
casiotone401 0:cd43a974c54c 405 {
casiotone401 0:cd43a974c54c 406 strcat(address, "/");
casiotone401 0:cd43a974c54c 407
casiotone401 0:cd43a974c54c 408 sprintf(ch, "%d", row + 1);
casiotone401 0:cd43a974c54c 409 strcat(address, ch);
casiotone401 0:cd43a974c54c 410
casiotone401 0:cd43a974c54c 411 } else {
casiotone401 0:cd43a974c54c 412
casiotone401 0:cd43a974c54c 413 strcat(address, "/1");
casiotone401 0:cd43a974c54c 414 }
casiotone401 0:cd43a974c54c 415
casiotone401 0:cd43a974c54c 416 return address;
casiotone401 0:cd43a974c54c 417 */
casiotone401 0:cd43a974c54c 418 }
casiotone401 0:cd43a974c54c 419
casiotone401 0:cd43a974c54c 420 // SPI Transfer
casiotone401 0:cd43a974c54c 421 // DAC8568 data word length 32bit (8bit shift out)
casiotone401 1:981b62bb5c87 422 extern void UpdateCV(unsigned int control, unsigned int ch, const unsigned int *data);
casiotone401 0:cd43a974c54c 423
casiotone401 0:cd43a974c54c 424 // Update CV Meter(Text LCD bar meter)
casiotone401 1:981b62bb5c87 425 extern void UpdateCVMeter(unsigned int ch, const unsigned int *level);
casiotone401 0:cd43a974c54c 426
casiotone401 0:cd43a974c54c 427 // Check subMode1(gArdSW[0])
casiotone401 0:cd43a974c54c 428 extern int CheckSubMode1(void);
casiotone401 0:cd43a974c54c 429
casiotone401 0:cd43a974c54c 430 // Check subMode2(gArdSW[1])
casiotone401 0:cd43a974c54c 431 extern int CheckSubMode2(void);
casiotone401 0:cd43a974c54c 432
casiotone401 0:cd43a974c54c 433 // Update subMode Text LCD
casiotone401 1:981b62bb5c87 434 extern void UpdateSubModeLCD(const char * subModeName);
casiotone401 0:cd43a974c54c 435
casiotone401 0:cd43a974c54c 436 #endif