BSP library for DISCO-STM32F746NG board. Added support for on-board QSPI Flash memory MICRO N25Q128A. Ported from library BSP_DISCO_L476VG.
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Revision 3:99a7fc4794c7, committed 2015-11-15
- Comitter:
- capsavon
- Date:
- Sun Nov 15 15:30:42 2015 +0000
- Parent:
- 2:39c2fb5cbd3b
- Commit message:
- Cleaned useless commentaries (initial library values).; Tested with lower prescaler values -> doesn't work, keeping 3.
Changed in this revision
stm32746g_discovery_qspi.c | Show annotated file Show diff for this revision Revisions of this file |
stm32746g_discovery_qspi.h | Show annotated file Show diff for this revision Revisions of this file |
diff -r 39c2fb5cbd3b -r 99a7fc4794c7 stm32746g_discovery_qspi.c --- a/stm32746g_discovery_qspi.c Sun Nov 15 14:28:09 2015 +0000 +++ b/stm32746g_discovery_qspi.c Sun Nov 15 15:30:42 2015 +0000 @@ -1,7 +1,7 @@ /** ****************************************************************************** * @file stm32f746g_discovery_qspi.c - * @author MCD Application Team + * @author Florian SAVARD * @version V1.0.0 * @date 15-november-2015 * @brief This file includes a standard driver for the N25Q128A QSPI @@ -131,8 +131,7 @@ QSPI_MspInit(); /* QSPI initialization */ - //QSPIHandle.Init.ClockPrescaler = 0; /* Clock = Fahb = 80 MHz | Works with DISCO-STM32L476VG */ - QSPIHandle.Init.ClockPrescaler = 3; /* Clock = Fahb = ? MHz | Works with DISCO-STM32F746NG */ + QSPIHandle.Init.ClockPrescaler = 3; /* Clock = Fahb = ? MHz */ QSPIHandle.Init.FifoThreshold = 4; QSPIHandle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE; QSPIHandle.Init.FlashSize = POSITION_VAL(N25Q128A_FLASH_SIZE) - 1; @@ -658,37 +657,29 @@ __HAL_RCC_GPIOE_CLK_ENABLE(); /* QSPI CS GPIO pin configuration */ - /* DISCO-STM32L476VG : CS = PE11 */ /* DISCO-STM32F746NG : CS = PB6 */ - // GPIO_InitStruct.Pin = GPIO_PIN_11; // DISCO-STM32L476VG - GPIO_InitStruct.Pin = GPIO_PIN_6; //DISCO-STM32F746NG + GPIO_InitStruct.Pin = GPIO_PIN_6; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; // DISCO-STM32L476VG & DISCO-STM32F746NG - // HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); // DISCO-STM32L476VG - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); // DISCO-STM32F746NG + GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); /* QSPI CLK, D0, D1, D2 and D3 GPIO pins configuration */ - /* DISCO-STM32L476VG : CLK = PE10 | D0 = PE12 | D1 = PE13 | D2 = PE14 | D3 = PE15 */ /* DISCO-STM32F746NG : CLK = PB2 | D0 = PD11 | D1 = PD12 | D2 = PE2 | D3 = PD13 */ - // GPIO_InitStruct.Pin = (GPIO_PIN_10 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15); // DISCO-STM32L476VG GPIO_InitStruct.Pin = (GPIO_PIN_2); // CLK - //GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; // DISCO-STM32L476VG - GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; // DISCO-STM32L746NG + GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13); // D0, D1, D3 - //GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; // DISCO-STM32L476VG - GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; // DISCO-STM32L746NG + GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); GPIO_InitStruct.Pin = (GPIO_PIN_2); // D2 - //GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; // DISCO-STM32L476VG - GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; // DISCO-STM32L746NG + GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); } @@ -704,29 +695,23 @@ /* QSPI CLK, CS, PE10 - PE15 GPIO pins de-configuration */ __HAL_RCC_GPIOE_CLK_ENABLE(); - // HAL_GPIO_DeInit(GPIOE, (GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15)); // DISCO-STM32L476VG HAL_GPIO_DeInit(GPIOD, (GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13)); // D0, D1, D3 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2); // D2 /* Chip select pin de-configuration */ /* Set GPIOE pin 11 in pull up mode (optimum default setting) */ GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - // GPIO_InitStruct.Pin = GPIO_PIN_11; // DISCO-STM32L476VG GPIO_InitStruct.Pin = GPIO_PIN_6; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_LOW; - // HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); // DISCO-STM32L476VG HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); /* CLK pin de-configuration */ /* Set GPIOE pin 10 in no pull, low state (optimum default setting) */ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP ; GPIO_InitStruct.Pull = GPIO_NOPULL; - // GPIO_InitStruct.Pin = (GPIO_PIN_10); // DISCO-STM32L476VG GPIO_InitStruct.Pin = (GPIO_PIN_2); - // HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); // DISCO-STM32L476VG HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - // HAL_GPIO_WritePin(GPIOE, GPIO_PIN_10, GPIO_PIN_RESET); // DISCO-STM32L476VG HAL_GPIO_WritePin(GPIOB, GPIO_PIN_2, GPIO_PIN_RESET); /* Reset the QuadSPI memory interface */
diff -r 39c2fb5cbd3b -r 99a7fc4794c7 stm32746g_discovery_qspi.h --- a/stm32746g_discovery_qspi.h Sun Nov 15 14:28:09 2015 +0000 +++ b/stm32746g_discovery_qspi.h Sun Nov 15 15:30:42 2015 +0000 @@ -1,7 +1,7 @@ /** ****************************************************************************** * @file stm32f746g_discovery_qspi.h - * @author MCD Application Team + * @author Florian SAVARD * @version V1.0.0 * @date 15-november-2015 * @brief This file contains the common defines and functions prototypes for @@ -131,5 +131,4 @@ #endif /* __STM32F746G_DISCOVERY_QSPI_H */ -/* Modified by Florian SAVARD - 2015 11 15 */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/