Bayley Wang
/
qonly_controller
derp
main.cpp@1:7b61790f6be9, 2016-03-09 (annotated)
- Committer:
- bwang
- Date:
- Wed Mar 09 17:21:01 2016 +0000
- Revision:
- 1:7b61790f6be9
- Parent:
- 0:bac9c3a3a6ca
- Child:
- 2:eabe8feaaabb
center aligned PWM + sync current sampling working
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bwang | 0:bac9c3a3a6ca | 1 | #include "mbed.h" |
bwang | 0:bac9c3a3a6ca | 2 | #include "math.h" |
bwang | 0:bac9c3a3a6ca | 3 | #include "PositionSensor.h" |
bwang | 0:bac9c3a3a6ca | 4 | #include "FastPWM.h" |
bwang | 0:bac9c3a3a6ca | 5 | #include "Transforms.h" |
bwang | 0:bac9c3a3a6ca | 6 | #include "config.h" |
bwang | 0:bac9c3a3a6ca | 7 | |
bwang | 1:7b61790f6be9 | 8 | FastPWM *a; |
bwang | 1:7b61790f6be9 | 9 | FastPWM *b; |
bwang | 1:7b61790f6be9 | 10 | FastPWM *c; |
bwang | 0:bac9c3a3a6ca | 11 | DigitalOut en(EN); |
bwang | 1:7b61790f6be9 | 12 | DigitalOut toggle(PC_10); |
bwang | 0:bac9c3a3a6ca | 13 | |
bwang | 0:bac9c3a3a6ca | 14 | AnalogIn Ia(IA); |
bwang | 0:bac9c3a3a6ca | 15 | AnalogIn Ib(IB); |
bwang | 0:bac9c3a3a6ca | 16 | |
bwang | 0:bac9c3a3a6ca | 17 | PositionSensorEncoder pos(CPR, 0); |
bwang | 0:bac9c3a3a6ca | 18 | |
bwang | 0:bac9c3a3a6ca | 19 | Serial pc(USBTX, USBRX); |
bwang | 0:bac9c3a3a6ca | 20 | |
bwang | 1:7b61790f6be9 | 21 | int state = 0; |
bwang | 1:7b61790f6be9 | 22 | int adval1, adval2; |
bwang | 1:7b61790f6be9 | 23 | float ia, ib; |
bwang | 1:7b61790f6be9 | 24 | float ia_supp_offset = 0.0f, ib_supp_offset = 0.0f; //current sensor offset due to bias resistor inaccuracies, etc (mV) |
bwang | 1:7b61790f6be9 | 25 | |
bwang | 1:7b61790f6be9 | 26 | extern "C" void TIM1_UP_TIM10_IRQHandler(void) { |
bwang | 1:7b61790f6be9 | 27 | if (TIM1->SR & TIM_SR_UIF ) { |
bwang | 1:7b61790f6be9 | 28 | adval1 = ADC1->DR; |
bwang | 1:7b61790f6be9 | 29 | adval2 = ADC2->DR; |
bwang | 1:7b61790f6be9 | 30 | ADC1->CR2 |= 0x40000000; |
bwang | 1:7b61790f6be9 | 31 | } |
bwang | 1:7b61790f6be9 | 32 | TIM1->SR = 0x00; |
bwang | 1:7b61790f6be9 | 33 | toggle = state; |
bwang | 1:7b61790f6be9 | 34 | state = !state; |
bwang | 1:7b61790f6be9 | 35 | } |
bwang | 1:7b61790f6be9 | 36 | |
bwang | 1:7b61790f6be9 | 37 | void zero_current(){ |
bwang | 1:7b61790f6be9 | 38 | for (int i = 0; i < 1000; i++){ |
bwang | 1:7b61790f6be9 | 39 | ia_supp_offset += (float) (ADC1->DR); |
bwang | 1:7b61790f6be9 | 40 | ib_supp_offset += (float) (ADC2->DR); |
bwang | 1:7b61790f6be9 | 41 | ADC1->CR2 |= 0x40000000; |
bwang | 1:7b61790f6be9 | 42 | wait_us(100); |
bwang | 1:7b61790f6be9 | 43 | } |
bwang | 1:7b61790f6be9 | 44 | ia_supp_offset /= 1000.0f; |
bwang | 1:7b61790f6be9 | 45 | ib_supp_offset /= 1000.0f; |
bwang | 1:7b61790f6be9 | 46 | ia_supp_offset = ia_supp_offset / 4096.0f * AVDD - I_OFFSET; |
bwang | 1:7b61790f6be9 | 47 | ib_supp_offset = ib_supp_offset / 4096.0f * AVDD - I_OFFSET; |
bwang | 1:7b61790f6be9 | 48 | } |
bwang | 0:bac9c3a3a6ca | 49 | |
bwang | 0:bac9c3a3a6ca | 50 | void config_globals() { |
bwang | 0:bac9c3a3a6ca | 51 | pc.baud(115200); |
bwang | 0:bac9c3a3a6ca | 52 | |
bwang | 1:7b61790f6be9 | 53 | //Enable clocks for GPIOs |
bwang | 1:7b61790f6be9 | 54 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; |
bwang | 1:7b61790f6be9 | 55 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; |
bwang | 1:7b61790f6be9 | 56 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; |
bwang | 1:7b61790f6be9 | 57 | |
bwang | 1:7b61790f6be9 | 58 | RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock |
bwang | 1:7b61790f6be9 | 59 | |
bwang | 1:7b61790f6be9 | 60 | a = new FastPWM(PWMA); |
bwang | 1:7b61790f6be9 | 61 | b = new FastPWM(PWMB); |
bwang | 1:7b61790f6be9 | 62 | c = new FastPWM(PWMC); |
bwang | 1:7b61790f6be9 | 63 | |
bwang | 1:7b61790f6be9 | 64 | NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ |
bwang | 1:7b61790f6be9 | 65 | |
bwang | 1:7b61790f6be9 | 66 | TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt |
bwang | 1:7b61790f6be9 | 67 | TIM1->CR1 = 0x40; //CMS = 10, interrupt only when counting up |
bwang | 1:7b61790f6be9 | 68 | TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on, |
bwang | 1:7b61790f6be9 | 69 | TIM1->RCR |= 0x01; //update event once per up/down count of tim1 |
bwang | 1:7b61790f6be9 | 70 | TIM1->EGR |= TIM_EGR_UG; |
bwang | 1:7b61790f6be9 | 71 | |
bwang | 1:7b61790f6be9 | 72 | TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock |
bwang | 1:7b61790f6be9 | 73 | TIM1->ARR = 0x4650; //5 Khz |
bwang | 1:7b61790f6be9 | 74 | TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on. |
bwang | 1:7b61790f6be9 | 75 | TIM1->CR1 |= TIM_CR1_CEN; |
bwang | 1:7b61790f6be9 | 76 | |
bwang | 1:7b61790f6be9 | 77 | //ADC Setup |
bwang | 1:7b61790f6be9 | 78 | RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 |
bwang | 1:7b61790f6be9 | 79 | RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 |
bwang | 1:7b61790f6be9 | 80 | |
bwang | 1:7b61790f6be9 | 81 | ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels |
bwang | 1:7b61790f6be9 | 82 | |
bwang | 1:7b61790f6be9 | 83 | ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on |
bwang | 1:7b61790f6be9 | 84 | ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0 |
bwang | 0:bac9c3a3a6ca | 85 | |
bwang | 1:7b61790f6be9 | 86 | ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON |
bwang | 1:7b61790f6be9 | 87 | ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1 |
bwang | 1:7b61790f6be9 | 88 | |
bwang | 1:7b61790f6be9 | 89 | GPIOA->MODER |= (1 << 8); |
bwang | 1:7b61790f6be9 | 90 | GPIOA->MODER |= (1 << 9); |
bwang | 1:7b61790f6be9 | 91 | |
bwang | 1:7b61790f6be9 | 92 | GPIOA->MODER |= (1 << 2); |
bwang | 1:7b61790f6be9 | 93 | GPIOA->MODER |= (1 << 3); |
bwang | 1:7b61790f6be9 | 94 | |
bwang | 1:7b61790f6be9 | 95 | GPIOA->MODER |= (1 << 0); |
bwang | 1:7b61790f6be9 | 96 | GPIOA->MODER |= (1 << 1); |
bwang | 1:7b61790f6be9 | 97 | |
bwang | 1:7b61790f6be9 | 98 | GPIOB->MODER |= (1 << 0); |
bwang | 1:7b61790f6be9 | 99 | GPIOB->MODER |= (1 << 1); |
bwang | 1:7b61790f6be9 | 100 | |
bwang | 1:7b61790f6be9 | 101 | GPIOC->MODER |= (1 << 2); |
bwang | 1:7b61790f6be9 | 102 | GPIOC->MODER |= (1 << 3); |
bwang | 1:7b61790f6be9 | 103 | |
bwang | 1:7b61790f6be9 | 104 | //DAC setup |
bwang | 1:7b61790f6be9 | 105 | RCC->APB1ENR |= 0x20000000; |
bwang | 1:7b61790f6be9 | 106 | DAC->CR |= DAC_CR_EN2; |
bwang | 1:7b61790f6be9 | 107 | |
bwang | 1:7b61790f6be9 | 108 | GPIOA->MODER |= (1 << 10); |
bwang | 1:7b61790f6be9 | 109 | GPIOA->MODER |= (1 << 11); |
bwang | 1:7b61790f6be9 | 110 | |
bwang | 1:7b61790f6be9 | 111 | //Zero duty cycles |
bwang | 1:7b61790f6be9 | 112 | set_dtc(a, 0.0f); |
bwang | 1:7b61790f6be9 | 113 | set_dtc(b, 0.0f); |
bwang | 1:7b61790f6be9 | 114 | set_dtc(c, 0.0f); |
bwang | 1:7b61790f6be9 | 115 | |
bwang | 1:7b61790f6be9 | 116 | wait_ms(250); |
bwang | 1:7b61790f6be9 | 117 | zero_current(); |
bwang | 0:bac9c3a3a6ca | 118 | en = 1; |
bwang | 0:bac9c3a3a6ca | 119 | } |
bwang | 0:bac9c3a3a6ca | 120 | |
bwang | 0:bac9c3a3a6ca | 121 | void startup_msg() { |
bwang | 0:bac9c3a3a6ca | 122 | pc.printf("%s\n\r\n\r", "FOC'ed in the Bot Rev A."); |
bwang | 0:bac9c3a3a6ca | 123 | pc.printf("%s\n\r", "====Config Data===="); |
bwang | 0:bac9c3a3a6ca | 124 | pc.printf("Current Sensor Offset: %f mV\n\r", I_OFFSET); |
bwang | 0:bac9c3a3a6ca | 125 | pc.printf("Current Sensor Scale: %f mv/A\n\r", I_SCALE); |
bwang | 0:bac9c3a3a6ca | 126 | pc.printf("Bus Voltage: %f V\n\r", BUS_VOLTAGE); |
bwang | 0:bac9c3a3a6ca | 127 | pc.printf("Loop KP: %f\n\r", KP); |
bwang | 0:bac9c3a3a6ca | 128 | pc.printf("Loop KI: %f\n\r", KI); |
bwang | 1:7b61790f6be9 | 129 | pc.printf("Ia offset: %f mV\n\r", ia_supp_offset); |
bwang | 1:7b61790f6be9 | 130 | pc.printf("Ib offset: %f mV\n\r", ib_supp_offset); |
bwang | 0:bac9c3a3a6ca | 131 | pc.printf("\n\r"); |
bwang | 0:bac9c3a3a6ca | 132 | } |
bwang | 0:bac9c3a3a6ca | 133 | |
bwang | 0:bac9c3a3a6ca | 134 | void main_loop() { |
bwang | 0:bac9c3a3a6ca | 135 | float p = pos.GetElecPosition() - POS_OFFSET + PI / 2; |
bwang | 0:bac9c3a3a6ca | 136 | if (p < 0) p += 2 * PI; |
bwang | 0:bac9c3a3a6ca | 137 | |
bwang | 0:bac9c3a3a6ca | 138 | float pos_dac = 0.85f * p / (2 * PI) + 0.05f; |
bwang | 1:7b61790f6be9 | 139 | DAC->DHR12R2 = (unsigned int) (pos_dac * 4096); |
bwang | 0:bac9c3a3a6ca | 140 | |
bwang | 1:7b61790f6be9 | 141 | ia = ((float) adval1 / 4096.0f * AVDD - I_OFFSET - ia_supp_offset) / I_SCALE; |
bwang | 1:7b61790f6be9 | 142 | ib = ((float) adval2 / 4096.0f * AVDD - I_OFFSET - ib_supp_offset) / I_SCALE; |
bwang | 0:bac9c3a3a6ca | 143 | |
bwang | 0:bac9c3a3a6ca | 144 | set_dtc(a, 0.5f + 0.5f * cosf(p)); |
bwang | 0:bac9c3a3a6ca | 145 | set_dtc(b, 0.5f + 0.5f * cosf(p + 2 * PI / 3)); |
bwang | 0:bac9c3a3a6ca | 146 | set_dtc(c, 0.5f + 0.5f * cosf(p - 2 * PI / 3)); |
bwang | 0:bac9c3a3a6ca | 147 | } |
bwang | 0:bac9c3a3a6ca | 148 | |
bwang | 0:bac9c3a3a6ca | 149 | int main() { |
bwang | 0:bac9c3a3a6ca | 150 | config_globals(); |
bwang | 0:bac9c3a3a6ca | 151 | startup_msg(); |
bwang | 0:bac9c3a3a6ca | 152 | |
bwang | 0:bac9c3a3a6ca | 153 | Ticker loop; |
bwang | 0:bac9c3a3a6ca | 154 | loop.attach_us(main_loop, 200); |
bwang | 0:bac9c3a3a6ca | 155 | |
bwang | 0:bac9c3a3a6ca | 156 | for (;;) { |
bwang | 0:bac9c3a3a6ca | 157 | } |
bwang | 0:bac9c3a3a6ca | 158 | } |