Bayley Wang
/
foc-ed_in_the_bot_compact
robot
main.cpp@8:70122bad5f90, 2016-04-23 (annotated)
- Committer:
- bwang
- Date:
- Sat Apr 23 21:29:32 2016 +0000
- Revision:
- 8:70122bad5f90
- Parent:
- 7:caebf421f288
foc'ed in the bot
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bwang | 0:bac9c3a3a6ca | 1 | #include "mbed.h" |
bwang | 0:bac9c3a3a6ca | 2 | #include "math.h" |
bwang | 0:bac9c3a3a6ca | 3 | #include "PositionSensor.h" |
bwang | 0:bac9c3a3a6ca | 4 | #include "FastPWM.h" |
bwang | 0:bac9c3a3a6ca | 5 | #include "Transforms.h" |
bwang | 0:bac9c3a3a6ca | 6 | #include "config.h" |
bwang | 0:bac9c3a3a6ca | 7 | |
bwang | 1:7b61790f6be9 | 8 | FastPWM *a; |
bwang | 1:7b61790f6be9 | 9 | FastPWM *b; |
bwang | 1:7b61790f6be9 | 10 | FastPWM *c; |
bwang | 0:bac9c3a3a6ca | 11 | DigitalOut en(EN); |
bwang | 8:70122bad5f90 | 12 | DigitalOut toggle(PC_10); |
bwang | 0:bac9c3a3a6ca | 13 | |
bwang | 0:bac9c3a3a6ca | 14 | PositionSensorEncoder pos(CPR, 0); |
bwang | 0:bac9c3a3a6ca | 15 | |
bwang | 1:7b61790f6be9 | 16 | int state = 0; |
bwang | 1:7b61790f6be9 | 17 | int adval1, adval2; |
bwang | 8:70122bad5f90 | 18 | float ia, ib, ic, alpha, beta, d, q, vd, vq, p; |
bwang | 2:eabe8feaaabb | 19 | |
bwang | 1:7b61790f6be9 | 20 | float ia_supp_offset = 0.0f, ib_supp_offset = 0.0f; //current sensor offset due to bias resistor inaccuracies, etc (mV) |
bwang | 1:7b61790f6be9 | 21 | |
bwang | 8:70122bad5f90 | 22 | double d_integral = 0.0f, q_integral = 0.0f; |
bwang | 8:70122bad5f90 | 23 | double last_d = 0.0f, last_q = 0.0f; |
bwang | 8:70122bad5f90 | 24 | double d_ref = 0.0f, q_ref = -5.0f; |
bwang | 2:eabe8feaaabb | 25 | |
bwang | 4:a6669248ce4d | 26 | void commutate(); |
bwang | 3:9b20da3f0055 | 27 | void zero_current(); |
bwang | 3:9b20da3f0055 | 28 | void config_globals(); |
bwang | 2:eabe8feaaabb | 29 | |
bwang | 1:7b61790f6be9 | 30 | extern "C" void TIM1_UP_TIM10_IRQHandler(void) { |
bwang | 1:7b61790f6be9 | 31 | if (TIM1->SR & TIM_SR_UIF ) { |
bwang | 8:70122bad5f90 | 32 | toggle = 1; |
bwang | 4:a6669248ce4d | 33 | ADC1->CR2 |= 0x40000000; |
bwang | 4:a6669248ce4d | 34 | volatile int delay; |
bwang | 4:a6669248ce4d | 35 | for (delay = 0; delay < 35; delay++); |
bwang | 8:70122bad5f90 | 36 | toggle = 0; |
bwang | 1:7b61790f6be9 | 37 | adval1 = ADC1->DR; |
bwang | 1:7b61790f6be9 | 38 | adval2 = ADC2->DR; |
bwang | 4:a6669248ce4d | 39 | commutate(); |
bwang | 1:7b61790f6be9 | 40 | } |
bwang | 1:7b61790f6be9 | 41 | TIM1->SR = 0x00; |
bwang | 1:7b61790f6be9 | 42 | } |
bwang | 1:7b61790f6be9 | 43 | |
bwang | 1:7b61790f6be9 | 44 | void zero_current(){ |
bwang | 1:7b61790f6be9 | 45 | for (int i = 0; i < 1000; i++){ |
bwang | 1:7b61790f6be9 | 46 | ia_supp_offset += (float) (ADC1->DR); |
bwang | 1:7b61790f6be9 | 47 | ib_supp_offset += (float) (ADC2->DR); |
bwang | 1:7b61790f6be9 | 48 | ADC1->CR2 |= 0x40000000; |
bwang | 1:7b61790f6be9 | 49 | wait_us(100); |
bwang | 1:7b61790f6be9 | 50 | } |
bwang | 1:7b61790f6be9 | 51 | ia_supp_offset /= 1000.0f; |
bwang | 1:7b61790f6be9 | 52 | ib_supp_offset /= 1000.0f; |
bwang | 1:7b61790f6be9 | 53 | ia_supp_offset = ia_supp_offset / 4096.0f * AVDD - I_OFFSET; |
bwang | 1:7b61790f6be9 | 54 | ib_supp_offset = ib_supp_offset / 4096.0f * AVDD - I_OFFSET; |
bwang | 1:7b61790f6be9 | 55 | } |
bwang | 0:bac9c3a3a6ca | 56 | |
bwang | 8:70122bad5f90 | 57 | void config_globals() { |
bwang | 1:7b61790f6be9 | 58 | //Enable clocks for GPIOs |
bwang | 1:7b61790f6be9 | 59 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; |
bwang | 1:7b61790f6be9 | 60 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; |
bwang | 1:7b61790f6be9 | 61 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; |
bwang | 1:7b61790f6be9 | 62 | |
bwang | 1:7b61790f6be9 | 63 | RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock |
bwang | 1:7b61790f6be9 | 64 | |
bwang | 1:7b61790f6be9 | 65 | a = new FastPWM(PWMA); |
bwang | 1:7b61790f6be9 | 66 | b = new FastPWM(PWMB); |
bwang | 1:7b61790f6be9 | 67 | c = new FastPWM(PWMC); |
bwang | 1:7b61790f6be9 | 68 | |
bwang | 1:7b61790f6be9 | 69 | NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ |
bwang | 1:7b61790f6be9 | 70 | |
bwang | 1:7b61790f6be9 | 71 | TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt |
bwang | 8:70122bad5f90 | 72 | //TIM1->CR1 = 0x40; //CMS = 10, interrupt only when counting up |
bwang | 1:7b61790f6be9 | 73 | TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on, |
bwang | 1:7b61790f6be9 | 74 | TIM1->RCR |= 0x01; //update event once per up/down count of tim1 |
bwang | 1:7b61790f6be9 | 75 | TIM1->EGR |= TIM_EGR_UG; |
bwang | 1:7b61790f6be9 | 76 | |
bwang | 1:7b61790f6be9 | 77 | TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock |
bwang | 8:70122bad5f90 | 78 | TIM1->ARR = 0x2EE0; |
bwang | 8:70122bad5f90 | 79 | //TIM1->ARR = 0x1770; //15 Khz |
bwang | 1:7b61790f6be9 | 80 | TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on. |
bwang | 1:7b61790f6be9 | 81 | TIM1->CR1 |= TIM_CR1_CEN; |
bwang | 1:7b61790f6be9 | 82 | |
bwang | 1:7b61790f6be9 | 83 | //ADC Setup |
bwang | 1:7b61790f6be9 | 84 | RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 |
bwang | 1:7b61790f6be9 | 85 | RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 |
bwang | 1:7b61790f6be9 | 86 | |
bwang | 1:7b61790f6be9 | 87 | ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels |
bwang | 1:7b61790f6be9 | 88 | |
bwang | 1:7b61790f6be9 | 89 | ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on |
bwang | 1:7b61790f6be9 | 90 | ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0 |
bwang | 0:bac9c3a3a6ca | 91 | |
bwang | 1:7b61790f6be9 | 92 | ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON |
bwang | 1:7b61790f6be9 | 93 | ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1 |
bwang | 1:7b61790f6be9 | 94 | |
bwang | 1:7b61790f6be9 | 95 | GPIOA->MODER |= (1 << 8); |
bwang | 1:7b61790f6be9 | 96 | GPIOA->MODER |= (1 << 9); |
bwang | 1:7b61790f6be9 | 97 | |
bwang | 1:7b61790f6be9 | 98 | GPIOA->MODER |= (1 << 2); |
bwang | 1:7b61790f6be9 | 99 | GPIOA->MODER |= (1 << 3); |
bwang | 1:7b61790f6be9 | 100 | |
bwang | 1:7b61790f6be9 | 101 | GPIOA->MODER |= (1 << 0); |
bwang | 1:7b61790f6be9 | 102 | GPIOA->MODER |= (1 << 1); |
bwang | 1:7b61790f6be9 | 103 | |
bwang | 1:7b61790f6be9 | 104 | GPIOB->MODER |= (1 << 0); |
bwang | 1:7b61790f6be9 | 105 | GPIOB->MODER |= (1 << 1); |
bwang | 1:7b61790f6be9 | 106 | |
bwang | 1:7b61790f6be9 | 107 | GPIOC->MODER |= (1 << 2); |
bwang | 1:7b61790f6be9 | 108 | GPIOC->MODER |= (1 << 3); |
bwang | 1:7b61790f6be9 | 109 | |
bwang | 1:7b61790f6be9 | 110 | //DAC setup |
bwang | 1:7b61790f6be9 | 111 | RCC->APB1ENR |= 0x20000000; |
bwang | 1:7b61790f6be9 | 112 | DAC->CR |= DAC_CR_EN2; |
bwang | 1:7b61790f6be9 | 113 | |
bwang | 1:7b61790f6be9 | 114 | GPIOA->MODER |= (1 << 10); |
bwang | 1:7b61790f6be9 | 115 | GPIOA->MODER |= (1 << 11); |
bwang | 1:7b61790f6be9 | 116 | |
bwang | 1:7b61790f6be9 | 117 | //Zero duty cycles |
bwang | 1:7b61790f6be9 | 118 | set_dtc(a, 0.0f); |
bwang | 1:7b61790f6be9 | 119 | set_dtc(b, 0.0f); |
bwang | 1:7b61790f6be9 | 120 | set_dtc(c, 0.0f); |
bwang | 1:7b61790f6be9 | 121 | |
bwang | 1:7b61790f6be9 | 122 | wait_ms(250); |
bwang | 1:7b61790f6be9 | 123 | zero_current(); |
bwang | 0:bac9c3a3a6ca | 124 | en = 1; |
bwang | 8:70122bad5f90 | 125 | } |
bwang | 0:bac9c3a3a6ca | 126 | |
bwang | 4:a6669248ce4d | 127 | void commutate() { |
bwang | 2:eabe8feaaabb | 128 | p = pos.GetElecPosition() - POS_OFFSET; |
bwang | 0:bac9c3a3a6ca | 129 | if (p < 0) p += 2 * PI; |
bwang | 0:bac9c3a3a6ca | 130 | |
bwang | 2:eabe8feaaabb | 131 | float sin_p = sinf(p); |
bwang | 2:eabe8feaaabb | 132 | float cos_p = cosf(p); |
bwang | 2:eabe8feaaabb | 133 | |
bwang | 8:70122bad5f90 | 134 | //float pos_dac = 0.85f * p / (2 * PI) + 0.05f; |
bwang | 4:a6669248ce4d | 135 | //DAC->DHR12R2 = (unsigned int) (pos_dac * 4096); |
bwang | 0:bac9c3a3a6ca | 136 | |
bwang | 1:7b61790f6be9 | 137 | ia = ((float) adval1 / 4096.0f * AVDD - I_OFFSET - ia_supp_offset) / I_SCALE; |
bwang | 1:7b61790f6be9 | 138 | ib = ((float) adval2 / 4096.0f * AVDD - I_OFFSET - ib_supp_offset) / I_SCALE; |
bwang | 2:eabe8feaaabb | 139 | ic = -ia - ib; |
bwang | 0:bac9c3a3a6ca | 140 | |
bwang | 3:9b20da3f0055 | 141 | float u = ib; |
bwang | 3:9b20da3f0055 | 142 | float v = ic; |
bwang | 2:eabe8feaaabb | 143 | |
bwang | 2:eabe8feaaabb | 144 | alpha = u; |
bwang | 2:eabe8feaaabb | 145 | beta = 1 / sqrtf(3.0f) * u + 2 / sqrtf(3.0f) * v; |
bwang | 2:eabe8feaaabb | 146 | |
bwang | 2:eabe8feaaabb | 147 | d = alpha * cos_p - beta * sin_p; |
bwang | 2:eabe8feaaabb | 148 | q = -alpha * sin_p - beta * cos_p; |
bwang | 2:eabe8feaaabb | 149 | |
bwang | 3:9b20da3f0055 | 150 | float d_err = d_ref - d; |
bwang | 3:9b20da3f0055 | 151 | float q_err = q_ref - q; |
bwang | 2:eabe8feaaabb | 152 | |
bwang | 2:eabe8feaaabb | 153 | d_integral += d_err * KI; |
bwang | 2:eabe8feaaabb | 154 | q_integral += q_err * KI; |
bwang | 2:eabe8feaaabb | 155 | |
bwang | 2:eabe8feaaabb | 156 | if (q_integral > INTEGRAL_MAX) q_integral = INTEGRAL_MAX; |
bwang | 2:eabe8feaaabb | 157 | if (d_integral > INTEGRAL_MAX) d_integral = INTEGRAL_MAX; |
bwang | 2:eabe8feaaabb | 158 | if (q_integral < -INTEGRAL_MAX) q_integral = -INTEGRAL_MAX; |
bwang | 2:eabe8feaaabb | 159 | if (d_integral < -INTEGRAL_MAX) d_integral = -INTEGRAL_MAX; |
bwang | 2:eabe8feaaabb | 160 | |
bwang | 2:eabe8feaaabb | 161 | vd = KP * d_err + d_integral; |
bwang | 2:eabe8feaaabb | 162 | vq = KP * q_err + q_integral; |
bwang | 2:eabe8feaaabb | 163 | |
bwang | 2:eabe8feaaabb | 164 | if (vd < -1.0f) vd = -1.0f; |
bwang | 2:eabe8feaaabb | 165 | if (vd > 1.0f) vd = 1.0f; |
bwang | 2:eabe8feaaabb | 166 | if (vq < -1.0f) vq = -1.0f; |
bwang | 2:eabe8feaaabb | 167 | if (vq > 1.0f) vq = 1.0f; |
bwang | 2:eabe8feaaabb | 168 | |
bwang | 8:70122bad5f90 | 169 | vd = 0.0f; |
bwang | 8:70122bad5f90 | 170 | vq = 1.0f; |
bwang | 2:eabe8feaaabb | 171 | |
bwang | 8:70122bad5f90 | 172 | DAC->DHR12R2 = (unsigned int) (q * 20 + 2048); |
bwang | 8:70122bad5f90 | 173 | //DAC->DHR12R2 = (unsigned int) (vq * 2000 + 2048); |
bwang | 4:a6669248ce4d | 174 | |
bwang | 2:eabe8feaaabb | 175 | float valpha = vd * cos_p - vq * sin_p; |
bwang | 2:eabe8feaaabb | 176 | float vbeta = vd * sin_p + vq * cos_p; |
bwang | 2:eabe8feaaabb | 177 | |
bwang | 2:eabe8feaaabb | 178 | float va = valpha; |
bwang | 2:eabe8feaaabb | 179 | float vb = -0.5f * valpha - sqrtf(3) / 2.0f * vbeta; |
bwang | 2:eabe8feaaabb | 180 | float vc = -0.5f * valpha + sqrtf(3) / 2.0f * vbeta; |
bwang | 2:eabe8feaaabb | 181 | |
bwang | 2:eabe8feaaabb | 182 | set_dtc(a, 0.5f + 0.5f * va); |
bwang | 2:eabe8feaaabb | 183 | set_dtc(b, 0.5f + 0.5f * vb); |
bwang | 2:eabe8feaaabb | 184 | set_dtc(c, 0.5f + 0.5f * vc); |
bwang | 0:bac9c3a3a6ca | 185 | } |
bwang | 0:bac9c3a3a6ca | 186 | |
bwang | 0:bac9c3a3a6ca | 187 | int main() { |
bwang | 0:bac9c3a3a6ca | 188 | config_globals(); |
bwang | 0:bac9c3a3a6ca | 189 | |
bwang | 0:bac9c3a3a6ca | 190 | for (;;) { |
bwang | 0:bac9c3a3a6ca | 191 | } |
bwang | 0:bac9c3a3a6ca | 192 | } |