Yes

Dependents:   Asservissement_Gyro

Committer:
braichi13
Date:
Sun May 08 14:39:47 2022 +0000
Revision:
0:77205fc699b9
Programme du Gyropode

Who changed what in which revision?

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braichi13 0:77205fc699b9 1 /* mbed Microcontroller Library
braichi13 0:77205fc699b9 2 * Copyright (c) 2016 ARM Limited
braichi13 0:77205fc699b9 3 *
braichi13 0:77205fc699b9 4 * Licensed under the Apache License, Version 2.0 (the "License");
braichi13 0:77205fc699b9 5 * you may not use this file except in compliance with the License.
braichi13 0:77205fc699b9 6 * You may obtain a copy of the License at
braichi13 0:77205fc699b9 7 *
braichi13 0:77205fc699b9 8 * http://www.apache.org/licenses/LICENSE-2.0
braichi13 0:77205fc699b9 9 *
braichi13 0:77205fc699b9 10 * Unless required by applicable law or agreed to in writing, software
braichi13 0:77205fc699b9 11 * distributed under the License is distributed on an "AS IS" BASIS,
braichi13 0:77205fc699b9 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
braichi13 0:77205fc699b9 13 * See the License for the specific language governing permissions and
braichi13 0:77205fc699b9 14 * limitations under the License.
braichi13 0:77205fc699b9 15 */
braichi13 0:77205fc699b9 16
braichi13 0:77205fc699b9 17 #ifndef MBED_MBED_RTX_H
braichi13 0:77205fc699b9 18 #define MBED_MBED_RTX_H
braichi13 0:77205fc699b9 19
braichi13 0:77205fc699b9 20 #if defined(TARGET_STM32F051R8)
braichi13 0:77205fc699b9 21
braichi13 0:77205fc699b9 22 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 23 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 24 #endif
braichi13 0:77205fc699b9 25
braichi13 0:77205fc699b9 26 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 27
braichi13 0:77205fc699b9 28 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 29 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 30 #endif
braichi13 0:77205fc699b9 31 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 32 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 33 #endif
braichi13 0:77205fc699b9 34 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 35 #define OS_CLOCK 48000000
braichi13 0:77205fc699b9 36 #endif
braichi13 0:77205fc699b9 37
braichi13 0:77205fc699b9 38 #elif defined(TARGET_STM32L031K6)
braichi13 0:77205fc699b9 39
braichi13 0:77205fc699b9 40 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 41 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 42 #endif
braichi13 0:77205fc699b9 43
braichi13 0:77205fc699b9 44 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 45
braichi13 0:77205fc699b9 46 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 47 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 48 #endif
braichi13 0:77205fc699b9 49 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 50 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 51 #endif
braichi13 0:77205fc699b9 52 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 53 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 54 #endif
braichi13 0:77205fc699b9 55
braichi13 0:77205fc699b9 56 #elif defined(TARGET_STM32F070RB)
braichi13 0:77205fc699b9 57
braichi13 0:77205fc699b9 58 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 59 #define INITIAL_SP (0x20004000UL)
braichi13 0:77205fc699b9 60 #endif
braichi13 0:77205fc699b9 61
braichi13 0:77205fc699b9 62 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 63
braichi13 0:77205fc699b9 64 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 65 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 66 #endif
braichi13 0:77205fc699b9 67 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 68 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 69 #endif
braichi13 0:77205fc699b9 70 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 71 #define OS_CLOCK 48000000
braichi13 0:77205fc699b9 72 #endif
braichi13 0:77205fc699b9 73
braichi13 0:77205fc699b9 74 #elif defined(TARGET_STM32F072RB)
braichi13 0:77205fc699b9 75
braichi13 0:77205fc699b9 76 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 77 #define INITIAL_SP (0x20004000UL)
braichi13 0:77205fc699b9 78 #endif
braichi13 0:77205fc699b9 79
braichi13 0:77205fc699b9 80 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 81
braichi13 0:77205fc699b9 82 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 83 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 84 #endif
braichi13 0:77205fc699b9 85 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 86 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 87 #endif
braichi13 0:77205fc699b9 88 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 89 #define OS_CLOCK 48000000
braichi13 0:77205fc699b9 90 #endif
braichi13 0:77205fc699b9 91
braichi13 0:77205fc699b9 92 #elif defined(TARGET_STM32F091RC)
braichi13 0:77205fc699b9 93
braichi13 0:77205fc699b9 94 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 95 #define INITIAL_SP (0x20008000UL)
braichi13 0:77205fc699b9 96 #endif
braichi13 0:77205fc699b9 97
braichi13 0:77205fc699b9 98 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 99
braichi13 0:77205fc699b9 100 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 101 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 102 #endif
braichi13 0:77205fc699b9 103 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 104 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 105 #endif
braichi13 0:77205fc699b9 106 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 107 #define OS_CLOCK 48000000
braichi13 0:77205fc699b9 108 #endif
braichi13 0:77205fc699b9 109
braichi13 0:77205fc699b9 110 #elif defined(TARGET_STM32F100RB)
braichi13 0:77205fc699b9 111
braichi13 0:77205fc699b9 112 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 113 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 114 #endif
braichi13 0:77205fc699b9 115
braichi13 0:77205fc699b9 116 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 117
braichi13 0:77205fc699b9 118 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 119 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 120 #endif
braichi13 0:77205fc699b9 121 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 122 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 123 #endif
braichi13 0:77205fc699b9 124 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 125 #define OS_CLOCK 24000000
braichi13 0:77205fc699b9 126 #endif
braichi13 0:77205fc699b9 127
braichi13 0:77205fc699b9 128 #elif defined(TARGET_STM32F103RB)
braichi13 0:77205fc699b9 129
braichi13 0:77205fc699b9 130 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 131 #define INITIAL_SP (0x20005000UL)
braichi13 0:77205fc699b9 132 #endif
braichi13 0:77205fc699b9 133
braichi13 0:77205fc699b9 134 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 135
braichi13 0:77205fc699b9 136 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 137 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 138 #endif
braichi13 0:77205fc699b9 139 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 140 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 141 #endif
braichi13 0:77205fc699b9 142 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 143 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 144 #endif
braichi13 0:77205fc699b9 145
braichi13 0:77205fc699b9 146 #elif defined(TARGET_STM32F207ZG)
braichi13 0:77205fc699b9 147
braichi13 0:77205fc699b9 148 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 149 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 150 #endif
braichi13 0:77205fc699b9 151
braichi13 0:77205fc699b9 152 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 153
braichi13 0:77205fc699b9 154 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 155 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 156 #endif
braichi13 0:77205fc699b9 157 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 158 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 159 #endif
braichi13 0:77205fc699b9 160 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 161 #define OS_CLOCK 120000000
braichi13 0:77205fc699b9 162 #endif
braichi13 0:77205fc699b9 163
braichi13 0:77205fc699b9 164 #elif defined(TARGET_STM32F303VC)
braichi13 0:77205fc699b9 165
braichi13 0:77205fc699b9 166 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 167 #define INITIAL_SP (0x2000A000UL)
braichi13 0:77205fc699b9 168 #endif
braichi13 0:77205fc699b9 169
braichi13 0:77205fc699b9 170 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 171
braichi13 0:77205fc699b9 172 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 173 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 174 #endif
braichi13 0:77205fc699b9 175 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 176 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 177 #endif
braichi13 0:77205fc699b9 178 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 179 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 180 #endif
braichi13 0:77205fc699b9 181
braichi13 0:77205fc699b9 182 #elif defined(TARGET_STM32F334C8)
braichi13 0:77205fc699b9 183
braichi13 0:77205fc699b9 184 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 185 #define INITIAL_SP (0x20003000UL)
braichi13 0:77205fc699b9 186 #endif
braichi13 0:77205fc699b9 187
braichi13 0:77205fc699b9 188 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 189
braichi13 0:77205fc699b9 190 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 191 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 192 #endif
braichi13 0:77205fc699b9 193 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 194 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 195 #endif
braichi13 0:77205fc699b9 196 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 197 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 198 #endif
braichi13 0:77205fc699b9 199
braichi13 0:77205fc699b9 200 #elif defined(TARGET_STM32F302R8)
braichi13 0:77205fc699b9 201
braichi13 0:77205fc699b9 202 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 203 #define INITIAL_SP (0x20004000UL)
braichi13 0:77205fc699b9 204 #endif
braichi13 0:77205fc699b9 205
braichi13 0:77205fc699b9 206 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 207
braichi13 0:77205fc699b9 208 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 209 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 210 #endif
braichi13 0:77205fc699b9 211 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 212 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 213 #endif
braichi13 0:77205fc699b9 214 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 215 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 216 #endif
braichi13 0:77205fc699b9 217
braichi13 0:77205fc699b9 218 #elif defined(TARGET_STM32F303K8)
braichi13 0:77205fc699b9 219
braichi13 0:77205fc699b9 220 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 221 #define INITIAL_SP (0x20003000UL)
braichi13 0:77205fc699b9 222 #endif
braichi13 0:77205fc699b9 223
braichi13 0:77205fc699b9 224 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 225
braichi13 0:77205fc699b9 226 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 227 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 228 #endif
braichi13 0:77205fc699b9 229 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 230 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 231 #endif
braichi13 0:77205fc699b9 232 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 233 #define OS_CLOCK 64000000
braichi13 0:77205fc699b9 234 #endif
braichi13 0:77205fc699b9 235
braichi13 0:77205fc699b9 236 #elif defined(TARGET_STM32F303RE)
braichi13 0:77205fc699b9 237
braichi13 0:77205fc699b9 238 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 239 #define INITIAL_SP (0x20010000UL)
braichi13 0:77205fc699b9 240 #endif
braichi13 0:77205fc699b9 241
braichi13 0:77205fc699b9 242 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 243
braichi13 0:77205fc699b9 244 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 245 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 246 #endif
braichi13 0:77205fc699b9 247 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 248 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 249 #endif
braichi13 0:77205fc699b9 250 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 251 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 252 #endif
braichi13 0:77205fc699b9 253
braichi13 0:77205fc699b9 254 #elif defined(TARGET_STM32F303ZE)
braichi13 0:77205fc699b9 255
braichi13 0:77205fc699b9 256 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 257 #define INITIAL_SP (0x20010000UL)
braichi13 0:77205fc699b9 258 #endif
braichi13 0:77205fc699b9 259
braichi13 0:77205fc699b9 260 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 261
braichi13 0:77205fc699b9 262 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 263 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 264 #endif
braichi13 0:77205fc699b9 265 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 266 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 267 #endif
braichi13 0:77205fc699b9 268 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 269 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 270 #endif
braichi13 0:77205fc699b9 271
braichi13 0:77205fc699b9 272 #elif defined(TARGET_STM32F334R8)
braichi13 0:77205fc699b9 273
braichi13 0:77205fc699b9 274 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 275 #define INITIAL_SP (0x20003000UL)
braichi13 0:77205fc699b9 276 #endif
braichi13 0:77205fc699b9 277
braichi13 0:77205fc699b9 278 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 279
braichi13 0:77205fc699b9 280 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 281 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 282 #endif
braichi13 0:77205fc699b9 283 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 284 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 285 #endif
braichi13 0:77205fc699b9 286 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 287 #define OS_CLOCK 72000000
braichi13 0:77205fc699b9 288 #endif
braichi13 0:77205fc699b9 289
braichi13 0:77205fc699b9 290 #elif defined(TARGET_STM32F446VE)
braichi13 0:77205fc699b9 291
braichi13 0:77205fc699b9 292 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 293 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 294 #endif
braichi13 0:77205fc699b9 295
braichi13 0:77205fc699b9 296 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 297
braichi13 0:77205fc699b9 298 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 299 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 300 #endif
braichi13 0:77205fc699b9 301 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 302 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 303 #endif
braichi13 0:77205fc699b9 304 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 305 #define OS_CLOCK 180000000
braichi13 0:77205fc699b9 306 #endif
braichi13 0:77205fc699b9 307
braichi13 0:77205fc699b9 308 #elif defined(TARGET_STM32F401VC)
braichi13 0:77205fc699b9 309
braichi13 0:77205fc699b9 310 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 311 #define INITIAL_SP (0x20010000UL)
braichi13 0:77205fc699b9 312 #endif
braichi13 0:77205fc699b9 313
braichi13 0:77205fc699b9 314 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 315
braichi13 0:77205fc699b9 316 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 317 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 318 #endif
braichi13 0:77205fc699b9 319 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 320 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 321 #endif
braichi13 0:77205fc699b9 322 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 323 #define OS_CLOCK 84000000
braichi13 0:77205fc699b9 324 #endif
braichi13 0:77205fc699b9 325
braichi13 0:77205fc699b9 326 #elif (defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F439ZI))
braichi13 0:77205fc699b9 327
braichi13 0:77205fc699b9 328 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 329 #define INITIAL_SP (0x20030000UL)
braichi13 0:77205fc699b9 330 #endif
braichi13 0:77205fc699b9 331
braichi13 0:77205fc699b9 332 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 333
braichi13 0:77205fc699b9 334 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 335 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 336 #endif
braichi13 0:77205fc699b9 337 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 338 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 339 #endif
braichi13 0:77205fc699b9 340 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 341 #define OS_CLOCK 168000000
braichi13 0:77205fc699b9 342 #endif
braichi13 0:77205fc699b9 343
braichi13 0:77205fc699b9 344 #elif defined(TARGET_UBLOX_EVK_ODIN_W2)
braichi13 0:77205fc699b9 345
braichi13 0:77205fc699b9 346 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 347 #define INITIAL_SP (0x20030000UL)
braichi13 0:77205fc699b9 348 #endif
braichi13 0:77205fc699b9 349
braichi13 0:77205fc699b9 350 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 351
braichi13 0:77205fc699b9 352 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 353 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 354 #endif
braichi13 0:77205fc699b9 355 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 356 #define OS_MAINSTKSIZE 512
braichi13 0:77205fc699b9 357 #endif
braichi13 0:77205fc699b9 358 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 359 #define OS_CLOCK 168000000
braichi13 0:77205fc699b9 360 #endif
braichi13 0:77205fc699b9 361
braichi13 0:77205fc699b9 362 #elif defined(TARGET_UBLOX_C030)
braichi13 0:77205fc699b9 363
braichi13 0:77205fc699b9 364 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 365 #define INITIAL_SP (0x20030000UL)
braichi13 0:77205fc699b9 366 #endif
braichi13 0:77205fc699b9 367
braichi13 0:77205fc699b9 368 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 369
braichi13 0:77205fc699b9 370 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 371 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 372 #endif
braichi13 0:77205fc699b9 373 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 374 #define OS_MAINSTKSIZE 512
braichi13 0:77205fc699b9 375 #endif
braichi13 0:77205fc699b9 376 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 377 #define OS_CLOCK 168000000
braichi13 0:77205fc699b9 378 #endif
braichi13 0:77205fc699b9 379
braichi13 0:77205fc699b9 380 #elif defined(TARGET_STM32F469NI)
braichi13 0:77205fc699b9 381
braichi13 0:77205fc699b9 382 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 383 #define INITIAL_SP (0x20050000UL)
braichi13 0:77205fc699b9 384 #endif
braichi13 0:77205fc699b9 385
braichi13 0:77205fc699b9 386 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 387
braichi13 0:77205fc699b9 388 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 389 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 390 #endif
braichi13 0:77205fc699b9 391 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 392 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 393 #endif
braichi13 0:77205fc699b9 394 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 395 #define OS_CLOCK 168000000
braichi13 0:77205fc699b9 396 #endif
braichi13 0:77205fc699b9 397
braichi13 0:77205fc699b9 398 #elif defined(TARGET_STM32F405RG)
braichi13 0:77205fc699b9 399
braichi13 0:77205fc699b9 400 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 401 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 402 #endif
braichi13 0:77205fc699b9 403
braichi13 0:77205fc699b9 404 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 405
braichi13 0:77205fc699b9 406 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 407 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 408 #endif
braichi13 0:77205fc699b9 409 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 410 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 411 #endif
braichi13 0:77205fc699b9 412 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 413 #define OS_CLOCK 48000000
braichi13 0:77205fc699b9 414 #endif
braichi13 0:77205fc699b9 415
braichi13 0:77205fc699b9 416 #elif defined(TARGET_STM32F401RE)
braichi13 0:77205fc699b9 417
braichi13 0:77205fc699b9 418 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 419 #define INITIAL_SP (0x20018000UL)
braichi13 0:77205fc699b9 420 #endif
braichi13 0:77205fc699b9 421
braichi13 0:77205fc699b9 422 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 423
braichi13 0:77205fc699b9 424 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 425 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 426 #endif
braichi13 0:77205fc699b9 427 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 428 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 429 #endif
braichi13 0:77205fc699b9 430 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 431 #define OS_CLOCK 84000000
braichi13 0:77205fc699b9 432 #endif
braichi13 0:77205fc699b9 433
braichi13 0:77205fc699b9 434 #elif defined(TARGET_STM32F410RB)
braichi13 0:77205fc699b9 435
braichi13 0:77205fc699b9 436 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 437 #define INITIAL_SP (0x20008000UL)
braichi13 0:77205fc699b9 438 #endif
braichi13 0:77205fc699b9 439
braichi13 0:77205fc699b9 440 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 441
braichi13 0:77205fc699b9 442 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 443 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 444 #endif
braichi13 0:77205fc699b9 445 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 446 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 447 #endif
braichi13 0:77205fc699b9 448 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 449 #define OS_CLOCK 100000000
braichi13 0:77205fc699b9 450 #endif
braichi13 0:77205fc699b9 451
braichi13 0:77205fc699b9 452 #elif defined(TARGET_MTS_MDOT_F411RE) || defined (TARGET_MTS_DRAGONFLY_F411RE)
braichi13 0:77205fc699b9 453
braichi13 0:77205fc699b9 454 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 455 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 456 #endif
braichi13 0:77205fc699b9 457
braichi13 0:77205fc699b9 458 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 459
braichi13 0:77205fc699b9 460 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 461 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 462 #endif
braichi13 0:77205fc699b9 463 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 464 #define OS_MAINSTKSIZE 1024
braichi13 0:77205fc699b9 465 #endif
braichi13 0:77205fc699b9 466 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 467 #define OS_CLOCK 96000000
braichi13 0:77205fc699b9 468 #endif
braichi13 0:77205fc699b9 469
braichi13 0:77205fc699b9 470 #elif defined(TARGET_STM32F411RE)
braichi13 0:77205fc699b9 471
braichi13 0:77205fc699b9 472 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 473 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 474 #endif
braichi13 0:77205fc699b9 475
braichi13 0:77205fc699b9 476 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 477
braichi13 0:77205fc699b9 478 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 479 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 480 #endif
braichi13 0:77205fc699b9 481 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 482 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 483 #endif
braichi13 0:77205fc699b9 484 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 485 #define OS_CLOCK 100000000
braichi13 0:77205fc699b9 486 #endif
braichi13 0:77205fc699b9 487
braichi13 0:77205fc699b9 488 #elif defined(TARGET_STM32F412ZG)
braichi13 0:77205fc699b9 489
braichi13 0:77205fc699b9 490 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 491 #define INITIAL_SP (0x20040000UL)
braichi13 0:77205fc699b9 492 #endif
braichi13 0:77205fc699b9 493
braichi13 0:77205fc699b9 494 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 495
braichi13 0:77205fc699b9 496 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 497 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 498 #endif
braichi13 0:77205fc699b9 499 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 500 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 501 #endif
braichi13 0:77205fc699b9 502 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 503 #define OS_CLOCK 100000000
braichi13 0:77205fc699b9 504 #endif
braichi13 0:77205fc699b9 505
braichi13 0:77205fc699b9 506 #elif defined(TARGET_STM32F413ZH)
braichi13 0:77205fc699b9 507
braichi13 0:77205fc699b9 508 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 509 #define INITIAL_SP (0x20050000UL)
braichi13 0:77205fc699b9 510 #endif
braichi13 0:77205fc699b9 511
braichi13 0:77205fc699b9 512 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 513
braichi13 0:77205fc699b9 514 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 515 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 516 #endif
braichi13 0:77205fc699b9 517 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 518 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 519 #endif
braichi13 0:77205fc699b9 520 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 521 #define OS_CLOCK 100000000
braichi13 0:77205fc699b9 522 #endif
braichi13 0:77205fc699b9 523
braichi13 0:77205fc699b9 524
braichi13 0:77205fc699b9 525 #elif defined(TARGET_STM32F446RE)
braichi13 0:77205fc699b9 526
braichi13 0:77205fc699b9 527 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 528 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 529 #endif
braichi13 0:77205fc699b9 530
braichi13 0:77205fc699b9 531 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 532
braichi13 0:77205fc699b9 533 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 534 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 535 #endif
braichi13 0:77205fc699b9 536 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 537 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 538 #endif
braichi13 0:77205fc699b9 539 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 540 #define OS_CLOCK 180000000
braichi13 0:77205fc699b9 541 #endif
braichi13 0:77205fc699b9 542
braichi13 0:77205fc699b9 543 #elif defined(TARGET_STM32F446ZE)
braichi13 0:77205fc699b9 544
braichi13 0:77205fc699b9 545 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 546 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 547 #endif
braichi13 0:77205fc699b9 548
braichi13 0:77205fc699b9 549 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 550
braichi13 0:77205fc699b9 551 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 552 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 553 #endif
braichi13 0:77205fc699b9 554 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 555 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 556 #endif
braichi13 0:77205fc699b9 557 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 558 #define OS_CLOCK 180000000
braichi13 0:77205fc699b9 559 #endif
braichi13 0:77205fc699b9 560
braichi13 0:77205fc699b9 561 #elif defined(TARGET_STM32F407VG)
braichi13 0:77205fc699b9 562
braichi13 0:77205fc699b9 563 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 564 #define INITIAL_SP (0x20020000UL)
braichi13 0:77205fc699b9 565 #endif
braichi13 0:77205fc699b9 566
braichi13 0:77205fc699b9 567 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 568
braichi13 0:77205fc699b9 569 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 570 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 571 #endif
braichi13 0:77205fc699b9 572 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 573 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 574 #endif
braichi13 0:77205fc699b9 575 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 576 #define OS_CLOCK 168000000
braichi13 0:77205fc699b9 577 #endif
braichi13 0:77205fc699b9 578
braichi13 0:77205fc699b9 579 #elif defined(TARGET_STM32F746NG)
braichi13 0:77205fc699b9 580
braichi13 0:77205fc699b9 581 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 582 #define INITIAL_SP (0x20050000UL)
braichi13 0:77205fc699b9 583 #endif
braichi13 0:77205fc699b9 584
braichi13 0:77205fc699b9 585 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 586
braichi13 0:77205fc699b9 587 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 588 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 589 #endif
braichi13 0:77205fc699b9 590 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 591 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 592 #endif
braichi13 0:77205fc699b9 593 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 594 #define OS_CLOCK 216000000
braichi13 0:77205fc699b9 595 #endif
braichi13 0:77205fc699b9 596
braichi13 0:77205fc699b9 597 #elif (defined(TARGET_STM32F746ZG) || defined(TARGET_STM32F756ZG))
braichi13 0:77205fc699b9 598
braichi13 0:77205fc699b9 599 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 600 #define INITIAL_SP (0x20050000UL)
braichi13 0:77205fc699b9 601 #endif
braichi13 0:77205fc699b9 602
braichi13 0:77205fc699b9 603 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 604
braichi13 0:77205fc699b9 605 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 606 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 607 #endif
braichi13 0:77205fc699b9 608 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 609 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 610 #endif
braichi13 0:77205fc699b9 611 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 612 #define OS_CLOCK 216000000
braichi13 0:77205fc699b9 613 #endif
braichi13 0:77205fc699b9 614
braichi13 0:77205fc699b9 615 #elif defined(TARGET_STM32F767ZI)
braichi13 0:77205fc699b9 616
braichi13 0:77205fc699b9 617 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 618 #define INITIAL_SP (0x20080000UL)
braichi13 0:77205fc699b9 619 #endif
braichi13 0:77205fc699b9 620
braichi13 0:77205fc699b9 621 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 622
braichi13 0:77205fc699b9 623 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 624 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 625 #endif
braichi13 0:77205fc699b9 626 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 627 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 628 #endif
braichi13 0:77205fc699b9 629 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 630 #define OS_CLOCK 216000000
braichi13 0:77205fc699b9 631 #endif
braichi13 0:77205fc699b9 632
braichi13 0:77205fc699b9 633 #elif defined(TARGET_STM32F769NI)
braichi13 0:77205fc699b9 634
braichi13 0:77205fc699b9 635 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 636 #define INITIAL_SP (0x20080000UL)
braichi13 0:77205fc699b9 637 #endif
braichi13 0:77205fc699b9 638
braichi13 0:77205fc699b9 639 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 640
braichi13 0:77205fc699b9 641 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 642 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 643 #endif
braichi13 0:77205fc699b9 644 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 645 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 646 #endif
braichi13 0:77205fc699b9 647 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 648 #define OS_CLOCK 216000000
braichi13 0:77205fc699b9 649 #endif
braichi13 0:77205fc699b9 650
braichi13 0:77205fc699b9 651 #elif defined(TARGET_STM32L053C8)
braichi13 0:77205fc699b9 652
braichi13 0:77205fc699b9 653 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 654 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 655 #endif
braichi13 0:77205fc699b9 656
braichi13 0:77205fc699b9 657 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 658
braichi13 0:77205fc699b9 659 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 660 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 661 #endif
braichi13 0:77205fc699b9 662 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 663 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 664 #endif
braichi13 0:77205fc699b9 665 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 666 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 667 #endif
braichi13 0:77205fc699b9 668
braichi13 0:77205fc699b9 669 #elif defined(TARGET_STM32L031K6)
braichi13 0:77205fc699b9 670
braichi13 0:77205fc699b9 671 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 672 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 673 #endif
braichi13 0:77205fc699b9 674
braichi13 0:77205fc699b9 675 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 676
braichi13 0:77205fc699b9 677 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 678 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 679 #endif
braichi13 0:77205fc699b9 680 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 681 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 682 #endif
braichi13 0:77205fc699b9 683 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 684 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 685 #endif
braichi13 0:77205fc699b9 686
braichi13 0:77205fc699b9 687 #elif defined(TARGET_STM32L053R8)
braichi13 0:77205fc699b9 688
braichi13 0:77205fc699b9 689 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 690 #define INITIAL_SP (0x20002000UL)
braichi13 0:77205fc699b9 691 #endif
braichi13 0:77205fc699b9 692
braichi13 0:77205fc699b9 693 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 694
braichi13 0:77205fc699b9 695 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 696 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 697 #endif
braichi13 0:77205fc699b9 698 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 699 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 700 #endif
braichi13 0:77205fc699b9 701 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 702 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 703 #endif
braichi13 0:77205fc699b9 704
braichi13 0:77205fc699b9 705 #elif defined(TARGET_STM32L072CZ)
braichi13 0:77205fc699b9 706
braichi13 0:77205fc699b9 707 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 708 #define INITIAL_SP (0x20005000UL)
braichi13 0:77205fc699b9 709 #endif
braichi13 0:77205fc699b9 710
braichi13 0:77205fc699b9 711 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 712
braichi13 0:77205fc699b9 713 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 714 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 715 #endif
braichi13 0:77205fc699b9 716 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 717 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 718 #endif
braichi13 0:77205fc699b9 719 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 720 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 721 #endif
braichi13 0:77205fc699b9 722
braichi13 0:77205fc699b9 723 #elif defined(TARGET_STM32L073RZ)
braichi13 0:77205fc699b9 724
braichi13 0:77205fc699b9 725 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 726 #define INITIAL_SP (0x20005000UL)
braichi13 0:77205fc699b9 727 #endif
braichi13 0:77205fc699b9 728
braichi13 0:77205fc699b9 729 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 730
braichi13 0:77205fc699b9 731 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 732 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 733 #endif
braichi13 0:77205fc699b9 734 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 735 #define OS_MAINSTKSIZE 112
braichi13 0:77205fc699b9 736 #endif
braichi13 0:77205fc699b9 737 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 738 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 739 #endif
braichi13 0:77205fc699b9 740
braichi13 0:77205fc699b9 741 #elif defined(TARGET_STM32L152RC)
braichi13 0:77205fc699b9 742
braichi13 0:77205fc699b9 743 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 744 #define INITIAL_SP (0x20008000UL)
braichi13 0:77205fc699b9 745 #endif
braichi13 0:77205fc699b9 746
braichi13 0:77205fc699b9 747 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 748
braichi13 0:77205fc699b9 749 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 750 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 751 #endif
braichi13 0:77205fc699b9 752 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 753 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 754 #endif
braichi13 0:77205fc699b9 755 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 756 #define OS_CLOCK 24000000
braichi13 0:77205fc699b9 757 #endif
braichi13 0:77205fc699b9 758
braichi13 0:77205fc699b9 759 #elif defined(TARGET_STM32L152RE)
braichi13 0:77205fc699b9 760
braichi13 0:77205fc699b9 761 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 762 #define INITIAL_SP (0x20014000UL)
braichi13 0:77205fc699b9 763 #endif
braichi13 0:77205fc699b9 764
braichi13 0:77205fc699b9 765 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 766
braichi13 0:77205fc699b9 767 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 768 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 769 #endif
braichi13 0:77205fc699b9 770 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 771 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 772 #endif
braichi13 0:77205fc699b9 773 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 774 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 775 #endif
braichi13 0:77205fc699b9 776
braichi13 0:77205fc699b9 777 #elif defined(TARGET_NZ32_SC151)
braichi13 0:77205fc699b9 778
braichi13 0:77205fc699b9 779 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 780 #define INITIAL_SP (0x20008000UL)
braichi13 0:77205fc699b9 781 #endif
braichi13 0:77205fc699b9 782
braichi13 0:77205fc699b9 783 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 784
braichi13 0:77205fc699b9 785 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 786 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 787 #endif
braichi13 0:77205fc699b9 788 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 789 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 790 #endif
braichi13 0:77205fc699b9 791 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 792 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 793 #endif
braichi13 0:77205fc699b9 794
braichi13 0:77205fc699b9 795 #elif defined(TARGET_XDOT_L151CC)
braichi13 0:77205fc699b9 796
braichi13 0:77205fc699b9 797 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 798 #define INITIAL_SP (0x20008000UL)
braichi13 0:77205fc699b9 799 #endif
braichi13 0:77205fc699b9 800
braichi13 0:77205fc699b9 801 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 802
braichi13 0:77205fc699b9 803 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 804 #define OS_TASKCNT 6
braichi13 0:77205fc699b9 805 #endif
braichi13 0:77205fc699b9 806 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 807 #define OS_MAINSTKSIZE 128
braichi13 0:77205fc699b9 808 #endif
braichi13 0:77205fc699b9 809 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 810 #define OS_CLOCK 32000000
braichi13 0:77205fc699b9 811 #endif
braichi13 0:77205fc699b9 812
braichi13 0:77205fc699b9 813 #elif defined(TARGET_STM32L476VG) || defined(TARGET_STM32L475VG)
braichi13 0:77205fc699b9 814
braichi13 0:77205fc699b9 815 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 816 #define INITIAL_SP (0x20018000UL)
braichi13 0:77205fc699b9 817 #endif
braichi13 0:77205fc699b9 818
braichi13 0:77205fc699b9 819 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 820
braichi13 0:77205fc699b9 821 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 822 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 823 #endif
braichi13 0:77205fc699b9 824 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 825 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 826 #endif
braichi13 0:77205fc699b9 827 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 828 #define OS_CLOCK 80000000
braichi13 0:77205fc699b9 829 #endif
braichi13 0:77205fc699b9 830
braichi13 0:77205fc699b9 831 #elif defined(TARGET_STM32L432KC)
braichi13 0:77205fc699b9 832
braichi13 0:77205fc699b9 833 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 834 #define INITIAL_SP (0x2000C000UL)
braichi13 0:77205fc699b9 835 #endif
braichi13 0:77205fc699b9 836
braichi13 0:77205fc699b9 837 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 838
braichi13 0:77205fc699b9 839 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 840 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 841 #endif
braichi13 0:77205fc699b9 842 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 843 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 844 #endif
braichi13 0:77205fc699b9 845 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 846 #define OS_CLOCK 80000000
braichi13 0:77205fc699b9 847 #endif
braichi13 0:77205fc699b9 848
braichi13 0:77205fc699b9 849 #elif (defined(TARGET_STM32L476RG) || defined(TARGET_STM32L486RG))
braichi13 0:77205fc699b9 850
braichi13 0:77205fc699b9 851 #ifndef INITIAL_SP
braichi13 0:77205fc699b9 852 #define INITIAL_SP (0x20018000UL)
braichi13 0:77205fc699b9 853 #endif
braichi13 0:77205fc699b9 854
braichi13 0:77205fc699b9 855 // RTX 4 only config below, for backward-compability
braichi13 0:77205fc699b9 856
braichi13 0:77205fc699b9 857 #ifndef OS_TASKCNT
braichi13 0:77205fc699b9 858 #define OS_TASKCNT 14
braichi13 0:77205fc699b9 859 #endif
braichi13 0:77205fc699b9 860 #ifndef OS_MAINSTKSIZE
braichi13 0:77205fc699b9 861 #define OS_MAINSTKSIZE 256
braichi13 0:77205fc699b9 862 #endif
braichi13 0:77205fc699b9 863 #ifndef OS_CLOCK
braichi13 0:77205fc699b9 864 #define OS_CLOCK 80000000
braichi13 0:77205fc699b9 865 #endif
braichi13 0:77205fc699b9 866
braichi13 0:77205fc699b9 867 #endif
braichi13 0:77205fc699b9 868
braichi13 0:77205fc699b9 869 #endif // MBED_MBED_RTX_H