KEN OGAMI
Forking mbed-dev-bin
Fork of
mbed-dev-bin
by 
Lancaster University
Revision 2:e32c8485c88f, committed 2016-07-13
- Comitter:
- jamesadevine
- Date:
- Wed Jul 13 15:09:26 2016 +0100
- Parent:
- 1:a7c51b5e0534
- Child:
- 3:768173a57492
- Commit message:
- move to latest version of mbed-classic.
Changed in this revision
--- a/AnalogIn.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,103 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ANALOGIN_H
-#define MBED_ANALOGIN_H
-
-#include "platform.h"
-
-#if DEVICE_ANALOGIN
-
-#include "analogin_api.h"
-
-namespace mbed {
-
-/** An analog input, used for reading the voltage on a pin
- *
- * Example:
- * @code
- * // Print messages when the AnalogIn is greater than 50%
- *
- * #include "mbed.h"
- *
- * AnalogIn temperature(p20);
- *
- * int main() {
- * while(1) {
- * if(temperature > 0.5) {
- * printf("Too hot! (%f)", temperature.read());
- * }
- * }
- * }
- * @endcode
- */
-class AnalogIn {
-
-public:
-
- /** Create an AnalogIn, connected to the specified pin
- *
- * @param pin AnalogIn pin to connect to
- * @param name (optional) A string to identify the object
- */
- AnalogIn(PinName pin) {
- analogin_init(&_adc, pin);
- }
-
- /** Read the input voltage, represented as a float in the range [0.0, 1.0]
- *
- * @returns A floating-point value representing the current input voltage, measured as a percentage
- */
- float read() {
- return analogin_read(&_adc);
- }
-
- /** Read the input voltage, represented as an unsigned short in the range [0x0, 0xFFFF]
- *
- * @returns
- * 16-bit unsigned short representing the current input voltage, normalised to a 16-bit value
- */
- unsigned short read_u16() {
- return analogin_read_u16(&_adc);
- }
-
-#ifdef MBED_OPERATORS
- /** An operator shorthand for read()
- *
- * The float() operator can be used as a shorthand for read() to simplify common code sequences
- *
- * Example:
- * @code
- * float x = volume.read();
- * float x = volume;
- *
- * if(volume.read() > 0.25) { ... }
- * if(volume > 0.25) { ... }
- * @endcode
- */
- operator float() {
- return read();
- }
-#endif
-
-protected:
- analogin_t _adc;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/AnalogOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,121 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ANALOGOUT_H
-#define MBED_ANALOGOUT_H
-
-#include "platform.h"
-
-#if DEVICE_ANALOGOUT
-
-#include "analogout_api.h"
-
-namespace mbed {
-
-/** An analog output, used for setting the voltage on a pin
- *
- * Example:
- * @code
- * // Make a sawtooth output
- *
- * #include "mbed.h"
- *
- * AnalogOut tri(p18);
- * int main() {
- * while(1) {
- * tri = tri + 0.01;
- * wait_us(1);
- * if(tri == 1) {
- * tri = 0;
- * }
- * }
- * }
- * @endcode
- */
-class AnalogOut {
-
-public:
-
- /** Create an AnalogOut connected to the specified pin
- *
- * @param AnalogOut pin to connect to (18)
- */
- AnalogOut(PinName pin) {
- analogout_init(&_dac, pin);
- }
-
- /** Set the output voltage, specified as a percentage (float)
- *
- * @param value A floating-point value representing the output voltage,
- * specified as a percentage. The value should lie between
- * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
- * Values outside this range will be saturated to 0.0f or 1.0f.
- */
- void write(float value) {
- analogout_write(&_dac, value);
- }
-
- /** Set the output voltage, represented as an unsigned short in the range [0x0, 0xFFFF]
- *
- * @param value 16-bit unsigned short representing the output voltage,
- * normalised to a 16-bit value (0x0000 = 0v, 0xFFFF = 3.3v)
- */
- void write_u16(unsigned short value) {
- analogout_write_u16(&_dac, value);
- }
-
- /** Return the current output voltage setting, measured as a percentage (float)
- *
- * @returns
- * A floating-point value representing the current voltage being output on the pin,
- * measured as a percentage. The returned value will lie between
- * 0.0f (representing 0v / 0%) and 1.0f (representing 3.3v / 100%).
- *
- * @note
- * This value may not match exactly the value set by a previous write().
- */
- float read() {
- return analogout_read(&_dac);
- }
-
-#ifdef MBED_OPERATORS
- /** An operator shorthand for write()
- */
- AnalogOut& operator= (float percent) {
- write(percent);
- return *this;
- }
-
- AnalogOut& operator= (AnalogOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** An operator shorthand for read()
- */
- operator float() {
- return read();
- }
-#endif
-
-protected:
- dac_t _dac;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/BusIn.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,98 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_BUSIN_H
-#define MBED_BUSIN_H
-
-#include "platform.h"
-#include "DigitalIn.h"
-
-namespace mbed {
-
-/** A digital input bus, used for reading the state of a collection of pins
- */
-class BusIn {
-
-public:
- /* Group: Configuration Methods */
-
- /** Create an BusIn, connected to the specified pins
- *
- * @param <n> DigitalIn pin to connect to bus bit <n> (p5-p30, NC)
- *
- * @note
- * It is only required to specify as many pin variables as is required
- * for the bus; the rest will default to NC (not connected)
- */
- BusIn(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
- PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
- PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
- PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC);
-
- BusIn(PinName pins[16]);
-
- virtual ~BusIn();
-
- /** Read the value of the input bus
- *
- * @returns
- * An integer with each bit corresponding to the value read from the associated DigitalIn pin
- */
- int read();
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone
- */
- void mode(PinMode pull);
-
- /** Binary mask of bus pins connected to actual pins (not NC pins)
- * If bus pin is in NC state make corresponding bit will be cleared (set to 0), else bit will be set to 1
- *
- * @returns
- * Binary mask of connected pins
- */
- int mask() {
- return _nc_mask;
- }
-
-#ifdef MBED_OPERATORS
- /** A shorthand for read()
- */
- operator int();
-
- /** Access to particular bit in random-iterator fashion
- */
- DigitalIn & operator[] (int index);
-#endif
-
-protected:
- DigitalIn* _pin[16];
-
- /** Mask of bus's NC pins
- * If bit[n] is set to 1 - pin is connected
- * if bit[n] is cleared - pin is not connected (NC)
- */
- int _nc_mask;
-
- /* disallow copy constructor and assignment operators */
-private:
- BusIn(const BusIn&);
- BusIn & operator = (const BusIn&);
-};
-
-} // namespace mbed
-
-#endif
--- a/BusInOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,117 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_BUSINOUT_H
-#define MBED_BUSINOUT_H
-
-#include "DigitalInOut.h"
-
-namespace mbed {
-
-/** A digital input output bus, used for setting the state of a collection of pins
- */
-class BusInOut {
-
-public:
-
- /** Create an BusInOut, connected to the specified pins
- *
- * @param p<n> DigitalInOut pin to connect to bus bit p<n> (p5-p30, NC)
- *
- * @note
- * It is only required to specify as many pin variables as is required
- * for the bus; the rest will default to NC (not connected)
- */
- BusInOut(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
- PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
- PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
- PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC);
-
- BusInOut(PinName pins[16]);
-
- virtual ~BusInOut();
-
- /* Group: Access Methods */
-
- /** Write the value to the output bus
- *
- * @param value An integer specifying a bit to write for every corresponding DigitalInOut pin
- */
- void write(int value);
-
- /** Read the value currently output on the bus
- *
- * @returns
- * An integer with each bit corresponding to associated DigitalInOut pin setting
- */
- int read();
-
- /** Set as an output
- */
- void output();
-
- /** Set as an input
- */
- void input();
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone
- */
- void mode(PinMode pull);
-
- /** Binary mask of bus pins connected to actual pins (not NC pins)
- * If bus pin is in NC state make corresponding bit will be cleared (set to 0), else bit will be set to 1
- *
- * @returns
- * Binary mask of connected pins
- */
- int mask() {
- return _nc_mask;
- }
-
-#ifdef MBED_OPERATORS
- /** A shorthand for write()
- */
- BusInOut& operator= (int v);
- BusInOut& operator= (BusInOut& rhs);
-
- /** Access to particular bit in random-iterator fashion
- */
- DigitalInOut& operator[] (int index);
-
- /** A shorthand for read()
- */
- operator int();
-#endif
-
-protected:
- DigitalInOut* _pin[16];
-
- /** Mask of bus's NC pins
- * If bit[n] is set to 1 - pin is connected
- * if bit[n] is cleared - pin is not connected (NC)
- */
- int _nc_mask;
-
- /* disallow copy constructor and assignment operators */
-private:
- BusInOut(const BusInOut&);
- BusInOut & operator = (const BusInOut&);
-};
-
-} // namespace mbed
-
-#endif
--- a/BusOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,101 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_BUSOUT_H
-#define MBED_BUSOUT_H
-
-#include "DigitalOut.h"
-
-namespace mbed {
-
-/** A digital output bus, used for setting the state of a collection of pins
- */
-class BusOut {
-
-public:
-
- /** Create an BusOut, connected to the specified pins
- *
- * @param p<n> DigitalOut pin to connect to bus bit <n> (p5-p30, NC)
- *
- * @note
- * It is only required to specify as many pin variables as is required
- * for the bus; the rest will default to NC (not connected)
- */
- BusOut(PinName p0, PinName p1 = NC, PinName p2 = NC, PinName p3 = NC,
- PinName p4 = NC, PinName p5 = NC, PinName p6 = NC, PinName p7 = NC,
- PinName p8 = NC, PinName p9 = NC, PinName p10 = NC, PinName p11 = NC,
- PinName p12 = NC, PinName p13 = NC, PinName p14 = NC, PinName p15 = NC);
-
- BusOut(PinName pins[16]);
-
- virtual ~BusOut();
-
- /** Write the value to the output bus
- *
- * @param value An integer specifying a bit to write for every corresponding DigitalOut pin
- */
- void write(int value);
-
- /** Read the value currently output on the bus
- *
- * @returns
- * An integer with each bit corresponding to associated DigitalOut pin setting
- */
- int read();
-
- /** Binary mask of bus pins connected to actual pins (not NC pins)
- * If bus pin is in NC state make corresponding bit will be cleared (set to 0), else bit will be set to 1
- *
- * @returns
- * Binary mask of connected pins
- */
- int mask() {
- return _nc_mask;
- }
-
-#ifdef MBED_OPERATORS
- /** A shorthand for write()
- */
- BusOut& operator= (int v);
- BusOut& operator= (BusOut& rhs);
-
- /** Access to particular bit in random-iterator fashion
- */
- DigitalOut& operator[] (int index);
-
- /** A shorthand for read()
- */
- operator int();
-#endif
-
-protected:
- DigitalOut* _pin[16];
-
- /** Mask of bus's NC pins
- * If bit[n] is set to 1 - pin is connected
- * if bit[n] is cleared - pin is not connected (NC)
- */
- int _nc_mask;
-
- /* disallow copy constructor and assignment operators */
-private:
- BusOut(const BusOut&);
- BusOut & operator = (const BusOut&);
-};
-
-} // namespace mbed
-
-#endif
--- a/CAN.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,243 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_CAN_H
-#define MBED_CAN_H
-
-#include "platform.h"
-
-#if DEVICE_CAN
-
-#include "can_api.h"
-#include "can_helper.h"
-#include "FunctionPointer.h"
-
-namespace mbed {
-
-/** CANMessage class
- */
-class CANMessage : public CAN_Message {
-
-public:
- /** Creates empty CAN message.
- */
- CANMessage() : CAN_Message() {
- len = 8;
- type = CANData;
- format = CANStandard;
- id = 0;
- memset(data, 0, 8);
- }
-
- /** Creates CAN message with specific content.
- */
- CANMessage(int _id, const char *_data, char _len = 8, CANType _type = CANData, CANFormat _format = CANStandard) {
- len = _len & 0xF;
- type = _type;
- format = _format;
- id = _id;
- memcpy(data, _data, _len);
- }
-
- /** Creates CAN remote message.
- */
- CANMessage(int _id, CANFormat _format = CANStandard) {
- len = 0;
- type = CANRemote;
- format = _format;
- id = _id;
- memset(data, 0, 8);
- }
-};
-
-/** A can bus client, used for communicating with can devices
- */
-class CAN {
-
-public:
- /** Creates an CAN interface connected to specific pins.
- *
- * @param rd read from transmitter
- * @param td transmit to transmitter
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * Ticker ticker;
- * DigitalOut led1(LED1);
- * DigitalOut led2(LED2);
- * CAN can1(p9, p10);
- * CAN can2(p30, p29);
- *
- * char counter = 0;
- *
- * void send() {
- * if(can1.write(CANMessage(1337, &counter, 1))) {
- * printf("Message sent: %d\n", counter);
- * counter++;
- * }
- * led1 = !led1;
- * }
- *
- * int main() {
- * ticker.attach(&send, 1);
- * CANMessage msg;
- * while(1) {
- * if(can2.read(msg)) {
- * printf("Message received: %d\n\n", msg.data[0]);
- * led2 = !led2;
- * }
- * wait(0.2);
- * }
- * }
- * @endcode
- */
- CAN(PinName rd, PinName td);
- virtual ~CAN();
-
- /** Set the frequency of the CAN interface
- *
- * @param hz The bus frequency in hertz
- *
- * @returns
- * 1 if successful,
- * 0 otherwise
- */
- int frequency(int hz);
-
- /** Write a CANMessage to the bus.
- *
- * @param msg The CANMessage to write.
- *
- * @returns
- * 0 if write failed,
- * 1 if write was successful
- */
- int write(CANMessage msg);
-
- /** Read a CANMessage from the bus.
- *
- * @param msg A CANMessage to read to.
- * @param handle message filter handle (0 for any message)
- *
- * @returns
- * 0 if no message arrived,
- * 1 if message arrived
- */
- int read(CANMessage &msg, int handle = 0);
-
- /** Reset CAN interface.
- *
- * To use after error overflow.
- */
- void reset();
-
- /** Puts or removes the CAN interface into silent monitoring mode
- *
- * @param silent boolean indicating whether to go into silent mode or not
- */
- void monitor(bool silent);
-
- enum Mode {
- Reset = 0,
- Normal,
- Silent,
- LocalTest,
- GlobalTest,
- SilentTest
- };
-
- /** Change CAN operation to the specified mode
- *
- * @param mode The new operation mode (CAN::Normal, CAN::Silent, CAN::LocalTest, CAN::GlobalTest, CAN::SilentTest)
- *
- * @returns
- * 0 if mode change failed or unsupported,
- * 1 if mode change was successful
- */
- int mode(Mode mode);
-
- /** Filter out incomming messages
- *
- * @param id the id to filter on
- * @param mask the mask applied to the id
- * @param format format to filter on (Default CANAny)
- * @param handle message filter handle (Optional)
- *
- * @returns
- * 0 if filter change failed or unsupported,
- * new filter handle if successful
- */
- int filter(unsigned int id, unsigned int mask, CANFormat format = CANAny, int handle = 0);
-
- /** Returns number of read errors to detect read overflow errors.
- */
- unsigned char rderror();
-
- /** Returns number of write errors to detect write overflow errors.
- */
- unsigned char tderror();
-
- enum IrqType {
- RxIrq = 0,
- TxIrq,
- EwIrq,
- DoIrq,
- WuIrq,
- EpIrq,
- AlIrq,
- BeIrq,
- IdIrq
- };
-
- /** Attach a function to call whenever a CAN frame received interrupt is
- * generated.
- *
- * @param fptr A pointer to a void function, or 0 to set as none
- * @param event Which CAN interrupt to attach the member function to (CAN::RxIrq for message received, CAN::TxIrq for transmitted or aborted, CAN::EwIrq for error warning, CAN::DoIrq for data overrun, CAN::WuIrq for wake-up, CAN::EpIrq for error passive, CAN::AlIrq for arbitration lost, CAN::BeIrq for bus error)
- */
- void attach(void (*fptr)(void), IrqType type=RxIrq);
-
- /** Attach a member function to call whenever a CAN frame received interrupt
- * is generated.
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- * @param event Which CAN interrupt to attach the member function to (CAN::RxIrq for message received, TxIrq for transmitted or aborted, EwIrq for error warning, DoIrq for data overrun, WuIrq for wake-up, EpIrq for error passive, AlIrq for arbitration lost, BeIrq for bus error)
- */
- template<typename T>
- void attach(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) {
- if((mptr != NULL) && (tptr != NULL)) {
- _irq[type].attach(tptr, mptr);
- can_irq_set(&_can, (CanIrqType)type, 1);
- }
- else {
- can_irq_set(&_can, (CanIrqType)type, 0);
- }
- }
-
- static void _irq_handler(uint32_t id, CanIrqType type);
-
-protected:
- can_t _can;
- FunctionPointer _irq[9];
-};
-
-} // namespace mbed
-
-#endif
-
-#endif // MBED_CAN_H
--- a/CThunk.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,202 +0,0 @@
-/* General C++ Object Thunking class
- *
- * - allows direct callbacks to non-static C++ class functions
- * - keeps track for the corresponding class instance
- * - supports an optional context parameter for the called function
- * - ideally suited for class object receiving interrupts (NVIC_SetVector)
- *
- * Copyright (c) 2014-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __CTHUNK_H__
-#define __CTHUNK_H__
-
-#define CTHUNK_ADDRESS 1
-
-#if defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__thumb2__)
-#define CTHUNK_VARIABLES volatile uint32_t code[1]
-/**
-* CTHUNK disassembly for Cortex-M3/M4 (thumb2):
-* * ldm.w pc,{r0,r1,r2,pc}
-*
-* This instruction loads the arguments for the static thunking function to r0-r2, and
-* branches to that function by loading its address into PC.
-*
-* This is safe for both regular calling and interrupt calling, since it only touches scratch registers
-* which should be saved by the caller, and are automatically saved as part of the IRQ context switch.
-*/
-#define CTHUNK_ASSIGMENT m_thunk.code[0] = 0x8007E89F
-
-#elif defined(__CORTEX_M0PLUS) || defined(__CORTEX_M0)
-/*
-* CTHUNK disassembly for Cortex M0 (thumb):
-* * push {r0,r1,r2,r3,r4,lr} save touched registers and return address
-* * movs r4,#4 set up address to load arguments from (immediately following this code block) (1)
-* * add r4,pc set up address to load arguments from (immediately following this code block) (2)
-* * ldm r4!,{r0,r1,r2,r3} load arguments for static thunk function
-* * blx r3 call static thunk function
-* * pop {r0,r1,r2,r3,r4,pc} restore scratch registers and return from function
-*/
-#define CTHUNK_VARIABLES volatile uint32_t code[3]
-#define CTHUNK_ASSIGMENT do { \
- m_thunk.code[0] = 0x2404B51F; \
- m_thunk.code[1] = 0xCC0F447C; \
- m_thunk.code[2] = 0xBD1F4798; \
- } while (0)
-
-#else
-#error "Target is not currently suported."
-#endif
-
-/* IRQ/Exception compatible thunk entry function */
-typedef void (*CThunkEntry)(void);
-
-template<class T>
-class CThunk
-{
- public:
- typedef void (T::*CCallbackSimple)(void);
- typedef void (T::*CCallback)(void* context);
-
- inline CThunk(T *instance)
- {
- init(instance, NULL, NULL);
- }
-
- inline CThunk(T *instance, CCallback callback)
- {
- init(instance, callback, NULL);
- }
-
- ~CThunk() {
-
- }
-
- inline CThunk(T *instance, CCallbackSimple callback)
- {
- init(instance, (CCallback)callback, NULL);
- }
-
- inline CThunk(T &instance, CCallback callback)
- {
- init(instance, callback, NULL);
- }
-
- inline CThunk(T &instance, CCallbackSimple callback)
- {
- init(instance, (CCallback)callback, NULL);
- }
-
- inline CThunk(T &instance, CCallback callback, void* context)
- {
- init(instance, callback, context);
- }
-
- inline void callback(CCallback callback)
- {
- m_callback = callback;
- }
-
- inline void callback(CCallbackSimple callback)
- {
- m_callback = (CCallback)callback;
- }
-
- inline void context(void* context)
- {
- m_thunk.context = (uint32_t)context;
- }
-
- inline void context(uint32_t context)
- {
- m_thunk.context = context;
- }
-
- inline uint32_t entry(void)
- {
- return (((uint32_t)&m_thunk)|CTHUNK_ADDRESS);
- }
-
- /* get thunk entry point for connecting rhunk to an IRQ table */
- inline operator CThunkEntry(void)
- {
- return (CThunkEntry)entry();
- }
-
- /* get thunk entry point for connecting rhunk to an IRQ table */
- inline operator uint32_t(void)
- {
- return entry();
- }
-
- /* simple test function */
- inline void call(void)
- {
- (((CThunkEntry)(entry()))());
- }
-
- private:
- T* m_instance;
- volatile CCallback m_callback;
-
-// TODO: this needs proper fix, to refactor toolchain header file and all its use
-// PACKED there is not defined properly for IAR
-#if defined (__ICCARM__)
- typedef __packed struct
- {
- CTHUNK_VARIABLES;
- volatile uint32_t instance;
- volatile uint32_t context;
- volatile uint32_t callback;
- volatile uint32_t trampoline;
- } CThunkTrampoline;
-#else
- typedef struct
- {
- CTHUNK_VARIABLES;
- volatile uint32_t instance;
- volatile uint32_t context;
- volatile uint32_t callback;
- volatile uint32_t trampoline;
- } __attribute__((__packed__)) CThunkTrampoline;
-#endif
-
- static void trampoline(T* instance, void* context, CCallback* callback)
- {
- if(instance && *callback) {
- (static_cast<T*>(instance)->**callback)(context);
- }
- }
-
- volatile CThunkTrampoline m_thunk;
-
- inline void init(T *instance, CCallback callback, void* context)
- {
- /* remember callback - need to add this level of redirection
- as pointer size for member functions differs between platforms */
- m_callback = callback;
-
- /* populate thunking trampoline */
- CTHUNK_ASSIGMENT;
- m_thunk.context = (uint32_t)context;
- m_thunk.instance = (uint32_t)instance;
- m_thunk.callback = (uint32_t)&m_callback;
- m_thunk.trampoline = (uint32_t)&trampoline;
-
- __ISB();
- __DSB();
- }
-};
-
-#endif/*__CTHUNK_H__*/
--- a/CallChain.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,181 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_CALLCHAIN_H
-#define MBED_CALLCHAIN_H
-
-#include "FunctionPointer.h"
-#include <string.h>
-
-namespace mbed {
-
-/** Group one or more functions in an instance of a CallChain, then call them in
- * sequence using CallChain::call(). Used mostly by the interrupt chaining code,
- * but can be used for other purposes.
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * CallChain chain;
- *
- * void first(void) {
- * printf("'first' function.\n");
- * }
- *
- * void second(void) {
- * printf("'second' function.\n");
- * }
- *
- * class Test {
- * public:
- * void f(void) {
- * printf("A::f (class member).\n");
- * }
- * };
- *
- * int main() {
- * Test test;
- *
- * chain.add(second);
- * chain.add_front(first);
- * chain.add(&test, &Test::f);
- * chain.call();
- * }
- * @endcode
- */
-
-typedef FunctionPointer* pFunctionPointer_t;
-
-class CallChain {
-public:
- /** Create an empty chain
- *
- * @param size (optional) Initial size of the chain
- */
- CallChain(int size = 4);
- virtual ~CallChain();
-
- /** Add a function at the end of the chain
- *
- * @param function A pointer to a void function
- *
- * @returns
- * The function object created for 'function'
- */
- pFunctionPointer_t add(void (*function)(void));
-
- /** Add a function at the end of the chain
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- *
- * @returns
- * The function object created for 'tptr' and 'mptr'
- */
- template<typename T>
- pFunctionPointer_t add(T *tptr, void (T::*mptr)(void)) {
- return common_add(new FunctionPointer(tptr, mptr));
- }
-
- /** Add a function at the beginning of the chain
- *
- * @param function A pointer to a void function
- *
- * @returns
- * The function object created for 'function'
- */
- pFunctionPointer_t add_front(void (*function)(void));
-
- /** Add a function at the beginning of the chain
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- *
- * @returns
- * The function object created for 'tptr' and 'mptr'
- */
- template<typename T>
- pFunctionPointer_t add_front(T *tptr, void (T::*mptr)(void)) {
- return common_add_front(new FunctionPointer(tptr, mptr));
- }
-
- /** Get the number of functions in the chain
- */
- int size() const;
-
- /** Get a function object from the chain
- *
- * @param i function object index
- *
- * @returns
- * The function object at position 'i' in the chain
- */
- pFunctionPointer_t get(int i) const;
-
- /** Look for a function object in the call chain
- *
- * @param f the function object to search
- *
- * @returns
- * The index of the function object if found, -1 otherwise.
- */
- int find(pFunctionPointer_t f) const;
-
- /** Clear the call chain (remove all functions in the chain).
- */
- void clear();
-
- /** Remove a function object from the chain
- *
- * @arg f the function object to remove
- *
- * @returns
- * true if the function object was found and removed, false otherwise.
- */
- bool remove(pFunctionPointer_t f);
-
- /** Call all the functions in the chain in sequence
- */
- void call();
-
-#ifdef MBED_OPERATORS
- void operator ()(void) {
- call();
- }
- pFunctionPointer_t operator [](int i) const {
- return get(i);
- }
-#endif
-
-private:
- void _check_size();
- pFunctionPointer_t common_add(pFunctionPointer_t pf);
- pFunctionPointer_t common_add_front(pFunctionPointer_t pf);
-
- pFunctionPointer_t* _chain;
- int _size;
- int _elements;
-
- /* disallow copy constructor and assignment operators */
-private:
- CallChain(const CallChain&);
- CallChain & operator = (const CallChain&);
-};
-
-} // namespace mbed
-
-#endif
-
--- a/CircularBuffer.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,98 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_CIRCULARBUFFER_H
-#define MBED_CIRCULARBUFFER_H
-
-namespace mbed {
-
-/** Templated Circular buffer class
- */
-template<typename T, uint32_t BufferSize, typename CounterType = uint32_t>
-class CircularBuffer {
-public:
- CircularBuffer() : _head(0), _tail(0), _full(false) {
- }
-
- ~CircularBuffer() {
- }
-
- /** Push the transaction to the buffer. This overwrites the buffer if it's
- * full
- *
- * @param data Data to be pushed to the buffer
- */
- void push(const T& data) {
- if (full()) {
- _tail++;
- _tail %= BufferSize;
- }
- _pool[_head++] = data;
- _head %= BufferSize;
- if (_head == _tail) {
- _full = true;
- }
- }
-
- /** Pop the transaction from the buffer
- *
- * @param data Data to be pushed to the buffer
- * @return True if the buffer is not empty and data contains a transaction, false otherwise
- */
- bool pop(T& data) {
- if (!empty()) {
- data = _pool[_tail++];
- _tail %= BufferSize;
- _full = false;
- return true;
- }
- return false;
- }
-
- /** Check if the buffer is empty
- *
- * @return True if the buffer is empty, false if not
- */
- bool empty() {
- return (_head == _tail) && !_full;
- }
-
- /** Check if the buffer is full
- *
- * @return True if the buffer is full, false if not
- */
- bool full() {
- return _full;
- }
-
- /** Reset the buffer
- *
- */
- void reset() {
- _head = 0;
- _tail = 0;
- _full = false;
- }
-
-private:
- T _pool[BufferSize];
- volatile CounterType _head;
- volatile CounterType _tail;
- volatile bool _full;
-};
-
-}
-
-#endif
--- a/DigitalIn.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,107 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DIGITALIN_H
-#define MBED_DIGITALIN_H
-
-#include "platform.h"
-
-#include "gpio_api.h"
-
-namespace mbed {
-
-/** A digital input, used for reading the state of a pin
- *
- * Example:
- * @code
- * // Flash an LED while a DigitalIn is true
- *
- * #include "mbed.h"
- *
- * DigitalIn enable(p5);
- * DigitalOut led(LED1);
- *
- * int main() {
- * while(1) {
- * if(enable) {
- * led = !led;
- * }
- * wait(0.25);
- * }
- * }
- * @endcode
- */
-class DigitalIn {
-
-public:
- /** Create a DigitalIn connected to the specified pin
- *
- * @param pin DigitalIn pin to connect to
- */
- DigitalIn(PinName pin) : gpio() {
- gpio_init_in(&gpio, pin);
- }
-
- /** Create a DigitalIn connected to the specified pin
- *
- * @param pin DigitalIn pin to connect to
- * @param mode the initial mode of the pin
- */
- DigitalIn(PinName pin, PinMode mode) : gpio() {
- gpio_init_in_ex(&gpio, pin, mode);
- }
- /** Read the input, represented as 0 or 1 (int)
- *
- * @returns
- * An integer representing the state of the input pin,
- * 0 for logical 0, 1 for logical 1
- */
- int read() {
- return gpio_read(&gpio);
- }
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone, OpenDrain
- */
- void mode(PinMode pull) {
- gpio_mode(&gpio, pull);
- }
-
- /** Return the output setting, represented as 0 or 1 (int)
- *
- * @returns
- * Non zero value if pin is connected to uc GPIO
- * 0 if gpio object was initialized with NC
- */
- int is_connected() {
- return gpio_is_connected(&gpio);
- }
-
-#ifdef MBED_OPERATORS
- /** An operator shorthand for read()
- */
- operator int() {
- return read();
- }
-#endif
-
-protected:
- gpio_t gpio;
-};
-
-} // namespace mbed
-
-#endif
--- a/DigitalInOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,124 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DIGITALINOUT_H
-#define MBED_DIGITALINOUT_H
-
-#include "platform.h"
-
-#include "gpio_api.h"
-
-namespace mbed {
-
-/** A digital input/output, used for setting or reading a bi-directional pin
- */
-class DigitalInOut {
-
-public:
- /** Create a DigitalInOut connected to the specified pin
- *
- * @param pin DigitalInOut pin to connect to
- */
- DigitalInOut(PinName pin) : gpio() {
- gpio_init_in(&gpio, pin);
- }
-
- /** Create a DigitalInOut connected to the specified pin
- *
- * @param pin DigitalInOut pin to connect to
- * @param direction the initial direction of the pin
- * @param mode the initial mode of the pin
- * @param value the initial value of the pin if is an output
- */
- DigitalInOut(PinName pin, PinDirection direction, PinMode mode, int value) : gpio() {
- gpio_init_inout(&gpio, pin, direction, mode, value);
- }
-
- /** Set the output, specified as 0 or 1 (int)
- *
- * @param value An integer specifying the pin output value,
- * 0 for logical 0, 1 (or any other non-zero value) for logical 1
- */
- void write(int value) {
- gpio_write(&gpio, value);
- }
-
- /** Return the output setting, represented as 0 or 1 (int)
- *
- * @returns
- * an integer representing the output setting of the pin if it is an output,
- * or read the input if set as an input
- */
- int read() {
- return gpio_read(&gpio);
- }
-
- /** Set as an output
- */
- void output() {
- gpio_dir(&gpio, PIN_OUTPUT);
- }
-
- /** Set as an input
- */
- void input() {
- gpio_dir(&gpio, PIN_INPUT);
- }
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone, OpenDrain
- */
- void mode(PinMode pull) {
- gpio_mode(&gpio, pull);
- }
-
- /** Return the output setting, represented as 0 or 1 (int)
- *
- * @returns
- * Non zero value if pin is connected to uc GPIO
- * 0 if gpio object was initialized with NC
- */
- int is_connected() {
- return gpio_is_connected(&gpio);
- }
-
-#ifdef MBED_OPERATORS
- /** A shorthand for write()
- */
- DigitalInOut& operator= (int value) {
- write(value);
- return *this;
- }
-
- DigitalInOut& operator= (DigitalInOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** A shorthand for read()
- */
- operator int() {
- return read();
- }
-#endif
-
-protected:
- gpio_t gpio;
-};
-
-} // namespace mbed
-
-#endif
--- a/DigitalOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,116 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DIGITALOUT_H
-#define MBED_DIGITALOUT_H
-
-#include "platform.h"
-#include "gpio_api.h"
-
-namespace mbed {
-
-/** A digital output, used for setting the state of a pin
- *
- * Example:
- * @code
- * // Toggle a LED
- * #include "mbed.h"
- *
- * DigitalOut led(LED1);
- *
- * int main() {
- * while(1) {
- * led = !led;
- * wait(0.2);
- * }
- * }
- * @endcode
- */
-class DigitalOut {
-
-public:
- /** Create a DigitalOut connected to the specified pin
- *
- * @param pin DigitalOut pin to connect to
- */
- DigitalOut(PinName pin) : gpio() {
- gpio_init_out(&gpio, pin);
- }
-
- /** Create a DigitalOut connected to the specified pin
- *
- * @param pin DigitalOut pin to connect to
- * @param value the initial pin value
- */
- DigitalOut(PinName pin, int value) : gpio() {
- gpio_init_out_ex(&gpio, pin, value);
- }
-
- /** Set the output, specified as 0 or 1 (int)
- *
- * @param value An integer specifying the pin output value,
- * 0 for logical 0, 1 (or any other non-zero value) for logical 1
- */
- void write(int value) {
- gpio_write(&gpio, value);
- }
-
- /** Return the output setting, represented as 0 or 1 (int)
- *
- * @returns
- * an integer representing the output setting of the pin,
- * 0 for logical 0, 1 for logical 1
- */
- int read() {
- return gpio_read(&gpio);
- }
-
- /** Return the output setting, represented as 0 or 1 (int)
- *
- * @returns
- * Non zero value if pin is connected to uc GPIO
- * 0 if gpio object was initialized with NC
- */
- int is_connected() {
- return gpio_is_connected(&gpio);
- }
-
-#ifdef MBED_OPERATORS
- /** A shorthand for write()
- */
- DigitalOut& operator= (int value) {
- write(value);
- return *this;
- }
-
- DigitalOut& operator= (DigitalOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** A shorthand for read()
- */
- operator int() {
- return read();
- }
-#endif
-
-protected:
- gpio_t gpio;
-};
-
-} // namespace mbed
-
-#endif
--- a/DirHandle.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,104 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DIRHANDLE_H
-#define MBED_DIRHANDLE_H
-
-#if defined(__ARMCC_VERSION) || defined(__ICCARM__)
-# define NAME_MAX 255
-typedef int mode_t;
-
-#else
-# include <sys/syslimits.h>
-#endif
-
-#include "FileHandle.h"
-
-struct dirent {
- char d_name[NAME_MAX+1];
-};
-
-namespace mbed {
-
-/** Represents a directory stream. Objects of this type are returned
- * by a FileSystemLike's opendir method. Implementations must define
- * at least closedir, readdir and rewinddir.
- *
- * If a FileSystemLike class defines the opendir method, then the
- * directories of an object of that type can be accessed by
- * DIR *d = opendir("/example/directory") (or opendir("/example")
- * to open the root of the filesystem), and then using readdir(d) etc.
- *
- * The root directory is considered to contain all FileLike and
- * FileSystemLike objects, so the DIR* returned by opendir("/") will
- * reflect this.
- */
-class DirHandle {
-
-public:
- /** Closes the directory.
- *
- * @returns
- * 0 on success,
- * -1 on error.
- */
- virtual int closedir()=0;
-
- /** Return the directory entry at the current position, and
- * advances the position to the next entry.
- *
- * @returns
- * A pointer to a dirent structure representing the
- * directory entry at the current position, or NULL on reaching
- * end of directory or error.
- */
- virtual struct dirent *readdir()=0;
-
- /** Resets the position to the beginning of the directory.
- */
- virtual void rewinddir()=0;
-
- /** Returns the current position of the DirHandle.
- *
- * @returns
- * the current position,
- * -1 on error.
- */
- virtual off_t telldir() { return -1; }
-
- /** Sets the position of the DirHandle.
- *
- * @param location The location to seek to. Must be a value returned by telldir.
- */
- virtual void seekdir(off_t location) { }
-
- virtual ~DirHandle() {}
-};
-
-} // namespace mbed
-
-typedef mbed::DirHandle DIR;
-
-extern "C" {
- DIR *opendir(const char*);
- struct dirent *readdir(DIR *);
- int closedir(DIR*);
- void rewinddir(DIR*);
- long telldir(DIR*);
- void seekdir(DIR*, long);
- int mkdir(const char *name, mode_t n);
-};
-
-#endif /* MBED_DIRHANDLE_H */
--- a/Ethernet.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,170 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ETHERNET_H
-#define MBED_ETHERNET_H
-
-#include "platform.h"
-
-#if DEVICE_ETHERNET
-
-namespace mbed {
-
-/** An ethernet interface, to use with the ethernet pins.
- *
- * Example:
- * @code
- * // Read destination and source from every ethernet packet
- *
- * #include "mbed.h"
- *
- * Ethernet eth;
- *
- * int main() {
- * char buf[0x600];
- *
- * while(1) {
- * int size = eth.receive();
- * if(size > 0) {
- * eth.read(buf, size);
- * printf("Destination: %02X:%02X:%02X:%02X:%02X:%02X\n",
- * buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
- * printf("Source: %02X:%02X:%02X:%02X:%02X:%02X\n",
- * buf[6], buf[7], buf[8], buf[9], buf[10], buf[11]);
- * }
- *
- * wait(1);
- * }
- * }
- * @endcode
- */
-class Ethernet {
-
-public:
-
- /** Initialise the ethernet interface.
- */
- Ethernet();
-
- /** Powers the hardware down.
- */
- virtual ~Ethernet();
-
- enum Mode {
- AutoNegotiate,
- HalfDuplex10,
- FullDuplex10,
- HalfDuplex100,
- FullDuplex100
- };
-
- /** Writes into an outgoing ethernet packet.
- *
- * It will append size bytes of data to the previously written bytes.
- *
- * @param data An array to write.
- * @param size The size of data.
- *
- * @returns
- * The number of written bytes.
- */
- int write(const char *data, int size);
-
- /** Send an outgoing ethernet packet.
- *
- * After filling in the data in an ethernet packet it must be send.
- * Send will provide a new packet to write to.
- *
- * @returns
- * 0 if the sending was failed,
- * or the size of the packet successfully sent.
- */
- int send();
-
- /** Recevies an arrived ethernet packet.
- *
- * Receiving an ethernet packet will drop the last received ethernet packet
- * and make a new ethernet packet ready to read.
- * If no ethernet packet is arrived it will return 0.
- *
- * @returns
- * 0 if no ethernet packet is arrived,
- * or the size of the arrived packet.
- */
- int receive();
-
- /** Read from an recevied ethernet packet.
- *
- * After receive returnd a number bigger than 0it is
- * possible to read bytes from this packet.
- * Read will write up to size bytes into data.
- *
- * It is possible to use read multible times.
- * Each time read will start reading after the last read byte before.
- *
- * @returns
- * The number of byte read.
- */
- int read(char *data, int size);
-
- /** Gives the ethernet address of the mbed.
- *
- * @param mac Must be a pointer to a 6 byte char array to copy the ethernet address in.
- */
- void address(char *mac);
-
- /** Returns if an ethernet link is pressent or not. It takes a wile after Ethernet initializion to show up.
- *
- * @returns
- * 0 if no ethernet link is pressent,
- * 1 if an ethernet link is pressent.
- *
- * Example:
- * @code
- * // Using the Ethernet link function
- * #include "mbed.h"
- *
- * Ethernet eth;
- *
- * int main() {
- * wait(1); // Needed after startup.
- * if (eth.link()) {
- * printf("online\n");
- * } else {
- * printf("offline\n");
- * }
- * }
- * @endcode
- */
- int link();
-
- /** Sets the speed and duplex parameters of an ethernet link
- *
- * - AutoNegotiate Auto negotiate speed and duplex
- * - HalfDuplex10 10 Mbit, half duplex
- * - FullDuplex10 10 Mbit, full duplex
- * - HalfDuplex100 100 Mbit, half duplex
- * - FullDuplex100 100 Mbit, full duplex
- *
- * @param mode the speed and duplex mode to set the link to:
- */
- void set_link(Mode mode);
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/FileBase.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,80 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FILEBASE_H
-#define MBED_FILEBASE_H
-
-typedef int FILEHANDLE;
-
-#include <stdio.h>
-
-#if defined(__ARMCC_VERSION) || defined(__ICCARM__)
-# define O_RDONLY 0
-# define O_WRONLY 1
-# define O_RDWR 2
-# define O_CREAT 0x0200
-# define O_TRUNC 0x0400
-# define O_APPEND 0x0008
-
-# define NAME_MAX 255
-
-typedef int mode_t;
-typedef int ssize_t;
-typedef long off_t;
-
-#else
-# include <sys/fcntl.h>
-# include <sys/types.h>
-# include <sys/syslimits.h>
-#endif
-
-#include "platform.h"
-
-namespace mbed {
-
-typedef enum {
- FilePathType,
- FileSystemPathType
-} PathType;
-
-class FileBase {
-public:
- FileBase(const char *name, PathType t);
-
- virtual ~FileBase();
-
- const char* getName(void);
- PathType getPathType(void);
-
- static FileBase *lookup(const char *name, unsigned int len);
-
- static FileBase *get(int n);
-
-protected:
- static FileBase *_head;
-
- FileBase *_next;
- const char *_name;
- PathType _path_type;
-
- /* disallow copy constructor and assignment operators */
-private:
- FileBase(const FileBase&);
- FileBase & operator = (const FileBase&);
-};
-
-} // namespace mbed
-
-#endif
--- a/FileHandle.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,119 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FILEHANDLE_H
-#define MBED_FILEHANDLE_H
-
-typedef int FILEHANDLE;
-
-#include <stdio.h>
-
-#if defined(__ARMCC_VERSION) || defined(__ICCARM__)
-typedef int ssize_t;
-typedef long off_t;
-
-#else
-# include <sys/types.h>
-#endif
-
-namespace mbed {
-
-/** An OO equivalent of the internal FILEHANDLE variable
- * and associated _sys_* functions.
- *
- * FileHandle is an abstract class, needing at least sys_write and
- * sys_read to be implmented for a simple interactive device.
- *
- * No one ever directly tals to/instanciates a FileHandle - it gets
- * created by FileSystem, and wrapped up by stdio.
- */
-class FileHandle {
-
-public:
- /** Write the contents of a buffer to the file
- *
- * @param buffer the buffer to write from
- * @param length the number of characters to write
- *
- * @returns
- * The number of characters written (possibly 0) on success, -1 on error.
- */
- virtual ssize_t write(const void* buffer, size_t length) = 0;
-
- /** Close the file
- *
- * @returns
- * Zero on success, -1 on error.
- */
- virtual int close() = 0;
-
- /** Function read
- * Reads the contents of the file into a buffer
- *
- * @param buffer the buffer to read in to
- * @param length the number of characters to read
- *
- * @returns
- * The number of characters read (zero at end of file) on success, -1 on error.
- */
- virtual ssize_t read(void* buffer, size_t length) = 0;
-
- /** Check if the handle is for a interactive terminal device.
- * If so, line buffered behaviour is used by default
- *
- * @returns
- * 1 if it is a terminal,
- * 0 otherwise
- */
- virtual int isatty() = 0;
-
- /** Move the file position to a given offset from a given location.
- *
- * @param offset The offset from whence to move to
- * @param whence SEEK_SET for the start of the file, SEEK_CUR for the
- * current file position, or SEEK_END for the end of the file.
- *
- * @returns
- * new file position on success,
- * -1 on failure or unsupported
- */
- virtual off_t lseek(off_t offset, int whence) = 0;
-
- /** Flush any buffers associated with the FileHandle, ensuring it
- * is up to date on disk
- *
- * @returns
- * 0 on success or un-needed,
- * -1 on error
- */
- virtual int fsync() = 0;
-
- virtual off_t flen() {
- /* remember our current position */
- off_t pos = lseek(0, SEEK_CUR);
- if(pos == -1) return -1;
- /* seek to the end to get the file length */
- off_t res = lseek(0, SEEK_END);
- /* return to our old position */
- lseek(pos, SEEK_SET);
- return res;
- }
-
- virtual ~FileHandle();
-};
-
-} // namespace mbed
-
-#endif
--- a/FileLike.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,44 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FILELIKE_H
-#define MBED_FILELIKE_H
-
-#include "FileBase.h"
-#include "FileHandle.h"
-
-namespace mbed {
-
-/* Class FileLike
- * A file-like object is one that can be opened with fopen by
- * fopen("/name", mode). It is intersection of the classes Base and
- * FileHandle.
- */
-class FileLike : public FileHandle, public FileBase {
-
-public:
- /* Constructor FileLike
- *
- * Variables
- * name - The name to use to open the file.
- */
- FileLike(const char *name);
-
- virtual ~FileLike();
-};
-
-} // namespace mbed
-
-#endif
--- a/FilePath.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FILEPATH_H
-#define MBED_FILEPATH_H
-
-#include "platform.h"
-
-#include "FileSystemLike.h"
-#include "FileLike.h"
-
-namespace mbed {
-
-class FilePath {
-public:
- FilePath(const char* file_path);
-
- const char* fileName(void);
-
- bool isFileSystem(void);
- FileSystemLike* fileSystem(void);
-
- bool isFile(void);
- FileLike* file(void);
- bool exists(void);
-
-private:
- const char* file_name;
- FileBase* fb;
-};
-
-} // namespace mbed
-
-#endif
--- a/FileSystemLike.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,104 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FILESYSTEMLIKE_H
-#define MBED_FILESYSTEMLIKE_H
-
-#include "platform.h"
-
-#include "FileBase.h"
-#include "FileHandle.h"
-#include "DirHandle.h"
-
-namespace mbed {
-
-/** A filesystem-like object is one that can be used to open files
- * though it by fopen("/name/filename", mode)
- *
- * Implementations must define at least open (the default definitions
- * of the rest of the functions just return error values).
- */
-class FileSystemLike : public FileBase {
-
-public:
- /** FileSystemLike constructor
- *
- * @param name The name to use for the filesystem.
- */
- FileSystemLike(const char *name);
-
- virtual ~FileSystemLike();
-
- static DirHandle *opendir();
- friend class BaseDirHandle;
-
- /** Opens a file from the filesystem
- *
- * @param filename The name of the file to open.
- * @param flags One of O_RDONLY, O_WRONLY, or O_RDWR, OR'd with
- * zero or more of O_CREAT, O_TRUNC, or O_APPEND.
- *
- * @returns
- * A pointer to a FileHandle object representing the
- * file on success, or NULL on failure.
- */
- virtual FileHandle *open(const char *filename, int flags) = 0;
-
- /** Remove a file from the filesystem.
- *
- * @param filename the name of the file to remove.
- * @param returns 0 on success, -1 on failure.
- */
- virtual int remove(const char *filename) { return -1; };
-
- /** Rename a file in the filesystem.
- *
- * @param oldname the name of the file to rename.
- * @param newname the name to rename it to.
- *
- * @returns
- * 0 on success,
- * -1 on failure.
- */
- virtual int rename(const char *oldname, const char *newname) { return -1; };
-
- /** Opens a directory in the filesystem and returns a DirHandle
- * representing the directory stream.
- *
- * @param name The name of the directory to open.
- *
- * @returns
- * A DirHandle representing the directory stream, or
- * NULL on failure.
- */
- virtual DirHandle *opendir(const char *name) { return NULL; };
-
- /** Creates a directory in the filesystem.
- *
- * @param name The name of the directory to create.
- * @param mode The permissions to create the directory with.
- *
- * @returns
- * 0 on success,
- * -1 on failure.
- */
- virtual int mkdir(const char *name, mode_t mode) { return -1; }
-
- // TODO other filesystem functions (mkdir, rm, rn, ls etc)
-};
-
-} // namespace mbed
-
-#endif
--- a/FunctionPointer.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,202 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_FUNCTIONPOINTER_H
-#define MBED_FUNCTIONPOINTER_H
-
-#include <string.h>
-#include <stdint.h>
-
-namespace mbed {
-
-/* If we had variaditic templates, this wouldn't be a problem, but until C++11 is enabled, we are stuck with multiple classes... */
-
-/** A class for storing and calling a pointer to a static or member function
- */
-template <typename R, typename A1>
-class FunctionPointerArg1{
-public:
- /** Create a FunctionPointer, attaching a static function
- *
- * @param function The static function to attach (default is none)
- */
- FunctionPointerArg1(R (*function)(A1) = 0) {
- attach(function);
- }
-
- /** Create a FunctionPointer, attaching a member function
- *
- * @param object The object pointer to invoke the member function on (i.e. the this pointer)
- * @param function The address of the member function to attach
- */
- template<typename T>
- FunctionPointerArg1(T *object, R (T::*member)(A1)) {
- attach(object, member);
- }
-
- /** Attach a static function
- *
- * @param function The static function to attach (default is none)
- */
- void attach(R (*function)(A1)) {
- _p.function = function;
- _membercaller = 0;
- }
-
- /** Attach a member function
- *
- * @param object The object pointer to invoke the member function on (i.e. the this pointer)
- * @param function The address of the member function to attach
- */
- template<typename T>
- void attach(T *object, R (T::*member)(A1)) {
- _p.object = static_cast<void*>(object);
- *reinterpret_cast<R (T::**)(A1)>(_member) = member;
- _membercaller = &FunctionPointerArg1::membercaller<T>;
- }
-
- /** Call the attached static or member function
- */
- R call(A1 a) {
- if (_membercaller == 0 && _p.function) {
- return _p.function(a);
- } else if (_membercaller && _p.object) {
- return _membercaller(_p.object, _member, a);
- }
- return (R)0;
- }
-
- /** Get registered static function
- */
- R(*get_function(A1))() {
- return _membercaller ? (R(*)(A1))0 : (R(*)(A1))_p.function;
- }
-
-#ifdef MBED_OPERATORS
- R operator ()(A1 a) {
- return call(a);
- }
- operator bool(void) const {
- return (_membercaller != NULL ? _p.object : (void*)_p.function) != NULL;
- }
-#endif
-private:
- template<typename T>
- static R membercaller(void *object, uintptr_t *member, A1 a) {
- T* o = static_cast<T*>(object);
- R (T::**m)(A1) = reinterpret_cast<R (T::**)(A1)>(member);
- return (o->**m)(a);
- }
-
- union {
- R (*function)(A1); // static function pointer
- void *object; // object this pointer
- } _p;
- uintptr_t _member[4]; // aligned raw member function pointer storage - converted back by registered _membercaller
- R (*_membercaller)(void*, uintptr_t*, A1); // registered membercaller function to convert back and call _m.member on _object
-};
-
-/** A class for storing and calling a pointer to a static or member function (R ()(void))
- */
-template <typename R>
-class FunctionPointerArg1<R, void>{
-public:
- /** Create a FunctionPointer, attaching a static function
- *
- * @param function The static function to attach (default is none)
- */
- FunctionPointerArg1(R (*function)(void) = 0) {
- attach(function);
- }
-
- /** Create a FunctionPointer, attaching a member function
- *
- * @param object The object pointer to invoke the member function on (i.e. the this pointer)
- * @param function The address of the void member function to attach
- */
- template<typename T>
- FunctionPointerArg1(T *object, R (T::*member)(void)) {
- attach(object, member);
- }
-
- /** Attach a static function
- *
- * @param function The void static function to attach (default is none)
- */
- void attach(R (*function)(void)) {
- _p.function = function;
- _membercaller = 0;
- }
-
- /** Attach a member function
- *
- * @param object The object pointer to invoke the member function on (i.e. the this pointer)
- * @param function The address of the void member function to attach
- */
- template<typename T>
- void attach(T *object, R (T::*member)(void)) {
- _p.object = static_cast<void*>(object);
- *reinterpret_cast<R (T::**)(void)>(_member) = member;
- _membercaller = &FunctionPointerArg1::membercaller<T>;
- }
-
- /** Call the attached static or member function
- */
- R call(){
- if (_membercaller == 0 && _p.function) {
- return _p.function();
- } else if (_membercaller && _p.object) {
- return _membercaller(_p.object, _member);
- }
- return (R)0;
- }
-
- /** Get registered static function
- */
- R(*get_function())() {
- return _membercaller ? (R(*)())0 : (R(*)())_p.function;
- }
-
-#ifdef MBED_OPERATORS
- R operator ()(void) {
- return call();
- }
- operator bool(void) const {
- return (_membercaller != NULL ? _p.object : (void*)_p.function) != NULL;
- }
-#endif
-
-private:
- template<typename T>
- static R membercaller(void *object, uintptr_t *member) {
- T* o = static_cast<T*>(object);
- R (T::**m)(void) = reinterpret_cast<R (T::**)(void)>(member);
- return (o->**m)();
- }
-
- union {
- R (*function)(void); // static function pointer
- void *object; // object this pointer
- } _p;
- uintptr_t _member[4]; // aligned raw member function pointer storage - converted back by registered _membercaller
- R (*_membercaller)(void*, uintptr_t*); // registered membercaller function to convert back and call _m.member on _object
-};
-
-typedef FunctionPointerArg1<void, void> FunctionPointer;
-typedef FunctionPointerArg1<void, int> event_callback_t;
-
-} // namespace mbed
-
-#endif
--- a/I2C.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,176 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_I2C_H
-#define MBED_I2C_H
-
-#include "platform.h"
-
-#if DEVICE_I2C
-
-#include "i2c_api.h"
-
-#if DEVICE_I2C_ASYNCH
-#include "CThunk.h"
-#include "dma_api.h"
-#include "FunctionPointer.h"
-#endif
-
-namespace mbed {
-
-/** An I2C Master, used for communicating with I2C slave devices
- *
- * Example:
- * @code
- * // Read from I2C slave at address 0x62
- *
- * #include "mbed.h"
- *
- * I2C i2c(p28, p27);
- *
- * int main() {
- * int address = 0x62;
- * char data[2];
- * i2c.read(address, data, 2);
- * }
- * @endcode
- */
-class I2C {
-
-public:
- enum RxStatus {
- NoData,
- MasterGeneralCall,
- MasterWrite,
- MasterRead
- };
-
- enum Acknowledge {
- NoACK = 0,
- ACK = 1
- };
-
- /** Create an I2C Master interface, connected to the specified pins
- *
- * @param sda I2C data line pin
- * @param scl I2C clock line pin
- */
- I2C(PinName sda, PinName scl);
-
- /** Set the frequency of the I2C interface
- *
- * @param hz The bus frequency in hertz
- */
- void frequency(int hz);
-
- /** Read from an I2C slave
- *
- * Performs a complete read transaction. The bottom bit of
- * the address is forced to 1 to indicate a read.
- *
- * @param address 8-bit I2C slave address [ addr | 1 ]
- * @param data Pointer to the byte-array to read data in to
- * @param length Number of bytes to read
- * @param repeated Repeated start, true - don't send stop at end
- *
- * @returns
- * 0 on success (ack),
- * non-0 on failure (nack)
- */
- int read(int address, char *data, int length, bool repeated = false);
-
- /** Read a single byte from the I2C bus
- *
- * @param ack indicates if the byte is to be acknowledged (1 = acknowledge)
- *
- * @returns
- * the byte read
- */
- int read(int ack);
-
- /** Write to an I2C slave
- *
- * Performs a complete write transaction. The bottom bit of
- * the address is forced to 0 to indicate a write.
- *
- * @param address 8-bit I2C slave address [ addr | 0 ]
- * @param data Pointer to the byte-array data to send
- * @param length Number of bytes to send
- * @param repeated Repeated start, true - do not send stop at end
- *
- * @returns
- * 0 on success (ack),
- * non-0 on failure (nack)
- */
- int write(int address, const char *data, int length, bool repeated = false);
-
- /** Write single byte out on the I2C bus
- *
- * @param data data to write out on bus
- *
- * @returns
- * '1' if an ACK was received,
- * '0' otherwise
- */
- int write(int data);
-
- /** Creates a start condition on the I2C bus
- */
-
- void start(void);
-
- /** Creates a stop condition on the I2C bus
- */
- void stop(void);
-
-#if DEVICE_I2C_ASYNCH
-
- /** Start non-blocking I2C transfer.
- *
- * @param address 8/10 bit I2c slave address
- * @param tx_buffer The TX buffer with data to be transfered
- * @param tx_length The length of TX buffer in bytes
- * @param rx_buffer The RX buffer which is used for received data
- * @param rx_length The length of RX buffer in bytes
- * @param event The logical OR of events to modify
- * @param callback The event callback function
- * @param repeated Repeated start, true - do not send stop at end
- * @return Zero if the transfer has started, or -1 if I2C peripheral is busy
- */
- int transfer(int address, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, const event_callback_t& callback, int event = I2C_EVENT_TRANSFER_COMPLETE, bool repeated = false);
-
- /** Abort the on-going I2C transfer
- */
- void abort_transfer();
-protected:
- void irq_handler_asynch(void);
- event_callback_t _callback;
- CThunk<I2C> _irq;
- DMAUsage _usage;
-#endif
-
-protected:
- void aquire();
-
- i2c_t _i2c;
- static I2C *_owner;
- int _hz;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/I2CSlave.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,154 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_I2C_SLAVE_H
-#define MBED_I2C_SLAVE_H
-
-#include "platform.h"
-
-#if DEVICE_I2CSLAVE
-
-#include "i2c_api.h"
-
-namespace mbed {
-
-/** An I2C Slave, used for communicating with an I2C Master device
- *
- * Example:
- * @code
- * // Simple I2C responder
- * #include <mbed.h>
- *
- * I2CSlave slave(p9, p10);
- *
- * int main() {
- * char buf[10];
- * char msg[] = "Slave!";
- *
- * slave.address(0xA0);
- * while (1) {
- * int i = slave.receive();
- * switch (i) {
- * case I2CSlave::ReadAddressed:
- * slave.write(msg, strlen(msg) + 1); // Includes null char
- * break;
- * case I2CSlave::WriteGeneral:
- * slave.read(buf, 10);
- * printf("Read G: %s\n", buf);
- * break;
- * case I2CSlave::WriteAddressed:
- * slave.read(buf, 10);
- * printf("Read A: %s\n", buf);
- * break;
- * }
- * for(int i = 0; i < 10; i++) buf[i] = 0; // Clear buffer
- * }
- * }
- * @endcode
- */
-class I2CSlave {
-
-public:
- enum RxStatus {
- NoData = 0,
- ReadAddressed = 1,
- WriteGeneral = 2,
- WriteAddressed = 3
- };
-
- /** Create an I2C Slave interface, connected to the specified pins.
- *
- * @param sda I2C data line pin
- * @param scl I2C clock line pin
- */
- I2CSlave(PinName sda, PinName scl);
-
- /** Set the frequency of the I2C interface
- *
- * @param hz The bus frequency in hertz
- */
- void frequency(int hz);
-
- /** Checks to see if this I2C Slave has been addressed.
- *
- * @returns
- * A status indicating if the device has been addressed, and how
- * - NoData - the slave has not been addressed
- * - ReadAddressed - the master has requested a read from this slave
- * - WriteAddressed - the master is writing to this slave
- * - WriteGeneral - the master is writing to all slave
- */
- int receive(void);
-
- /** Read from an I2C master.
- *
- * @param data pointer to the byte array to read data in to
- * @param length maximum number of bytes to read
- *
- * @returns
- * 0 on success,
- * non-0 otherwise
- */
- int read(char *data, int length);
-
- /** Read a single byte from an I2C master.
- *
- * @returns
- * the byte read
- */
- int read(void);
-
- /** Write to an I2C master.
- *
- * @param data pointer to the byte array to be transmitted
- * @param length the number of bytes to transmite
- *
- * @returns
- * 0 on success,
- * non-0 otherwise
- */
- int write(const char *data, int length);
-
- /** Write a single byte to an I2C master.
- *
- * @data the byte to write
- *
- * @returns
- * '1' if an ACK was received,
- * '0' otherwise
- */
- int write(int data);
-
- /** Sets the I2C slave address.
- *
- * @param address The address to set for the slave (ignoring the least
- * signifcant bit). If set to 0, the slave will only respond to the
- * general call address.
- */
- void address(int address);
-
- /** Reset the I2C slave back into the known ready receiving state.
- */
- void stop(void);
-
-protected:
- i2c_t _i2c;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/InterruptIn.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,135 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_INTERRUPTIN_H
-#define MBED_INTERRUPTIN_H
-
-#include "platform.h"
-
-#if DEVICE_INTERRUPTIN
-
-#include "gpio_api.h"
-#include "gpio_irq_api.h"
-#include "FunctionPointer.h"
-
-namespace mbed {
-
-/** A digital interrupt input, used to call a function on a rising or falling edge
- *
- * Example:
- * @code
- * // Flash an LED while waiting for events
- *
- * #include "mbed.h"
- *
- * InterruptIn event(p16);
- * DigitalOut led(LED1);
- *
- * void trigger() {
- * printf("triggered!\n");
- * }
- *
- * int main() {
- * event.rise(&trigger);
- * while(1) {
- * led = !led;
- * wait(0.25);
- * }
- * }
- * @endcode
- */
-class InterruptIn {
-
-public:
-
- /** Create an InterruptIn connected to the specified pin
- *
- * @param pin InterruptIn pin to connect to
- * @param name (optional) A string to identify the object
- */
- InterruptIn(PinName pin);
- virtual ~InterruptIn();
-
- int read();
-#ifdef MBED_OPERATORS
- operator int();
-
-#endif
-
- /** Attach a function to call when a rising edge occurs on the input
- *
- * @param fptr A pointer to a void function, or 0 to set as none
- */
- void rise(void (*fptr)(void));
-
- /** Attach a member function to call when a rising edge occurs on the input
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- */
- template<typename T>
- void rise(T* tptr, void (T::*mptr)(void)) {
- _rise.attach(tptr, mptr);
- gpio_irq_set(&gpio_irq, IRQ_RISE, 1);
- }
-
- /** Attach a function to call when a falling edge occurs on the input
- *
- * @param fptr A pointer to a void function, or 0 to set as none
- */
- void fall(void (*fptr)(void));
-
- /** Attach a member function to call when a falling edge occurs on the input
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- */
- template<typename T>
- void fall(T* tptr, void (T::*mptr)(void)) {
- _fall.attach(tptr, mptr);
- gpio_irq_set(&gpio_irq, IRQ_FALL, 1);
- }
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone
- */
- void mode(PinMode pull);
-
- /** Enable IRQ. This method depends on hw implementation, might enable one
- * port interrupts. For further information, check gpio_irq_enable().
- */
- void enable_irq();
-
- /** Disable IRQ. This method depends on hw implementation, might disable one
- * port interrupts. For further information, check gpio_irq_disable().
- */
- void disable_irq();
-
- static void _irq_handler(uint32_t id, gpio_irq_event event);
-
-protected:
- gpio_t gpio;
- gpio_irq_t gpio_irq;
-
- FunctionPointer _rise;
- FunctionPointer _fall;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/InterruptManager.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,143 +0,0 @@
-#ifndef MBED_INTERRUPTMANAGER_H
-#define MBED_INTERRUPTMANAGER_H
-
-#include "cmsis.h"
-#include "CallChain.h"
-#include <string.h>
-
-namespace mbed {
-
-/** Use this singleton if you need to chain interrupt handlers.
- *
- * Example (for LPC1768):
- * @code
- * #include "InterruptManager.h"
- * #include "mbed.h"
- *
- * Ticker flipper;
- * DigitalOut led1(LED1);
- * DigitalOut led2(LED2);
- *
- * void flip(void) {
- * led1 = !led1;
- * }
- *
- * void handler(void) {
- * led2 = !led1;
- * }
- *
- * int main() {
- * led1 = led2 = 0;
- * flipper.attach(&flip, 1.0);
- * InterruptManager::get()->add_handler(handler, TIMER3_IRQn);
- * }
- * @endcode
- */
-class InterruptManager {
-public:
- /** Return the only instance of this class
- */
- static InterruptManager* get();
-
- /** Destroy the current instance of the interrupt manager
- */
- static void destroy();
-
- /** Add a handler for an interrupt at the end of the handler list
- *
- * @param function the handler to add
- * @param irq interrupt number
- *
- * @returns
- * The function object created for 'function'
- */
- pFunctionPointer_t add_handler(void (*function)(void), IRQn_Type irq) {
- return add_common(function, irq);
- }
-
- /** Add a handler for an interrupt at the beginning of the handler list
- *
- * @param function the handler to add
- * @param irq interrupt number
- *
- * @returns
- * The function object created for 'function'
- */
- pFunctionPointer_t add_handler_front(void (*function)(void), IRQn_Type irq) {
- return add_common(function, irq, true);
- }
-
- /** Add a handler for an interrupt at the end of the handler list
- *
- * @param tptr pointer to the object that has the handler function
- * @param mptr pointer to the actual handler function
- * @param irq interrupt number
- *
- * @returns
- * The function object created for 'tptr' and 'mptr'
- */
- template<typename T>
- pFunctionPointer_t add_handler(T* tptr, void (T::*mptr)(void), IRQn_Type irq) {
- return add_common(tptr, mptr, irq);
- }
-
- /** Add a handler for an interrupt at the beginning of the handler list
- *
- * @param tptr pointer to the object that has the handler function
- * @param mptr pointer to the actual handler function
- * @param irq interrupt number
- *
- * @returns
- * The function object created for 'tptr' and 'mptr'
- */
- template<typename T>
- pFunctionPointer_t add_handler_front(T* tptr, void (T::*mptr)(void), IRQn_Type irq) {
- return add_common(tptr, mptr, irq, true);
- }
-
- /** Remove a handler from an interrupt
- *
- * @param handler the function object for the handler to remove
- * @param irq the interrupt number
- *
- * @returns
- * true if the handler was found and removed, false otherwise
- */
- bool remove_handler(pFunctionPointer_t handler, IRQn_Type irq);
-
-private:
- InterruptManager();
- ~InterruptManager();
-
- // We declare the copy contructor and the assignment operator, but we don't
- // implement them. This way, if someone tries to copy/assign our instance,
- // he will get an error at compile time.
- InterruptManager(const InterruptManager&);
- InterruptManager& operator =(const InterruptManager&);
-
- template<typename T>
- pFunctionPointer_t add_common(T *tptr, void (T::*mptr)(void), IRQn_Type irq, bool front=false) {
- int irq_pos = get_irq_index(irq);
- bool change = must_replace_vector(irq);
-
- pFunctionPointer_t pf = front ? _chains[irq_pos]->add_front(tptr, mptr) : _chains[irq_pos]->add(tptr, mptr);
- if (change)
- NVIC_SetVector(irq, (uint32_t)&InterruptManager::static_irq_helper);
- return pf;
- }
-
- pFunctionPointer_t add_common(void (*function)(void), IRQn_Type irq, bool front=false);
- bool must_replace_vector(IRQn_Type irq);
- int get_irq_index(IRQn_Type irq);
- void irq_helper();
- void add_helper(void (*function)(void), IRQn_Type irq, bool front=false);
- static void static_irq_helper();
-
- CallChain* _chains[NVIC_NUM_VECTORS];
- static InterruptManager* _instance;
-};
-
-} // namespace mbed
-
-#endif
-
--- a/LocalFileSystem.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,103 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_LOCALFILESYSTEM_H
-#define MBED_LOCALFILESYSTEM_H
-
-#include "platform.h"
-
-#if DEVICE_LOCALFILESYSTEM
-
-#include "FileSystemLike.h"
-
-namespace mbed {
-
-FILEHANDLE local_file_open(const char* name, int flags);
-
-class LocalFileHandle : public FileHandle {
-
-public:
- LocalFileHandle(FILEHANDLE fh);
-
- virtual int close();
-
- virtual ssize_t write(const void *buffer, size_t length);
-
- virtual ssize_t read(void *buffer, size_t length);
-
- virtual int isatty();
-
- virtual off_t lseek(off_t position, int whence);
-
- virtual int fsync();
-
- virtual off_t flen();
-
-protected:
- FILEHANDLE _fh;
- int pos;
-};
-
-/** A filesystem for accessing the local mbed Microcontroller USB disk drive
- *
- * This allows programs to read and write files on the same disk drive that is used to program the
- * mbed Microcontroller. Once created, the standard C file access functions are used to open,
- * read and write files.
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * LocalFileSystem local("local"); // Create the local filesystem under the name "local"
- *
- * int main() {
- * FILE *fp = fopen("/local/out.txt", "w"); // Open "out.txt" on the local file system for writing
- * fprintf(fp, "Hello World!");
- * fclose(fp);
- * remove("/local/out.txt"); // Removes the file "out.txt" from the local file system
- *
- * DIR *d = opendir("/local"); // Opens the root directory of the local file system
- * struct dirent *p;
- * while((p = readdir(d)) != NULL) { // Print the names of the files in the local file system
- * printf("%s\n", p->d_name); // to stdout.
- * }
- * closedir(d);
- * }
- * @endcode
- *
- * @note
- * If the microcontroller program makes an access to the local drive, it will be marked as "removed"
- * on the Host computer. This means it is no longer accessible from the Host Computer.
- *
- * The drive will only re-appear when the microcontroller program exists. Note that if the program does
- * not exit, you will need to hold down reset on the mbed Microcontroller to be able to see the drive again!
- */
-class LocalFileSystem : public FileSystemLike {
-
-public:
- LocalFileSystem(const char* n) : FileSystemLike(n) {
-
- }
-
- virtual FileHandle *open(const char* name, int flags);
- virtual int remove(const char *filename);
- virtual DirHandle *opendir(const char *name);
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/LowPowerTicker.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,44 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_LOWPOWERTICKER_H
-#define MBED_LOWPOWERTICKER_H
-
-#include "platform.h"
-#include "Ticker.h"
-
-#if DEVICE_LOWPOWERTIMER
-
-#include "lp_ticker_api.h"
-
-namespace mbed {
-
-/** Low Power Ticker
- */
-class LowPowerTicker : public Ticker {
-
-public:
- LowPowerTicker() : Ticker(get_lp_ticker_data()) {
- }
-
- virtual ~LowPowerTicker() {
- }
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/LowPowerTimeout.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_LOWPOWERTIMEOUT_H
-#define MBED_LOWPOWERTIMEOUT_H
-
-#include "platform.h"
-
-#if DEVICE_LOWPOWERTIMER
-
-#include "lp_ticker_api.h"
-#include "LowPowerTicker.h"
-
-namespace mbed {
-
-/** Low Power Timout
- */
-class LowPowerTimeout : public LowPowerTicker {
-
-private:
- virtual void handler(void) {
- _function.call();
- }
-};
-
-}
-
-#endif
-
-#endif
--- a/LowPowerTimer.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_LOWPOWERTIMER_H
-#define MBED_LOWPOWERTIMER_H
-
-#include "platform.h"
-#include "Timer.h"
-
-#if DEVICE_LOWPOWERTIMER
-
-#include "lp_ticker_api.h"
-
-namespace mbed {
-
-/** Low power timer
- */
-class LowPowerTimer : public Timer {
-
-public:
- LowPowerTimer() : Timer(get_lp_ticker_data()) {
- }
-
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/PortIn.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,93 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PORTIN_H
-#define MBED_PORTIN_H
-
-#include "platform.h"
-
-#if DEVICE_PORTIN
-
-#include "port_api.h"
-
-namespace mbed {
-
-/** A multiple pin digital input
- *
- * Example:
- * @code
- * // Switch on an LED if any of mbed pins 21-26 is high
- *
- * #include "mbed.h"
- *
- * PortIn p(Port2, 0x0000003F); // p21-p26
- * DigitalOut ind(LED4);
- *
- * int main() {
- * while(1) {
- * int pins = p.read();
- * if(pins) {
- * ind = 1;
- * } else {
- * ind = 0;
- * }
- * }
- * }
- * @endcode
- */
-class PortIn {
-public:
-
- /** Create an PortIn, connected to the specified port
- *
- * @param port Port to connect to (Port0-Port5)
- * @param mask A bitmask to identify which bits in the port should be included (0 - ignore)
- */
- PortIn(PortName port, int mask = 0xFFFFFFFF) {
- port_init(&_port, port, mask, PIN_INPUT);
- }
-
- /** Read the value currently output on the port
- *
- * @returns
- * An integer with each bit corresponding to associated port pin setting
- */
- int read() {
- return port_read(&_port);
- }
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone, OpenDrain
- */
- void mode(PinMode mode) {
- port_mode(&_port, mode);
- }
-
- /** A shorthand for read()
- */
- operator int() {
- return read();
- }
-
-private:
- port_t _port;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/PortInOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,104 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PORTINOUT_H
-#define MBED_PORTINOUT_H
-
-#include "platform.h"
-
-#if DEVICE_PORTINOUT
-
-#include "port_api.h"
-
-namespace mbed {
-
-/** A multiple pin digital in/out used to set/read multiple bi-directional pins
- */
-class PortInOut {
-public:
-
- /** Create an PortInOut, connected to the specified port
- *
- * @param port Port to connect to (Port0-Port5)
- * @param mask A bitmask to identify which bits in the port should be included (0 - ignore)
- */
- PortInOut(PortName port, int mask = 0xFFFFFFFF) {
- port_init(&_port, port, mask, PIN_INPUT);
- }
-
- /** Write the value to the output port
- *
- * @param value An integer specifying a bit to write for every corresponding port pin
- */
- void write(int value) {
- port_write(&_port, value);
- }
-
- /** Read the value currently output on the port
- *
- * @returns
- * An integer with each bit corresponding to associated port pin setting
- */
- int read() {
- return port_read(&_port);
- }
-
- /** Set as an output
- */
- void output() {
- port_dir(&_port, PIN_OUTPUT);
- }
-
- /** Set as an input
- */
- void input() {
- port_dir(&_port, PIN_INPUT);
- }
-
- /** Set the input pin mode
- *
- * @param mode PullUp, PullDown, PullNone, OpenDrain
- */
- void mode(PinMode mode) {
- port_mode(&_port, mode);
- }
-
- /** A shorthand for write()
- */
- PortInOut& operator= (int value) {
- write(value);
- return *this;
- }
-
- PortInOut& operator= (PortInOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** A shorthand for read()
- */
- operator int() {
- return read();
- }
-
-private:
- port_t _port;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/PortOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,104 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PORTOUT_H
-#define MBED_PORTOUT_H
-
-#include "platform.h"
-
-#if DEVICE_PORTOUT
-
-#include "port_api.h"
-
-namespace mbed {
-/** A multiple pin digital out
- *
- * Example:
- * @code
- * // Toggle all four LEDs
- *
- * #include "mbed.h"
- *
- * // LED1 = P1.18 LED2 = P1.20 LED3 = P1.21 LED4 = P1.23
- * #define LED_MASK 0x00B40000
- *
- * PortOut ledport(Port1, LED_MASK);
- *
- * int main() {
- * while(1) {
- * ledport = LED_MASK;
- * wait(1);
- * ledport = 0;
- * wait(1);
- * }
- * }
- * @endcode
- */
-class PortOut {
-public:
-
- /** Create an PortOut, connected to the specified port
- *
- * @param port Port to connect to (Port0-Port5)
- * @param mask A bitmask to identify which bits in the port should be included (0 - ignore)
- */
- PortOut(PortName port, int mask = 0xFFFFFFFF) {
- port_init(&_port, port, mask, PIN_OUTPUT);
- }
-
- /** Write the value to the output port
- *
- * @param value An integer specifying a bit to write for every corresponding PortOut pin
- */
- void write(int value) {
- port_write(&_port, value);
- }
-
- /** Read the value currently output on the port
- *
- * @returns
- * An integer with each bit corresponding to associated PortOut pin setting
- */
- int read() {
- return port_read(&_port);
- }
-
- /** A shorthand for write()
- */
- PortOut& operator= (int value) {
- write(value);
- return *this;
- }
-
- PortOut& operator= (PortOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** A shorthand for read()
- */
- operator int() {
- return read();
- }
-
-private:
- port_t _port;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/PwmOut.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,158 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PWMOUT_H
-#define MBED_PWMOUT_H
-
-#include "platform.h"
-
-#if DEVICE_PWMOUT
-#include "pwmout_api.h"
-
-namespace mbed {
-
-/** A pulse-width modulation digital output
- *
- * Example
- * @code
- * // Fade a led on.
- * #include "mbed.h"
- *
- * PwmOut led(LED1);
- *
- * int main() {
- * while(1) {
- * led = led + 0.01;
- * wait(0.2);
- * if(led == 1.0) {
- * led = 0;
- * }
- * }
- * }
- * @endcode
- *
- * @note
- * On the LPC1768 and LPC2368, the PWMs all share the same
- * period - if you change the period for one, you change it for all.
- * Although routines that change the period maintain the duty cycle
- * for its PWM, all other PWMs will require their duty cycle to be
- * refreshed.
- */
-class PwmOut {
-
-public:
-
- /** Create a PwmOut connected to the specified pin
- *
- * @param pin PwmOut pin to connect to
- */
- PwmOut(PinName pin) {
- pwmout_init(&_pwm, pin);
- }
-
- /** Set the ouput duty-cycle, specified as a percentage (float)
- *
- * @param value A floating-point value representing the output duty-cycle,
- * specified as a percentage. The value should lie between
- * 0.0f (representing on 0%) and 1.0f (representing on 100%).
- * Values outside this range will be saturated to 0.0f or 1.0f.
- */
- void write(float value) {
- pwmout_write(&_pwm, value);
- }
-
- /** Return the current output duty-cycle setting, measured as a percentage (float)
- *
- * @returns
- * A floating-point value representing the current duty-cycle being output on the pin,
- * measured as a percentage. The returned value will lie between
- * 0.0f (representing on 0%) and 1.0f (representing on 100%).
- *
- * @note
- * This value may not match exactly the value set by a previous <write>.
- */
- float read() {
- return pwmout_read(&_pwm);
- }
-
- /** Set the PWM period, specified in seconds (float), keeping the duty cycle the same.
- *
- * @note
- * The resolution is currently in microseconds; periods smaller than this
- * will be set to zero.
- */
- void period(float seconds) {
- pwmout_period(&_pwm, seconds);
- }
-
- /** Set the PWM period, specified in milli-seconds (int), keeping the duty cycle the same.
- */
- void period_ms(int ms) {
- pwmout_period_ms(&_pwm, ms);
- }
-
- /** Set the PWM period, specified in micro-seconds (int), keeping the duty cycle the same.
- */
- void period_us(int us) {
- pwmout_period_us(&_pwm, us);
- }
-
- /** Set the PWM pulsewidth, specified in seconds (float), keeping the period the same.
- */
- void pulsewidth(float seconds) {
- pwmout_pulsewidth(&_pwm, seconds);
- }
-
- /** Set the PWM pulsewidth, specified in milli-seconds (int), keeping the period the same.
- */
- void pulsewidth_ms(int ms) {
- pwmout_pulsewidth_ms(&_pwm, ms);
- }
-
- /** Set the PWM pulsewidth, specified in micro-seconds (int), keeping the period the same.
- */
- void pulsewidth_us(int us) {
- pwmout_pulsewidth_us(&_pwm, us);
- }
-
-#ifdef MBED_OPERATORS
- /** A operator shorthand for write()
- */
- PwmOut& operator= (float value) {
- write(value);
- return *this;
- }
-
- PwmOut& operator= (PwmOut& rhs) {
- write(rhs.read());
- return *this;
- }
-
- /** An operator shorthand for read()
- */
- operator float() {
- return read();
- }
-#endif
-
-protected:
- pwmout_t _pwm;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/RawSerial.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,90 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_RAW_SERIAL_H
-#define MBED_RAW_SERIAL_H
-
-#include "platform.h"
-
-#if DEVICE_SERIAL
-
-#include "SerialBase.h"
-#include "serial_api.h"
-
-namespace mbed {
-
-/** A serial port (UART) for communication with other serial devices
- * This is a variation of the Serial class that doesn't use streams,
- * thus making it safe to use in interrupt handlers with the RTOS.
- *
- * Can be used for Full Duplex communication, or Simplex by specifying
- * one pin as NC (Not Connected)
- *
- * Example:
- * @code
- * // Send a char to the PC
- *
- * #include "mbed.h"
- *
- * RawSerial pc(USBTX, USBRX);
- *
- * int main() {
- * pc.putc('A');
- * }
- * @endcode
- */
-class RawSerial: public SerialBase {
-
-public:
- /** Create a RawSerial port, connected to the specified transmit and receive pins
- *
- * @param tx Transmit pin
- * @param rx Receive pin
- *
- * @note
- * Either tx or rx may be specified as NC if unused
- */
- RawSerial(PinName tx, PinName rx);
-
- /** Write a char to the serial port
- *
- * @param c The char to write
- *
- * @returns The written char or -1 if an error occured
- */
- int putc(int c);
-
- /** Read a char from the serial port
- *
- * @returns The char read from the serial port
- */
- int getc();
-
- /** Write a string to the serial port
- *
- * @param str The string to write
- *
- * @returns 0 if the write succeeds, EOF for error
- */
- int puts(const char *str);
-
- int printf(const char *format, ...);
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/SPI.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,245 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SPI_H
-#define MBED_SPI_H
-
-#include "platform.h"
-
-#if DEVICE_SPI
-
-#include "spi_api.h"
-
-#if DEVICE_SPI_ASYNCH
-#include "CThunk.h"
-#include "dma_api.h"
-#include "CircularBuffer.h"
-#include "FunctionPointer.h"
-#include "Transaction.h"
-#endif
-
-namespace mbed {
-
-/** A SPI Master, used for communicating with SPI slave devices
- *
- * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
- *
- * Most SPI devices will also require Chip Select and Reset signals. These
- * can be controlled using <DigitalOut> pins
- *
- * Example:
- * @code
- * // Send a byte to a SPI slave, and record the response
- *
- * #include "mbed.h"
- *
- * // hardware ssel (where applicable)
- * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
- *
- * // software ssel
- * SPI device(p5, p6, p7); // mosi, miso, sclk
- * DigitalOut cs(p8); // ssel
- *
- * int main() {
- * // hardware ssel (where applicable)
- * //int response = device.write(0xFF);
- *
- * // software ssel
- * cs = 0;
- * int response = device.write(0xFF);
- * cs = 1;
- * }
- * @endcode
- */
-class SPI {
-
-public:
-
- /** Create a SPI master connected to the specified pins
- *
- * mosi or miso can be specfied as NC if not used
- *
- * @param mosi SPI Master Out, Slave In pin
- * @param miso SPI Master In, Slave Out pin
- * @param sclk SPI Clock pin
- * @param ssel SPI chip select pin
- */
- SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
-
- /** Configure the data transmission format
- *
- * @param bits Number of bits per SPI frame (4 - 16)
- * @param mode Clock polarity and phase mode (0 - 3)
- *
- * @code
- * mode | POL PHA
- * -----+--------
- * 0 | 0 0
- * 1 | 0 1
- * 2 | 1 0
- * 3 | 1 1
- * @endcode
- */
- void format(int bits, int mode = 0);
-
- /** Set the spi bus clock frequency
- *
- * @param hz SCLK frequency in hz (default = 1MHz)
- */
- void frequency(int hz = 1000000);
-
- /** Write to the SPI Slave and return the response
- *
- * @param value Data to be sent to the SPI slave
- *
- * @returns
- * Response from the SPI slave
- */
- virtual int write(int value);
-
-#if DEVICE_SPI_ASYNCH
-
- /** Start non-blocking SPI transfer using 8bit buffers.
- *
- * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
- * the default SPI value is sent
- * @param tx_length The length of TX buffer in bytes
- * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
- * received data are ignored
- * @param rx_length The length of RX buffer in bytes
- * @param callback The event callback function
- * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
- * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
- */
- template<typename Type>
- int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
- if (spi_active(&_spi)) {
- return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
- }
- start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
- return 0;
- }
-
- /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
- */
- void abort_transfer();
-
- /** Clear the transaction buffer
- */
- void clear_transfer_buffer();
-
- /** Clear the transaction buffer and abort on-going transfer.
- */
- void abort_all_transfers();
-
- /** Configure DMA usage suggestion for non-blocking transfers
- *
- * @param usage The usage DMA hint for peripheral
- * @return Zero if the usage was set, -1 if a transaction is on-going
- */
- int set_dma_usage(DMAUsage usage);
-
-protected:
- /** SPI IRQ handler
- *
- */
- void irq_handler_asynch(void);
-
- /** Common transfer method
- *
- * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
- * the default SPI value is sent
- * @param tx_length The length of TX buffer in bytes
- * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
- * received data are ignored
- * @param rx_length The length of RX buffer in bytes
- * @param bit_width The buffers element width
- * @param callback The event callback function
- * @param event The logical OR of events to modify
- * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
- */
- int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
-
- /**
- *
- * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
- * the default SPI value is sent
- * @param tx_length The length of TX buffer in bytes
- * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
- * received data are ignored
- * @param rx_length The length of RX buffer in bytes
- * @param bit_width The buffers element width
- * @param callback The event callback function
- * @param event The logical OR of events to modify
- * @return Zero if a transfer was added to the queue, or -1 if the queue is full
- */
- int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
-
- /** Configures a callback, spi peripheral and initiate a new transfer
- *
- * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
- * the default SPI value is sent
- * @param tx_length The length of TX buffer in bytes
- * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
- * received data are ignored
- * @param rx_length The length of RX buffer in bytes
- * @param bit_width The buffers element width
- * @param callback The event callback function
- * @param event The logical OR of events to modify
- */
- void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
-
-#if TRANSACTION_QUEUE_SIZE_SPI
-
- /** Start a new transaction
- *
- * @param data Transaction data
- */
- void start_transaction(transaction_t *data);
-
- /** Dequeue a transaction
- *
- */
- void dequeue_transaction();
- static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
-#endif
-
-#endif
-
-public:
- virtual ~SPI() {
- }
-
-protected:
- spi_t _spi;
-
-#if DEVICE_SPI_ASYNCH
- CThunk<SPI> _irq;
- event_callback_t _callback;
- DMAUsage _usage;
-#endif
-
- void aquire(void);
- static SPI *_owner;
- int _bits;
- int _mode;
- int _hz;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/SPISlave.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,122 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SPISLAVE_H
-#define MBED_SPISLAVE_H
-
-#include "platform.h"
-
-#if DEVICE_SPISLAVE
-
-#include "spi_api.h"
-
-namespace mbed {
-
-/** A SPI slave, used for communicating with a SPI Master device
- *
- * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
- *
- * Example:
- * @code
- * // Reply to a SPI master as slave
- *
- * #include "mbed.h"
- *
- * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
- *
- * int main() {
- * device.reply(0x00); // Prime SPI with first reply
- * while(1) {
- * if(device.receive()) {
- * int v = device.read(); // Read byte from master
- * v = (v + 1) % 0x100; // Add one to it, modulo 256
- * device.reply(v); // Make this the next reply
- * }
- * }
- * }
- * @endcode
- */
-class SPISlave {
-
-public:
-
- /** Create a SPI slave connected to the specified pins
- *
- * mosi or miso can be specfied as NC if not used
- *
- * @param mosi SPI Master Out, Slave In pin
- * @param miso SPI Master In, Slave Out pin
- * @param sclk SPI Clock pin
- * @param ssel SPI chip select pin
- */
- SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
-
- /** Configure the data transmission format
- *
- * @param bits Number of bits per SPI frame (4 - 16)
- * @param mode Clock polarity and phase mode (0 - 3)
- *
- * @code
- * mode | POL PHA
- * -----+--------
- * 0 | 0 0
- * 1 | 0 1
- * 2 | 1 0
- * 3 | 1 1
- * @endcode
- */
- void format(int bits, int mode = 0);
-
- /** Set the spi bus clock frequency
- *
- * @param hz SCLK frequency in hz (default = 1MHz)
- */
- void frequency(int hz = 1000000);
-
- /** Polls the SPI to see if data has been received
- *
- * @returns
- * 0 if no data,
- * 1 otherwise
- */
- int receive(void);
-
- /** Retrieve data from receive buffer as slave
- *
- * @returns
- * the data in the receive buffer
- */
- int read(void);
-
- /** Fill the transmission buffer with the value to be written out
- * as slave on the next received message from the master.
- *
- * @param value the data to be transmitted next
- */
- void reply(int value);
-
-protected:
- spi_t _spi;
-
- int _bits;
- int _mode;
- int _hz;
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/Serial.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,74 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SERIAL_H
-#define MBED_SERIAL_H
-
-#include "platform.h"
-
-#if DEVICE_SERIAL
-
-#include "Stream.h"
-#include "SerialBase.h"
-#include "serial_api.h"
-
-namespace mbed {
-
-/** A serial port (UART) for communication with other serial devices
- *
- * Can be used for Full Duplex communication, or Simplex by specifying
- * one pin as NC (Not Connected)
- *
- * Example:
- * @code
- * // Print "Hello World" to the PC
- *
- * #include "mbed.h"
- *
- * Serial pc(USBTX, USBRX);
- *
- * int main() {
- * pc.printf("Hello World\n");
- * }
- * @endcode
- */
-class Serial : public SerialBase, public Stream {
-
-public:
-#if DEVICE_SERIAL_ASYNCH
- using SerialBase::read;
- using SerialBase::write;
-#endif
-
- /** Create a Serial port, connected to the specified transmit and receive pins
- *
- * @param tx Transmit pin
- * @param rx Receive pin
- *
- * @note
- * Either tx or rx may be specified as NC if unused
- */
- Serial(PinName tx, PinName rx, const char *name=NULL);
-
-protected:
- virtual int _getc();
- virtual int _putc(int c);
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/SerialBase.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,223 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SERIALBASE_H
-#define MBED_SERIALBASE_H
-
-#include "platform.h"
-
-#if DEVICE_SERIAL
-
-#include "Stream.h"
-#include "FunctionPointer.h"
-#include "serial_api.h"
-
-#if DEVICE_SERIAL_ASYNCH
-#include "CThunk.h"
-#include "dma_api.h"
-#endif
-
-namespace mbed {
-
-/** A base class for serial port implementations
- * Can't be instantiated directly (use Serial or RawSerial)
- */
-class SerialBase {
-
-public:
- /** Set the baud rate of the serial port
- *
- * @param baudrate The baudrate of the serial port (default = 9600).
- */
- void baud(int baudrate);
-
- enum Parity {
- None = 0,
- Odd,
- Even,
- Forced1,
- Forced0
- };
-
- enum IrqType {
- RxIrq = 0,
- TxIrq
- };
-
- enum Flow {
- Disabled = 0,
- RTS,
- CTS,
- RTSCTS
- };
-
- /** Set the transmission format used by the serial port
- *
- * @param bits The number of bits in a word (5-8; default = 8)
- * @param parity The parity used (SerialBase::None, SerialBase::Odd, SerialBase::Even, SerialBase::Forced1, SerialBase::Forced0; default = SerialBase::None)
- * @param stop The number of stop bits (1 or 2; default = 1)
- */
- void format(int bits=8, Parity parity=SerialBase::None, int stop_bits=1);
-
- /** Determine if there is a character available to read
- *
- * @returns
- * 1 if there is a character available to read,
- * 0 otherwise
- */
- int readable();
-
- /** Determine if there is space available to write a character
- *
- * @returns
- * 1 if there is space to write a character,
- * 0 otherwise
- */
- int writeable();
-
- /** Attach a function to call whenever a serial interrupt is generated
- *
- * @param fptr A pointer to a void function, or 0 to set as none
- * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty)
- */
- void attach(void (*fptr)(void), IrqType type=RxIrq);
-
- /** Attach a member function to call whenever a serial interrupt is generated
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty)
- */
- template<typename T>
- void attach(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) {
- if((mptr != NULL) && (tptr != NULL)) {
- _irq[type].attach(tptr, mptr);
- serial_irq_set(&_serial, (SerialIrq)type, 1);
- } else {
- serial_irq_set(&_serial, (SerialIrq)type, 0);
- }
- }
-
- /** Generate a break condition on the serial line
- */
- void send_break();
-
-#if DEVICE_SERIAL_FC
- /** Set the flow control type on the serial port
- *
- * @param type the flow control type (Disabled, RTS, CTS, RTSCTS)
- * @param flow1 the first flow control pin (RTS for RTS or RTSCTS, CTS for CTS)
- * @param flow2 the second flow control pin (CTS for RTSCTS)
- */
- void set_flow_control(Flow type, PinName flow1=NC, PinName flow2=NC);
-#endif
-
- static void _irq_handler(uint32_t id, SerialIrq irq_type);
-
-#if DEVICE_SERIAL_ASYNCH
-
- /** Begin asynchronous write using 8bit buffer. The completition invokes registered TX event callback
- *
- * @param buffer The buffer where received data will be stored
- * @param length The buffer length in bytes
- * @param callback The event callback function
- * @param event The logical OR of TX events
- */
- int write(const uint8_t *buffer, int length, const event_callback_t& callback, int event = SERIAL_EVENT_TX_COMPLETE);
-
- /** Begin asynchronous write using 16bit buffer. The completition invokes registered TX event callback
- *
- * @param buffer The buffer where received data will be stored
- * @param length The buffer length in bytes
- * @param callback The event callback function
- * @param event The logical OR of TX events
- */
- int write(const uint16_t *buffer, int length, const event_callback_t& callback, int event = SERIAL_EVENT_TX_COMPLETE);
-
- /** Abort the on-going write transfer
- */
- void abort_write();
-
- /** Begin asynchronous reading using 8bit buffer. The completition invokes registred RX event callback.
- *
- * @param buffer The buffer where received data will be stored
- * @param length The buffer length in bytes
- * @param callback The event callback function
- * @param event The logical OR of RX events
- * @param char_match The matching character
- */
- int read(uint8_t *buffer, int length, const event_callback_t& callback, int event = SERIAL_EVENT_RX_COMPLETE, unsigned char char_match = SERIAL_RESERVED_CHAR_MATCH);
-
- /** Begin asynchronous reading using 16bit buffer. The completition invokes registred RX event callback.
- *
- * @param buffer The buffer where received data will be stored
- * @param length The buffer length in bytes
- * @param callback The event callback function
- * @param event The logical OR of RX events
- * @param char_match The matching character
- */
- int read(uint16_t *buffer, int length, const event_callback_t& callback, int event = SERIAL_EVENT_RX_COMPLETE, unsigned char char_match = SERIAL_RESERVED_CHAR_MATCH);
-
- /** Abort the on-going read transfer
- */
- void abort_read();
-
- /** Configure DMA usage suggestion for non-blocking TX transfers
- *
- * @param usage The usage DMA hint for peripheral
- * @return Zero if the usage was set, -1 if a transaction is on-going
- */
- int set_dma_usage_tx(DMAUsage usage);
-
- /** Configure DMA usage suggestion for non-blocking RX transfers
- *
- * @param usage The usage DMA hint for peripheral
- * @return Zero if the usage was set, -1 if a transaction is on-going
- */
- int set_dma_usage_rx(DMAUsage usage);
-
-protected:
- void start_read(void *buffer, int buffer_size, char buffer_width, const event_callback_t& callback, int event, unsigned char char_match);
- void start_write(const void *buffer, int buffer_size, char buffer_width, const event_callback_t& callback, int event);
- void interrupt_handler_asynch(void);
-#endif
-
-protected:
- SerialBase(PinName tx, PinName rx);
- virtual ~SerialBase() {
- }
-
- int _base_getc();
- int _base_putc(int c);
-
-#if DEVICE_SERIAL_ASYNCH
- CThunk<SerialBase> _thunk_irq;
- event_callback_t _tx_callback;
- event_callback_t _rx_callback;
- DMAUsage _tx_usage;
- DMAUsage _rx_usage;
-#endif
-
- serial_t _serial;
- FunctionPointer _irq[2];
- int _baud;
-
-};
-
-} // namespace mbed
-
-#endif
-
-#endif
--- a/Stream.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,65 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_STREAM_H
-#define MBED_STREAM_H
-
-#include "platform.h"
-#include "FileLike.h"
-
-namespace mbed {
-
-extern void mbed_set_unbuffered_stream(FILE *_file);
-extern int mbed_getc(FILE *_file);
-extern char* mbed_gets(char *s, int size, FILE *_file);
-
-class Stream : public FileLike {
-
-public:
- Stream(const char *name=NULL);
- virtual ~Stream();
-
- int putc(int c);
- int puts(const char *s);
- int getc();
- char *gets(char *s, int size);
- int printf(const char* format, ...);
- int scanf(const char* format, ...);
-
- operator std::FILE*() {return _file;}
-
-protected:
- virtual int close();
- virtual ssize_t write(const void* buffer, size_t length);
- virtual ssize_t read(void* buffer, size_t length);
- virtual off_t lseek(off_t offset, int whence);
- virtual int isatty();
- virtual int fsync();
- virtual off_t flen();
-
- virtual int _putc(int c) = 0;
- virtual int _getc() = 0;
-
- std::FILE *_file;
-
- /* disallow copy constructor and assignment operators */
-private:
- Stream(const Stream&);
- Stream & operator = (const Stream&);
-};
-
-} // namespace mbed
-
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/** @file
- *
- * @defgroup crc_compute CRC compute
- * @{
- * @ingroup hci_transport
- *
- * @brief This module implements the CRC-16 calculation in the blocks.
- */
-
-#ifndef CRC16_H__
-#define CRC16_H__
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**@brief Function for calculating CRC-16 in blocks.
- *
- * Feed each consecutive data block into this function, along with the current value of p_crc as
- * returned by the previous call of this function. The first call of this function should pass NULL
- * as the initial value of the crc in p_crc.
- *
- * @param[in] p_data The input data block for computation.
- * @param[in] size The size of the input data block in bytes.
- * @param[in] p_crc The previous calculated CRC-16 value or NULL if first call.
- *
- * @return The updated CRC-16 value, based on the input supplied.
- */
-uint16_t crc16_compute(const uint8_t * p_data, uint32_t size, const uint16_t * p_crc);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // CRC16_H__
-
-/** @} */
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/scheduler/app_scheduler.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,152 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/** @file
- *
- * @defgroup app_scheduler Scheduler
- * @{
- * @ingroup app_common
- *
- * @brief The scheduler is used for transferring execution from the interrupt context to the main
- * context.
- *
- * @details See @ref seq_diagrams_sched for sequence diagrams illustrating the flow of events
- * when using the Scheduler.
- *
- * @section app_scheduler_req Requirements:
- *
- * @subsection main_context_logic Logic in main context:
- *
- * - Define an event handler for each type of event expected.
- * - Initialize the scheduler by calling the APP_SCHED_INIT() macro before entering the
- * application main loop.
- * - Call app_sched_execute() from the main loop each time the application wakes up because of an
- * event (typically when sd_app_evt_wait() returns).
- *
- * @subsection int_context_logic Logic in interrupt context:
- *
- * - In the interrupt handler, call app_sched_event_put()
- * with the appropriate data and event handler. This will insert an event into the
- * scheduler's queue. The app_sched_execute() function will pull this event and call its
- * handler in the main context.
- *
- * @if (SD_S110 && !SD_S310)
- * For an example usage of the scheduler, see the implementations of
- * @ref ble_sdk_app_hids_mouse and @ref ble_sdk_app_hids_keyboard.
- * @endif
- *
- * @image html scheduler_working.jpg The high level design of the scheduler
- */
-
-#ifndef APP_SCHEDULER_H__
-#define APP_SCHEDULER_H__
-
-#include <stdint.h>
-#include "app_error.h"
-
-#define APP_SCHED_EVENT_HEADER_SIZE 8 /**< Size of app_scheduler.event_header_t (only for use inside APP_SCHED_BUF_SIZE()). */
-
-/**@brief Compute number of bytes required to hold the scheduler buffer.
- *
- * @param[in] EVENT_SIZE Maximum size of events to be passed through the scheduler.
- * @param[in] QUEUE_SIZE Number of entries in scheduler queue (i.e. the maximum number of events
- * that can be scheduled for execution).
- *
- * @return Required scheduler buffer size (in bytes).
- */
-#define APP_SCHED_BUF_SIZE(EVENT_SIZE, QUEUE_SIZE) \
- (((EVENT_SIZE) + APP_SCHED_EVENT_HEADER_SIZE) * ((QUEUE_SIZE) + 1))
-
-/**@brief Scheduler event handler type. */
-typedef void (*app_sched_event_handler_t)(void * p_event_data, uint16_t event_size);
-
-/**@brief Macro for initializing the event scheduler.
- *
- * @details It will also handle dimensioning and allocation of the memory buffer required by the
- * scheduler, making sure the buffer is correctly aligned.
- *
- * @param[in] EVENT_SIZE Maximum size of events to be passed through the scheduler.
- * @param[in] QUEUE_SIZE Number of entries in scheduler queue (i.e. the maximum number of events
- * that can be scheduled for execution).
- *
- * @note Since this macro allocates a buffer, it must only be called once (it is OK to call it
- * several times as long as it is from the same location, e.g. to do a reinitialization).
- */
-#define APP_SCHED_INIT(EVENT_SIZE, QUEUE_SIZE) \
- do \
- { \
- static uint32_t APP_SCHED_BUF[CEIL_DIV(APP_SCHED_BUF_SIZE((EVENT_SIZE), (QUEUE_SIZE)), \
- sizeof(uint32_t))]; \
- uint32_t ERR_CODE = app_sched_init((EVENT_SIZE), (QUEUE_SIZE), APP_SCHED_BUF); \
- APP_ERROR_CHECK(ERR_CODE); \
- } while (0)
-
-/**@brief Function for initializing the Scheduler.
- *
- * @details It must be called before entering the main loop.
- *
- * @param[in] max_event_size Maximum size of events to be passed through the scheduler.
- * @param[in] queue_size Number of entries in scheduler queue (i.e. the maximum number of
- * events that can be scheduled for execution).
- * @param[in] p_evt_buffer Pointer to memory buffer for holding the scheduler queue. It must
- * be dimensioned using the APP_SCHED_BUFFER_SIZE() macro. The buffer
- * must be aligned to a 4 byte boundary.
- *
- * @note Normally initialization should be done using the APP_SCHED_INIT() macro, as that will both
- * allocate the scheduler buffer, and also align the buffer correctly.
- *
- * @retval NRF_SUCCESS Successful initialization.
- * @retval NRF_ERROR_INVALID_PARAM Invalid parameter (buffer not aligned to a 4 byte
- * boundary).
- */
-uint32_t app_sched_init(uint16_t max_event_size, uint16_t queue_size, void * p_evt_buffer);
-
-/**@brief Function for executing all scheduled events.
- *
- * @details This function must be called from within the main loop. It will execute all events
- * scheduled since the last time it was called.
- */
-void app_sched_execute(void);
-
-/**@brief Function for scheduling an event.
- *
- * @details Puts an event into the event queue.
- *
- * @param[in] p_event_data Pointer to event data to be scheduled.
- * @param[in] event_size Size of event data to be scheduled.
- * @param[in] handler Event handler to receive the event.
- *
- * @return NRF_SUCCESS on success, otherwise an error code.
- */
-uint32_t app_sched_event_put(void * p_event_data,
- uint16_t event_size,
- app_sched_event_handler_t handler);
-
-#ifdef APP_SCHEDULER_WITH_PAUSE
-/**@brief A function to pause the scheduler.
- *
- * @details When the scheduler is paused events are not pulled from the scheduler queue for
- * processing. The function can be called multiple times. To unblock the scheduler the
- * function @ref app_sched_resume has to be called the same number of times.
- */
-void app_sched_pause(void);
-
-/**@brief A function to resume a scheduler.
- *
- * @details To unblock the scheduler this function has to be called the same number of times as
- * @ref app_sched_pause function.
- */
-void app_sched_resume(void);
-#endif
-#endif // APP_SCHEDULER_H__
-
-/** @} */
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,92 +0,0 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/** @file
- *
- * @defgroup app_error Common application error handler
- * @{
- * @ingroup app_common
- *
- * @brief Common application error handler and macros for utilizing a common error handler.
- */
-
-#ifndef APP_ERROR_H__
-#define APP_ERROR_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "nrf_error.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**@brief Function for error handling, which is called when an error has occurred.
- *
- * @param[in] error_code Error code supplied to the handler.
- * @param[in] line_num Line number where the handler is called.
- * @param[in] p_file_name Pointer to the file name.
- */
-void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name);
-
-#ifdef __cplusplus
-}
-#endif
-
-/**@brief Macro for calling error handler function.
- *
- * @param[in] ERR_CODE Error code supplied to the error handler.
- */
-#ifdef DEBUG
-#define APP_ERROR_HANDLER(ERR_CODE) \
- do \
- { \
- app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \
- } while (0)
-#else
-#define APP_ERROR_HANDLER(ERR_CODE) \
- do \
- { \
- app_error_handler((ERR_CODE), 0, 0); \
- } while (0)
-#endif
-/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS.
- *
- * @param[in] ERR_CODE Error code supplied to the error handler.
- */
-#define APP_ERROR_CHECK(ERR_CODE) \
- do \
- { \
- const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \
- if (LOCAL_ERR_CODE != NRF_SUCCESS) \
- { \
- APP_ERROR_HANDLER(LOCAL_ERR_CODE); \
- } \
- } while (0)
-
-/**@brief Macro for calling error handler function if supplied boolean value is false.
- *
- * @param[in] BOOLEAN_VALUE Boolean value to be evaluated.
- */
-#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \
- do \
- { \
- const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \
- if (!LOCAL_BOOLEAN_VALUE) \
- { \
- APP_ERROR_HANDLER(0); \
- } \
- } while (0)
-
-#endif // APP_ERROR_H__
-
-/** @} */
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,234 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/** @file
- *
- * @defgroup app_util Utility Functions and Definitions
- * @{
- * @ingroup app_common
- *
- * @brief Various types and definitions available to all applications.
- */
-
-#ifndef APP_UTIL_H__
-#define APP_UTIL_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "compiler_abstraction.h"
-
-enum
-{
- UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */
- UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */
- UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */
-};
-
-/**@brief Macro for doing static (i.e. compile time) assertion.
- *
- * @note If the assertion fails when compiling using Keil, the compiler will report error message
- * "error: #94: the size of an array must be greater than zero" (while gcc will list the
- * symbol static_assert_failed, making the error message more readable).
- * If the supplied expression can not be evaluated at compile time, Keil will report
- * "error: #28: expression must have a constant value".
- *
- * @note The macro is intentionally implemented not using do while(0), allowing it to be used
- * outside function blocks (e.g. close to global type- and variable declarations).
- * If used in a code block, it must be used before any executable code in this block.
- *
- * @param[in] EXPR Constant expression to be verified.
- */
-
-#if defined(__GNUC__)
-#define STATIC_ASSERT(EXPR) typedef char __attribute__((unused)) static_assert_failed[(EXPR) ? 1 : -1]
-#elif defined(__ICCARM__)
-#define STATIC_ASSERT(EXPR) extern char static_assert_failed[(EXPR) ? 1 : -1]
-#else
-#define STATIC_ASSERT(EXPR) typedef char static_assert_failed[(EXPR) ? 1 : -1]
-#endif
-
-
-/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */
-typedef uint8_t uint16_le_t[2];
-
-/**@brief type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */
-typedef uint8_t uint32_le_t[4];
-
-/**@brief Byte array type. */
-typedef struct
-{
- uint16_t size; /**< Number of array entries. */
- uint8_t * p_data; /**< Pointer to array entries. */
-} uint8_array_t;
-
-/**@brief Perform rounded integer division (as opposed to truncating the result).
- *
- * @param[in] A Numerator.
- * @param[in] B Denominator.
- *
- * @return Rounded (integer) result of dividing A by B.
- */
-#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B))
-
-/**@brief Check if the integer provided is a power of two.
- *
- * @param[in] A Number to be tested.
- *
- * @return true if value is power of two.
- * @return false if value not power of two.
- */
-#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) )
-
-/**@brief To convert milliseconds to ticks.
- * @param[in] TIME Number of milliseconds to convert.
- * @param[in] RESOLUTION Unit to be converted to in [us/ticks].
- */
-#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION))
-
-
-/**@brief Perform integer division, making sure the result is rounded up.
- *
- * @details One typical use for this is to compute the number of objects with size B is needed to
- * hold A number of bytes.
- *
- * @param[in] A Numerator.
- * @param[in] B Denominator.
- *
- * @return Integer result of dividing A by B, rounded up.
- */
-#define CEIL_DIV(A, B) \
- /*lint -save -e573 */ \
- ((((A) - 1) / (B)) + 1) \
- /*lint -restore */
-
-/**@brief Function for encoding a uint16 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8);
- return sizeof(uint16_t);
-}
-
-/**@brief Function for encoding a uint32 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
- p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
- p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24);
- return sizeof(uint32_t);
-}
-
-/**@brief Function for decoding a uint16 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) |
- (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ));
-}
-
-/**@brief Function for decoding a uint32 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
- (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
- (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) |
- (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ));
-}
-
-/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts.
- *
- * @details The calculation is based on a linearized version of the battery's discharge
- * curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and
- * is considered to be the lower boundary.
- *
- * The discharge curve for CR2032 is non-linear. In this model it is split into
- * 4 linear sections:
- * - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV)
- * - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV)
- * - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV)
- * - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV)
- *
- * These numbers are by no means accurate. Temperature and
- * load in the actual application is not accounted for!
- *
- * @param[in] mvolts The voltage in mV
- *
- * @return Battery level in percent.
-*/
-static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts)
-{
- uint8_t battery_level;
-
- if (mvolts >= 3000)
- {
- battery_level = 100;
- }
- else if (mvolts > 2900)
- {
- battery_level = 100 - ((3000 - mvolts) * 58) / 100;
- }
- else if (mvolts > 2740)
- {
- battery_level = 42 - ((2900 - mvolts) * 24) / 160;
- }
- else if (mvolts > 2440)
- {
- battery_level = 18 - ((2740 - mvolts) * 12) / 300;
- }
- else if (mvolts > 2100)
- {
- battery_level = 6 - ((2440 - mvolts) * 6) / 340;
- }
- else
- {
- battery_level = 0;
- }
-
- return battery_level;
-}
-
-/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary.
- *
- * @param[in] p Pointer value to be checked.
- *
- * @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise.
- */
-static __INLINE bool is_word_aligned(void * p)
-{
- return (((uintptr_t)p & 0x03) == 0);
-}
-
-#endif // APP_UTIL_H__
-
-/** @} */
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,5649 +0,0 @@ -:020000040000FA -:10000000C0070000D1060000D1000000B1060000CA -:1000100000000000000000000000000000000000E0 -:100020000000000000000000000000005107000078 -:100030000000000000000000DB000000E500000000 -:10004000EF000000F9000000030100000D010000B6 -:1000500017010000210100002B0100003501000004 -:100060003F01000049010000530100005D01000054 -:1000700067010000710100007B01000085010000A4 -:100080008F01000099010000A3010000AD010000F4 -:10009000B7010000C1010000CB010000D501000044 -:1000A000DF010000E9010000F3010000FD01000094 -:1000B00007020000110200001B02000025020000E0 -:1000C0001FB5C046C04600F0EFFA04B00FB41FBD24 -:1000D00008205A49096809580847382057490968CB -:1000E000095808473C2055490968095808474020E5 -:1000F0005249096809580847442050490968095875 -:10010000084748204D490968095808474C204B4981 -:10011000096809580847502048490968095808479C -:100120005420464909680958084758204349096836 -:10013000095808475C204149096809580847602068 -:100140003E4909680958084764203C49096809582C -:100150000847682039490968095808476C20374919 -:100160000968095808477020344909680958084740 -:100170007420324909680958084778202F490968CE -:10018000095808477C202D490968095808478020EC -:100190002A490968095808478420284909680958E4 -:1001A0000847882025490968095808478C202349B1 -:1001B00009680958084790202049096809580847E4 -:1001C00094201E4909680958084798201B49096866 -:1001D000095808479C201949096809580847A02070 -:1001E0001649096809580847A4201449096809589C -:1001F0000847A8201149096809580847AC200F4949 -:10020000096809580847B0200C4909680958084787 -:10021000B4200A49096809580847B82007490968FD -:1002200009580847BC2005490968095808470000D3 -:1002300003480449024A034B7047000000000020B5 -:10024000C0070000C00700000122D84B5A6000BF61 -:10025000D74A1268002AFBD0016000BFD44A126856 -:10026000002AFBD00022D14B5A6000BFD04A12684E -:10027000002AFBD07047F0B505460E46174600240D -:1002800006E0A200B158A2005019FFF7DDFF641C80 -:10029000BC42F6D30020F0BD0120C043C549086030 -:1002A000401048607047014601229204086890425D -:1002B00001D9102070470020FCE7F0B505460C4638 -:1002C0001646002706E028462168FFF7BDFF2D1DD2 -:1002D000241D7F1CB742F6D3F0BD70B505460C4611 -:1002E0002E460BE0304600F075F9FF2C01D80024B3 -:1002F00001E0FF3C013C012080023618002CF1D1C6 -:1003000070BD0146012292044868904201D909203B -:100310007047A9484069401C01D10F20F8E7002030 -:10032000F6E7FEB504462068030000F037FA05043E -:100330002B4249598B00201DFFF7E3FF0546002D96 -:1003400001D02846FEBDFFF7A7FF0120C00200F044 -:1003500041F9042221469948FFF78DFF002801D07A -:100360000320EFE708222146944800F06DF90028A9 -:1003700006D1002192480068FFF766FF00F00CF9F3 -:100380000320DFE7A768E6686068019031463846D9 -:10039000FFF7A3FF324638460199FFF78EFFB20000 -:1003A0003846019900F050F9002800D1CAE703202F -:1003B000C8E700F0E3F9834800688349086041E03A -:1003C00060680190E668A0680090B200009901980A -:1003D00000F03AF90746002F00D1B3E70E20B1E74D -:1003E000201DFFF760FF0546002D01D02846A9E734 -:1003F0006068002807D1FFF74FFF0320800200F05C -:10040000E9F800F0C9F8FFF747FF0120C00200F04B -:10041000E1F8042221466948FFF72DFF002801D0AA -:1004200003208FE708222146644800F00DF90028D8 -:1004300006D1002162480068FFF706FF00F0ACF823 -:1004400003207FE700BF00207CE770B505460C461F -:10045000182D04D12068FFF764FF206002E001201E -:10046000206000BF00BF70BDF0B589B05248406940 -:1004700003905248806881000398081802900398FE -:10048000000B01900121090302984018401E000B47 -:1004900000900124002520462946019A00F0C4F866 -:1004A0000022401E91410791069001260027304608 -:1004B0003946009A00F0B8F80022401E914105919B -:1004C0000490049BDB43059AD2430698184307998E -:1004D00011430791069037490698086007984860CD -:1004E00009B0F0BD70B53448446934488568466841 -:1004F000AA003146204600F0A7F8002801D00020CD -:1005000070BD0120FCE72D484068002801D0012083 -:1005100000E000200546FFF7E5FF002807D0FFF7C1 -:10052000BBFE0320800200F055F800F035F8FFF71D -:100530009BFF002D0ED020484669204884684768FC -:1005400021463046FFF7C9FE224639463046FFF7BE -:10055000B4FE00BF00F020F810B5184844681A48EF -:100560000460204600F0DCF810BD15480068006803 -:10057000401C01D100BFFEE710480068002802D0EF -:10058000042806D101E0FFF7BEFFFFF7E5FF00BF3B -:10059000FEE700BF00BFFEE7BFF34F8F0B480C49DB -:1005A000C860BFF34F8F00BFFEE7000000E50140C9 -:1005B00000E40140000600400010001000080000A8 -:1005C000B8070000BC070000000000200400FA0586 -:1005D00000ED00E010B50146104B1A6808460223F2 -:1005E0000F4C636000BF0F4B1B68002BFBD0531CEC -:1005F00004D0904202D20A4B186101E0084B986087 -:1006000000BF084B1B68002BFBD00023044C636029 -:1006100000BF044B1B68002BFBD010BD0010001066 -:1006200000E5014000E4014010B5202A04DB01464A -:10063000203A9140002010BD914020239C1A03468F -:10064000E3401943904010BD034610B50B439B0790 -:100650000FD1042A0DD308C810C9121FA342F8D025 -:1006600018BA21BA884201D9012010BD0020C04328 -:1006700010BD002A03D0D30703D0521C07E000208E -:1006800010BD03780C78401C491C1B1B07D1037854 -:100690000C78401C491C1B1B01D1921EF1D118463D -:1006A00010BD70477047704710B500F007F810BDD7 -:1006B000014B1B68DB6818470000002019481A49E5 -:1006C0007047FFF7FBFFFFF7FBFC00BD20BFFDE716 -:1006D0001649174C24688C420BD1164B1B68994263 -:1006E0000CD1154B154A1360186810498842EDD09B -:1006F0000AE0134880F30888124B18470F4A13602A -:1007000018680A498842E1D080F308880E49884277 -:1007100004DD0E48026802210A4302605B68184744 -:100720000346DFE7C0070000C0070000FFFFFFFF30 -:10073000000C000014100010001000000000002049 -:10074000000400206B05000000200020240500406C -:100750000D48704502D1EFF3098101E0EFF3088104 -:10076000886902380078182802D1C046074A104725 -:10077000074A12682C3212681047000000B5054B7A -:10078000054A9B58984700BDFDFFFFFF4B04000042 -:1007900000000020001000000400000030B4744687 -:1007A000641E2578641CAB4204D3635D5B00E318D0 -:1007B00030BC18471D46F8E7000C00000010000090 -:1010000000150020CD64010025220000336401009A -:1010100000000000000000000000000000000000D0 -:101020000000000000000000000000003D6501001D -:101030000000000000000000252200002522000022 -:10104000A9650100AF6501002522000025220000EE -:101050002522000025220000252200002522000074 -:10106000B56501002522000025220000BB650100B6 -:1010700025220000C1650100C7650100CD650100A2 -:101080002522000025220000252200002522000044 -:101090002522000025220000252200002522000034 -:1010A000D3650100D965010025220000252200003A -:1010B0002522000025220000252200002522000014 -:1010C00000F002F815F0E3F90CA030C80838241835 -:1010D0002D18A246671EAB4654465D46AC4201D170 -:1010E00015F0D5F97E460F3E0FCCB64601263342A9 -:1010F00000D0FB1AA246AB4633431847B456010052 -:10110000E4560100103A02D378C878C1FAD85207E1 -:1011100001D330C830C101D504680C6070470000AD -:101120000023002400250026103A01D378C1FBD803 -:10113000520700D330C100D50B6070471FB5C046C1 -:10114000C04615F063F904B00FB41FBDF0B44046BB -:10115000494652465B460FB402A0013001B506482D -:10116000004700BF01BC86460FBC804689469246B8 -:101170009B46F0BC70470000C11000008269024924 -:101180008161024810447047911100000100000085 -:1011900001B41EB400B50BF0E6FF01B40198864619 -:1011A00001BC01B01EBD0000401E00BF00BF00BF5B -:1011B00000BF00BF00BF00BF00BF00BF00BF00BF37 -:1011C00000BFF1D17047000070B505460C461646C9 -:1011D00002E00FCC0FC5103E102EFAD2082E02D31B -:1011E00003CC03C5083E042E07D301CC01C5361F2E -:1011F00003E021782970641C6D1C761EF9D270BD45 -:101200008307FF22DB0E9A408907090E99400028C8 -:101210000BDA0007000F0838830828489B001818CD -:10122000C36993430B43C3617047830824489B0001 -:101230001B181868904308431860704710B504469F -:1012400000210120FFF7DCFF00211820FFF7D8FF65 -:1012500000210B20FFF7D4FF02211920FFF7D0FF58 -:1012600002210D20FFF7CCFF02210E20FFF7C8FF5F -:1012700002210F20FFF7C4FF0221C81FFFF7C0FFA4 -:1012800003211620FFF7BCFF03211520FFF7B8FF4D -:10129000204600F019F8002010BD6421018070473D -:1012A00010B500F020F810BD0648704710B500F0EA -:1012B00022F810BD704770477047000000ED00E055 -:1012C00000E400E003F9004370B505462D4C07200B -:1012D0002070A01CFFF7E1FF5920A080294620467E -:1012E00000F099FB70BD10B500F09EFB2549002071 -:1012F000891E087010BDF8B5224E0446B61E30781F -:1013000001270D46002807D0204660380B2808D852 -:10131000204600F03DFF2BE0602CF9D01A48086011 -:10132000F8BD20466C38032803D8204600F071FF32 -:101330001EE0204670381F2803D8204600F045F9EB -:1013400016E0204690380F2803D8204600F0E8F831 -:101350000EE02046A0380F2803D8204600F074F88D -:1013600006E02046B0380F2804D8204600F0CAF91D -:10137000286000E02F60602CD2D128680028CFD1EF -:101380003770F8BD1A000020013000000120244908 -:10139000C003086023490020087007202249C005C7 -:1013A0008860704770B51F4D04462878A04207D06A -:1013B000002C05D0002803D01CA14D2015F033F8D7 -:1013C0002878A0420ED000211D4A17482C70002C0E -:1013D00019D01C4B012C06D0022C0BD013A1682075 -:1013E00015F021F870BD11600221116053610321D5 -:1013F000090605E011600321116053610121C9054F -:101400008160416070BD116011600721C905816074 -:1014100070BD10B505A1712015F005F810BD0000D4 -:1014200080E100E02000002000F501407372635C61 -:1014300068616C5F63636D5F6161722E63000000C1 -:1014400000F500404001002010B5A038030015F061 -:10145000DBF80B070E172028313A414B525C650030 -:101460004B6808788A68194603F0E6F910BD888849 -:101470008A6883B20888194680B203F0ECF910BD7F -:1014800008884C68CB688A6880B2214603F0E7F987 -:1014900010BD08884B688A6880B2194603F0FBF9D2 -:1014A00010BD88888A6883B20888194680B203F024 -:1014B00007FA10BD88888A6883B20888194680B206 -:1014C00003F041FA10BD08884A6880B2114603F063 -:1014D00080FA10BD088982B2888883B208881946CC -:1014E00080B203F081FA10BD08884A6880B21146C4 -:1014F00003F09EFA10BD08894C6882B20888CB6858 -:1015000080B2214603F018FB10BD08884C68CB68F8 -:101510008A6880B2214603F02AFC10BD012010BD6C -:1015200010B59038030015F06FF809060F161D244A -:101530002C363F464E0088888A6883B20888194650 -:1015400080B204F031F910BD08884A6880B21146B3 -:1015500004F065F910BD08884A6880B2114604F0AD -:101560006AF910BD08884A6880B2114604F070F923 -:1015700010BD08884B688A6880B2194604F07BF970 -:1015800010BD088982B2888883B20888194680B263 -:1015900004F07AF910BD08894B6882B208881946B0 -:1015A00080B204F090F910BD08884A6880B21146F4 -:1015B00004F09BF910BD888882B20888114680B279 -:1015C00004F0EFF910BD012010BD10B57038030014 -:1015D00015F01AF81B0F15192125282F363B40440A -:1015E000484C53585F688D707980888D8D8D8D8FB4 -:1015F00096004A680878114608F0FDFD10BD08689D -:1016000008F04AFE10BD0C790B7B8A6808682146F9 -:1016100008F053FE10BD086808F011FF10BD08F077 -:1016200065FB10BD08884A6880B2114609F043F88E -:1016300010BD0A790888114680B209F0D3F810BDB0 -:10164000087840B209F0DCF810BD088880B209F0D3 -:10165000F0F810BD086809F0FEF810BD086801F048 -:10166000D2FB10BD086801F0FCFB10BD088982B2F6 -:1016700009C9194609F007F910BD05C9114609F055 -:1016800051F910BD08884A6880B211460AF0A6F9DF -:1016900010BD0C790888CB688A6880B221460AF0B0 -:1016A000C5FA10BD0B7908888A6880B219460AF01D -:1016B0006DFC10BD08884C68CB688A6880B22146F2 -:1016C0000AF0D5FC10BD08884A6880B211460AF0BD -:1016D00018FD10BD0B7908880A7A80B2194609F006 -:1016E00044F910BD088880B209F044F910BD062005 -:1016F00010BD08884A6880B2114609F042F910BD51 -:10170000012010BD10B5B02805D0B12808D0B228EE -:101710000BD0012010BD088880B20BF0FBF810BD83 -:10172000088880B20BF015F910BD08884B688A68EC -:1017300080B219460BF01EF910BD000010B5030071 -:1017400014F062FF0A0609060C0C0F0F06060612BB -:1017500008F0F4FA10BD0AF0C5FE10BD01F03EFA23 -:1017600010BD06F09FFA10BDFAA1FE4814F05BFE12 -:1017700010BD3EB5FC49054603C900900191FF200C -:10178000C33069460881F94A092310460A212838DE -:101790000BF0BFFD0024F6480BF0D9FD641CE4B249 -:1017A0000A2CF8D3F14801231A4602A990300BF015 -:1017B000A0F9002804D0FF20E6A13D3014F033FE4C -:1017C000686800F024FC00211E22084604F06CF931 -:1017D00008F0C3FC02222421E64801F07DFBE54825 -:1017E00001222C214C3001F077FBE2490B20B0396B -:1017F00001F0FEF9002804D0FF20D6A1513014F0EA -:1018000012FE0AF03EFE02F097F96B460022082114 -:10181000D9A008F07DFB002804D0FF20CDA15730CF -:1018200014F001FE284602F0E7FC002804D0FF2057 -:10183000C8A1593014F0F7FDF3218900D14814F004 -:10184000D3FCD04801214171022181710721C1716E -:101850003EBD10B5CB4CA0780A2804D3FF20BDA113 -:10186000903014F0E0FD20786021484300190021F9 -:101870000173417BF722C908C900C91C1140EF223E -:10188000114041730121E1700C3010BD70B50E465E -:1018900000211C4619801546030014F0B5FE0723ED -:1018A000050B1711231D23002246294630460AF056 -:1018B00037FE70BD22462946304608F095F870BDC7 -:1018C00022462946304601F0E2FF70BD22462946F5 -:1018D000304603F0EAFD70BD22462946304600F04E -:1018E00010FC70BDFF209BA1EF3014F09CFD032085 -:1018F00070BD70B5A34CE078002818D02078602126 -:1019000048430019407B00254007400F0119087922 -:10191000401E08712078401CC0B220700A2800D1F7 -:101920002570A078401CA0700BF097FEE57070BD8C -:101930009448C079002800D08BE7704770B5914D6E -:10194000A86800280CD0FFF7F3FF002862D06022BF -:10195000A968FFF739FCFFF7CCFF0020A860EFE78C -:101960006879002856D0FFF774FF044681484C3050 -:1019700001F0C2FA6060002804D17A4875A14A30AB -:1019800014F051FD606801F01AFB00280DD02046CC -:1019900007F00BFF6078010703D5C008C000401CAA -:1019A0002BE0744861684C302DE0724861684C301F -:1019B00001F0ABFA00F05AFB00282BD1FFF749FFEA -:1019C00004466C4801F098FA6060002804D1332086 -:1019D00060A1000114F027FD606801F0F4FA00280E -:1019E00014D060680088608020460AF0CCFD6078E2 -:1019F000010706D5C008C000801C6070FFF779FFA2 -:101A00009EE75C48616801F080FA99E7594861688F -:101A100001F07BFA70BD10B55B4CE160A0605B48E3 -:101A200000F032FC607010BD57490020087070470C -:101A300070B5574E0546706A94B00C46401C04D1F0 -:101A4000B06AC0430004000C0BD0306AC007C00F5E -:101A50002870706A14F0DBFBB06A2071000A6071B4 -:101A600014E02B206946087009A9684601F07BFA4A -:101A7000002804D03B4837A17E3814F0D4FC012064 -:101A8000287006220AA9204614F04FFB2878002867 -:101A900003D06079C0210843607114B070BDF0B507 -:101AA0003B4C0646206895B00D4637460837401C2B -:101AB00008D16068401C05D1A068401C02D1E068D4 -:101AC000401C11D02068314614F0A1FB6068311D24 -:101AD00014F09DFBA068394614F099FBE06831468C -:101AE0000C3114F094FB25E02B206946087009A9FD -:101AF000684601F038FA002804D01A4815A1553874 -:101B000014F091FC08220AA9304614F00EFB2B2099 -:101B10006946087009A9684601F025FA002804D032 -:101B200010480CA14E3814F07EFC08220AA9384651 -:101B300014F0FBFA20692E460836401C08D1606973 -:101B4000401C05D1A069401C02D1E069401C33D083 -:101B500020691FE07372635C686F73745F636F72F8 -:101B6000652E6300C3020000F866010094010020A6 -:101B70003D170000640800206E524635313832327D -:101B800000000000E8030020240000203D190000B0 -:101B900080000010294614F03AFB6069291D14F0FA -:101BA00036FBA069314614F032FBE06929460C315E -:101BB00014F02DFB15B0F0BD2B246846047009A964 -:101BC00001F0D1F9002803D0F649F74814F02BFCB6 -:101BD000082209AF28460AA914F0A7FA684604703B -:101BE00009A901F0C0F9002804D0EF48ED49C01D53 -:101BF00014F019FC0822391D304614F096FAD9E782 -:101C000070B5EA4C0546A068002804D0E648E549CE -:101C1000563014F008FCA56070BD10B50146E448CC -:101C200001F073F9E1498879401CC0B2887101283C -:101C300003D1E048407800F04BFB10BD70B504467E -:101C4000DD4816460D46814204D1D748D549CB30F0 -:101C500014F0E9FB012E05D0D348D249DA3014F054 -:101C6000E2FB70BD6620207000202072A58101205B -:101C7000A07370BD70B515460C460646FFF758FEBA -:101C800000280CD066210170468001210172216874 -:101C90000161A18881820573FFF72BFE70BD1321BE -:101CA000304608F09FFD70BDC2494968884201D2A4 -:101CB00010207047072101700020704770B5BD4C9F -:101CC00005462078002694B0002801D00820E4E6DC -:101CD000BA4A6260954201D21020DEE668680028A8 -:101CE00009D00921D82804D3C31C9B089B00834238 -:101CF00005D00846D1E60720000268600EE0012109 -:101D000009074B6B896B4B43AD49511A0122591A94 -:101D1000D202891A814201D20421EAE700F050FF81 -:101D20006178A06806F052F8E068401E07280BD8DA -:101D3000302269460A708870684607F007F9002863 -:101D400002D009A806F07CFA2846FFF712FD012010 -:101D500020703046A1E6F8B5044696480F46406824 -:101D6000814208D3002C01D0844204D3E01C8008B7 -:101D70008000A04201D01020F8BD8C488178002955 -:101D800011D0398800914178602251430D18287B89 -:101D90000C350007000F3B4600222946FFF776FD71 -:101DA000060004D015E0002038800520F8BD002C86 -:101DB00013D039880098814201D90C260DE028788B -:101DC0003B460007000F22462946FFF75FFD06004D -:101DD00005D00C2E01D0002038803046F8BD734C61 -:101DE0006078401CC0B260700A2801D10020607089 -:101DF000A078401EA07068784107490F01290ED0D5 -:101E0000022906D003291AD066496E4814F00BFB4C -:101E1000E3E7C006E1D46868FFF7FFFEDDE764484A -:101E200069684C3001F071F86079401CC0B2607193 -:101E30000128D2D15F48407800F04AFACDE7E07936 -:101E4000401CE071C9E7604A10B5904209D3594A75 -:101E50000124A4045268A04201D3904201D39142CC -:101E600001D2102010BD00F0FCFE10BD564B10B585 -:101E7000994209D34F4B0124A4045B68A14201D3CA -:101E8000994201D39A4201D2102010BD022803D0FA -:101E9000102801D0092010BD00F009FF0028FAD059 -:101EA000052010BD484B10B598420DD3414B01247D -:101EB000A4045B68A04201D3984205D3994203D39E -:101EC000002A03D09A4201D2102010BD00F015FF65 -:101ED0000028FAD0072010BD10B50446354894B04C -:101EE0004068844202D2102014B010BD0F2008A90F -:101EF000087369460BA801F036F80028F4D168464B -:101F0000007A207068464089608068468089A08099 -:101F10000020E9E710B500290BD0264A526891420B -:101F200002D30B68934201D2102010BD8A88002A88 -:101F300002D001F05AFE10BD092010BD10B5224A92 -:101F400094B091420ED31B4A01239B0452689942DC -:101F500001D3914206D3441E1E2C41D8994203D38B -:101F6000914201D21020BFE7012837D10878002420 -:101F7000C007C00F002803D003206946887001E025 -:101F80006846847038206946087009A9684600F0E0 -:101F9000EAFF002804D041200CA1C00014F043FA4D -:101FA0002046A1E7541B000093020000E803002034 -:101FB0006408002024000020FFFF0000001900201A -:101FC000000000200A040000008001007372635CBE -:101FD000686F73745F636F72652E6300072083E719 -:101FE0000246203A1F2AF9D807F0F9FF7CE710B51E -:101FF0005F4A5268914201D2102010BD0246203A39 -:102000001F2A02D808F065F810BD072010BD70B572 -:102010000546584C0020207020464619544846601A -:10202000E01C80088000A04204D0FF2052491330F9 -:1020300014F0F9F901200007C06AC0430006000E41 -:1020400003D14E480068401C03D04D484D49301A1A -:10205000C862A8B20122214604F039F9002804D050 -:10206000FF204549233014F0DEF970BDF0B595B07E -:102070003B2008A9087369460BA800F074FF0028EC -:1020800004D0FF203C496B3014F0CDF93E4E0024C3 -:102090006D4630E02F19B87DC10706D0400704D443 -:1020A00060004019C0880AF08DFB3848807900280C -:1020B0001FD0B87D80071CD560004019C088002261 -:1020C00006210AF09CFB002813D03C2108A80173CC -:1020D00060004019C1886846C18569460BA800F0B8 -:1020E00042FF06000BD0FF2023497F3014F09BF9FC -:1020F00005E0641CE4B268460079A042CAD83046C4 -:1021000058E5F7B505460078002700090C463E461D -:10211000062804D0FF201849A83014F084F9287A42 -:1021200000280ED0012814D0FF201349C93014F024 -:102130007AF90298002C068001D027806680002062 -:10214000FEBD02270926002C0ED0A889A080A87BFE -:1021500008E003271426002C06D02869E060A88A2E -:102160002082287B2072E4E702980680E7E70000DF -:102170002400002000190020CC1F000000100010D7 -:10218000000000200005004004300000E8030020AB -:1021900010B56038030014F037FA0A060A0F131856 -:1021A0001F252930353A0868FFF788FD10BD05C99D -:1021B0001146FFF7D0FD10BD0868FFF775FD10BD93 -:1021C00005C91146FFF73FFE10BD4B6808788A68C5 -:1021D0001946FFF74BFE10BD8A6809C91946FFF77B -:1021E00061FE10BD0868FFF777FE10BD08884A68D9 -:1021F00080B21146FFF78EFE10BD05C91146FFF7EC -:102200009DFE10BD05C91146FFF7F1FE10BD01206E -:1022100010BD0120704700000E4A12680C498A4226 -:102220000AD118470B4A1268094B9A4204D101B5EA -:102230000AF090FF03BC8E46074909680958084711 -:1022400006480749054A064B704700000000000099 -:10225000BEBAFECA7800002004000020001500204D -:102260000015002001203F49400608603E490860F3 -:102270003E490A68FF231B029A4383121A430A60ED -:10228000384980390860704710B502460420384943 -:1022900004E0C3005B181B79002B0AD00346401EE4 -:1022A000C0B2002BF5D133A1432014F0BCF8FF20BD -:1022B00010BDC300CA50002259184A718A71012208 -:1022C0000A7110BD2A4A0021C000801801717047B0 -:1022D00010B50446042803D326A1522014F0A3F815 -:1022E0002348E1000C182079012803D021A15320B4 -:1022F00014F099F86079A179401CC0B2814200D0F5 -:1023000060710120174940068031086010BD70B52A -:10231000164804250068164E0004800F1B4C022846 -:102320001AD014A1692014F07EF815E02078C100BD -:1023300088190279012A07D1427983799A4203D018 -:1023400042798271705880472078401CC0B220705A -:10235000042801D30020207028466D1EEDB200280D -:10236000E4D170BD80E100E080E200E018E400E02C -:10237000E00800207372635C736F635F7369676E5C -:10238000616C6C696E672E630000000034000020F1 -:1023900010B5EFF31080C407E40F72B6D24841784D -:1023A000491C41704078012801D10BF07BF9002CC9 -:1023B00000D162B610BD70B5CB4CE07800280AD1D0 -:1023C0000125E570FFF7E4FF0BF074F9002804D055 -:1023D00000200BF047F9002070BDC44865714560CE -:1023E000F9E770B5EFF31080C507ED0F72B6BE4C7C -:1023F0006078002803D1BEA18F2014F014F8607813 -:10240000401E60706078002801D10BF04FF9002D5C -:1024100000D162B670BD10B5B348C178002904D0B0 -:1024200000214171C170FFF7DCFF002010BD10B525 -:1024300004460BF03FF9AC49C978084000D00120B0 -:102440002060002010BDF8B50246A74C0026A671FA -:102450000820042101251027130014F0D5F80D08D9 -:102460000A0C0E101214161E262123252800257191 -:1024700022E0022001E021711EE020711CE02771A2 -:102480001AE02020F9E7012616E0FFF781FF0BF0A4 -:1024900011F90028FBD002260EE02171A5710BE096 -:1024A0002771FBE7202000E040202071F6E7FF20A5 -:1024B0008FA1763013F0B7FF0BF008F9002809D090 -:1024C0000BF00AF9B04205D130460BF008F90028AC -:1024D000FAD02CE001208007C560894900224A60BB -:1024E000884A9661814B02225A608560864802695B -:1024F000D243D206D517026910231A4302610F4650 -:102500006D1C00E020BF78680028FBD030460BF03F -:10251000E6F80028FAD0002D04D17B48026910218A -:102520008A43026171490220886000207860A079A6 -:1025300000280CD00BF0BEF805460BF01BF8734AD0 -:10254000002D02D0A260E06001E0E260A060002EF9 -:1025500001D100F0A5F8F8BD10B504460BF0B0F8B5 -:10256000002805D060490120C8704A78521C4A7082 -:102570002046FFF768FF10BDF8B5614DA86800263A -:10258000012802D1AE600BF06DF86868012800D117 -:102590006E6028680127544C012812D12E606079A2 -:1025A000002803D000200BF05DF866712078002829 -:1025B00007D00BF07FF8002803D0012080070761C7 -:1025C000A770286901282AD12E6100F05FF8012048 -:1025D00080074761A079002815D00BF06BF80090B8 -:1025E0000AF0C8FF0099002901D0E16800E0A16865 -:1025F000411A022901DA8A1C11DC0099002901D054 -:10260000E06000E0A060FFF7C3FE0BF053F8002885 -:1026100004D0012080070761A77000E02770E868F8 -:10262000012812D100F032F800F030F800F02EF856 -:10263000A078002804D1FF202DA1033013F0F3FE71 -:10264000EE60A6702670FFF7CCFEF8BD10B5264CE4 -:10265000E078002801D10BF029F80120810788617A -:1026600000F014F8A07800280BD0254CE068002872 -:1026700003D10BF034F80028F8D10020E06000F01E -:1026800005F800201949C043886010BD08B55020E6 -:10269000694608806A461088411E1180FAD208BD3A -:1026A000F8B5124819278760154900200860C860EE -:1026B0000BF000F8BE0701240B4D002802D0346156 -:1026C000AC7000E02C70FFF763FE084847600D49CE -:1026D00028798863FFF7DAFFB461FFF7D7FF08496D -:1026E000002008617461F8BD38000020000300403C -:1026F0007372635C736F635F636C6F636B2E6300F5 -:10270000000100400005004000ED00E0FFFFFF7FFA -:102710008107C90E002808DA0007000F0838800872 -:102720002E4A80008018C06904E080082C4A80008E -:1027300080180068C8400006800F704710B50D2053 -:10274000FFF7E6FFC4B20420C043FFF7E1FFC0B2C9 -:10275000844203D023A11A2013F065FE26490120EC -:10276000486010BD0121254A48031060244B002217 -:102770001A60244A5160244A1060244A11601F499B -:1027800080390860704701211C4A480310601F4AC5 -:1027900051601B4A002111601B490860704710B549 -:1027A00017490868012804D00EA1572013F03BFEFA -:1027B00010BD114880680022C0B20A600AF020FCF7 -:1027C00010BD10B50E4801680029FCD0FFF7E7FFE7 -:1027D00001200D494003086010BD000000ED00E03D -:1027E00000E400E07372635C736F635F68616C5F49 -:1027F000726E672E6300000000D5004080E100E0AB -:1028000000D1004000D3004080E200E000D0004052 -:1028100030B40121BC48C9020160CD1005604A03F3 -:102820000260BA4803681B021B0A036004680023A5 -:10283000240A24020460B6480468240A24020460BE -:10284000B448012444608460B34C23606360A36097 -:10285000B24B19601D601A60B14B19601A600121FA -:10286000016030BC704710B40121A748CA02026061 -:102870000B0203600C060460A64841608160A94811 -:1028800041680029FCD1A4490020086048608860A4 -:10289000A24802600360046010BC704701219F4899 -:1028A000C9020160C91001607047002805D00128E5 -:1028B00005D0022805D19C4870479C4870479C4829 -:1028C000704710B59BA18B2013F0ADFD002010BD0B -:1028D00070B500219E4C9F4D9F4A8F4B002808D019 -:1028E00001281DD0022822D092A1B32013F09BFD15 -:1028F00070BD01200004A060A86011601960974BB2 -:10290000C2039A60964A90607F4A00121060954810 -:10291000016086480160944801609448017070BD70 -:1029200001204004A060A8605160596070BD012082 -:102930008004A060A8609160996070BDF8B594466D -:10294000834A8B4F834D00240126002808D001289C -:1029500032D0022840D077A1E82013F064FDF8BD02 -:10296000891E0902090A0120000490603C64686025 -:102970006C4A1164012B1DD000217C4A7D4B5170A3 -:102980006146DC63DE637C4B5C6002249C60042453 -:102990001C61744B3D31196073490E605F4B8915A2 -:1029A00019606F4B58605E4801606C49C005486013 -:1029B0001670F8BD0121E0E70120704E4004704F11 -:1029C000012B04D13464506068603964F8BD9060B4 -:1029D000346468603964F8BD01206A4E80046A4F2F -:1029E000012BF4D1EEE74F484068704770B54A4D6F -:1029F00028680026564C012806D1A068C00303D5DC -:102A000001200004A0602E606868012809D1A06838 -:102A1000800306D501204004A0606E6001200BF009 -:102A200041FEA868012809D1A068400306D501200D -:102A30008004A060AE6002200BF034FE70BD10B5C3 -:102A40004A490878002818D00120444AC0079060FD -:102A5000434AC00B90602C4A00121060414A00208B -:102A60001060324A1060404A106008704A78002AAC -:102A700002D048700BF016FE10BD0320FAE70120CB -:102A8000424900060860704701202449000608609A -:102A9000704701203D4940050860704701201F49EB -:102AA00040050860704733490020C86388151B49FA -:102AB00008607047410A364AC005C00D5043801C6B -:102AC0005143400A0818704710B4324C430B63431B -:102AD0001B0C5C020C602E4C6343C31A2E485C0234 -:102AE00058432B4B400D4343E31A0124DB032404DA -:102AF0001B191B1613700A681018086010BC704769 -:102B000010B50BF0A2FE10BD80E100E008E400E08B -:102B100018E400E000B0004040B1004080E200E076 -:102B200000E100E000B5004048B1004040810040B5 -:102B300044B100407372635C72656D5F68616C5F85 -:102B40006576656E745F74696D65722E6300000052 -:102B500000B3004040B3004040B5004000F50140E4 -:102B60000083004040850040008200404800002073 -:102B700000B10040C08F00400085004004B100401B -:102B800004B5004008B1004008B5004000E200E094 -:102B9000093D0000378600006F0C010010B50BF0F6 -:102BA00040FE10BD00200449C8630120012181407E -:102BB000024A116000BF7047C01F004080E200E081 -:102BC00010B50CF097FA0AF059F9FEF7DFFB12F096 -:102BD00063FA0CF0F5FF0CF081FF10BD70B50C46E8 -:102BE000054603F0D5FA214628460EF026F870BDBA -:102BF00070B50D46040012D0002D10D021012846DA -:102C000013F0F0FA10225449284613F08EFA524875 -:102C100001210838018044804560002070BD0120FA -:102C200070BD70B54C4E00240546083E11E0716839 -:102C300020014018817BAA7B914209D1C17BEA7BAC -:102C4000914205D10C22294613F042FA002806D001 -:102C5000641C30888442EADB0020C04370BD2046FB -:102C600070BD70B50D4606000AD0002D08D03A4C54 -:102C7000083C20886188401C884203D9042070BD2C -:102C8000102070BD3046FFF7CCFF002801DB401C50 -:102C90000AE020886168000140181022314613F0D4 -:102CA00044FA2088401C20802870002070BD70B538 -:102CB00014460D001FD0002C1DD00021A170022849 -:102CC00002D0102817D108E068782978000208435C -:102CD00011D00121A17010800BE02846FFF7A1FF61 -:102CE000002808DB401CA070687B297B0002084399 -:102CF0002080002070BD012070BD70B505461446CF -:102D00000E000AD000203070A878012807D004D91E -:102D1000114908390A8890420BD9012070BD002C56 -:102D200004D0287820702888000A5070022008708B -:102D300010E0002C0CD049680001411810222046F8 -:102D4000103913F0F2F9287820732888000A60738C -:102D500010203070002070BD540000205A4910B57A -:102D6000884207D301218904884205D3574909685D -:102D7000884201D2102010BD0146012006F0E4FA7D -:102D800010BD30B5044693B000200D4607901421C5 -:102D90000BA813F029FA1C21684613F025FA6A469D -:102DA000112010770020507710780221084310700E -:102DB00007A80C90012008AA907245486A46108521 -:102DC0000AA80B902088108460885084A088908482 -:102DD000E088D084907FF9210840801C40084000A2 -:102DE000907708209086108708A80F9010AA0BA94A -:102DF000684600F083FF002803D110A800882880CF -:102E0000002013B030BD3EB5044608206946088056 -:102E10002D48844207D301208004844205D32B48E7 -:102E20000068844201D210203EBD2146012006F0F8 -:102E30008BFA0028F8D12088694688806088C8808D -:102E4000A0880881E088488107F05FF801AB6A46F6 -:102E5000002101F0E1FB694609880829E4D003203C -:102E60003EBD1FB504460020029008206946088137 -:102E700015480391844207D301208004844206D37D -:102E800012480068844202D2102004B010BD07F03E -:102E90003CF8014602AA0F4801F055FD0028F4D184 -:102EA00069460989082901D00320EEE769460988A7 -:102EB000218069464988618069468988A180694680 -:102EC000C988E180E1E700000080010028000020BF -:102ED000042A0000FFFF000010B5031D036000205E -:102EE000521E04E05C181C60401C2346C0B2904295 -:102EF000F8DB0020186010BD01460A680020002A97 -:102F000002D0104612680A60704702680A600160C9 -:102F10007047000000B51E2823D00BDC0C281CD005 -:102F20001FDC030013F070FB090F1D111D1D171787 -:102F300013151D00302814DD3A38030013F064FB2C -:102F4000030F11091100002000BD214800BD04201D -:102F500000BD0D2000BD0F2000BD082000BD1120C8 -:102F600000BD032000BD10B50C4605F0EFFF0028A2 -:102F70001ED0204605F064F9002816D022780E2ACB -:102F80000DD00F2A0BD0022A09D0032A07D0102A0D -:102F900009D010A17C2013F046FA002010BDA078C3 -:102FA000FFF7B8FF10BD112010BD0AA18220F2E783 -:102FB00008A18820EFE710B504F083FF10BD10B51D -:102FC00005F03EF910BD10B504F0D9FF10BD0000AA -:102FD000023000007372635C686F73745F686369CA -:102FE0002E63000070477047704770477047704706 -:102FF00070477047704770477047704770470000D0 -:1030000010FFFFFFDBE5B151008001006400FFFF0E -:1030100003B40148019001BD09000020002803D03D -:103020008178012939D101E0102070470188FE4ADA -:10303000881A914233D01BDCFC4A881A91422ED068 -:103040000BDC00292BD00320C002081A27D001284E -:1030500025D001210903401A07E001281FD00228CA -:103060001DD0FF281BD0FF380138002815D116E0ED -:10307000FF220132811A904211D008DC01280ED0C3 -:1030800002280CD0FE280AD0FF2806D107E001292B -:1030900005D0022903D0032901D0002070470F205A -:1030A000704700B50B2826D009DC030013F0ACFAFA -:1030B0000B1D2125251B25292325271F1B00112832 -:1030C0001BD008DC0C2816D00D281CD00F2814D0DB -:1030D000102808D10FE0822809D084280FD0852835 -:1030E0000FD0872811D0032000BD002000BD05208F -:1030F00000BDCF4800BD072000BD0F2000BD04204B -:1031000000BD062000BD0C2000BD0D20800200BDCA -:1031100070B500290BD0CB1FFA3B81241E46CDB2DF -:10312000112B1BD2012805D0022806D009E000206F -:1031300010701DE0FF20043001E0FF2003308142C9 -:1031400018D0330013F060FA111613131613161665 -:103150001316161613131313161316000846FF380A -:1031600081381F2803D9FF39FE39022902D815708A -:10317000002070BD1470072070BD00B5030013F06F -:1031800043FA060406040C080A0C002000BD1120B6 -:1031900000BD072000BD082000BD032000BD007851 -:1031A0000207120F04D0012A05D0022A0AD10EE02C -:1031B000000907D108E00009012805D0022803D042 -:1031C000032801D0072070470870002070470620B0 -:1031D0007047002807D0012807D0022807D003280D -:1031E00007D007207047002004E0112002E02120D2 -:1031F00000E0312008700020704738B50C4605000B -:103200004FD06946FFF7CBFF002822D12088032149 -:1032100089028843694609788907090D0843208097 -:103220006946681CFFF7BBFF002812D121880320E4 -:1032300000038143684600788007800C01432180A9 -:10324000A8784007820F2020012A03D0022A03D049 -:10325000072038BD814300E00143218088B2010589 -:10326000890F08D0012189038843A9780907C90F6C -:1032700089030843208080B28104890F0AD0A9788D -:103280004004C906C90F400CC903084320808004CC -:10329000800F02D12088400403D5208840210843B4 -:1032A0002080002038BD70B50446002008801546F7 -:1032B0006068FFF7A2FF002815D12189A08981420B -:1032C00010D861688978C90708D00121490288426D -:1032D00008D8491C12F0A3FF298009E0FF21FF3123 -:1032E000884201D90C2070BDFF30FF3003302880A8 -:1032F000002070BD10B5137804785B08E4075B000C -:10330000E40F23431370FD2423400478A407E40F43 -:10331000640023431370FB24234004786407E40F04 -:10332000A40023431370F724234004782407E40FF8 -:10333000E40023431370EF2423400478E406E40FF1 -:10334000240123431370DF2423400478A406E40FF0 -:103350006401234313700078BF244006C00F23404C -:10336000800103431370002906D00878C10701D1FA -:10337000800701D5012000E00020C0015906490E58 -:103380000843107010BD30B50A8803239B020488DF -:103390009A4323059D0F02D1A3049C0F01D09B0FDC -:1033A00000E001239B021A4303230A801B039A4374 -:1033B00003889804840F02D11805830F01D0800F71 -:1033C00000E00120000302430A8030BDF3B593B052 -:1033D0000D000FD0139800280FD01221284612F0AC -:1033E00001FF03AAFF21012003F0E7F8002426468D -:1033F00037467AE0102015B0F0BD0720FBE768469D -:10340000807D01280BD16846818A0520C002081AF8 -:1034100010D0012810D0022812D0032812D0042C7A -:1034200014D0052C15D113E002290000012800005A -:1034300003300000012400E002246846468A08E0C8 -:10344000032406E068460424478A02E0052400E0DD -:1034500006246846418A1398814246D12C74002E76 -:1034600041D00DAA0EA905200292019100901023CF -:103470000022FF21304603F041F9002823D168469D -:10348000808E2A46C0B20EA9FFF711FC00281AD17F -:10349000AE81002F27D00DA9052008AE0291009023 -:1034A000132300220196FF21384603F027F9002854 -:1034B00009D16846808EF11CC01EC0B22A1DFFF7DC -:1034C000F6FB002801D0032095E708A88178427810 -:1034D00008021043E881062C05D16846807DA87259 -:1034E0006846808A2881002085E703A803F06EF8EB -:1034F000002884D0FFF7D5FD7DE7002805D0F94AE4 -:10350000012903D0022903D003207047518800E02D -:103510009188814201D1002070470720704770B523 -:103520000C4605461C21204612F05CFE002020803F -:10353000002D08D0012D04D0EBA1F04812F073FF4C -:1035400070BD062000E00520A07070BD70B592B07F -:103550001546064601206A461071107453740846D9 -:1035600008300395029048889082FEF7E1F9040044 -:1035700019D06580172069468883203600940AABED -:103580007178023307AA01A80DF05FF9064660784A -:10359000000701D5FEF7ADF9002E0AD03046FFF73F -:1035A000ECFD12B070BD1321284607F01BF9032073 -:1035B000F7E708A800906846838B0422012128467B -:1035C00008F035FEEDE770B506468AB000200D46DE -:1035D00007900590069003A90490052402460291E5 -:1035E0000190102300942946304603F087F8002804 -:1035F0000DD108A804A9009102900194684683891E -:1036000000222946304602F095FE002801D0FFF73F -:1036100048FD0AB070BD10B50DF01DFB10BDF0B532 -:1036200089B000260546059600780C460827030059 -:1036300012F0EAFF0CFD070C3A0B77779EC2FCD81C -:10364000E8FD68680A38FEF7E8FA0DE1A88800236B -:1036500080B201220321009009F08CFA0290002C24 -:1036600004D0A648A0A16E3012F0DDFE029800281A -:1036700004D1A2489CA16F3012F0D5FE02980099A7 -:1036800008300CF017FDFEF753F9040007D06078FE -:103690003843607000986080FEF72BF9E6E0132154 -:1036A000009807F09FF8EFE0002C04D1BD208EA118 -:1036B000800012F0B8FE608800230122032109F087 -:1036C00059FA0090002804D18C4887A1883012F064 -:1036D000AAFE0099002008802A7994461EE0C300C3 -:1036E0005B199B6807936B469B8B1A0708D5DA0614 -:1036F00006D56046C20050194038C08F088006E0E9 -:103700005B0409D50871C2005019C08848806078F0 -:10371000384360700226A7E0401CC0B28445DED862 -:10372000A2E0E888694608800090002C04D1734824 -:103730006DA1983012F077FE2878062814D10098F1 -:10374000C00B11D0608800230122032109F012FA76 -:10375000060004D1694864A1A23012F064FE002082 -:103760003071A88870803BE06078384360707BE0FF -:10377000002C04D161485CA1B43012F054FE608882 -:1037800000230122032109F0F5F90090002804D15B -:103790005A4855A1B73012F046FE009808300DF097 -:1037A000ACFA0121484002D1E888C00B5CD00098F7 -:1037B00061880226C180D7E7002C04D14F484AA176 -:1037C000D03012F030FE608800230122032109F07E -:1037D000D1F9002804D1494843A1D33012F023FE87 -:1037E0000226C1E7002C04D144483FA1DC3012F08E -:1037F0001AFE0226618801222046FEF71FFA0120E8 -:103800000590B1E7A889002380B20122032100902E -:1038100009F0B0F90746002C04D0384832A1EE3048 -:1038200012F001FE002F07D12FA101E00FE016E0FA -:103830003248EF3012F0F7FD686802902889694637 -:103840008881012202A90098FEF714FA0CE0002CEE -:103850008AD16D2024A1C00012F0E5FD84E727483D -:1038600021A1FE3012F0DFFD002C0DD060780007A2 -:103870000AD50598002807D18420207020465822B8 -:1038800029460830FDF7A0FC304609B0F0BDF7B579 -:103890000C460546007A224688B00A320292921CF3 -:1038A00004920027811E16323E4601920B0012F050 -:1038B000ABFE08F605F548488DD1F4F5688800237D -:1038C0000122032109F056F90190002803D106A135 -:1038D0000B4812F0A8FD01980088002812D052274A -:1038E000072601E1000900207372635C676174744C -:1038F000735F636F72652E63000000006F0200004B -:103900008603000051271E26002C7DD06888A080E9 -:103910000120A071019802990079C0004019C08966 -:10392000FFF754FD002870D101980079C0004019BC -:10393000C089208101980079C0004019408AA08385 -:10394000F2E0698A0091062820D1E889C00B1DD0D9 -:1039500008462230512786B2002CD6D0A889049977 -:10396000FFF734FD002873D16888A0800220A07181 -:10397000A88920810120A072288AE08300982084F1 -:103980006969009A019812F0D0FBCDE0084620301A -:10399000502786B2002CB8D0A8890299FFF716FDEF -:1039A000002855D16888A080A889E080287A062858 -:1039B0000AD002202072288AA0830098E083204643 -:1039C00069692030009ADEE70120F3E76888002368 -:1039D0000122032109F0CEF80690688A009006982B -:1039E000002803D1FD49FE4812F01DFD069808305D -:1039F0000DF083F90121484002D1E889C00B26D09F -:103A00000098223086B201E073E021E05127002CBB -:103A100079D06888A080A8890499FFF7D7FC00288E -:103A200016D10220A071A88920810420A072288AC2 -:103A3000E083009820846969009A019812F075FB70 -:103A40000699002008710698A98941806CE003203E -:103A50000BB0F0BD688805F0D2FB019068880023A8 -:103A60000122032109F086F800900198002804D172 -:103A7000DB48DA492C3012F0D6FC0098002804D13B -:103A8000D748D6492D3012F0CEFC0098D549C088D1 -:103A9000884205D05127222604E01EE03FE035E0B1 -:103AA00050272026002C2ED06888A080502F07D0C9 -:103AB0000220A0712146287B0831FFF730FD33E05A -:103AC000287BA11DFFF72BFD6A8800230099019830 -:103AD000FFF73CFD0028BBD126E0C349A889C9886F -:103AE000814207D154270626002C0CD06888A0807C -:103AF0001AE008E053270826002C04D06888A0802C -:103B0000A889E08010E00A98068013E05527072670 -:103B1000002CF8D0A889A0800020A07104E08D209E -:103B2000AE49C00012F07FFC0A98002C068001D03C -:103B30002780668000208BE7AB4900200870704723 -:103B400030B585B00C4601F0E0F90546FF2804D1F8 -:103B5000A348A249953012F066FC00202080207115 -:103B60006080401EE0802046294608300CF096FA1E -:103B70006A462946012002F020FD102412E0684622 -:103B8000808800070ED56846C0882946FFF71BFDD0 -:103B900068468188FF2321438180C0882946019A95 -:103BA00002F036FE684602F011FD0028E7D005B0AD -:103BB00030BD0A46014610B5104608300CF082FAB6 -:103BC00010BD70B5002305461A46032108F0D2FF48 -:103BD000040004D182488149B73012F024FC204609 -:103BE000294608300CF066FA70BDF0B591B00C466D -:103BF000074605F004FB050005D02878222804D2EA -:103C0000082011B0F0BD7948FBE700231A460321D4 -:103C1000384608F0AFFF0646002C02D0A0880028E6 -:103C20000CD00120694608710220087400204874F5 -:103C3000002C05D0A0880883206802E00920E0E776 -:103C4000088305903046083003970290FDF770FE18 -:103C5000040018D0678017206946888320350094B7 -:103C60000AAB6978023307AA01A80CF0EEFD0546FD -:103C70006078000701D5FDF73CFE002D09D02846ED -:103C8000FFF77BFABDE71321384606F0ABFD0320B2 -:103C9000B7E708A800906846838B042201213846C4 -:103CA00008F0C5FA0021C943F180AAE7FFB585B045 -:103CB0000E9E7788384605F0A2FA054600231A467C -:103CC0000321384608F056FF0446002D03D143492E -:103CD000474812F0A8FB002C04D145483F49401C3E -:103CE00012F0A1FB0834089869460394C1C105A8E5 -:103CF0000DC8203569780CF017FAC6E5F0B5044612 -:103D0000002099B00D4601460D9010A881811646FD -:103D100001818180344A68469180018510A8018024 -:103D200068460187818581841078012808D002289F -:103D300006D0032804D0042802D0082019B0F0BD12 -:103D40002C4A944273D32C4F0121890438688C4249 -:103D500001D3844278D3274A954275D3012189043F -:103D60008D4201D385426FD36168002913D0214A67 -:103D7000914269D301229204914201D3814263D3DB -:103D800060892189884203D801225202914201D9D7 -:103D90000C20D3E70D9016AA0EA92846FFF783FA48 -:103DA0000028CBD1686880784007800F02280AD1AC -:103DB0006846008F8004800F05D02869002802D053 -:103DC0003968884240D30AA92069FFF716FA00280B -:103DD000B4D1206900281CD060780FE0E8380000DA -:103DE000EE030000FFFF0000000900200230000089 -:103DF0000C050000008001002800002080076846B4 -:103E0000008D03D58004800F68D002E08004800F0D -:103E100064D16846008D810618D58004800F6068E3 -:103E200006D0002812D0396888420DD302E00BE09A -:103E300000280BD0FE49884206D30121890488421C -:103E400004D33968884201D2102077E709A9606954 -:103E5000FFF7D3F900289CD16069002808D0684694 -:103E6000808C0105890F012938D18004800F35D05D -:103E70000BA9A069FFF7C1F900288AD16846808C98 -:103E800080062BD46846808D810627D4A16900293D -:103E900006D00105890F012920D18004800F1DD093 -:103EA000E068002804D00078002817D01C2815D21C -:103EB00004AA611C2046FFF71DFA0121890210A8FF -:103EC0000180012768468773DA49818104AA033299 -:103ED00017A92868FEF711FF002801D007202DE759 -:103EE00010A8007F15A9C01CC2B200200C9201903E -:103EF000FF32009003460291FF3203A8033210996B -:103F000002F0B3FA002826D110A9888A0F902A89D6 -:103F10002969C94801910092029010A90A8B6B8906 -:103F200028680E9902F0A1FA01007DD1C24800254F -:103F3000001F818868464174090A8174052104A81C -:103F40006A4623C210A82A46FF21808A0C9B02F0F1 -:103F5000F1F9002802D0FFF7A4F8EFE66846007CEC -:103F60000322C1090020920290430122920280188C -:103F70001490002928D0014610A801806846292104 -:103F8000877309028181058608A8007C0023410807 -:103F900060784900C007C00F014308A80174FD20E4 -:103FA00001406078A54A8007C00F4000014308A87F -:103FB00001740CA9022001910090029503A81099A8 -:103FC00002F053FA01002FD16068002828D0206940 -:103FD00000280DD10AA90EA8FFF7D5F9607880074F -:103FE00006D46946088D032109038843694608857C -:103FF000904968468773FE31818190492089891EE6 -:1040000012F00DF962680D9811AB019200900293C5 -:104010000A46002303A80A9902F027FA010003D1F7 -:104020002078C10603D400E086E080062AD56846E1 -:104030000586606900280DD109A90EA8FFF7A3F92C -:104040006846818C03208002814301208002091888 -:10405000684681846946888CC821084369468884FB -:1040600074488F73FF30888112AA0CA90220029233 -:10407000019100900023714A03A8099902F0F5F913 -:10408000010059D12078C00729D068460586A0696B -:1040900000280DD10BA90EA8FFF775F96846818D90 -:1040A000032080028143012080020918684681852F -:1040B0006846818D40200143684681858773604949 -:1040C000818113AA0CA90220029201910090002381 -:1040D0005A4A03A80B9902F0C8F901002CD1E068F4 -:1040E00000282DD010A8149901805549684687737F -:1040F000491C8181E16808A80A78027449784174F2 -:10410000E0684122418868464186E06800230179E1 -:1041100008A80175E068D200C18808A84175090A9D -:1041200081750CA8072101900091029503A81099B0 -:1041300002F09BF9010003D00F9800F0EAFEFDE5C4 -:104140003D480321001F0170002E0AD08088308076 -:1041500010A88088708010A80089B08010A880897D -:10416000F0800020EAE530B501248BB015460B46FF -:10417000012802D002281CD104E06846052184737E -:10418000C90203E02B4968468473891E8181002B94 -:1041900012D003210020890288430121890240189E -:1041A0006946888405AA04A91846FEF7A6FD0028DA -:1041B00004D007200BB030BD1020FBE76A46127C0C -:1041C0001D480092801E05A9FF3201910290FF3226 -:1041D000002303A80332099902F047F9002802D00E -:1041E000FEF75FFFE6E71448001F002D01D041886D -:1041F000298004700020DDE770B592B004460126E6 -:1042000008A886700F496846018410AA08A930469C -:10421000FFF7A9FF00284DD12078074DC0070024E3 -:104220002D1F002848D01C21684611F0DDFF0BE04F -:1042300000800100032800000409002003020000A0 -:10424000032900000118000068460178202001437E -:104250006846017008A88670F9496846018411947F -:104260000794817FF92001406846891C81770020EE -:1042700001466846017700200146684641770421DF -:104280008185C485018607A80A9011A80D9008A809 -:1042900009900EAA09A96846FFF730FD002809D148 -:1042A0006846008FE8806846808F2881401C6881BE -:1042B0002C70002012B070BDEC802C8110A80088FA -:1042C000F4E7F7B5DF4900260A789EB0012A04D04A -:1042D000022A02D0082021B0F0BD4A88824201D0D3 -:1042E0000620F8E71F98824201D10720F3E7012258 -:1042F00010A98A75D4488882002003239B020146B6 -:1043000099439302CB1810A90B8669468A81CF4A3C -:10431000CA8118A9887110A9888419A904916946CD -:10432000CA820690FF20087503A802F072F90024E3 -:104330002546274608AA052103A802F06DF90028A2 -:1043400010D082286FD1002C6FD0002D6DD010A816 -:104350008480C5800021017418A8807B11AC0128DD -:1043600065D06DE008A88079002F21D0012857D1B1 -:104370006846818CB44881421CD113AA0DA905203E -:104380006B4607C36846408C10230022FF2102F0D1 -:10439000B5F9002868D110A88089042801D0062822 -:1043A0004CD16846818E1F98814239D10F2092E707 -:1043B000012835D16846808C0521C902884202D087 -:1043C000491C88422CD19F4841886846408C8142D4 -:1043D00001D1012700E00027002C01D0002D10D0D2 -:1043E0001F9988421CD113AB0DAA05216E460EC63B -:1043F000044610230022FF2102F080F9002833D167 -:1044000001E035460CE010A88089022801D0102870 -:1044100014D1C0B21BAA0DA9FEF749FC00280DD18A -:104420006846468C86E71FE0FFE7052053E714A99E -:104430001BA8221DFEF761FC002801D003204AE7DB -:1044400010A8007C0023001DC2B210A8027420989E -:1044500002900194009215A81C9902F006F8002819 -:1044600002D1784902220A70FEF71BFE33E710B52D -:104470000B46401E86B084B203AA00211846FEF700 -:1044800039FF04AA052103A802920191009001239B -:104490000022FF21204601F04DFF04466846008AB5 -:1044A000012804D06D206A49000111F0BCFF2046AC -:1044B000FEF7F7FD06B010BDF0B5624F0446387840 -:1044C00087B00E46032804D0042802D0082007B085 -:1044D000F0BD04AA03A92046FEF7E5FE0500F6D1CB -:1044E000606880784007800F02280DD16846808977 -:1044F0008004800F08D02069002805D0554909683C -:10450000884201D21020E2E7208905AA6B46216982 -:1045100007C369460A8A63892068039901F0A5FFE9 -:10452000002802D0FEF7BDFDD1E7002E02D068467C -:10453000808A3080042038702846C8E738B50C00DF -:10454000054609D000236A46FF2102F039F9002808 -:1045500004D0FEF7A6FD38BD102038BD69462046C0 -:10456000FEF74BFE0028F8D1A078FF21C307DB0F30 -:104570002846009A02F04CF9EBE73EB50C0009D052 -:1045800002AB6A46FF2102F01BF9002804D0FEF7B7 -:1045900088FD3EBD10203EBD0321204611F022FEC5 -:1045A0006846008801A90005800FFEF712FE00286A -:1045B0000BD16846007920706846008801A9800404 -:1045C000800FFEF706FE002801D003203EBD68469E -:1045D00000796070A278EF20024068460088C10B25 -:1045E00009010A43F7210A404104C90FC9000A43DF -:1045F000A270F9210A40800601D5022000E00120C6 -:10460000400069460243097A50084000C907C90FB3 -:104610000843A07000203EBD7FB5144605220192DC -:1046200003AD029500930A462388FF2101F082FE24 -:10463000694689892180FEF734FD04B070BD000011 -:10464000052A00000009002002280000FFFF0000EA -:10465000E838000028000020F3B5002799B068462C -:104660000C4607873D4600291ED0E068002806D08A -:10467000A068002818D001886A4611870780199819 -:1046800004F0BDFD002812D0007822287ED31998AE -:1046900000F03BFC002300901A460321199808F013 -:1046A00069FA060009D104E010201BB0F0BDFD48F6 -:1046B000FBE7FD49FD4811F0B6FEA078012803D0C4 -:1046C000022801D00720F0E72088002808D0401EEB -:1046D00080B203AA009901F070FF002859D11DE0B3 -:1046E000F048401CE1E76946498A228891420BD292 -:1046F0006846807D0025012810D16846808AEC49F3 -:1047000088420BD1012509E0914203D1002D2AD026 -:104710006D1C01E0022D0BD0032D04D203A801F083 -:1047200055FF0028DFD082281BD0002831D11DE0A2 -:104730006946897D0129F1D16946DD4B8A8A5B1E74 -:10474000D11A9A420FD005DCDA48101A0BD0012892 -:10475000E4D108E0012906D0FF390129DED1032583 -:10476000E1E7022D15D10D2080029EE7E0680028C8 -:1047700016D00EA9052202910192009069460B8F76 -:10478000A2882088FF2101F0D5FD00E01EE000286E -:1047900002D0FEF786FC88E76846A168008F088093 -:1047A0006846008AC00601D5C3487EE707980028FE -:1047B00003D06846008B022801D0032075E70798D4 -:1047C000A1780078012903D0800710D408206CE775 -:1047D000C007FBD000220721199808F010F8002824 -:1047E00002D00725022004E0AE48801C5DE70225C8 -:1047F000032008A908702188684681851998083621 -:104800000A90099617216846818712AB02330FAAD6 -:10481000052108A800970CF018F8002802D0FEF730 -:10482000ACFC42E710A800906846838F042229461A -:10483000199807F0FCFC38E770B5064615460C469B -:104840000846FEF7EBFB002804D12A4621463046F5 -:10485000FFF789FCF2E610B5FFF733FD10BD70B528 -:104860001E4614460D0014D0002C12D06168002999 -:104870000FD00121FEF741FE002809D12068FEF784 -:10488000CDFB002804D1324621462846FFF736FAF0 -:10489000D4E61020D2E670B515460C000ED00221E9 -:1048A000FEF72BFE002808D12068FEF7B7FB002892 -:1048B00003D129462046FFF7FFFDBFE61020BDE6E5 -:1048C000F8B506467D480D46016814468A4231D344 -:1048D0006068002808D07A4A90422BD301229204C3 -:1048E000904201D3884225D37648864204D0304690 -:1048F00004F085FC00280CD0304600F006FB06468C -:10490000284600F0BFFA002804D16068002802D0D1 -:1049100012E06448F8BD00236A463146284601F09B -:104920004FFF002802D0FEF7BCFBF8BD68460088A8 -:10493000800601D41020F8BD6188224628466368AD -:10494000FFF76AFEF8BDF7B55C4E0746306886B0E3 -:104950001446824202D2102009B0F0BD384600F061 -:10496000D4FA05465748874201D0FF2D08D00023CE -:1049700004AA2946079801F023FF002826D101E068 -:104980004848E9E76846008AC00601D54A48E3E797 -:1049900003A9002002910527019000976288494BE6 -:1049A0002946079801F0AAFE00280FD161683268F5 -:1049B000914208D30191029000972388628829468A -:1049C000079801F09BFE694689892180FEF769FB03 -:1049D000C2E7002907D03C4B0A881B899A4202D8BB -:1049E0003048401C704737E610B586B004236C464B -:1049F000A382354BDC88002C07D01B898B4201D267 -:104A0000914204D92748401C54E5062052E56B46E4 -:104A100019825A820021009101911C800221997013 -:104A200005A9029104A903916946FFF715FE41E526 -:104A3000F3B50C4685B0812069460873002C1BD065 -:104A4000059804F0DCFB070018D03878222869D3D9 -:104A5000059800F05AFA049000220121059807F009 -:104A6000CEFE00280CD000231A460321059808F03A -:104A700081F805000AD105E0102028E5094826E55F -:104A8000112024E50849114811F0CDFC28460830D2 -:104A90000BF032FB06462078012819D0022838D0C6 -:104AA000072014E502300000E8380000E1080000AB -:104AB0000328000000280000013400002800002026 -:104AC00000800100FFFF000000090020840A0000B0 -:104AD000A18803AAFEF71CFB0028CED1B00721D580 -:104AE0006846007B00281FD1A079C0071CD0E06871 -:104AF000002205216B4607C36389228968880499CF -:104B000001F018FC6946087300280DD0FEF7C9FAB9 -:104B1000DDE4A18803AAFEF7FBFA0028ADD134201A -:104B2000064201D10820D2E46846037B2946384674 -:104B3000059AFEF70BFDCAE4FFB597B0002001907F -:104B40001F4615460C460E46179804F058FB0028E1 -:104B500004D00078222803D20820A6E5F448A4E572 -:104B6000B80801D00720A0E5032F00D1002717982F -:104B700000F0CBF90890002C1BD0022D77D3ED4824 -:104B8000006884427CD361190091012902D0491E3A -:104B9000814275D3AD1EAAB22146E74810F036F81F -:104BA00000991E394A7F0B7F11021943884267D151 -:104BB000ADB2E248B90702D50189491C00E00121E4 -:104BC00089B20091F90701D0078900E0DA4F03AA02 -:104BD0000899009801F0F1FC0DE0F078B17800023E -:104BE000084310284CD80199091D401880B2019043 -:104BF000A84245D82618002E60D07078317800027F -:104C0000084300998842E8D358E06946098A0A07B0 -:104C100054D5002C3FD0019AA618121D92B20992C9 -:104C2000F278B37812021A439446102A28D8099AC7 -:104C30006244AA4224D87278337812021A4390420E -:104C40001ED1C8061ED509980AAA052120186B4650 -:104C500007C3707831780002084363460022089940 -:104C600001F068FB002803D0FEF71BFA1DE507E002 -:104C7000F078B178000208436946098D884201D076 -:104C80000B2012E5F078B17800020843099940182A -:104C900080B2019006E0C90604D50899FEF793FC9E -:104CA0000028E3D16946088A1021884369460882B2 -:104CB000488AFF23049A089901F0AAFD03A801F08D -:104CC00085FC002803D16846408AB8429DD900235C -:104CD0001A460321179807F04DFF040003D19849A5 -:104CE000984811F0A0FB20880028BFD0012108A817 -:104CF00001700173002646732188684601862046AC -:104D00000830099017980A90FCF712FE05001BD096 -:104D10001798688017206946888010AB023301AA73 -:104D2000052108A800950BF090FD0746687800075C -:104D300004D584488249223011F075FB002F09D038 -:104D40003846FEF71AFAB0E41321179805F04AFD29 -:104D50000320AAE40EA8009068468388042201215B -:104D6000179807F064FA00288BD126809DE4F0B5EF -:104D700000248DB01F4615460E46002A04D0B908FF -:104D800004D007200DB0F0BD1020FBE7032F00D1A9 -:104D9000002700F0BAF80390FF2804D06749B8074D -:104DA00003D5488902E06248ECE70120FA0702D007 -:104DB0004989491E00E0604906AA8FB2039901F0B3 -:104DC000FCFB38E06946898B090734D504AB052123 -:104DD0000022029300910192574B039901F08EFC3F -:104DE000002821D1002E21D06A46128A2988A218D3 -:104DF0003019121D914234D36946CA8B0270120ACF -:104E000042700A8A8270120AC27004A90522001D2B -:104E10000092029101906946C88B0B8A0022039987 -:104E200001F06CFC002801D00320ABE76846008A43 -:104E30002018001D84B206A801F0C8FB002804D089 -:104E4000822806D0FEF72DF99CE76846C08BB84251 -:104E5000B8D9002C07D0002E10D02988A01C814280 -:104E600003D20C208EE705208CE7224631463248DB -:104E70000FF0CCFE31190870000A4870A41C2C8079 -:104E800000207FE700B585B06946FEF79FFA00284D -:104E90000AD16846007C030011F0B6FB08052F2FED -:104EA0002F2F08080531032005B000BD6846807823 -:104EB000012807D1684600880321C902401A1CD086 -:104EC00001281AD068468079012806D16846808872 -:104ED00015214902401A05280FD96846807A012811 -:104EE00011D16846018929200002081A05D002283C -:104EF00003D0032801D0042805D10F20D4E712A144 -:104F0000164811F090FA0020CEE710B507F028FE01 -:104F100010BD10B50C4601F023FB002803D00AA1F8 -:104F20000F4811F080FA2046FEF7BBF810BD0000D4 -:104F30000230000028000020FFFF000000090020D0 -:104F4000E83800003F0B00007372635C67617474A3 -:104F5000735F636F72652E63000000002202000021 -:104F6000BB060000F8B500780C46164610340E3625 -:104F7000069F022809D0032836D005287ED0FF20BE -:104F8000F6A1E53011F04FFAF8BDCD890A2068434B -:104F90000E30188031203880002AF5D0087B9581AA -:104FA000801FC7B21AE020886168308048780A788C -:104FB00000021043F080C8788A78000210433081E4 -:104FC000B21C3846091DFDF772FE002F01D00028E3 -:104FD00002D000203071708008340A3628466D1ED9 -:104FE000ADB20028DFD1F8BDCD890A2068430E306C -:104FF000188032203880002AF5D0087B9581401F28 -:10500000C7B243E0616822880878F2803279C3072A -:1050100052085200DB0F1A43FD231A408307DB0FAF -:105020005B001A43FB231A404307DB0F9B001A4324 -:10503000F7231A400307DB0FDB001A43EF231A4064 -:10504000C306DB0F1B011A43DF231A408306DB0F65 -:105050005B011A43BF231A404306DB0F9B011A432F -:105060003271C00970718A784B7810021843308110 -:1050700032463846C91CFDF71AFE00E00CE0002855 -:1050800002D00020B070308008340A3628466D1EE9 -:10509000ADB20028B6D1F8BD087BCD89801E86B29E -:1050A0003046083068431030188034203880002A99 -:1050B000F1D0174695811037E800D681C0190090CD -:1050C0000DE020883880009878603246616800984A -:1050D00011F02BF800980834801908370090284602 -:1050E0006D1EADB20028ECD1F8BDFFB581B00A9DB0 -:1050F0001E460C46002A05D0607AFF300130D08071 -:10510000E089108101980E270078030011F07CFAE5 -:105110000B7E0719293541536C7878787E00009210 -:10512000087B082805D0032803D091A1954811F0E9 -:105130007AF9378030200FE000990020888105B08F -:10514000F0BD0092087B042804D08E4888A114305A -:1051500011F069F937803120288000980028EBD1C0 -:10516000EDE70092087B042804D0932080A1800002 -:1051700011F059F937803220EEE70092087B0228BF -:1051800004D080487AA13A3011F04DF937803320AD -:10519000E2E7087B1746042804D07A4874A14C3013 -:1051A00011F041F91020308034202880002FC6D023 -:1051B0000020B88116E0207B1746052806D0062877 -:1051C00004D070486AA1603011F02DF912203080AF -:1051D00035202880002FB2D0E089B88100203882A5 -:1051E00001984088F881AAE70092087B072804D03C -:1051F00064485FA1713011F016F937803620ABE7B3 -:1052000033460095019800F00EFC98E72F2053A13B -:10521000000111F008F992E770B50C46054603F05D -:10522000EEFF002804D00078222803D2082070BDA9 -:10523000554870BD00231A460421284607F09AFC01 -:105240002060002801D0002070BD032070BDFFB594 -:105250008BB00D4607461720694608850E98032631 -:105260001446002805D10EA93846FFF7D5FF0028BF -:1052700034D1002D0BD000220321384607F0BFFAAD -:10528000002834D00E980078002830D108E020782B -:10529000092819D00F2823D030A13C4811F0C3F8B9 -:1052A0000E98A760801D03AA606002320AA92046FA -:1052B00000F00FFC002827D0030011F0A5F9071A11 -:1052C000182323211C1E23000726002231463846BE -:1052D00007F095FA0028E3D12B48801C0FB0F0BDF1 -:1052E00000220321384607F08AFA0028D8D111207D -:1052F000F4E70020F2E70820F0E72348401CEDE740 -:105300000720EBE70320E9E701A800906846038D3A -:1053100004223146384606F08AFF0028DED1002DEF -:10532000DCD00E990D70D9E730B587B01D460C461C -:10533000002A11D0042369460B7013888B81528890 -:10534000CA81A2788A7422880A8200236A46294682 -:10535000FFF77DFF07B030BD1020FBE77372635C81 -:1053600067617474635F636F72652E630000000091 -:105370007372635C67617474635F636F72652E63DD -:105380000000000025020000023000004F03000072 -:10539000F3B581B001980C4600780826030011F09F -:1053A00033F9125F47471B134B0A0A0A0A0A0A0A13 -:1053B0000A0A0A0A0A5F002C02D1F849F84808E0F4 -:1053C0006078304360703CE0002CF9D1F448F34938 -:1053D000083011F028F8F3E70198002380880122B3 -:1053E00087B20421384607F0C5FB0546002C04D0DF -:1053F0007520EA49C00011F016F8002D04D1E848E4 -:10540000E649143011F00FF83946A81D00F058FB9A -:10541000FCF78EFA040006D0607830436070678035 -:10542000FCF767FA0FE01321384605F0DBF915E0C9 -:10543000DB48DA49283002E0D948D8492D3010F04D -:10544000F2FF002C0AD06078000707D59320207067 -:105450002046582208300199FBF7B6FE0020FEBD19 -:10546000CF48CE493130EAE710B500210170801DE8 -:1054700000F023FB10BD0A4610B50146901D00F058 -:1054800027FB10BD70B5002305461A46042107F01E -:1054900071FB040004D1F920C049800010F0C3FF63 -:1054A0002946A01D00F00CFB70BDF7B5054684B081 -:1054B0000C4600206946088188806F8803460122D7 -:1054C0000421384607F056FB060004D1FD20B349FD -:1054D000800010F0A8FF002C03D0A7800020E080FF -:1054E0002081297A20461230C91E142700900B0013 -:1054F00011F08AF80FFEFDFC3809A95E657A2FB21B -:10550000C9E99191FC003078012804D0A3497020AA -:10551000143110F088FFA9896A46C8000E309080C7 -:1055200030201081002C13D0A18100200DE0C1009B -:10553000327909190A747288CA8182005319DA898A -:105540004A821A8A401C8A8280B2A1898142EED89E -:10555000F1E002A8009001AB22462946304600F057 -:105560002BFAE8E03078042804D08C49BD201431AF -:1055700010F059FFA8890622014650436A460E30B2 -:10558000908033201081002CE2D0A18100200BE01C -:10559000062141434F190919FA89CA81BA7C8A74D4 -:1055A0003A8A401C0A8280B2A1898142F0D8C2E0C6 -:1055B000307806280BD079491431D72005E03078AF -:1055C000062804D07549EB20143110F02CFFE8892F -:1055D00069461230888035200881002CB8D0A9890E -:1055E000A1817188E18126E03078072804D06B49D9 -:1055F000FF20143110F017FFA8896A4601460E30CB -:10560000908036201081002CA2D0A1812046AA894A -:105610000E30296954E0E8896946123080B2382298 -:1056200088800A81002C7ED0A989A181287A10283F -:1056300007D00221A173E9892182EA8929690098AA -:105640003EE00121F6E702A8009001AB2246294680 -:105650003046FFF787FC6EE03078082805D04F49C8 -:10566000FF201431EE3010F0DEFE684637218780CF -:105670000181002C5FD0A989A18100206082208255 -:105680000120A07357E03078092805D04349FF2056 -:105690001431FF3010F0C7FE288A69461430888024 -:1056A00037200881002C46D00421A173A989A1814B -:1056B000E9892182298A618220462A8A143069690F -:1056C00010F033FD37E030780A2804D033493548EC -:1056D000143110F0A8FE6846372187800181002C24 -:1056E00029D00521A1730020A08102E01EE003E083 -:1056F0000CE0208260821EE002A8009001AB2246EE -:1057000029463046FFF7F1FC15E00CE00D20694614 -:10571000392288800A81002C05D00120E0800020F9 -:105720002081207307E00699088019E01C481B4976 -:10573000A43010F078FE6846069980880880002C16 -:105740000ED0684600892080684680886080287A6C -:10575000032805D0102803D0112801D00020307074 -:10576000002007B0F0BDF7B5568815460F46002358 -:1057700082B01A460421304607F0FCF9040004D137 -:1057800007480649C43010F04EFEA41D33462A4691 -:1057900039460094029800F022FBD0E45C530000EC -:1057A0009503000013020000F7B58CB00D461446B7 -:1057B00007A90C98FFF730FD002812D1B64E01273B -:1057C000002C0FD00321684601701021818208A8A7 -:1057D00002460690204605A9FDF78FFA00280BD057 -:1057E00007207BE50821684601708581C681052177 -:1057F0008774C90201820BE00798A17801712188A2 -:105800004180684605218774C90201828581C6816D -:1058100002460121079B0C98FFF719FD5EE508B5CC -:1058200001236A4693709D4B13800A460223694602 -:10583000FFF77AFD08BD08B501236A469370974BC0 -:105840005B1C13800A4603236946FFF76DFD08BD04 -:1058500000B587B000290CD002236A4613700B886C -:1058600093814988D18100230421FFF7F0FC07B020 -:1058700000BD1020FBE710B5002903D00523FFF77A -:1058800053FD10BD072010BD70B588B00D461446FD -:10589000064607A9FFF7C0FC00280DD1002C0DD04B -:1058A0000621684601708581C481079B02465C80A1 -:1058B00006213046FFF7CBFC08B070BD05216846D5 -:1058C00001708581F1E710B588B000290BD007245D -:1058D0006B461C709A81049100236A462146FFF7AB -:1058E000B6FC08B010BD1020FBE770B500241722ED -:1058F00088B0002914D00D782B0010F085FE062307 -:10590000050519041B231522D21E93B2CA88002A4A -:1059100002D08E68002E03D09A4203D90C20CBE728 -:105920001020C9E7042D05D08A88002A0AD101E099 -:105930000620C1E7012D11D0022D05D0042D18D06D -:10594000052D23D00720B7E709236A4613704B883B -:105950009381CB88D381896804911DE00C236A462A -:1059600013704B889381CB88D38189680824049174 -:1059700012E00D236A4613704B8893818B88D38184 -:10598000CB88138289680924059105E00E236A46B5 -:105990001370497811730A2400232146FFF757FC3E -:1059A0008AE700B587B00F236A4613709181002300 -:1059B0001946FFF74CFC5AE7FEB50078089D1C46D7 -:1059C00016460F46012803D03549912010F02BFDD3 -:1059D000F889C0000E30208030202880387B001FDE -:1059E000C0B20190002E1DD0F889B081002516E0CC -:1059F000E8008419C0190090224641690E320198CE -:105A0000FDF755F9002802D000202074E0810098AD -:105A10006D1C008A60820098ADB2408AA082B08975 -:105A2000A842E5D8FEBD70B514461425049A1D8021 -:105A300037231380002C0ED0CA89A28100226282F3 -:105A40000078082808D0092810D00A2819D014494D -:105A5000144810F0E8FC70BD087B0C2804D01148F5 -:105A60000F490C3810F0DFFC012008E0087B0D28FE -:105A700004D00C480A49083810F0D5FC0420A07363 -:105A800070BD087B0E2804D006480549001F10F0A1 -:105A9000CAFC0520F3E70000FFFF00000228000019 -:105AA00070530000BB02000010B5FE4B5860197225 -:105AB0001A80C90010F098FB10BD002101807047CA -:105AC00010B50022D2430280032007F0F8FC10BD7D -:105AD0007047F0B50E460446017801208840F2492F -:105AE00099B008400090616815460888EF4A9042D6 -:105AF00006D0009A002A06D0EB4A521E104202D06D -:105B0000012019B0F0BD009A10430880002D12D07A -:105B1000002028702178EA1C0027681C01920B00E5 -:105B200010F072FD10F30E16233A59616F3CB4B0B9 -:105B30008AB8F2F1F0F320780B28EBD00420E0E7EC -:105B400002212970A1890170090A4170032097E0A0 -:105B500004212970A1890170090A41700198E18925 -:105B60000170090A417005208AE006212970A18987 -:105B70000170090A41700199E2890A70120A4A709B -:105B8000218A0171090A4171A28AE81DA16910F0F8 -:105B9000CCFAA08AC01D73E0082129702178082959 -:105BA00001D110212970A1890170090A4170019861 -:105BB000E1890170090A41700520308020466A1D84 -:105BC00002A91030FDF799F800287DD16946308888 -:105BD000097A401854E00A212970A1890170090A44 -:105BE000417003200BE00C212970A1890170090A82 -:105BF00041700198E1890170090A417005203080E7 -:105C00009CE0A08984464000401C81B230888842D4 -:105C10005AD3052958D30E202870002008E02369A4 -:105C200042009B5A521953701B0A401C937080B259 -:105C30006045F4D33180B9E09A48417A002973D0A5 -:105C4000491E4172217B4068C9004518A98828680F -:105C5000082240180838216910F067FA02216846C6 -:105C600001710021417128680390A988684601816B -:105C7000002101A8FFF78CFB0020A880002E00D097 -:105C8000308093E0297880221143297029784022BE -:105C90001143297029788909890112312970A18954 -:105CA0000170090A4170E289E81C216910F03DFA8F -:105CB000E089C01C3080287841063FD5C00975D0E6 -:105CC00001216846017200E02CE000214172318818 -:105CD000091D81810495E189019808180590001D2E -:105CE00006907048017A68460177002102A8FFF704 -:105CF0004FFB074630880C303080022F06D0002F33 -:105D000054D065E03DE033E01CE05EE06548694664 -:105D1000097F4268CB00D218037A994202D2918857 -:105D2000002902D0042753E02FE0417A491C417238 -:105D30001560308890800020308049E06168A0893B -:105D4000888033E029788909890116312970A18971 -:105D50000170090A41700198E1890170090A4170D6 -:105D6000228A681D616910F0E0F9208A401D46E72B -:105D700028788009800118302870207B6870022004 -:105D80007EE760680188090401D4052720E0C08807 -:105D9000A189884201D006271AE01E202870012020 -:105DA0003080606801884904490C0180009800280F -:105DB0000ED03C4800220088A1688300032007F031 -:105DC000D9FA61682078887007E0002030800327C6 -:105DD0006068009902888A430280384691E6FFB5E0 -:105DE0009FB0289D0E46002805D0172803D82A8882 -:105DF0002E4B9A4202D1072023B0F0BD32785306D1 -:105E000001D4D20901D00820F6E700226B461A71AE -:105E10005A7114463278431E1D939BB2189303ABFC -:105E20001A939706CB1CBF0E1B93821E711C3B005E -:105E300010F0EAFB209011EE66EE74EEB0EED4EEB8 -:105E4000EDEEECEEEBEEEAEEE9EEEEEEE8EEE7EE8E -:105E5000E6EEE5EE90EE05287CD10421684601715E -:105E6000A9780172F078B278010211436846418145 -:105E70003179417170788006800E0C282ED009DCB3 -:105E8000801E030010F0C0FB0919661C6621662401 -:105E90006627660012282AD00ADC0E2821D0102896 -:105EA000DAD121E00C090020FF710000FFFF0000A3 -:105EB00016281FD01828CFD11FE02878800701E0CE -:105EC00028784007002845DA45E128780007F9E7F7 -:105ED0002878C006F6E728788006F3E72878400699 -:105EE000F0E728780006EDE72888C005EAE728886B -:105EF000C004E7E728888004E4E728884004E1E755 -:105F00002A78920726D50328A6D105206A46107163 -:105F1000487809780002084310811CE12978490774 -:105F2000F0D5062816D3717890B2012902D0022943 -:105F300092D101E0022100E01021189106216A4669 -:105F400011710021118102AF189AB11C0237921C05 -:105F50001B921AE0B3E04A780B7812021A433A8097 -:105F6000801E891C1790BA1C1A911898FCF79FFE86 -:105F70001A991898189A091817986B46801A1A894E -:105F800080B2521C1A811B9ABF1D8242E3D900289D -:105F900086D1E0E028780007B4D51D98694682B222 -:105FA0000720087100200881701C0A3111E0437835 -:105FB00007781B023B430B80C37887781B023B4367 -:105FC0004B806F463B89121F5B1C001D92B23B81C8 -:105FD000091D042AEBD2002A71D1BCE02978C90638 -:105FE0006DD502286BD308206946087100204881CE -:105FF00070780872844692B2B01C1A9919E089E050 -:1060000090E07EE067E05BE030E025E019E013E03F -:10601000BCE0437807781B023B430B80831C4B603A -:106020006346D21A6F467B8960445B1C92B27B81C7 -:1060300008319445EDD9CEE7287880063FD509226E -:1060400003E0287840063AD50A2268460271AA88F9 -:106050000281189A428107E0287800062FD50B208C -:106060006A46107118981081039174E02988C90557 -:1060700025D5022823D30C206946087100204881C9 -:1060800070780872844692B2B01C1A9914E0437872 -:1060900007781B023B430B80C37887781B023B4386 -:1060A0004B80031D4B606346D21A6F467B89604468 -:1060B0005B1C92B27B8108319445E8D98BE763E0A1 -:1060C0002988C90460D501285ED10D216846017177 -:1060D000A98801813FE02988890455D5052853D333 -:1060E0000E2269460A71AA880A811B99401F4A78C4 -:1060F000097812020A4369464A818881701D04901A -:1061000029E0298849043FD501283DD10F2069465F -:10611000087120E02A88120436D44A780B781202DB -:106120001A43EA8003282FD332789206920E1B2A54 -:1061300026D011226B461A712A880123DB031A43E9 -:106140002A804A78097812020A4369460A81C01EE9 -:1061500048811B98039030788006800E1B2809D058 -:106160001D2807D00320229907F0A9F92888C00B21 -:10617000C003288001A82199FFF70AF920463BE6D1 -:1061800010226B461A71DCE70724F7E70824F5E7CD -:1061900000B597B0032806D16A461070019100211E -:1061A0006846FFF7F5F817B000BD000010B58B7812 -:1061B000002B11D082789A4207D10B88002B0BD08C -:1061C00003E08B79091D002B08D08B789A42F8D117 -:1061D00003880C88A342F4D1002010BD812010BD9B -:1061E000052826D0002A02D0012A0DD102E0098814 -:1061F000090501E009888904890F07D0012918D011 -:10620000022909D003290ED081207047002A01D02D -:10621000032070470220704703280AD0042808D0C2 -:10622000002804D007E0042803D0022803D005206A -:106230007047002070470F20704770B513880546DF -:1062400014460B8018061DD5FE481022807AA842FD -:1062500003D813430B80002070BDA06893430078DF -:10626000E840C007C00E03430B802078A178800768 -:10627000800D0843F4490FF0D2FFA0686943081865 -:10628000401C70BD906870BD37B569468B8813801F -:1062900019061BD5EB4C0125A47A9168844209D8D4 -:1062A000FE280FD1D80602D5A5406D1E00E00025BE -:1062B0000D7007E085400C78DB06DB0FAC438340B4 -:1062C0001C430C7010881021884310803EBDF8B527 -:1062D0000746C81C80080E468000B04201D08620C8 -:1062E000F8BD082A01D90E20F8BDD64D00202E6039 -:1062F000AF802881AA723446E88016E0E988491CFC -:10630000E980810610D48007A178800D0843CE492A -:106310000FF085FF206800F0BAFA2989401880B292 -:106320002881381A8019A0600C3420884107E5D4F0 -:106330000020F8BDFFB589B09F041646139DBF0C21 -:106340000193099800F095FA04000AD0207800061D -:1063500009D5BC48817A0A98814204D887200DB0BB -:10636000F0BD0120FBE7224669460A98FFF765FF6A -:106370000690002069460872052D14D0012221469E -:106380002846FFF72DFF0028E9D1207840060AD5DE -:10639000022168460172099981810188C1810682C2 -:1063A0004782129805900198000404D500273E46C4 -:1063B0000125079709E02078A1788007800D084320 -:1063C000A14907900FF02BFF0D46019840040AD514 -:1063D0000798A84207D12088E1788005800F000245 -:1063E0000843B04201D3AE4201D90720B7E7B8193C -:1063F00080B20190A84201D90D20B0E76846007A2A -:10640000002804D002A8FDF706F90028A7D10798B4 -:10641000A8420BD1208803210902884301998905EC -:10642000890F0902084320800198E0701498002821 -:1064300000D007801298002815D006983A46801997 -:1064400012990FF072FE224669460A98FFF7F5FE90 -:1064500069460888102188436946088022460099C9 -:106460000A98FFF711FF002079E7FFB5754D0C2260 -:10647000E8882968504383B00C180D9F724905982D -:106480000FF0CDFE0091049800F001FA29682A89E6 -:106490008E46611A0C310918944651188AB2A9889F -:1064A000914202D8842007B0F0BD6A46168A3206AF -:1064B00003D5B20601D58520F5E7EA88521C92B2D1 -:1064C000EA800E9B002B00D01A80B20601D5A7608F -:1064D00006E0604480B22881091A70460818A0605E -:1064E0002246FE200499FFF7CFFE0598A070009881 -:1064F000E07020880599800889058000890F08438D -:1065000003210902884300998905890F090208437C -:1065100004210843208003988078A07103980088A4 -:10652000A08000202073310601D5AC7A00E0012460 -:10653000B10600D5002700260EE0052100200191BC -:1065400002900097E88831460C9B069AFFF7F2FE0E -:106550000028A8D1761CF6B2A642EED30020A2E70E -:10656000F1B5009800F085F9060002D00025009CE6 -:1065700014E00120F8BD204600F07BF907460078C2 -:1065800031498007820DB87810430FF048FE386813 -:1065900000F07DF94019641C85B2A4B22948C18875 -:1065A000601E8142E7DC00992648491EC1800189AE -:1065B000491B018100203070F8BD002804D0401E26 -:1065C00010809170002070470120704710B504467C -:1065D00001881C48C288914201D3822010BD006806 -:1065E0000C22514342189079A07290882081108823 -:1065F000D1788005800F00020843A081A078211D7A -:10660000FFF71BFE20612088401C2080E0800020D6 -:1066100010BD012101827047F7B50546002084B006 -:10662000C043108068681746817868468170686842 -:1066300001886846018000218171288A2C88A04247 -:1066400005D303E0180900200102000004462C8253 -:1066500035E0288A401C2882301D6968FFF7A6FDB6 -:1066600000282AD139889248814201D1601E3880A1 -:106670006888A04228D33088F1788005800F000216 -:10668000084302906946301DFFF790FD002814D1A1 -:106690006989874881421BD0002231460598FFF75F -:1066A0009FFD002809D16A890298824205D1E968D4 -:1066B000B0680FF00DFD00280AD0641CA4B220467B -:1066C00000F0D7F80600C4D1641E2C828220EAE6CE -:1066D0007C80B079B871B088B8803078B1788007A4 -:1066E000800D084378810298B8813946287A32466D -:1066F0000831FFF7A2FD38610020D4E6FFB585B070 -:106700001C460F46059800F0B4F8050009D028781B -:10671000000608D56748807AB84204D8872009B0B7 -:10672000F0BD0120FBE707982A468605B60D6946AD -:106730003846FFF782FD07460E98052816D000223E -:106740002946FFF74DFD0028E9D1287840060DD5F0 -:106750000121684601710599018101884181868185 -:10676000C48101A8FCF757FF0028D8D12888AA784F -:106770008107890D11438005800FEA7800021043DC -:10678000079A964207D04C4A914204D3611E814237 -:1067900001DD0B20C3E7864201D90720BFE7801B3C -:1067A00082B2A24200D922461098002800D002806E -:1067B0000F98002802D0B9190FF0B7FC0020AEE7FF -:1067C000F8B51D4617460E4600F053F8040008D0F1 -:1067D0002078000607D53748807AB04203D8872052 -:1067E000F8BD0120F8BD224639463046FFF725FDA9 -:1067F000002D0BD02078A1788007800D08432E490A -:10680000884201D2012000E0002028700020F8BD5D -:10681000F8B51E4617460D4600F02BF8040008D0C8 -:106820002078000607D52348807AA84203D887201D -:10683000F8BD0120F8BD224639462846FFF724FD61 -:10684000FF2E14D02588A178A807800D08431A4987 -:106850000FF0E5FC002E03D1FF31FF31033189B287 -:10686000A170A80880008905890F084320800020B6 -:10687000F8BD1049CA88824207D3002805D00C22EF -:10688000096850430C38081870470020704703B55A -:106890000846694609888A0607D4090604D50549C9 -:1068A000897A4143491C88B20CBD00200CBD000010 -:1068B000FFFF00001809002001020000F8B507786A -:1068C0000D460446012F19D0072F02D00C2F19D1E5 -:1068D00014E0A068216906780B2E0BD0052006F085 -:1068E000EEFD052E0ED0782300220520216906F04A -:1068F00041FD07E0782300220620F8E70520216902 -:1069000006F0DDFD002D0ED000202870294620461F -:1069100004F0AEF9FE482978C05D884201D1032019 -:10692000F8BD0220F8BD0021204604F0A1F90020A6 -:10693000F8BD70B50E460C462036317901208AB07C -:106940001546002909D0012905D12978042902D149 -:106950000520107000200AB070BD6068019005A885 -:1069600002900D21C01C0FF03DFC032205A8A16878 -:106970000FF0DBFB01203071062069460870206AA9 -:10698000049029466846FFF799FFE4E770B50C4686 -:10699000154620310A790120062686B0002A2CD01F -:1069A000012A28D12978042925D169681022A068F4 -:1069B00001F0B4F96868C07B000606D5D44AA06827 -:1069C0001023103A014601F09EF91022A168E068F8 -:1069D00001F0A4F9A068C07B000606D5CC4AE068A7 -:1069E0001023103A014601F08EF92E70A0686860FD -:1069F000E068A860002006B070BD60680190C448DF -:106A0000203802900120087168460670206A0490C0 -:106A100029466846FFF752FFEDE7027B032A06D0BE -:106A2000002224235A540B78092B02D003E00420BF -:106A300070470A76CA61027B9300521C0273C150F0 -:106A400003207047F0B50E4615460C462036024628 -:106A500031790120072393B000290CD0012924D0DB -:106A600002292ED0032904D12978042901D12B70C1 -:106A7000002013B0F0BD01203071606800280DD0F7 -:106A8000A1690B7060684860206988606069C860AF -:106A9000206A08621046FFF7C0FFEAE70620287068 -:106AA000206968606069A86009E029780629E0D15A -:106AB0000220307104202870954820386860032037 -:106AC000D7E729780429D4D1A08910280AD9103809 -:106AD00080B2A081A1681023091805A86A6801F096 -:106AE00012F923E010282FD0C2B21020801AA1681A -:106AF0000DAF1190C0190FF018FB11980006000E91 -:106B000006D0401EC1B28020785438460FF06AFB90 -:106B1000626910230DA909A801F0F5F8102309A94D -:106B200005A86A6801F0EFF80320307160680190F1 -:106B300005A80290062069460870206A049029463C -:106B40006846FFF7BBFE94E710232269A168E2E7DD -:106B5000F0B50E460C4620363179012006278FB05D -:106B6000154600290BD0012932D0022905D12978F8 -:106B7000042902D10820107000200FB0F0BD217D43 -:106B800008A8CA07D20F02718807C10F08A80171AF -:106B90006846027041700722801CE1680FF0C5FA58 -:106BA00002A80722013021690FF0BFFA6068059042 -:106BB0000AA8069010236A46A16801F0A4F80120F3 -:106BC000307168460774206A0890294604A820E0BE -:106BD00029780429D1D1062205A8E1690FF0A5FA88 -:106BE00006A806220230A1690FF09FFA0020089043 -:106BF0006068019009A80290102305AA696801F055 -:106C000082F80220307168460770206A0490294695 -:106C10006846FFF753FEB0E770B50D460C462035C9 -:106C2000297901208CB01646002909D0012905D107 -:106C30003178042902D10920107000200CB070BDF9 -:106C40006068019006A802900822E1680FF06DFAD2 -:106C5000082208A8A1680FF068FA01202871062010 -:106C600069460870206A049031466846FFF726FEA0 -:106C7000E4E770B50D460C462035297901208CB02B -:106C80001646002908D00129D8D131780429D5D158 -:106C90000A2010700020D1E76068019006A80290D9 -:106CA0000822A1680FF041FA002008900990012005 -:106CB0002871062069460870206A049031466846AB -:106CC000FFF7FCFDBAE730B50B4620331C790120F5 -:106CD0008BB0002C09D0012C05D11178042902D1E8 -:106CE0000B20107000200BB030BD4868019005A843 -:106CF00002908C6868462578057564784475CC6880 -:106D0000257885756478C47500200690079001E0A9 -:106D10002867010008900120187106236846037057 -:106D2000086A049011466846FFF7C8FDDBE770B5B6 -:106D30000C462034034625790120002D0AD0012D70 -:106D400014D0022D05D111780A2902D10C2010701F -:106D5000002070BD01202071C868052202704A68B9 -:106D60004260F84A8260921CC2600BE015780B2DDD -:106D7000EFD102202071C868042404705268426078 -:106D80008A688260096A016201461846FFF745FE7B -:106D900070BD30B5011D02463132947803258379E8 -:106DA000ED432C4323408371DB070DD04B7954799D -:106DB00023404B710B79127913400B718278C9789B -:106DC0008A4200D9817030BD00224A710A71F5E70C -:106DD000F7B50C4686B00020694626460870203676 -:106DE000317901271E2015461F2977D24B007B449D -:106DF0009B885B009F441E0017023E0256026902F8 -:106E000088029A02D102F5022E03590371037F030F -:106E1000AE03C303CC03F7031A0464049A04AB045F -:106E2000DF04FE0410052A0565059B05C6058305DC -:106E300087058B056069002802D0007813287DD073 -:106E4000A0680590002849D0012168460170206A99 -:106E500004900321684601710A214171E0690290A2 -:106E600020790028EFD0059909780029E7D00C296E -:106E700064D20B000FF0C8FB0CFD1A4B90B5E8FC78 -:106E8000FBFAF9F807FD022828D16069002802D032 -:106E90000078082852D1022168460170206A0490C7 -:106EA00005984178684601710021B9E20620216AFF -:106EB00006F005FB20790728E6D1606900F050FF55 -:106EC00002280CD0606900F04BFF042807D06069ED -:106ED0000028B8D000780128D6D103E01BE2616910 -:106EE0000120087005980079C11F0A2901D30A20E2 -:106EF00050E06169072288706069059930300FF0B1 -:106F000014F90120307161690320087034E007280A -:106F1000BAD16069002896D001780929B4D10599C1 -:106F2000C978890707D1059949790029DFD10599E1 -:106F300089790029DBD105994A7900E04EE20146C2 -:106F400020314B7D9A43D2D1059A8B7D92799A4319 -:106F5000CDD1059A1279D31F0A2BC8D20979914253 -:106F600036D80722C01C05990FF0DFF801203071D8 -:106F700061690A200870032069460870206A04903D -:106F80006069313001906069001D029060691C30B9 -:106F90000390A1E22076F2E311288DD1606900F020 -:106FA000DFFE042804D0606900F0DAFE0B2893D1DC -:106FB0006069059910223730491C0FF0B6F86069F6 -:106FC000017804297CD12421095C8278914201D97D -:106FD0000620DFE70521017003203071684601704B -:106FE000E2E3112894D1606900F0BAFE062804D0CB -:106FF000606900F0B5FE0C288AD1E068002813D043 -:107000002069002810D060690178062910D00D2170 -:1070100001706069059910225730491C0FF085F8FE -:107020006069573009218CE100206946087072E1DF -:10703000072101706069059910224730491C0FF043 -:1070400074F860694730EDE70228F0D1606900F01C -:1070500087FE0028EBD0606900F082FE0128E6D0B0 -:10706000606900F07DFE05E0B1E08DE06CE02AE0B3 -:107070000AE0D6E00828DAD00521684601710598B3 -:1070800041786846417146E11128D0D160690028F5 -:10709000CDD001780E29CAD1C16A4078022810D01B -:1070A0000020142250431430085805991022491C1E -:1070B0000FF03BF80520216A00F040FE0F205EE053 -:1070C000F1E10120EDE70B28B1D160690028AED0D5 -:1070D00001780F29ABD1C16A4078022826D0002060 -:1070E000142250430C300958059842780A70807871 -:1070F00048706069C16A4078022819D000201422C3 -:1071000050431030085805990822C91C0FF00DF89B -:107110000520216A00F012FE60694178022909D039 -:1071200000220832825C5208520073E00120D7E747 -:107130000120E4E70122F4E7012100E00021083109 -:107140004254BCE30267010011289CD16069002809 -:1071500099D00178102996D1C16A4078022811D0BF -:107160000020142250431830085805991022491C59 -:107170000EF0DBFF0520216A00F0E0FD11206169BF -:107180000870B4E30120ECE7082884D16069002886 -:107190009DD00178112997D10599C06A497801706D -:1071A00060690599C06A0622401C891C0EF0BDFF6B -:1071B0000520216A00F0C2FD60694178022904D0EF -:1071C00000220832825CFD2323E00122F9E7112826 -:1071D000BBD160690028BBD001781229B5D1C16A42 -:1071E0004078022819D00020142250431C3008583F -:1071F00005991022491C0EF098FF0520216A00F025 -:107200009DFD60694178022909D000220832825C24 -:10721000FB231A40022991D18EE70120E4E70122E5 -:10722000F4E70720B6E6287801288ED160696968FE -:1072300014221C30F9F7C8FF6069017F002901D0D2 -:107240002176ACE30178032901D0032037E002273F -:10725000C77081794907490F8171017A4907490F40 -:107260000172417A4907490F41726069FFF791FD48 -:10727000377196E228780F28E3D107206946087015 -:10728000216A049191680291694608716169072237 -:10729000C91C02980EF049FF6169042008700020A3 -:1072A0003071BBE028780328CBD1606901780529CB -:1072B000696807D0082247300EF037FF042030718C -:1072C00005206FE208225730F6E728780328B8D166 -:1072D000606901780529696811D008224F300EF0E5 -:1072E00024FF052030716069006A00280AD002205E -:1072F0002870002028716069006AA860F9E00822FF -:107300005F30ECE704204DE22878022899D12879F3 -:10731000002801D0207642E36069A96801626069B3 -:10732000002901D1F949016206200BE228780F28D3 -:1073300087D1A868E0616069017805292BD04730C2 -:1073400007213171E16802220A706269126A4A609B -:10735000886060693030C8606069C01C086162691B -:10736000087D926A400812784000D207D20F10437D -:1073700008756269926A521C8A61FD221040626936 -:10738000D26A1278D207920F104308756069C06AFA -:10739000401CC86153E25730D2E728780828BAD198 -:1073A0006069017805291AD00B2101700720694610 -:1073B0000870206A0490E069029011200871029818 -:1073C0000321017051681022401C0EF0AEFE002116 -:1073D0006846FFF773FA00203071E06187E206210A -:1073E000E3E728780F2896D1072069460870206ABD -:1073F0000490A8680290112008710298042101707D -:1074000061690A78072A0ED0002232710C220A70B4 -:1074100061691022401C47310EF087FE002168464A -:10742000FFF74CFA63E21022401C57310EF07DFE4C -:1074300000216846FFF742FA0A203071E168032014 -:1074400008706069006A48606069573088606069E8 -:107450004730F3E128780828A1D1606969681022D3 -:1074600037300EF035FE002801D0042092E5606927 -:107470000078072817D00A203071E16803200870CF -:107480006069006A486060695730886060694730A9 -:10749000C860206A08620698FFF7BFFA074660696D -:1074A000FFF777FC6BE208207AE1287809289AD167 -:1074B0000B20307161696868897810224018511A70 -:1074C0000EF090FE082069460870206A04906868F3 -:1074D000019060698078087268E129780D29BBD134 -:1074E00061698979C90703D00C20307109203EE019 -:1074F0003071032770E228780E28ADD1606914221C -:10750000291D1C30F9F760FE6069018DC06A417267 -:10751000090A817260698178C06AC1716169CA6A49 -:10752000081D117AC909C9011172437962691943A9 -:107530008378D26A9B079B0F012B00D00023007930 -:107540009B01C00003431943117260694078012810 -:1075500076D0B4E160694178022901D0012100E0D0 -:1075600000210831405CC00707D00E20EAE06946E0 -:107570000870206A1146049019E11320B8E72878B2 -:107580000F2894D1A868E0610F2030710520EEE744 -:10759000287803288BD16069C16A4078022801D01D -:1075A000012000E000201422504310300858082227 -:1075B00069680EF0BAFD10203071E168062022697A -:1075C00008706069406A48606069C36A4078022850 -:1075D00001D0012000E00020142778431030185813 -:1075E000CA6088602BE128780C2886D16069C26A5D -:1075F0004078022801D0012000E0002014214843F7 -:107600000C30105802230932696800F07CFB11200D -:107610003071E168052008706069006A486060693F -:10762000C06A093088603948001F07E128780B28B4 -:10763000A7D161694878CA6A022802D0012001E016 -:1076400059E1002014235843143010588A7869688F -:107650000EF06BFD60694178C26A022901D00121F8 -:1076600000E00021142359431431525881785018F6 -:107670001022511A0EF0B6FD072069460870206AE4 -:107680000490E069029011200871029806210170AF -:107690006169CA6A4978022901D0012100E000210C -:1076A00014235943143151581022401C0EF03DFD53 -:1076B00000216846FFF702F90020E06112206FE028 -:1076C00028780F2891D1072168460170206A04901C -:1076D000906802900B2268460271029801706169FD -:1076E000CA6A4978022901D0012100E0002114234F -:1076F00059430C3151580A78427049788170616958 -:10770000CA6A4978022903D0012102E00867010012 -:10771000002114235943103151580822C01C0EF087 -:1077200004FD00216846FFF7C9F826E76069417843 -:10773000022901D0012100E000210831405C8007CE -:1077400003D5142030710A2011E71620D0E62878DE -:107750000F287AD1A868E061072069460870206A7E -:107760000490E069029011200871029808210170CC -:107770006169CA6A4978022902D0012101E011E158 -:10778000002114235943183151581022401C0EF087 -:10779000CCFC00216846FFF791F80020E06115203D -:1077A00030710A2069460870206A049029466846AC -:1077B000FFF784F82BE028780F2846D10720694688 -:1077C0000870206A0490906802900820087102985E -:1077D0000921017061690622C969097841706169EE -:1077E000801CC969491C0EF0A0FC00216846FFF707 -:1077F00065F8AAE760694178022901D0012200E01A -:1078000000220832805C400703D51720C8E70746EE -:10781000B5E0012953D070E028780F2815D1A86869 -:10782000E06118203071E168052008706069006A25 -:1078300048606069C06A09308860F848C860206A9A -:1078400008620698FFF7E9F8E1E76FE028780B286F -:107850006CD16069C16A4078022801D0012000E043 -:107860000020142250431C300858102269680EF082 -:107870005CFC072069460870206A0490E069029069 -:107880001120087102980A2101706169CA6A497859 -:10789000022901D0012100E00021142359431C31A9 -:1078A00051581022401C0EF040FC00216846FFF7A2 -:1078B00005F80020E0616069407801281DD1192099 -:1078C00016E660694278022A09D000210831411881 -:1078D000097800290DD0CA0703D00E2106E0012146 -:1078E000F4E7890701D5102100E01221017000277B -:1078F00072E0012A01D00D20FAE51C20F8E51D20D8 -:1079000030710B2033E62978102948D1F0E5606901 -:107910000178012943D0082941D00021317100F0BC -:1079200019FA0C2069460870206A049037E028781C -:107930000F2805D01020107003271B2030714BE05A -:10794000072168460170206A0490A868029002210D -:1079500068460171029805210170217E4170002165 -:107960006846FEF7ABFF0B2168460170206A049061 -:1079700029466846FEF7A2FF07461B203071012FFB -:107980000DD029E0012168460170206A049004218D -:1079900068460171217E41710020207612E0207E30 -:1079A00000280FD06169132008701A2030710A2056 -:1079B00069460870206A049029466846FEF77EFFF3 -:1079C000074609E06069002801D01421017068466B -:1079D0000078002800D021E5384609B0F0BDF7B5A1 -:1079E0000F4620373879012686B00C46002804D08F -:1079F000012828D002281CD197E02079012804D042 -:107A0000022811D0032814D10AE0A0684078012888 -:107A10000ED10620216A05F02CFD00287FD10CE054 -:107A2000A1681320087008E0A0684178022901D0FD -:107A3000052674E00078082871D1012038710A20E9 -:107A40006946087033E0089800780F2867D107214D -:107A500068460170206A049008988568029522792A -:107A60000220012A04D0022A29D0032A57D10FE08C -:107A70000646684606710B202870207B00214007CF -:107A8000400F68706846FEF719FFA068067045E071 -:107A900006466846067105202870207B6870002124 -:107AA0006846FEF70BFF3E710B2168460170206AA5 -:107AB000049068460899FEF701FF06462FE06846E5 -:107AC000017101202870207C6870607CC007C00FA5 -:107AD000A870A07C4007400FE870E17C2971C007C6 -:107AE0001FD0207D4007400F6871607D4007400F28 -:107AF000A87100216846FEF7E1FEA068072229462A -:107B000030300EF012FBE068017AA068203001717D -:107B1000A16828798870A16809200870002630467D -:107B20005BE70020A8716871E3E7A1681420087082 -:107B3000012168460170206A0490042168460171A1 -:107B4000217B41710021FEF7B9FEE7E7F0B585B072 -:107B50000F4605460124287B800040198038C66FF7 -:107B60003078411E0A290AD22C498000323140184F -:107B70008038C36F3A463146284698470446002C61 -:107B800001D0012C11D1287B401E0006000E287365 -:107B900001D00324DFE70D2069460870306A0490A5 -:107BA000002101966846FEF789FE032CD3D02046BB -:107BB00005B0F0BD70B515460A4604462946104684 -:107BC000FFF7C4FF0646002C0FD0207814280CD1F4 -:107BD000207E002806D000202870204629460C3040 -:107BE000FFF7B4FF204600F0B5F8304670BD70478F -:107BF00010B5012903D0022901D0052010BD417024 -:107C000000F0A8F8002010BD002809D0027E002A4C -:107C100006D00A4601460C31CCE700000667010099 -:107C20000120704730B5044687B00D46062005F0A8 -:107C300046FC2946052005F042FC2078142805D092 -:107C40000020694608702046FFF7DEFF07B030BD10 -:107C50007FB50E4600216A4611730178092903D0C9 -:107C60000A2903D0002407E0446900E08468002C5E -:107C700002D0217E002912D0154601462846FEF783 -:107C8000CCFE032809D1324629462046FFF792FF51 -:107C90006946097B002900D0042004B070BD254648 -:107CA0000C35EAE700B50023012285B005280CD089 -:107CB000062808D1684602700491022101714371BF -:107CC0000021FEF7FBFD05B000BD6846027004917F -:107CD0000271F4E710B590B00C4605216A461170A8 -:107CE000019022480290001D03900AA96846FFF700 -:107CF000AFFF002805D1102220460B990EF015FA8F -:107D0000002010B010BD30B505E05B1EDBB2CC5CCE -:107D1000D55C6C40C454002BF7D130BD10B50024A5 -:107D200009E00B78521E5B00234303700B78401C64 -:107D3000DC09D2B2491C002AF3D110BD70B50C4643 -:107D4000054605F0BCFB782300222146284605F0B5 -:107D500011FB70BD4178012900D0082101707047E6 -:107D6000002801D0007870470820704700670100A4 -:107D700038B50446002069460870204609F053FDD6 -:107D8000002803D1FBA1A3200EF04DFB204609F0F3 -:107D900099FC002803D1F7A1A8200EF044FB684607 -:107DA000007838BD70B5F84D002428462C77203077 -:107DB0008471C47101F09AF928464038047020306B -:107DC0008473847484772C75AC7170BD10B50C46C7 -:107DD000EE4982888A8042884A8000780870084686 -:107DE0000E38847009F050FC08F0FDFFFFF7DAFF51 -:107DF00020460BF013F8E449A8310846813809F011 -:107E0000ADFEE2480CF021FBE0480A3808F0FEFF26 -:107E1000002803D0D7A1C5200EF005FB01F066F9BC -:107E200010BD7CB50E461D46144601A909F008F8A0 -:107E3000002807D10AF091FB022803D1D248007D27 -:107E4000002801D001207CBD01988030807C09F0A1 -:107E50004DFC00280CD0684609F052FC0028F2D0F6 -:107E6000002C03D009F011FCA04206D200207CBDFA -:107E7000C0A1C7480EF0D7FAF8E7009809F0D8F883 -:107E80003146009809F0DBF8E2B22946009809F083 -:107E9000F0F909F045FC002804D1BD48B5A11E3019 -:107EA0000EF0C1FAB94C00250E3C6068A030417953 -:107EB000002902D045710BF0D8F860688030458306 -:107EC000C0E730B40179002904D0012907D030BCC3 -:107ED00000207047831D42880488022103E0428805 -:107EE0000488831D0121204630BC9AE7F8B51D4661 -:107EF00014460E4607460AF030FB022803D0A2487B -:107F0000007D002823D0A1480E3841684988398077 -:107F100040688030807C09F069FD002804D153203E -:107F200094A1C0000EF07FFA684609F069FD0028B0 -:107F30000DD0009809F0BAF83070022808D0012856 -:107F400006D093488BA167300EF06DFA0020F8BD83 -:107F50002946009809F0A4F92080002804D1552072 -:107F600084A1C0000EF05FFA09F05DFD002804D185 -:107F7000874880A160300EF056FA0120F8BD38B570 -:107F80000446831D821C6946FFF7B0FF00280DD010 -:107F90000020607168460078012808D0022806D0C9 -:107FA000FF2074A101300EF03EFA012038BD20718F -:107FB000FBE7F8B50AF0D1FA744D734C0E3D022878 -:107FC00002D0207D00287DD0207F0026102818D1E7 -:107FD000A079002803D067A16E480EF024FA6868E3 -:107FE00001464030827F92070BD526724988618115 -:107FF000C17F2173018CE181408C20820120A0711E -:108000002677614F203FB87C00285ED168686946BA -:108010008030807C09F007FC002805D0694668782C -:1080200009784018687004E05A4852A119300EF0DF -:10803000FAF9207D00283AD06868418852484038D3 -:10804000806D4088814204D00F204AA1C0010EF00B -:10805000EAF968688030807C09F0C8FC002804D107 -:108060004C4844A124300EF0DEF909F0EEFC002863 -:108070001DD068688030807CFFF77AFE69784018F0 -:10808000687041484038806D4030417A01290DD1F7 -:108090002670696849886180807A20710120B877EC -:1080A000207F102801D0282800D1267726756978EE -:1080B00000290AD06868428833484038C286018760 -:1080C000012000E001E0B8746E700AF029FA00287F -:1080D00005D1207D002802D0A878FAF7F9F8F8BD7C -:1080E000F8B50446FFF765FF274D0026203DA87E22 -:1080F000002808D0667010202070E87EA070287FCD -:10810000E070AE769AE0204F403F3878002808D0E3 -:108110002C22B91C20460EF008F80E2020703E706C -:108120008CE0A87B184F002815D0387F102808D085 -:10813000282806D0002804D0FF200EA1C2300EF05F -:1081400072F90120E070E87BA070287C60700F203D -:108150002070AE7372E00121204609F099FC0028DE -:108160001AD0387D002857D10021204609F090FC14 -:10817000F8BD00007372635C6C6C5F6374726C2E8C -:1081800073302E630000000094090020720000206C -:108190004F02000062070000A97CF8480090F848F0 -:1081A000002910D0017805290DD2491C0170667094 -:1081B0000D202070012028750622A01C00990DF0CA -:1081C000B4FFAE743AE0EE480670B879002812D0D9 -:1081D000387F002804D00120EA4940020EF023F93C -:1081E00066700120E54920700A221431A01C0DF0B0 -:1081F0009CFFBE7122E020460CF083F800281DD1C0 -:10820000A87C002802D0DE480178CEE7A87F0028AD -:1082100002D0387D002801D00020A9E7387F00284F -:1082200003D0D849D8480EF0FEF866700A202070B6 -:1082300006223946A01C0DF078FFAE77012097E7A3 -:108240004EE710B5CD4C343C2178002904D01321E1 -:108250000E2000F052FF10BDC9490088091D08F02A -:10826000EFFD002801D0022007E0C5484068014624 -:1082700020318A79012A02D00C20207105E00022E9 -:108280002271097E21724088E080012060711321F3 -:10829000E1700E21A170207010BDB84810B53438BF -:1082A0000178002904D024210E2000F026FF10BD03 -:1082B000012101702422C2700C220271417110BD93 -:1082C00070B5AE4C0546343C2078002804D03E21E1 -:1082D0000E2000F012FF70BD0AF03FF9002808D10F -:1082E0000AF03EF9002804D1A4480C30007F002891 -:1082F00001D00C2003E0287809F033FD0020207124 -:10830000012060713E21E170207070BD9B4810B566 -:1083100034380178002904D03C210E2000F0EDFE15 -:1083200010BD00210171012141713C22C270017018 -:1083300010BDF8B5914C343C2078002804D03B2186 -:108340000E2000F0DAFE13E70020A0710AF005F914 -:108350008A4E01250C36022802D0307D002840D0FC -:10836000874F694678688030807C09F073FA00286E -:1083700003D1844985480EF056F8307D002806D098 -:10838000A06D4030407A002801D0012600E0002690 -:1083900078688030807C09F029FB002804D17B4874 -:1083A000784908300EF03FF809F04FFB684031463D -:1083B000014316D07968FD2249882181217E400041 -:1083C000490849003143114001432176684600784D -:1083D000002802D00420014301E0FB200140217667 -:1083E000A5710020207165713B20E0702570BFE60B -:1083F00010B5624C343C2078002804D00E21084689 -:1084000000F07BFE10BD5E4906220831A01D0DF074 -:108410008CFE00202071012060710E21E17020701F -:1084200010BD70B5554C0546343C2078002804D06A -:1084300038210E2000F061FE70BD50480C30007FE6 -:10844000002807D00C202071012060713821E170D4 -:10845000207070BD287809F072FC28780CF05BF968 -:108460000020F0E770B5454D0446343D28780028DB -:1084700004D037210E2000F040FE70BD3F480C3084 -:10848000007F002801D00C200AE03D4E2188706852 -:108490004088884203D10AF060F8022807D0022001 -:1084A0002871012068713721E970287070BD7168EA -:1084B0007F2020310876487600208876A2788A715D -:1084C000E278CA7122790A72EAE710B52B4C343C83 -:1084D0002078002804D039210E2000F00EFE10BDB7 -:1084E0000AF03BF8032808D00AF03AF8032804D031 -:1084F00022480C30007F002801D00C2003E01F49E7 -:1085000000202C31C8712071012060713921E17087 -:10851000207010BD70B5194C0646343C20780028F8 -:1085200004D03A210E2000F0E8FD70BD0AF015F8E5 -:10853000032808D00AF014F8032804D00F480C30A0 -:10854000007F002801D00C2011E00C4D2C35E8797B -:1085500008280BD20001001910223146683000F0C3 -:10856000D6FDE879401CE871002000E0072020716A -:10857000012060713A21E170207070BD88090020EF -:108580006400002074810000210200001708000030 -:10859000F8B5FA4E04463078002804D03D210E206C -:1085A00000F0ABFDE4E5F5484030007F002801D045 -:1085B0000C2034E0F24D218868684088884203D15D -:1085C00009F0CBFF022801D0022028E06F68648800 -:1085D000FD883A896800B988401C844218D3E9486C -:1085E00041431046E84A50430DF019FE401EFF215A -:1085F00080B2F531884200D90846844200D2204634 -:10860000691C401C0DF00BFE6D1C6843401E85B2BA -:10861000E620C05D002800D1BD84F58000203071C7 -:10862000012070713D21F1703070A1E5F8B5D34C97 -:1086300005462078002804D035210E2000F05DFD8D -:1086400096E5CE484030007F002801D00C2016E08F -:10865000A878002801D0012804D1A888FF21F5318D -:10866000884201D912200AE0C54F298878684088DD -:10867000884203D109F071FF022807D0022020713F -:10868000012060713521E170207071E57968002664 -:108690000846C0310E70AA884A800122A0300271BB -:1086A000AA78012A00D000220A704079002801D05F -:1086B0000AF0DBFC2671E3E770B5B04C0546207884 -:1086C000002804D030210E2000F017FD55E709F0F6 -:1086D00044FF002804D1A9484030007F002801D081 -:1086E0000C2003E028780AF0E0FB00202071012034 -:1086F00060713021E17020703FE770B59F4C0546F6 -:108700002078002804D033210E2000F0F6FC34E756 -:1087100009F023FF002804D198484030007F00284A -:1087200001D00C2018E02978002911D00A290FD097 -:1087300014290DD01E290BD0282909D0322907D0A1 -:108740004B2905D0642903D0FF2901D0122003E072 -:1087500028460AF023FC002020710120607133219B -:10876000E170207009E770B5844C06462078251D1D -:10877000002804D032210E2000F0BFFCFDE6314677 -:10878000002009F0AEFA2870002805D17C480622A6 -:10879000314608300DF0C9FC012060713221E170D2 -:1087A0002070EAE670B5754C2178002904D031219B -:1087B0000E2000F0A2FCE0E600214156012504292C -:1087C00012D0002910D0081D0ED0001D0CD0001DA5 -:1087D0000AD0001D08D0001D06D00A3004D00A308F -:1087E00002D01220207103E0084606F079FD657181 -:1087F0003120E0702570C0E6FEB5604C0746207859 -:10880000002804D025210E2000F077FCFEBD38881A -:10881000694608F015FB594D01460020083500292E -:1088200004D002212171286028710FE00098009E79 -:108830000A30019060360020B07105222846019967 -:108840000DF073FCB0790028F5D13888E0800E2057 -:10885000A0702520E070012060712070FEBD10B571 -:10886000464C2078002804D005210E2000F045FC5D -:1088700010BD0020207108F008FFE08008F0D1FF53 -:108880002072012060710521E170207010BDF1B5EA -:108890003A4C2034A07B002804D010210F2000F097 -:1088A0002CFC65E4354D4035A8790C2610270028AE -:1088B00016D1287F002813D109F04FFE022824D1B9 -:1088C0002F4800994068098842888A421DD1014694 -:1088D000C0310A7A002A05D04030807F80070DD44D -:1088E000E6730EE05E22125C920707D406220A723B -:1088F000A0304079002801D00AF0B7FB2F77002084 -:10890000E07327740120A07332E40220F8E710B569 -:108910001A480178002904D00F210E2000F0EDFB49 -:1089200010BD00210171FF2181710021C943018126 -:1089300013490E310A7882728A8882814988C181FE -:10894000012141710E2282700F22C270017010BD90 -:1089500010B50A4C2078002804D02B210E2000F0FE -:10896000CCFB10BD0821A01D04F024FB00202071C9 -:10897000012060712B21E170207010BD540900208E -:1089800064000020C40900001027000070B5FA4DF3 -:1089900004462878002804D02A210E2000F0ADFBE0 -:1089A000EBE5F54810222146303800F0B0FBF248E4 -:1089B0001022A118203800F0AAFBEF4830380CF044 -:1089C000BCFBED49102210392C46A81D00F09FFB7E -:1089D000002020710E20A0702A20E070012060711C -:1089E0002070CAE5F8B50546E348E34C40300090F6 -:1089F000007F0C2628272034002801D0E6733EE0B3 -:108A0000A07B002804D028210F2000F076FB04E48E -:108A1000A87805280DD013280BD0142809D01528C4 -:108A200007D01A2805D0292803D03D2801D03B289B -:108A300003D12888D149884201D912201EE009F0CB -:108A40008CFD0228DAD1CE482A88406841889142BC -:108A500013D10146C0310A79002ACFD1AA784A71D0 -:108A600001220A710099A0300F770021E17340794B -:108A7000002804D00AF0F9FA01E00220E07327741C -:108A80000120A0735FE4F8B5BB4F064638783D1D62 -:108A9000002804D017210E2000F02FFB53E43146AC -:108AA000012009F01EF901242870002807D1B248DE -:108AB00006226030314605460DF037FBAC717C7103 -:108AC0001720F8703C703EE470B5AB4C0646207839 -:108AD000002804D00B210E2000F00FFB4DE509F01B -:108AE0003CFD032808D009F03BFD032804D0A24830 -:108AF0004030007F002801D00C2016E03378002B96 -:108B000003D0012B01D012200FE09B4DE035297AD4 -:108B1000082909D22846721C0C3006F097FB287AE7 -:108B2000401C2872002000E00720207101206071A5 -:108B30000B21E170207020E510B58F4C20780028C3 -:108B400004D00A210E2000F0D8FA16E709F005FD3E -:108B5000032808D009F004FD032804D086484030DB -:108B6000007F002801D00C2002E000F0BFFA0020B6 -:108B70002071012060710A21E1702070FDE610B5BE -:108B80000AF032F9002803D07E497F480DF04BFCF3 -:108B900008F04BFD0BF051FC002804D01720794958 -:108BA00040010DF040FC08F0ACFF002804D0B920D3 -:108BB000744980000DF037FC00F098FAFFF7F2F8E6 -:108BC0006D4800210171012141710222C2700170C2 -:108BD000D3E610B5684C2178002904D020210E205E -:108BE00000F08BFAC9E601781F290ED8411C0CD081 -:108BF000002121710278411C104609F08FF80120F4 -:108C000060712021E1702070B7E612202071F6E734 -:108C1000F8B5594C2178002904D01B210E2000F012 -:108C20006CFABFE401216171534E0C212171403671 -:108C3000317F00296FD10078514F0025012804D0E1 -:108C400000284AD01220207165E009F086FC002837 -:108C500003D109F085FC002804D009F07EFC02282D -:108C600022D058E008F08FFF002854D0307D002833 -:108C700051D1786801224580032108F0B4FB78685F -:108C800009F05AF97868923008F001FD002803D104 -:108C90003C493E480DF0C7FB0AF00BF9002839D0DB -:108CA00085203849C00015E009F05AFC002832D16F -:108CB000707F00282FD001282DD004282BD008F059 -:108CC00062FF002827D00AF0F4F8002822D02F48AD -:108CD0002C4918300DF0A7FB1CE009F03EFC0328DE -:108CE00004D009F03DFC03280FD014E000200AF066 -:108CF00005F800280FD12571307D00280BD1786848 -:108D00008030807CFFF734F805E0002009F0F6FFA2 -:108D1000002800D125711B20E0700120207041E463 -:108D200010B5154C2178002904D01A210E2000F02E -:108D3000E4F922E601781F290ED8411C0CD000214D -:108D400021710278411C104608F0FDFF012060717E -:108D50001A21E170207010E612202071F6E770B53C -:108D6000054E044630780C25002811D018210E201D -:108D700000F0C3F9AAE4000054090020FF0E00002F -:108D80006400002074810000D3020000240400006D -:108D900009F0E3FB03285AD009F0E2FB032856D080 -:108DA000E14A107F002852D16079002801D00128C3 -:108DB0002DD1A079002801D0012828D1A07B00283E -:108DC00005D0012803D0022801D003281FD1607BE1 -:108DD00000281CD0C0081AD161880120800381427C -:108DE00002D82388834203D9207901280FD119E0C2 -:108DF0002079002806D0012814D0022805D00328A5 -:108E000005D102E020290BD30CE0A02B0AD2207957 -:108E1000042805D12088202802D36188884201D9FE -:108E2000122514E0207950776079002802D00128BB -:108E300003D00CE0BD4A002105E0BB4A2032907906 -:108E4000002804D00121204608F0CEFE054601206E -:108E5000357170711821F170307037E470B5B24C13 -:108E60000546403C2078002804D02E210E2000F03A -:108E700044F92BE409F071FB0C22022815D1AA4811 -:108E8000007F002811D1A9482B88083841684888FC -:108E900083421AD10846C030037A002B05D1203115 -:108EA000C97E0F2903D0102901D0227103E00521CA -:108EB0000172002020710E20A0702E20E070288802 -:108EC000E08001206071207016E40220F2E770B5A6 -:108ED000954C0546403C2078002804D02D210E20DA -:108EE00000F00BF908E409F038FB0C21022814D13A -:108EF0008D48007F002810D18C4E2A88083E70686B -:108F000043889A4220D1C822125C002A05D13B2214 -:108F1000125C0F2A03D0102A01D021710AE010221E -:108F2000A91CD6300DF001F970680421C03001721F -:108F3000002020710E20A0702D20E0702888E08095 -:108F40000120607120700DE40220F2E710B5017875 -:108F50000B000DF059FB3F9E9E399E9E599E9E9E92 -:108F60009E3C3F9E9E8752559E9E999E9E9E432963 -:108F70009E2D319E9E9E9E359E9E9E955C9E9E47FA -:108F80009E4B4F9E21259E6C6064689E709E7F83E1 -:108F90007C788A8D74919E00801CFFF798FF76E0A4 -:108FA000801CFFF75BFF72E0801CFFF7D8FE6EE0CD -:108FB000801CFFF7B5FE6AE0801CFFF729FE66E023 -:108FC000801CFFF706FE62E0FFF7D9FD5FE0FFF7C8 -:108FD000B3FD5CE0801CFFF777FD58E0801CFFF7D5 -:108FE00052FD54E0801CFFF7FDFC50E0801CFFF7B1 -:108FF000CDFC4CE0FFF7ACFC49E0FFF788FC46E015 -:10900000801CFFF744FC42E0FFF729FC3FE0801C96 -:10901000FFF7F2FB3BE0801CFFF7C4FB37E0801C4E -:10902000FFF7A1FB33E0801CFFF767FB2FE0801CFC -:10903000FFF742FB2BE0801CFFF7F8FA27E0801CCB -:10904000FFF7A6FA23E0801CFFF764FA1FE0FFF7A2 -:109050003CFA1CE0801CFFF705FA18E0801CFFF7C3 -:10906000E0F914E0FFF7C4F911E0FFF762F90EE050 -:10907000801CFFF74BF90AE0801CFFF721F906E09E -:10908000801CFFF70AF902E0801CFFF7DAF80120E4 -:1090900073E4002071E470B52349244C054640393F -:1090A000083C0A460126403260682B000DF0ACFAFD -:1090B00005171A1A04171A000122002108F093F963 -:1090C000616800220846C0310A724A7209F067FFDF -:1090D000002803D016A11B480DF0A5F960E4167511 -:1090E00088655DE4174812A13330F5E70E4900208A -:1090F000C031C8612039087270470B4A203A937E0C -:10910000002B03D1D076117701209076704730B5CF -:10911000134606E0CC18203CE47FD51A44555B1E6C -:10912000DBB2002BF6D130BD940900206C0000208A -:109130007372635C6C6C5F6374726C2E73302E633D -:10914000000000005108000070B5FD4D040008D07B -:10915000012C10D0022C07D0032C05D0F9A17020CF -:1091600007E0F8A1672004E02878012803D0F5A1E2 -:109170006D200DF058F92C7070BD70B5F04D04469F -:1091800010280AD0112C16D028468178122C07D02E -:10919000132C0AD0EBA19F200BE0EAA1942008E059 -:1091A000112908D0E7A1992003E0112903D0E5A1F6 -:1091B0009C200DF038F9AC7070BD10B5E04894B04B -:1091C000007B002819D0172069460870DC4900A8E8 -:1091D00006220D3102300CF0A8FF09A96846F9F704 -:1091E000C2FE0446112805D0002C03D0D5A1BB2017 -:1091F0000DF019F9204614B010BD3220E4E710B587 -:1092000001220023114603F0B5FC10BDFFB595B057 -:109210001D460E460746FFF7F2FF04000AD02078ED -:10922000222804D3A07F8006C00FA84204D10820C2 -:1092300019B0F0BDC748FBE7372168460170478089 -:10924000002D05D00121017146711799817102E04D -:1092500000206946087109A96846F9F784FEA07FD5 -:10926000DF21084069010843A0770020E0E770B5DE -:109270000446084620380D4603000DF0C5F90A06DD -:109280000A11232C334249505761FF20ADA1083009 -:1092900052E02078202851D1FF20AAA10B304BE0CA -:1092A000A7480178032949D08078132846D0207830 -:1092B000242843D0252841D023283FD0FF20A1A136 -:1092C0000E3039E02078222838D0232836D8FF20E5 -:1092D0009CA1153030E0207822282FD0FF2099A1C2 -:1092E000193029E02078222828D0242826D02628C2 -:1092F00024D0272822D0292820D0FF2091A11C305B -:109300001AE02078252819D0FF208EA1233013E001 -:109310002078252812D0FF208AA126300CE0207862 -:1093200025280BD0FF2087A1293005E020782828A8 -:1093300004D0FF2083A12C300DF075F8257070BD8E -:10934000FF2080A12F30F7E730B5834C0B88834A8C -:10935000022801D0934204D09D1FA54225D20228A5 -:1093600002D04D88954203D04D88AD1FA5421CD236 -:109370004C88A34219D88B88FF25F435AB4214D80A -:10938000022802D0C888904205D0C888724D0A3899 -:109390002D1FA84209D2C888904208D0944206D016 -:1093A0005B1C63438000834201DB072030BD00204B -:1093B00030BDF0B56A49884245D36A4A0125AD04FB -:1093C0001368A84201D398423DD30279002A06D0FF -:1093D000082A02D8067B082E05D90720F0BD047B99 -:1093E000002CFAD0F6E7002A06D004688C422AD373 -:1093F000AC4201D39C4226D3002E06D084688C4216 -:1094000021D3AC4201D39C421DD300240CE005685B -:10941000A700ED598D4216D30127BF04BD4201D3E9 -:109420009D4210D3641CE4B2A242F0D80022012570 -:10943000AD040CE084689700E4598C4203D3AC423D -:1094400003D39C4201D21020F0BD521CD2B29642EE -:10945000F0D80020F0BDFFB50022099B002802D003 -:10946000994205DC58E0002902D1002004B0F0BD8B -:109470000920FBE7845C002C12D087187D78112D21 -:1094800043D010DC2B000DF0BFF80A401726262C25 -:109490002C2E2E363640835C002B30D1521CD2B29B -:1094A0008A42F8DBE1E71C2D2FDA123D2B000DF08C -:1094B000ABF8042C2C121A2C022CD9D1BB78039CAB -:1094C000072B237001D25B0701D40A20CEE7029B51 -:1094D00001241B7816E0E343DB0708E0012C08D0E9 -:1094E00013E00620C2E70F2523072D075B19002B89 -:1094F000F4D03046BAE7029B1B789C0701D50B20BD -:10950000B4E702242343029C2370835C521C9A1804 -:10951000D2B28A4202DDABE7192676028A42A9DB83 -:10952000A3E710B504780B46002C1FD001210E4A8A -:10953000012C1ED0022C22D0032C2AD125E00000C1 -:10954000740A00207372635C6761705F636F726599 -:109550002E630000023000007B0C0000FFFF0000C3 -:109560000080010028000020023200000021197054 -:1095700011E019708179890903290AD10BE019706A -:1095800081798909012904D105E019708179890956 -:1095900001D0104610BD411C0622581C0CF0C5FD20 -:1095A000002010BD08B51346002806D0FEA00068B4 -:1095B000009048796A468009105C18700622581C91 -:1095C0000CF0B3FD08BD30B50C46097895B02229E2 -:1095D00002D2082015B030BD282369460B704880A0 -:1095E000132A03D03B2A01D00720F3E708460A716B -:1095F00009A9F9F7B8FC050003D121212046FFF79E -:1096000036FE2846E6E700B595B0232369460B7081 -:109610004880108888805088C880D0884881908889 -:10962000088100208881C88109A96846F9F79BFC58 -:1096300015B000BD70B50C00064610D0FFF7DFFD79 -:10964000050003D1D949DA480CF0EDFEA68028893F -:10965000E0802889208168896081A889A08170BD07 -:1096600070B50E46050003D00021092003F027FF46 -:109670000120D04C022E207324D0032E04D0CC48DD -:10968000CA491E300CF0CFFECA4806210D3003F047 -:1096900091FCA07C8006800EA074FFF78EFDA08B4D -:1096A00000280ED0002D0CD08300012200210920BB -:1096B00003F060FE092804D0BD48BC4928300CF0F6 -:1096C000B2FE70BDBB480321103003F073FCA07CD8 -:1096D00040218006800E0843A074B6480C3002F08A -:1096E00015F9DAE77FB501A9012003F0C3FA0028D4 -:1096F00004D0AF48AD4967300CF095FEAE4E01A8DE -:1097000003F0C6FA050002D0052D4CD048E0029CBB -:10971000A07F01072CD520462230009068462346C2 -:10972000628E80882146343301F07BFA0546A07FA3 -:10973000F7210840A077002D05D0B5422FD09C48D6 -:109740009A49783029E0E17F480889074000C90F2D -:1097500008432021095D4007400FC9000843E07716 -:10976000207828281CD129212046FFF780FD17E00A -:109770004007C4D568462246808821460E32FFF74E -:1097800042FF0546A07FFB210840A077002D07D0AF -:10979000B54204D08648854992300CF044FE00253D -:1097A000284604B070BD0020FBE7F8B5040004D1E2 -:1097B000ED207E4980000CF036FE7220207060683B -:1097C00008250178091F0B000CF01EFF11F90A3D56 -:1097D0005FF83D0EF8F83E3D3D3D3DF986F93D0010 -:1097E00073487249AA3074E087883846FFF707FD4E -:1097F000060004D16E486D49B2300CF014FE60785A -:109800000421284360706B4CA07F0843A07721217E -:109810003046FFF72CFDB07F8007800F012801D173 -:10982000801EA080384602F057FE3846FBF72AFE1D -:109830003846FAF7C6F93946022003F040FEB07FF9 -:10984000EF210840B077F8BD86883046FFF7D7FC97 -:10985000002804D156485549D0300CF0E4FD60682A -:109860008078012804D052485049D2300CF0DBFDFA -:1098700060688179304602F04EFF0028E3D06178BD -:10988000294361706168C880F8BD87883846FFF752 -:10989000B6FC060004D146484449E3300CF0C3FD51 -:1098A00060783946284360706068C088308160689D -:1098B0000089708160684089B081022003F0FFFD5B -:1098C0000020B075FFF70EFF0028DDD001203749DA -:1098D00080020CF0A8FDF8BD80783C2815D0002748 -:1098E000022815D00026002804D031482F49F8302E -:1098F0000CF099FD0021084603F0E1FD002107204E -:1099000003F0DDFD002E05D046E001270026F1E73B -:109910000126EAE76078284360702648817F294362 -:109920008177002F38D160688688304601F055F87D -:109930000546807F6168800889798000012900D010 -:1099400002210843A87760680622C08A28816068DF -:10995000008B68816068408BA8816068C079E87579 -:1099600061682846183008310CF0DFFB6068062279 -:10997000807B68706168A81C0F310CF0D6FBA87F53 -:109980008107890F304602F090FDA87F8007800F85 -:10999000012801D10748868006480178032913D0A1 -:1099A0008078132814D00BE00302FF0144950000D7 -:1099B00013030000740A0020023000000CE00FE0E6 -:1099C000FF20FCA1453084E70120FFF7BDFBF8BD77 -:1099D0001120FFF7D2FBF8BD204601F02AFCF8BDAC -:1099E000607828436070F8BDF7B505460078002719 -:1099F00000090C463E4601287ED00022F14902288B -:109A00007BD0072804D00A2878D0EAA1EE482DE1BF -:109A1000686803780D2B31D006DC042B6FD0072B40 -:109A200036D00A2B6AD106E0122B38D0132B40D047 -:109A3000142BF7D1B2E011270726002C72D08088B2 -:109A4000A0806968FB238979A171E04905468A7F76 -:109A50001A408A77032103F0C5F80421284603F051 -:109A6000C1F80021284603F0BDF80221284603F082 -:109A7000B9F80121284603F0B5F8F9E001270926D5 -:109A8000002CDBD08088A080686880792072EFE0AD -:109A900012270E2680882146FFF7CCFDE8E01A2722 -:109AA0000726002CCAD04088A08068680079A07181 -:109AB000DEE081783C2936D010271E26002CBDD050 -:109AC0008088A0806868C08A20836868C08AE08235 -:109AD0006868008B60836868408BA0836968207D1C -:109AE000497F4008C9074000C90F084320756968CD -:109AF000C007C00F497F03E05FE08AE0ADE01CE0F3 -:109B000049084900084320756968A21DC8790831D1 -:109B1000FFF748FD69682246887B0D320F31FFF759 -:109B200041FD05E074E019270726002C70D0A271D2 -:109B3000A648F722817F11407DE01B272E26002CAE -:109B400066D0A1806968A21D0879491DFFF72AFD2A -:109B500068682030C07A60736868C0780428A07B89 -:109B600019D040084000A073F921084069681F22FD -:109B7000C9788907490F0843A07369684007C97A03 -:109B8000400FC9000843A073696820460F300C31AC -:109B90000CF0CBFA6CE001210843E4E71E270E2607 -:109BA000002C6DD0A1806868E21D407AA0716968C0 -:109BB0008878C91CFFF7F6FC5AE0287A012805D0FE -:109BC000022815D080487BA132384FE01D270E2691 -:109BD000002C55D06888A080A889E080E889208181 -:109BE000288A6081688AA0817848DF22817FA2E785 -:109BF00012270E266888FFF71DFD002C40D06878DC -:109C00004007400F032833D17048FD22817F92E73F -:109C100036E0287A03000CF0F7FC06041010202030 -:109C2000202619270726002C2AD0A1806748A27178 -:109C3000817F4908490081771AE019270726002CFF -:109C40001ED0A180287A012805D00320A0715F488A -:109C5000EF22817F6FE70220F8E721462846029A2B -:109C600001F04BFCFEBD532052A100010CF0DBFBC8 -:109C70000298002C068001D0278066800020FEBD5F -:109C800002980680FAE710B5504894B080781328FF -:109C900002D0082014B010BD22206946087009A91E -:109CA0006846F9F760F904460021072003F007FC35 -:109CB0002046EFE700B5454895B08078122801D0DE -:109CC0000820B5E41E216846017000218170C17032 -:109CD00009A9F9F748F90028F3D10021072003F07A -:109CE000EEFB1120FFF749FA0020A1E400B5374848 -:109CF00095B00078022801D0032818D11B2108A8AC -:109D000001730021817369460BA8F9F72CF900282B -:109D100004D1684640781B2801D0032088E4002144 -:109D2000084603F0CCFB68468078002801D0082064 -:109D30007EE40120FFF708FA002079E4F8B5234C0F -:109D400003000CF061FC0A068017808080804B3590 -:109D50006E80FFF7CBFF00282AD1F7F7E9FD002836 -:109D600026D02221017000210172F7F7C2FDA07FE9 -:109D7000012152E08EB23046FFF741FA050004D1CE -:109D800011480CA12E300CF04EFB287821280FD062 -:109D9000F7F7CEFD00281BD01221017002270772B1 -:109DA00046800020A875F7F7A4FDA07F3843A07770 -:109DB000F8BD00007372635C6761705F636F72650A -:109DC0002E630000FFFF000036050000740A00202B -:109DD000132229463046FFF7F6FBE9E7A578122D56 -:109DE00006D0132D07D0FA49FA480CF01CFBDFE728 -:109DF000FFF760FF01E0FFF746FF0028D8D1F7F733 -:109E000097FD0028D4D022210170122D07D0022105 -:109E10000172F7F76EFDA07F10210843C7E701210B -:109E2000F6E7A07C810901290BD0800904D0E9481C -:109E3000E74922300CF0F7FA03210020FFF710FC6D -:109E4000B6E70221F9E7E348E1492930CDE7F7B564 -:109E500014460D0004D1DF48DD4931300CF0E3FA3F -:109E600028780827012807D002281FD0D948D849C8 -:109E700062300CF0D8FAFEBD0098FFF7C0F906007A -:109E800004D1D448D24938300CF0CDFA0220B07554 -:109E90001030207060783843607007CD083407C4F4 -:109EA000CD482022817F11438177FEBD0098FFF7C6 -:109EB000A6F9060004D1C748C54946300CF0B3FAEC -:109EC000A988C648814208D1EA88824205D1132276 -:109ED00031460098FFF777FBFEBD814202D1E8884A -:109EE000002809D01220207060783843607007CDB8 -:109EF000083407C4002006E07823002202200099DD -:109F000003F038FA0120B075FEBDB34840897047B0 -:109F1000FFB591B01498F8F721FF00285DD1012416 -:109F2000684603218471C9028180002201A920466C -:109F3000FAF719F9002850D16846152184714902B1 -:109F4000818000261C2102A800960CF04DF901200A -:109F50000146684610310170002001466846417094 -:109F60008178F9273940891C21438170017A0225C3 -:109F70002943017212998186C6861F2101870C90A0 -:109F800011980F9001A80B9009AA0BA902A8F9F744 -:109F9000B5FE002821D168468F4E808CF08068463F -:109FA00084718F498180807809AA3840801C4108DB -:109FB0004900684681708586058713A80F900BA914 -:109FC00002A8F9F79BFE002807D16846808C3081F3 -:109FD00031460A311498F8F7D4FE15B0F0BD30B50B -:109FE0000C46804995B08C4241D37F4901229204AE -:109FF0000968944201D38C4239D3203800220125CC -:10A0000003000CF001FB06042F494D535C64002152 -:10A01000082003F02EFA002802D0112015B030BD20 -:10A0200024206946087000A80522A11C02300CF00B -:10A030007CF809A96846F8F796FF050002D0082DBC -:10A040000ED031E0082300221146184603F092F9A1 -:10A05000082829D05F485E49D6300CF0E4F923E0A7 -:10A060000620DBE76068002803D0884201D2102078 -:10A07000D4E73D2168460170218841806188818054 -:10A0800009A9F8F770FF05000ED1606800280BD011 -:10A090006946098D018007E0206801F079FC02E043 -:10A0A000204600F0D8FC05462846B7E73E2007E0EA -:10A0B000857000E0827009A9F8F755FFF3E73420B6 -:10A0C000694608702078C0076846F3D0F0E707209B -:10A0D000A4E730B50C46444995B009688C4201D2DA -:10A0E00010209BE7203803000CF08EFA0504212194 -:10A0F000232132002088FFF782F8002804D000785E -:10A10000222803D2082089E7384887E725216846B6 -:10A1100001702188418009A9F8F725FF050015D1B4 -:10A120000AA905220231A01C0BF0FFFF0EE0062554 -:10A130000CE02068002805D0884201D2102505E0F7 -:10A1400001F01BFC24480025808BA080284665E791 -:10A15000072063E720481330704710B520211E48C0 -:10A160000CF040F80120FEF7EFFF1120FFF705F893 -:10A1700000211948C943818000218176E1218900AD -:10A18000818301460C300D310446F7F751FC12482B -:10A190000722214613300BF0C8FFFFF70EF8002806 -:10A1A00003D00B4912480CF03EF900F0D5FF10BD6A -:10A1B00010B504463C210CF015F8A07F8008800003 -:10A1C000A077202020700020A0752034607010BD82 -:10A1D000B49D00008C050000740A0020FFFF000001 -:10A1E000012A000000800100280000200230000049 -:10A1F000FB0600007047FEB50546FF480C4681424D -:10A2000007D301208004844205D3FC4800688442BF -:10A2100001D21020FEBD002D02D0012D32D126E04A -:10A22000F74908220F4668460BF07FFF3946204663 -:10A23000FFF777F90028EDD1FEF7BFFF060006D043 -:10A240000722694638460BF070FF3046FEBD207885 -:10A25000002801D0012805D1E94807223946C01D50 -:10A260000BF063FF0021092003F029F90FE00978C2 -:10A27000002907D0012905D0022905D0032903D0E0 -:10A28000E048FEBD0720FEBD0120FFF7E9F9DC48EC -:10A290000C3885760020FEBD10B5D8490968884283 -:10A2A00001D2102093E7D64902460C390B7B0D31C1 -:10A2B0001846FFF777F9002089E7FFB599B0054602 -:10A2C000002069460871087208A9087408751446C8 -:10A2D000CA480122C849920400681E46002D05D0D4 -:10A2E0008D420BD3954201D3854207D3002C08D071 -:10A2F0008C4203D3944204D3844202D210201DB076 -:10A30000F0BD2846204318D01F270CAB01AA0097A8 -:10A3100028461A99FFF79FF80028F0D10DAB02AA42 -:10A32000314620460097FFF796F80028E7D16846A7 -:10A33000007AC10703D00A20E1E70720DFE78007A2 -:10A3400005D568460079800701D50B20D7E703AF14 -:10A35000002D0FD01A20694608731A988873294671 -:10A36000F81C1A9A0BF0E1FE0EA903A8F8F7FBFD02 -:10A370000028C4D1002C0ED02021684601738673BA -:10A3800032462146F81C0BF0D0FE0EA903A8F8F7C0 -:10A39000EAFD0028B3D19A4908A8007C0C3948701E -:10A3A0000020ACE770B504460A2020700D46204618 -:10A3B000F8F7D9FD002805D139202070294620461C -:10A3C000F8F7D1FD70BDF7B500260C4605460B2702 -:10A3D0001AE02968B00009580978002903D001293A -:10A3E00001D00720FEBDA170296806220958E01C93 -:10A3F000491C0BF09AFE277020460299F8F7B3FD2E -:10A400000028EFD1761CF6B22879B042E1D80026B8 -:10A410003A270FE0A868B10041581022A01C0BF0A9 -:10A4200084FE277020460299F8F79DFD0028D9D1B7 -:10A43000761CF6B2287BB042ECD80020FEBDF0B509 -:10A44000044671A003C897B06B4B00271591149078 -:10A450009C4211D369480125AD040268AC4201D386 -:10A46000944209D32078012809D16168994203D325 -:10A47000A94204D3914202D2102017B0F0BD604926 -:10A480000C390A78012A0CD18A88614B9A4203D090 -:10A49000002806D0012804D08A7F13079B0F06D11D -:10A4A00001E00820E9E7D30701D1910701D5112088 -:10A4B000E3E7218A574B0A46203A9A4207D30128FC -:10A4C00075D1002973D1628A002A70D111E0022867 -:10A4D00001D0032801D1A02969D3012809D0484A15 -:10A4E0000C3A5278D20704D0628A002A5FD0B42A8C -:10A4F0005DD8002806D0012808D0022804D00328FF -:10A5000055D117E0002518E0022516E0002902D1F8 -:10A51000608A00280CD004256068007800280CD0E0 -:10A52000012809D0022807D0032805D03548A4E720 -:10A530000125F1E7032500E00127207A002806D055 -:10A54000012806D0022806D003287CD105E0002689 -:10A5500004E0012602E0022600E00326002D01D0DF -:10A56000022D14D1002E12D0E068FEF722FF002841 -:10A5700083D123480C384078800702D02148401E00 -:10A580007BE7022D03D1022E5DD0032E5BD0182174 -:10A5900068460170218A4180218A8180857118482E -:10A5A0000C38007B002803D001286FD104E04AE07A -:10A5B00000216846C17102E001206946C871684601 -:10A5C000077221780930012937D006210BF00AFEE5 -:10A5D00069460E74207D8207C107D20F4007C90F5C -:10A5E0005200C00F11438000014314A8405C69462B -:10A5F000C873002827D00FE0008001002800002049 -:10A60000800A002002320000070605040302010050 -:10A61000FFFF0000E13F000009A96846F8F7A3FC2E -:10A62000002884D109A96846FFF7BCFE0028A7D1FD -:10A63000002D0AD0022D08D010E061680622491CC6 -:10A640000BF073FDC4E7072017E7002E06D009AA18 -:10A650006946E068FFF7B7FE002891D11B206946E4 -:10A6600008700120887009A96846F8F77CFC00286A -:10A6700086D108A840791B2819D12B000BF0C4FF04 -:10A680000504040707040A00032001E00FE002208C -:10A69000FEF75AFD012D0CD0608A002809D0002257 -:10A6A00083001146104602F065FE002801D0032009 -:10A6B000E3E60020E1E6F3B5032687B00D46002966 -:10A6C0000AD0FA4885426FD301208004854203D323 -:10A6D000F7480068854267D30798FEF790FD0400AD -:10A6E00005D02078222804D2082009B0F0BDF14816 -:10A6F000FBE7A07F8707BF0F002D05D0294638460E -:10A70000FEF722FE0600F0D139460027EA4801296B -:10A7100007D0022931D0E949E9480BF084FE3046E0 -:10A72000E3E7A27D2946012A02D0827F920701D564 -:10A730001120DAE700291BD108216A46049711820B -:10A740000592418904AADF48FAF7FDF80028CCD128 -:10A750006846008A082801D00320C6E768460188B9 -:10A7600001814188418181888181C188C18102A99B -:10A77000079801F061FF0646D1E7A17D022916D1B5 -:10A78000807F800613D4002D04D0A07F40070CD416 -:10A79000002100E00121079801F08FFF0600BED1E3 -:10A7A000A775002DBBD004E01AE01126B7E7002DF5 -:10A7B00016D02A4621460798FEF725FF064611289F -:10A7C000ADD1A07F4007AAD42046082229460E30EA -:10A7D0000BF0ABFCA07F04210843A07700269EE786 -:10A7E000102082E770B50C460546FEF708FD010013 -:10A7F00004D022462846FEF7E6FE70BDAD4870BD87 -:10A8000000B50146143195B0192901D2810707D04E -:10A8100001461E3104D00A3102D0072015B000BD18 -:10A82000312269460A70887009A96846F8F79BFBCF -:10A83000F4E701B582B00220694608809E4802AB69 -:10A8400000896A460021F9F7E7FE6946098802296E -:10A8500000D003200EBD1CB50021009102216A46E4 -:10A860001180934901900968884201D210201CBDD3 -:10A87000914801899348FAF766F8694609880229E0 -:10A88000F5D003201CBDF0B50E46884985B01746AB -:10A8900005468E4207D386480122920400689642FC -:10A8A00004D3864202D2102005B0F0BD1F2F01D97B -:10A8B0000C20F9E7804C8D4226D3954201D3854286 -:10A8C00022D3E08803A9F9F758FE0028ECD12878B4 -:10A8D00069464873E08803A9F9F730FE0028E3D100 -:10A8E0006946009008780221084369460870497B50 -:10A8F000090703D00821084369460870E0886946C3 -:10A90000F9F7B5FD0028CFD169468F80E08833463E -:10A9100001AA0021F9F780FE69468988B942C3D0AF -:10A920000320C1E71CB50C4600210091019122884B -:10A9300069460A805E4901900968002801D0884272 -:10A9400001D38C4201D210201CBD002801D0002A66 -:10A9500009D059486A46C1885A48F9F7F4FF694650 -:10A96000098821801CBD0C201CBD10B50123FEF7F9 -:10A970004DFC2CE4002310B51A461946FEF746FCA0 -:10A9800025E430B505464A4895B000680C4681423A -:10A9900002D2102015B030BD2846FEF730FC00284A -:10A9A00007D00178222902D3807F800603D40820B3 -:10A9B000F0E74048EEE7132168460170458009A999 -:10A9C000F8F7D1FA0028E5D108AA0A2151567F29C3 -:10A9D00001D02170DEE70520DCE7F8B5012304464D -:10A9E0001A46194602F0C6F8074601231A46022104 -:10A9F000204602F0BFF8064601231A4604212046ED -:10AA000002F0B8F8054601231A460321204602F059 -:10AA1000B1F80446002F03D128492B480BF003FD61 -:10AA2000002E04D1AD20254980000BF0FCFC002D48 -:10AA300004D125482149801C0BF0F5FC002C04D1E1 -:10AA400021481E49C01C0BF0EEFC22213846FEF7BF -:10AA50000EFC3846F8BD10B50446006800280CD03E -:10AA60001249884207D301218904884205D310493D -:10AA70000968884201D2102014E400F071FFA08818 -:10AA80000D4CA083A07E01280DD10021092002F0E9 -:10AA9000F0FC002800D00120A17C8909012915D0F3 -:10AAA0000321FEF7DDFD002006E400000080010028 -:10AAB0002800002002300000740A0020B49D00002D -:10AAC000C6090000FFFF0000B30200000221E8E712 -:10AAD00030B5F74B9A4207D301239B049A4205D322 -:10AAE000F44B1B689A4201D2102030BD1578EB065A -:10AAF0005B0F042B07D85478072C04D39378102BC2 -:10AB000001D8A34201D2072030BDD3785B0702D41D -:10AB100013795B0701D5062030BDC37FAC075B0806 -:10AB20005B00E40F2343C3770878EF2318401378C2 -:10AB30009B06DB0F1B0118430870F12318401378A4 -:10AB4000DB065B0F5B001843087050780873002029 -:10AB500030BD30B500240C70C378DB07DB0F0B7001 -:10AB6000C578AD07ED0F6D002B430B70C5786D07F1 -:10AB7000ED0FAD002B430B7014700179C907C90F9D -:10AB8000117003799B07DB0F5B001943117000798B -:10AB90004007C00F80000143117030BD70B51446EE -:10ABA0000D460646F6F7C4FE002809D0A221017022 -:10ABB000142221460830F6F707FBF6F79AFE70BD1F -:10ABC000132229463046FEF7FEFC70BD70B51446D0 -:10ABD0000E460546F6F7ACFE002809D0222101708A -:10ABE00045802178017261784172F6F782FE70BD6E -:10ABF000132231462846FEF7E6FC70BD10B5AE4C78 -:10AC0000207C00280CD1204621461038FDF762F840 -:10AC1000002803D0A9A1F2200BF005FC012020742C -:10AC200010BD70B594B015460C462C226946189E8E -:10AC30000A704880002B17D00822194601A80BF093 -:10AC400074FA68468581102231460E300BF06DFA99 -:10AC500009A96846F8F787F9002803D1A17F1022D7 -:10AC60001143A17714B070BD002001900290E8E775 -:10AC7000F0B50646008A97B080B20D460190FEF707 -:10AC8000BEFA04468C48317848380746E8370990C0 -:10AC90000B000BF0B9FC0EFCFB48085F8798B8D995 -:10ACA000FAF9F8F7F6FC002301221946019801F0A1 -:10ACB00061FF050004D1FF2080A130300BF0B3FB11 -:10ACC000002C04D1FF207DA131300BF0ACFB387E8D -:10ACD000C00904D078486030C06DA86112E02B2014 -:10ACE000694608720BA902A8F8F73DF9002804D0BC -:10ACF000FF2072A13C300BF096FB74490C980BF0CE -:10AD00008EFAA9617068A862B068E862A07F8007C7 -:10AD1000800F012820780DD0252804D0FF2067A1BE -:10AD20004D300BF080FB324621460198FFF736FF8D -:10AD300017B0F0BD2528F6D0222806D0242804D04C -:10AD4000FF205EA146300BF06EFB25212046FEF76A -:10AD50008EFAE8E7002301221946019801F00AFF64 -:10AD6000060004D1FF2055A158300BF05CFB002CED -:10AD700004D1FF2051A159300BF055FB2078252834 -:10AD800004D03078012108433070D1E702202870C8 -:10AD9000B068A860B068002802D000202871C7E71A -:10ADA0000120FBE72B2069460870434968464C396F -:10ADB000F8F7D9F8002804D0FF2040A178300BF034 -:10ADC00032FB03201BE02A206946087000A81022ED -:10ADD000023071680BF0A9F904A810220230B168A2 -:10ADE0000BF0A3F9344968464C39F8F7BCF8002851 -:10ADF00004D0FF2031A189300BF015FB042028700E -:10AE00000998686094E7B068002804D1FF202BA15E -:10AE100095300BF008FBE07F400704D5FF2027A109 -:10AE200096300BF000FBB06806220A3800903379A8 -:10AE30000421019801F0FBF90028A6D0FF201FA1F2 -:10AE40009B300BF0F0FA73E7002C04D1FF201BA11C -:10AE5000A3300BF0E8FA2046223010220546716834 -:10AE60000BF063F928212046FEF701FAA07F800746 -:10AE7000800F022814D100231A462146009501981C -:10AE800006E04BE1BAE0B0E095E03FE071E05FE161 -:10AE9000FFF7C7FE11281BD029212046FEF7E7F94E -:10AEA000E07F317A4007400FC9000843E0773FE771 -:10AEB0000080010028000020400B00207372635CBA -:10AEC0006761705F7365632E6300000040420F008E -:10AED000A07F000704D5FF20FD49B0300BF0A3FA96 -:10AEE000A07F08210843A0770020608620463430E8 -:10AEF0000BF078F9E07FFD220146C9071040890F69 -:10AF00000843E077307A2034207011E700230122D3 -:10AF10001946019801F02EFE040004D1FF20EC49EF -:10AF2000CD300BF080FA2B2069460872E94902A85F -:10AF3000F8F719F8002804D0FF20E549D2300BF0CB -:10AF400072FAE4488188204621300176090A417668 -:10AF50000E2129702146FC316960017E2974407EF2 -:10AF60006874DC482C30A860103030346C61E860C4 -:10AF7000DEE6002C04D1FF20D549E6300BF053FA71 -:10AF80002078212893D93079012802D0022808D1CD -:10AF900003E0E07F04210843E077387E0121084385 -:10AFA0003876324621460198FFF7F8FD23212046E6 -:10AFB000FEF75DF9BCE601220421019801F01FFCB7 -:10AFC0000028A2D0002301221946019801F0D2FDE9 -:10AFD000040003D1BE49C0480BF025FA0F202870A9 -:10AFE000172028716E34AC60A2E60421019801F0AC -:10AFF00056FC002889D11020287099E600230122F0 -:10B000001946019801F0B6FD050004D18720B0492A -:10B0100080000BF008FA2E462036307E41064DD5D2 -:10B02000A17F8F07BF0FC00713D029468031486F1B -:10B0300000280ED0027CF37DD207D20F5B001A43AA -:10B040000274486F5108E27F4900D207D20F1143C2 -:10B050000174307E000713D52A468032116F002913 -:10B060000ED0087CF37DC007C00F5B001843087446 -:10B07000116FE27F40084000D207D20F10430874DE -:10B08000307E80070BD5F8204259002A07D0012FC7 -:10B0900005D02946307C31311032FEF783FA307EFC -:10B0A000C0060BD5F8204259002A07D0012F05D140 -:10B0B0002946307C31311032FEF774FA0523684698 -:10B0C0000370357E4570834822216038019A0170F3 -:10B0D0004178C908C900C91C417042800372457299 -:10B0E000F6F78EFD2078252809D021280BD07A4844 -:10B0F00077495B300BF097F92078222803D9222179 -:10B100002046FEF7B4F80021019801F06BFD0028FD -:10B1100000D10DE670486E49633092E674686D4D5B -:10B1200020786035092802D00A28F2D10BE0E168C6 -:10B13000002902D02846F7F7E8FE2169002902D04D -:10B140002846F7F7E2FE21462846F7F7DEFEEFE550 -:10B1500061485F49883074E65E4810B504222821B2 -:10B160006030F7F7B9FE5B480024EC30017E4906F9 -:10B17000490E01764038C465FCF739FD55493C312C -:10B1800008461038F6F78BFC52484C30047410BD5A -:10B1900070B50D46FEF733F8040004D14E484C4913 -:10B1A000A7300BF040F9FF21053128460BF01CF8C1 -:10B1B000A07F8007800F01280CD00221284688300C -:10B1C000FCF716FD002804D043484149AC300BF091 -:10B1D0002AF970BD0121F1E70A46014610B5104673 -:10B1E0008830FCF71FFD10BD70B5054611200C46D8 -:10B1F0000870002161702121495D002908D00329D0 -:10B200000ED0042910D034483149C6300BF00BF968 -:10B2100020780009012802D9E87FC008607070BD5D -:10B220000007000F203002E00007000F30302070D0 -:10B23000EEE7F0B504464068082601789BB008297F -:10B240000DD00B2903D00C294BD1012181716068ED -:10B2500087883846FDF7D3FF05004CD147E0478883 -:10B260003846FDF7CCFF050004D1172018494001EE -:10B270000BF0D9F82878212833D0282833D16068FA -:10B2800002210C3000F050FF00282CD0606808210B -:10B29000001D00F049FF002825D02D2168460170CF -:10B2A000478029461022223101A80AF03EFF0FA94B -:10B2B0006846F7F758FE002804D007480449EF30E5 -:10B2C0000BF0B1F8A87F10210843A877292105E0E9 -:10B2D000BCAE0000F40A0020030200002846FDF77F -:10B2E000C6FF1BB0F0BD607830436070F9E7FE49DF -:10B2F000FE480BF098F8A87FEF210840A87729783E -:10B3000021290FD061688A79002A02D08978002922 -:10B3100012D08007800F022849D0F448F249343017 -:10B320000BF081F8FEF7DEF90028DAD0EF48EE499D -:10B330003F300BF078F8D4E7607830436070E87FF6 -:10B34000C00701D0042100E00321212041552878C5 -:10B3500029280BD03946062002F0B1F82878242895 -:10B36000E0D122212846FDF782FFDBE700230122FE -:10B370001946384601F0FEFB040004D1C920DA4921 -:10B3800080000BF050F825212846FDF770FF0D20B6 -:10B3900008A90871204609A98830FCF735FC022865 -:10B3A000C0D00028BED0D148CF491D30B8E7607862 -:10B3B00030436070B6E7F7B58AB015460646FDF72C -:10B3C0001EFF002841D0017822293ED323293CD0FA -:10B3D000C17F490739D4807F8007800F01280DD0B5 -:10B3E000002301220021304601F0C4FB0746C0487B -:10B3F0000290F7F781FD040007D101E00123F0E797 -:10B40000BA48B94959300BF00EF8002F1FD08837D1 -:10B4100067610298F7F770FD07460298F7F76CFD31 -:10B4200009212170266225710B99E760A1602061D6 -:10B4300003A92046FCF70CFC022806D0002804D003 -:10B44000AA48A94975300AF0EEFF0DB0F0BD002002 -:10B4500007466061E4E730B5002387B00546012266 -:10B46000194601F087FB04462846FDF7C8FE007820 -:10B4700022281BD9002C04D19C489B4981300AF01A -:10B48000D2FF0F21684601701721017120466E30EE -:10B49000029069461A30FCF7B7FB022806D0002854 -:10B4A00004D0E520904980000AF0BDFF07B030BD10 -:10B4B00030B5002387B005460122194601F05AFB3A -:10B4C00004462846FDF79BFE00782228EED9002C82 -:10B4D00004D18648844993300AF0A5FF10206946BC -:10B4E000087020468830FCF78FFB0028DED0E9206A -:10B4F0007D4980000AF097FFD8E7F7B50546007848 -:10B500000027000982B00C463E4602287ED007285C -:10B5100002D00A284AD14AE068680178082907D091 -:10B520000B2930D00C292ED070486F49D33060E100 -:10B5300014271A26002C6AD04088A080FDF75FFEF1 -:10B540000090002804D169486749AF300AF06BFFCA -:10B5500000980099C07DA21D1831FEF723F8686895 -:10B5600008228089E081696820461030091D0AF0B0 -:10B57000DCFD207E01210843F92108402076009857 -:10B580004021807F47E018270826002CD3D08088F0 -:10B59000A080FDF734FE050004D1F7205249800059 -:10B5A0000AF041FFA11D2846FFF71EFE23E1002CF3 -:10B5B00001D0288BA080287A01287DD0022804D0D1 -:10B5C00003282FD048494B4813E11C270726002C9D -:10B5D000B1D0A088FDF713FE0090002804D1FD2013 -:10B5E000414980000AF01FFF287B8007800F012857 -:10B5F000A07914D040084000A071FD210840297BAB -:10B600004907C90F49000843A07101E0E3E0DFE00A -:10B6100000988021807F084300998877EBE0012122 -:10B620000843E9E713270B26002C84D0A088FDF7F8 -:10B63000E6FD00900023A0880122194601F09AFA45 -:10B6400005460098002804D12A48274960380AF0A6 -:10B65000EAFE002D04D181202349C0000AF0E3FE58 -:10B660000098807F8007800F012859D0E86A817890 -:10B670008907890F0129A17954D049084900A1718E -:10B680008278FD255207D20F294052001143A17143 -:10B69000E322114002785207D20E1143A171DF223A -:10B6A00011404278D207920E1143A1710021E1713D -:10B6B000C1782172427900E037E00179607AD307DE -:10B6C00040084000DB0F18439307DB0F28405B0066 -:10B6D00018435207FB23D20F1840920010436072A8 -:10B6E000A07A4008400007E0BCAE00000E03000056 -:10B6F000540B002067040000CA07D20F10438A07CA -:10B70000D20F2840520049071043C90F1840890042 -:10B710000843A0720098007823286CD92621AFE056 -:10B72000A86AA4E701221143A9E7297BFE48022960 -:10B7300010D017270C26002C4AD0012911D003293C -:10B740001ED004291FD005291DD0F849F8480AF059 -:10B750006AFE23E019270726002C4CD00121A17195 -:10B7600005E00121A171E17989088900E171017E7B -:10B77000CA094906D201890E49000A4302760DE042 -:10B780000220A07106E0687B0007000F8030A071E6 -:10B79000052918D0E07980088000E071A088FDF7C5 -:10B7A0002EFD05460078212825D0232804D0E04826 -:10B7B000DE490C300AF037FEA088002101F012FAB1 -:10B7C000222128465DE0E07980088000401CE4E703 -:10B7D0000498068015E0002C01D06888A080287AA3 -:10B7E000032828D004280FD005284DD0D048CF49B1 -:10B7F00064300AF018FE0498002C068001D02780DF -:10B800006680002005B0F0BD15270C26002CDFD087 -:10B810000023A0880122194601F0ACF9050004D1EB -:10B82000C348C2492A300AF0FEFD0622A11DA869BC -:10B8300009F0DCF9DFE716270726002CC8D0A0881E -:10B84000FDF7DDFC00900023A0880122194601F0DD -:10B8500091F905460098002801D0002D04D1B44884 -:10B86000B24938300AF0DFFD2878C00601D5022041 -:10B8700000E00120A071009800782328BBD927217F -:10B880000098FDF7F4FCB6E717270C26002C9FD094 -:10B89000A088FDF7B4FC00906D7A002804D1A4487C -:10B8A000A2494B300AF0BFFD0621A01D0AF09AFC08 -:10B8B0000020A071207A032108432072FB21084058 -:10B8C0000099C97FC907490F08432072680692D5BD -:10B8D000E07904210843E071A07AE90740084000BC -:10B8E000C90F0843E17A2A0749084900D20F1143DA -:10B8F000FD22AB07DB0F10405B001843A072E80687 -:10B90000C00F114040000143E17274E710B50446D6 -:10B91000807990B08009012804D04D20834900012E -:10B920000AF081FDFFF76AF90120694608707E4838 -:10B930000AA9A0380190201D0290601C0B90684657 -:10B94000FCF786F9002804D07948784987300AF056 -:10B950006AFD0322601C0B990AF0E7FB10B010BDD2 -:10B9600010B5714CA03C002805D00146102220469D -:10B970000AF0DBFB0120207410BD10B50446FFF770 -:10B980003DF969491022A03920460AF0CEFB10BDCE -:10B9900070B50025644C00281CD06649884207D346 -:10B9A00001218904884205D363490968884201D28C -:10B9B00010250DE0062109F003F9411C07D05A4972 -:10B9C0004039C865207E80210843207600E00725A5 -:10B9D000284670BD207E4006400EF6E7F3B50020F5 -:10B9E00089B00D46029000290AD0524885421CD3E6 -:10B9F00001208004854203D34F480068854214D358 -:10BA00000998FDF7FCFB060003D03078222815D1F9 -:10BA100002E04A480BB0F0BD002D08D1B07FC1094B -:10BA200003D08007800F022801D01020F2E7B07FFA -:10BA3000C10601D4000703D5002D01D00820E9E795 -:10BA40003948007EC00712D1F07F400701D50D2094 -:10BA5000E0E7002201231146099801F08BF8070066 -:10BA600005D0B07F8007800F022802D00BE01120A4 -:10BA7000D0E7002D07D02A4639463046FFF728F890 -:10BA800002900028C6D128488C38F7F735FA040010 -:10BA900003D126492A480AF0C6FC0A2020700998DA -:10BAA000206238468830A060B07FFB218007800F7D -:10BAB000012829D0002D4CD002202071381DE060D3 -:10BAC00038780007400F20743878C006C00F6074C3 -:10BAD000A07C2A788008D2078000D20F1043A0747F -:10BAE0000840F17F01AAC907490F0843A074A8784C -:10BAF000E07469462846FFF72CF8684600792075FF -:10BB000068460078607528E001202071207B2A7843 -:10BB10008008D2078000D20F104320730840297894 -:10BB20008907C90F89000DE0E00B0020BCAE0000C2 -:10BB300053040000008001002800002002300000B3 -:10BB4000630500000843207324213046FDF78FFB76 -:10BB50000BE0032020710520207325213046FDF7DE -:10BB600086FBB07F4006400EB07703A92046FCF765 -:10BB70006FF8022805D0002803D0FD49FD480AF0DF -:10BB800052FC029846E7FFB581B00A9D06461C4666 -:10BB90001746142128460AF027FB0B980021016064 -:10BBA000F8070ED0F44920680968884239D312306A -:10BBB00028602068143068602068A8600B982168AD -:10BBC0000160B80726D56068002803D0EA490968F3 -:10BBD000884226D3029900290AD0FC3600280ED0CC -:10BBE00031461030FDF79DFC00281BD1606810E045 -:10BBF000002816D0E86080366068B0670AE0FEF77B -:10BC0000A9FA0146072230460AF08FFAFEF7F6FF3E -:10BC1000DA48E860780707D5D749A06809688842FC -:10BC200001D21020EEE528610020EBE5FFB5D44AF3 -:10BC30000E4607CA97B002AB07C3002700970197CB -:10BC40001798FDF7DCFA050005D02878262804D0DF -:10BC500008201BB0F0BDCB48FBE700231A4619466D -:10BC6000179800F087FF040004D1C248C049803013 -:10BC70000AF0D9FBA87F8007800F1690012814D006 -:10BC8000022824D0BB48BA4999300AF0CCFB0121E4 -:10BC90000022852E31D01EDC002E26D0812E26D00B -:10BCA000822E26D0832E1ED125E0002EEFD12146F4 -:10BCB0002846199AFEF70CFF0028CAD119988078F7 -:10BCC000009019980078C007C00F0190DFE719981D -:10BCD000002808D1DBE7862E11D0882E11D0892EBE -:10BCE00011D08A2E11D00720B3E710460EE0084687 -:10BCF0000CE002200AE0032008E0052006E0062010 -:10BD000004E0082002E0092000E00A20002222715D -:10BD100001216A461176211D0791002801D020716A -:10BD2000FAE0169801280CD0A66AE06A02220121E6 -:10BD300010900020A0602846173002291AD0012157 -:10BD400019E0E66AA06A1090032030702078FB2387 -:10BD5000C006C00F7070B07801221840009BF370CD -:10BD60008008019B800018430221B0700020707190 -:10BD70003071DEE70021890009190861681C022A78 -:10BD800001D0012100E00021890009190861B07883 -:10BD90008007800F01285ED1109880788007800F7F -:10BDA000012858D110980079844610984079009065 -:10BDB000169801281DD0317908A801747179017590 -:10BDC00008A8027C6046024008A8007D009908404F -:10BDD000139010433FD06C491A98884207D3012131 -:10BDE0008904884215D364490968884211D2102019 -:10BDF0002FE70CAA0DA91998FEF7ABFE08A8007C46 -:10BE000061460840307108A8007D009908407071B3 -:10BE1000D6E720463C3021460090F031169801913B -:10BE2000022834D000211A9B20460C33FFF7ABFECA -:10BE30000028DDD12046503021460090F43116987C -:10BE40000191012825D0002120461A9B139AFFF763 -:10BE50009AFE0028CCD110988078400702D4E87F61 -:10BE6000C0072BD0169902A8012914D0109909787F -:10BE70004900405A21780907490F4900C8408707FF -:10BE8000BF0F2AD0012F14D0022F0FD113E00121B0 -:10BE9000C9E70121D8E721780907490F4900405A2D -:10BEA000109909784900C8408707BF0F032F04D0B5 -:10BEB00004E0022711E001270FE00227169801286D -:10BEC0000BD1B078FB210840E97FC907490F08432F -:10BED000B07020780007400F3070207810224008A2 -:10BEE000400020701099D2434978C907C90E114308 -:10BEF00008402070C00623D4022F21D0012F21D06A -:10BF00000020A061E0612062606220461830A060DD -:10BF1000E87F40084000E877204606A98830FBF714 -:10BF200073FE002806D0022804D06F2010490001BB -:10BF30000AF079FA25212846FDF799F9002088E6CC -:10BF4000032008E020460D211B300AF04BF9204663 -:10BF50001830A060042069460875E87F0121084375 -:10BF6000E87705AA29461798FEF730FED4E70000C7 -:10BF7000BCAE00008E05000028000020400B002011 -:10BF8000606701000230000000800100F0B587B05A -:10BF900015460E0004460DD06A48854207D301209D -:10BFA0008004854206D368480068854202D210208A -:10BFB00007B0F0BD2046FDF722F9070004D038781D -:10BFC000272803D00820F3E76048F1E700231A464A -:10BFD0001946204600F0CEFD040003D15C495D48BF -:10BFE0000AF021FA0020002E05D0022E08D0012EE2 -:10BFF00011D00720DCE701216A461171A06018E02A -:10C00000234618336946A360087110222946184652 -:10C010000AF08BF80DE021461831A16069460871DD -:10C02000A061E061206260620621284608F0C8FD38 -:10C03000A0612078C10714D0400840002070022081 -:10C04000694608702046183002907030FBF7DCFD1E -:10C05000022806D0002804D03E483D4923300AF08B -:10C06000E2F925213846FDF702F90020A0E770B576 -:10C0700094B00D460646002B02D0072014B070BDC8 -:10C08000FDF7BDF8040007D02078222802D3A07F56 -:10C09000400603D40820F1E72C48EFE7002D19D023 -:10C0A0002D216846017046801022294601A80AF019 -:10C0B0003CF8E07F297C4008C9074000C90F0843CD -:10C0C000E077297C40078906400FC90EC900084364 -:10C0D000E07703E02E2168460170468009A9684692 -:10C0E000F6F741FF694609782D2905D1002803D1CB -:10C0F000A17F10221143A177A17FBF221140A17718 -:10C10000BCE710B50C46FDF77AF8002805D00E49BB -:10C1100009688C4203D2102010BD0C4810BD214686 -:10C12000FFF762F8002010BD05E00278401C002AED -:10C1300001D0002070470A46491E89B2002AF4D176 -:10C14000012070470080010028000020023000001C -:10C15000BCAE00000F07000030B50346072903D02E -:10C160000820DA781C7916E00720FAE707290BD0B7 -:10C170005500ED186D79072D01D0401EC0B2521C3C -:10C18000D2B20F2A07D105E05500ED186D79072DC1 -:10C19000F3D0F4E700222546641EE4B2002DE5D179 -:10C1A00030BDFFB581B00C461646114620460A9FA9 -:10C1B0000B9DFFF7D1FF00280AD020790F2803D369 -:10C1C000FEA1A0200AF02FF9A078C00907D019E03D -:10C1D000072E02D0112005B0F0BDFD48FBE7019805 -:10C1E0002880381D6880002068712871EF800498CD -:10C1F00028812846F6F7DFFE002803D1EFA1AD2005 -:10C200000AF011F9E07821794018491CC0B2217177 -:10C210000F2801D30F38C0B2400000194671817950 -:10C22000F12249084900114081710020D3E7FFB590 -:10C2300083B01C4616460F4600231A4602210C9D69 -:10C24000039800F097FC010008D033463A46019568 -:10C2500000940398FFF7A5FF07B0F0BDDC48801EEF -:10C26000FAE7F0B5054616460F4650888DB0002314 -:10C270000122022100F07EFC040003D1CFA1DF20C7 -:10C280000AF0D1F8002069460871A078400603D171 -:10C29000CAA1E3200AF0C7F8042F5ED32A78D0079A -:10C2A000C017401C06D161786B78994255D121782E -:10C2B000090752D00121142A46DA012A42D0122A53 -:10C2C00002D0132A40D128E00C2F3DD1A27852068B -:10C2D000520E012A38D0207800090001401C20703D -:10C2E000687860706846017168792A7901021143A3 -:10C2F00068460181E879AA790102114368464181C3 -:10C30000687A2A7A0102114368468181E87AAA7A1A -:10C31000010211436846C1811AE0062F14D120782A -:10C320000009000120707188012001F0C8F8022185 -:10C3300068460171C91E018168792A790102114399 -:10C3400068461FE0062F0AD06A461279002A1BD0E1 -:10C350007088324601A9FDF77AFD0DB0F0BD207856 -:10C360000009000120707188012001F0A8F8022165 -:10C370006846017168792A79010211436846018192 -:10C380000021C9434181E3E70028E6D0748868466C -:10C3900081766978C176022181830021C18304A856 -:10C3A00005220090062311462046FFF740FF002893 -:10C3B000D3D088A1D6200AF036F8CEE7F7B58CB0F6 -:10C3C00015460C990D98F9F7CEF9C0B2082851D14D -:10C3D000002069468885688800230122022100F038 -:10C3E000C9FB040004D1FF2074A163300AF01BF8DC -:10C3F00001230021E07822790BE046003619767996 -:10C400009E4201D1491CC9B2401CC0B20F2800D1C4 -:10C4100000201646521ED2B2002EEED1002902D1C3 -:10C4200017206946888504AB02330BAA00950C9946 -:10C430000D98F7F73BFC0006000E07D002281BD032 -:10C44000032817D0FF205DA1893011E06846808D58 -:10C4500000280FD002A901910090688804230122CE -:10C460002146FFF79EFE002804D0FF2053A176301E -:10C4700009F0D9FF0FB0F0BD68781021084368704B -:10C48000F8E70020584902464300401CCA520828D9 -:10C49000FAD3704700218170017809090901017000 -:10C4A00000214170C1700171704770B50D460023C5 -:10C4B0000122022100F05EFB040004D1FF203FA115 -:10C4C000CF3009F0B0FFA0786906C009C001490E5D -:10C4D0000843A07070BD704710B50146012000F000 -:10C4E000EEFF10BD3EB58DB2002301220221284689 -:10C4F00000F040FB040004D1FF2030A1E43009F03B -:10C5000092FF20786946000900012070022008701F -:10C5100036488880C88000222846FDF798FC3EBD3A -:10C52000F7B505460078002700090C463E4601286D -:10C5300004D0FF2021A1F33009F075FF287A0328E9 -:10C540000CD041201DA1C00009F06DFF0298002C05 -:10C55000068001D0278066800020FEBDEA89702712 -:10C5600010460A3086B2002C0AD06888A080A889BC -:10C570002081E28020460A30296909F0D6FDE5E7EE -:10C5800002980680E8E7F8B543680246D9799C79B5 -:10C59000090221435C7A1E7A25025C88981D354386 -:10C5A000241FA14238D11B79022B35D1042D34D060 -:10C5B000052D3DD0062D34D0402D19E07372635CFB -:10C5C0006C326361705F636F72652E630000000000 -:10C5D000043000007372635C6C326361705F636F80 -:10C5E00072652E6300000000000C0020FFFF0000B9 -:10C5F00012D3061D0F461446284600F0E9F9082814 -:10C600000AD01120207003202072A581E7812661C5 -:10C610006078082108436070F8BD001DFFF7CEFE6A -:10C62000F8BD031D50880A461946FEF7C4FEF8BD42 -:10C63000001DFFF716FEF8BD70B50D4600238CB047 -:10C6400006461A46022100F095FA040031D02078FF -:10C650000007000F01282ED01220694688746078E8 -:10C660000523801CC874082088822888C8826888AE -:10C670000883A8884883E888888302A90C20019150 -:10C6800000901A4621463046FFF78BFD00280ED158 -:10C69000F02300223146012000F06CFE20780009D2 -:10C6A0000001401C20706078801C607000200CB07D -:10C6B00070BDCD48FBE71120F9E770B50D460023AA -:10C6C0008CB006461A46022100F054FA040006D047 -:10C6D00020780007000F012803D00820E7E7C248B0 -:10C6E000E5E71321684681746178C1740221818273 -:10C6F000C58202A906200523019100901A46214611 -:10C700003046FFF74EFD0028D1D120780009000106 -:10C7100020700020CBE7F3B581B00D460023012245 -:10C720000221019800F026FA00260446002803D1D1 -:10C73000AE49AF4809F077FE2079A8423BD2AC4819 -:10C74000AA49401C09F06FFE35E0E07841000F195E -:10C75000401C7979C0B20091E0700F2801D100200F -:10C76000E0702079401E2071B879C00708D0009889 -:10C770000199042815D09D498220183109F053FEF3 -:10C78000B8790007410F08D0400F019904280CD058 -:10C7900096498F20183109F046FE009807280AD1E3 -:10C7A00007E00846FEF784FEEAE70846FEF753FE78 -:10C7B000F3E7761CF6B228466D1EEDB20028C4D110 -:10C7C0003046FEBD10B500230122022100F0D2F94F -:10C7D000040004D1B5208549800009F024FEE078EA -:10C7E00021794018C0B2E0700F2801D30F38E070F3 -:10C7F00000202071A07880210843A07010BDF8B5FA -:10C8000017460D4600231A46022100F0B3F9040032 -:10C8100005D0002D0CD0002F07D0062006E0072DF4 -:10C8200001D00820F8BD0720F8BD0820A84204D890 -:10C830006F486E49423009F0F6FD29462046FFF761 -:10C840008BFC0646002F28D0002E26D1E0782179D7 -:10C850001CE0420012195379072B03D093791B0770 -:10C860005B0F04D0401CC0B20F280CD00CE040007D -:10C8700000198079F12318406B071B0F1843907142 -:10C8800000290AD104E00020491EC9B20029E0D1E4 -:10C89000574856495A3009F0C6FD3046F8BDF8B53C -:10C8A0000D4600231A46022100F064F9040004D169 -:10C8B0004F484E49683009F0B6FD681E052804D37C -:10C8C0004B484A49693009F0AEFD0F21E2782079E2 -:10C8D000002310E0560036197779AF4206D1B179BE -:10C8E00049084900B1715B1CDBB21146521CD2B23F -:10C8F0000F2A00D100220646401EC0B2002EE9D108 -:10C900000F2905D248000019817901221143817154 -:10C910001846F8BD10B50446402801D2072010BDC6 -:10C9200000F056F8082802D03120000210BD002186 -:10C93000304802E0491C082903D24A00825A002AE2 -:10C94000F8D1082903D049004452002010BD04202A -:10C9500010BD10B5402801D2072010BD00F038F8F6 -:10C96000082805D00021234A40001152084610BD76 -:10C97000052010BDF0B58BB016460C00074607D059 -:10C98000002E05D06188402904D207200BB0F0BDED -:10C990001020FBE72088002801D0172801D90C209F -:10C9A000F4E7084600F014F808280FD0258803A8FB -:10C9B0002A463146023009F0B8FB01A8009062888F -:10C9C0002B4607213846FFF732FCDFE70520DDE77D -:10C9D00001460020074A02E0401C082803D2430019 -:10C9E000D35A8B42F8D1704702300000BCC500001A -:10C9F000AD020000000C0020F8B50546E54C079E8E -:10CA0000069821706270A370E6702071681C42085D -:10CA10005200E14B0021880000198446C261605C2D -:10CA200040008218002D0AD0002005E0664647002D -:10CA3000F669401CF353C0B2665C8642F6D8491CC6 -:10CA4000C9B20529E7D30026D21C9708B000BF0061 -:10CA500000198760304600F042F9A15D761C48431A -:10CA6000C219F6B2052EEFD3501B80B2F8BDF0B557 -:10CA70000546C84F8C460020FF247E5DA9009646DF -:10CA80000346CF190CE0F9695A008A5AC2498A4212 -:10CA900004D1401CC0B2FF2C00D11C465B1CDBB291 -:10CAA0009E42F0D86146002909D100280BD0002D04 -:10CAB00007D0B84949788E4203D2401EC0B2002840 -:10CAC00001D071460C70F0BD70B5B24C8D000023E2 -:10CAD0002D19615C09E0EC695E00A45B844202D11F -:10CAE0001370012070BD5B1CDBB29942F3D80020AB -:10CAF00070BDFEB51C4617460D46060008D0002D39 -:10CB000006D0F01C80088000B04203D01020FEBD8B -:10CB10000E20FEBD002F03D0002C01D0A74201D96A -:10CB20000720FEBD0094234622463946002001948A -:10CB3000FFF762FF2988814207D0814201D2042198 -:10CB400000E0092128800846FEBD009423462246C5 -:10CB5000394630460194FFF74FFF28800020FEBD84 -:10CB600010B5044600F0C5F8002801D0E0B210BDB1 -:10CB7000FF2010BDFFB50546874881B01E460C4614 -:10CB8000854204D0052C02D20398022802D300204B -:10CB900005B0F0BD002769460F7028466A46214659 -:10CBA000FFF792FF00280ED068460178204600F07B -:10CBB000A8F8002EECD00028EAD1284600F099F819 -:10CBC000002809D103E03846002EF6D1E0E7FF2027 -:10CBD00072A15C3009F027FC21462846039A00F038 -:10CBE0009CF8D5E7F8B505460C4600206A4E694624 -:10CBF0006E4F0870B5423BD0052C01D30720F8BD1D -:10CC00000A4621462846FFF75FFF002830D06846D5 -:10CC10000178204600F075F8230009F0F5FC0504C2 -:10CC2000090C11161B0001462846FEF7D5FA15E03F -:10CC3000FDF7E0FA12E001462846FFF74CFC0DE054 -:10CC400001462846F6F7B5FF08E001462846F8F702 -:10CC500012FC03E056A17B2009F0E5FB4D4A684633 -:10CC6000A10000788918C96940000E520020F8BD63 -:10CC70003846F8BD524A1268914201D210207047DE -:10CC8000052801D3072070470872002048727047BA -:10CC9000F8B504464A480068844201D21020F8BD25 -:10CCA000207A3C4A83009B18617A3B4D125C11E06C -:10CCB000DE694F00F65BAE420AD04A1C6272DA6946 -:10CCC0004B00D25A228000F01CF860600020F8BDB2 -:10CCD000491CC9B28A42EBD861720520F8BD0EB575 -:10CCE000384B40000ECB0091029301926946085ADE -:10CCF0000EBD28494978814201D9012070470020A2 -:10CD0000704770B50C460546FFF7E9FF214AA900B8 -:10CD1000891889686043401870BDF8B50C4606460E -:10CD200000206946134608706A4619462046FFF7F8 -:10CD30009EFE002500282BD0164A6846A1000078E8 -:10CD40008918C96940000E52684601782046FFF7ED -:10CD5000D8FF0546230009F057FC0504090C0F1401 -:10CD6000170029463046FEF713FA11E0FDF720FAC6 -:10CD70000EE0FFF78FFB0BE029463046F6F7E0FEAA -:10CD800006E0F8F771FB03E009A1622009F04BFB14 -:10CD90002846F8BD100C0020FFFF00007372635C92 -:10CDA000686F73745F636D2E6300000002300000D3 -:10CDB0007372635C686F73745F636D2E6300000051 -:10CDC000280000206C67010010B5014620220948A8 -:10CDD00009F0ABF907490020C877084610BD06499D -:10CDE000012048610548064A0168914201D10021AD -:10CDF00001607047400C00200005004078000020D2 -:10CE0000BEBAFECA8107C90E002808DA0007000F63 -:10CE100008388008C24A80008018C06904E0800891 -:10CE2000C04A800080180068C8400006800F704724 -:10CE3000BD4948788978884201D3401A02E021220E -:10CE4000511A0818C0B27047B74923314878897819 -:10CE5000884201D3401A02E02122511A0818C0B2B8 -:10CE60007047B149463148788978884201D3401AE1 -:10CE700002E02122511A0818C0B27047A94910B522 -:10CE80000C310868FF22120290430122D2031043A2 -:10CE90000860A54900202331487088702339487004 -:10CEA0008870463148708870A04808F0C8F89F48DC -:10CEB000401C08F0C4F8F5F741FC00F028F910BD5B -:10CEC00020207047B4E770B50C4605460026FFF7F2 -:10CED000AFFF9549A04214D30A46203A00232046CA -:10CEE000641EE4B200280BD08878105C2870887823 -:10CEF0006D1C401CC0B288702128F0D18B70EEE709 -:10CF0000012600F004F9304670BD202070479BE7F1 -:10CF100070B50C4605460026FFF796FF824923317F -:10CF2000A04214D30A46203A00232046641EE4B2ED -:10CF300000280BD08878105C287088786D1C401C05 -:10CF4000C0B288702128F0D18B70EEE7012600F086 -:10CF5000DEF8304670BD202101700020704710B50A -:10CF60000446FFF77EFF2070002010BD70B50C4610 -:10CF70000546FFF776FF6C494631A04215D30A46B5 -:10CF8000203A00232046641EE4B200280BD08878A3 -:10CF9000105C287088786D1C401CC0B288702128F5 -:10CFA000F0D18B70EEE7002400E0614C00F0AFF8A8 -:10CFB000204670BD70B50C460546212904D9FF20D6 -:10CFC0005CA1473009F02FFA55484068103840B24C -:10CFD000FFF718FFC6B20D20FFF714FFC0B286425C -:10CFE00007D2FF2053A14D3009F01DFA01E0F5F7FB -:10CFF000E8FB21462846FFF766FF0028F7D070BD02 -:10D00000F8B507464948484C401E474E007825462B -:10D0100046362335002806D1A9786878212200F009 -:10D020006BF800280ED0A1786078212200F064F817 -:10D03000002814D0B1787078212200F05DF8002823 -:10D0400028D033E038496878C91C0F546878401CF0 -:10D05000C0B26870212829D10020687026E03249CA -:10D06000607820390F546078401CC0B2607021286D -:10D0700001D1002060702D4F7F1E3878002815D018 -:10D08000A1786078212200F037F800280ED0002027 -:10D0900038700BE02449707826310F547078401CAA -:10D0A000C0B27070212801D100207070A978687812 -:10D0B000212200F021F800281DD0A17860782122DB -:10D0C00000F01AF8002816D0B1787078212200F00C -:10D0D00013F800280FD0F5F756FB144807F0B7FFF8 -:10D0E00001214903884203D016A1C12009F09BF910 -:10D0F0000E4807F0C4FFF8BD401C884205D090429E -:10D1000001D1002901D0002070470120704710B5DF -:10D11000064807F09CFF002801D1F5F723FB10BD5E -:10D1200000ED00E000E400E0800C00207D00002025 -:10D13000072000007372635C736F635F72616E64DB -:10D140002E6300007372635C736F635F72616E6461 -:10D150002E6300000C4908784A78401CC0B2904207 -:10D1600000D008707047094A074820BF40BF20BF61 -:10D170004178037843701368002B02D103788B4207 -:10D18000F3D00020704700007F00002000E200E0A4 -:10D19000FEB5F34C07466068FF213E0181552178BA -:10D1A000FF2913D00901083141583246491E08327F -:10D1B00009020192090A805800F0C8F9002802D03B -:10D1C0002478254615E06168207888552770FEBDD3 -:10D1D000E34842680198115828010090083010581F -:10D1E00000F0B4F9002806D1DD482C4641680098CB -:10D1F0000D5CFF2DECD1DA4821014068855547547C -:10D20000FEBD70B5D64A04460020157A53680AE080 -:10D210000201561C9E5DA64203D10C329A588A42E6 -:10D2200004D0401CC0B28542F2D8FF2070BDF8B5D2 -:10D23000CB4F3E7801F013FE0146FF2E68D034013B -:10D24000254678680835405900F080F9022802D94F -:10D25000786840595AE0C2494868025D0A70A11CCA -:10D26000425C002A0CD0521E425441590122D20580 -:10D2700089180902090A41513046FFF789FF30E059 -:10D28000631CC25C0092221D94468258002A10D072 -:10D2900001239B029A420FD99205920D43595703DD -:10D2A000DB191B021B0A43516346C3589A1A920AA0 -:10D2B00009E0FF21C1540AE0435952039A181202AF -:10D2C000120A4251002242543046FFF761FFA4483F -:10D2D0000C344168C26800980959800012580098BF -:10D2E00090479F4C2078FF2812D001F0B8FD0146EE -:10D2F0002078626800010830105800F027F90128F2 -:10D3000096D92078616800010830085801F09AFD2C -:10D31000F8BDF8B51C4615460E460746FF2B03D34D -:10D3200090A1D32009F07FF88D48FF21C7604560A8 -:10D3300004720674017000224270104604E002017B -:10D34000521C401CA954C0B2A042F8D3F8BD70B51D -:10D35000834C06466578207C854203D381A1E62074 -:10D3600009F061F8E068A90046506078401C6070E0 -:10D37000284670BDFFB581B01D46FF2401F06FFD4A -:10D38000774F064679780198814203D875A1F42039 -:10D3900009F049F872480021037A406810E00A0158 -:10D3A0009446521C825CFF2A24D0019FBA4205D1C8 -:10D3B00062460C328758029A97421DD0491CC9B266 -:10D3C0008B42ECD8FF2C17D021014B1C019AC25480 -:10D3D0000B33029AC250039B614F0022012B0ED0E7 -:10D3E0000B1DC25001239B029D4216D9AA05920D26 -:10D3F00008D008E00C46E1E7FF2005B0F0BD0B1DAA -:10D40000C550EFE71A4653039B190E461B02083618 -:10D410001B0AAA1A8351920A09E0002D00D10125A6 -:10D420006B039B191D022D0A0B460833C550891C3E -:10D4300042543D463E782046FFF7AAFE2878B04287 -:10D4400015D001F00CFD014628786A68000108300B -:10D45000105800F07BF8012807D928786968000186 -:10D460000830085801F0EEFC01E0FFF7E0FE0198FB -:10D47000C3E770B50C46054601F0F1FC06462146AF -:10D480002846FFF7BEFEFF2817D0354D0401204681 -:10D49000696808300858314600F058F8012109033E -:10D4A00040186968A41C095D400B002901D089025D -:10D4B0000818002800D1012070BD002070BDF3B510 -:10D4C00081B00F460198FFF79CFEFF282AD0244D1B -:10D4D0002E7869683246344604E0844205D02646F8 -:10D4E0002301CC5CFF2CF8D11CE0FF2C1AD0A64203 -:10D4F0001FD11001085C2870FF2818D001F0AFFC84 -:10D500002A780146120168680832805800F01EF837 -:10D51000012809D92878696800010830085801F005 -:10D5200091FC06E00020FEBDFFF781FE01E001F066 -:10D5300091FC39460198FFF79CFF22016968FF239F -:10D54000541C0B558A5C3301CA54FEBD401A0002BC -:10D550000121000AC905884200D900207047000057 -:10D56000CC0C00207372635C736F635F74696D65CC -:10D57000722E6300F0B500241C4A01211C4B0803E5 -:10D58000546018601B4B1C601B4C20601B480469D6 -:10D59000E443E406E617046910252C430461184CA3 -:10D5A0006160184D2960761C00E020BF1F68002FC5 -:10D5B000FBD0002E03D107691026B743076190689E -:10D5C0008005906801D5104A10436960A160002170 -:10D5D00019600121084A09031160F0BD10B5044625 -:10D5E000FFF7C8FF2060002010BD000000C500400C -:10D5F00080E100E000C1004080E200E000ED00E0DA -:10D6000000C3004000C0004000FCFFFF70B51F4990 -:10D610000A68002A17D000231D4601244A68521CBC -:10D620004A60092A00D34D600E792246B2400E6846 -:10D6300016420AD072B60B6893430B6062B6496813 -:10D640000160002070BD052070BD5B1C092BE5D377 -:10D650000FA1362008F0E7FEF5E70120104980050C -:10D6600008607047EFF31081CA07D20F72B601212C -:10D6700081400648036819430160002A00D162B660 -:10D68000EBE7024800210160416070478400002000 -:10D690007372635C736F635F6576742E6300000062 -:10D6A00000E200E001208107086070470120810747 -:10D6B000486070471048C068C00700D0012070471C -:10D6C0000D488068C00700D0012070470A484069B3 -:10D6D000C00700D0012070470748C069704706495D -:10D6E0008A69D20306D589698907890F814201D1E8 -:10D6F000012070470020704700040040F8B5F84C46 -:10D70000207BE17A88421CD00126F64D0027E07A82 -:10D71000215C14200A4642435019037C052B11D08A -:10D72000037C062B1CD0037C072B28D0437C012BC9 -:10D7300033D0EDA1EF4808F076FE207BE17A8842F5 -:10D74000E5D1F8BD0674E07A0A2807D0E07A401CDB -:10D75000E072491CC8B2AA5802210CE00020F7E789 -:10D760000674E07A0A2808D0E07A401CE072491C6E -:10D77000C8B2AA5803219047DFE70020F6E70674F5 -:10D78000E07A0A2807D0E07A401CE072491CC8B24F -:10D79000AA580821EFE70020F7E74774E07A0A2843 -:10D7A00007D0E07A401CE072491CC8B2AA58072191 -:10D7B000E1E70020F7E770B50024CF4E0620707235 -:10D7C000CE4825464477047738300473C472CC4879 -:10D7D00007F035FCCB480575F572CB49601E8860B3 -:10D7E0007571B570F57035717570C848643905701C -:10D7F00045701420604340180574641CE4B2052C85 -:10D80000F7D30120F5F764F80020F5F761F801205F -:10D81000B071F4F727FDBE48F4F736FDBD4C20701B -:10D82000BD48F4F731FD6070F4F7F2FF70BD10B53C -:10D83000F5F719F8B74C2078F4F744FD6078F4F761 -:10D8400041FDAD4C207A002803D0F4F7CAFD00203A -:10D85000207210BD70B5A84CA079002804D0A2A1F8 -:10D86000AE4808F0E0FD70BDE07A002803D19EA12B -:10D87000AB4808F0D8FD0126A6710025E572607A54 -:10D88000042114225043974A801801749E488168ED -:10D89000491C04D0691E81600120F5F719F80020A9 -:10D8A000F5F716F8F4F7FAFF07F00AFDF5F7FBF8BD -:10D8B0009C480560056001209B49C0030860F5F79E -:10D8C00071F992480078022804D0032804D1E07846 -:10D8D000002801D0A67000E0A570F5F7D0F870BD63 -:10D8E000034680490520142242435218203A127FF1 -:10D8F000002A04D0401E0006000EF4D17047142206 -:10D90000424351180A46803AD366012220390A77E9 -:10D910007047012805D0032805D1002903D1002034 -:10D9200070470029FBD010B4734C00236370774A12 -:10D93000002890700CD002280AD007291AD20800BB -:10D9400078440079001887441505070D0F1113005E -:10D95000D37003E01B2000E03A20D07001206070FB -:10D9600010BC70475820F8E77720F6E79620F4E7D8 -:10D97000B520F2E710BC0020704710B5634840782E -:10D98000F5F798F880B210BD411E1422504310B52F -:10D99000544A8418203C042902D8207F002803D14F -:10D9A00051A1624808F03FFD207F012804D0B32038 -:10D9B0004DA1800008F037FD0020207710BD70B524 -:10D9C0004E4C607F217F884201D1012500E0002577 -:10D9D000F5F709F8F5F76EF8617F227F914201D1E2 -:10D9E000012100E00021A942EBD170BDF7B5074647 -:10D9F000481E84468EB0C0B2142205905043394A66 -:10DA000085180495287C2D1D07282AD1344C002622 -:10DA1000E07A227B824221D0235C059A934201D195 -:10DA2000012601E0002E04D00A2811D0421CA25C7D -:10DA300022540A280ED0401C227BC0B28242EBD175 -:10DA4000002E0BD0207B002806D0207B401E04E057 -:10DA50000022ECE70020EFE70A202073049A01205F -:10DA600010746046244C042813D8142041431D48E8 -:10DA700008182038007F00280BD00498007C01286B -:10DA80000BD00498007C012803D01098807A0128DC -:10DA900007D015A1264808F0C6FC1098807A012806 -:10DAA0006FD104980F4B007C022845D00C4C207B92 -:10DAB0000A2872D0207BE17A401C884203D10AA157 -:10DAC0001C4808F0B0FC049901204874217B05989B -:10DAD0006054207B0A2864D0207B401C20731CE10A -:10DAE000D80D0020E80D00207372635C72656D2E06 -:10DAF00063000000CF0500006C0E0020A00D002088 -:10DB0000780E0020C00D00204C0E00208E0000205A -:10DB10002FD200008C000020FDD600007D02000006 -:10DB20005E02000000F5004080E200E0CB02000051 -:10DB30001503000022030000607A059A0146904216 -:10DB400006D0014614267043C018807C9042F8D15C -:10DB5000627A824208D1617A14225143C918897CC1 -:10DB600061720121A17207E014224243D2181426E7 -:10DB70007143927CC9188A74142206215043C0183C -:10DB800081741098007A062819D201007944097925 -:10DB900049188F440812100E0C0AE07A00288ED023 -:10DBA00091E700209AE700200FE0B4200DE07320F9 -:10DBB0000BE0322009E00A2007E0062005E0FF2004 -:10DBC000FDA1E03008F02FFC0020029010980168C1 -:10DBD0000298081A28601099097A002912D00221A7 -:10DBE000401A0102090A296010980268406810185A -:10DBF0000002000A68601098807A0228109803D00A -:10DC0000007B74E00421EBE7007A002813D00222A5 -:10DC1000029810188446109842686046083016181A -:10DC2000E848029A4078904202D9E278002A04D06B -:10DC30003046083005E00422EAE7029A801A80198B -:10DC40000830627A062A1CD0627A14235A43DE4BCB -:10DC5000D2185268914214D0DC4B0793617A142297 -:10DC60005143D94A89184A688968D21BC91B1202D4 -:10DC70000902120A090A90423AD89A4238D89942BF -:10DC800036D83818801B0002000A286010996044BA -:10DC9000CF4AC9680002000A9446421A01239B0534 -:10DCA00007929A4201D2104614E00A1A09929A4247 -:10DCB00001D207980EE0079A6346624503D9591AC4 -:10DCC0000818401C06E0099A624506D9181A40183F -:10DCD000401C4042002860DC03E0B7A1BD4808F0CA -:10DCE000A2FB286880190002000A686000202872E0 -:10DCF0006868082608300002000A68601098407AB8 -:10DD0000A8721098007A687203280ED200280CD0EE -:10DD1000FFF7D0FC002803D007E0002011B0F0BDD1 -:10DD200002983A210E1A32200290A6480178012961 -:10DD300001D0032909D141780298814205D9E078C0 -:10DD4000002802D10298081A861928689F4AC01B29 -:10DD5000844601026868090AC01B03021B0A029379 -:10DD60008E421AD81346914217D80299994214D874 -:10DD7000617A062915D0667A6146062203920092DE -:10DD80001422914B7243D2189368DB1B8B4216D836 -:10DD90000396967C062EF3D177E0059801F055F9AD -:10DDA000BBE70499022205980A74627A062A00D019 -:10DDB000627A8A7460720120A07211B0F0BD062EE2 -:10DDC00063D000223146944614227F4B4A43D21836 -:10DDD0005368DB1B834229D2917BAB7A99421FD8CF -:10DDE00004980521059C01747B4D287B0A2811D0DD -:10DDF000287BE97A401C884203D16FA1774808F05C -:10DE000012FB287B2C54287B0A2807D0287B401C37 -:10DE1000287382E7E87A0028EFD0F2E70020F7E7DE -:10DE200001218C46917C0629CED102E06046002873 -:10DE30002AD03546009114202A46424362480621E2 -:10DE4000171839741038007B0A28634816D0017BF4 -:10DE5000C07A491C814203D157A1614808F0E3FA16 -:10DE60005D48017B4554017B0A290BD0017B491C8D -:10DE70000173BD7C0098A842DDD106E0C07A00287D -:10DE8000EAD0EDE70021F3E70096049902204E4D19 -:10DE90000874607AB04207D1049900988874059894 -:10DEA00060720120A07221E00398062E0FD0062890 -:10DEB00003D141A14B4808F0B6FA0398142250430D -:10DEC0004019059981740499009888740EE0062819 -:10DED00003D139A1444808F0A6FA0398142250430C -:10DEE000401905998174049906208874012011B0A5 -:10DEF000F0BD70B50D463D4A441900210B46101A7D -:10DF00008B4103D22CA13A4808F08DFA394885425A -:10DF100003DD29A1384808F086FA3848854203DA3B -:10DF200025A1374808F07FFA3648844205DA002CEC -:10DF300001DB204670BD334800E03348201870BD37 -:10DF4000401E70B5C0B2142148431F494418607B7D -:10DF5000062813D201007944097949188F44020C2C -:10DF60000A080604002068E0B42010E073200EE0E8 -:10DF700032200CE00A200AE0062008E0FF200EA173 -:10DF8000E03008F050FA617B0020002955D00221D2 -:10DF90004018616840180002000AF4F78BFD0C2558 -:10DFA0006557124A441900210B46101A8B412FD293 -:10DFB00001A10F482AE000007372635C72656D2E48 -:10DFC000630000008E000020E80D0020FFFF3F00EE -:10DFD000FFFFFF000E070000D80D00200702000021 -:10DFE000C5030000DD030000E3030000FF7F841E83 -:10DFF000F50300000020A107F603000000E05EF832 -:10E00000F70300000080841E00807BE108F00BFA1B -:10E01000FB48854203DDFB49FB4808F004FAFB4856 -:10E02000854203DAF749FA4808F0FDF9F9488442D5 -:10E0300007DA002C03DB204670BD0421A8E7F54871 -:10E0400000E0F548201870BDF0B5064683B0F348EF -:10E050000190457A029534687068001B0702F04809 -:10E060003F0A001B0090062D2DD014202946414365 -:10E07000EC480122081884464168E9489205864622 -:10E08000081B904210D3631A93420DD30246704688 -:10E09000724503D900984018401C05E073450ED91D -:10E0A000411A0819401C404200280CDA60460295CB -:10E0B000857C0198C0790028D5D003B0F0BDD14946 -:10E0C000D94808F0B0F90298854226D01421484377 -:10E0D000D4490123401802908068D1499B058C46A1 -:10E0E000011B8646994210D3221A9A420DD36346E9 -:10E0F000614503D900997144491C06E019466245FF -:10E100002DD9091A0819401C4142002905DD029841 -:10E11000B17A807B814200D37446062D15D0C14967 -:10E120001420454368184268121B1202120ABA42B0 -:10E130000BD2B37A827B934200D38468857C0198AA -:10E14000C0790028B9D1062DEAD13068A042B4D0F8 -:10E15000E0190002000A3460706003B0F0BDA94904 -:10E16000B14808F060F9D8E7F0B5B049044648680E -:10E1700085B0C005C00D1CD0103840B200280CDAA4 -:10E180000207120F083A920892005118C9698007D5 -:10E19000C00EC1400806800F09E08108A44A89002A -:10E1A000891809688007C00EC1400806800F002842 -:10E1B00008D000272078002806D0012804D00020AD -:10E1C00005B0F0BD0127F5E72079062813D201003C -:10E1D0007944097949188F44020C0A080604002082 -:10E1E00018E0B42010E073200EE032200CE00A208A -:10E1F0000AE0062008E0FF208249E03008F013F929 -:10E2000021790020002905D002214618834D002FD6 -:10E2100002D003E00421F8E70020E871694602AA71 -:10E22000A068F4F751FC694608228A56E06801A903 -:10E2300080180122C01C1F2801DA019209E003AAFC -:10E24000F4F742FC6846007B002802D00198401C8D -:10E25000019000990198401808300002000A0190CE -:10E26000881B0002000A0090607969468872009855 -:10E270000390F4F7B8FB009A019B121A181A6D4923 -:10E2800012020002120A000A8A4216D8884214D8E2 -:10E290006846FFF7D9FE00990398814205D0881996 -:10E2A0000002000AF4F706FCA0600120E9790029C9 -:10E2B00086D0002FB0D005B0F0BD0020F6E7F3B552 -:10E2C0008FB05D480C460B9006F0C1FE5B4A0F997B -:10E2D000524F56185A4D203E00280BD05948007D09 -:10E2E000002803D058A15B4808F09DF82078012849 -:10E2F0007ED060E1687F0A280CD0687F297F401CAF -:10E30000884203D150A1544808F08DF820780128A4 -:10E3100004D00CE0287F0028F4D0F7E7F07F002835 -:10E3200003D049A14D4808F07EF80120F077697FBD -:10E330000F9814224A4E51438919087420780228F4 -:10E3400022D0687F14214843861920793072607981 -:10E35000707232460C323146A068F4F7B5FB0C20DF -:10E3600030560F2804DD1F3830733068401C306091 -:10E370000C217156301DE26801905018C01C1F28F6 -:10E3800070DA01200199FDE028494868C005C00DF8 -:10E3900021D0103840B200280CDA0207120F083AD8 -:10E3A000920892005118C9698007C00EC140080642 -:10E3B000800F09E081081E4A8900891809688007D2 -:10E3C000C00EC1400806800F002804D105201EA100 -:10E3D000000208F028F8687F1421484386190021BC -:10E3E000E0686A460691117006A9F4F76DFB00E03B -:10E3F000D7E06A46002010560F2834DD012033E0B4 -:10E400000020A107B8DF0000F603000000E05EF87E -:10E41000F70300000080841E00807BE16C0E00206A -:10E42000FFFFFF00E80D00200E07000000ED00E0F8 -:10E4300000E400E0FFFF3F00780E00209200002083 -:10E44000A00D0020C00D00207372635C72656D2EFC -:10E450006300000011050000EF040000F404000058 -:10E46000E00C002082E0002006994018079002206E -:10E47000B0722079307260797072A068311DC01C52 -:10E4800006911F2801DA012009E0F4F71DFB684618 -:10E490000078002804D0069806990068401C08609F -:10E4A000307A062813D201007944097949188F443B -:10E4B000020C0A08060400200FE0B4200DE07320CF -:10E4C0000BE0322009E00A2007E0062005E0FF20EB -:10E4D000FD49E03007F0A7FF00202179002943D053 -:10E4E00002214018069071680830081807990890B2 -:10E4F00009180698081A0C900020F871F4F773FABE -:10E5000004463060079820180002000AF060787A0C -:10E51000062825D0797A14204143EC480818406831 -:10E520000899029040180002000A0390707A694628 -:10E53000887402A8FFF788FD0299039A091B121B31 -:10E5400009021202E24B090A120A0C98994207D8F2 -:10E55000824205D80299069808180002000A306025 -:10E56000F8790028C8D110E00421BAE704AA01997B -:10E57000F4F7AAFA6846007C002804D001980199B3 -:10E580000068401C08602078B072687F0A2806D0B6 -:10E59000687F401C68770B9806F071FD47E000200B -:10E5A000F8E7F07F002804D0A320CAA1C00007F03C -:10E5B0003AFF0120F077CA490F98087420780228A2 -:10E5C00003D1C4A1C74807F02EFFC54E2079307291 -:10E5D0006079707232460C323146A068F4F774FAF2 -:10E5E0000C2030560F2804DD1F3830733068401C73 -:10E5F00030600C22B256301DE16801908818C01CB2 -:10E600001F2802DA012001990BE003AA0199F4F70F -:10E610005BFA6846007B002804D0019801990068E5 -:10E62000401C08602078B072AD4901200875687FF1 -:10E63000297F884224D07C7A062C23D0F4F7D3F9A2 -:10E6400014214C43A14961180A7C042A18D00A7C81 -:10E65000032A15D04B6889681B1A081A1B0200028E -:10E660009B4A1B0A000A082B0AD31146934207D87B -:10E67000884205D8687F297F884201D0F4F7FFF9E6 -:10E6800011B0F0BD687F297F8842F7D111B0F0BD8D -:10E6900010B50020F4F709F910BD10B50120F4F70A -:10E6A00004F910BDF1B5009802281ED08E4C607A96 -:10E6B000062803D187A18D4807F0B5FE0026A67174 -:10E6C0000125E572607A03211422804F5043C0195E -:10E6D0000174F4F7D9F9009800280BD0012829D04B -:10E6E000032879D07BA1824844E082480078F3F780 -:10E6F000EFFDF8BD8048007F002803D075A17F485A -:10E7000007F091FE65717C4D00202E60F4F7E0F873 -:10E71000A968481C04D0012300221846F4F70EF91A -:10E72000607A617A401CC0B2142251437A580121A8 -:10E730009047F8BD0120F4F7CBF8607900280DD0A0 -:10E740006D488068401C09D0607A617A401CC0B274 -:10E75000142251437A5806219047F8BD6648007F3D -:10E7600001280AD0022812D0032822D0042834D04D -:10E7700058A1634807F057FEF8BD2079002803D060 -:10E780002671F4F786F9E5705B480677F8BD207AC4 -:10E79000002802D1F3F7FCFD2572607A617A401CF3 -:10E7A000C0B2142251437A5800219047524806774C -:10E7B000F8BD514F0123397B78680022411A184671 -:10E7C000F4F7BCF82079002803D02671F4F761F93A -:10E7D000E57002203877F8BD19E0474E217870685F -:10E7E0000123411A00221846F4F7A8F8207A0028DD -:10E7F00002D1F3F7CDFD2572607A617A401CC0B278 -:10E80000142251437A58002190473577F8BD607A39 -:10E81000617A401CC0B2142251437A5805219047B6 -:10E82000F8BD10B5304C607A062803D129A13548CF -:10E8300007F0F9FD607A617A401CC0B2142251439E -:10E84000224A52580421904710BDF0B583B00620EB -:10E850000290F4F7C8F8244C0090617A2A4801909D -:10E86000062920D0617A1420414318480918097CF0 -:10E87000042918D0617A142251430818007C032817 -:10E880007BD0019900980B6849681B1A081A1B0273 -:10E8900000020F4A1B0A000A082B6ED3114693424E -:10E8A0006BD8884269D814488068401C03D009A1FD -:10E8B000164807F0B8FD00206071607A06282CD158 -:10E8C0006078002829D023E0B8DF0000E80D0020A0 -:10E8D000FFFF3F007372635C72656D2E6300000082 -:10E8E000C00D00201E0500006C0E00204F0500002A -:10E8F000A20500008C0000204C0E00205B050000EB -:10E9000096050000A90500005C0E0020E50500004A -:10E91000FE48C178417081780170607A062815D070 -:10E92000607A1421FA4A48438018007C04280DD1EB -:10E93000607A0290607A0121142358438018017490 -:10E94000607A58438018807C6072A172F14D687FB4 -:10E95000297FF14F884233D0F04E287F142148435D -:10E960008019007CC05D0128287F07D048438019AA -:10E97000007CC05D02282FD044E0FDE11421484313 -:10E980008019807A01280AD0287F0221142250435E -:10E990008019007CC155287F0A2808D009E0287F0B -:10E9A0000021142250438019007CC1552AE0002028 -:10E9B00001E0287F401C2877687F297F8842CCD1DE -:10E9C000D74D287D00284CD0287CC15D012928D056 -:10E9D000C05D022830D03AE0287F142148438019D6 -:10E9E000807A012803D0CFA1D14807F01CFD297FF0 -:10E9F00000201422514389198872297F51438919B3 -:10EA0000097CC855287F142148438219287F484330 -:10EA10008019017C0098FEF7E9FF287F0A28C8D1F9 -:10EA2000C5E7A97A012904D00221C1550020287523 -:10EA30000DE00021C1550AE0A87A012803D0B9A150 -:10EA4000BC4807F0F0FC0020A872297CC855287D3E -:10EA5000002806D0297CB24A0098FEF7C7FF0020A4 -:10EA60002875029806281ED014214843A84940184A -:10EA7000017C012917D107210174AF4D287B0A2899 -:10EA80003CD0287BE97A401C884203D1A5A1AB4841 -:10EA900007F0C9FC297B02986854287B0A2831D0EA -:10EAA000287B401C2873607A06287DD0A07A002835 -:10EAB0007BD00020A072617A1420414394480E1844 -:10EAC0009F49B56873680A46F6687C32CB679660E2 -:10EAD00055609C4D697E002916D00226617A142269 -:10EAE0008B4851430818407B06281BD2010079440B -:10EAF000097949188F440A1412100E0CE87A00287C -:10EB0000C4D0C7E70020CDE70426E7E700210FE0E7 -:10EB1000B4210DE073210BE0322109E00A2107E066 -:10EB2000062105E0FF208849E03007F07CFC002149 -:10EB30002973687E022801D0012810D12869009A23 -:10EB40004018821A1202120A3A2A08D932380321CE -:10EB500000026976000A28613220287308E0322911 -:10EB600006D2207A00280AD1F3F712FC012005E032 -:10EB7000207A002803D0F3F734FC00202072634988 -:10EB80000822487820700978012901D0032906D18C -:10EB900001212171297B884201D9421A0832A378C8 -:10EBA000002B00D0921C01E08DE09BE02179002930 -:10EBB00001D1002B5DD09446644A00990092019ADD -:10EBC000176852687F1A511A3F0209023F0A090A60 -:10EBD000BC451BD85D4A974218D8009A914215D877 -:10EBE000297B884223D92B69421A9A1A1202120AE7 -:10EBF000101880190002000A2A616860002914D0E8 -:10EC0000032028770006000E3ED14CE00020207142 -:10EC1000A070297B002925D028694018801900029E -:10EC2000000A6860022028772EE00120E9E781428F -:10EC30000BD92A69511889190902090A6960002843 -:10EC400001D00420DDE70220DBE7002B03D135A152 -:10EC50003F4807F0E8FB286980190002000A686055 -:10EC6000002004E0296989190902090A69602877E6 -:10EC700019E0287B00280FD02969081880190002A4 -:10EC8000000A686002202877286901238119002280 -:10EC90001846F3F753FE09E0286980190002000ABC -:10ECA0006860002028770120F3F712FE607A1421B3 -:10ECB000484317490C2240188256012300206968F6 -:10ECC000F3F73CFE0EE00120F3F702FE0020F3F71D -:10ECD000FFFDF3F7E3FD207A002803D0F3F781FB73 -:10ECE00000202072A078002804D0F3F7D2FE002084 -:10ECF000E070A0706078002804D00448C1784170AA -:10ED000081780170207900282BD023E08E0000202C -:10ED1000E80D0020A00D002091000020E00C002054 -:10ED2000C00D00207372635C72656D2E630000007D -:10ED30000706000023060000D80D0020350600005D -:10ED4000E00D00204C0E0020B8DF0000FFFF3F0068 -:10ED5000870600000020CF49E0700978002900D123 -:10ED60002071CD48017BC07A814203D0CB484078E6 -:10ED7000F3F7AEFA0120E07103B0F0BDF0B5C84C76 -:10ED80000746607A83B0062803D1C6A1C84807F0B9 -:10ED90004AFB607A1421C74E48438019007C03283F -:10EDA00003D0C0A1C44807F03EFBC44DA868401C76 -:10EDB00003D0BCA1C24807F036FB607A1421484357 -:10EDC00081190C20085600216A4600911171C01962 -:10EDD00001AA6946F3F778FE6A46042010560F2808 -:10EDE00001DD012000E0002000994018696840180A -:10EDF0000102090AA9606079002804D001230022D9 -:10EE00001846F3F79BFD03B0F0BD70B5AE4CAD4AAC -:10EE10000B1AA34214D3451AA54211D3934203D926 -:10EE2000101A43185B1C0BE0954204D9511A0818BC -:10EE3000401C434204E0A549A54807F0F4FA00232A -:10EE4000184670BD10B50146012300220220F3F7D9 -:10EE500075FD10BD10B50220F3F73AFD10BD10B5D9 -:10EE6000F3F7C1FD10BDF0B58D4D0446E87A83B0CF -:10EE7000002803D18BA1974807F0D5FA642C4DD315 -:10EE8000954900200246091B824147D39348417FA0 -:10EE9000007F814242D19248007D00283ED1687AAD -:10EEA0001421844F4843854EC519306801AA0019C2 -:10EEB0006946F3F709FE694604200856002802DD7A -:10EEC0000098401C0090A96800986B680A18D21A34 -:10EED0001202844B120A9A4220D8AA7C062A08D031 -:10EEE00014235A43D2195268511A0902090A81425D -:10EEF00014D3B068401C05D00120F3F7E9FC0020D2 -:10EF0000C043B060306800193060A86800994018AC -:10EF10000002000A7061012003B0F0BD002003B0C0 -:10EF2000F0BDF8B50646401EC5B2142061496843DD -:10EF30004418207C002803D15AA16B4807F073FACB -:10EF40006648017F407F81420CD0684A14234B43BE -:10EF50009B181B7CB3420CD00A290CD0491CC9B2A7 -:10EF60008142F3D15E48017D002964D0007CB0422B -:10EF700061D10020F8BD0021F1E7217C052905D0F1 -:10EF8000217C062902D0217C072928D10121217466 -:10EF9000C17A0023027B8A4221D00246565CAE42EF -:10EFA00001D1012301E0002B04D00A2911D04E1C0D -:10EFB000965D56540A290ED0491C167BC9B28E4262 -:10EFC000ECD1002B0BD0117B002906D0117B491E00 -:10EFD00004E00026ECE70021EFE70A211173617CD1 -:10EFE00000292AD06774C17A0023027B8A4224D088 -:10EFF000425CAA4201D1012301E0002B04D00A297E -:10F0000012D04A1C825C42540A290FD0491C027B50 -:10F01000C9B28A42ECD1002B0FD0027B0146002AF4 -:10F0200006D00A7B521E04E00022EBE70021EEE747 -:10F030000A220A7301E018480027217C01299CD18B -:10F04000617C002999D10120F8BD70B505461420D6 -:10F05000184A05216843801801740F4C207B0A2848 -:10F0600011D0207BE17A401C884203D11749204807 -:10F0700007F0D9F9207B2554207B0A2807D0207B74 -:10F08000401C207370BDE07A0028EFD0F2E700202A -:10F09000F7E700008E000020D80D00208C00002033 -:10F0A0006C0E00207372635C72656D2E630000004D -:10F0B000EA060000E80D0020EB0600004C0E0020E0 -:10F0C000EC060000FF7F841E0020A107B8DF0000CF -:10F0D0000E0700002D070000FF1FA107A00D002054 -:10F0E000C00D0020FFFF3F006A070000E00C002079 -:10F0F0000702000070B5FF4D00246C702C70AC61ED -:10F1000000F0CEFC284620304470C473AC6214304A -:10F110002C6305F094FF002804D0FF20F6A14E30A8 -:10F1200007F081F92C7770BD0B23DB4310B5C21AB1 -:10F13000F54998421FD008DC1C3222D00A2A20D080 -:10F14000142A1CD0182A08D117E0083011D004283E -:10F150000DD0082809D00C2805D0FF20E6A1753075 -:10F1600007F061F910BD04200CE000200AE0FC204B -:10F1700008E0F82006E0F42004E0F02002E0EC20B3 -:10F1800000E0D820C86010BD70B50125DF49022617 -:10F190000E60DF490022CA63CD63DE49C96A0907F0 -:10F1A0000ED4DC494031CB6ADB4A53620B6B93626D -:10F1B0004B6BD3628B6B1363C96BD30519435163DC -:10F1C000D14C002826D0012828D0FF20CAA1A13088 -:10F1D00007F029F9D148A063FF200430606325635C -:10F1E00003202061C849962040314860C1491C2055 -:10F1F0000856FFF799FFCB49C9488860C948CA49F2 -:10F2000080304160C9490160C9480660C949102081 -:10F21000486070BDC8486061C84803E0C848606184 -:10F22000C648801FA061D5E770B50C46B14D0146B8 -:10F230000622A81C06F079FF2C7270BDAD48203064 -:10F2400040787047AB4A517010707047F8B504466B -:10F250000D465079117900020843690009190884A4 -:10F260001F461646501C06F0C1FF317800020843C5 -:10F27000A90060502846083001268640002F0ED095 -:10F28000012F04D0FF209CA1E83007F0CCF8206BC0 -:10F29000304301460120A84001432163F8BD206BA3 -:10F2A000B043F6E770B50D460446082904D9FF209F -:10F2B00091A1F93007F0B7F80022A24809E09100C7 -:10F2C000635809180B6053001B191B8C0B62521CEE -:10F2D000D2B2AA42F3D3206B9A494031086070BD84 -:10F2E00010B50446FFF720FF8248047710BD81481F -:10F2F0002030007B704710B5834CC178616206F006 -:10F3000075FF0002E06110BD252808D0262808D02E -:10F31000272808D041000A2807D8091D06E0022145 -:10F3200005E01A2103E0502101E0891DC9B2764AA7 -:10F33000916075494031486170476E4988617047F6 -:10F3400070B5002818D002226A4C784B0320A272B4 -:10F35000F0331860734D72486860002001262075F4 -:10F3600000290BD0012910D002291BD0952062A1C1 -:10F37000800007F058F870BD0122E5E77248012AC5 -:10F3800001D0466070BD066070BD5A48012A006B0E -:10F3900005D00121490508432063696070BD012142 -:10F3A0000905F8E7A069002803D153A1674807F0D1 -:10F3B0003AF8A169A06A40186549886059486549CA -:10F3C0008030816060491031C1600120216BC00331 -:10F3D00001432163686047482030C67370BD08B59B -:10F3E0000C20694608705148002110380161564AC6 -:10F3F000012111610BE000BF00BF00BF00BF00BFD3 -:10F4000000BF00BF00BF6A461178491E11706946EF -:10F410000978002902D001690029ECD068460078FB -:10F42000002804D1494834A1203006F0FCFF08BD73 -:10F43000F8B53E4CF034206886083E48B600416876 -:10F44000C906CD0F10218160002727603549344857 -:10F450008860FFF7C4FF35481038076100F020FBD3 -:10F460002660002D02D0334910204860F8BD10B549 -:10F4700006F0BCFE00022449000AC86310BD2349FF -:10F48000022008602A49086070472049022080391C -:10F4900008607047304908707047164810B534301E -:10F4A00005F0D5FD002804D0284813A15A3006F0F5 -:10F4B000BAFF10BD0F4810B5343005F0E0FD10BDA7 -:10F4C00011494860704770B50A4D0446A86AA042C9 -:10F4D00004D31E4808A16B3006F0A5FF0120287355 -:10F4E0001C49002008392C6148601948446000F02C -:10F4F000DEFA70BD7C0E00207372635C68616C5F25 -:10F500007263732E630000000015004080E100E08C -:10F51000C01F004080000010001700405B06000084 -:10F520000040000400F50140408000401011004000 -:10F5300080E200E000130040060102002500030203 -:10F5400005010300001600400010004047020000C3 -:10F5500040850040488100409700002010B5FF48DA -:10F5600002210173C6210161FD4A00215160806AB8 -:10F57000FC49C630486000F09AFA10BD0121FA48F3 -:10F5800089058160F548026B8A430021026301739B -:10F590007047F64801214160C160F1490020486090 -:10F5A000F0494860ED4988627047F149402008629F -:10F5B000F0490A6802430A607047EE480168402239 -:10F5C00091430160EA49002008627047E9480168F8 -:10F5D000102291430160E849012088617047E749A2 -:10F5E0000020C861E34801681022114301607047A0 -:10F5F000E249CA69012A01D000207047DC4A9268BA -:10F600005206520E524202700020C861012070471B -:10F6100070B5D248D24D017B002902D0696801291A -:10F6200009D00024D5490A69012A06D00023807A2E -:10F63000012804D006E00124F4E74023F7E7CA6874 -:10F64000012A04D000221A43012802D004E020221B -:10F65000F9E74B68012B05D000231343C84A022861 -:10F6600002D007E01023F8E71668012E02D1CE6819 -:10F67000012E04D000261E43022802D007E00826EF -:10F68000F9E71268002A02D1CA68012A04D00022D0 -:10F690003243022802D005E00422F9E7002C01D011 -:10F6A000022300E000231343022807D14868012801 -:10F6B00004D16868012801D0012600E00026B14885 -:10F6C0001E4302681206120E02D04A69012A00D0B7 -:10F6D0000022A24C2034227300680006000E02D0E3 -:10F6E0008869012800D000206073A148006A0028C2 -:10F6F00003D000F0A8FA012800D00020A07300F089 -:10F70000C7F9002068603046F3E670B50C00054686 -:10F7100003D19D499D4806F086FEE00706D0012CE6 -:10F7200004D06D209849C00006F07DFE002D0ED05B -:10F7300002218A4801294172C4728E4809D00229E7 -:10F740000AD0924890491A3006F06DFED1E60121A8 -:10F75000EFE70168042201E001680822114301601B -:10F76000C7E670B57D4C0022E37A990701D54107C1 -:10F7700014D47A49DD062031002D05DA4D7B002DA9 -:10F7800002D08D7B002D09D01D0702D50D78002DEC -:10F7900004D15B0703D54978002900D10122637A9F -:10F7A0007449002B06D00225284010430CD0FFF7E7 -:10F7B0003FFE9EE66C4A76489060086880088000AC -:10F7C000086000F06DF994E6012B07D0022B0ED0F3 -:10F7D0006E486D496B3006F026FE8AE60868042202 -:10F7E0009043086000F05CF90120A07281E608688F -:10F7F00008229043086000F053F9A57279E6574952 -:10F8000008757047F8B5554F544D2037FA7B564C64 -:10F810000021286B002A31D00122D203A26090433C -:10F820002A46544D10632E685A4A102090600020DA -:10F8300028601014A060FFF7D2FD00F029F92E60B7 -:10F84000281460605349102048604448817A4A482F -:10F8500001290DD002290ED04C484FA1801F06F07F -:10F86000E2FD0020F8733D48007D022874D0F8BD09 -:10F8700001210160F5E701214160F2E73A4A906019 -:10F880000E462963FFF7C4FE044636482E754168CC -:10F8900069620068A862AA7A022A0AD16A78002AF4 -:10F8A00007D0334B403B5B681B7813402A789A4360 -:10F8B00008D03E70E20708D0084603F04AFD012157 -:10F8C000A86A09E001223A70F4E7A10601D50221F5 -:10F8D00002E0A10702D5002103F04BFD2448403887 -:10F8E00041680622A81C093106F0F2FB002809D164 -:10F8F0001F48297A403840680078C009814201D108 -:10F90000012000E0002078702046FFF72AFF2648FB -:10F91000007800280DD001284AD002285BD00328A7 -:10F9200078D01DA1214806F07EFDA87A022870D06B -:10F93000A3E0A00701D502F0EDFB200702D50120CE -:10F9400002F020FC600702D5002002F01BFCA0069C -:10F95000EBD502F07CFBE8E793E000007C0E002092 -:10F96000408100404085004000F50140008000409B -:10F9700040150040001200400010004000110040FF -:10F980000014004040160040F8F40000630300003B -:10F9900000400004001300407372635C68616C5F98 -:10F9A0007263732E6300000097000020E6040000DD -:10F9B000A00701D504F0BBFF200702D5012004F009 -:10F9C00021FF600702D5002004F01CFFA006ACD583 -:10F9D00004F0A4FEA9E7A007BF27002802DA3C40F4 -:10F9E000F3F702FB200703D53C400120F3F7FBFAB5 -:10F9F000600703D53C400020F3F7F5FAA00602D5D6 -:10FA00003C40F3F7EFFA60068FD5F3F7EEFA8CE798 -:10FA100000E012E0A00701D5F3F7EAFA200702D5CB -:10FA20000120F3F7E4FA600702D50020F3F7DFFACC -:10FA3000A00690D5F3F7DAFA77E7287B00281CD0E8 -:10FA40001F494E6002281FD0012803D01D491E48BF -:10FA500006F0E9FCA96A2869884204D81A481949BD -:10FA6000401C06F0E0FC2969184841600120296B20 -:10FA700080050143296316494860287D012800D08C -:10FA8000F5E6F3F7C5FAF8BD2969A86A4118EBE76E -:10FA900010480021C160016141604161816170478E -:10FAA0000D480021417281720121C17270470A48DC -:10FAB0000121026B89050A430263054841607047D2 -:10FAC0004081004098F90000FB04000040850040A0 -:10FAD00000F50140001100407C0E00202E4800215E -:10FAE00001704170704770B5064614460D460120FE -:10FAF000F1F758FC28490120284B08709E60DC6013 -:10FB00001D6170BDF8B504460120F1F74BFC224998 -:10FB10000120087021494C60214900264E600321D4 -:10FB2000204D0906A960204F002C0AD0012C03D0DB -:10FB30001EA1412006F077FC3E60032000066860AD -:10FB4000F8BD386001200006F9E710B512480178C9 -:10FB500000290ED00321134A0906916010494A6812 -:10FB60000021002A03D0154A1268427000E041705B -:10FB700001700020F1F716FC10BD0748017800293C -:10FB800007D007484068002802D00C480068C0B27F -:10FB900070474078704700009800002000F5004052 -:10FBA00000F1004000F5014000F200407372635C18 -:10FBB00068616C5F63636D2E6300000000F40040B9 -:10FBC0003A4800210170417010218170704770B572 -:10FBD000064614460D460220F1F7E4FB01203349A6 -:10FBE000334A0870E41E14619660556070BD10B50C -:10FBF0000220F1F7D7FB2D49012008702D48002184 -:10FC000001604160816001202B49C005486010BD42 -:10FC100010B5264C2078002811D001202649C005B7 -:10FC2000886000F034F80021002804D001206070C2 -:10FC30002248006801E061701020A070217000204F -:10FC4000F1F7B0FB10BD10B51848017800290BD0B2 -:10FC500018480068002805D000F019F8002800D0E6 -:10FC6000012010BD022010BD407810BD10B50F4816 -:10FC70000178002909D000F00AF8002803D00F48C5 -:10FC80000068C0B210BD102010BD807810BD0948BA -:10FC90000168002905D04168002902D08068002849 -:10FCA00001D0002070470120704700009A0000201A -:10FCB00000F5004000F1004000F5014000F4004074 -:10FCC000FFB593B0044600201D9E049015981C9D1E -:10FCD0001027082806D0E06901F014F8002809D0A0 -:10FCE0003770CCE028880921384328801F980227E4 -:10FCF000017016E0E169012088710521E269C902FD -:10FD00009180E1698872E169F9480881E169002020 -:10FD10008873288820210843288011211F980427F0 -:10FD200001701F980225801C0390307810900A20E3 -:10FD30003070204618301190F6F76BFC00206FE011 -:10FD40001598102809D1022D07D06846828A049997 -:10FD50000398401A8270110AC1706846C08A1699C9 -:10FD6000884203D9E349097A149106E0884204D114 -:10FD70001099002901D0317021E003990870000A20 -:10FD800048701E980088401BC01B83B2FF20C01B18 -:10FD9000984200D203460398149AC0190CA9009205 -:10FDA000019002912020015D6846C08A0022F6F78A -:10FDB000A5FC3070002806D0C0B2832862D0684607 -:10FDC000C08A208345E00F98002805D0C948006804 -:10FDD00000790A2830D33CE06846008EC119C9B2C8 -:10FDE0000491022D0FD01F99049A4978914203D1B2 -:10FDF0006A46128C824209D0BE480491006801789C -:10FE0000032909D027E008461F994870B9480068BF -:10FE10000178042906D008E000790A281BD20120C5 -:10FE20000F9009E06946C98A8180039904980818EF -:10FE300003900498281885B205AA14991198F6F72A -:10FE4000EBFB002805D11E980088401BB84200DB60 -:10FE500076E7022D0ED01598102807D1049A039941 -:10FE60006846808A891A8870000AC8701E980580C2 -:10FE7000002030709F4800680078032802D00020DE -:10FE800017B0F0BD0220FBE7F8B50446406B002632 -:10FE9000134600282BD0491F8DB2618F2A460832A5 -:10FEA000278F8A18BA4221D89A7840185F781102B1 -:10FEB00039430170090A41701A79DF781102394318 -:10FEC0008170090AC1700571290A41712A46591DBC -:10FED000801D06F02AF9608FAD1D401980B2608741 -:10FEE000626B002110180170417000E00926304655 -:10FEF000F8BD30B50B88048F9C4212D9446BE018D2 -:10FF00004478057824022C430BD0447905792402E7 -:10FF10002C436404640CA41D1B190B80106000208A -:10FF200030BD822030BDF7B588B000256846058217 -:10FF300005275DE00398417802780E021643417967 -:10FF4000027908021043000452D40A980123068063 -:10FF500005A802905B02002200970195304609999E -:10FF6000F6F7CCFB04004AD16846018A0183039866 -:10FF70004179027909021143437802781C02144343 -:10FF8000B4421ED10A041CD44B0401215B0C89032A -:10FF900000950B4301970295C17880780A020243CD -:10FFA00020460999F6F7C6F9040011D1039948795A -:10FFB0000A79000210430122D20310430871000A9B -:10FFC000487103AA06A90898FFF793FF0400CED052 -:10FFD0000399009501970295487809780002084333 -:10FFE00069468B8A00220999F6F7A4F9822C06D17A -:10FFF00003AA04A90898FFF77CFF04009AD068467A -:020000040001F9 -:10000000058209E003984179027909021143490404 -:10001000490C0171090A417103AA04A90898FFF764 -:1000200068FF0028EED0822C02D020460BB0F0BD35 -:100030000020FBE730B50446406B002597B0002850 -:100040000DD00B2268460270228F0281606B0391F3 -:10005000019000216846F3F7E2FA6846057065638F -:100060006587258717B030BDF8B50F460546696B23 -:100070000020069E144600290FD0012B0DD13246D8 -:1000800039462846FFF74FFF002806D1002C04D040 -:1000900032463946284600F044FEF8BD0022028070 -:1000A000C262831D0263C3614263428702872030BC -:1000B0000170704710B50022D24302800420FDF782 -:1000C000FEF910BD10B596B00446FFF7B3FF208EC1 -:1000D000002808D0012069460870E06A01900021DC -:1000E0006846F3F79CFA0020E062206316B010BD6A -:1000F00001280000B40E00200146098800200A07EC -:1001000000D501200A06120F01D002221043CA05B1 -:1001100001D5042210438A0501D510221043490558 -:1001200001D5202108437047FFB5A9B00600329DD4 -:10013000359C2B981F46229016D0007841060FD48C -:100140008106890E1E2909D021884A05520E0BD13D -:100150003A88172A08D3FE4A914205D0C10906D031 -:100160008006800E122802D003202DB0F0BD20465C -:100170002C302690F7492A980872002018AA03907C -:1001800010726A46107404AA0A60339A4A6020AA60 -:10019000908090812298007801908106681C1C90C4 -:1001A000701F1D902B98890EC21C2492224620326B -:1001B0001B92083A401C02920B0006F025FA1FFD24 -:1001C000FD11FD1FFD8EFDFCFDFBFDFAFDF9FDFCA3 -:1001D000FDF8FDFDFDF7FDF6FDFDFDFDFDF5FD0066 -:1001E000032E76D102E018A9087219E303202870C3 -:1001F0001C9917220A7000224A70CFE2052EF0D116 -:100200004178027808021043208320A98880249A2C -:100210005178127809021143618300287ED0884208 -:100220007CD800202072E080401E60840298F6F79F -:10023000F0F905202870A81C0190022000901BAA4C -:100240002A990298F6F7E8F9002868D118A8807C66 -:10025000012803D002206870102002E0012068709D -:1002600002202490002225A91CA8F2F746FD0028B0 -:100270002BD120A8007D2499814226D13A8800996B -:10028000801C511A814220DB10A8C18D0198017099 -:10029000090A417001991CA8891C01910099019AD1 -:1002A000891C009125A9F2F728FD20A8007D01995D -:1002B0001BAA091801910099081880B200902A9988 -:1002C0000298F6F7A9F90028CCD00098022826D089 -:1002D00064E272E018A9087261E2072E6DD34178DA -:1002E0000346027808021043208320A98880249ABC -:1002F0005178127809021143618300280ED0884298 -:100300000CD8012020725879197900020843E08046 -:1003100000202073E06900F0F5FC01E098E0A9E01E -:1003200000280ED1E169012088710521E269C90226 -:100330009180E1698872E16987480881E16900205C -:100340008873F01F60842298C01D60620298F6F7DF -:1003500060F907202870681C00900120019000209F -:1003600010A9C8852FE00198012814D0E069807990 -:10037000012830D000981E38417F007F09020143D8 -:1003800000980170090A41700098801C0090019843 -:10039000801C80B2019010A8C18D00980170090ADC -:1003A00041700098801C09E00AE296E13BE1DFE041 -:1003B00004E29BE077E036E016E2AFE000900198BF -:1003C000801C80B201901BAA2A990298F6F724F9A2 -:1003D000002803D007E010A8818DD1E73988019863 -:1003E000081A0428BFDA0198012843D0E06980790F -:1003F000012804D010A8818D5548814206D110A84B -:10040000818D00980170090A417009E000981E383A -:10041000417F027F0802009910430870000A48706B -:100420000198801CBAE1072E01D0152E76D14178B3 -:10043000027808021043208320A98880249A5178EA -:100440001278090211436183002801D0884201D942 -:1004500001203FE7012020720020E0802073052E5C -:100460000AD01D982299E269C0B2491DF2F71FFC1B -:10047000002801D00A202DE70020C04360841AA87C -:10048000019023A9229802970395009100780023F8 -:100490008206920E20462A99FFF712FC0390208BC9 -:1004A00020A988807BE1032EC0D1402220A98A8127 -:1004B0004178027808021043208320A988802A9975 -:1004C0001EAB1C9A02930192009139880022491EAA -:1004D0008BB21B990978F6F711F918A90872002850 -:1004E00033D10B20287010A8008F3FE0052E9DD13E -:1004F000802220A98A814178027808021043208353 -:10050000249984464A78097812020A43628420A911 -:1005100088801248824202D30720DBE6AFE03F200A -:100520008002024362842A981FAB1C9902930191B6 -:1005300000903888401E83B21B9801786046F6F719 -:10054000DDF818A9087200280CD08328AAD107E08A -:10055000FFFF0000B40E002001280000010200008F -:100560000220B8E00D20287010A8808F401C15E1F3 -:1005700001990C22C9095143C91CB14204D90198FF -:1005800040067CD5002009E1427803781002184328 -:1005900020AA9080844622980078400609D505203C -:1005A0006A46107422980078C00905D000201074A3 -:1005B0001DE106206A46107424981F902A9A009024 -:1005C0000023701A029383B21E9001921B9800229E -:1005D00001786046F5F7AEFE18A908720022694658 -:1005E0000A74832801D102200390229800784006E3 -:1005F0000DD52088C00506D520A9208B8988884282 -:1006000001D100206062002018A90872C6E0FF2115 -:10061000013120A88181808820831E9860841F98E2 -:1006200060621320B8E0052E29D3417802780802D1 -:10063000104320A98880218F002902D0FE4A9142D0 -:1006400006D10A216A4611740121C943218702E0BB -:1006500007216A46117422992A9A491D0192009134 -:1006600001221D990023D203029311438BB22499D6 -:100670004A78097812020A431B99097800E0C9E018 -:10068000F5F758FE18A90872002269460A7401227B -:10069000520220A98A81832808D0002809D0218FFE -:1006A000E54881427ED10020208778E08888208339 -:1006B0004DE7606B002808D031462046229AFFF7AC -:1006C000E3FB18A90872002869D12B463A46304648 -:1006D000229900F056FB039061E02298022E4078A8 -:1006E00001907DD1002801D0012879D108206946E8 -:1006F00008740198087521A800901B9800220178C1 -:100700002046019BFFF7B0FC6946002248758A75B8 -:10071000002802D10198012809D0208F002806D096 -:10072000002008740120800220A988810EE004A81E -:100730003399F2F774FF0390002069460874012092 -:10074000800220A988810398022807D0BB4800684E -:100750008079002805D018A908722BE00198208321 -:100760001DE00398002803D0812018A9087240E0FA -:1007700021A800901B98012201782046019BFFF7D9 -:1007800073FC18A9087220463499FFF753FC18A986 -:10079000087A002803D11920287001203880684683 -:1007A000007C00E03CE0002804D004A83399F2F774 -:1007B00036FF0390039800282ED01AE0062012E599 -:1007C0002078000713D5012E11D109216846017444 -:1007D000A188818204203499FCF771FE082100E091 -:1007E00005E020A88181CDE60198400612D50320BE -:1007F000039020A9208889890843208020A988891E -:100800004005400E04D026992B98086026988680D3 -:100810000398AAE40420E6E418A8007A00280ED081 -:100820000120287022980078687020A88088A8701D -:10083000000AE87018A8007A28710520388020A9DD -:100840002088898988432080E2E7FFB50746A1B068 -:1008500000201C903A7801209040794A7C68104032 -:1008600010AA1087744B22885B1C9A4203D0002880 -:1008700004D0100702D5012025B0F0BD249E002031 -:10088000307023980025028810A8028518A80575E5 -:100890006A4B68461972057404A8186020462C300B -:1008A0001B902A985860249E94463878721C052123 -:1008B000039201282DD0022808D003287DD130785A -:1008C000800980011D303070B889A08038780228F6 -:1008D00004D13078800980011B303070F01C1FAAD1 -:1008E00001900292009110A8008D0022C01E83B2D8 -:1008F0002020015DB889F5F701FF0028DED10398BB -:10090000B9890170090A417010A9888FC01C088537 -:1009100028E1787B18AA10753A7B012A02D0022AB6 -:10092000CCD1FCE022887F231B011A4010AB1A8730 -:10093000802A4AD006DC102A10D0202A0ED0402A65 -:100940000AD124E0FF3A013A65D0FF3A013A79D062 -:10095000FF3AFF3A022A76D00525A2E02078C006A9 -:1009600001D5082000E010201C9004206A46107475 -:10097000002090821AA81DAA1EAB03960192029035 -:1009800000933B8A20461C9AFFF79AF984E0228B59 -:100990003B8A9646934268D10A221C92002839D19C -:1009A000039801906046401E1FAA83B20292202045 -:1009B0000091015D0022704600E0BAE0F5F79EFE6E -:1009C000014618A801750B201AE0228B3B8A964637 -:1009D00093424AD10C221C92002862D103980190C4 -:1009E00060461FAA401E0292009183B22020015D42 -:1009F000628C7046F5F782FE014618A801750D203D -:100A0000307010A8818F491C01850421684601744B -:100A1000218B818245E0238B3A8A9C469A4224D1DD -:100A200012221C9200283CD1606A002813D00022B8 -:100A30006B4607C3638C07E0FEFF0000B40E002086 -:100A400009F800000DE04BE02020015D6046F5F75D -:100A500071FC18A9087513203070012010A90885B1 -:100A60001FE0398A228B914201D00425B6E016217D -:100A70001C91002815D11B98818802682046FFF739 -:100A800003FA18A9087500280BD11B983346016892 -:100A900080881AAA00F075F9054602281BD0042D9B -:100AA00019D01B988088002811D06846007C002847 -:100AB00004D004A82A99F2F7B2FD05460120694640 -:100AC00008741B981B990068059000208880002DF1 -:100AD00048D0052D2ED06846007C032878D07DE0D4 -:100AE00018211C91002806D0388A20832046B96836 -:100AF000FFF7A0FAD5E72046183000902020015DCE -:100B0000237E01222046FFF7AFFA18A908750028B6 -:100B1000ECD119203070012010A90885E6E7208863 -:100B200001214902084010A90887FF38FF38022830 -:100B300006D0052510A92088098F884320804DE024 -:100B4000208F9849884290D116201C90386900283F -:100B500005D06063B88A20870020608702E000200B -:100B6000C043208710A8008F7F21090102468A43D5 -:100B70000DD0782300220420B968FCF7FBFB3878FD -:100B8000A07010A92088098F0843208002E02188E6 -:100B9000814321806846007C002805D08248416856 -:100BA00004A8F2F73CFD054618A8007D002815D0E2 -:100BB0001C98707001203070208BB070000AF070AB -:100BC00018A8007D3071052110A8018506E0FFE717 -:100BD0007548416804A8F2F722FD05467248017A7B -:100BE00020884005400E22D11B98808800281ED006 -:100BF000239A0026138810AA1385249A2A9B6F46ED -:100C00004CC71B9A039412681AABFFF78DFA05467E -:100C100002280CD00120694608741B982A990068A4 -:100C2000059004A8F2F7FBFC05461B98868010A8E7 -:100C3000018D2398018028461EE600B597B0042850 -:100C400007D102206A461070019100216846F2F730 -:100C5000E6FC17B000BD10B5534C037800222168A4 -:100C6000012B02D0022B42D126E00B78002B01D0C1 -:100C7000042B03D10A712268032111702168838833 -:100C80000A79D200921D8B5221680A79D20008326B -:100C90008918C2880A80216803890A79D2000A3239 -:100CA0008B52428920680179C9000C314252216877 -:100CB0000879401C08711EE00A7482888A802168C5 -:100CC000C288CA80226801891181226841895181C4 -:100CD000C1682068C1606168F2F7A1FC0146022882 -:100CE00007D02068007C002802D1002903D0812091 -:100CF00010BD832010BD002010BD406B002800D027 -:100D0000012070478178012909D100880521C90295 -:100D1000884202D0491C884201D10020704705203A -:100D20007047F7B586B00024684615460F468481A3 -:100D300005261AE0049841780278090211432980B7 -:100D4000811D019602940091417902790B021343AF -:100D5000C178827809020A43417800780902084381 -:100D60003946F5F7E7FA002806D104AA03A9069840 -:100D7000FFF7BFF80028DDD0822800D1002009B09D -:100D8000F0BD10B51488844201D2052010BD17248F -:100D90001C701080421E581C491C05F0C6F900202A -:100DA00010BD0000FEFF0000B40E002010B540484A -:100DB00004F04DF9002801D00C2010BDFF211131A5 -:100DC0003C4805F011FA3B4901200870002048809A -:100DD000E03188718874887520310871344804F0D6 -:100DE0004EF9002010BD10B5314804F028F9002854 -:100DF00003D031A1312005F016FBFFF7D7FF002803 -:100E000003D02DA1382005F00EFB10BD10B504460F -:100E1000274804F01CF9002801D00C2010BD2549FA -:100E20000878002807D0002008702148216004F0CD -:100E300026F9002010BD1E4804F021F91F2010BD26 -:100E400070B505460C461A4804F001F9002801D097 -:100E50000C2070BD174A5088A84202D11078002893 -:100E600004D0134804F00BF9122070BD1048226022 -:100E700004F005F9002070BD10B504460C4804F0DC -:100E8000E6F8002801D00C2010BD0A48017800299E -:100E900007D00020C0432080054804F0F0F812205D -:100EA00010BD40882080024804F0E9F8002010BD01 -:100EB0009D000020C00E00207372635C6C6C5F6448 -:100EC000622E630010B5282105F08CF910BD70B5B5 -:100ED000054600780A0700090001120F1043287028 -:100EE0000B0005F091FB07050705070509050B0039 -:100EF000062408E00C2406E0222404E00024F2A1E9 -:100F0000572005F090FA68788009800120436870C6 -:100F100070BD00780007000F704710B50622C01C96 -:100F200005F003F910BD10B50622093005F0FDF8F3 -:100F300010BD0278BF23C9071A40490E0A43027048 -:100F4000704702785206520EC9010A430270704778 -:100F500070B515460E4604461F2A03D9DAA1A8200B -:100F600005F061FA20462A463146093005F0DDF8E1 -:100F70006078AD1D80098001A906890E0843607064 -:100F800070BD70B515460E4604461F2A03D9CEA182 -:100F9000CC2005F048FA20462A463146093005F0B3 -:100FA000C4F86078AD1D80098001A906890E084348 -:100FB000607070BD70B501780907090F03292ED044 -:100FC000052931D1411C827E0C46437E1102194312 -:100FD000037FC27D1D02037EC67E1B021343827DFA -:100FE000407835438006800E22281DD106291BD368 -:100FF0001920C001814217D8FF26F436B54213D814 -:10100000002A11D0082A0FD88A420DD28B420BD861 -:10101000617F227F09021143814207D904E04078B1 -:101020008006800E0C2801D0002070BD012070BD0C -:1010300000210A464254491C2229FBDB704710B5A7 -:1010400002788B07920892009B0F1A430270427835 -:10105000520952014270012908D0022906D0032901 -:1010600005D0FF2098A1EE3005F0DDF910BD01217B -:101070000A43427010BD10B502788B0792089200A7 -:101080009B0F1A43027042785209520142700129A3 -:1010900007D0022905D0032904D08BA18E4805F082 -:1010A000C2F910BD01210A43427010BD00788007CB -:1010B000800F70470278EF23C9071A40C90E0A4310 -:1010C0000270704770B50546C1700B0005F09CFAC0 -:1010D0000E080A0C0E1012120C14141212160C1810 -:1010E0000C2413E0082411E002240FE017240DE083 -:1010F0000D240BE0012409E0092407E0062405E0A3 -:101100007548002470A1A03005F08DF96878400979 -:1011100040012043687070BDC0787047017AC27981 -:10112000080210437047817A427A080210437047E0 -:10113000017BC27A08021043704781794279080224 -:101140001043704700797047817B427B080210434F -:10115000704770B5017AC37909021943431C857A37 -:101160001C46467A2B023343657926792C02344398 -:10117000C21C5A4E00798D1FB54214D8FF25F43594 -:10118000AB4210D800280ED008280CD888420AD2CA -:101190008C4208D8507A117A00020843B11D884267 -:1011A00001D8012070BD002070BD0B4610B5011D97 -:1011B0000522184604F0B9FF10BD817A427A080270 -:1011C0001043704701717047007970470B4610B5A6 -:1011D000011D0822184604F0A8FF10BD027B0A700A -:1011E000407B487070470B46014610B508220E310F -:1011F000184604F09AFF10BD0B46014610B50422B4 -:101200001631184604F091FF10BD10B50822001DDC -:1012100004F08BFF10BD10B504220C3004F085FFE4 -:1012200010BD017170474171090A81717047C17128 -:10123000090A017270470079704781794279080282 -:1012400010437047017AC279080210437047017158 -:101250007047017170470B4610B5011D08221846F2 -:1012600004F063FF10BD10B50822001D04F05DFFFF -:1012700010BD70B515460E4604461B2A03D912A1AF -:10128000174805F0D0F82A463146E01C04F04DFF1F -:101290006078E90640094001C90E0843607070BDDE -:1012A00070B5054640780E46C406E40E1B2C04D9E2 -:1012B0000B4805A10C3005F0B6F82246E91C304673 -:1012C00004F033FF204670BD7372635C756C5F7011 -:1012D00064752E6300000000070200007A0C000015 -:1012E000F7030000C1074008C207C90FD20F511809 -:1012F0004008C207D20F51184008C207D20F511838 -:101300004008C207D20F51184208D007C00F40183A -:101310005208D107C90F0918500840187047002219 -:1013200002808271C271C2720273427382738270D0 -:10133000C270027142714276828303464284203336 -:101340009A7102859A72C2750276C2730274DA7259 -:101350001A739A7319750284FF21603081709A752F -:10136000704770B504460020A083208C1E46484379 -:101370001546114604F061FF2084F000294604F070 -:101380004EFF401C80B20146192269439202E0835D -:10139000914201DD401EE0837D202946000204F0D9 -:1013A0003EFF401CA08470BD70B50546087B0E460C -:1013B000C006C00E08730020A87504463019007AD4 -:1013C000FFF790FF29194874A97D641C0818E4B23E -:1013D000A875052CF2D3C0B2252803D979A18A209B -:1013E00005F021F870BDF8B5044630302646274692 -:1013F0002546C036A03780350090032909D0002942 -:101400001AD0012924D0022902D1A11CFFF7CCFF58 -:10141000F8BD1146FFF783FF002028836883A88367 -:10142000E883288468847871E88538732621085514 -:10143000A08430703071F8BD0020E885B871A188B3 -:1014400023890A460098FFF78CFFA11C0098DDE76E -:101450000020E885B38A328AA1880098FFF781FFCF -:10146000F8BD70B5867D0D460446002E01D0252EB0 -:1014700001D9122070BD002A18D0287EE17D50438A -:101480000818252104F0CBFE0846E1754207520FEB -:10149000C908504B69189A5C097A8A4368D031466A -:1014A00004F0BDFE491CCAB2002007E0002070BD58 -:1014B000002803D02118097C511ACAB22118497C8E -:1014C00091423AD32918097AC943CB07DB17D21ABC -:1014D000521E1206120E35D08B07DB17D21A521E7F -:1014E0001206120E30D04B07DB17D21A521E12060C -:1014F000120E2CD00B07DB17D21A521E1206120E38 -:1015000028D0CB06DB17D21A521E1206120E24D098 -:101510008B06DB17D21A521E1206120E20D04B0673 -:10152000DB17D21A521E1206120E1CD00906C9175A -:10153000511A491E0A06120E18D0401C0528B7DBA6 -:101540001F2070BDC00013E0C000401C10E0C000B0 -:10155000801C0DE0C000C01C0AE0C000001D07E0B8 -:10156000C000401D04E0C000801D01E0C000C01D9F -:1015700020769BE738B505460C466846FEF738F8F6 -:1015800000281ED0694600200856207209216156A5 -:101590000022411A00D5494220356B798B420FDC7D -:1015A000FF2B0DD0A17A491CC9B2A172AB79994227 -:1015B00002D8617A7F2903D160720020A0720122D3 -:1015C000104638BD7372635C6C6C5F7574696C2E09 -:1015D000630000007667010010B5040004D0FF200E -:1015E000FAA1AB3004F01FFFFB4821464143FB4802 -:1015F000FF230918FF330022581C5A544254C81DB7 -:10160000FF30FA3002704270F448001FC378A342E2 -:1016100002D18270FF23C370EF48EF4BC01E081841 -:101620009B1EC91802700A7010BD70B5EB480026E9 -:10163000001F8670FF24C47035462846FFF7CCFF94 -:101640006D1C2D062D0EF8D00020E4490B229201CE -:10165000E14B43435B189B181E74401C0006000EB0 -:10166000F6D0DF48FFF7E4FC0021DD48FFF722FD5C -:101670000121DB48FFF7E3FCDA4804704470847012 -:10168000C4700471447170BDCFE71B20704730B542 -:101690000021D24A0B239B01CF4C4C43A418E418E1 -:1016A000247C002C05D0491C0906090EF4D000202A -:1016B00030BDC94C01254C43A218D21815740170D5 -:1016C000284630BD10B5044600F0D0F900280CD0F3 -:1016D0002046FFF781FFC0490B224C43BF49002041 -:1016E0006118920189180874012010BD10B50446D4 -:1016F00000F0BCF9002802D0BA484471012010BDA6 -:10170000034610B5B748B44940794843B349421835 -:101710001046FF30E130C17F807F04F0D5FF10BD5F -:1017200010B5B048AC4940790F224843AB49401846 -:10173000A949D239095CFF30FF3004F09FFF10BD8A -:1017400010B5044600F092F9002802D0A5480471B3 -:10175000012010BD034610B5A2489F4900794843B7 -:101760009E4942181046FF30E130C17F807F04F06F -:1017700098FF10BD70B59B4C97492079974D484311 -:101780004019C11DFF31F931FF30E130807F0F2258 -:1017900004F064FF002813D020798F494843401992 -:1017A000FF30FF3002300178491C01700178407829 -:1017B000814204D1884885A1773804F034FE0120A5 -:1017C00070BD884884490079484384494018FF30F7 -:1017D000E130C17F807F814201D10120704700202C -:1017E000704770B57F487C49007948437B49401871 -:1017F000FF30E130867FC57F0F242946304604F054 -:1018000026FF002801D0204670BD70066906400EF4 -:10181000490E884201D3401A01E0081A201AC0B2CA -:1018200070BD0F20704770B50C46054600F01EF9DC -:1018300000280ED0002020706748454367482818CC -:10184000FF30FF300230017842788A1A22704170EE -:10185000012070BD70B50C46054600F007F9002860 -:101860000BD05D4845435D482818FF30FF300230FB -:1018700001784078081A2070012070BD5849016035 -:10188000704710B5044600F0F1F8002802D0554822 -:101890000470012010BD5149091FCA78FF2A02D0E7 -:1018A0000021016007E08A784C492439012A02D0DE -:1018B000016001207047002070474848801E017871 -:1018C000012908D001210170464801784348001FD2 -:1018D000C170012070470020704710B5044600F029 -:1018E000C5F8002802D03F484470012010BD3B4994 -:1018F0003C4B091FCA785B789A4206D18A78203916 -:10190000002A02D001600120704700207047334850 -:10191000344A001FC1785278914209D1FF21C17029 -:10192000801C0178002903D000210170012070473C -:101930000020704729482B4A001FC17852789142F5 -:1019400004D18078002801D0002070470120704722 -:1019500010B5044600F08AF8002802D02148C4706F -:10196000012010BD034610B51E481B49C0784843EE -:101970001A494018C21DFF320B21FC328901401860 -:10198000C17B807B04F0A0FE10BD10B51548124944 -:10199000C0784843114940180B2189014118C97B7F -:1019A0000D4AD21E8018062204F068FE10BD0D48B4 -:1019B0000949C0784843094941180B20800108189B -:1019C000C17B807B81420FD1012070477372635CC1 -:1019D000646D5F712E630000D1020000F40F0020DF -:1019E000C51200209E0000200020EEE710B504463E -:1019F00000F03CF8002802D021488470012010BD7E -:101A0000034610B51E481F49807848431E494018B8 -:101A1000C21DFF320B21FC3289014018C17B807B43 -:101A200004F03FFE10BD10B51548164980780B2212 -:101A300048431549920140181249891E41188018DF -:101A4000807B062204F00AFE10BD0D480D49807807 -:101A500048430D4941180B2080010818C17B807B49 -:101A6000814201D10120B0E70020AEE7002805D176 -:101A70000648007C002801D00120A6E70020A4E74A -:101A80009E000020D1020000F40F0020B4120020BC -:101A9000F8B5FF4E0446B079002500280AD0002989 -:101AA0002DD1657010202070F079A070307AE07030 -:101AB000B57124E0F64F203F387A012804D0707ABF -:101AC000012810D00020F8BD002918D1657013201E -:101AD000EF4920701C221639A01C04F026FB0120BF -:101AE000A0713D720BE0002909D165701420E8490E -:101AF000207008220A31A01C04F017FB7572012027 -:101B0000F8BDF8B5E3480178002902D00C2630462C -:101B1000F8BD0026DE4D3446403D2E756E75EE75DF -:101B20002E76AE75294620396E730F464E734037B8 -:101B30007E717F218170687E002804D0FDF73DFD15 -:101B4000FEF766F86C763C72D14884711430FFF76A -:101B5000B9F9CF483C30FFF7B5F9D8E710B5CD4B10 -:101B600000221A70CA4B203B1A711A46603A11665D -:101B7000D065FFF7C6FF002804D0FF20C6A187303C -:101B800004F051FC10BDC2484038007D7047C04988 -:101B900010B54039C87B897B42078307D20FDB0F22 -:101BA000D218C007C00F101840000B0004F02CFD25 -:101BB000050B060B04080F00BB4906E0BB4810BD2F -:101BC000B949083101E0B8490839085A10BDFF2069 -:101BD000B1A1A73004F027FC002010BDAC48B449E7 -:101BE0004038008A48437047F8B5A94C0646407B08 -:101BF000403CE07337791346A773012F26D0308815 -:101C00002082A348B27B203882710546603D29704E -:101C100006221946681C04F088FAB0796873062217 -:101C2000F11DE81D04F081FA607B0126002800D038 -:101C3000667597486038407B002800D0A6753B0049 -:101C400004F0E2FC0506082549084B000020D7E710 -:101C500000211DE08E4801211430FFF738F98C482F -:101C6000E91D1430FFF75FF9687B002807D00128D1 -:101C700007D0FF2088A1EE3004F0D5FB0CE0002156 -:101C800000E0012182481430FFF75BF904E00621EF -:101C90007F481430FFF71BF90020E07520767C4860 -:101CA000691C1430FFF739F9794829781430FFF7A7 -:101CB00040F9774804213C30FFF709F97448691C62 -:101CC0003C30FFF72AF9724829783C30FFF731F9A8 -:101CD00026750020F8BD0221DAE7FF206EA1F8305A -:101CE000CAE770B56A4C0125403C0346257620467C -:101CF0002030007A002801D03A2070BD64480022CC -:101D0000803806789E4206D1E2750622401C04F017 -:101D10000CFAE57500E02276002070BD70B504462F -:101D20005B4D0020403DA87528462246323804F01D -:101D3000FCF92846203844730120A87570BD544929 -:101D400020390871704710B5514C0022403C627533 -:101D5000607302462046123804F0E7F901206075EE -:101D600010BD4B49203948717047F8B500F0A4FB0D -:101D7000474C0025403C607E002804D0FDF71DFC48 -:101D8000FDF746FF6576434F3D70FDF793FBA07B63 -:101D9000012804D00021084601F0A6FAF8BD002170 -:101DA000022001F0A1FA3A4C203C207A002809D008 -:101DB000374881790029F1D11321C17105720121C0 -:101DC0008171F8BD78780028FBD0314E0622803E24 -:101DD000707BE0733078A0753046F11D703004F0F0 -:101DE000A4F930460622711C773004F09EF93C209D -:101DF000A072012020727D70F8BD10B5244C403CCB -:101E0000E17BA07CCA0701D0C2070BD08A070FD59F -:101E100082070DD42620FDF777FAA07C0221084323 -:101E2000A07410BD2520FDF76FFAA07C0121F6E714 -:101E30004907F6D54007F4D42720FDF765FAA07CC2 -:101E40000421ECE770B5134E3078002872D1104CA5 -:101E5000403C207D00286DD0FDF71FFB0025A574B8 -:101E6000E57475702846FDF715FB0020FDF78CF929 -:101E70000D480D38FDF73FFA0B481038FDF7F7FA1B -:101E8000FDF76CFBFFF7B9FFFDF7FFFA012111E049 -:101E900068130020A40000207372635C6C6C5F61A7 -:101EA00064762E63000000008E6701009A8913009B -:101EB000710200000020FDF743FA0F210520FDF715 -:101EC000C1F92646403E3178701CFDF7ADF9A07B84 -:101ED00001280CD004280AD0607D002807D02146B4 -:101EE00012390846627B6630FFF732F86575A07DCF -:101EF000002807D0FE480146427B12399C30FFF78C -:101F000040F8A575306E0178002903D00178001DD6 -:101F1000FDF7C8F9F06D0178002906D0F44A401C9D -:101F2000C732FDF754FE01206076FDF7C3FA0020AA -:101F300070BDFFE70C20FBE7EE494860704770B5C5 -:101F4000050001D0FFF759FFE94C2034E07C002860 -:101F50000AD0A07B012804D19920E749C00004F0F1 -:101F600062FAFFF702FFE3E7002D0DD00221002007 -:101F7000FDF7E6F9DE4840300079032801D001285A -:101F800002D10220FDF73BFCE07D002600280DD0A9 -:101F9000D74D203D2846691C9430FEF7BEFF2846E9 -:101FA000691CBC30FEF7B9FFE6752676D048743060 -:101FB000FDF786FAA07B030004F026FB0504040469 -:101FC0000D04090001210846FDF79FFB03E0CA4903 -:101FD000CA4804F028FAE17BA07C81430120002953 -:101FE00003D1A17B012903D0E074C24908709FE7A7 -:101FF000A674FAE710B5FDF750FABE48007800283D -:1020000018D1BB482030007D002813D00020FFF7F6 -:1020100096FFB74840300079002809D001280FD03A -:10202000022805D003280BD0B349B54804F0FBF9CA -:10203000002010BD00F040FAFDF73CFA0C2010BD66 -:10204000F0F7E6FFF4E7AB49012048707047F8B5B8 -:10205000002400F0E0FF002824D0FF202D30FDF701 -:102060006CF9A44D2878A24F403701281DD00228D2 -:1020700001D0032834D0A2489F496B3004F0D3F933 -:10208000287800280DD0387900280AD0012808D0F7 -:10209000022838D0032836D099489749803004F078 -:1020A000C2F9F8BDFFF761FEF8BD914E2036B07B56 -:1020B000032815D0707E002803D0FDF798FDFDF7AA -:1020C00074FA8B48C430FDF7FBF9B07B012812D0BD -:1020D000042810D0B879012806D0032804D004E0E1 -:1020E0000120FFF72CFFCBE7102421460E200143EF -:1020F0000020FDF70AFB7879012801D1FDF76FFA7E -:1021000002202870BCE728780228CDD10120FDF7F5 -:1021100076FBF8BD70B5764840304079012801D192 -:1021200000F0D4F9724C2034607E002803D0FDF713 -:1021300044FAFDF76DFD00F06EFF00280CD06D4DE8 -:102140002878022804D06E486B49A33004F06BF95C -:10215000A07B012803D006E0FFF707FEE8E6992000 -:102160008000FDF7EAF80120FFF7E9FE2878002853 -:10217000F4D028780128F1D039205F49000104F01B -:1021800052F9D5E6F0B5074689B000200690FDF774 -:10219000AEF800900020019056480078022804D044 -:1021A00057485549F03004F03EF9514D40356879B3 -:1021B000012801D100F08AF94D48C430FEF7A9FE8C -:1021C0004B4E04462036002F70D03046A430FEF728 -:1021D000F1FE0028F8D0FDF731F80028F4D0707E29 -:1021E00000280AD005277F1EFFB2FDF72CFD02282C -:1021F0000FD0012800D0002001903D492046C43175 -:102200000C46643C030004F0FFF906A4A4A40CA44B -:1022100056A4002FE7D177203AA1C00004F003F9BB -:10222000E9E7B07B012841D004283FD0019A00980B -:10223000104304D1A879002801D0022836D168794A -:1022400001281DD1607A00281AD101206072087817 -:1022500006224006C00FA0722548C91C6B3003F04F -:1022600064FF244C224FA07871377F2804D1A92025 -:1022700024A1C00004F0D7F8A07838707F20A070A7 -:102280001B489C30FDF71CF91A480321017028797E -:10229000002860D001280AD002285CD0032806D08C -:1022A000164818A1E03804F0BEF854E051E00120CF -:1022B000FDF7A5FA4FE00E480F462038C978C079DF -:1022C000814230D10A4839792038027A91422AD1A4 -:1022D0007979427A914226D1B979827A914222D192 -:1022E000F979C27A91421ED1397A027B914211E08A -:1022F00008130020A4000020981E0100F60400002E -:10230000DE0200007372635C6C6C5F6164762E6346 -:102310000000000007D13978407B4906C90F81428F -:1023200001D1012100E00021B07B012801D0042867 -:1023300001D100290AD100280BD101990098084346 -:1023400004D1A879002801D0012802D1307E0028CC -:102350001FD001200690707E002803D0FDF72DF9D4 -:10236000FDF756FC0698002802D00120FFF7E7FD94 -:102370005D48017800290AD00178012907D000784A -:10238000032804D095205949C00004F04CF809B046 -:10239000F0BD55480422406855490F3003F0C5FE92 -:1023A000387806224006C10F4F4840680177F91C73 -:1023B0001D3003F0BAFE4C484D4940680322091D08 -:1023C000133003F0B2FE4848494A4068B97D817530 -:1023D0000F3A117ED37D09021943018311468B7E8A -:1023E0004F7E1B023B438380137FD77E1A023A4302 -:1023F000C2808A7F4B7F1102194301813C4905222B -:1024000010310A3003F091FE3948374A1130017912 -:102410005768C906C90EB97600794009F876287A56 -:10242000002809D0A07900283AD11320E0710020BB -:1024300020720120A07133E00020A8727888B08556 -:10244000387FE8732A48394606221D31833803F065 -:102450006CFE27490622F3390878A87508467730BC -:10246000491C03F062FEB888F087F888208038891C -:102470006080F87E20710198002860790BD00121DE -:1024800008436071FDF7F2FB61794000C907C90F8D -:102490000143617102E04008400060710120287230 -:1024A000114C0020207000F007F8FDF703F8012020 -:1024B000616800F019FF4EE710B5FDF76AF8FDF707 -:1024C0005DF8FCF7B5FFFCF7DAFF10BD064810B564 -:1024D000801CFDF78DF8002802D103497F20887009 -:1024E000FDF774F810BD0000A400002004230100D3 -:1024F000DB1300208107C90E002808DA0007000F4F -:1025000008388008F74A80008018C06904E0800815 -:10251000F54A800080180068C8400006800F7047A8 -:1025200010B500F03BFF10BD70B5F04C0546626879 -:10253000002908D0002A04D0FF20EDA10C3003F0C0 -:1025400072FF656070BD002A04D1FF20E8A112303F -:1025500003F069FF0020606070BDE948C07E7047ED -:10256000E7482830C07E704738B5E04C20680168E5 -:102570004978012925D001216846FAF7C9FC684647 -:102580000078E049000203F04AFE2068426AC06811 -:1025900012685118FBF7ADFC2168C860D84A206862 -:1025A00028320321904218D0028B002A15D0012234 -:1025B0004272017200210171021D017F00F0FBFED9 -:1025C00038BD7D21C068C900FBF793FC2168C86055 -:1025D000FFF7DDFA21680861E0E7028B521C0283F5 -:1025E0004172E6E7FFB5C64E85B0706A346805688B -:1025F00060680190306A0390298E0798401A80B273 -:1026000002900898002804D02746383720464830E2 -:1026100002E0371D2846A830009003203871059845 -:10262000002820D001287DD002285ED003287AD04F -:10263000AFA1B54803F0F7FE0898002807D0387915 -:10264000032804D0B048AAA1093003F0ECFEA16A27 -:102650007069FBF74EFCB860616A206A88427DD9D8 -:10266000009801601FE1306A002804D1A648A0A1AB -:102670007A3803F0D8FEA449288B373948434018EC -:10268000069900F0A6FEA0619F49A8883739484303 -:10269000069900F09EFEE061316A9B48891CA162A8 -:1026A0002A8B37384243A069974B121AE63BD2185F -:1026B0005118A162944BAA7D373B5A4340008018C1 -:1026C000FF30193020626062306A081AED21FF384D -:1026D000C90015388842AFD28C49884204D28A4852 -:1026E00083A15D3803F09FFEB6E0874A288B373A16 -:1026F000E16850430818069900F06BFEA06182491A -:10270000A88837394843069900F063FEE061306AD3 -:10271000002804D17C4876A1553803F084FEAE2011 -:10272000405B01E02CE05AE00028288B784AE16801 -:102730001DD050430818A169401AA0622169A06801 -:10274000734A4843A1694018A97D4000514340188D -:10275000FF3017302062A888504300E0A1E0E16913 -:10276000411A6F20C000081A6062A06A34E050432A -:102770000818A169401A3168D63849684018DCE762 -:10278000284680300190C08D002802D0306A002891 -:1027900004D15F4856A1401F03F045FEA8885C495C -:1027A000E3694843C01AA06201999C46CA8D216919 -:1027B000A368521A4B43A169591863465343C91879 -:1027C000AA7D534B49005A438918FF3117312162C2 -:1027D0006F21C900411A6162316A401A35E00898D8 -:1027E000002803D03420005D002878D1A88848490B -:1027F0004843E169401A02994843A0622846803064 -:102800000490C08D0028019829D0002804D03E48AB -:1028100037A1163803F007FE04983D4AC18D02988F -:102820000818E16948434000FF3017302062A8884B -:102830005043411A6F20C000081A606200F0AEFDDC -:1028400000281CD0A16A0398081AED21FF38C9009E -:102850005538884200D3EFE601203871ECE60028B5 -:1028600002D00398002804D1294821A11A3003F08E -:10287000DAFD0198A16AD6380818A062CCE7FBF708 -:102880009EF8726901461046FCF7BFFAA16A081A61 -:10289000ED21FF38C90050388842DCD2012009B050 -:1028A000F0BD0099086000981A4900688035081842 -:1028B000F860298B0798081A00B2002804DD0598F3 -:1028C000022801D0032000E00120787108983870B8 -:1028D0000898002820D03420005D00281CD0022059 -:1028E000DDE7000000ED00E000E400E0B4000020BF -:1028F0007372635C6C6C5F6C6D2E73302E630000C2 -:10290000F413002010270000190500002902000020 -:10291000E20400004B1700000898012148402034D1 -:102920006075317F3A46304600F045FD0020B6E73D -:1029300010B5FE4900280A68516A096807D0126874 -:102940008988FB4BD2695943891A03F068FC10BD92 -:10295000F8B5F64F38680468416A26460D68203697 -:10296000717D00290AD0618E2A8E914206D1407A6B -:10297000012803D1EF49F04803F055FDFBF71FF89C -:10298000014638684069FCF740FAFFF7D1FF2A8E0C -:10299000618E1318994202DB491C618602E0401CDB -:1029A00010186086B07D002806D19C21608E495B9E -:1029B000884201D1401C6086DC480168088B0328EE -:1029C00002D2401C088302E0618E982041532846C1 -:1029D00040300646C1898089081A298E401E401859 -:1029E00087B218E0D148EB7E00685B00406A00794E -:1029F0004100D248415AC05A401881B2207D00237C -:102A0000FFF7F0FD00280FD001280ED0CA48C949B1 -:102A10003A3003F008FD628EB81A00B20028E1DAFD -:102A20000820B07200F010FEF8BD608E401C608679 -:102A3000F1E770B5BD4D002168680162C27E1300E8 -:102A400003F0E2FD045656034A56426A14680268CF -:102A500011700268516000682030407D002808D164 -:102A6000FAF7ADFF69680968096CFCF7CEF9002830 -:102A700018DC6868228E0168498E914206D1214691 -:102A800080318B8B9A1ACA83238605E0891A9E228D -:102A900011530168498E21860268C1681164C168BA -:102AA000416111E068680168098E228E8B1A224606 -:102AB0008032D3830168098E218601680B6CC36064 -:102AC0000B6C4361886C9062204601F0D8FC0028B2 -:102AD0000DD098499A4808E0C1684161FFF7B2F902 -:102AE000002804D096489349801D03F09CFC70BDDB -:102AF000934890490D30F8E710B58C4A0B001268E6 -:102B000003F082FD0906090F1F0C2E2E082B2E0044 -:102B1000FFF78FFF10BD00F068FC10BDFCF772FEE0 -:102B200010BDD07E022806D0D07E032806D0FF201C -:102B30008049A3300EE0FFF70BFF10BDFFF714FD37 -:102B400010BDD07E0228F6D0D07E0328F6D0FF201C -:102B50007849AE3003F067FCF0E7FAF715FF10BDD7 -:102B6000FF207449BC3003F05EFC10BDF3B581B0AA -:102B70000E4601276D4D734C0B0003F045FD090611 -:102B80002F39392F40403939400001216D48FFF776 -:102B9000CBFC31460198FFF7AFFFE07E022826D13B -:102BA00068680568406A0668FAF7E7FEB188604A17 -:102BB0005143EA69891AD639E962B72802D26248D4 -:102BC000081803E0081A6049B7314018E8625F4806 -:102BD000E96A814200D80846E86205E00198FFF7FB -:102BE0008BFFE07E022802D1206820300775FEBDF1 -:102BF0002C600198FFF780FF00202860FEBDFF20B9 -:102C00004C495C3003F00FFCFEBD70B50C46064627 -:102C10000B0003F0F9FC09060D10100D1A1A101024 -:102C20001A00484801212830FFF77EFC2146304633 -:102C3000FFF762FF70BD43483C4D283028603046A6 -:102C4000FFF75AFF0020286070BDFF20394982300D -:102C500003F0E9FB70BDF0B5344C0020216885B06D -:102C600003258D76CA7E0746032A03D0C97E002934 -:102C700029D029E0087F002803D12E49344803F0E9 -:102C8000D2FB2068067F684605714571FAF797FE0A -:102C90000290FF20F53003900121684601706946DB -:102CA0003046FBF70CFB00E020BF2068007FFCF7FC -:102CB00038F90028F8D02068007FFAF765FE206810 -:102CC000077700F072FB012021688F7605B0F0BD18 -:102CD00016490A68907600E020BF0A68D07E002876 -:102CE00003D0D07E937E9842F6D0D07E002803D0C9 -:102CF00000200021917670470120FAE770B5114954 -:102D00000024CA7E094D032A03D02831CA7E032A33 -:102D10002ED12960002827D0012821D00C48054950 -:102D2000973003F080FB0020296813E0B4000020F6 -:102D3000E2040000F0280100F70500009E67010092 -:102D4000A1030000F4130020C4F8FFFF38120000B4 -:102D500072020000086048622860002C08D070BD34 -:102D60000320FFF7B5FF01E0FFF775FF0446DAE740 -:102D70000C2070BDF8B5F94F04461F25E67E3300E0 -:102D800003F042FC042920031B20F548844204D0B0 -:102D9000FF20F449FC3003F046FB02203C60FFF7C3 -:102DA00097FF002805D03968002008604862386025 -:102DB00011E00C25002038600AE00120FFF79EFF9B -:102DC000054603E0E749E84803F02DFB002D02D05B -:102DD000E07EB042D2D1E07E002804D0E248E14952 -:102DE000801D03F020FBF8BD10B5DD48FFF7C2FFE2 -:102DF000DB482830FFF7BEFFD94900205031087565 -:102E0000D649C91F4870D64948610A4628325061E0 -:102E100088769076D1494860086010BD70B5044648 -:102E20000120FFF767FBC5B20B20FFF763FBC0B2C1 -:102E3000854204D0FF20CB49C63003F0F4FA0120CC -:102E4000FFF758FBC5B21820FFF754FBC0B285420C -:102E500004D0FF20C349C73003F0E5FA0420C04383 -:102E6000FFF748FBC5B21920FFF744FBC0B285420B -:102E700004D0FF20BB49C83003F0D5FAB748B849A1 -:102E8000083804700020C87688760A462832D07642 -:102E90009076B24B012408331C711860486250626E -:102EA00008601060FFF7A0FF70BDAC4908310871E1 -:102EB0007047FEB5AA49CA7E08462830A74C002AAA -:102EC00002D1C27E002A03D0C97E022903D005E0C8 -:102ED000A648216006E0C17E002901D00C20FEBD7D -:102EE0002060A348FAF7FCFC216808779B4920681A -:102EF000C91F0160C91C4162007F002804D1AD20B8 -:102F00009849800003F08FFAFAF737FD9949884213 -:102F100000D20846FF30C83086B220680325C57647 -:102F2000FEF735FE21680861FEF758FE00270028ED -:102F300027D0FEF753FE21684A6A10600968012015 -:102F4000087001466846F9F7E3FF684600788A4949 -:102F5000000203F064F90191FAF731FD019971184B -:102F6000FAF7C7FF2168C8602068057245720771CB -:102F7000021D017F00F01FFA2068078300202760F0 -:102F8000FEBDFAF71CFD3146FAF7B3FF2168C860B1 -:102F900008680770096801204870E5E77047F8B5D0 -:102FA0006F4EF17E002904D131462831C97E0029B7 -:102FB00001D00C20F8BD0221F176694C674F5034E6 -:102FC0000837776234600025386025753979C07E0E -:102FD0004A006A4940008A5A085A2B46101881B2A2 -:102FE0002A462846FFF7FEFA002804D0CF205D4984 -:102FF000800003F018FA25610120A5602075658620 -:1030000025865748703085753968088E401E0886B9 -:1030100035830020F8BD10B5504801244068817EFA -:1030200003290CD001684978002906D0006A544968 -:10303000884202D90024FFF706F8204610BD00247C -:10304000FBE74648406802681178491C1170016A24 -:103050000068C26A914204D8007D012801D0012095 -:1030600070470020704700207047F8B53B4C3C4843 -:103070002060416A00680D68002634210E54A621A4 -:10308000495D00294BD1007D032848D1FAF797FC10 -:10309000014620684069FBF7B8FE00283FDDFFF7D6 -:1030A00047FC298E401C4118206802681186006880 -:1030B000018E9C22525B511A09B200292FDD012199 -:1030C0002030817528464030C1898089081A298EB0 -:1030D000401E401887B21BE0496A09794A00274917 -:1030E0008B5A028E007D9446EA7E5200895AC91896 -:1030F00089B201236246FFF775FA00280FD0012834 -:103100000FD002280BD01B481649193803F08BF951 -:1031100021680868028EBA1A12B2002ADCDA266028 -:10312000F8BD20680068018E491C0186F0E7F8B5FB -:103130000A4D00266A680128516A0C6853D1087943 -:103140000E4940000B5A1068077D032F1AD0027DEC -:10315000022A24D0007D012834D044E0B4000020AD -:10316000F4130020F0280100070200006D2B01007D -:103170000B2C0100F6050000102700009E670100DF -:10318000D98213000661106886609C20025BE07E95 -:103190004000085AC01881B2002303201BE02246D9 -:1031A0008032D78D0761E07E928B4000085AC018AC -:1031B00081B200230220FFF715FA6A680121126824 -:1031C00011750AE09C20025BE07E4000085AC0189E -:1031D00081B200230120FFF705FA002803D09C49A3 -:1031E0009C4803F020F9FAF735FB9B480078EFF78D -:1031F0006FF8686806830268218E51860068203067 -:103200008675F8BD38B5944C0021083460680D46C9 -:1032100000684278002A01D045701FE0007800283D -:1032200009D001216846F9F773FE684600788B499A -:10323000000202F0F4FF6068426AC0681268511828 -:10324000FAF757FE01466068C160057103214172BB -:10325000021D017F00F0AFF860680583FAF7FAFA03 -:103260007D480078EFF734F838BD7B4A10B5014649 -:10327000083250680B0003F0C7F9060D1504081753 -:103280000C31012100F0D1F807E00021106800F0B6 -:10329000CCF810BD0120FFF74AFF00210846FFF7D8 -:1032A00043F910BD032116E0416A02680968D36939 -:1032B00093608A886A4B5A430368DA600A46C032D0 -:1032C000D3890B83137B8B75138A8B80538ACB80B6 -:1032D000928A0A8102210068017510BD5D485C492F -:1032E000913003F0A0F810BD70B500280BD05A4CF7 -:1032F000083401280ED002281ED056485449B43054 -:1033000003F091F870BDFFF77DFF00210846FFF73D -:103310000BF970BD6068002501684D7000F045F83C -:103320000320F5F7B8FEFAF795FA4B486560007888 -:10333000EEF7CEFF656070BDFFF764FF606800F0D8 -:1033400034F800210846FFF7EFF80420F5F7A3FE54 -:1033500070BD414908314968CA7E022A08D10A680D -:103360001378002B04D150600968CA6A1018C8622B -:103370007047394A10B50832526800290CD001292B -:1033800007D0022907D033483149D93003F04BF830 -:1033900010BD801E00E0401F106210BD2E48083096 -:1033A0004068002800D0012070470021C176817656 -:1033B00001604162704710B50B46C17E847EA14218 -:1033C00004D011461846FAF77AFF10BDFFF7EDFF5B -:1033D00010BD024610B50020002905D00846504314 -:1033E000204902F01CFF401C10BD1B4810B50830DE -:1033F0004068C07E030003F007F9041515030B15A0 -:1034000001F05EF900280CD00F2017A1800106E022 -:10341000FEF7F0FD002804D0F12013A1800003F096 -:1034200002F810BD10A11448F9E710B504460029B0 -:1034300003D00020FFF77BFE03E007480078EEF79B -:1034400047FF2046FFF7B1FF0020F5F724FE10BD2F -:10345000F028010092060000AC00002010270000B8 -:10346000E204000040420F007372635C6C6C5F6C9E -:103470006D2E73302E630000CB030000F8B5FEF70D -:10348000B0F90446FEF756FAF84E0546706920304A -:10349000407D002809D0012827D002282AD00328FF -:1034A00032D0FF20F2A19A3037E0F0481830FEF712 -:1034B0001EFA002801D003200FE0EC481830FEF778 -:1034C00049F9002804D070695B21095C002908D003 -:1034D000E6481830FEF7D2F90120716920314875AD -:1034E0001DE002212030417519E0E0481830FEF758 -:1034F000C5F914E0DD481830FEF72CF900280ED18C -:10350000FF20DBA18C3008E0D8481830FEF7EFF937 -:10351000002804D1FF20D6A1943002F084FFB069C6 -:10352000F72201781140017072692032937DDB0728 -:103530001B0F1943FB2319400170D37DDB075B0F81 -:1035400019430170577DEF23022F04D0012F07D0BC -:10355000032F07D00CE0012C06D8002D04D007E083 -:103560006D1E2C43002C03D019401023194300E09A -:1035700019400170D17F002916D0517D012913D047 -:10358000BF48FBF79DFFBE480021283001767269D5 -:10359000916ED26E42610161B949B269FCF7A3FA3A -:1035A0000020FCF7AFFA03E0FBF78AFFFCF7CDFA47 -:1035B000B0690078C00606D4F0690078C00602D46D -:1035C000F079002806D0B079002803D101210846FF -:1035D000FCF79BF8032030703079002803D1FBF70B -:1035E000BDFF01203071F8BD70B5A0481C30FEF75A -:1035F000B9F901259D4C002802D00020607002E03E -:1036000065709F48E061606940300078002802D012 -:103610006078002805D0E069FBF752FFFCF795FAC7 -:1036200070BD9748FBF74CFF9548283005766269D6 -:10363000116F526F42610161914AE169FCF753FADF -:103640000120FCF75FFA70BD10B588490023486976 -:1036500002462030C3768377012049239854A03254 -:103660009279002A03D008700021022001E0002195 -:103670000320FFF7FAFD10BD70B57C4C6079C206DF -:103680002046406901468031002A01DA002202E02A -:10369000CA8DCB8BD218CA850246C0321379002B53 -:1036A00005D0034640331D8AC98B69181982617A97 -:1036B000002903D03D2001F051F94AE003462033B0 -:1036C000D97E042945D0217A002913D0480701D496 -:1036D000C80601D51E2030E0080701D53D202CE0AA -:1036E000C80705D1880703D461A1664802F09BFE94 -:1036F0002A2022E04030817D002905D0418A4D1CDE -:103700004582858AA9420FD2517A062902D0117AC0 -:10371000062905D1018B4A1C0283828A914203D279 -:10372000028AC1898A4201D3222006E09A7F8089D9 -:10373000002A0AD088420FD3082001F00FF96069EF -:103740002030C07E042804D006E0062804D33E20A2 -:10375000F3E7FFF779FF70BD0120207000210846D4 -:10376000FFF783FD70BD10B5404840690146203128 -:103770008A7F002A29D0012A27D0022A06D0032ACC -:1037800004D03BA1404802F04EFE10BDC97E032983 -:103790000FD0082919D001464031CA898989511AA8 -:1037A000891E89B2032900D303218030828B5118EE -:1037B00009E0014640318A89032A06D3028EC9896D -:1037C00080305118491C018310BD8030818BFAE78D -:1037D00000B5030002F018FF0604070B0F121217C2 -:1037E00000290ED00FE0891E02290AD90BE0891F9B -:1037F000012906D907E0082903D004E00B390C2978 -:1038000001D8012000BD002000BDFEB505461748C7 -:103810001830FEF740F8002804D11B4814A1D13815 -:1038200002F001FE114CA069FDF702FC0321A06922 -:10383000FDF721FCA069EF220178114001702946B3 -:10384000FDF740FC002601272B0002F0DDFE0E5C98 -:103850005C085C2C6060255C4C5C603C375C60699B -:103860006521095C002911D0062111E0C400002067 -:103870007372635C6C6C5F736C6176652E630000C1 -:1038800090140020430200005C080000C030417921 -:10389000A069FDF797FC3AE060698030417CA0693F -:1038A000FDF7D7FC33E06169A069B831FDF7ADFCE5 -:1038B0006169A0698C31FDF7AEFC28E00621A069A2 -:1038C000FDF7C5FC23E020690178A069FDF7A9FC9C -:1038D00020698188A069FDF7A6FC20694188A0695C -:1038E000FDF7A5FC13E00096019660696030007951 -:1038F000002803D069460878384308706946A069F3 -:10390000FDF7B1FC03E0F949F94802F08CFDFDF741 -:10391000D4FF002804D1F648F449801D02F083FD4D -:103920000C2D06D0072D03D0606940304682877584 -:10393000FEBD606940300683FEBDF0B5ED4CC82089 -:1039400061698DB0405C04280AD0052835D15C201F -:10395000405C00282AD0012060314871022026E016 -:1039600010226846D63101F030F86169102204A8AF -:10397000B03101F02AF8684601F0DFFB08AE8DCEC9 -:10398000616984250E4678360DC66F5000250D6797 -:103990004D67012540267554D74D88318DC5284681 -:1039A0000822093002F0C1FB052000E00D20FFF7DE -:1039B0002CFF61690020C03108720DB0F0BDF8B570 -:1039C000CC481830FDF767FF002848D0C94C207A52 -:1039D000002844D16069C421095C002500290ED06B -:1039E0002030C17E0120FFF7F3FE002807D1606977 -:1039F0002030C17E0420FFF7EBFE002806D060696E -:103A0000C921095C0126062907D00DE06069502113 -:103A10000D526030457102204EE02030C17E0420FE -:103A2000FFF7D6FE002813D0616908462030C27E19 -:103A3000921E130002F0E8FD166262621D6262626D -:103A400060621F6262622843626262626262466210 -:103A500060695E21095CC90702D0C0304572F8BDBB -:103A60000C20FFF7D2FE60694030817F31438177BF -:103A7000F8BD072020E0FDF79AFF0028F8D0606924 -:103A8000403005700B2017E0F9F741FA0C28EFD30E -:103A900060690821B830F9F73BFA002806D0606960 -:103AA00004218C30F9F734FA002804D1C72093A1FF -:103AB000C00002F0B8FC0420FFF7A7FEF8BDFFF736 -:103AC0003CFFF8BD00228A66CA66C6770A4678318E -:103AD000C8C9894878322838D26842632830C8C0BB -:103AE00008220D30091D02F020FB0620FFF78DFE95 -:103AF000606940308575F8BD0920DDE700F036FFCC -:103B0000F8BD70B57B4C3B216069095C08292FD159 -:103B10000146028EC0314B89521C9A4228D1227A2A -:103B2000002A25D10A8A83889A4207D14B8AC58800 -:103B3000AB4203D18B8A0589AB4209D043884B85C0 -:103B40008A854A8ACA858A8A0A860122E6210A5417 -:103B500001221146FDF747FC00210420FFF785FBF9 -:103B600060690021C92211542030C1760321817778 -:103B700070BD70B55F4C60692030C07E172803D0DF -:103B80005EA1624802F04FFC616900220B4640339F -:103B9000DA7608469A75E030867D0B240125002EE2 -:103BA00006D0837C002B14D1C4740275857410E098 -:103BB0001E7F002E07D01A774C88FA235C520276BB -:103BC0000C23837505E04E88FA235E520276057752 -:103BD00084752031CA7670BD70B5464CA0798007D7 -:103BE00036D5207A002833D160692030C17E01208B -:103BF000FFF7EEFD00282BD1A0690126C078002533 -:103C0000030002F001FD0E8585088537465F0A85B1 -:103C1000168526625285032152E060692030C07EFD -:103C2000052804D0394835A1333802F0FCFB60691F -:103C30000CE060692030C07E092804D033482FA1F1 -:103C40002D3802F0F0FB606956210D542030C57606 -:103C500070BD60692030C07E0B2804D02B4827A19E -:103C6000263802F0E0FB60695B210E540C21203005 -:103C7000C17670BD60692030C07E0F2804D0234813 -:103C80001EA11F3802F0CFFB60695B210E5410218A -:103C9000EDE760692030C07E102804D01B4817A1D2 -:103CA000183802F0C0FB12210AE060692030C07EA3 -:103CB000102804D0154811A1123802F0B4FB1421C9 -:103CC0006069D4E7FFF755FF70BD60690146C030F9 -:103CD000027A062A04D14031897F890700D505720E -:103CE000417A0629F0D1457270BD0000703801009C -:103CF000CD070000C4000020B81400207372635C7C -:103D00006C6C5F736C6176652E6300004C0500007F -:103D1000FD49FE4802F087FBE6E710B5FC4C606900 -:103D20002030C17E0020FFF753FD002803D1207A08 -:103D3000012108432072207A002808D1E069FDF7AC -:103D4000EBF961699122505405202031C87610BDED -:103D500010B5EF4C60690146C0314A7A002A06D09E -:103D6000097A062903D0217A012211432172217A8E -:103D7000002928D14030807F800715D4E069FDF705 -:103D80005AFA61694031C877E069FDF756FA61690E -:103D900040310884E069FDF755FA6169022240313B -:103DA0004884887F10438877606900220146C031CB -:103DB0000B7A062B00D10A724030837FDB0702D1D9 -:103DC00006234B72028310BDF8B5D14C60692030D8 -:103DD000C17E0020FFF7FCFC0125002807D16069A7 -:103DE0004030007F002802D1207A28432072207AB8 -:103DF000002830D160690026014640304682857532 -:103E0000B031E069FDF7EFF96169E0698831FDF7EC -:103E1000F3F960690146E030827D0827002A06D068 -:103E2000817C002913D1C774067585740FE04A8818 -:103E3000F8204252FA31E069FDF7C8F96169E0699A -:103E4000FF310331FDF7CAF96069E03087756069B9 -:103E50000F212030C176F8BD10B5AD4C606920301F -:103E6000C17E0020FFF7B4FC002803D1207A012195 -:103E700008432072207A002812D1E069FDF769F921 -:103E800000280ED0E069FDF75FF96169CA2250523F -:103E9000098E00F0D6FD002806D0282000F05EFD37 -:103EA00010BDFFF73AFF10BDE069FDF74BF96169FE -:103EB000C0310873E069FDF740F96169C031C8811C -:103EC000E069FDF72BF96169C0310882E069FDF70F -:103ED0002AF96169C0314882E069FDF729F9616911 -:103EE000D422505208202031C87610BDF8B5884C35 -:103EF000A079C00776D0207A002873D1606920307D -:103F0000C17E0120FFF764FC002863D1E069002531 -:103F1000C178022701260B0002F076FB0D1613086C -:103F2000415A5A445C575A192F545A00FDF74CF91C -:103F30006169C62250543B20475440314D828E75F2 -:103F400048E000F093FD45E0FFF786FF42E060693E -:103F50002030C17E0020FFF73BFC002802D1207AF0 -:103F600030432072207A002834D160690146403104 -:103F70004D828E750B2120300FE0606901462030A4 -:103F8000C27E0C2A02D0227A3A432272227A002A76 -:103F900020D1C57740310E770D21C1761AE0FFF7A9 -:103FA00013FF17E0606901462030C27E122A02D05A -:103FB000227A3A432272227A002A0BD140318D753F -:103FC0001721EAE7FFF7C4FE04E000F00DFD01E071 -:103FD000FFF7A3FE62690023106F516F401C594127 -:103FE00051671067F8BDF8B5494C05466069203047 -:103FF0008079012801D1FBF7E9FA012D14D160691C -:104000004021095C002903D12030C07F002801D065 -:10401000FBF79BFDFBF7BDFAFBF7B0FAFBF708FADD -:10402000FBF72DFAFBF746FA60790225C107012656 -:10403000002901D180070ED560692030817F0029D9 -:1040400002D0032902D006E0867700E085770021C0 -:104050000120FFF70AF960692030817F012903D12F -:104060006179090700D58577607A002803D100F0CF -:1040700027FDFFF7A4FC207900250028606902D005 -:104080008030058403E08030018C491C0184607914 -:10409000C00705D06069AC210D544030858104E033 -:1040A000616940318889401C8881E079002806D008 -:1040B0006169A031087B022806D8401C087360693A -:1040C000A030007B022806D9606901468030058453 -:1040D0004584A0310D7360692030C17E0020FFF758 -:1040E00077FB002804D160692030C07E072855D1B5 -:1040F00060690146C0310A7A062A4FD0497A0629FA -:104100004CD03E21095C05E0FC3C0100BA050000F2 -:10411000C4000020022941D1A030007B00283DD1FD -:10412000FDF74FFB002839D0FDF704FC002835D0FF -:1041300061690A468032508B01282FD90846A03089 -:10414000844646716038C7898389B81E834201DB83 -:10415000012002E0F81A401E80B2138CA789BB42EE -:1041600001D3012302E0FB1A5B1C9BB2984200D9E9 -:104170001846012801D163465D71C0310B78002BD0 -:1041800010D0528C49888A4201D3012102E0891A59 -:10419000491C89B2884205D9084603E061690120BB -:1041A000A0314D7161690A8E803110188883FFF744 -:1041B000DAFAFFF761FAFEF756FF002809D06069C6 -:1041C0000146FF3001300279002A02D14988C180BE -:1041D00006716069A0308571F8BD70B5F84C6069F2 -:1041E0002030407D00283ED0022810D1FDF7C2FAD1 -:1041F000002804D17120F349000102F014F962692A -:104200000023916ED06E491C58419166D06660695A -:10421000002520304575017D012904D10575A1795E -:1042200010221143A171C17C012915D1C574A07957 -:1042300008210843A071FDF76AFB002804D1E5209E -:10424000E049C00002F0EFF860690023816EC26EA1 -:10425000491C5A41C266816660692030817D01290E -:1042600002D0012181753FE585753DE570B5D44CDF -:104270000026E169012508788207920F0420012AAF -:1042800015D0022A13D0032A03D0217A01432172C8 -:104290002AE560780028FBD1606920308574A17917 -:1042A0002943A17122E0C6751EE5C5751CE5497854 -:1042B000CA0624D06278002AEAD1C906C90E1B2991 -:1042C00018D8617901436171FDF75FFB002804D1C3 -:1042D0003B20BC49400102F0A6F860690023016F51 -:1042E000426F491C5A41426701672030C17D012954 -:1042F000DBD1D8E7207A102108432072F4E460690A -:10430000F3E77CB504460020C0436946888001A8D5 -:10431000FCF7B2FD00287AD169468888FCF790FD49 -:10432000002803D0A749A84802F07DF8009801466C -:10433000E030827C0025002A08D0657010212170B1 -:10434000C17CA170017DE170857472E082799C4E20 -:10435000002A13D065700720207008E07169E620FC -:104360008D8445540A22A01CE83101F0DEFE00983D -:10437000E03080790028F1D1A5705AE0827D002AD2 -:1043800038D0827D130002F03FF90D2F2F2F2F2FF1 -:104390002F2F2F112F2F24082F0065700C21217033 -:1043A000017EA17071694988A18010E065700820C4 -:1043B00020707069082240886080201DFA3101F069 -:1043C000B4FEFF2100980331095AA181E0308575C0 -:1043D0002FE065700B212170017EA1707169498801 -:1043E000A180017FA171F2E7774876495D3002F044 -:1043F0001AF81EE0C81DF9300279002A08D01122EF -:1044000065702270811C89886180057111E012E05D -:10441000027A002A0FD012226570FF312270033118 -:1044200004E005720A8962804A89A280027A002A21 -:10443000F7D101207CBD00207CBD614800780128B7 -:1044400001D00C2070470020704770B55C4C0546C9 -:104450002078002804D05C485A49933001F0E3FFEB -:1044600000202561A07201202070FFF7E6FF0028E0 -:1044700004D0554853499E3001F0D5FF34E4F8B5D7 -:104480004F4F3978012901D00C20F8BD0126A62113 -:1044900078610E548030807CFDF752F900282FD0CF -:1044A00078698030807CFDF753FA002828D078693D -:1044B0008030807CFDF7E5F9002821D078698030D4 -:1044C000807CFDF70AFA00281AD0FAF7E6FF78692F -:1044D00000258030408B002827D039481830FDF760 -:1044E000DAF9002821D07869C421095C00291CD0A0 -:1044F0002030C17E0120FFF76BF9002802D014E0C4 -:104500001220F8BD78692030C17E0420FFF760F9E1 -:1045100000280AD1786950210D526030457102207F -:10452000FFF773F97869A03045717869E621095C75 -:10453000002903D1818CC288914200D8C188B981F9 -:1045400001468031CA8B521E93B20A8CD21892B2A5 -:104550000A8494460246A0321479002C02D04D847D -:10456000157102E04C8CE4184C8404464034A78951 -:10457000FF18A7814C8B012C01D8641C4C83002BA5 -:1045800000D015732030C07E0D4C04281ED0507909 -:1045900000281DD0A1898C451AD2FDF712F90028F8 -:1045A00016D060690146C0310A78002A10D08030E8 -:1045B000408C498888420BD3A570E6700AE0000061 -:1045C000C4000020FC3C010081080000A67001E04E -:1045D000A570E5706069A5210D543B21095C062991 -:1045E00001D0072918D1CA21028E095A511A09B2DD -:1045F000002911DB01460522CC310A3001F095FD7E -:10460000012202216069FCF7EEFE6069C9210D54A8 -:104610003B210D546030867160699E210A5A811CCD -:104620003030FCF71EFFA07800283DD16069C02122 -:10463000095C002901D0803045840120FAF7A4FDEF -:1046400060691330FAF713FF60690F30FAF753FE11 -:104650000120FAF71FFF61694020405C002803D168 -:104660003F20405C00280DD00A467831C8C9F9487F -:104670007832D26842632830C8C008220D30091D44 -:1046800001F053FDFAF701FF01210846FAF758FE41 -:1046900060698030806AFAF716FFFEF7A5FF60694F -:1046A0004030007AFAF730FE6571E571A571257228 -:1046B0006572257102202070FAF7FCFE0020F8BD1B -:1046C00010B5E54C2078022801D00C2010BDA07850 -:1046D000002803D00020FFF786FC17E0FAF7DDFE84 -:1046E00000F033F9606920308079012801D1FAF7B0 -:1046F00076FFA07A002809D0012807D0022807D029 -:10470000032805D0D549D64801F08DFE002010BD04 -:10471000EEF77EFCFAE7D0498872704710B5CE4CB0 -:104720002078032804D0CE48CC49293001F07BFE04 -:10473000606901212030827C002A06D00022827428 -:104740000175A27904231A43A271A2691378DB438D -:104750009B0707D1C37C002B04D1C174A07902212F -:104760000843A0711078C00606D4E0690078C0063E -:1047700002D4E07900280CD06078002809D1A07913 -:10478000002806D1FEF75DFC002802D0207A002820 -:1047900003D00120FFF727FC03E0FEF725FF00F020 -:1047A000D4F8207801280DD0A07A00280AD001285A -:1047B00008D0022807D0032805D0A948A7496830A7 -:1047C00001F031FE10BD0120FBF719F810BD10B546 -:1047D000A14C606920308079012812D1FAF7F6FEE9 -:1047E0006169881C3031FCF7C5FE002809D060697A -:1047F000C21D4388F93253812030007E107301209E -:10480000107210BD70B5944C05462078042804D071 -:1048100093489249803001F006FE617910200143EF -:104820006171002D50D0FBF7A8F96178012508438C -:10483000002811D160694021095C00290CD0E16990 -:104840004A78D20608D0097820300907C07DC90F00 -:10485000814201D165724EE0E078002809D0E0691C -:104860004178C90605D10078C00602D4FFF7AFFF32 -:1048700041E0FFF7ACFFE06900784007C10F6069D5 -:104880002030807D814205D0FFF7A7FC60790821A8 -:1048900008436071E06900780007C10F606920304B -:1048A000C07D814201D1FFF7E1FC6079284360714E -:1048B0000020E071A079000704D560692030C07E37 -:1048C000032818D0207A14E0022001436171E079B6 -:1048D000401CC0B2E07101280DD8606940300078FA -:1048E00000280CD05B484078C106C90E052906D2C5 -:1048F000C006002803D00120FFF775FB01E0FEF79A -:10490000BDFD207801280DD0A07A00280AD001280A -:1049100009D0022806D0032805D051484F49E2307B -:1049200001F081FD9FE40120FAF769FF9BE410B5D7 -:1049300049480078042804D049484849EA3001F041 -:1049400072FD0120FFF74FFB10BD10B501210020C3 -:10495000FAF7DBFE40490420087010BD3E494A22A8 -:104960004969505404202031C876704710B53A4C3C -:10497000C8206169405C00281CD0062806D0203180 -:10498000C97E0020FEF724FF002813D0606901468D -:10499000C0310A7A130001F037FE070D0D0D0D0D21 -:1049A0000D050D004030807FC20704D0C043800752 -:1049B00000D1087210BD0C20FEF727FF60690122AC -:1049C0004030817F1143817710BD10B5002A0AD095 -:1049D000002306E0D41A6418203CE47FC4545B1C16 -:1049E000DBB29342F6D310BD7CB51B4C606920301E -:1049F000C17E0020FEF7ECFE0125002802D1207ABE -:104A000028432072207A00281AD16946E069FCF711 -:104A100022FC684600780022C107C90F6846017071 -:104A20006069002902D06030057101E060300271D8 -:104A30006069014640304282857509202031C87680 -:104A40007CBD401A074900B2884201DC00280BDC1B -:104A50000120704790140020C4000020FC3C01009D -:104A6000F4090000FE7F00000020F2E710B5534C6F -:104A700060692030C17E0020FEF7AAFE0028207A5F -:104A800010D000280DD1E069FCF797FB6169CA22BC -:104A90005052098EFFF7D5FF002807D02820FFF7D6 -:104AA0005DFF10BD01210843207210BD6169E069FE -:104AB000CC31FCF77AFB606906212030C17610BD4D -:104AC00010B500F04EF83D4C607940070BD5606999 -:104AD0002030C17E0520FEF77BFE002803D0207A1F -:104AE000082108432072FFF701FA00F018F8FFF7D9 -:104AF00073F8A079C0060FD5207A00280CD1606920 -:104B00002030C17E0B0001F07FFD07070707070774 -:104B1000070507000721C176FEF7F3FF10BD10B5AA -:104B200026488179490715D5017A002912D14069B3 -:104B30003B21095C891E0B0001F066FD07050C0C8A -:104B40000C0D0C0F0C00002256210A54C030807945 -:104B5000FFF704FF10BD012100E00221C0304172C7 -:104B600010BD10B515488179090720D5017A0029B3 -:104B70001DD1406902462032D47EA41E230001F0DC -:104B800043FD13160B1616161616161616161616BF -:104B90001616161616171600562211546030407954 -:104BA000002801D0062000E01620FFF7D7FE10BD38 -:104BB0004030C1768175D17610BD0000C400002060 -:104BC00030B50346002002460DE09C5C2546303D92 -:104BD0000A2D02D30020C04330BD0A256843303877 -:104BE0002018521CD2B28A42EFD330BD70B50D46A8 -:104BF000144608E00A2101F012FB2A193031203A4C -:104C0000641ED177E4B2002CF4D170BD10B500233E -:104C100010E0040A00020443A0B2CC5C4440200629 -:104C2000000F60400407240C44402006C00C604084 -:104C30005B1C9BB29342ECD310BD000010B572B662 -:104C400000F0DCF800280BD0ECF72AFBF8F7EFFDBA -:104C500000F0A5FD6E490020C86288626D490860B9 -:104C600062B6002010BDF3B5002501200007C06A20 -:104C700081B0C0430006000E04D167480068401CA4 -:104C800000D1012572B600F0B9F8002802D062B652 -:104C90000820FEBDECF75AFAECF706FB5F4B604EBE -:104CA00000211A68CA40D2071FD00246CA40D20764 -:104CB00018D14AB2002A07DA1407240F083CA408C6 -:104CC000A400A419E46904E09408564FA400E41970 -:104CD00024689207D20ED4402206920F012A04D0F3 -:104CE000032A02D062B65048FEBD491C2029D8D301 -:104CF0000198030001F088FC14212323232323239C -:104D000023230B0D0F11131F1517191B1D2E002424 -:104D100016E0012414E0022412E0032410E004242D -:104D20000EE008240CE009240AE00A2408E00B2421 -:104D300006E00C2404E0052402E0072400E0062439 -:104D4000F06901210002000AC9070843F061002D43 -:104D500004D009E062B601200003FEBD2C4D3348AB -:104D6000E862ECF7A1FAA8622A49314808603149A3 -:104D700002980860ECF798FA214600F0F7FCF8F783 -:104D80001AFD00F0FDFE00F073FD0198ECF756FAF5 -:104D9000040062B603D0FFF751FF2046FEBD00209D -:104DA000FEBD10B5044600F029F8002800D001200F -:104DB0002070002010BD204908600020704710B509 -:104DC0000C46102808D011280BD012280CD013281C -:104DD0000ED00120086010BD03CC083CFFF743FF54 -:104DE0000AE0FFF72BFF07E02068FFF7DAFF03E098 -:104DF0001149206808600020206010BD05480C495A -:104E00000068884201D101207047002070470000EF -:104E100000050040780000200010001000E100E0D4 -:104E200000ED00E000E400E00110000000190000C7 -:104E3000BEBAFECAE40000200400002010B52038ED -:104E40000C46030001F0E0FB33A6AAAEB2B8BCC02A -:104E5000C5E0DBE41B1F23272C31373C41474D5075 -:104E600054585C606D71656974787C8084888C901E -:104E700094989C9FA2CACFE9F0F3D3D7F80020689A -:104E800000F0DDF8D6E0206800F0E1F8D2E020681C -:104E900000F0F5F8CEE0207840B200F0D7FAC9E093 -:104EA000207840B200F0F5FAC4E02078616840B2A2 -:104EB00000F008FBBEE0207840B200F018FBB9E03B -:104EC000207840B200F023FBB4E02078217940B292 -:104ED00000F02EFBAEE02078616840B200F058FB95 -:104EE000A8E000F064FBA5E0206800F068FBA1E00A -:104EF000207800F07DFB9DE02068F8F72CF899E021 -:104F00002068F8F72CF895E021792068F8F72EF85A -:104F100090E0206800F0E6F98CE0206800F0E7F906 -:104F200088E0207800F0E7F984E000F0F1F981E012 -:104F3000207800F0F3F97DE0207800F005FA79E0C0 -:104F4000206800F01EFA75E0206800F020FA71E099 -:104F5000206800F022FA6DE0206800F023FA69E092 -:104F6000206800F025FA65E0206800F027FA61E08B -:104F7000206800F028FA5DE00846ECF7FFF859E0F9 -:104F8000EDF719FA56E0EDF746FA53E02068EDF731 -:104F90004EFA4FE0206800F0E1F84BE0206800F0A6 -:104FA000E9F847E0206800F0F0F843E02078A268D4 -:104FB000616800F0F5F83DE0207800F006F939E08E -:104FC000207800F017F935E02078616800F027F9C3 -:104FD00030E02078616800F03AF92BE02179207800 -:104FE00000F016FC26E0206800F06BF822E0206854 -:104FF000F8F70CFB1EE02068F8F7F0FA1AE007CC8F -:105000000C3C00F0FFFC15E0206800F052FD11E0C0 -:1050100003CC083C00F07DFD0CE0206800F06EFF42 -:1050200008E009E003E0FFE700F080FF02E020680D -:1050300000F0B8FF206010BD0120086010BD002105 -:105040000170084670470146002008707047EFF372 -:105050001081C907C90F72B60278012A01D0012256 -:1050600000E0002201230370002900D162B6002A6B -:1050700001D000207047012040037047E7E7EFF3BD -:105080001081C907C90F72B600220270002900D131 -:1050900062B600207047F2E710B52848FFF7CFFF4F -:1050A000002803D026A11D2001F0BDF92348401C93 -:1050B000FFF7C5FF002803D021A1212001F0B3F99B -:1050C00010BDF1B5224D6F6801261C48FFF7BFFFE8 -:1050D0001A4C002803D10026601CFFF7D0FF1D4AA0 -:1050E0001D490120506000BF00BF00BF00BF00BFCE -:1050F00000230B604B60009B6B60106000BF00BF23 -:1051000000BF00BF00BF0868002802D1486800281F -:10511000F9D048680028E4D1002E04D06F60601CEC -:10512000FFF795FF07E0601CFFF791FF0028D3D140 -:105130000248FFF7A4FF0020F8BDC2E7E800002006 -:105140007372635C736F635F6563622E630000005C -:1051500000E5004000E0004000E100405A495B4BA0 -:105160000A685B499A42096801D18904890C016087 -:10517000002070475449554B0A6855499A4201D15D -:105180008004800C4860002070474F494F4B0A68EC -:105190004F499A4201D18004800C886000207047FA -:1051A00030B5494B494D1C684A4BAC4202D01028DF -:1051B00002D203E00E2801D3184630BDC300444894 -:1051C000181801614261002030BD3F493F4B0A6819 -:1051D0004049491C9A4202D0042802D203E0022826 -:1051E00001D3084670473C4A0121C0008018016085 -:1051F000002070473449354B0A683649491C9A42A9 -:1052000002D0042802D203E0022801D308467047E6 -:10521000314A0121C000801841600020704770B5FC -:10522000294A2C4B14682D4E284D82005B1C921984 -:10523000AC4203D0042803D2116006E0022801D357 -:10524000184670BD8804800C1060002070BD70B5D9 -:105250001D4A204B1468214E1C4D82005B1C921984 -:10526000AC4203D0042803D2106806E0022801D320 -:10527000184670BD10688004800C0860002070BD66 -:1052800010B5134A164890600E200021C3009B18E9 -:1052900019615961401C1028F8D300200F4A05E01D -:1052A000022803D383009B18196005E083009B1834 -:1052B0001C68A404A40C1C60401C0428F0D310BD7E -:1052C000034907488860704778000020BEBAFECACC -:1052D00000F501400820000000F0014000F8014006 -:1052E00000C0FFFF47490968016000207047454939 -:1052F0000860002070470121434A002803D001289C -:1053000003D042487047916300E0D16300207047AA -:105310003F49012008603D48801C704704223D4BF6 -:105320003B49002805D05A600869012210430861F2 -:1053300008E008694008400008619A60324900208E -:10534000C03188600020704731490622002808D00B -:10535000012809D002280DD003280FD02B48401C6B -:1053600070470869904302E008699043801C086117 -:105370000020704708699043001DF8E70869104352 -:10538000F5E723494A6A02434A62002070472049F0 -:105390004A6A82434A62002070471D49496A016097 -:1053A000002070471A49CA690243CA610020704749 -:1053B0001749CA698243CA61002070471449C96904 -:1053C0000160002070471249024600204031002A47 -:1053D00003D0012A01D0072070478A6370470D4926 -:1053E0000420886008490020C03188600A480168AC -:1053F0008022090A0902114301600849012008605E -:1054000070470000000400404000004004200000FD -:10541000000500400003004000E400E000E100E07F -:105420008107C90E002808DA0007000F0838800835 -:10543000814A80008018C06904E080087F4A8000AB -:1054400080180068C8400006800F704710B50446F9 -:1054500000F0DBF8002813D02046FFF7E1FFC0B2D0 -:1054600000F0E1F800280DD07549E2060B78D20E65 -:1054700001209040002B08D04A681043486006E0A5 -:10548000704810BD6F48401C10BD6F490860002077 -:1054900010BD10B5044600F0B8F800280BD06849DC -:1054A000E2060B78D20E01209040002B05D04A680E -:1054B00082434A6004E0634810BD6349803108605C -:1054C000002010BD70B50D46044600F09EF800287F -:1054D0000BD05E480068E206D20E012191400840E0 -:1054E00000D001202860002070BD564870BD10B566 -:1054F000044600F08AF8002807D0E106C90E012012 -:10550000884052490860002010BD4E4810BD10B5BB -:10551000044600F07AF8002808D0E106C90E012000 -:1055200088404A4980310860002010BD454810BDC0 -:1055300070B50D46044600F068F8002819D02846DA -:1055400000F071F8002816D0A007C10EFF228A4093 -:10555000A807000E8840002C10DA2107090F08392F -:105560008B0835499B005B18D96991430143D96188 -:105570000CE0344870BD3348401C70BDA3082F496F -:105580009B005B181968914301431960002070BDAE -:1055900070B50C46054600F038F8002805D02846BE -:1055A000FFF73EFF2070002070BD264870BDBFF39E -:1055B0004F8F21492648C860BFF34F8FFEE770B573 -:1055C0001F4C05462178012000290ED1207072B6AB -:1055D00000F0F4F81C4E803631688143616000F0C1 -:1055E000EDF8C043306062B600202870002070BD26 -:1055F00013490A78002A06D0002804D1124A4868C4 -:105600001060002008700020704710B50446202864 -:1056100007DA00F0D3F80121A140084201D10120AE -:1056200010BD002010BD012803D0032801D00020A8 -:10563000704701207047000000ED00E000E400E04A -:10564000EC0000200120000000E100E000E200E0AA -:105650000400FA05F8B50446800700250126002855 -:1056600004DA5848C563C66302208443E00404D5C5 -:105670005548C563C66380148443600003D553480E -:10568000456080058443E00504D55148C563C66381 -:1056900080158443A00404D54E48C563C6634014F6 -:1056A000844360042704C00FF90F884203D04AA145 -:1056B000612000F0B8FEB80F0AD04C49CD634C48C9 -:1056C000C563C563CE63C663C6630320800384439A -:1056D00020050AD5474FFD632F20EBF765FDFE63DC -:1056E0002F20EBF761FDF8148443FFF7C9FD424812 -:1056F000044203D038A18D2000F095FEF8BDF0B52E -:1057000000210A46FF230446CC40E4072AD04CB2CD -:10571000E606F60E0125B540384E3560384E356048 -:10572000002C11DA25072D0F083DAE08354DB600C7 -:105730007719FD69A407E60E1C46B440A54314463C -:10574000B4402543FD610DE0A6082F4DB600761943 -:105750003568A407E70E1C46BC40A5431446BC4070 -:1057600025433560491C2029CDD3F0BD70B5274CA9 -:105770000D462060FFF76EFF2068FFF7C0FF284648 -:10578000ECF7EAFEFFF788FCF7F778FBFFF778FD08 -:10579000FFF725FEECF766FD00F06AF870BD10B566 -:1057A0001A4C2068FFF756FF2068FFF7A8FFFFF7A5 -:1057B00067FDECF74BFF0020206010BD1348006828 -:1057C00070470000C01F0040C0CF004000E501400E -:1057D000C08F0040C0DF00407372635C736F635F13 -:1057E000636F6E6669672E6300000000C0EF0040C3 -:1057F000C0FF0040C0BF0040FEFF0FFC80E100E0A2 -:1058000080E200E000ED00E000E400E0F4000020B1 -:1058100070B5002402460D4620462146002A1ED0BF -:10582000012A04D0022A04D0032A1ED103E0012059 -:1058300002E0022013E003202B0000F0E5FE071633 -:105840000507090B0D0F1600012108E0022106E0F3 -:10585000032104E0042102E0052100E00621F8F71D -:1058600058F8002801D0204670BD0724FBE700004F -:10587000B348002101708170704770B5B14D0123AC -:105880006B60B14B1C68002CFCD0002407E00E6854 -:1058900006601E68002EFCD0001D091D641C944289 -:1058A000F5D30020686018680028FCD070BD70B582 -:1058B000A34C0E466178884203D0A4A16F2000F06B -:1058C000B2FD0325330000F09FFE09520624245246 -:1058D0005252524952002078022803D09BA17320D3 -:1058E00000F0A1FD2570A078022802D0012804D084 -:1058F00008E0A06800F0D2FB04E02046083007C8AA -:10590000FFF7BBFF0020A070F7F7A4FF0420207072 -:1059100070BDF8F754F801466068F9F776FA064664 -:105920002078022803D089A1872000F07CFD8B4AD3 -:105930008B498C48964205D86269032A02D2521CD0 -:10594000626102E0864207D84D71801BC8608449BD -:105950006078F8F7B4FC70BD032003E0A07800285D -:10596000FAD10220F7F77EFE00F0E1F870BD77A1D2 -:10597000B12000F058FD70BD70B50546F8F71FF86E -:105980006F4C60602078012803D070A1B82000F02F -:105990004AFD73490220087000220A718D600422BA -:1059A0004A71704ACA6020706078F8F788FC70BD50 -:1059B00010B5634CA078002802D12078002801D0CF -:1059C000112010BD6848F7F78BFF607060780028E1 -:1059D00004D0012020700020606110BD032010BDA4 -:1059E00010B50124020B64040121604BA04202D2D5 -:1059F0009140186802E0203A58689140084000D071 -:105A0000012010BDF8B50E46910005464F19144609 -:105A10003F1F009100F053FB009980028919091F74 -:105A2000B14201D2012200E00022002C03D0FF216C -:105A300001318C4201D90920F8BD4D498D4219D35D -:105A4000AF4217D3854205D2874203D2284630435E -:105A5000800701D01020F8BD8E420BD3002A09D157 -:105A60002846FFF7BDFF002804D13846FFF7B8FFEE -:105A7000002801D00F20F8BD3E483F490068884209 -:105A800005D0224631462846FFF7F7FE0FE0FFF724 -:105A90008FFF0028EFD12A480121C660856004618C -:105AA00081702046302148431830FFF765FF002001 -:105AB000F8BD10B504462E48800A84420BD300F08E -:105AC000FEFAA04201D8102010BDA0020446FFF744 -:105AD00087FF002801D00F2010BD26482649006806 -:105AE000884203D0204600F0D9FA0AE0FFF760FFB1 -:105AF0000028F1D112480221846081701F48FFF70D -:105B00003BFF002010BD1A48010B01208840401EB9 -:105B1000704700B50B460246FFF7F5FF104201D073 -:105B20000F2000BD114802604360002000BD10B589 -:105B3000034C6078F7F728FF00202070A07010BD9C -:105B4000F800002000E5014000E401407372635C4E -:105B5000736F635F666C6173682E6300307500005D -:105B6000E0140020D0FB0100AF5801000006004007 -:105B70000080010078000020BEBAFECA3A5600003C -:105B8000F74805218170002101704170C17081606A -:105B9000704710B5F3490A78022A07D0CA6810186E -:105BA000C860C8689638F9F7E9F810BD8A68101817 -:105BB00088608868F6E70378EB49EC4A002B02D04E -:105BC000012B10D014E00379002B01D0012B0FD151 -:105BD0004379002B01D0012B0AD18368643B8B42AF -:105BE00006D2C06810E00379002B03D0012B01D04E -:105BF000002070474379002B01D0012BF8D1C368F6 -:105C0000643B8B42F4D280689042F1D80120704707 -:105C1000F8B504460226F8F740FD0068002803D0D6 -:105C2000D3A1BD2000F0FFFB0127CD4D002C08D0F3 -:105C30002078002817D0012805D0022811D0032889 -:105C400013D02F710DE06068C82808D3F9F70BF95D -:105C5000002804D06068FFF79CFF012603E00026BF -:105C600001E000F0F9F93046F8BD28780028F8D1B5 -:105C70006068FFF7A0FF0028E3D060680078002884 -:105C800026D0A878042803D0B9A1F72000F0CBFBD8 -:105C9000B44F0020387060680079012800D00020DF -:105CA000387160684079002837D0042078716068C6 -:105CB0008168E868F8F71DF9B8606068C0689630D8 -:105CC000F8600320A870A749E878F8F7F8FAC8E761 -:105CD000A4480221017061680979012919D00021C5 -:105CE000017161684979002915D004214171616809 -:105CF0008968963181606168C968C160C068984CE4 -:105D000014346060F7F75BFE20606F700220A870AB -:105D1000A7E70321E4E70321E8E70320C6E7F8B596 -:105D20008F4C0D46E178884204D0FF2090A11930B5 -:105D300000F079FB28468A4F00250126143703001E -:105D400000F062FC090612375A7C8D97C4A0C4008B -:105D5000A078032807D0A078022804D0FF2084A1CF -:105D60001D3000F060FBF8BDA078032807D0A078B4 -:105D7000022804D0FF207EA1213000F054FB042033 -:105D8000A07025712078002810D1FFF702FFE0787D -:105D9000F8F7D6F8E0607D49886A7D4A02402261C2 -:105DA0007B4AD24310408862002050E000F054F952 -:105DB000F8BDA078032807D0A078022804D0FF20DF -:105DC0006BA1423000F02FFB2078002802D000F0B9 -:105DD0004FF9F8BDA07803281FD104202AE0091A42 -:105DE0006048C1600146E078F8F769FAF8BD042020 -:105DF000F7F738FCA570F8BDA078032807D0A07885 -:105E0000022804D0FF205AA1633000F00CFB207858 -:105E10000028DCD1A07803280BD0F7F7D0FD01468D -:105E20003868F8F7F2FF0028E1DB79688142DEDBB1 -:105E3000D5E70520F7F716FCA670F8BDA078042872 -:105E400004D0FF204AA1843000F0EDFA0220A168BE -:105E50008847FFF7DDFEFF260546BD3642E0A07805 -:105E6000042804D0FF2042A1893000F0DCFA012090 -:105E7000EDE7A078042899D0FF203DA18E3000F0F6 -:105E8000D2FA93E7A07804280AD06078002802D0DC -:105E9000A078022804D0FF2035A1933000F0C3FA87 -:105EA0002078002893D12079002804D00620F7F725 -:105EB000D9FB2571C0E76078002805D02949E07832 -:105EC000F8F7FDF96570F8BD0720B3E7FF2028A1BA -:105ED000AE3046E7002D0AD0012D06D024A1304671 -:105EE00000F0A1FA022DF5D1F8BD042000E0032056 -:105EF000A1688847FFF78CFE0546F3E770B50500FB -:105F000005D0174CA078052803D0112070BD1020B3 -:105F100070BD2048F7F7E4FCE070E078002803D07B -:105F2000A5600020A07070BD032070BD10B50C48A6 -:105F30000178002901D0112010BD817805292BD0CE -:105F4000817801292AD08178002927D00121017088 -:105F50008178012922D0807800281FD020E000001D -:105F600010010020F01400203D860100FF1FA10752 -:105F70007372635C736F635F726164696F5F74698E -:105F80006D65736C6F742E630000000000050040A7 -:105F9000028100001F5D01000F2010BD00F068F8B5 -:105FA000002010BDF8B5394E0446B078002801D065 -:105FB00001280DD1002C0DD02046FFF7FCFD002854 -:105FC0000AD02078324D002808D0B078012823D09C -:105FD0000F20F8BD1020F8BD0720F8BD02272F7054 -:105FE0002079012814D0002028716079002811D070 -:105FF00004206871A0689630A860E068E860E868EE -:10600000224C14346060F7F7DAFC2060B77019E0B6 -:106010000320E9E70320ECE700202870207901281D -:1060200016D0002028716079002813D004206871F0 -:10603000A168F068F7F75DFFA860E0689630E86057 -:106040000320B0701249F078F8F739F90020F8BD54 -:106050000320E7E70320EAE710B50E48816A0E4AFD -:1060600011400A4A126911438162F7F7F3FB10BD30 -:1060700010B5064CE078F7F787FC0820F7F7F2FA3E -:106080000520A07000202070607010BD100100205D -:10609000F014002000050040FD7EFFFF0A4A0221A7 -:1060A00051600A490B68002BFCD0906008680028FA -:1060B000FCD00020506008680028FCD07047012008 -:1060C000000740697047000000E5014000E401401E -:1060D000034610B50B439B070FD1042A0DD308C804 -:1060E00010C9121FA342F8D018BA21BA884201D9A8 -:1060F000012010BD0020C04310BD002A03D0D307EB -:1061000003D0521C07E0002010BD03780C78401C1F -:10611000491C1B1B07D103780C78401C491C1B1B16 -:1061200001D1921EF1D1184610BDF8B5042A2CD326 -:10613000830712D00B78491C0370401C521E830742 -:106140000BD00B78491C0370401C521E830704D0EF -:106150000B78491C0370401C521E8B079B0F05D007 -:10616000C91ADF002023DE1B08C90AE0EBF72CF870 -:10617000F8BD1D4608C9FD401C46B4402C4310C064 -:10618000121F042AF5D2F308C91A521EF0D40B7854 -:10619000491C0370401C521EEAD40B78491C037042 -:1061A000401C012AE4D409780170F8BD01E004C064 -:1061B000091F0429FBD28B0701D50280801CC90767 -:1061C00000D00270704700290BD0C30702D00270C4 -:1061D000401C491E022904D3830702D50280801C7B -:1061E000891EE3E70022EEE70022DFE70378C278AA -:1061F0001946437812061B0219438378C0781B04A2 -:10620000194311430902090A000608437047020AAC -:1062100008704A70020C8A70020ECA707047002221 -:1062200003098B4273D3030A8B4258D3030B8B426F -:106230003CD3030C8B4221D312E003460B437FD4A3 -:10624000002243088B4274D303098B425FD3030AB5 -:106250008B4244D3030B8B4228D3030C8B420DD3C8 -:10626000FF22090212BA030C8B4202D31212090256 -:1062700065D0030B8B4219D300E0090AC30B8B4294 -:1062800001D3CB03C01A5241830B8B4201D38B0342 -:10629000C01A5241430B8B4201D34B03C01A5241E7 -:1062A000030B8B4201D30B03C01A5241C30A8B422A -:1062B00001D3CB02C01A5241830A8B4201D38B0215 -:1062C000C01A5241430A8B4201D34B02C01A5241B9 -:1062D000030A8B4201D30B02C01A5241CDD2C3092B -:1062E0008B4201D3CB01C01A524183098B4201D3A7 -:1062F0008B01C01A524143098B4201D34B01C01A92 -:10630000524103098B4201D30B01C01A5241C30809 -:106310008B4201D3CB00C01A524183088B4201D378 -:106320008B00C01A524143088B4201D34B00C01A64 -:106330005241411A00D201465241104670475DE079 -:10634000CA0F00D04942031000D3404253400022FC -:106350009C4603098B422DD3030A8B4212D3FC22A5 -:10636000890112BA030A8B420CD3890192118B4224 -:1063700008D3890192118B4204D389013AD092113A -:1063800000E08909C3098B4201D3CB01C01A5241F5 -:1063900083098B4201D38B01C01A524143098B42BE -:1063A00001D34B01C01A524103098B4201D30B01A7 -:1063B000C01A5241C3088B4201D3CB00C01A5241CC -:1063C00083088B4201D38B00C01A5241D9D24308B3 -:1063D0008B4201D34B00C01A5241411A00D20146F0 -:1063E000634652415B10104601D34042002B00D55A -:1063F0004942704763465B1000D3404201B500201C -:10640000C046C04602BD70477047704710B500F0E7 -:106410003BF810BD012308CB134B1860134B1960D8 -:10642000134B1A607047134A134B13607246053AB8 -:10643000F0E7114A0F4B1B689A420ED10D4B00201A -:10644000186001980D4B04B598470CBC9E46024657 -:10645000029800990A4B1B68184706980599094B42 -:106460001B68DB6818470000340100203801002059 -:106470003C0100202C010020EFBEADDEC9CD0000A4 -:10648000E4000020040000201D481E497047FFF76B -:10649000FBFFEAF753FE00BD01200007C06AC0B24F -:1064A000FF2804D1184819490968884202D01848C1 -:1064B00018490160184819490968884203D1184AE7 -:1064C00013605B68184700BD20BFFDE71248134901 -:1064D000096888420ED1134B18680B498842F3D0E3 -:1064E00080F308881049884204DD104802680221C0 -:1064F0000A4302600E4880470E4880470E48004716 -:106500000015002000150020FFFFFFFF0010001005 -:106510002C050040080000000010000000000020D2 -:10652000040000200080010000200020240500401D -:10653000DFCD000099640100156401001348704527 -:1065400002D1EFF3098101E0EFF308818869023895 -:106550000078102814DB202810DB2B280BDB0C4ADA -:1065600012680C4B9A4203D1602804DB0A4A104798 -:10657000022008607047094A10470000084A104787 -:10658000084A12682C32126810470000FDFFFFFF16 -:1065900078000020BEBAFECAAD1200003D4E0100D8 -:1065A000BF4D0100040000200D4B0E4908470E4B63 -:1065B0000C4908470D4B0B4908470D4B0949084743 -:1065C0000C4B084908470C4B064908470B4B05493B -:1065D00008470B4B034908470A4B0249084700008C -:1065E00079250000192200009D2B00003F2A0000A1 -:1065F000ED2900009F270000B912000013140000CD -:10660000012B00000F23000030B47446641E25786F -:10661000641CAB4200D21D46635D5B00E31830BCD6 -:10662000184703B5684600784006400E401C884273 -:1066300005D269460878401CC0B208700CBD684697 -:106640000078000601D500200CBD80200CBD414023 -:10665000802901D0002070470120704737B50878A5 -:106660000C4669460978884206D020781146FFF723 -:10667000D8FF207001203EBD00203EBD37B5044646 -:106680000078154669460979FFF7E1FF002801D037 -:1066900000203EBD20782946FFF7C3FF207001206F -:1066A0003EBD0FB568460179007881420AD0684640 -:1066B000007922214006400E4843801818600120CE -:1066C00004B000BD0020FBE77FB5684601791C4699 -:1066D00015460078FFF7BBFF002802D0002004B069 -:1066E00070BD6846007822214006400E484340199C -:1066F00020600120F3E70000FFFFFFFF0000FFFF25 -:106700000100030000000100000000000000000084 -:1067100000000000000000008700000000000000F2 -:10672000000000000000000000000001020304005F -:106730000D0E0F100000000033690000516B0000C7 -:10674000196C0000736C0000C76C00002F6D000016 -:106750008D690000456A0000D16D0000DF790000FE -:10676000100110013A0200001A02000004013C006E -:10677000230044000E0001020408102040805555FB -:1067800055D6BE898E0000007006120DB4130000AD -:1067900014035A06A00900006004F208840DF401F5 -:1067A000FA00960064004B0032001E001400000046 -:1067B000E067010008000020100000000411000044 -:1067C000F0670100180000202801000004110000FB -:1067D0001869010040010020C013000020110000D2 -:1067E0000249022208681042FCD0704700E200E033 -:1067F0000000000000000000000000000000000099 -:106800000000000000000000000000000000000088 -:106810000000000000000000000000000000000078 -:10682000000000000100010054000020FB349B5FC9 -:106830008000008000100000000000000000000048 -:106840000000000000000000000000000000000048 -:106850000000000001000000000000000000000037 -:106860000000000000000000000000000000000028 -:106870000000000000000000000000000000000018 -:106880000000000000000000000000000000000008 -:1068900000000000000000000000000000000000F8 -:1068A00000000000000000000000000000000000E8 -:1068B00000000000000000000000000000000000D8 -:1068C00000000000000000000000000000000000C8 -:1068D00000000000000000000000000000000000B8 -:1068E00000000000000000000000000000000000A8 -:1068F0000000000000000000000000000000000098 -:106900000000000000000000196401000000000009 -:0869100000000000000000007F -:00000001FF
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,6861 +0,0 @@ -:020000040000FA -:10000000C0070000D1060000D1000000B1060000CA -:1000100000000000000000000000000000000000E0 -:100020000000000000000000000000005107000078 -:100030000000000000000000DB000000E500000000 -:10004000EF000000F9000000030100000D010000B6 -:1000500017010000210100002B0100003501000004 -:100060003F01000049010000530100005D01000054 -:1000700067010000710100007B01000085010000A4 -:100080008F01000099010000A3010000AD010000F4 -:10009000B7010000C1010000CB010000D501000044 -:1000A000DF010000E9010000F3010000FD01000094 -:1000B00007020000110200001B02000025020000E0 -:1000C0001FB5C046C04600F0EFFA04B00FB41FBD24 -:1000D00008205A49096809580847382057490968CB -:1000E000095808473C2055490968095808474020E5 -:1000F0005249096809580847442050490968095875 -:10010000084748204D490968095808474C204B4981 -:10011000096809580847502048490968095808479C -:100120005420464909680958084758204349096836 -:10013000095808475C204149096809580847602068 -:100140003E4909680958084764203C49096809582C -:100150000847682039490968095808476C20374919 -:100160000968095808477020344909680958084740 -:100170007420324909680958084778202F490968CE -:10018000095808477C202D490968095808478020EC -:100190002A490968095808478420284909680958E4 -:1001A0000847882025490968095808478C202349B1 -:1001B00009680958084790202049096809580847E4 -:1001C00094201E4909680958084798201B49096866 -:1001D000095808479C201949096809580847A02070 -:1001E0001649096809580847A4201449096809589C -:1001F0000847A8201149096809580847AC200F4949 -:10020000096809580847B0200C4909680958084787 -:10021000B4200A49096809580847B82007490968FD -:1002200009580847BC2005490968095808470000D3 -:1002300003480449024A034B7047000000000020B5 -:10024000C0070000C00700000122D84B5A6000BF61 -:10025000D74A1268002AFBD0016000BFD44A126856 -:10026000002AFBD00022D14B5A6000BFD04A12684E -:10027000002AFBD07047F0B505460E46174600240D -:1002800006E0A200B158A2005019FFF7DDFF641C80 -:10029000BC42F6D30020F0BD0120C043C549086030 -:1002A000401048607047014601229204086890425D -:1002B00001D9102070470020FCE7F0B505460C4638 -:1002C0001646002706E028462168FFF7BDFF2D1DD2 -:1002D000241D7F1CB742F6D3F0BD70B505460C4611 -:1002E0002E460BE0304600F075F9FF2C01D80024B3 -:1002F00001E0FF3C013C012080023618002CF1D1C6 -:1003000070BD0146012212044868904201D90920BB -:100310007047A9484069401C01D10F20F8E7002030 -:10032000F6E7FEB504462068030000F037FA05043E -:100330002B4249598B00201DFFF7E3FF0546002D96 -:1003400001D02846FEBDFFF7A7FF0120C00200F044 -:1003500041F9042221469948FFF78DFF002801D07A -:100360000320EFE708222146944800F06DF90028A9 -:1003700006D1002192480068FFF766FF00F00CF9F3 -:100380000320DFE7A768E6686068019031463846D9 -:10039000FFF7A3FF324638460199FFF78EFFB20000 -:1003A0003846019900F050F9002800D1CAE703202F -:1003B000C8E700F0E3F9834800688349086041E03A -:1003C00060680190E668A0680090B200009901980A -:1003D00000F03AF90746002F00D1B3E70E20B1E74D -:1003E000201DFFF760FF0546002D01D02846A9E734 -:1003F0006068002807D1FFF74FFF0320800200F05C -:10040000E9F800F0C9F8FFF747FF0120C00200F04B -:10041000E1F8042221466948FFF72DFF002801D0AA -:1004200003208FE708222146644800F00DF90028D8 -:1004300006D1002162480068FFF706FF00F0ACF823 -:1004400003207FE700BF00207CE770B505460C461F -:10045000182D04D12068FFF764FF206002E001201E -:10046000206000BF00BF70BDF0B589B05248406940 -:1004700003905248806881000398081802900398FE -:10048000000B01900121090302984018401E000B47 -:1004900000900124002520462946019A00F0C4F866 -:1004A0000022401E91410791069001260027304608 -:1004B0003946009A00F0B8F80022401E914105919B -:1004C0000490049BDB43059AD2430698184307998E -:1004D00011430791069037490698086007984860CD -:1004E00009B0F0BD70B53448446934488568466841 -:1004F000AA003146204600F0A7F8002801D00020CD -:1005000070BD0120FCE72D484068002801D0012083 -:1005100000E000200546FFF7E5FF002807D0FFF7C1 -:10052000BBFE0320800200F055F800F035F8FFF71D -:100530009BFF002D0ED020484669204884684768FC -:1005400021463046FFF7C9FE224639463046FFF7BE -:10055000B4FE00BF00F020F810B5184844681A48EF -:100560000460204600F0DCF810BD15480068006803 -:10057000401C01D100BFFEE710480068002802D0EF -:10058000042806D101E0FFF7BEFFFFF7E5FF00BF3B -:10059000FEE700BF00BFFEE7BFF34F8F0B480C49DB -:1005A000C860BFF34F8F00BFFEE7000000E50140C9 -:1005B00000E40140000600400010001000080000A8 -:1005C000B8070000BC070000000000200400FA0586 -:1005D00000ED00E010B50146104B1A6808460223F2 -:1005E0000F4C636000BF0F4B1B68002BFBD0531CEC -:1005F00004D0904202D20A4B186101E0084B986087 -:1006000000BF084B1B68002BFBD00023044C636029 -:1006100000BF044B1B68002BFBD010BD0010001066 -:1006200000E5014000E4014010B5202A04DB01464A -:10063000203A9140002010BD914020239C1A03468F -:10064000E3401943904010BD034610B50B439B0790 -:100650000FD1042A0DD308C810C9121FA342F8D025 -:1006600018BA21BA884201D9012010BD0020C04328 -:1006700010BD002A03D0D30703D0521C07E000208E -:1006800010BD03780C78401C491C1B1B07D1037854 -:100690000C78401C491C1B1B01D1921EF1D118463D -:1006A00010BD70477047704710B500F007F810BDD7 -:1006B000014B1B68DB6818470000002019481A49E5 -:1006C0007047FFF7FBFFFFF7FBFC00BD20BFFDE716 -:1006D0001649174C24688C420BD1164B1B68994263 -:1006E0000CD1154B154A1360186810498842EDD09B -:1006F0000AE0134880F30888124B18470F4A13602A -:1007000018680A498842E1D080F308880E49884277 -:1007100004DD0E48026802210A4302605B68184744 -:100720000346DFE7C0070000C0070000FFFFFFFF30 -:10073000000C000014100010001000000000002049 -:10074000000400206B05000000200020240500406C -:100750000D48704502D1EFF3098101E0EFF3088104 -:10076000886902380078182802D1C046074A104725 -:10077000074A12682C3212681047000000B5054B7A -:10078000054A9B58984700BDFDFFFFFF4B04000042 -:1007900000000020001000000400000030B4744687 -:1007A000641E2578641CAB4204D3635D5B00E318D0 -:1007B00030BC18471D46F8E7000C00000010000090 -:10100000F0210020FDB101005D22000063B101006C -:1010100000000000000000000000000000000000D0 -:101020000000000000000000000000006DB20100A0 -:1010300000000000000000005D2200005D220000B2 -:10104000D9B20100DFB201005D2200005D22000084 -:101050005D2200005D2200005D2200005D22000094 -:10106000E5B201005D2200005D220000EBB201004C -:101070005D220000F1B20100F7B20100FDB20100F3 -:101080005D2200005D2200005D2200005D22000064 -:101090005D2200005D2200005D2200005D22000054 -:1010A00003B3010009B301005D2200005D220000CE -:1010B0005D2200005D2200005D2200005D22000034 -:1010C00000F002F81AF07BF80CA030C80838241899 -:1010D0002D18A246671EAB4654465D46AC4201D170 -:1010E0001AF06DF87E460F3E0FCCB646012633420D -:1010F00000D0FB1AA246AB46334318477CA301003D -:10110000ACA30100103A02D378C878C1FAD85207CC -:1011100001D330C830C101D504680C6070470000AD -:101120000023002400250026103A01D378C1FBD803 -:10113000520700D330C100D50B6070471FB5C046C1 -:10114000C04619F0DEFF04B00FB41FBDF0B4404636 -:10115000494652465B460FB402A0013001B506482D -:10116000004700BF01BC86460FBC804689469246B8 -:101170009B46F0BC70470000C11000008269024924 -:101180008161024810447047911100000100000085 -:1011900001B41EB400B501F000FF01B40198864609 -:1011A00001BC01B01EBD0000401E00BF00BF00BF5B -:1011B00000BF00BF00BF00BF00BF00BF00BF00BF37 -:1011C00000BFF1D17047000070B505460C461646C9 -:1011D00002E00FCC0FC5103E102EFAD2082E02D31B -:1011E00003CC03C5083E042E07D301CC01C5361F2E -:1011F00003E021782970641C6D1C761EF9D270BD45 -:101200008307FF22DB0E9A408907090E99400028C8 -:101210000BDA0007000F0838830828489B001818CD -:10122000C36993430B43C3617047830824489B0001 -:101230001B181868904308431860704710B504469F -:1012400000210120FFF7DCFF00211820FFF7D8FF65 -:1012500000210B20FFF7D4FF02211920FFF7D0FF58 -:1012600002210D20FFF7CCFF02210E20FFF7C8FF5F -:1012700002210F20FFF7C4FF0221C81FFFF7C0FFA4 -:1012800003211620FFF7BCFF03211520FFF7B8FF4D -:10129000204600F019F8002010BD6721018070473A -:1012A00010B500F020F810BD0648704710B500F0EA -:1012B00022F810BD704770477047000000ED00E055 -:1012C00000E400E003F9004370B505462D4C08200A -:1012D0002070A01CFFF7E1FF5920A080294620467E -:1012E00000F0B3FB70BD10B500F0B8FB254900203D -:1012F000891E087010BDF8B5224E0446B61E30781F -:1013000001270D46002807D0204660380B2808D852 -:10131000204600F059FF2BE0602CF9D01A480860F5 -:10132000F8BD20466C38032803D8204600F08DFF16 -:101330001EE0204670381F2803D8204600F047F9E9 -:1013400016E0204690380F2803D8204600F0EAF82F -:101350000EE02046A0380F2803D8204600F076F88B -:1013600006E02046B0380F2804D8204600F0E2F905 -:10137000286000E02F60602CD2D128680028CFD1EF -:101380003770F8BD1A000020013000000120254907 -:10139000C003086024490020087007202349C005C5 -:1013A0008860704770B5204D04462878A04207D069 -:1013B000002C05D0002803D01DA14D2019F0CBFE34 -:1013C0002878A0420ED000211E4A18482C70002C0C -:1013D0001BD01D4B012C06D0022C0DD014A168206F -:1013E00019F0B9FE70BD1160022111605361032133 -:1013F00009068160416070BD116003211160536175 -:101400000121C9058160416070BD11601160072133 -:10141000C905816070BD10B505A1712019F09BFE52 -:1014200010BD000080E100E02000002000F5014038 -:101430007372635C68616C5F63636D5F6161722E80 -:101440006300000000F500408401002010B5A038C2 -:10145000030019F0A1FF0B070E172028313A414B6A -:10146000525C65004B6808788A68194603F0D9F920 -:1014700010BD88888A6883B20888194680B203F054 -:10148000DFF910BD08884C68CB688A6880B22146B5 -:1014900003F0DAF910BD08884B688A6880B21946F3 -:1014A00003F0EEF910BD88888A6883B2088819466F -:1014B00080B203F0FAF910BD88888A6883B2088880 -:1014C000194680B203F034FA10BD08884A6880B229 -:1014D000114603F073FA10BD088982B2888883B27E -:1014E0000888194680B203F074FA10BD08884A686B -:1014F00080B2114603F091FA10BD08894C6882B29F -:101500000888CB6880B2214603F00AFB10BD08882A -:101510004C68CB688A6880B2214603F01BFC10BD82 -:10152000012010BD10B59038030019F035FF0906F1 -:101530000F161D242C363F464E0088888A6883B2D9 -:101540000888194680B204F01DF910BD08884A6861 -:1015500080B2114604F051F910BD08884A6880B283 -:10156000114604F056F910BD08884A6880B2114649 -:1015700004F05CF910BD08884B688A6880B219468F -:1015800004F067F910BD088982B2888883B20888A0 -:10159000194680B204F066F910BD08894B6882B222 -:1015A0000888194680B204F07CF910BD08884A68A2 -:1015B00080B2114604F087F910BD888882B208888D -:1015C000114680B204F0DBF910BD012010BD10B54A -:1015D0007038030019F0E0FE1B0F15192125282F84 -:1015E000363B4044484C53585F68707881889095EA -:1015F000999CA2A5AC004A680878114607F019FC2E -:1016000010BD086807F066FC10BD0C790B7B8A687A -:101610000868214607F06FFC10BD086807F000FD60 -:1016200010BD07F08CF910BD08884A6880B21146D9 -:1016300007F034FE10BD0A790888114680B207F021 -:10164000C4FE10BD087840B207F0CDFE10BD08887A -:1016500080B207F0E1FE10BD086807F0EFFE10BD94 -:10166000086801F0ECFB10BD086801F016FC10BD25 -:10167000088982B209C9194607F0F8FE10BD05C9EC -:10168000114607F042FF10BD08884A6880B2114633 -:1016900009F0FAF910BD0C790888CB688A6880B225 -:1016A000214609F0CDFA10BD0B7908888A6880B20E -:1016B000194609F07DFC10BD08884B688A6880B225 -:1016C000194609F0EEFC10BD08884C68CB688A68A2 -:1016D00080B2214609F053FD10BD08884A6880B2E7 -:1016E000114609F08CFD10BD0B7908880A7A80B28A -:1016F000194607F02DFF10BD088880B207F02DFFB6 -:1017000010BD086807F030FF10BD07F0FCF810BDF1 -:101710008A6809C9194607F08CFF10BD07F0DCF88C -:1017200010BD08884A6880B2114608F05BF810BD09 -:10173000012010BD10B5B02805D0B12808D0B228BE -:101740000BD0012010BD088880B20AF056F910BDF8 -:10175000088880B20AF070F910BD08884B688A6862 -:1017600080B219460AF079F910BD000010B50300E7 -:1017700019F012FE0A0609060C0C0F0F06060612D7 -:1017800007F005F910BD09F027FF10BD01F042FA7E -:1017900010BD06F075FA10BDFAA1FE4819F0DBFC89 -:1017A00010BD7FB5FC49054603C901900291132085 -:1017B000800169468881F94A0F2310460A2128389A -:1017C0000AF043FE0024F6480AF05DFE641CE4B211 -:1017D0000A2CF8D304200090F04801231A4603A9EC -:1017E000F0300AF05DFA002804D0FF20E5A1533064 -:1017F00019F0B1FC686800F024FC00211E220846A4 -:1018000004F040F907F0C6FA02222421E54801F06D -:101810007FFBE44801222C214C3001F079FBE149A7 -:101820000B20B03901F000FA002804D0FF20D5A128 -:10183000673019F090FC09F09FFE02F075F901ABDA -:1018400000220821D8A007F085F9002804D0FF2045 -:10185000CCA16D3019F07FFC284602F0C2FC0028B4 -:1018600004D0FF20C7A16F3019F075FCDB2189007F -:10187000D04819F045FBCF48012141710221817107 -:101880000621C1717FBD10B5CA4CA078092804D3C8 -:10189000FF20BCA1A73019F05EFC207860214843EE -:1018A000001900210173417BF722C908C900C91C36 -:1018B0001140EF22114041730121E1700C3010BD45 -:1018C00070B50E4600211C4619801546030019F01C -:1018D00063FD0723050B1711231D2300224629460C -:1018E000304609F096FE70BD22462946304606F085 -:1018F00098FE70BD22462946304601F0C2FF70BDF9 -:1019000022462946304603F0C0FD70BD22462946D6 -:10191000304600F010FC70BD9E489AA1D53819F0F1 -:101920001AFC032070BD70B5A24CE078002818D0D6 -:101930002078602148430019407B00254007400F74 -:1019400001190879401E08712078401CC0B220702F -:10195000092800D12570A078401CA0700AF01DFF56 -:10196000E57070BD9348C079002800D08BE77047C0 -:1019700070B5904DA86800280CD0FFF7F3FF002841 -:1019800062D06022A968FFF71FFCFFF7CCFF0020A0 -:10199000A860EFE76879002856D0FFF774FF044687 -:1019A00080484C3001F0C4FA6060002804D1C9209E -:1019B00074A1800019F0CFFB60680AF0EAF80028F3 -:1019C0000DD0204606F011FD6078010703D5C00850 -:1019D000C000401C2BE0734861684C302DE071481A -:1019E00061684C3001F0ADFA00F05AFB00282BD1B1 -:1019F000FFF749FF04466B4801F09AFA606000283F -:101A000004D164485FA16D3019F0A5FB60680AF04D -:101A1000C4F8002814D0606800886080204609F06F -:101A20002BFE6078010706D5C008C000801C6070DE -:101A3000FFF779FF9EE75B48616801F082FA99E75A -:101A40005848616801F07DFA70BD10B55A4CE160EC -:101A5000A0605A4800F034FC607010BD5649002068 -:101A60000870704770B5564E0546706A94B00C46C3 -:101A7000401C04D1B06AC0430004000C0BD0306A93 -:101A8000C007C00F2870706A19F03CFAB06A207164 -:101A9000000A607114E02B206946087009A96846A5 -:101AA0000AF04BF8002804D0972036A1800019F0E6 -:101AB00052FB0120287006220AA9204619F0C1F91C -:101AC0002878002803D06079C0210843607114B0E1 -:101AD00070BDF0B53A4C0646206895B00D463746C5 -:101AE0000837401C08D16068401C05D1A068401C24 -:101AF00002D1E068401C11D02068314619F002FA8A -:101B00006068311D19F0FEF9A068394619F0FAF93C -:101B1000E06831460C3119F0F5F925E02B206946D3 -:101B2000087009A968460AF008F8002804D0194886 -:101B300014A1553819F00FFB08220AA9304619F0F4 -:101B400080F92B206946087009A9684609F0F5FF5D -:101B5000002804D0A3200BA1800019F0FCFA082271 -:101B60000AA9384619F06DF920692E460836401C3E -:101B700029D16069401C26D1A069401C23D1E069AD -:101B8000401C1FE07372635C686F73745F636F72F5 -:101B9000652E6300DA020000B4B30100D801002012 -:101BA0006D170000A40B00206E52463531383232DA -:101BB00000000000880700202400002071190000A8 -:101BC0008000001012D02069294619F09BF9606945 -:101BD000291D19F097F9A069314619F093F9E069C8 -:101BE00029460C3119F08EF915B0F0BD2B2468464A -:101BF000047009A909F0A1FF002803D0F649F748AD -:101C000019F0A9FA082209AF28460AA919F019F90A -:101C10006846047009A909F090FF002804D0EF4835 -:101C2000ED49C01D19F097FA0822391D304619F008 -:101C300008F9D9E770B5EA4C0546A068002804D039 -:101C40000320E549000219F086FAA56070BD10B5C1 -:101C50000146E44801F075F9E1498879401CC0B2B9 -:101C60008871012803D1E048407800F04DFB10BD99 -:101C700070B50446DD4816460D46814204D1D7486A -:101C8000D549CB3019F067FA012E05D0E120D249B1 -:101C9000800019F060FA70BD66202070002020726C -:101CA000A5810120A07370BD70B515460C4606468F -:101CB000FFF758FE00280CD06621017046800121F4 -:101CC000017221680161A18881820573FFF72BFEF3 -:101CD00070BD1321304607F078FB70BDC2494968DA -:101CE000884201D210207047032101700020704704 -:101CF00070B5BD4C05462078002694B0002801D070 -:101D00000820E4E6BA4A6260954201D21020DEE67D -:101D10006868002809D00921D82804D3C31C9B086F -:101D20009B00834205D00846D1E60320400268604C -:101D30000EE0012109074B6B896B4B43AD49511AEA -:101D40000122591AD202891A814201D20421EAE7FA -:101D500000F052FF6178A0680CF04EFBE068401E76 -:101D600007280BD8302269460A70887068460DF043 -:101D700088FF002802D009A80CF0FBFC2846FFF7DA -:101D800010FD012020703046A1E6F8B504469648C3 -:101D90000F464068814208D3002C01D0844204D30E -:101DA000E01C80088000A04201D01020F8BD8C48C3 -:101DB0008178002911D039880091417860225143FF -:101DC0000D18287B0C350007000F3B4600222946E2 -:101DD000FFF776FD060004D015E0002038800520CE -:101DE000F8BD002C13D039880098814201D90C2607 -:101DF0000DE028783B460007000F22462946FFF7F2 -:101E00005FFD060005D00C2E01D000203880304642 -:101E1000F8BD734C6078401CC0B26070092801D1D5 -:101E200000206070A078401EA07068784107490FBC -:101E300001290ED0022906D003291AD066496E481E -:101E400019F089F9E3E7C006E1D46868FFF7FFFEFF -:101E5000DDE7644869684C3001F073F86079401C34 -:101E6000C0B260710128D2D15F48407800F04CFACE -:101E7000CDE7E079401CE071C9E7604A10B59042B7 -:101E800009D3594A0124A4045268A04201D39042C4 -:101E900001D3914201D2102010BD00F0FEFE10BD12 -:101EA000564B10B5994209D34F4B0124A4045B68EB -:101EB000A14201D3994201D39A4201D2102010BD10 -:101EC000022803D0102801D0092010BD00F00BFF1C -:101ED0000028FAD0052010BD484B10B598420DD30C -:101EE000414B0124A4045B68A04201D3984205D36E -:101EF000994203D3002A03D09A4201D2102010BD88 -:101F000000F017FF0028FAD0072010BD10B50446D6 -:101F1000354894B04068844202D2102014B010BDFD -:101F20000F2008A9087369460BA809F006FE0028CF -:101F3000F4D16846007A207068464089608068461F -:101F40008089A0800020E9E710B500290BD0264A3F -:101F50005268914202D30B68934201D2102010BD07 -:101F60008A88002A02D001F037FE10BD092010BD7A -:101F700010B5224A94B091420ED31B4A01239B0410 -:101F80005268994201D3914206D3441E1E2C41D877 -:101F9000994203D3914201D21020BFE7012837D1E3 -:101FA00008780024C007C00F002803D0032069462A -:101FB000887001E06846847038206946087009A975 -:101FC000684609F0BAFD002804D004480CA18B38FB -:101FD00019F0C1F82046A1E7841B0000AA02000006 -:101FE00088070020A40B002024000020FFFF000031 -:101FF00000220020000000202104000000C0010099 -:102000007372635C686F73745F636F72652E6300D5 -:10201000072083E70246203A1F2AF9D806F001FE7E -:102020007CE710B5604A5268914201D2102010BD81 -:102030000246203A1F2A02D806F068FE10BD07208B -:1020400010BD70B50546594C002020702046461939 -:1020500055484660E01C80088000A04204D0FF2064 -:102060005349293019F077F801200007C06AC043AE -:102070000006000E03D14F480068401C03D04E48B4 -:102080004E49301AC862A8B20422214604F00DF964 -:10209000002804D0FF204649393019F05CF870BDA3 -:1020A000F0B595B03B2008A9087369460BA809F064 -:1020B00044FD002804D0FF203D49813019F04BF841 -:1020C0003F4E00246D4630E02F19B87DC10706D081 -:1020D000400704D460004019C08809F0E9FB394882 -:1020E000807900281FD0B87D80071CD5600040197A -:1020F000C0880022062109F0F7FB002813D03C21FC -:1021000008A8017360004019C1886846C185694606 -:102110000BA809F012FD06000BD0FF2024499630D1 -:1021200019F019F805E0641CE4B268460079A04291 -:10213000CAD8304658E5F7B50546007800270009AB -:102140000C463E46062804D0FF201949BF3019F03E -:1021500002F8287A00280ED0012814D0FF20144954 -:10216000E03018F0F8FF0298002C068001D027809C -:1021700066800020FEBD02270926002C10D0A88909 -:10218000A080A87B0AE003271426002C08D06888CA -:10219000A0802869E060A88A2082287B2072E2E77C -:1021A00002980680E5E700002400002000220020BD -:1021B000002000000010001000000020000500407A -:1021C000043000008807002010B56038030019F0C3 -:1021D000E3F80A060A0F13181F252930353A086854 -:1021E000FFF786FD10BD05C91146FFF7CEFD10BDF6 -:1021F0000868FFF773FD10BD05C91146FFF73DFEE6 -:1022000010BD4B6808788A681946FFF749FE10BD73 -:102210008A6809C91946FFF75FFE10BD0868FFF715 -:1022200075FE10BD08884A6880B21146FFF78CFE23 -:1022300010BD05C91146FFF79BFE10BD05C911462B -:10224000FFF7EFFE10BD012010BD01207047000018 -:102250000E4A12680C498A420AD118470B4A126882 -:10226000094B9A4204D101B500F08EFE03BC8E46A4 -:10227000074909680958084706480749054A064BAF -:102280007047000000000000BEBAFECA64000020D3 -:1022900004000020F0210020F021002001203F490F -:1022A000400608603E4908603E490A68FF231B0259 -:1022B0009A4383121A430A6038498039086070478C -:1022C00010B502460420384904E0C3005B181B79AE -:1022D000002B0AD00346401EC0B2002BF5D133A11B -:1022E000432018F038FFFF2010BDC300CA50002261 -:1022F00059184A718A7101220A7110BD2A4A0021B7 -:10230000C00080180171704710B50446042803D33B -:1023100026A1522018F01FFF2348E1000C18207955 -:10232000012803D021A1532018F015FF6079A1796D -:10233000401CC0B2814200D06071012017494006A4 -:102340008031086010BD70B5164804250068164E2F -:102350000004800F1B4C02281AD014A1692018F029 -:10236000FAFE15E02078C10088190279012A07D108 -:10237000427983799A4203D04279827170588047BA -:102380002078401CC0B22070042801D300202070A7 -:1023900028466D1EEDB20028E4D170BD80E100E05A -:1023A00080E200E018E400E0200C00207372635C1F -:1023B000736F635F7369676E616C6C696E672E63C0 -:1023C000000000003400002010B5EFF31080C407B7 -:1023D000E40F72B6D2484178491C41704078012818 -:1023E00001D10AF0FFF9002C00D162B610BD70B522 -:1023F000CB4CE07800280AD10125E570FFF7E4FF17 -:102400000AF0F8F9002804D000200AF0CBF90020E7 -:1024100070BDC44865714560F9E770B5EFF3108091 -:10242000C507ED0F72B6BE4C6078002803D1BEA17F -:102430008F2018F090FE6078401E60706078002851 -:1024400001D10AF0D3F9002D00D162B670BD10B5EC -:10245000B348C178002904D000214171C170FFF751 -:10246000DCFF002010BD10B504460AF0C3F9AC49EA -:10247000C978084000D001202060002010BDF8B5C8 -:102480000246A74C0026A67108200421012510272A -:10249000130018F081FF0D080A0C0E101214161EFE -:1024A000262123252800257122E0022001E0217148 -:1024B0001EE020711CE027711AE02020F9E70126B8 -:1024C00016E0FFF781FF0AF095F90028FBD00226FD -:1024D0000EE02171A5710BE02771FBE7202000E0E1 -:1024E00040202071F6E7FF208FA1763018F033FEF0 -:1024F0000AF08CF9002809D00AF08EF9B04205D113 -:1025000030460AF08CF90028FAD02CE00120800730 -:10251000C560894900224A60884A9661814B02223F -:102520005A60856086480269D243D206D51702698F -:1025300010231A4302610F466D1C00E020BF78682B -:102540000028FBD030460AF06AF90028FAD0002DA6 -:1025500004D17B48026910218A430261714902203B -:10256000886000207860A07900280CD00AF042F939 -:1025700005460AF09FF8734A002D02D0A260E06081 -:1025800001E0E260A060002E01D100F0A5F8F8BDE6 -:1025900010B504460AF034F9002805D0604901203E -:1025A000C8704A78521C4A702046FFF768FF10BD79 -:1025B000F8B5614DA8680026012802D1AE600AF086 -:1025C000F1F86868012800D16E6028680127544C32 -:1025D000012812D12E606079002803D000200AF073 -:1025E000E1F866712078002807D00AF003F9002886 -:1025F00003D0012080070761A770286901282AD12C -:102600002E6100F05FF8012080074761A079002863 -:1026100015D00AF0EFF800900AF04CF80099002964 -:1026200001D0E16800E0A168411A022901DA8A1CA0 -:1026300011DC0099002901D0E06000E0A060FFF704 -:10264000C3FE0AF0D7F8002804D0012080070761F4 -:10265000A77000E02770E868012812D100F032F876 -:1026600000F030F800F02EF8A078002804D1FF2008 -:102670002DA1033018F06FFDEE60A6702670FFF7F5 -:10268000CCFEF8BD10B5264CE078002801D10AF048 -:10269000ADF801208107886100F014F8A0780028C7 -:1026A0000BD0254CE068002803D10AF0B8F80028C8 -:1026B000F8D10020E06000F005F800201949C0437F -:1026C000886010BD08B55020694608806A461088A9 -:1026D000411E1180FAD208BDF8B51248192787604B -:1026E000154900200860C8600AF084F8BE0701247C -:1026F0000B4D002802D03461AC7000E02C70FFF765 -:1027000063FE084847600D4928798863FFF7DAFFC0 -:10271000B461FFF7D7FF0849002008617461F8BD74 -:1027200038000020000300407372635C736F635FC6 -:10273000636C6F636B2E6300000100400005004076 -:1027400000ED00E0FFFFFF7F8107C90E002808DAD7 -:102750000007000F083880082E4A80008018C069E2 -:1027600004E080082C4A800080180068C8400006F9 -:10277000800F704710B50D20FFF7E6FFC4B20420AC -:10278000C043FFF7E1FFC0B2844203D023A11A2067 -:1027900018F0E1FC26490120486010BD0121254ABE -:1027A00048031060244B00221A60244A5160244AD6 -:1027B0001060244A11601F49803908607047012168 -:1027C0001C4A480310601F4A51601B4A00211160D7 -:1027D0001B490860704710B517490868012804D0E4 -:1027E0000EA1572018F0B7FC10BD114880680022D8 -:1027F000C0B20A6009F0BEFC10BD10B50E480168F9 -:102800000029FCD0FFF7E7FF01200D4940030860D5 -:1028100010BD000000ED00E000E400E07372635CB6 -:10282000736F635F68616C5F726E672E6300000098 -:1028300000D5004080E100E000D1004000D300401E -:1028400080E200E000D0004030B40121BC48C90261 -:102850000160CD1005604A030260BA4803681B029C -:102860001B0A036004680023240A24020460B6489B -:102870000468240A24020460B4480124446084608B -:10288000B34C23606360A360B24B19601D601A6093 -:10289000B14B19601A600121016030BC704710B45F -:1028A0000121A748CA0202600B0203600C06046003 -:1028B000A64841608160A94841680029FCD1A4492B -:1028C0000020086048608860A248026003600460DD -:1028D00010BC704701219F48C9020160C910016006 -:1028E0007047002805D0012805D0022805D19C4852 -:1028F00070479C4870479C48704710B59BA18B203F -:1029000018F029FC002010BD70B500219E4C9F4D91 -:102910009F4A8F4B002808D001281DD0022822D0C2 -:1029200092A1B32018F017FC70BD01200004A06034 -:10293000A86011601960974BC2039A60964A906034 -:102940007F4A0012106095480160864801609448F3 -:1029500001609448017070BD01204004A060A8602F -:102960005160596070BD01208004A060A860916032 -:10297000996070BDF8B59446834A8B4F834D00240F -:102980000126002808D0012832D0022840D077A1A3 -:10299000E82018F0E0FBF8BD891E0902090A0120B1 -:1029A000000490603C6468606C4A1164012B1DD087 -:1029B00000217C4A7D4B51706146DC63DE637C4BB9 -:1029C0005C6002249C6004241C61744B3D311960DE -:1029D00073490E605F4B891519606F4B58605E48F4 -:1029E00001606C49C00548601670F8BD0121E0E740 -:1029F0000120704E4004704F012B04D134645060AC -:102A000068603964F8BD9060346468603964F8BD0A -:102A100001206A4E80046A4F012BF4D1EEE74F4843 -:102A20004068704770B54A4D28680026564C01280A -:102A300006D1A068C00303D501200004A0602E6069 -:102A40006868012809D1A068800306D501204004E8 -:102A5000A0606E6001200AF0B9FEA868012809D1C3 -:102A6000A068400306D501208004A060AE6002206B -:102A70000AF0ACFE70BD10B54A490878002818D09D -:102A80000120444AC0079060434AC00B90602C4A22 -:102A900000121060414A00201060324A1060404A23 -:102AA000106008704A78002A02D048700AF08EFE42 -:102AB00010BD0320FAE70120424900060860704774 -:102AC0000120244900060860704701203D49400567 -:102AD0000860704701201F4940050860704733496E -:102AE0000020C86388151B4908607047410A364AB0 -:102AF000C005C00D5043801C5143400A0818704760 -:102B000010B4324C430B63431B0C5C020C602E4C24 -:102B10006343C31A2E485C0258432B4B400D43437A -:102B2000E31A0124DB0324041B191B1613700A6823 -:102B30001018086010BC704710B50AF01BFF10BDDC -:102B400080E100E008E400E018E400E000B00040AC -:102B500040B1004080E200E000E100E000B500404C -:102B600048B100404081004044B100407372635C52 -:102B700072656D5F68616C5F6576656E745F7469C0 -:102B80006D65722E6300000000B3004040B300404A -:102B900040B5004000F50140008300404085004002 -:102BA000008200404800002000B10040C08F00407B -:102BB0000085004004B1004004B5004008B1004069 -:102BC00008B5004000E200E0093D00003786000043 -:102BD0006F0C010010B50AF0B9FE10BD00200449C9 -:102BE000C863012001218140024A116000BF704783 -:102BF000C01F004080E200E010B50DF05DF909F063 -:102C0000F7F9FEF7C3FB0FF0F5FA0DF08FFF0DF0AB -:102C10001BFF10BD70B50C46054603F0A7FA214610 -:102C200028460EF0C2FF70BD70B50D46040012D0EC -:102C3000002D10D02101284618F060F910225449C7 -:102C4000284618F0FEF852480121083801804480D7 -:102C50004560002070BD012070BD70B54C4E002451 -:102C60000546083E11E0716820014018817BAA7B6F -:102C7000914209D1C17BEA7B914205D10C222946C0 -:102C800018F0B2F8002806D0641C30888442EADBD1 -:102C90000020C04370BD204670BD70B50D460600D3 -:102CA0000AD0002D08D03A4C083C20886188401C8E -:102CB000884203D9042070BD102070BD3046FFF754 -:102CC000CCFF002801DB401C0AE02088616800017D -:102CD00040181022314618F0B4F82088401C20809B -:102CE0002870002070BD70B514460D001FD0002C58 -:102CF0001DD00021A170022802D0102817D108E0B1 -:102D0000687829780002084311D00121A170108051 -:102D10000BE02846FFF7A1FF002808DB401CA0704D -:102D2000687B297B000208432080002070BD0120C1 -:102D300070BD70B5054614460E000AD000203070F4 -:102D4000A878012807D004D9114908390A88904287 -:102D50000BD9012070BD002C04D028782070288861 -:102D6000000A50700220087010E0002C0CD0496856 -:102D70000001411810222046103918F062F8287816 -:102D800020732888000A607310203070002070BD06 -:102D9000540000205A4910B5884207D30121890404 -:102DA000884205D357490968884201D2102010BDD6 -:102DB0000146012005F0CBF810BD30B5044693B0B4 -:102DC00000200D46079014210BA818F099F81C213B -:102DD000684618F095F86A46112010770020507761 -:102DE000107802210843107007A80C90012008AA4F -:102DF000907245486A4610850AA80B902088108476 -:102E000060885084A0889084E088D084907FF921E5 -:102E10000840801C4008400090770820908610876A -:102E200008A80F9010AA0BA9684600F05CFF0028C4 -:102E300003D110A800882880002013B030BD3EB513 -:102E400004460820694608802D48844207D30120A3 -:102E50008004844205D32B480068844201D21020AC -:102E60003EBD2146012005F072F80028F8D12088E7 -:102E7000694688806088C880A0880881E088488189 -:102E800005F065FE01AB6A46002101F0BBFB694617 -:102E900009880829E4D003203EBD1FB50446002060 -:102EA000029008206946088115480391844207D39F -:102EB00001208004844206D312480068844202D272 -:102EC000102004B010BD05F042FE014602AA0F48D2 -:102ED00001F02EFD0028F4D169460989082901D0A6 -:102EE0000320EEE7694609882180694649886180A8 -:102EF00069468988A1806946C988E180E1E70000C8 -:102F000000C0010028000020042A0000FFFF00008C -:102F100010B5031D03600020521E04E05C181C6005 -:102F2000401C2346C0B29042F8DB0020186010BD60 -:102F300001460A680020002A02D0104612680A6082 -:102F4000704702680A6001607047000010B50146D2 -:102F50002022094817F075FF07490020C877084666 -:102F600010BD0649012048610548064A01689142A2 -:102F700001D1002101607047B00E00200005004023 -:102F800064000020BEBAFECA0C4908784A78401C8A -:102F9000C0B2904200D008707047094A074820BF6D -:102FA00040BF20BF4178037843701368002B02D1E3 -:102FB00003788B42F3D00020704700006B000020A4 -:102FC00000E200E00A4A022151600A490B68002B26 -:102FD000FCD0906008680028FCD000205060086891 -:102FE0000028FCD0704701200007406970470000AE -:102FF00000E5014000E401407047704770477047AA -:1030000010FFFFFFDBE5B15100C001006700FFFFCB -:1030100003B40148019001BD09000020002803D03D -:103020008178012939D101E0102070470188FE4ADA -:10303000881A914233D01BDCFC4A881A91422ED068 -:103040000BDC00292BD00320C002081A27D001284E -:1030500025D001210903401A07E001281FD00228CA -:103060001DD0FF281BD0FF380138002815D116E0ED -:10307000FF220132811A904211D008DC01280ED0C3 -:1030800002280CD0FE280AD0FF2806D107E001292B -:1030900005D0022903D0032901D0002070470F205A -:1030A000704700B50B2826D009DC030018F074F92E -:1030B0000B1D2125251B25292325271F1B00112832 -:1030C0001BD008DC0C2816D00D281CD00F2814D0DB -:1030D000102808D10FE0822809D084280FD0852835 -:1030E0000FD0872811D0032000BD002000BD05208F -:1030F00000BDCF4800BD072000BD0F2000BD04204B -:1031000000BD062000BD0C2000BD0D20800200BDCA -:1031100070B500290BD0CB1FFA3B81241E46CDB2DF -:10312000112B1BD2012805D0022806D009E000206F -:1031300010701DE0FF20043001E0FF2003308142C9 -:1031400018D0330018F028F9111613131613161699 -:103150001316161613131313161316000846FF380A -:1031600081381F2803D9FF39FE39022902D815708A -:10317000002070BD1470072070BD00B5030018F06A -:103180000BF9060406040C080A0C002000BD1120EF -:1031900000BD072000BD082000BD032000BD007851 -:1031A0000207120F04D0012A05D0022A0AD10EE02C -:1031B000000907D108E00009012805D0022803D042 -:1031C000032801D0072070470870002070470620B0 -:1031D0007047002807D0012807D0022807D003280D -:1031E00007D007207047002004E0112002E02120D2 -:1031F00000E0312008700020704738B50C4605000B -:103200004FD06946FFF7CBFF002822D12088032149 -:1032100089028843694609788907090D0843208097 -:103220006946681CFFF7BBFF002812D121880320E4 -:1032300000038143684600788007800C01432180A9 -:10324000A8784007820F2020012A03D0022A03D049 -:10325000072038BD814300E00143218088B2010589 -:10326000890F08D0012189038843A9780907C90F6C -:1032700089030843208080B28104890F0AD0A9788D -:103280004004C906C90F400CC903084320808004CC -:10329000800F02D12088400403D5208840210843B4 -:1032A0002080002038BD70B50446002008801546F7 -:1032B0006068FFF7A2FF002815D12189A08981420B -:1032C00010D861688978C90708D00121490288426D -:1032D00008D8491C17F01EFE298009E0FF21FF31A4 -:1032E000884201D90C2070BDFF30FF3003302880A8 -:1032F000002070BD10B5137804785B08E4075B000C -:10330000E40F23431370FD2423400478A407E40F43 -:10331000640023431370FB24234004786407E40F04 -:10332000A40023431370F724234004782407E40FF8 -:10333000E40023431370EF2423400478E406E40FF1 -:10334000240123431370DF2423400478A406E40FF0 -:103350006401234313700078BF244006C00F23404C -:10336000800103431370002906D00878C10701D1FA -:10337000800701D5012000E00020C0015906490E58 -:103380000843107010BD30B50A8803239B020488DF -:103390009A4323059D0F02D1A3049C0F01D09B0FDC -:1033A00000E001239B021A4303230A801B039A4374 -:1033B00003889804840F02D11805830F01D0800F71 -:1033C00000E00120000302430A8030BDF3B593B052 -:1033D0000D000FD0139800280FD01221284617F0A7 -:1033E0008DFD03AAFF21012003F0D5F80024264615 -:1033F00037467AE0102015B0F0BD0720FBE768469D -:10340000807D01280BD16846818A0520C002081AF8 -:1034100010D0012810D0022812D0032812D0042C7A -:1034200014D0052C15D113E002290000012800005A -:1034300003300000012400E002246846468A08E0C8 -:10344000032406E068460424478A02E0052400E0DD -:1034500006246846418A1398814246D12C74002E76 -:1034600041D00DAA0EA905200292019100901023CF -:103470000022FF21304603F02FF9002823D16846AF -:10348000808E2A46C0B20EA9FFF72DFC00281AD163 -:10349000AE81002F27D00DA9052008AE0291009023 -:1034A000132300220196FF21384603F015F9002866 -:1034B00009D16846808EF11CC01EC0B22A1DFFF7DC -:1034C00012FC002801D0032095E708A881784278F3 -:1034D00008021043E881062C05D16846807DA87259 -:1034E0006846808A2881002085E703A803F05CF8FD -:1034F000002884D0FFF7D5FD7DE7002805D0FE4ADF -:10350000012903D0022903D003207047518800E02D -:103510009188814201D1002070470720704770B523 -:103520000C4605461C21204617F0E8FC00202080B0 -:10353000002D08D0012D04D0F0A1F54817F00BFEA6 -:1035400070BD062000E00520A07070BD70B592B07F -:103550001546064601206A461071107453740846D9 -:1035600008300395029048889082FEF7FBF904002A -:1035700019D06580172069468883203600940AABED -:103580007178023307AA01A80EF017F90646607891 -:10359000000701D5FEF7C7F9002E0AD03046FFF725 -:1035A000ECFD12B070BD1321284605F00EFF03207C -:1035B000F7E708A800906846838B0422012128467B -:1035C00007F0B3FEEDE770B506468AB000200D4661 -:1035D00007900590069003A90490052402460291E5 -:1035E0000190102300942946304603F075F8002816 -:1035F0000DD108A804A9009102900194684683891E -:1036000000222946304602F083FE002801D0FFF751 -:1036100048FD0AB070BD10B50EF0D5FA10BDF0B57A -:1036200089B000260546059600780C460827030059 -:1036300017F0B2FE0CFD070C390B75759BBEFCD361 -:10364000E3FD68680A38FEF702FB07E1A88800225C -:1036500080B20421009008F067FB0290002C04D097 -:10366000AB48A6A16E3017F076FD0298002804D171 -:10367000A748A2A16F3017F06EFD0298009908309C -:103680000DF0D0FCFEF76EF9040007D060783843E7 -:10369000607000986080FEF746F9E1E01321009821 -:1036A00005F093FEEAE0002C04D1BD2093A1800038 -:1036B00017F051FD60880022042108F035FB0090CE -:1036C000002804D192488DA1883017F044FD00995C -:1036D000002008802A7994461EE0C3005B199B688D -:1036E00007936B469B8B1A0708D5DA0606D560460A -:1036F000C20050194038C08F088006E05B0409D52D -:103700000871C2005019C0884880607838436070E2 -:103710000226A3E0401CC0B28445DED89EE0E888C3 -:10372000694608800090002C04D1794873A1983034 -:1037300017F011FD2878062813D10098C00B10D07F -:1037400060880022042108F0EFFA060004D17048D6 -:103750006AA1A23017F0FFFC00203071A8887080A9 -:1037600039E060783843607078E0002C04D1684814 -:1037700062A1B43017F0EFFC60880022042108F049 -:10378000D3FA0090002804D161485CA1B73017F04B -:10379000E2FC009808300EF068FA0121484002D19E -:1037A000E888C00B5AD0009861880226C180D8E70B -:1037B000002C04D1564851A1D03017F0CCFC6088C1 -:1037C0000022042108F0B0FA002804D150484BA18F -:1037D000D33017F0C0FC0226C3E7002C04D14C48BC -:1037E00046A1DC3017F0B7FC022661880122204692 -:1037F000FEF73EFA01200590B3E7A889002280B2C7 -:103800000421009008F090FA0746002C04D04048AC -:103810003AA1EE3017F09FFC002F04D13C4837A1AD -:10382000EF3017F098FC6868029001E009E010E0C2 -:10383000288969468881012202A90098FEF734FA96 -:103840000CE0002C8DD16D202CA1C00017F083FC62 -:1038500087E72F4829A1FE3017F07DFC002C0DD002 -:10386000607800070AD50598002807D184202070C9 -:103870002046582229460830FDF7A6FC304609B0FC -:10388000F0BDF7B50C460546007A224688B00A32EC -:103890000492921C01920027811E16323E4602922B -:1038A0000B0017F079FD08F405F348488ED0F2F3C9 -:1038B00068880022042108F037FA0190002803D11B -:1038C0000EA1144817F047FC01980088002802D088 -:1038D0005227072600E151271E26002C70D0688849 -:1038E000A0800120A071019804990079C0004019BE -:1038F000C089FFF76BFD0FE0400C00207372635C22 -:1039000067617474735F636F72652E6300000000FB -:103910006F0200008603000000287DD10198007925 -:10392000C0004019C089208101980079C000401969 -:10393000408AA083F0E0698A0091062820D1E889B6 -:10394000C00B1DD008462230512786B2002CC5D0AE -:10395000A8890199FFF73AFD002872D16888A080F4 -:103960000220A071A88920810120A072288AE0830A -:10397000009820846969009A029817F062FACBE0F7 -:1039800008462030502786B2002CA7D0A889049979 -:10399000FFF71CFD002854D16888A080A889E0802A -:1039A000287A06280AD002202072288AA08300984C -:1039B000E083204669692030009ADEE70120F3E7C2 -:1039C0008FE068880022042108F0AEF90690688A2A -:1039D00000900698002803D1FD49FE4817F0BBFB74 -:1039E000069808300EF041F90121484002D1E889DB -:1039F000C00B25D000985127223086B2002C7AD0F7 -:103A00006888A080A8890199FFF7E0FC002818D1F8 -:103A10000220A071A88900E013E020810420A07298 -:103A2000288AE083009820846969009A029817F038 -:103A300008FA0699002008710698A98941806BE070 -:103A400003200BB0F0BD688804F0DDF900906888B1 -:103A50000022042108F068F901900098002804D1A0 -:103A6000DC48DB492C3017F076FB0198002804D1A4 -:103A7000D848D7492D3017F06EFB0198D649C08839 -:103A8000884205D05127222604E01EE03FE035E0C1 -:103A900050272026002C2ED06888A080502F07D0D9 -:103AA0000220A0712146287B0831FFF738FD33E062 -:103AB000287BA11DFFF733FD6A8800230199009838 -:103AC000FFF744FD0028BCD126E0C449A889C98875 -:103AD000814207D154270626002C0CD06888A0808C -:103AE0001AE008E053270826002C04D06888A0803C -:103AF000A889E08010E00A98068013E05527072681 -:103B0000002CF8D0A889A0800020A07104E08D20AE -:103B1000AF49C00017F01FFB0A98002C068001D0A7 -:103B20002780668000208CE7AC4900200870704731 -:103B300030B585B00C4601F0DBF90546FF2804D10D -:103B4000A448A349953017F006FB0020208020717F -:103B50006080401EE0802046294608300DF056FA6D -:103B60006A462946012002F016FD102412E068463C -:103B7000808800070ED56846C0882946FFF723FDD8 -:103B800068468188FF2321438180C0882946019AA5 -:103B900002F02CFE684602F007FD0028E7D005B0D1 -:103BA00030BD0A46014610B5104608300DF042FA05 -:103BB00010BD70B505460022042108F0B5F80400D8 -:103BC00004D184488249B73017F0C5FA2046294607 -:103BD00008300DF027FA70BDF0B591B00C460746DD -:103BE00004F011F9050005D02878222804D2082015 -:103BF00011B0F0BD7A48FBE700220421384608F0F6 -:103C000093F80646002C02D0A08800280CD0012092 -:103C1000694608710220087400204874002C05D001 -:103C2000A0880883206802E00920E1E70883059066 -:103C30003046083003970290FDF794FE040018D038 -:103C40006780172069468883203500940AAB69781D -:103C5000023307AA01A80DF0B0FD05466078000701 -:103C600001D5FDF760FE002D09D02846FFF785FA43 -:103C7000BEE71321384605F0A8FB0320B8E708A8E3 -:103C800000906846838B04220121384607F04DFBE3 -:103C90000021C943F180ABE7FFB585B00E9E778860 -:103CA000384604F0B0F8054600220421384608F0F2 -:103CB0003BF80446002D03D145494A4817F04BFA1A -:103CC000002C04D147484249401C17F044FA0834FC -:103CD000089869460394C1C105A80DC820356978C4 -:103CE0000DF0DAF9CBE5F0B50446002099B00D46A9 -:103CF00001460D9010A88181164601818180374AC6 -:103D000068469180018510A80180684601878185F9 -:103D100081841078012808D0022806D0032804D016 -:103D2000042802D0082019B0F0BD2F4A944273D362 -:103D30002E4F0121890438688C4201D3844278D304 -:103D4000294A954275D3012189048D4201D38542C8 -:103D50006FD36168002913D0234A914269D30122AD -:103D60009204914201D3814263D3608921898842C0 -:103D700003D801225202914201D90C20D3E70D90C1 -:103D800016AA0EA92846FFF78EFA0028CBD168683C -:103D900080784007800F02280AD16846008F80048F -:103DA000800F05D02869002802D03968884240D3A6 -:103DB0000AA92069FFF721FA0028B4D12069002858 -:103DC0001CD0607880076846008D14D580040FE011 -:103DD000FC380000EE030000FFFF0000400C002054 -:103DE000023000000C05000000C001002800002087 -:103DF000800F68D002E08004800F64D16846008D97 -:103E0000810618D58004800F606806D0002812D083 -:103E1000396888420DD302E00BE000280BD0FE4940 -:103E2000884206D301218904884204D33968884234 -:103E300001D2102077E709A96069FFF7DEF90028B1 -:103E40009CD16069002808D06846808C0105890FE4 -:103E5000012938D18004800F35D00BA9A069FFF764 -:103E6000CCF900288AD16846808C80062BD468461D -:103E7000808D810627D4A169002906D00105890F0C -:103E8000012920D18004800F1DD0E068002804D0D3 -:103E90000078002817D01C2815D204AA611C2046DF -:103EA000FFF728FA0121890210A80180012768463E -:103EB0008773DA49818104AA033217A92868FEF7BB -:103EC00038FF002801D007202DE710A8007F15A992 -:103ED000C01CC2B200200C920190FF320090034639 -:103EE0000291FF3203A80332109902F0ACFA0028C5 -:103EF00026D110A9888A0F902A892969C84801917A -:103F00000092029010A90A8B6B8928680E9902F022 -:103F10009AFA01007ED1C2480025001F81886846B8 -:103F20004174090A8174052104A86A4623C210A8B5 -:103F30002A46FF21808A0C9B02F0EAF9002802D071 -:103F4000FFF7AFF8EFE66846007C0322C1090020C6 -:103F5000920290430122920280181490002928D0E6 -:103F6000014610A8018068462921877309028181D2 -:103F7000058608A8007C0023410860784900C00736 -:103F8000C00F014308A80174FD2001406078A54AD4 -:103F90008007C00F4000014308A801740CA902204B -:103FA00001910090029503A8109902F04CFA0100CB -:103FB00030D16068002828D0206900280DD10AA9D6 -:103FC0000EA8FFF7E0F96078800706D46946088DEF -:103FD0000321090388436946088590496846877329 -:103FE000FE3181818F492089891E16F093FF626816 -:103FF0000D9811AB0192009002930A46002303A88A -:104000000A9902F020FA010004D12078C10603D4F5 -:10401000800600E085E02AD56846058660690028AC -:104020000DD109A90EA8FFF7AEF96846818C0320CF -:104030008002814301208002091868468184694614 -:10404000888CC82108436946888474488F73FF3080 -:10405000888112AA0CA902200292019100900023EB -:10406000704A03A8099902F0EEF9010059D12078AD -:10407000C00729D068460586A06900280DD10BA984 -:104080000EA8FFF780F96846818D032080028143E6 -:10409000012080020918684681856846818D40208C -:1040A00001436846818587735F49818113AA0CA902 -:1040B000022002920191009000235A4A03A80B9912 -:1040C00002F0C1F901002CD1E06800282DD010A821 -:1040D00014990180544968468773491C8181E168BD -:1040E00008A80A78027449784174E068412241883E -:1040F00068464186E0680023017908A80175E068F8 -:10410000D200C18808A84175090A81750CA8072149 -:1041100001900091029503A8109902F094F9010012 -:1041200003D00F9800F0E8FEFDE53D480321001F95 -:104130000170002E0AD08088308010A8808870809E -:1041400010A80089B08010A88089F0800020EAE5DE -:1041500030B501248BB015460B46012802D0022849 -:104160001CD104E0684605218473C90203E02B4991 -:1041700068468473891E8181002B12D003210020A0 -:10418000890288430121890240186946888405AA6A -:1041900004A91846FEF7CDFD002804D007200BB077 -:1041A00030BD1020FBE76A46127C1D480092801E3D -:1041B00005A9FF3201910290FF32002303A80332C8 -:1041C000099902F040F9002802D0FEF76AFFE6E7FD -:1041D0001348001F002D01D0418829800470002061 -:1041E000DDE770B592B00446012608A886700F4935 -:1041F0006846018410AA08A93046FFF7A9FF0028E5 -:104200004ED12078064DC00700242D1F002849D02C -:104210001C2168460CE0000000C0010003280000DB -:10422000440C0020030200000329000001180000D4 -:1042300016F066FE6846017820200143684601704A -:1042400008A88670F9496846018411940794817F13 -:10425000F92001406846891C8177002001466846A4 -:104260000177002001466846417704218185C48595 -:10427000018607A80A9011A80D9008A809900EAA17 -:1042800009A96846FFF72FFD002809D16846008F6D -:10429000E8806846808F2881401C68812C7000204F -:1042A00012B070BDEC802C8110A80088F4E7F7B53F -:1042B000DF4900260A789EB0012A04D0022A02D0E3 -:1042C000082021B0F0BD4A88824201D00620F8E7DC -:1042D0001F98824201D10720F3E7012210A98A75B5 -:1042E000D4488882002003239B020146994393020D -:1042F000CB1810A90B8669468A81CF4ACA8118A9B2 -:10430000887110A9888419A904916946CA82069007 -:10431000FF20087503A802F06AF900242546274605 -:1043200008AA052103A802F065F9002810D0822808 -:104330006FD1002C6FD0002D6DD010A88480C58067 -:104340000021017418A8807B11AC012865D06DE0B4 -:1043500008A88079002F21D0012857D16846818C88 -:10436000B44881421CD113AA0DA905206B4607C38E -:104370006846408C10230022FF2102F0ADF900288E -:1043800068D110A88089042801D006284CD168463D -:10439000818E1F98814239D10F2092E7012835D1B3 -:1043A0006846808C0521C902884202D0491C884297 -:1043B0002CD19F4841886846408C814201D1012719 -:1043C00000E00027002C01D0002D10D01F9988425A -:1043D0001CD113AB0DAA05216E460EC60446102350 -:1043E0000022FF2102F078F9002833D101E03546A0 -:1043F0000CE010A88089022801D0102814D1C0B286 -:104400001BAA0DA9FEF76FFC00280DD16846468C4B -:1044100086E71FE0FFE7052053E714A91BA8221D2C -:10442000FEF787FC002801D003204AE710A8007C93 -:104430000023001DC2B210A80274209802900194BB -:10444000009215A81C9901F0FEFF002802D17849BE -:1044500002220A70FEF725FE33E710B50B46401E18 -:1044600086B084B203AA00211846FEF743FF04AACF -:10447000052103A802920191009001230022FF214F -:10448000204601F045FF04466846008A012804D012 -:104490006D206A49000116F05EFE2046FEF701FE1F -:1044A00006B010BDF0B5624F0446387887B00E46AE -:1044B000032804D0042802D0082007B0F0BD04AAC5 -:1044C00003A92046FEF7EFFE0500F6D1606880786C -:1044D0004007800F02280DD1684680898004800F34 -:1044E00008D02069002805D055490968884201D2C2 -:1044F0001020E2E7208905AA6B46216907C36946B7 -:104500000A8A63892068039901F09DFF002802D080 -:10451000FEF7C7FDD1E7002E02D06846808A3080C2 -:10452000042038702846C8E738B50C00054609D085 -:1045300000236A46FF2102F031F9002804D0FEF77B -:10454000B0FD38BD102038BD69462046FEF755FE47 -:104550000028F8D1A078FF21C307DB0F2846009A76 -:1045600002F044F9EBE73EB50C0009D002AB6A4615 -:10457000FF2102F013F9002804D0FEF792FD3EBDA2 -:1045800010203EBD0321204616F0B8FC6846008886 -:1045900001A90005800FFEF71CFE00280BD168461C -:1045A000007920706846008801A98004800FFEF71A -:1045B00010FE002801D003203EBD684600796070DF -:1045C000A278EF20024068460088C10B09010A4327 -:1045D000F7210A404104C90FC9000A43A270F9211A -:1045E0000A40800601D5022000E001204000694613 -:1045F0000243097A50084000C907C90F0843A07058 -:1046000000203EBD7FB514460522019203AD029500 -:1046100000930A462388FF2101F07AFE69468989C2 -:104620002180FEF73EFD04B070BD0000052A0000A9 -:10463000400C002002280000FFFF0000FC380000B2 -:1046400028000020F3B5002799B068460C4607877C -:104650003D4600291DD0E068002806D0A06800284B -:1046600017D001886A4611870780199803F0CBFBA1 -:10467000002811D0007822287ED3199800F038FC49 -:10468000009000220421199807F04EFB060009D182 -:1046900004E010201BB0F0BDFC48FBE7FC49FD48DE -:1046A00016F059FDA078012803D0022801D0072078 -:1046B000F0E72088002808D0401E80B203AA0099A5 -:1046C00001F069FF002859D11DE0F048401CE1E7E6 -:1046D0006946498A228891420BD26846807D00252E -:1046E000012810D16846808AEB4988420BD1012508 -:1046F00009E0914203D1002D2AD06D1C01E0022D6A -:104700000BD0032D04D203A801F04EFF0028DFD008 -:1047100082281BD0002831D11DE06946897D0129FE -:10472000F1D16946DC4B8A8A5B1ED11A9A420FD0BE -:1047300005DCDA48101A0BD00128E4D108E0012981 -:1047400006D0FF390129DED10325E1E7022D15D17D -:104750000D2080029EE7E068002816D00EA90522F1 -:1047600002910192009069460B8FA2882088FF2158 -:1047700001F0CEFD002800E01DE002D0FEF791FC24 -:1047800088E76846A168008F08806846008AC006EE -:1047900001D5C3487EE70798002803D06846008B00 -:1047A000022801D0032075E70798A1780078012935 -:1047B00003D0800710D408206CE7C007FBD000228C -:1047C0000721199807F090F8002802D00725022049 -:1047D00004E0AE48801C5DE70225032008A90870AC -:1047E000218868468185199808360A90099617210C -:1047F0006846818712AB02330FAA052108A80097EB -:104800000CF0DBFF002802D0FEF7B7FC42E710A84F -:1048100000906846838F04222946199806F085FD8A -:1048200038E770B5064615460C460846FEF7F6FB17 -:10483000002804D12A4621463046FFF789FCF3E6DA -:1048400010B5FFF734FD10BD70B51E4614460D00BF -:1048500014D0002C12D0616800290FD00121FEF77E -:104860004CFE002809D12068FEF7D8FB002804D1AF -:10487000324621462846FFF736FAD5E61020D3E621 -:1048800070B515460C000ED00221FEF736FE00284A -:1048900008D12068FEF7C2FB002803D12946204634 -:1048A000FFF700FEC0E61020BEE6F8B506467D48DC -:1048B0000D46016814468A4231D36068002808D04A -:1048C000794A90422BD301229204904201D388422C -:1048D00025D37648864204D0304603F094FA002867 -:1048E0000CD0304600F004FB0646284600F0BDFA26 -:1048F000002804D16068002802D012E06348F8BDA7 -:1049000000236A463146284601F048FF002802D0BD -:10491000FEF7C7FBF8BD68460088800601D410206A -:10492000F8BD6188224628466368FFF76BFEF8BD34 -:10493000F7B55C4E0746306886B01446824202D214 -:10494000102009B0F0BD384600F0D2FA05465748AD -:10495000874201D0FF2D08D0002304AA29460798DA -:1049600001F01CFF002826D101E04848E9E768462D -:10497000008AC00601D54A48E3E703A90020029156 -:104980000527019000976288484B2946079801F057 -:10499000A3FE00280FD161683268914208D30191CB -:1049A00002900097238862882946079801F094FEB8 -:1049B000694689892180FEF774FBC2E7002907D088 -:1049C0003B4B0A881B899A4202D83048401C7047EA -:1049D00038E610B586B004236C46A382344BDC88DD -:1049E000002C07D01B898B4201D2914204D9274861 -:1049F000401C55E5062053E56B4619825A8200217A -:104A0000009101911C800221997005A9029104A9CD -:104A100003916946FFF716FE42E5F3B50C4685B0F3 -:104A2000812069460873002C1AD0059803F0EBF931 -:104A3000070017D03878222868D3059800F058FA74 -:104A4000049000220121059806F04EFF00280BD0AB -:104A500000220421059807F067F905000AD105E056 -:104A600010202AE5094828E5112026E508491148C3 -:104A700016F071FB284608300CF0F6FA064620784E -:104A8000012819D0022838D0072016E5023000008E -:104A9000FC380000E10800000328000000280000A6 -:104AA000013400002800002000C00100FFFF0000CA -:104AB000400C0020840A0000A18803AAFEF728FB0E -:104AC0000028CED1B00721D56846007B00281FD131 -:104AD000A079C0071CD0E068002205216B4607C3FF -:104AE000638922896888049901F012FC6946087379 -:104AF00000280DD0FEF7D5FADFE4A18803AAFEF75F -:104B000007FB0028ADD13420064201D10820D4E4AF -:104B10006846037B29463846059AFEF717FDCCE424 -:104B2000FFB597B0002001901F4615460C460E4673 -:104B3000179803F068F9002804D00078222803D2DF -:104B40000820A7E5F348A5E5B80801D00720A1E5AE -:104B5000032F00D10027179800F0CAF90890002C05 -:104B60001BD0022D77D3EC48006884427CD36119B6 -:104B70000091012902D0491E814275D3AD1EAAB20F -:104B80002146E6480DF0F0F800991E394A7F0B7F68 -:104B900011021943884267D1ADB2E148B90702D585 -:104BA0000189491C00E0012189B20091F90701D077 -:104BB000078900E0D94F03AA0899009801F0EBFC9F -:104BC0000DE0F078B1780002084310284CD8019924 -:104BD000091D401880B20190A84245D82618002E21 -:104BE00060D0707831780002084300998842E8D399 -:104BF00058E06946098A0A0754D5002C3FD0019A2B -:104C0000A618121D92B20992F278B37812021A43D2 -:104C10009446102A28D8099A6244AA4224D8727865 -:104C2000337812021A4390421ED1C8061ED5099845 -:104C30000AAA052120186B4607C370783178000254 -:104C4000084363460022089901F062FB002803D064 -:104C5000FEF727FA1EE507E0F078B1780002084376 -:104C60006946098D884201D00B2013E5F078B178B0 -:104C7000000208430999401880B2019006E0C90675 -:104C800004D50899FEF79FFC0028E3D16946088AFD -:104C90001021884369460882488AFF23049A0899AC -:104CA00001F0A4FD03A801F07FFC002803D16846B1 -:104CB000408AB8429DD900220421179807F034F8A1 -:104CC000040003D19749984816F045FA2088002837 -:104CD000C0D0012108A80170017300264673218805 -:104CE0006846018620460830099017980A90FCF71C -:104CF00039FE05001BD01798688017206946888008 -:104D000010AB023301AA052108A800950CF055FD4F -:104D100007466878000704D583488249223016F098 -:104D20001AFA002F09D03846FEF727FAB2E4132109 -:104D3000179804F04AFB0320ACE40EA800906846E4 -:104D4000838804220121179806F0EFFA00288CD1FD -:104D500026809FE4F0B500248DB01F4615460E4610 -:104D6000002A04D0B90804D007200DB0F0BD1020EF -:104D7000FBE7032F00D1002700F0BAF80390FF28CB -:104D800004D06749B80703D5488902E06148ECE7D9 -:104D90000120FA0702D04989491E00E05F4906AAAE -:104DA0008FB2039901F0F7FB38E06946898B090758 -:104DB00034D504AB05210022029300910192574B98 -:104DC000039901F089FC002821D1002E21D06A46E8 -:104DD000128A2988A2183019121D914234D36946CB -:104DE000CA8B0270120A42700A8A8270120AC2705A -:104DF00004A90522001D0092029101906946C88B0A -:104E00000B8A0022039901F067FC002801D00320DF -:104E1000ABE76846008A2018001D84B206A801F09E -:104E2000C3FB002804D0822806D0FEF73AF99CE79D -:104E30006846C08BB842B8D9002C07D0002E10D0DD -:104E40002988A01C814203D20C208EE705208CE724 -:104E50002246314631480CF087FF31190870000AAC -:104E60004870A41C2C8000207FE700B585B06946FF -:104E7000FEF7ACFA00280AD16846007C030016F061 -:104E80008BFA08052F2F2F2F08080531032005B0B6 -:104E900000BD68468078012807D168460088032154 -:104EA000C902401A1CD001281AD06846807901280E -:104EB00006D16846808815214902401A05280FD975 -:104EC0006846807A012811D16846018929200002AC -:104ED000081A05D0022803D0032801D0042805D1E0 -:104EE0000F20D4E711A1164816F035F90020CEE7BF -:104EF00010B506F00FFF10BD10B50C4601F01EFBFB -:104F0000002803D009A10F4816F025F92046FEF726 -:104F1000C8F810BD0230000028000020FFFF00008C -:104F2000400C0020FC3800003F0B00007372635CF3 -:104F300067617474735F636F72652E6300000000B5 -:104F400022020000BB060000F8B500780C461646A9 -:104F500010340E36069F022809D0032836D00528C3 -:104F60007ED0FF20F6A1E53016F0F5F8F8BDCD892A -:104F70000A2068430E30188031203880002AF5D08E -:104F8000087B9581801FC7B21AE020886168308055 -:104F900048780A7800021043F080C8788A780002C6 -:104FA00010433081B21C3846091DFDF79CFE002FCE -:104FB00001D0002802D000203071708008340A36F9 -:104FC00028466D1EADB20028DFD1F8BDCD890A207C -:104FD00068430E30188032203880002AF5D0087BD4 -:104FE0009581401FC7B243E0616822880878F2804B -:104FF0003279C30752085200DB0F1A43FD231A40CF -:105000008307DB0F5B001A43FB231A404307DB0FC8 -:105010009B001A43F7231A400307DB0FDB001A43F8 -:10502000EF231A40C306DB0F1B011A43DF231A408C -:105030008306DB0F5B011A43BF231A404306DB0FD5 -:105040009B011A433271C00970718A784B78100243 -:105050001843308132463846C91CFDF744FE00E053 -:105060000CE0002802D00020B070308008340A36EE -:1050700028466D1EADB20028B6D1F8BD087BCD899B -:10508000801E86B2304608306843103018803420C5 -:105090003880002AF1D0174695811037E800D68174 -:1050A000C01900900DE02088388000987860324662 -:1050B0006168009815F0C5FE00980834801908371B -:1050C000009028466D1EADB20028ECD1F8BDFFB5AA -:1050D00081B00A9D1E460C46002A05D0607AFF303A -:1050E0000130D080E089108101980E2700780300FC -:1050F00016F052F90B7E0719293541536C787878F0 -:105100007E000092087B082805D0032803D091A1D7 -:10511000954816F020F8378030200FE000990020E5 -:10512000888105B0F0BD0092087B042804D08E4829 -:1051300088A1143016F00FF83780312028800098AD -:105140000028EBD1EDE70092087B042804D09320DF -:1051500080A1800015F0FFFF37803220EEE700923B -:10516000087B022804D080487AA13A3015F0F3FF7A -:1051700037803320E2E7087B1746042804D07A48BA -:1051800074A14C3015F0E7FF1020308034202880C7 -:10519000002FC6D00020B88116E0207B17460528D6 -:1051A00006D0062804D070486AA1603015F0D3FFFD -:1051B0001220308035202880002FB2D0E089B881BD -:1051C0000020388201984088F881AAE70092087B85 -:1051D000072804D064485FA1713015F0BCFF378008 -:1051E0003620ABE733460095019800F00AFC98E7BB -:1051F0002F2053A1000115F0AEFF92E770B50C46C9 -:10520000054602F000FE002804D00078222803D2D0 -:10521000082070BD554870BD00220521284606F0C3 -:1052200083FD2060002801D0002070BD032070BDE8 -:10523000FFB58BB00D4607461720694608850E98C6 -:1052400003261446002805D10EA93846FFF7D6FFDD -:10525000002834D1002D0BD000220321384606F05F -:1052600043FB002834D00E980078002830D108E0A5 -:105270002078092819D00F2823D031A13C4815F0F7 -:105280006AFF0E98A760801D03AA606002320AA917 -:10529000204600F00CFC002827D0030016F07CF814 -:1052A000071A182323211C1E23000726002231463B -:1052B000384606F019FB0028E3D12C48801C0FB0BB -:1052C000F0BD00220321384606F00EFB0028D8D19D -:1052D0001120F4E70020F2E70820F0E72348401C03 -:1052E000EDE70720EBE70320E9E701A80090684617 -:1052F000038D04223146384606F017F80028DED127 -:10530000002DDCD00E990D70D9E730B587B01D4661 -:105310000C46002A11D0042369460B7013888B8138 -:105320005288CA81A2788A7422880A8200236A4637 -:105330002946FFF77DFF07B030BD1020FBE70000D6 -:105340007372635C67617474635F636F72652E630D -:10535000000000007372635C67617474635F636F65 -:1053600072652E630000000025020000023000007C -:105370004F030000F3B581B001980C460078082671 -:10538000030016F009F8125E46461B134A0A0A0A81 -:105390000A0A0A0A0A0A0A0A0A5E002C02D1F64917 -:1053A000F64808E06078304360703BE0002CF9D1AB -:1053B000F248F149083015F0CEFEF3E701980022DB -:1053C0008088052187B2384606F0AEFC0546002CE1 -:1053D00004D07520E849C00015F0BDFE002D04D1B1 -:1053E000E648E549143015F0B6FE3946A81D00F030 -:1053F00055FBFCF7B7FA040006D0607830436070C4 -:105400006780FCF790FA0FE01321384603F0DDFFC8 -:1054100015E0DA48D849283002E0D848D6492D307E -:1054200015F099FE002C0AD06078000707D593206C -:1054300020702046582208300199FBF7C5FE002055 -:10544000FEBDCE48CC493130EAE710B500210170ED -:10545000801D00F020FB10BD0A4610B50146901DCE -:1054600000F024FB10BD70B505460022052106F0B2 -:105470005BFC040004D1F920BF49800015F06BFEED -:105480002946A01D00F00AFB70BDF7B5054684B0A3 -:105490000C4600206946088188806F8802460521F5 -:1054A000384606F041FC060004D1FD20B2498000D8 -:1054B00015F051FE002C03D0A7800020E080208151 -:1054C000297A20461230C91E142700900B0015F0CF -:1054D00063FF0FFDFCFB3809A95E657A2FB2C9E9AD -:1054E0009191FB003078012804D0A3497020143139 -:1054F00015F031FEA9896A46C8000E309080302030 -:105500001081002C13D0A18100200DE0C100327960 -:1055100009190A747288CA8182005319DA894A8289 -:105520001A8A401C8A8280B2A1898142EED8F1E0B9 -:1055300002A8009001AB22462946304600F02AFA24 -:10554000E8E03078042804D08B49BD20143115F0F0 -:1055500002FEA8890622014650436A460E3090801A -:1055600033201081002CE2D0A18100200BE0062125 -:1055700041434F190919FA89CA81BA7C8A743A8A57 -:10558000401C0A8280B2A1898142F0D8C2E0307802 -:1055900006280BD078491431D72005E0307806284A -:1055A00004D07549EB20143115F0D5FDE889694622 -:1055B0001230888035200881002CB8D0A989A181BB -:1055C0007188E18126E03078072804D06A49FF20FD -:1055D000143115F0C0FDA8896A4601460E3090804E -:1055E00036201081002CA2D0A1812046AA890E303D -:1055F000296954E0E8896946123080B238228880EF -:105600000A81002C7ED0A989A181287A102807D090 -:105610000221A173E9892182EA89296900983EE083 -:105620000121F6E702A8009001AB22462946304648 -:10563000FFF78AFC6EE03078082805D04E49FF203D -:105640001431EE3015F087FD6846372187800181DF -:10565000002C5FD0A989A1810020608220820120D6 -:10566000A07357E03078092805D04349FF20143152 -:10567000FF3015F070FD288A694614308880372085 -:105680000881002C46D00421A173A989A181E98950 -:105690002182298A618220462A8A1430696915F09C -:1056A000D0FB37E030780A2804D03349344814312D -:1056B00015F051FD6846372187800181002C29D0E3 -:1056C0000521A173002002E01FE004E00DE0A081AD -:1056D000208260821EE002A8009001AB224629468B -:1056E0003046FFF7F4FC15E00CE00D206946392246 -:1056F00088800A81002C05D00120E08000202081D4 -:10570000207307E00699088019E01C481A49A43064 -:1057100015F021FD6846069980880880002C0ED07F -:10572000684600892080684680886080287A03283F -:1057300005D0102803D0112801D00020307000209F -:1057400007B0F0BDF7B5568815460F4682B0002267 -:105750000521304606F0E8FA040004D1074806495E -:10576000C43015F0F8FCA41D33462A46394600948F -:10577000029800F022FBD4E440530000950300009F -:1057800013020000F7B58CB00D46144607A90C981B -:10579000FFF734FD002812D1B64E0127002C0FD0A0 -:1057A0000321684601701021818208A802460690F4 -:1057B000204605A9FDF7BDFA00280BD007207EE59D -:1057C0000821684601708581C68105218774C90258 -:1057D00001820BE00798A178017121884180684619 -:1057E00005218774C90201828581C6810246012193 -:1057F000079B0C98FFF71CFD61E508B501236A467D -:1058000093709D4B13800A4602236946FFF77DFD86 -:1058100008BD08B501236A469370974B5B1C138043 -:105820000A4603236946FFF770FD08BD00B587B03F -:1058300000290CD002236A4613700B889381498893 -:10584000D18100230421FFF7F3FC07B000BD102035 -:10585000FBE710B5002903D00523FFF756FD10BD67 -:10586000072010BD70B588B00D461446064607A93E -:10587000FFF7C4FC00280DD1002C0DD0062168468E -:1058800001708581C481079B02465C8006213046F9 -:10589000FFF7CEFC08B070BD052168460170858118 -:1058A000F1E710B588B000290BD007246B461C70B7 -:1058B0009A81049100236A462146FFF7B9FC08B09B -:1058C00010BD1020FBE770B50024172288B0002916 -:1058D00014D00D782B0015F05FFD06230505190483 -:1058E0001B231522D21E93B2CA88002A02D08E68CA -:1058F000002E03D09A4203D90C20CBE71020C9E731 -:10590000042D05D08A88002A0AD101E00620C1E7CB -:10591000012D11D0022D05D0042D18D0052D23D036 -:105920000720B7E709236A4613704B889381CB8819 -:10593000D381896804911DE00C236A4613704B885B -:105940009381CB88D38189680824049112E00D23C8 -:105950006A4613704B8893818B88D381CB881382DE -:1059600089680924059105E00E236A461370497879 -:1059700011730A2400232146FFF75AFC8AE700B579 -:1059800087B00F236A461370918100231946FFF7F1 -:105990004FFC5AE7FEB50078089D1C4616460F4698 -:1059A000012803D03549912015F0D5FBF889C000B6 -:1059B0000E30208030202880387B001FC0B201903C -:1059C000002E1DD0F889B081002516E0E80084196A -:1059D000C0190090224641690E320198FDF783F903 -:1059E000002802D000202074E08100986D1C008AFD -:1059F00060820098ADB2408AA082B089A842E5D802 -:105A0000FEBD70B514461425049A1D8037231380FB -:105A1000002C0ED0CA89A281002262820078082858 -:105A200008D0092810D00A2819D01449144815F0B4 -:105A300092FB70BD087B0C2804D011480F490C382C -:105A400015F089FB012008E0087B0D2804D00C48E4 -:105A50000A49083815F07FFB0420A07370BD087B4D -:105A60000E2804D006480549001F15F074FB0520D8 -:105A7000F3E70000FFFF000002280000545300007D -:105A8000BB02000010B5FE4B586019721A80C900A5 -:105A900015F036FA10BD00210180704710B50022C4 -:105AA000D2430280032006F0A8FD10BD7047F0B578 -:105AB0000E460446017801208840F24999B008401A -:105AC0000090616815460888EF4A904206D0009A17 -:105AD000002A06D0EB4A521E104202D0012019B013 -:105AE000F0BD009A10430880002D12D000202870CD -:105AF0002178EA1C0027681C01920B0015F04CFC71 -:105B000010F30E16233A59616F3CB4B08AB8F2F123 -:105B1000F0F320780B28EBD00420E0E70221297075 -:105B2000A1890170090A4170032097E004212970BE -:105B3000A1890170090A41700198E1890170090A7F -:105B4000417005208AE006212970A1890170090AA7 -:105B500041700199E2890A70120A4A70218A017122 -:105B6000090A4171A28AE81DA16915F06AF9A08AA3 -:105B7000C01D73E0082129702178082901D1102166 -:105B80002970A1890170090A41700198E1890170A9 -:105B9000090A41700520308020466A1D02A9103094 -:105BA000FDF7C7F800287DD169463088097A40188A -:105BB00054E00A212970A1890170090A417003206B -:105BC0000BE00C212970A1890170090A417001982C -:105BD000E1890170090A4170052030809CE0A089AC -:105BE00084464000401C81B2308888425AD305293F -:105BF00058D30E202870002008E0236942009B5AE9 -:105C0000521953701B0A401C937080B26045F4D344 -:105C10003180B9E09A48417A002973D0491E417217 -:105C2000217B4068C9004518A988286808224018C7 -:105C30000838216915F005F9022168460171002133 -:105C4000417128680390A98868460181002101A854 -:105C5000FFF790FB0020A880002E00D0308093E05A -:105C60002978802211432970297840221143297014 -:105C700029788909890112312970A1890170090ADD -:105C80004170E289E81C216915F0DBF8E089C01C4D -:105C90003080287841063FD5C00975D0012168467B -:105CA000017200E02CE0002141723188091D8181E0 -:105CB0000495E189019808180590001D0690704828 -:105CC000017A68460177002102A8FFF753FB0746D7 -:105CD00030880C303080022F06D0002F54D065E081 -:105CE0003DE033E01CE05EE065486946097F4268BC -:105CF000CB00D218037A994202D29188002902D0AF -:105D0000042753E02FE0417A491C41721560308826 -:105D100090800020308049E06168A089888033E06D -:105D200029788909890116312970A1890170090A28 -:105D300041700198E1890170090A4170228A681D49 -:105D4000616915F07EF8208A401D46E728788009B1 -:105D5000800118302870207B687002207EE7606820 -:105D60000188090401D4052720E0C088A189884260 -:105D700001D006271AE01E202870012030806068BC -:105D800001884904490C0180009800280ED03C4845 -:105D900000220088A1688300032006F087FB616869 -:105DA0002078887007E00020308003276068009921 -:105DB00002888A430280384691E6FFB59FB0289D4D -:105DC0000E46002805D0172803D82A882E4B9A4261 -:105DD00002D1072023B0F0BD3278530601D4D20996 -:105DE00001D00820F6E700226B461A715A7114465A -:105DF0003278431E1D939BB2189303AB1A939706F8 -:105E0000CB1CBF0E1B93821E711C3B0015F0C4FA05 -:105E1000209011EE66EE74EEB0EED4EEEDEEECEE08 -:105E2000EBEEEAEEE9EEEEEEE8EEE7EEE6EEE5EEBC -:105E300090EE05287CD1042168460171A978017291 -:105E4000F078B2780102114368464181317941719D -:105E500070788006800E0C282ED009DC801E03008E -:105E600015F09AFA0919661C6621662466276600F1 -:105E700012282AD00ADC0E2821D01028DAD121E0FD -:105E80004C0C0020FF710000FFFF000016281FD0FF -:105E90001828CFD11FE02878800701E02878400734 -:105EA000002845DA45E128780007F9E72878C00698 -:105EB000F6E728788006F3E728784006F0E72878A8 -:105EC0000006EDE72888C005EAE72888C004E7E770 -:105ED00028888004E4E728884004E1E72A789207CC -:105EE00026D50328A6D105206A461071487809787E -:105EF0000002084310811CE129784907F0D50628E3 -:105F000016D3717890B2012902D0022992D101E012 -:105F1000022100E01021189106216A46117100212A -:105F2000118102AF189AB11C0237921C1B921AE021 -:105F3000B3E04A780B7812021A433A80801E891C1B -:105F40001790BA1C1A911898FCF7CDFE1A99189858 -:105F5000189A091817986B46801A1A8980B2521C31 -:105F60001A811B9ABF1D8242E3D9002886D1E0E046 -:105F700028780007B4D51D98694682B207200871B9 -:105F800000200881701C0A3111E0437807781B0259 -:105F90003B430B80C37887781B023B434B806F46A3 -:105FA0003B89121F5B1C001D92B23B81091D042A14 -:105FB000EBD2002A71D1BCE02978C9066DD5022840 -:105FC0006BD30820694608710020488170780872F8 -:105FD000844692B2B01C1A9919E089E090E07EE004 -:105FE00067E05BE030E025E019E013E0BCE04378D7 -:105FF00007781B023B430B80831C4B606346D21A1D -:106000006F467B8960445B1C92B27B81083194456A -:10601000EDD9CEE7287880063FD5092203E028781D -:1060200040063AD50A2268460271AA880281189A67 -:10603000428107E0287800062FD50B206A461071B0 -:1060400018981081039174E02988C90525D5022884 -:1060500023D30C20694608710020488170780872AB -:10606000844692B2B01C1A9914E0437807781B0258 -:106070003B430B80C37887781B023B434B80031D57 -:106080004B606346D21A6F467B8960445B1C92B2B8 -:106090007B8108319445E8D98BE763E02988C904FE -:1060A00060D501285ED10D2168460171A988018162 -:1060B0003FE02988890455D5052853D30E22694627 -:1060C0000A71AA880A811B99401F4A78097812022E -:1060D0000A4369464A818881701D049029E0298815 -:1060E00049043FD501283DD10F206946087120E0C1 -:1060F0002A88120436D44A780B7812021A43EA80AE -:1061000003282FD332789206920E1B2A26D0112212 -:106110006B461A712A880123DB031A432A804A78C6 -:10612000097812020A4369460A81C01E48811B98F9 -:10613000039030788006800E1B2809D01D2807D0D8 -:106140000320229906F059FA2888C00BC003288042 -:1061500001A82199FFF70EF920463BE610226B4675 -:106160001A71DCE70724F7E70824F5E700B597B0D4 -:10617000032806D16A461070019100216846FFF796 -:10618000F9F817B000BD000010B58B78002B11D0C6 -:1061900082789A4207D10B88002B0BD003E08B79D1 -:1061A000091D002B08D08B789A42F8D103880C88FF -:1061B000A342F4D1002010BD812010BD052826D0B7 -:1061C000002A02D0012A0DD102E00988090501E068 -:1061D00009888904890F07D0012918D0022909D01C -:1061E00003290ED081207047002A01D00320704778 -:1061F0000220704703280AD0042808D0002804D0C1 -:1062000007E0042803D0022803D0052070470020AF -:1062100070470F20704770B51388054614460B80F1 -:1062200018061DD5FE481022807AA84203D81343D1 -:106230000B80002070BDA06893430078E840C00741 -:10624000C00E03430B802078A1788007800D08439F -:10625000F44914F05FFEA06869430818401C70BD43 -:10626000906870BD37B569468B88138019061BD5B9 -:10627000EB4C0125A47A9168844209D8FE280FD1FD -:10628000D80602D5A5406D1E00E000250D7007E080 -:1062900085400C78DB06DB0FAC4383401C430C705D -:1062A00010881021884310803EBDF8B50746C81CF1 -:1062B00080080E468000B04201D08620F8BD082A32 -:1062C00001D90E20F8BDD64D00202E60AF80288168 -:1062D000AA723446E88016E0E988491CE980810604 -:1062E00010D48007A178800D0843CE4914F012FE27 -:1062F000206800F0BAFA2989401880B22881381A3B -:106300008019A0600C3420884107E5D40020F8BD36 -:10631000FFB589B09F041646139DBF0C01930998E1 -:1063200000F095FA04000AD02078000609D5BC4890 -:10633000817A0A98814204D887200DB0F0BD0120EF -:10634000FBE7224669460A98FFF765FF06900020A2 -:1063500069460872052D14D0012221462846FFF710 -:106360002DFF0028E9D1207840060AD50221684691 -:106370000172099981810188C18106824782129840 -:1063800005900198000404D500273E460125079793 -:1063900009E02078A1788007800D0843A149079083 -:1063A00014F0B8FD0D46019840040AD50798A8429C -:1063B00007D12088E1788005800F00020843B042B1 -:1063C00001D3AE4201D90720B7E7B81980B20190D6 -:1063D000A84201D90D20B0E76846007A002804D011 -:1063E00002A8FDF718F90028A7D10798A8420BD1F9 -:1063F000208803210902884301998905890F090230 -:10640000084320800198E0701498002800D007808D -:106410001298002815D006983A468019129914F05F -:1064200010FD224669460A98FFF7F5FE694608887E -:106430001021884369460880224600990A98FFF790 -:1064400011FF002079E7FFB5754D0C22E888296817 -:10645000504383B00C180D9F7249059814F05AFDF3 -:106460000091049800F001FA29682A898E46611A81 -:106470000C310918944651188AB2A988914202D861 -:10648000842007B0F0BD6A46168A320603D5B206EC -:1064900001D58520F5E7EA88521C92B2EA800E9B6E -:1064A000002B00D01A80B20601D5A76006E0604438 -:1064B00080B22881091A70460818A0602246FE2082 -:1064C0000499FFF7CFFE0598A0700098E07020882F -:1064D0000599800889058000890F08430321090276 -:1064E000884300998905890F09020843042108435C -:1064F000208003988078A07103980088A0800020F5 -:106500002073310601D5AC7A00E00124B10600D534 -:10651000002700260EE0052100200191029000973F -:10652000E88831460C9B069AFFF7F2FE0028A8D1B6 -:10653000761CF6B2A642EED30020A2E7F1B5009891 -:1065400000F085F9060002D00025009C14E001202F -:10655000F8BD204600F07BF90746007831498007F6 -:10656000820DB878104314F0D5FC386800F07DF93E -:106570004019641C85B2A4B22948C188601E8142BA -:10658000E7DC00992648491EC1800189491B018129 -:1065900000203070F8BD002804D0401E108091709B -:1065A000002070470120704710B5044601881C4840 -:1065B000C288914201D3822010BD00680C22514351 -:1065C00042189079A072908820811088D178800537 -:1065D000800F00020843A081A078211DFFF71BFE59 -:1065E00020612088401C2080E080002010BD012117 -:1065F00001827047F7B50546002084B0C043108083 -:1066000068681746817868468170686801886846BE -:10661000018000218171288A2C88A04205D303E0E3 -:10662000580C00200102000004462C8235E0288A24 -:10663000401C2882301D6968FFF7A6FD00282AD17A -:1066400039889248814201D1601E38806888A04212 -:1066500028D33088F1788005800F0002084302902B -:106660006946301DFFF790FD002814D169898748DD -:1066700081421BD0002231460598FFF79FFD00287C -:1066800009D16A890298824205D1E968B06814F09C -:10669000ABFB00280AD0641CA4B2204600F0D7F857 -:1066A0000600C4D1641E2C828220EAE67C80B07988 -:1066B000B871B088B8803078B1788007800D084311 -:1066C00078810298B8813946287A32460831FFF736 -:1066D000A2FD38610020D4E6FFB585B01C460F4608 -:1066E000059800F0B4F8050009D02878000608D510 -:1066F0006748807AB84204D8872009B0F0BD0120ED -:10670000FBE707982A468605B60D69463846FFF727 -:1067100082FD07460E98052816D000222946FFF76D -:106720004DFD0028E9D1287840060DD501216846A5 -:10673000017105990181018841818681C48101A887 -:10674000FCF769FF0028D8D12888AA788107890D2D -:1067500011438005800FEA7800021043079A9642A1 -:1067600007D04C4A914204D3611E814201DD0B20C7 -:10677000C3E7864201D90720BFE7801B82B2A2424D -:1067800000D922461098002800D002800F980028D7 -:1067900002D0B91914F055FB0020AEE7F8B51D463C -:1067A00017460E4600F053F8040008D02078000683 -:1067B00007D53748807AB04203D88720F8BD01203A -:1067C000F8BD224639463046FFF725FD002D0BD097 -:1067D0002078A1788007800D08432E49884201D295 -:1067E000012000E0002028700020F8BDF8B51E460A -:1067F00017460D4600F02BF8040008D0207800065C -:1068000007D52348807AA84203D88720F8BD012005 -:10681000F8BD224639462846FFF724FDFF2E14D046 -:106820002588A178A807800D08431A4914F072FB47 -:10683000002E03D1FF31FF31033189B2A170A808C6 -:1068400080008905890F084320800020F8BD104989 -:10685000CA88824207D3002805D00C220968504319 -:106860000C38081870470020704703B50846694681 -:1068700009888A0607D4090604D50549897A41435F -:10688000491C88B20CBD00200CBD0000FFFF0000B9 -:10689000580C002001020000F8B507780D460446A8 -:1068A000012F19D0072F02D00C2F19D114E0A068A6 -:1068B000216906780B2E0BD0052005F09EFE052ED3 -:1068C0000ED0782300220520216905F0EFFD07E0B6 -:1068D000782300220620F8E70520216905F08DFEC7 -:1068E000002D0ED0002028702946204603F0E2F942 -:1068F000FE482978C05D884201D10320F8BD0220FE -:10690000F8BD0021204603F0D5F90020F8BD70B590 -:106910000E460C462036317901208AB015460029F2 -:1069200009D0012905D12978042902D10520107048 -:1069300000200AB070BD6068019005A802900D218A -:10694000C01C14F0DBFA032205A8A16814F079FA40 -:1069500001203071062069460870206A049029469B -:106960006846FFF799FFE4E770B50C4615462031FD -:106970000A790120062686B0002A2CD0012A28D1C7 -:106980002978042925D169681022A06801F0B5F999 -:106990006868C07B000606D5D44AA0681023103A68 -:1069A000014601F09FF91022A168E06801F0A5F905 -:1069B000A068C07B000606D5CC4AE0681023103AD8 -:1069C000014601F08FF92E70A0686860E068A86049 -:1069D000002006B070BD60680190C4482038029065 -:1069E0000120087168460670206A049029466846AE -:1069F000FFF752FFEDE7027B032A06D00022242393 -:106A00005A540B78092B02D003E0042070470A7611 -:106A1000CA61027B9300521C0273C150032070476D -:106A2000F0B50E4615460C46203602463179012057 -:106A3000072393B000290CD0012924D002292ED09D -:106A4000032904D12978042901D12B70002013B027 -:106A5000F0BD01203071606800280DD0A1690B7075 -:106A600060684860206988606069C860206A086260 -:106A70001046FFF7C0FFEAE706202870206968602B -:106A80006069A86009E029780629E0D10220307108 -:106A9000042028709548203868600320D7E72978BB -:106AA0000429D4D1A08910280AD9103880B2A08135 -:106AB000A1681023091805A86A6801F013F923E0FA -:106AC00010282FD0C2B21020801AA1680DAF1190EB -:106AD000C01914F0B6F911980006000E06D0401E39 -:106AE000C1B280207854384614F008FA6269102345 -:106AF0000DA909A801F0F6F8102309A905A86A68EC -:106B000001F0F0F8032030716068019005A8029050 -:106B1000062069460870206A049029466846FFF7F7 -:106B2000BBFE94E710232269A168E2E7F0B50E46A8 -:106B30000C4620363179012006278FB015460029F2 -:106B40000BD0012932D0022905D12978042902D19C -:106B50000820107000200FB0F0BD217D08A8CA07E2 -:106B6000D20F02718807C10F08A801716846027030 -:106B700041700722801CE16814F063F902A8072223 -:106B80000130216914F05DF9606805900AA806904B -:106B900010236A46A16801F0A5F80120307168460B -:106BA0000774206A0890294604A820E0297804295F -:106BB000D1D1062205A8E16914F043F906A80622FE -:106BC0000230A16914F03DF900200890606801903E -:106BD00009A80290102305AA696801F083F8022031 -:106BE000307168460770206A049029466846FFF7AE -:106BF00053FEB0E770B50D460C46203529790120CB -:106C00008CB01646002909D0012905D13178042914 -:106C100002D10920107000200CB070BD6068019096 -:106C200006A802900822E16814F00BF9082208A8CF -:106C3000A16814F006F90120287106206946087041 -:106C4000206A049031466846FFF726FEE4E770B5F7 -:106C50000D460C462035297901208CB016460029B6 -:106C600008D00129D8D131780429D5D10A20107053 -:106C70000020D1E76068019006A802900822A16870 -:106C800014F0DFF8002008900990012028710620F8 -:106C900069460870206A049031466846FFF7FCFD9B -:106CA000BAE730B50B4620331C7901208BB0002C9D -:106CB00009D0012C05D11178042902D10B201070C4 -:106CC00000200BB030BD4868019005A802908C6888 -:106CD00068462578057564784475CC68257885758F -:106CE0006478C47500200690079001E0E4B30100C9 -:106CF000089001201871062368460370086A049002 -:106D000011466846FFF7C8FDDBE770B50C46203436 -:106D1000034625790120002D0AD0012D14D0022D23 -:106D200005D111780A2902D10C201070002070BD05 -:106D300001202071C868052202704A684260F84A42 -:106D40008260921CC2600BE015780B2DEFD10220FF -:106D50002071C86804240470526842608A688260A6 -:106D6000096A016201461846FFF745FE70BD30B55D -:106D7000011D02463132947803258379ED432C437B -:106D800023408371DB070DD04B79547923404B713D -:106D90000B79127913400B718278C9788A4200D935 -:106DA000817030BD00224A710A71F5E7F7B50C46D3 -:106DB00086B00020694626460870203631790127C2 -:106DC0001E2015461F2977D24B007B449B885B0011 -:106DD0009F441E0017023E025602690288029A0270 -:106DE000D102F5022E03590371037F03AE03C303DF -:106DF000CC03F7031A0464049A04AB04DF04FE0412 -:106E000010052A0565059B05C605830587058B05C5 -:106E10006069002802D0007813287DD0A068059012 -:106E2000002849D0012168460170206A049003219E -:106E3000684601710A214171E069029020790028B9 -:106E4000EFD0059909780029E7D00C2964D20B000E -:106E500014F0A2FA0CFD1A4B90B5E8FCFBFAF9F815 -:106E600007FD022828D16069002802D00078082890 -:106E700052D1022168460170206A04900598417839 -:106E8000684601710021B9E20620216A05F0B5FBD0 -:106E900020790728E6D1606900F051FF02280CD064 -:106EA000606900F04CFF042807D060690028B8D062 -:106EB00000780128D6D103E01BE261690120087047 -:106EC00005980079C11F0A2901D30A2050E06169A1 -:106ED0000722887060690599303013F0B2FF0120F5 -:106EE000307161690320087034E00728BAD1606905 -:106EF000002896D001780929B4D10599C978890765 -:106F000007D1059949790029DFD1059989790029A7 -:106F1000DBD105994A7900E04EE2014620314B7DF4 -:106F20009A43D2D1059A8B7D92799A43CDD1059A15 -:106F30001279D31F0A2BC8D20979914236D8072279 -:106F4000C01C059913F07DFF0120307161690A2092 -:106F50000870032069460870206A04906069313027 -:106F600001906069001D029060691C300390A1E2ED -:106F70002076F2E311288DD1606900F0E0FE04284C -:106F800004D0606900F0DBFE0B2893D1606905999D -:106F900010223730491C13F054FF6069017804292E -:106FA0007CD12421095C8278914201D90620DFE757 -:106FB000052101700320307168460170E2E3112859 -:106FC00094D1606900F0BBFE062804D0606900F02F -:106FD000B6FE0C288AD1E068002813D0206900286A -:106FE00010D060690178062910D00D210170606908 -:106FF000059910225730491C13F023FF6069573060 -:1070000009218CE100206946087072E107210170B6 -:107010006069059910224730491C13F012FF60691E -:107020004730EDE70228F0D1606900F088FE0028C3 -:10703000EBD0606900F083FE0128E6D0606900F0C3 -:107040007EFE05E0B1E08DE06CE02AE00AE0D6E0EB -:107050000828DAD00521684601710598417868460C -:10706000417146E11128D0D160690028CDD0017866 -:107070000E29CAD1C16A4078022810D000201422FB -:1070800050431430085805991022491C13F0D9FEBA -:107090000520216A00F041FE0F205EE0F1E10120B1 -:1070A000EDE70B28B1D160690028AED001780F2937 -:1070B000ABD1C16A4078022826D000201422504368 -:1070C0000C300958059842780A70807848706069D9 -:1070D000C16A4078022819D0002014225043103091 -:1070E000085805990822C91C13F0ABFE0520216A37 -:1070F00000F013FE60694178022909D000220832AD -:10710000825C5208520073E00120D7E70120E4E7D7 -:107110000122F4E7012100E0002108314254BCE3E0 -:10712000BEB3010011289CD16069002899D0017874 -:10713000102996D1C16A4078022811D0002014226B -:1071400050431830085805991022491C13F079FE55 -:107150000520216A00F0E1FD112061690870B4E3A7 -:107160000120ECE7082884D1606900289DD00178CF -:10717000112997D10599C06A49780170606905990C -:10718000C06A0622401C891C13F05BFE0520216AA0 -:1071900000F0C3FD60694178022904D00022083262 -:1071A000825CFD2323E00122F9E71128BBD160694D -:1071B0000028BBD001781229B5D1C16A40780228D5 -:1071C00019D00020142250431C3008580599102271 -:1071D000491C13F036FE0520216A00F09EFD60690F -:1071E0004178022909D000220832825CFB231A4030 -:1071F000022991D18EE70120E4E70122F4E707207C -:10720000B6E6287801288ED16069696814221C309E -:10721000F9F7DAFF6069017F002901D02176ACE33C -:107220000178032901D0032037E00227C770817954 -:107230004907490F8171017A4907490F0172417A63 -:107240004907490F41726069FFF791FD377196E276 -:1072500028780F28E3D1072069460870216A049135 -:10726000916802916946087161690722C91C0298F8 -:1072700013F0E7FD61690420087000203071BBE065 -:1072800028780328CBD1606901780529696807D07F -:107290000822473013F0D5FD0420307105206FE23D -:1072A00008225730F6E728780328B8D160690178BA -:1072B0000529696811D008224F3013F0C2FD05205E -:1072C00030716069006A00280AD00220287000200E -:1072D00028716069006AA860F9E008225F30ECE775 -:1072E00004204DE22878022899D12879002801D07D -:1072F000207642E36069A96801626069002901D1D2 -:10730000F949016206200BE228780F2887D1A86886 -:10731000E0616069017805292BD047300721317180 -:10732000E16802220A706269126A4A6088606069D4 -:107330003030C8606069C01C08616269087D926A6B -:10734000400812784000D207D20F104308756269D6 -:10735000926A521C8A61FD2210406269D26A1278D8 -:10736000D207920F104308756069C06A401CC8615B -:1073700053E25730D2E728780828BAD160690178FB -:1073800005291AD00B210170072069460870206A70 -:107390000490E069029011200871029803210170A5 -:1073A00051681022401C13F04CFD00216846FFF785 -:1073B00073FA00203071E06187E20621E3E7287864 -:1073C0000F2896D1072069460870206A0490A868A3 -:1073D00002901120087102980421017061690A78F5 -:1073E000072A0ED0002232710C220A706169102225 -:1073F000401C473113F025FD00216846FFF74CFA89 -:1074000063E21022401C573113F01BFD0021684637 -:10741000FFF742FA0A203071E168032008706069C2 -:10742000006A486060695730886060694730F3E1FE -:1074300028780828A1D1606969681022373013F0D4 -:10744000D3FC002801D0042092E560690078072869 -:1074500017D00A203071E168032008706069006A63 -:10746000486060695730886060694730C860206A4A -:1074700008620698FFF7BFFA07466069FFF777FCD6 -:107480006BE208207AE1287809289AD10B20307124 -:1074900061696868897810224018511A13F02EFD2E -:1074A000082069460870206A049068680190606945 -:1074B0008078087268E129780D29BBD161698979E2 -:1074C000C90703D00C20307109203EE0307103273A -:1074D00070E228780E28ADD160691422291D1C3075 -:1074E000F9F772FE6069018DC06A4172090A817202 -:1074F00060698178C06AC1716169CA6A081D117AC0 -:10750000C909C90111724379626919438378D26A42 -:107510009B079B0F012B00D0002300799B01C0002B -:1075200003431943117260694078012876D0B4E1B1 -:1075300060694178022901D0012100E00021083171 -:10754000405CC00707D00E20EAE069460870206A58 -:107550001146049019E11320B8E728780F2894D138 -:10756000A868E0610F2030710520EEE72878032835 -:107570008BD16069C16A4078022801D0012000E007 -:10758000002014225043103008580822696813F074 -:1075900058FC10203071E16806202269087060698B -:1075A000406A48606069C36A4078022801D00120BF -:1075B00000E000201427784310301858CA60886013 -:1075C0002BE128780C2886D16069C26A40780228AD -:1075D00001D0012000E00020142148430C30105855 -:1075E00002230932696800F07DFB11203071E168E7 -:1075F000052008706069006A48606069C06A0930E7 -:1076000088603948001F07E128780B28A7D16169F5 -:107610004878CA6A022802D0012001E059E100201E -:1076200014235843143010588A78696813F009FC01 -:1076300060694178C26A022901D0012100E000217D -:107640001423594314315258817850181022511A7A -:1076500013F054FC072069460870206A0490E06922 -:107660000290112008710298062101706169CA6AAE -:107670004978022901D0012100E000211423594357 -:10768000143151581022401C13F0DBFB00216846D6 -:10769000FFF702F90020E06112206FE028780F2840 -:1076A00091D1072168460170206A04909068029089 -:1076B0000B2268460271029801706169CA6A4978B2 -:1076C000022901D0012100E00021142359430C318B -:1076D00051580A784270497881706169CA6A49785C -:1076E000022903D0012102E0C4B3010000211423C8 -:1076F0005943103151580822C01C13F0A2FB00213D -:107700006846FFF7C9F826E760694178022901D089 -:10771000012100E000210831405C800703D51420DE -:1077200030710A2011E71620D0E628780F287AD188 -:10773000A868E061072069460870206A0490E06943 -:107740000290112008710298082101706169CA6ACB -:107750004978022902D0012101E011E1002114231E -:107760005943183151581022401C13F06AFB002174 -:107770006846FFF791F80020E061152030710A207B -:1077800069460870206A049029466846FFF784F825 -:107790002BE028780F2846D1072069460870206A18 -:1077A00004909068029008200871029809210170E5 -:1077B00061690622C969097841706169801CC969DB -:1077C000491C13F03EFB00216846FFF765F8AAE765 -:1077D00060694178022901D0012200E000220832CC -:1077E000805C400703D51720C8E70746B5E00129AC -:1077F00053D070E028780F2815D1A868E0611820D0 -:107800003071E168052008706069006A486060694D -:10781000C06A09308860F848C860206A0862069823 -:10782000FFF7E9F8E1E76FE028780B286CD1606991 -:10783000C16A4078022801D0012000E00020142213 -:1078400050431C3008581022696813F0FAFA0720D8 -:1078500069460870206A0490E0690290112008715E -:1078600002980A2101706169CA6A4978022901D027 -:10787000012100E00021142359431C3151581022EA -:10788000401C13F0DEFA00216846FFF705F80020DF -:10789000E0616069407801281DD1192016E6606911 -:1078A0004278022A09D000210831411809780029BC -:1078B0000DD0CA0703D00E2106E00121F4E78907A5 -:1078C00001D5102100E012210170002772E0012A89 -:1078D00001D00D20FAE51C20F8E51D2030710B20A9 -:1078E00033E62978102948D1F0E56069017801294B -:1078F00043D0082941D00021317100F01AFA0C2040 -:1079000069460870206A049037E028780F2805D06F -:107910001020107003271B2030714BE007216846B0 -:107920000170206A0490A8680290022168460171E3 -:10793000029805210170217E417000216846FEF702 -:10794000ABFF0B2168460170206A04902946684607 -:10795000FEF7A2FF07461B203071012F0DD029E052 -:10796000012168460170206A049004216846017173 -:10797000217E41710020207612E0207E00280FD069 -:107980006169132008701A2030710A206946087056 -:10799000206A049029466846FEF77EFF074609E004 -:1079A0006069002801D01421017068460078002821 -:1079B00000D021E5384609B0F0BDF7B50F462037B5 -:1079C0003879012686B00C46002804D0012828D03A -:1079D00002281CD197E02079012804D0022811D078 -:1079E000032814D10AE0A068407801280ED10620AF -:1079F000216A04F0DCFD00287FD10CE0A16813208F -:107A0000087008E0A0684178022901D0052674E0DA -:107A10000078082871D1012038710A206946087061 -:107A200033E0089800780F2867D107216846017075 -:107A3000206A049008988568029522790220012A1C -:107A400004D0022A29D0032A57D10FE006466846FF -:107A500006710B202870207B00214007400F6870C2 -:107A60006846FEF719FFA068067045E006466846BE -:107A7000067105202870207B687000216846FEF79B -:107A80000BFF3E710B2168460170206A0490684626 -:107A90000899FEF701FF06462FE0684601710120B4 -:107AA0002870207C6870607CC007C00FA870A07C24 -:107AB0004007400FE870E17C2971C0071FD0207D8E -:107AC0004007400F6871607D4007400FA87100219A -:107AD0006846FEF7E1FEA06807222946303013F021 -:107AE000B0F9E068017AA06820300171A1682879B6 -:107AF0008870A16809200870002630465BE70020E6 -:107B0000A8716871E3E7A168142008700121684634 -:107B10000170206A0490042168460171217B417143 -:107B20000021FEF7B9FEE7E7F0B585B00F46054640 -:107B30000124287B800040198038C66F3078411EB0 -:107B40000A290AD22C498000323140188038C36F8C -:107B50003A463146284698470446002C01D0012C6D -:107B600011D1287B401E0006000E287301D003248B -:107B7000DFE70D2069460870306A04900021019605 -:107B80006846FEF789FE032CD3D0204605B0F0BD31 -:107B900070B515460A46044629461046FFF7C4FF4D -:107BA0000646002C0FD0207814280CD1207E002807 -:107BB00006D000202870204629460C30FFF7B4FF7D -:107BC000204600F0B6F8304670BD704710B5012968 -:107BD00003D0022901D0052010BD417000F0A9F8A2 -:107BE000002010BD002809D0027E002A06D00A46D7 -:107BF00001460C31CCE70000C2B301000120704700 -:107C000030B5044687B00D46062004F0F6FC294640 -:107C1000052004F0F2FC2078142805D000206946E5 -:107C200008702046FFF7DEFF07B030BD7FB50E4677 -:107C300000216A4611730178092903D00A2903D06B -:107C4000002407E0446900E08468002C02D0217E13 -:107C5000002912D0154601462846FEF7CCFE03281F -:107C600009D1324629462046FFF792FF6946097B33 -:107C7000002900D0042004B070BD25460C35EAE789 -:107C800000B50023012285B005280CD0062808D1B4 -:107C90006846027004910221017143710021FEF7D0 -:107CA000FBFD05B000BD6846027004910271F4E767 -:107CB00010B590B00C4605216B4619700190234811 -:107CC00002900892001D03900AA96846FFF7AEFFD4 -:107CD000002805D1102220460B9913F0B2F800209D -:107CE00010B010BD30B505E05B1EDBB2CC5CD55CDE -:107CF0006C40C454002BF7D130BD10B5002409E00E -:107D00000B78521E5B00234303700B78401CDC0988 -:107D1000D2B2491C002AF3D110BD70B50C460546FD -:107D200004F06BFC782300222146284604F0BEFBB9 -:107D300070BD4178012900D00821017070470028EA -:107D400001D000787047082070470000BCB30100E4 -:107D500070B5F84D040008D0012C10D0022C07D0CB -:107D6000032C05D0F4A1752007E0F3A16C2004E0FA -:107D70002878012803D0F0A1722013F0ECF92C70C0 -:107D800070BD70B5EB4D044610280AD0112C16D0EA -:107D900028468178122C07D0132C0AD0E6A1A42003 -:107DA0000BE0E5A1992008E0112908D0E2A19E206E -:107DB00003E0112903D0E0A1A12013F0CCF9AC70AD -:107DC00070BD10B5DB4894B0007B002819D0172097 -:107DD00069460870D74900A806220D31023013F019 -:107DE00030F809A9684603F0A8FE0446112805D01A -:107DF000002C03D0D0A1C02013F0ADF9204614B060 -:107E000010BD3220E4E710B50022022103F08CFF00 -:107E100010BDFFB595B01D460E460746FFF7F3FFB0 -:107E200004000AD02078222804D3A07F8006C00F47 -:107E3000A84204D1082019B0F0BDC348FBE73721A0 -:107E4000684601704780002D05D0012101714671FF -:107E50001799817102E000206946087109A96846F6 -:107E600003F06BFEA07FDF21084069010843A07783 -:107E70000020E0E770B50446084620380D460300B0 -:107E800013F08AFA0A060A11232C3342495057612B -:107E9000FF20A9A10D3052E02078202851D1FF20E9 -:107EA000A5A110304BE0A3480178032949D0807880 -:107EB000132846D02078242843D0252841D02328D1 -:107EC0003FD0FF209CA1133039E02078222838D001 -:107ED000232836D8FF2098A11A3030E020782228B5 -:107EE0002FD0FF2094A11E3029E02078222828D00E -:107EF000242826D0262824D0272822D0292820D07C -:107F0000FF208DA121301AE02078252819D0FF20EC -:107F100089A1283013E02078252812D0FF2086A1DF -:107F20002B300CE0207825280BD0FF2082A12E30AA -:107F300005E02078282804D0FF207FA1313013F0FD -:107F40000AF9257070BDFF207BA13430F7E730B50A -:107F50007E4C0B887E4A022801D0934204D09D1F9C -:107F6000A54225D2022802D04D88954203D04D88E3 -:107F7000AD1FA5421CD24C88A34219D88B88FF257F -:107F8000F435AB4214D8022802D0C888904205D0FC -:107F9000C8886E4D0A382D1FA84209D2C888904261 -:107FA00008D0944206D05B1C63438000834201DB0F -:107FB000072030BD002030BDF0B56649884245D36A -:107FC000654A0125AD041368A84201D398423DD308 -:107FD0000279002A06D0082A02D8067B082E05D985 -:107FE0000720F0BD047B002CFAD0F6E7002A06D06B -:107FF00004688C422AD3AC4201D39C4226D3002E83 -:1080000006D084688C4221D3AC4201D39C421DD35C -:1080100000240CE00568A700ED598D4216D3012716 -:10802000BF04BD4201D39D4210D3641CE4B2A242FE -:10803000F0D800220125AD040CE084689700E459D3 -:108040008C4203D3AC4203D39C4201D21020F0BD3A -:10805000521CD2B29642F0D80020F0BD10B5028971 -:108060003E4B111F994213D24189042910D3DB1CC6 -:1080700099420DD891420BD80178890706D54068FE -:10808000002803D0FFF798FF002800D1002010BD82 -:10809000072010BDFFB50022099B002802D099429D -:1080A00005DC6EE0002902D1002004B0F0BD0920FB -:1080B000FBE7845C002C12D087187D78112D59D0F5 -:1080C00010DC2B0013F068F90A561726262C2C2EEC -:1080D0002E4C4C56835C002B46D1521CD2B28A42A5 -:1080E000F8DBE1E71C2D45DA123D2B0013F054F9C3 -:1080F000044242121A42022CD9D1BB78039C072BAE -:10810000237001D25B0701D40A20CEE7029B012431 -:108110001B782CE0E343DB0708E0012C08D029E0C2 -:108120000620C2E70F2523072D075B19002BF4D08B -:108130003046BAE7640C00207372635C6761705F5D -:10814000636F72652E630000023000007B0C00003C -:10815000FFFF000000C0010028000020FD3F0000DC -:10816000029B1B789C0701D50B209EE7022423432A -:10817000029C2370835C521C9A18D2B28A4202DDA0 -:1081800095E7192676028A4293DB8DE710B50478CD -:108190000B46002C08D00121F94A012C07D0022CF3 -:1081A0000BD0032C13D10EE00021197011E01970CF -:1081B0008179890903290AD10BE01970817989092C -:1081C000012904D105E019708179890901D010468F -:1081D00010BD411C0622581C12F033FE002010BDB9 -:1081E00008B51346002806D0E6A00068009048793C -:1081F0006A468009105C18700622581C12F021FE95 -:1082000008BD30B50C46097895B0222902D2082065 -:1082100015B030BD282369460B704880132A03D05F -:108220003B2A01D00720F3E708460A7109A903F0A9 -:1082300084FC050003D121212046FFF71BFE2846C0 -:10824000E6E700B595B0232369460B704880108897 -:1082500088805088C880D088488190880881002014 -:108260008881C88109A9684603F067FC15B000BD84 -:1082700070B50C00064610D0FFF7C5FD050003D110 -:10828000C149C24812F067FFA6802889E08028898A -:10829000208168896081A889A08170BD70B50E4673 -:1082A000050003D00021092004F0A7F90120B84CF3 -:1082B000022E207324D0032E04D0D320B249800094 -:1082C00012F049FFB24806210D3003F02DFFA07CCB -:1082D0008006800EA074FFF774FDA08B00280ED0DE -:1082E000002D0CD0830001220021092004F0DEF8CB -:1082F000092804D0A548A449283012F02CFF70BDED -:10830000A3480321103003F00FFFA07C402180061A -:10831000800E0843A0749E480C3002F04EFBDAE752 -:108320007FB501A9022003F06EFD002851D09748C7 -:108330009549673012F00FFF4BE0029C207821280E -:1083400047D0A07F01072BD52046223000906846F9 -:108350002346628E80882146343301F084FC050078 -:1083600005D011282ED089488749843028E0A07F85 -:10837000F7210840A077E17F480889074000C90F2E -:1083800008432021095D4007400FC9000843E077FA -:108390002078282824D129212046FFF76BFD1FE0F3 -:1083A000400716D568462246808821460E32FFF7E0 -:1083B00048FF050008D0112804D074487249933052 -:1083C00012F0C9FE00250BE0A07FFB210840A0773A -:1083D00006E001A803F025FD0500AED0052D02D072 -:1083E000284604B070BD0020FBE7F8B5040004D1B6 -:1083F00066486549A13012F0AEFE722020706068B8 -:1084000008260178091F0B0012F0C6FF11FD0A466D -:1084100068FC460EFCFC4746464646FD92FD46007B -:108420007B205949C00035E087883846FFF7EBFCD0 -:10843000050004D11F205449400112F08CFE6078E1 -:10844000042130436070524CA07F0843A077212163 -:108450002846FFF70FFDA87F8007800F012801D174 -:10846000801EA080384603F0B1F83846FCF7FBFFC9 -:108470003846FBF79EFB3946022004F0BEF8A87F81 -:10848000EF210840A877FFF74BFF002804D03F48B2 -:108490003D49C93012F05FFEF8BD85882846FFF7D8 -:1084A000B2FC002804D139483749D33012F053FECA -:1084B00060688078012804D034483349D53012F000 -:1084C0004AFE60688179284603F09CF90028E3D0D1 -:1084D0006178314361706168C880F8BD878838462B -:1084E000FFF791FC050004D128482749E63012F037 -:1084F00032FE60783946304360706068C0882881F9 -:1085000060680089688160684089A881022004F061 -:1085100074F80020A875A87F8007800F0228DCD19E -:10852000FFF7FEFE0028D8D0212017494001B1E70F -:1085300080783C2803D00025022814D000E00125D3 -:108540000027002808D03C2806D0022804D00F4875 -:108550000D49FF3012F0FFFD002F06D002263046F5 -:1085600001F06CF9F8BD0127EBE7607830436070EB -:108570000748817F31438177002D0BD00126EEE73C -:10858000023200000302FF01388100002E030000C8 -:10859000640C002060688788384601F07BF9054646 -:1085A00060688079012832D00226A87F06228008E0 -:1085B00080003043A8776068C08A28816068008B9B -:1085C00068816068408BA8816068C079E8756168DF -:1085D00028461830083112F034FC60680622807B8F -:1085E00068706168A81C0F3112F02BFCA87F81070E -:1085F000890F384602F0D4FFA87F8007800F01283A -:10860000ADD101E005E008E0FE488780A7E701263C -:10861000CBE7204601F01EFEF8BD60783043607065 -:10862000F8BDF7B505460078002700090C463E4620 -:1086300001287DD00022F44902287AD0072804D0EE -:108640000A2877D0F149F24839E1686803780D2BA0 -:1086500035D006DC042B6ED0072B3AD00A2B69D11B -:1086600006E0122B3CD0132B44D0142BF7D1BEE0E4 -:1086700011270726002C7CD08088A0806968FB2306 -:108680008979A171DF4905468A7F1A408A770421DA -:1086900003F071FB0521284603F06DFB00212846FD -:1086A00003F069FB0121284603F065FB03212846FE -:1086B00003F061FB0221284603F05DFB01E1012785 -:1086C0000926002CD7D08088A08068688079207225 -:1086D000F7E012270E2680882146FFF7C9FDF0E05B -:1086E0001A270726002CC6D04088A0806868007929 -:1086F000A071E6E081783C293ED010271E26002C90 -:10870000B9D08088A0806868C08A20836868C08AE1 -:10871000E0826868008B60836868408BA08369682A -:10872000607D497F40084000C907C90F084303E046 -:108730006CE097E0BAE029E060756968C007497F9E -:10874000C00F49084900084360756968A21DC879CF -:108750000831FFF745FD69682246887B0D320F31ED -:10876000FFF73EFD68688079002803D0012020755E -:1087700007E076E00220FAE719270726002C70D0E0 -:10878000A271A048F722817F11407DE01B272E2691 -:10879000002C66D0A1806968A21D0879491DFFF7E9 -:1087A0001FFD68682030C07A60736868C07804284C -:1087B000A07B19D040084000A073F92108406968E7 -:1087C0001F22C9788907490F0843A07369684007C9 -:1087D000C97A400FC9000843A073696820460F306A -:1087E0000C3112F02EFB6CE001210843E4E71E2758 -:1087F0000E26002C6DD0A1806868E21D407AA07121 -:1088000069688878C91CFFF7EBFC5AE0287A0128D0 -:1088100005D0022815D07E487C4932384FE01D270C -:108820000E26002C55D06888A080A889E080E889B1 -:108830002081288A6081688AA0817248DF22817F36 -:10884000A2E712270E266888FFF712FD002C40D001 -:1088500068784007400F032833D16A48FD22817FA2 -:1088600092E736E0287A030012F096FD0604101015 -:108870002020202619270726002C2AD0A180614815 -:10888000A271817F4908490081771AE019270726DC -:10889000002C1ED0A180287A012805D00320A071C9 -:1088A0005848EF22817F6FE70220F8E721462846EB -:1088B000029A01F068FEFEBD55485449801F12F02F -:1088C0004AFC0298002C068001D027806680002098 -:1088D000FEBD02980680FAE710B54A4894B0807849 -:1088E000132802D0082014B010BD22206946087059 -:1088F00009A9684603F021F904460021072003F086 -:108900007CFE2046EFE700B53E4895B080781228FF -:1089100001D00820AAE41E21684601700021817060 -:10892000C17009A903F009F90028F3D1002107203B -:1089300003F063FE1120FFF724FA002096E400B54F -:10894000304895B00078022801D0032818D11B21A7 -:1089500008A801730021817369460BA803F0EDF8A4 -:10896000002804D1684640781B2801D003207DE40C -:108970000021084603F041FE68468078002801D0B7 -:10898000082073E40120FFF7E3F900206EE4F8B556 -:108990001C4C030012F000FD0A06791779797979E9 -:1089A00044356779FFF7CBFF00282AD1F8F7DAFFC3 -:1089B000002826D02221017000210172F8F7B3FFB0 -:1089C000A07F01214BE08EB23046FFF71CFA050074 -:1089D00004D10F480D492E3012F0BDFB2878212814 -:1089E0000FD0F8F7BFFF002814D012210170022722 -:1089F000077246800020A875F8F795FFA07F3843DE -:108A0000A077F8BD640C0020FFFF00003881000053 -:108A10005F050000132229463046FFF7F2FBF0E71E -:108A2000A578122D06D0132D07D0F849F84812F07A -:108A300092FBE6E7FFF767FF01E0FFF74DFF002835 -:108A4000DFD1F8F78FFF0028DBD022210170122D33 -:108A500007D002210172F8F766FFA07F10210843BA -:108A6000CEE70121F6E7A07C810901290BD080091E -:108A700004D0E748E549223012F06DFB03210020C5 -:108A8000FFF70CFCBDE70221F9E7E148DF49293097 -:108A9000CDE7F7B514460D0004D1DD48DB49313090 -:108AA00012F059FB28780827012807D002281FD088 -:108AB000D748D649623012F04EFBFEBD0098FFF752 -:108AC000A2F9060004D1D248D049383012F043FB55 -:108AD0000220B0751030207060783843607007CD88 -:108AE000083407C4CB482022817F11438177FEBD23 -:108AF0000098FFF788F9060004D1C548C3494630FD -:108B000012F029FBA988C448814208D1EA88824230 -:108B100005D1132231460098FFF773FBFEBD814259 -:108B200002D1E888002809D01220207060783843EC -:108B3000607007CD083407C4002006E078230022C7 -:108B40000220009903F0B2FC0120B075FEBDB148CF -:108B500040897047FFB591B01498FAF71BF90028C7 -:108B60005DD10124684603218471C90281800022FD -:108B700001A92046FBF7ECFA002850D168461521E0 -:108B800084714902818000261C2102A8009612F0FF -:108B9000B7F90120014668461031017000200146F6 -:108BA000684641708178F9273940891C21438170DA -:108BB000017A02252943017212998186C6861F21F6 -:108BC00001870C9011980F9001A80B9009AA0BA98E -:108BD00002A8FBF788F8002821D168468D4E808CCA -:108BE000F080684684718D498180807809AA384078 -:108BF000801C41084900684681708586058713A856 -:108C00000F900BA902A8FBF76EF8002807D1684661 -:108C1000808C308131460A311498FAF7CEF815B0BD -:108C2000F0BD30B50C467E4995B08C423CD37D49B1 -:108C3000012292040968944201D38C4234D3203833 -:108C400000220125030012F0A7FB06042A44484E27 -:108C5000575F0021082003F0AAFC002802D0112051 -:108C600015B030BD24206946087000A80522A11C5B -:108C7000023012F0E6F809A9684602F05EFF05002E -:108C80002FD1082300221146184603F00FFC0828B4 -:108C900027D05F485D49D63012F05DFA21E0606868 -:108CA000002803D0884201D21020D9E73D21684630 -:108CB0000170218841806188818009A902F03DFF0F -:108CC00005000ED1606800280BD06946098D01802F -:108CD00007E0206801F0B2FE02E0204600F024FE2A -:108CE00005462846BCE73E2007E0857000E082701C -:108CF00009A902F022FFF3E73420694608702078C2 -:108D0000C0076846F3D0F0E70720A9E730B50C4666 -:108D1000444995B009688C4201D21020A0E7203860 -:108D2000030012F039FB05042121232132002088A1 -:108D3000FFF769F8002804D00078222803D2082021 -:108D40008EE739488CE725216846017021884180EB -:108D500009A902F0F2FE050015D10AA90522023187 -:108D6000A01C12F06EF80EE006250CE0206800282A -:108D700005D0884201D2102505E001F055FE2548B6 -:108D80000025808BA08028466AE7072068E72148F5 -:108D90001330704710B520211E4812F0AFF80120A3 -:108DA000FEF7D6FF1120FEF7ECFF00211948C9435A -:108DB000818000218176E1218900818301460C3088 -:108DC0000D310446F8F74EFE1248072221461330B3 -:108DD00012F037F8FEF7F5FF002803D00B491348CF -:108DE00012F0B9F901F0E5F910BD10B504463C21C7 -:108DF00012F084F8A07F80088000A07720202070E7 -:108E00000020A0752034607010BD00003881000083 -:108E1000B5050000640C0020FFFF0000012A0000DF -:108E200000C0010028000020023000001C070000E4 -:108E30007047FEB50546FF480C46814207D3012026 -:108E40008004844205D3FC480068844201D210208B -:108E5000FEBD002D02D0012D32D126E0F7490822B7 -:108E60000F46684611F0EDFF39462046FFF78EF9B0 -:108E70000028EDD1FEF7A5FF060006D007226946BF -:108E8000384611F0DEFF3046FEBD2078002801D0C4 -:108E9000012805D1E94807223946C01D11F0D1FF4C -:108EA0000021092003F0A9FB0FE00978002907D071 -:108EB000012905D0022905D0032903D0E048FEBDD1 -:108EC0000720FEBD0120FFF7E9F9DC480C38857664 -:108ED0000020FEBD10B5D8490968884201D2102093 -:108EE00092E7D64902460C390B7B0D311846FFF745 -:108EF00077F9002088E7FFB599B00546002008A95A -:108F000008746946087108A908730875CA481446A8 -:108F10000121C84A890400681E46002D05D09542EB -:108F20000BD38D4201D3854207D3002C08D0944245 -:108F300003D38C4204D3844202D210201DB0F0BD72 -:108F40002846204318D01F270BAB0CAA00972846B1 -:108F50001A99FFF79FF80028F0D10DAB01AA31460E -:108F600020460097FFF796F80028E7D16846007979 -:108F7000C00703D00A20E1E70720DFE702AF002D9A -:108F80000FD01A20694608721A9888722946F81C70 -:108F90001A9A11F056FF0EA902A802F0CEFD002881 -:108FA000CCD1002C0ED02021684601728672324648 -:108FB0002146F81C11F045FF0EA902A802F0BDFDE4 -:108FC0000028BBD19D4908A8007B0C3948700020BF -:108FD000B4E770B506460A200C46087015461146DF -:108FE000204602F0AAFD002807D139212170204631 -:108FF000294602F0A2FD002804D0082801D190489B -:10900000401C70BD2A462146304600F0B9FC04469B -:10901000082803D18B498C4812F09DF8204670BD7A -:10902000F0B5044689A003C897B0824D002715917A -:109030001490AC4211D380480121890403688C420A -:1090400001D39C4209D32078012809D16268AA4241 -:1090500003D38A4204D39A4202D2102017B0F0BD43 -:1090600076490C390A78012A0CD18A88794B9A42C0 -:1090700003D0002806D0012804D08A7F13079B0F55 -:1090800006D101E00820E9E7D30701D1910701D516 -:109090001120E3E7218A704B0A46203A9A4207D30F -:1090A000012877D1002975D1628A002A72D111E096 -:1090B000022801D0032801D1A0296BD3012809D0AF -:1090C0005E4A0C3A5278D20704D0628A002A61D0F4 -:1090D000B42A5FD8002806D0012808D0022804D07E -:1090E000032857D117E0002518E0022516E00029D3 -:1090F00002D1608A00280CD004256068007800281E -:109100000CD0012809D0022807D0032805D04C48EC -:10911000A4E70125F1E7032500E00127207A0028D4 -:1091200006D0012806D0022806D0032867D105E022 -:10913000002604E0012602E0022600E00326002DBE -:1091400001D0022D16D1002E14D0E068002803D0E3 -:10915000FEF732FF002881D138480C38407880076C -:1091600002D03748401E79E7022D03D1022E46D0A7 -:10917000032E44D0182168460170218A4180218A3B -:10918000818085712D480C38007B002803D0012890 -:109190006FD104E033E000216846C17102E0012094 -:1091A0006946C8716846077221780930012920D0C4 -:1091B000062111F0A3FE69460E74207D8207C107C7 -:1091C000D20F4007C90F5200C00F11438000014366 -:1091D00014A8405C6946C873002810D009A96846E5 -:1091E00002F0ABFC002893D1002D0AD0022D08D04C -:1091F00012E061680622491C11F023FEDBE707201C -:109200002CE7002E08D0E068002805D009AA69469E -:10921000FFF7DFFE0028A6D11B2069460870012059 -:10922000887009A9684602F088FC00289BD108A82C -:10923000407913E000C0010028000020700C0020DD -:1092400002320000388100002708000007060504EC -:1092500003020100FFFF0000E13F00001B2819D1BD -:109260002B0012F099F80504040707040A000320F4 -:1092700001E00FE00220FEF76BFD012D0CD0608AAB -:10928000002809D0002283001146104603F00EF991 -:10929000002801D00320E1E60020DFE6F3B5032635 -:1092A00087B00D4600290AD0FE4885426FD30120C1 -:1092B0008004854203D3FC480068854267D3079841 -:1092C000FEF7A1FD040005D02078222804D2082052 -:1092D00009B0F0BDF548FBE7A07F8707BF0F002D61 -:1092E00005D029463846FEF732FE0600F0D1394651 -:1092F0000027EF48012907D0022931D0ED49EE4877 -:1093000011F029FF3046E3E7A27D2946012A02D069 -:10931000827F920701D51120DAE700291BD10821AD -:109320006A46049711820592418904AAE348FBF733 -:10933000FFFA0028CCD16846008A082801D0032013 -:10934000C6E7684601880181418841818188818121 -:10935000C188C18102A9079802F0E7F90646D1E762 -:10936000A17D022916D1807F800613D4002D04D060 -:10937000A07F40070CD4002100E00121079802F0F3 -:1093800014FA0600BED1A775002DBBD004E01AE088 -:109390001126B7E7002D16D02A4621460798FEF77A -:1093A00050FF06461128ADD1A07F4007AAD4204621 -:1093B000082229460E3011F044FDA07F0421084305 -:1093C000A07700269EE7102082E770B50C46054680 -:1093D000FEF719FD010004D022462846FEF711FFD2 -:1093E00070BDB24870BD00B50146143195B0192961 -:1093F00001D2810707D001461E3104D00A3102D0C4 -:10940000072015B000BD312269460A70887009A98D -:10941000684602F092FBF4E701B582B0022069468B -:109420000880A34802AB00896A460021FBF7EAF8EE -:1094300069460988022900D003200EBD1CB5002111 -:10944000009102216A46118097490190096888427B -:1094500001D210201CBD964801899848FBF768FA94 -:10946000694609880229F5D003201CBDF0B50E46D7 -:109470008C4985B0174605468E4207D38A4801229B -:1094800092040068964204D3864202D2102005B0AE -:10949000F0BD1F2F01D90C20F9E7854C8D4226D352 -:1094A000954201D3854222D3E08803A9FBF75BF8FC -:1094B0000028ECD1287869464873E08803A9FBF7B7 -:1094C00033F80028E3D16946009008780221084368 -:1094D00069460870497B090703D00821084369469B -:1094E0000870E0886946FAF7B8FF0028CFD16946CE -:1094F0008F80E088334601AA0021FBF783F8694694 -:109500008988B942C3D00320C1E71CB50C460021AD -:1095100000910191228869460A8063490190096897 -:10952000002801D0884201D38C4201D210201CBDFA -:10953000002801D0002A09D05D486A46C1885F48EA -:10954000FBF7F6F96946098821801CBD0C201CBD7B -:1095500010B50123FEF75DFC56E4002310B51A4652 -:109560001946FEF756FC4FE470B504464D4894B0DA -:10957000844207D301208004844206D34A4800680D -:10958000844202D2102014B070BD2046FEF766FD62 -:109590000028F8D146488178112901D00820F2E747 -:1095A000817FC90601D51120EDE71D2269460A70A9 -:1095B00021780025CA07D20F69468A7022898A80DD -:1095C0006289CA80217801268907CA0F69464A72D2 -:1095D000007B002803D0012804D00320D3E70846ED -:1095E0000D7201E008460E7209A902F0A6FA0028E1 -:1095F000C9D12078800708D56068002805D009AA5D -:109600006946FFF7E6FC0028BDD11E2168460170BF -:109610008670C57009A902F090FA0028B3D1A0891C -:1096200000F073F90400AED11220FEF7AAFB204629 -:10963000A9E7F0B516461C4A0C4605001948204912 -:10964000126899B005D085420FD38D4201D395425F -:109650000BD3844209D38C4201D3944205D3864272 -:1096600003D38E4204D3964202D2102019B0F0BD2B -:109670000F4FB87FC106890F01D1400701D51120D6 -:10968000F4E72046FEF7EAFC0028EFD120788107B6 -:10969000C90F294303D0800714D5002D12D007200D -:1096A000E4E7000000C001002800002002300000B4 -:1096B000640C002038810000F3090000FFFF000067 -:1096C0000000040031460220FEF741FC0028CDD105 -:1096D000C9488078112803D0122801D00820C5E796 -:1096E0000220002714A9189002F08DFB00280DD04D -:1096F000C2A1C64811F02FFD08E01598807F8107B0 -:109700001898890F814201D17F1CFFB214A802F082 -:1097100088FB0028F1D0032F01D30420A6E7B64828 -:109720008078122803D1FFF7EEF800289ED1207828 -:10973000800708D56068002805D009AA6946FFF7A8 -:1097400048FC002892D1212168460170218941807E -:1097500061898180207800278007C10F6846817168 -:1097600020788007002815DB2878002807D00128FA -:1097700008D0022806D0032804D0A54876E768461A -:10978000C77102E001206946C8710622691C02A85F -:1097900011F057FB9848007B002803D0012804D023 -:1097A000032063E76846877302E0012069468873F7 -:1097B00031886846018271884182B1888182F1884E -:1097C000C1820783478309A902F0B7F9002886D12F -:1097D000A08900F09AF80400A0D11320FEF7D1FA76 -:1097E000204643E730B505468A4895B000680C46E8 -:1097F000814202D2102015B030BD2846FEF703FB8F -:10980000002807D00178222902D3807F800603D464 -:109810000820F0E78048EEE7132168460170458094 -:1098200009A902F08AF90028E5D108AA0A215156AF -:109830007F2901D02170DEE70520DCE710B56E49F5 -:10984000012807D0022815D0FF206CA14D3011F05F -:1098500082FC81E60878032804D0FF2067A143300A -:1098600011F079FC0021084602F0C7FE0120FEF746 -:109870006FFA71E68878132804D0FF205FA1483082 -:1098800011F069FC0021072002F0B7FE1120FEF75D -:1098900078FA61E6F8B504460122022102F044FAA2 -:1098A000074601220321204602F03EFA0646012225 -:1098B0000521204602F038FA0546012204212046FF -:1098C00002F032FA0446002F04D1AF204BA18000F1 -:1098D00011F041FC002E04D14C4848A11A3811F077 -:1098E0003AFC002D04D1494844A1193811F033FC49 -:1098F000002C04D1454841A1183811F02CFC22213C -:109900003846FEF7B7FA3846F8BD10B5002809D03A -:10991000830000221146072002F0C8FD072801D06D -:10992000032019E6002017E610B504460068002859 -:109930000CD03A49884207D301218904884205D3D3 -:1099400034490968884201D2102005E601F060F828 -:10995000A088294CA083A07E01280DD100210920D8 -:1099600002F025FE002800D00120A17C89090129F0 -:1099700004D00321FEF792FC0020EDE50221F9E777 -:10998000F7B500260C4605460B271AE02968B000FB -:1099900009580978002903D0012901D00720FEBD0C -:1099A000A170296806220958E01C491C11F049FAE7 -:1099B00027702046029902F0C0F80028EFD1761CEB -:1099C000F6B22879B042E1D800263A270FE0A8681D -:1099D000B10041581022A01C11F033FA2770204624 -:1099E000029902F0AAF80028D9D1761CF6B2287B99 -:1099F000B042ECD80020FEBD640C00207372635CA2 -:109A00006761705F636F72652E630000D7020000AC -:109A100002320000280000200230000000C00100D7 -:109A200030B5FE4B9A4207D301239B049A4205D3DB -:109A3000FB4B1B689A4201D2102030BD1578EB0613 -:109A40005B0F042B07D85478072C04D39378102B82 -:109A500001D8A34201D2072030BDD3785B0702D4DE -:109A600013795B0701D5062030BDC37FAC075B08C7 -:109A70005B00E40F2343C3770878EF231840137883 -:109A80009B06DB0F1B0118430870F1231840137865 -:109A9000DB065B0F5B0018430870507808730020EA -:109AA00030BD30B500240C70C378DB07DB0F0B70C2 -:109AB000C578AD07ED0F6D002B430B70C5786D07B2 -:109AC000ED0FAD002B430B7014700179C907C90F5E -:109AD000117003799B07DB0F5B001943117000794C -:109AE0004007C00F80000143117030BD70B51446AF -:109AF0000D460646F7F736FF002809D0A22101706F -:109B0000142221460830F7F75FFBF7F70CFF70BD12 -:109B1000132229463046FEF774FB70BD70B514461B -:109B20000E460546F7F71EFF002809D022210170D6 -:109B300045802178017261784172F7F7F4FE70BDBB -:109B4000132231462846FEF75CFB70BD10B5B54CBC -:109B5000207C00280DD12046B34A21461038FEF75C -:109B6000A7F8002803D0B1A1F12011F0F4FA0120E8 -:109B7000207410BDFFB581B00A9D06461C461746ED -:109B80001421284611F0BCF90B9800210160F80758 -:109B90000ED0A34920680968884239D31230286062 -:109BA0002068143068602068A8600B982168016004 -:109BB000B80726D56068002803D09949096888420B -:109BC00026D3029900290AD0FC3600280ED031464F -:109BD0001030FEF7DBFA00281BD1606810E0002887 -:109BE00016D0E86080366068B0670AE0FFF7CFF80B -:109BF00001460722304611F024F9FFF7A7FF8948F4 -:109C0000E860780708D58649A0680968884202D2CA -:109C1000102005B0F0BD28610020FAE770B50546B8 -:109C200011200C460870002161702121495D002936 -:109C300008D003290ED0042910D0FF207BA1523078 -:109C400011F089FA20780009012802D9E87FC008BC -:109C5000607070BD0007000F203002E00007000FA9 -:109C600030302070EEE770B594B015460C462C22CB -:109C70006946189E0A704880002B17D008221946A2 -:109C800001A811F0DEF868468581102231460E30B9 -:109C900011F0D7F809A9684601F04FFF002803D159 -:109CA000A17F10221143A17714B070BD0020019054 -:109CB0000290E8E7F0B50646008A97B080B20D46FC -:109CC0000190FEF7A0F804465648317848385B4FBB -:109CD00009900B0011F060FB0EFEFD43084A7283F1 -:109CE000B8D9FCFBFAF9F8FEA07F8007800F0128A5 -:109CF00007D000210022019802F016F8050007D1D4 -:109D000001E00121F6E7FF2048A1943011F023FA89 -:109D1000387CC00904D049484038406DA86112E041 -:109D20002B20694608720BA902A801F006FF002843 -:109D300004D0FF203DA19F3011F00DFA40490C984E -:109D400011F0E8F8A9617068A862B068E86220784C -:109D5000252804D0FF2035A1A53011F0FCF93246AA -:109D600021460198FFF7C2FE17B0F0BDA07F800723 -:109D7000800F012807D000210022019801F0D4FFB4 -:109D8000060007D101E00121F6E7FF2027A1AF304F -:109D900011F0E1F92078252804D03078012108431A -:109DA0003070E1E702202870B068A860B068002831 -:109DB00002D000202871D7E70120FBE72B2069465D -:109DC0000870184968464C3901F0B7FE002804D0E5 -:109DD000FF2016A1CE3011F0BEF903201BE02A208F -:109DE0006946087000A810220230716811F029F845 -:109DF00004A810220230B16811F023F8094968461E -:109E00004C3901F09AFE002804D0FF2007A1DF3072 -:109E100011F0A1F904202870099813E000C0010096 -:109E200028000020300D0020FFFF00007372635CEB -:109E30006761705F7365632E63000000500E002041 -:109E400040420F0068608FE7B068002804D1FF200F -:109E5000F649EB3011F07FF9E07F400704D5FF2091 -:109E6000F249EC3011F077F9B06806220A38009018 -:109E700033790421019801F058FA002891D0FF208D -:109E8000EA49F13011F067F96EE7002C04D1FF20A8 -:109E9000E649F93011F05FF92046223010220546DC -:109EA000716810F0CEFF28212046FDF7E3FFA07F68 -:109EB0008007800F022814D100231A4621460095FE -:109EC0000198FFF7D0FE06E055E1B6E0ACE089E08E -:109ED0002CE065E069E111280BD029212046FDF72F -:109EE000C9FFE07F317A4007400FC9000843E0779F -:109EF0003AE7A07F000703D5CC49CD4811F02BF9F4 -:109F0000A07F08210843A0770020608620463430D7 -:109F100010F0F4FFE07FFD220146C9071040890FD1 -:109F20000843E077307A203420701DE7A07F800757 -:109F3000800F012807D000210022019801F0F4FED3 -:109F4000040007D101E00121F6E7B948B7491D3007 -:109F500011F001F92B2069460872B64902A801F0F8 -:109F6000ECFD002804D0B248B049223011F0F3F8DB -:109F7000B0488188204621300176090A41760E21B9 -:109F800029702146FC316960017E2974407E687425 -:109F9000A8482C30A860103030346C61E860E3E6EB -:109FA000002C04D1A248A149363011F0D4F8207811 -:109FB00021289DD93079012802D0022808D103E058 -:109FC000E07F04210843E077387C0121084338749E -:109FD000324621460198FFF789FD23212046FDF7EF -:109FE00049FFC1E601220421019801F07DFC00280F -:109FF0009BD0A07F8007800F012807D0002100227E -:10A00000019801F091FE040007D101E00121F6E77B -:10A0100087488649543011F09EF80F202870172089 -:10A0200028716E34AC609FE60421019801F0ABFC0E -:10A030000028B4D11020287096E6A07F8007800FFA -:10A04000012807D000210022019801F06DFE0500D3 -:10A0500007D101E00121F6E7754874496D3011F030 -:10A060007AF82E462036307E41064DD5A17F8F07E7 -:10A07000BF0FC00713D02A468032516F00290ED07F -:10A08000087CF37DC007C00F5B0018430874516F54 -:10A09000E27F40084000D207D20F10430874307EA0 -:10A0A000000713D528468030026F002A0ED0117C9D -:10A0B000F37DC907C90F5B0019431174E27F49089A -:10A0C0004900D207006FD20F11430174307E800720 -:10A0D0000BD5F8204259002A07D0012F05D0294678 -:10A0E000307C31311032FEF77BF8307EC0060BD564 -:10A0F000F8204259002A07D0012F05D12946307C8B -:10A1000031311032FEF76CF8052368460370357E56 -:10A110004570484822226038019902704278D2087E -:10A12000D200D21C4270418003724572F7F782FD63 -:10A130002078252809D021280BD0AD203B4980006C -:10A1400011F009F82078222803D922212046FDF7B2 -:10A1500091FEA07F8007800F01280AD0002101987E -:10A1600001F009FE002800D1FEE5AF202F49800054 -:10A1700088E60121F3E774682E4D207860350928C0 -:10A1800002D00A28F0D10BE0E168002902D028466D -:10A19000F8F7D7FE2169002902D02846F8F7D1FE4A -:10A1A00021462846F8F7CDFEDEE521481F49DC3080 -:10A1B00068E6204810B5072228216030F8F7A8FE8D -:10A1C0001D480024017C4906490E0174403844654D -:10A1D000FDF7FBFC17493C3108461038F7F779FCCE -:10A1E00014484C30047410BD70B50D46FDF70BFEDD -:10A1F000040004D103200D49000210F0ACFFFF2140 -:10A200000531284610F07CFEA07F8007800F0128D2 -:10A2100016D0022128468830FDF7D8FC002803D04C -:10A220000249064810F097FF70BD00002C9E000008 -:10A2300005020000E40C0020500E00200503000081 -:10A240000121E7E70A46014610B510468830FDF7C0 -:10A25000D7FC10BDF0B505464068082601789BB0D4 -:10A2600008290DD00B2903D00C293FD10121817180 -:10A27000686887883846FDF7C6FD040041D13BE099 -:10A2800047883846FDF7BFFD040003D1FD49FE486D -:10A2900010F061FF2078212828D0282828D168686C -:10A2A00002210C3000F0BEFF002821D06868082190 -:10A2B000001D00F0B7FF00281AD02D21684601705C -:10A2C000478021461022223101A810F0BAFD0FA9C3 -:10A2D000684601F032FC002804D0CB20E949800018 -:10A2E00010F039FF29212046FDF7C4FD1BB0F0BD59 -:10A2F000687830436870F9E7E348E2492D3010F0A0 -:10A300002AFFA07F8107890F022902D1EF2108408F -:10A31000A0772078212810D068688179002902D0A0 -:10A320008078002818D0A07F8007800F022864D092 -:10A330000720D449C00110F00EFFA07F8007800FD6 -:10A340000228D3D1FDF7ECFF0028CFD0CE48CD496D -:10A35000733010F000FFC9E7687830436870E07F21 -:10A36000C00701D0042100E00321212001552078FD -:10A37000292818D02428E0D13946062002F03DF9DA -:10A3800022212046FDF776FDA07F8007800F01285F -:10A3900031D00021384601F0EEFC0028CDD0BA487B -:10A3A000B8495830C7E7A07F8007800F012807D041 -:10A3B00000210022384601F0B7FC050007D101E07A -:10A3C0000121F6E71B20AF49400110F0C4FE252112 -:10A3D0002046FDF74FFD0D2008A90871284609A960 -:10A3E0008830FDF7FFFB0228A7D00028A5D0A6489B -:10A3F000A4494D309FE70121CCE76878304368706D -:10A400009BE7F7B58AB00A98FDF7FDFC050056D02A -:10A410002878222853D3232851D0E87F40074ED4F0 -:10A42000A87F8007800F01280ED0002201280DD0C0 -:10A4300000210A9801F078FC064694480290F8F74B -:10A4400077FD040009D103E00122EFE70121F0E7E5 -:10A4500075208C49C00010F07EFE002E0FD088368B -:10A4600066610298F8F764FD07460298F8F760FD08 -:10A4700006462878222807D0242805D008E00020A6 -:10A4800007460646606103E025212846FDF7F2FCF9 -:10A49000092020700A9820620C9820710B98E760C0 -:10A4A0002661A06004A92046FDF7C0FB022806D063 -:10A4B000002804D074487349AF3010F04CFE0DB042 -:10A4C000F0BD30B587B00446FDF79DFC0546807FA2 -:10A4D0008007800F01280BD000210022204601F0C8 -:10A4E00023FC0446287822281ED9002C07D101E03D -:10A4F0000121F2E764486349BB3010F02CFE0F21C4 -:10A50000684601701721017120466E30029069463D -:10A510001A30FDF767FB022806D0002804D05A48FD -:10A520005849C03010F017FE07B030BD30B587B0C5 -:10A530000446FDF768FC0546807F8007800F0128F0 -:10A540000BD000210022204601F0EEFB04462878C3 -:10A550002228E9D9002C07D101E00121F2E74A487D -:10A560004849CD3010F0F7FD1020694608702046AC -:10A570008830FDF737FB0028D6D043484149D0301A -:10A5800010F0E9FDD0E7F7B505460078002700098F -:10A5900082B00C463E4602287CD0072802D00A280A -:10A5A00049D149E068680178082906D00B292FD0E5 -:10A5B0000C292DD03349364865E114271A26002C82 -:10A5C00069D04088A080FDF71EFC0090002804D1CF -:10A5D0002F482C49243810F0BEFD00980099C07D0A -:10A5E000A21D1831FDF7FCFD686808228089E08112 -:10A5F000696820461030091D10F023FC207E0121DF -:10A600000843F9210840207600984021807F50E0DF -:10A6100018270826002CD3D08088A080FDF7F3FBF4 -:10A62000050004D11A481749401F10F094FDA11DE0 -:10A630002846FFF7F3FA28E1002C01D0288BA080F0 -:10A64000287A01287ED0022805D0032838D0104867 -:10A650000C49853017E11C270726002CB0D0A088B4 -:10A66000FDF7D1FB0090002804D1094805491330BB -:10A6700010F071FD287B8007800F0128A0791CD085 -:10A68000400809E02C9E00001A030000440D002041 -:10A6900027040000E9E0E3E04000A071FD2108404C -:10A6A000297B4907C90F49000843A0710098802100 -:10A6B000807F084300998877E7E001210843ECE7B1 -:10A6C00013270B26002CA6D0A088FDF79CFB00903A -:10A6D000807F8007800F012807D00021A0880022FA -:10A6E00001F022FB050006D101E00121F6E7FB495C -:10A6F000FB4810F030FD0098807F8007800F012814 -:10A7000050D0E86A81788907890F0129A1794BD057 -:10A7100049084900A1718278FD255207D20F2940CE -:10A7200052001143A171E322114002785207D20E68 -:10A730001143A171DF2211404278D207920E1143DA -:10A74000A17100E033E00021E171C178217242790A -:10A750000179607AD30740084000DB0F1843930764 -:10A76000DB0F28405B0018435207FB23D20F184031 -:10A77000920010436072A07ACA0740084000D20FCE -:10A7800010438A07D20F2840520049071043C90FCF -:10A79000184089000843A07200980078232874D9D3 -:10A7A0002621C4E0A86AADE701221143B2E7297B64 -:10A7B000CC48022911D017270C26002C50D0012993 -:10A7C00012D003291FD0042920D005291ED09320A0 -:10A7D000C249C00010F0BFFC23E019270726002C57 -:10A7E00053D00121A17105E00121A171E17989080E -:10A7F0008900E171017CCA094906D201890E49002C -:10A800000A4302740DE00220A07106E0687B000795 -:10A81000000F8030A07105291DD0E07980088000EC -:10A82000E071A088FDF7EFFA0546007821282CD0CA -:10A83000232804D0AA48A949573010F08CFCA87FDF -:10A840008007800F01280ED00021A08801F093FA24 -:10A85000222128466CE0E07980088000401CDFE778 -:10A860000498068017E00121EFE7002C01D06888EA -:10A87000A080287A032832D004280FD005285AD087 -:10A8800097489649B03010F066FC0498002C06807A -:10A8900001D027806680002005B0F0BD15270C266A -:10A8A000002CDDD0A088FDF7AEFA807F8007800FF6 -:10A8B000012807D00021A088002201F035FA050008 -:10A8C00007D101E00121F6E785488449763010F090 -:10A8D00042FC0622A11DA86907F036FAD5E7162723 -:10A8E0000726002CBCD0A088FDF78DFA0090807F51 -:10A8F0008007800F012807D00021A088002201F0E6 -:10A9000013FA050007D101E00121F6E77448734905 -:10A91000843010F020FC2878C00601D5022000E029 -:10A920000120A071009800782328AED92721009833 -:10A93000FDF7A0FAA9E717270C26002C90D0A088D5 -:10A94000FDF761FA00906D7A002804D164486349EC -:10A95000973010F000FC0621A01D10F0CFFA002067 -:10A96000A071207A032108432072FB21084000993E -:10A97000C97FC907490F08432072680685D5E07969 -:10A9800004210843E071A07AE90740084000C90F9C -:10A990000843E17A2A0749084900D20F1143FD22F2 -:10A9A000AB07DB0F10405B001843A072E806C00F36 -:10A9B000114040000143E17267E710B50446807919 -:10A9C00090B08009012804D045484449C93010F0AE -:10A9D000C2FBFFF7BBF801206946087042480890A7 -:10A9E00042480190201D0290601C0B900AA9684605 -:10A9F000FDF71CF9002804D039483849D43010F04C -:10AA0000AAFB0322601C0B9910F01BFA10B010BDBA -:10AA100010B5364C002805D001461022204610F013 -:10AA200010FA0120207410BD10B50446FFF78EF80F -:10AA300010222E49204610F004FA10BD70B50025F2 -:10AA4000284C00281CD02A49884207D301218904B8 -:10AA5000884205D327490968884201D210250DE0B4 -:10AA6000062107F05BF9411C07D01E4940394865B3 -:10AA7000207C80210843207400E00725284670BD13 -:10AA8000207C4006400EF6E7F3B5002089B00D4665 -:10AA9000029000290AD0164885421CD30120800468 -:10AAA000854203D313480068854214D30998FDF703 -:10AAB000AAF9060003D03078222826D102E00E48F9 -:10AAC0000BB0F0BD002D19D1B07FC10903D08007B4 -:10AAD000800F022812D01020F2E700002C9E000008 -:10AAE0004D040000500E0020FFFF0000300D00203C -:10AAF00000C001002800002002300000B07FC10625 -:10AB000001D4010703D5002D01D00820D8E7FE4964 -:10AB1000097CC90717D1F17F490701D50D20CFE77F -:10AB20008007800F01280CD000210122099801F034 -:10AB3000FBF8070007D0B07F8007800F022804D001 -:10AB40000DE00121F1E71120BAE7002D07D02A46D8 -:10AB500039463046FEF764FF02900028B0D1EB483A -:10AB6000F8F7E6F9040003D1E949EA4810F0F3FAEE -:10AB70000A2020700998206238468830A060B07F93 -:10AB8000FB218007800F012829D0002D3DD0022015 -:10AB90002071381DE06038780007400F2074387845 -:10ABA000C006C00F6074A07C2A788008D20780009D -:10ABB000D20F1043A0740840F17F01AAC907490FC2 -:10ABC0000843A074A878E07469462846FEF769FF38 -:10ABD00068460079207568460078607519E00120A4 -:10ABE0002071207B2A788008D2078000D20F104382 -:10ABF0002073084029788907C90F8900084320730A -:10AC000024213046FDF736F90BE0032020710520A2 -:10AC1000207325213046FDF72DF9B07F4006400E08 -:10AC2000B07703A92046FDF701F8022806D00028D6 -:10AC300004D0B848B6492B3010F08DFA02983FE79F -:10AC4000FFB5B54A0E4607CA97B002AB07C3002747 -:10AC500001970C971798FDF7D6F8050005D02878CE -:10AC6000262804D008201BB0F0BDAC48FBE7A87F25 -:10AC70008007800F012807D000210022179801F0DB -:10AC800053F8040007D101E00121F6E7A148A049EB -:10AC9000623010F060FAA87F8007800F16900128BC -:10ACA00014D0022824D09B4899497B3010F053FAE5 -:10ACB00001210022852E31D01EDC002E26D0812ECF -:10ACC00026D0822E26D0832E1ED125E0002EEFD155 -:10ACD00021462846199AFEF7A3FE0028C3D11998E9 -:10ACE0008078019019980078C007C00F0C90DFE7BA -:10ACF0001998002808D1DBE7862E11D0882E11D0B4 -:10AD0000892E11D08A2E11D00720ACE710460EE014 -:10AD100008460CE002200AE0032008E0052006E0D7 -:10AD2000062004E0082002E0092000E00A200022BA -:10AD3000227101216A461176211D0791002801D058 -:10AD400020710BE1169801280CD0A66AE06A022255 -:10AD5000012111900020A0602846173002291AD046 -:10AD6000012119E0E66AA06A119003203070207872 -:10AD7000FB23C006C00F7070B07801221840019B01 -:10AD8000F37080080C9B800018430221B0700020F3 -:10AD900070713071DEE70021890009190861681CB3 -:10ADA000022A01D0012100E000218900091908616F -:10ADB000B0788007800F01285ED1119880788007D5 -:10ADC000800F012858D1119800790190119840798D -:10ADD0000090169801281DD0317908A80174717966 -:10ADE000017508A8027C01980099024008A8007D1E -:10ADF0000840149010433FD049491A98884207D31D -:10AE000001218904884215D346490968884211D234 -:10AE1000102028E70CAA0DA91998FEF742FE08A8F1 -:10AE2000007C01990840307108A8007D0099084015 -:10AE30007071D6E720463C3021460090F0311698DC -:10AE40000191022834D000211A9B20460C33FEF7D2 -:10AE500091FE0028DDD12046503021460090F4318B -:10AE600016980191012825D0002120461A9B149A9A -:10AE7000FEF780FE0028CCD111988078400702D4DC -:10AE8000E87FC0072BD0169902A8012914D0119988 -:10AE900009784900405A21780907490F4900C840FC -:10AEA0008707BF0F2AD0012F14D0022F0FD113E034 -:10AEB0000121C9E70121D8E721780907490F490095 -:10AEC000405A119909784900C8408707BF0F032FDE -:10AED00004D004E0022711E001270FE002271698B2 -:10AEE00001280BD1B078FB210840E97FC907490F41 -:10AEF0000843B07020780007400F30702078400879 -:10AF00004000207011990FE0500E0020440D0020E9 -:10AF10002C9E0000A90500001CB4010002300000B6 -:10AF200000C001002800002049781022C907C90E7E -:10AF3000D243114308402070C00622D4022F20D0F3 -:10AF4000012F20D00020A061E061206260622046D5 -:10AF50001830A060E87F40084000E877204606A946 -:10AF60008830FCF73FFE002805D0022803D0B44902 -:10AF7000B44810F0F0F825212846FCF77BFF0020AC -:10AF800071E6032008E020460D211B300FF0B6FFCC -:10AF900020461830A060042069460875E87F01212A -:10AFA0000843E87705AA29461798FEF7B7FDD5E7C5 -:10AFB000F0B587B015460F0004460DD0A248854273 -:10AFC00007D301208004854206D3A048006885424B -:10AFD00002D2102007B0F0BD2046FCF714FF060097 -:10AFE00004D03078272803D00820F3E79848F1E709 -:10AFF000B07F8007800F012807D000210022204663 -:10B0000000F092FE040007D101E00121F6E78D482F -:10B010008B491F3010F09FF80020002F05D0022F21 -:10B0200008D0012F11D00720D4E701216A46117101 -:10B03000A06018E0234618336946A3600871102207 -:10B04000294618460FF0FDFE0DE021461831A1609B -:10B0500069460871A061E0612062606206212846AD -:10B0600006F05CFEA0612078C10714D040084000C3 -:10B070002070022069460870204618300290703017 -:10B08000FCF7B0FD022806D0002804D06D486C49BA -:10B09000423010F060F825213046FCF7EBFE00202E -:10B0A00098E7F8B515460E460746FCF7ACFE0400D7 -:10B0B00004D02078222803D00820F8BD6448F8BDC9 -:10B0C000A07F8007800F022802D06148C01CF8BD15 -:10B0D0005D4886420ED3012189045C4A8E4202D328 -:10B0E00013689E4206D3854204D38D4204D3106870 -:10B0F000854201D21020F8BD00953288B31C21464C -:10B100003846FEF7B0FD112816D00028F3D1E17FB4 -:10B110002A7C4908D2074900D20F1143E1772A7CE3 -:10B1200049079206490FD20ED2001143E177A17F61 -:10B130004906490EA177F8BDA17F0907FBD4204637 -:10B140000822B11C34300FF07CFE30886086204627 -:10B150001022294622300FF074FEE07FFD210840C6 -:10B16000297CC907890F0843E077287C4108202003 -:10B170000155A07F08210843A0770020D7E770B5CC -:10B1800094B00D460646002B02D0072014B070BDC7 -:10B19000FCF739FE040007D02078222802D3A07FD4 -:10B1A000400603D40820F1E72948EFE7002D19D025 -:10B1B0002D216846017046801022294601A80FF013 -:10B1C00040FEE07F297C4008C9074000C90F0843C2 -:10B1D000E077297C40078906400FC90EC900084363 -:10B1E000E07703E02E2168460170468009A9684691 -:10B1F00000F0A3FCA17FBF221140A177C6E710B5E4 -:10B200000C46FCF700FE002805D0104909688C4266 -:10B2100003D2102010BD0E4810BD2146FEF7FEFCE3 -:10B22000002010BD05E00278401C002A01D000205B -:10B2300070470A46491E89B2002AF4D1012070479E -:10B240002C9E0000ED06000000C001002800002038 -:10B250000230000030B50346072903D00620DA7813 -:10B260001C7916E00320FAE707290BD05500ED18EA -:10B270006D79072D01D0401EC0B2521CD2B2092AEE -:10B2800007D105E05500ED186D79072DF3D0F4E7EF -:10B2900000222546641EE4B2002DE5D130BDFFB585 -:10B2A00081B00C461646114620460A9F0B9DFFF7BB -:10B2B000D1FF00280AD02079092803D3FEA1A020BD -:10B2C0000FF049FFA078C00907D019E0072E02D07F -:10B2D000112005B0F0BDFD48FBE701982880381D1E -:10B2E0006880002068712871EF80049828812846C2 -:10B2F00000F04BFC002803D1EFA1AD200FF02BFF95 -:10B30000E07821794018491CC0B22171092801D385 -:10B310000938C0B24000001946718179F12249080C -:10B320004900114081710020D3E7FFB583B0164674 -:10B330000F461C46002203210C9D039800F0F4FCEC -:10B34000010008D033463A46019500940398FFF770 -:10B35000A6FF07B0F0BDDD48801EFAE7F0B5054650 -:10B3600016460F4650888DB00022032100F0DCFC09 -:10B37000040003D1D0A1DF200FF0EDFE00206946CC -:10B380000871A078400603D1CBA1E3200FF0E3FEC3 -:10B39000042F5ED32A78D007C017401C06D16178ED -:10B3A0006B78994255D12178090752D00121142A8E -:10B3B00046DA012A42D0122A02D0132A40D128E0CC -:10B3C0000C2F3DD1A2785206520E012A38D0207897 -:10B3D00000090001401C20706878607068460171A7 -:10B3E00068792A790102114368460181E879AA79CE -:10B3F0000102114368464181687A2A7A01021143A9 -:10B4000068468181E87AAA7A010211436846C181BF -:10B410001AE0062F14D120780009000120707188ED -:10B42000012001F0EAF8022168460171C91E01817C -:10B4300068792A790102114368461FE0062F0AD075 -:10B440006A461279002A1BD07088324601A9FDF79E -:10B4500020FB0DB0F0BD207800090001207071883C -:10B46000012001F0CAF802216846017168792A7941 -:10B4700001021143684601810021C9434181E3E78C -:10B480000028E6D07488684681766978C176022102 -:10B4900081830021C18304A8052200900623114660 -:10B4A0002046FFF742FF0028D3D089A1D6200FF015 -:10B4B00052FECEE7F7B58CB015460C990D98FAF709 -:10B4C00041F9C0B2082850D10020694688856888B3 -:10B4D0000022032100F028FC040004D1FF2076A103 -:10B4E00063300FF038FE01230021E07822790BE071 -:10B4F0004600361976799E4201D1491CC9B2401CDA -:10B50000C0B2092800D100201646521ED2B2002E29 -:10B51000EED1002902D117206946888504AB023399 -:10B520000BAA00950C990D98F8F7B6FB0006000ED3 -:10B5300007D002281BD0032817D0FF205EA1893036 -:10B5400011E06846808D00280FD002A9019100907B -:10B550006888042301222146FFF7A1FE002804D0B9 -:10B56000FF2055A176300FF0F6FD0FB0F0BD6878E2 -:10B57000102108436870F8E700205A49024643004A -:10B58000401CCA520828FAD3704700218170017804 -:10B5900009090901017000214170C17001717047F2 -:10B5A00070B50D460022032100F0BEFB040004D15B -:10B5B000FF2041A1CF300FF0CEFDA0786906C00971 -:10B5C000C001490E0843A07070BD704710B5014618 -:10B5D000012001F012F810BD3EB58DB2002203210A -:10B5E000284600F0A1FB040004D1FF2032A1E43082 -:10B5F0000FF0B1FD2078694600090001207002209B -:10B60000087039488880C88000222846FDF741FA32 -:10B610003EBDF7B505460078002700090C463E46BA -:10B62000012804D0FF2024A1F3300FF094FD287AE4 -:10B6300003280CD0412020A1C0000FF08CFD0298FF -:10B64000002C068001D0278066800020FEBDEA899C -:10B65000702710460A3086B2002C0AD06888A08075 -:10B66000A8892081E28020460A3029690FF0E9FB91 -:10B67000E5E702980680E8E7F8B543680246D9791D -:10B680009C79090221435C7A1E7A25025C88981D08 -:10B690003543241FA14238D11B79022B35D1042D0B -:10B6A00034D0052D3DD0062D34D0402D2DD3061D90 -:10B6B0000F461446284619E07372635C6C3263616E -:10B6C000705F636F72652E6300000000043000003D -:10B6D0007372635C6C326361705F636F72652E635B -:10B6E00000000000680E0020FFFF000000F0E3F9FA -:10B6F00008280AD01120207003202072A581E7813C -:10B7000026616078082108436070F8BD001DFFF7CE -:10B71000D1FEF8BD031D50880A461946FEF771FE9A -:10B72000F8BD001DFFF71AFEF8BD70B50D468CB0D0 -:10B7300006460022032100F0F7FA040031D02078F9 -:10B740000007000F01282ED0122069468874607807 -:10B750000523801CC874082088822888C8826888CD -:10B760000883A8884883E888888302A90C2001916F -:10B7700000901A4621463046FFF791FD00280ED171 -:10B78000F02300223146012000F090FE20780009CD -:10B790000001401C20706078801C607000200CB09C -:10B7A00070BDCB48FBE71120F9E770B50D468CB0B2 -:10B7B00006460022032100F0B7FA040006D02078E4 -:10B7C0000007000F012803D00820E8E7C048E6E79B -:10B7D0001321684681746178C17402218182C58217 -:10B7E00002A906200523019100901A462146304601 -:10B7F000FFF755FD0028D2D1207800090001207004 -:10B800000020CCE7F3B581B00D460022032101985A -:10B8100000F08AFA00260446002803D1AD49AE485C -:10B820000FF099FC2079A8423BD2AB48A949401CB3 -:10B830000FF091FC35E0E07841000F19401C797958 -:10B84000C0B20091E070092801D10020E070207999 -:10B85000401E2071B879C00708D0009801990428CB -:10B8600015D09C49822018310FF075FCB87900077B -:10B87000410F08D0400F019904280CD095498F2022 -:10B8800018310FF068FC009807280AD107E0084635 -:10B89000FEF74CFEEAE70846FEF713FEF3E7761CD8 -:10B8A000F6B228466D1EEDB20028C4D13046FEBD6A -:10B8B00010B50022032100F037FA040004D1B520AE -:10B8C000844980000FF047FCE07821794018C0B22D -:10B8D000E070092801D30938E07000202071A078B9 -:10B8E00080210843A07010BDF8B517460D46002210 -:10B8F000032100F019FA040005D0002D0CD0002F10 -:10B9000007D0062006E0072D01D00620F8BD032051 -:10B91000F8BD0820A84204D86F486E4942300FF0A5 -:10B920001AFC29462046FFF795FC0646002F28D032 -:10B93000002E26D1E07821791CE0420012195379BB -:10B94000072B03D093791B075B0F04D0401CC0B2B8 -:10B9500009280CD00CE0400000198079F123184030 -:10B960006B071B0F1843907100290AD104E00020D7 -:10B97000491EC9B20029E0D1574856495A300FF044 -:10B98000EAFB3046F8BDF8B50D460022032100F071 -:10B99000CBF9040004D150484E4968300FF0DBFB6E -:10B9A000681E052804D34C484A4969300FF0D3FB80 -:10B9B0000921E2782079002310E0560036197779C2 -:10B9C000AF4206D1B17949084900B1715B1CDBB2C5 -:10B9D0001146521CD2B2092A00D100220646401E4E -:10B9E000C0B2002EE9D1092905D248000019817999 -:10B9F0000122114381711846F8BD10B50446402854 -:10BA000001D2072010BD00F056F8082802D03120DE -:10BA1000000210BD0021314802E0491C082903D270 -:10BA20004A00825A002AF8D1082903D0490044521A -:10BA3000002010BD042010BD10B5402801D2072001 -:10BA400010BD00F038F8082805D00021234A400036 -:10BA50001152084610BD052010BDF0B58BB016463A -:10BA60000C00074607D0002E05D06188402904D27B -:10BA700007200BB0F0BD1020FBE72088002801D084 -:10BA8000172801D90C20F4E7084600F014F808281C -:10BA90000FD0258803A82A46314602300FF0D1F98D -:10BAA00001A8009062882B4607213846FFF73DFC2D -:10BAB000DFE70520DDE701460020084A02E0401CE0 -:10BAC000082803D24300D35A8B42F8D170470000B4 -:10BAD00002300000B8B60000AD020000680E002081 -:10BAE00000B51E2827D00FDC0C2820D008DC03006E -:10BAF0000FF052FC0913211521211B1B17192100DE -:10BB0000122818D1072000BD302814DD3A38030070 -:10BB10000FF042FC030F11091100002000BD214865 -:10BB200000BD042000BD0D2000BD0F2000BD082079 -:10BB300000BD112000BD032000BD10B50C4604F06F -:10BB4000A0F800281ED0204602F013FE002816D0D0 -:10BB500022780E2A0DD00F2A0BD0022A09D0032AF0 -:10BB600007D0102A09D010A17E200FF0F4FA00208F -:10BB700010BDA078FFF7B4FF10BD112010BD0AA1C1 -:10BB80008420F2E708A18A20EFE710B502F0A2FCBA -:10BB900010BD10B502F0EDFD10BD10B502F01AFD9C -:10BBA00010BD0000023000007372635C686F737434 -:10BBB0005F6863692E630000F8B5054606ACC1CC2A -:10BBC000E44C21706270A370E070681C4208277119 -:10BBD0005200E14B66710021880000198446026220 -:10BBE000605C40008218002D0AD0002005E0664607 -:10BBF0004700366A401CF353C0B2665C8642F6D8F2 -:10BC0000491CC9B20629E7D30026D21C9708B00008 -:10BC1000BF0000198760304600F02AF9A15D761C4C -:10BC20004843C219F6B2062EEFD3501B80B2F8BDBE -:10BC3000F0B504468C46C7490020A500FF23024604 -:10BC40006D18C54E0C5D0BE02F6A5100795AB14258 -:10BC500004D1401CC0B2FF2B00D11346521CD2B2FB -:10BC60009442F1D8002801D061460B70F0BD70B548 -:10BC7000B84C0023655CA678B54200D10346890024 -:10BC800009199D420AD90C6A5E00A45B844202D164 -:10BC90001370012070BD5B1C9BB2F2E7002070BDE9 -:10BCA000FFB583B00C9C1F460D46060009D0002D41 -:10BCB00007D0F01C80088000B04204D0102007B0EC -:10BCC000F0BD0E20FBE70598A04201D8A74201D99C -:10BCD0000720F4E701460094019423463A460020E9 -:10BCE0000294FFF769FF2988814207D0814201D27F -:10BCF000042100E0092128800846E0E7009401942F -:10BD000023463A46029430460599FFF755FF2880AE -:10BD10000020D4E710B5044600F0B4F8002801D0A4 -:10BD2000E0B210BDFF2010BDF8B505468A481646A2 -:10BD30000C46854201D0062C01D30020F8BD002717 -:10BD400069460F7028466A462146FFF790FF002893 -:10BD50000DD068460178204600F09CF8002EEDD00A -:10BD60000028EBD12146284600F0A0F8F8BD38465F -:10BD7000002EF7D1F8BDF8B505460C460020764EEA -:10BD80006946764F0870B5423BD0062C01D3072098 -:10BD9000F8BD0A4621462846FFF769FF002830D043 -:10BDA00068460178204600F075F823000FF0F4FA99 -:10BDB000060404090C11161B01462846FEF742FA38 -:10BDC00015E0FDF735F812E001462846FFF7FDFBC8 -:10BDD0000DE001462846F7F7E4FE08E00146284654 -:10BDE000F9F73AFB03E05EA17C200FF0B4F9594A61 -:10BDF0006846A10000788918096A40000E520020A8 -:10BE0000F8BD3846F8BD5A4A1268914201D2102056 -:10BE10007047062801D30720704708720020487237 -:10BE20007047F8B5044652480068844201D2102099 -:10BE3000F8BD207A474A83009B18617A464D125C10 -:10BE400011E01E6A4F00F65BAE420AD04A1C6272D5 -:10BE50001A6A4B00D25A228000F01CF86060002061 -:10BE6000F8BD491CC9B28A42EBD861720520F8BD01 -:10BE70000EB5404B40000ECB0091029301926946F3 -:10BE8000085A0EBD33498978814201D90120704793 -:10BE90000020704770B50C460546FFF7E9FF2D4AB4 -:10BEA000A900891889686043401870BDF8B5044638 -:10BEB0000E4600206946087005462046FFF7E2FF5F -:10BEC000002803D126A1F3200FF045F92148214B8A -:10BED000815D8278B000C718914209D1E0B269460D -:10BEE0000870396A4000085A1B49884206D02EE083 -:10BEF00069463046FFF79CFE002828D06846007847 -:10BF0000396A40000C52684601783046FFF7C2FF9C -:10BF1000054633000FF040FA060404090C0F14170D -:10BF200029462046FEF760F911E0FCF75EFF0EE0BF -:10BF3000FFF72BFB0BE029462046F7F7F9FD06E05B -:10BF4000F9F783FA03E006A162200FF004F928460E -:10BF5000F8BD0000780E0020FFFF00000230000056 -:10BF60007372635C686F73745F636D2E63000000AF -:10BF70002800002028B401008107C90E002808DA33 -:10BF80000007000F08388008C24A80008018C06986 -:10BF900004E08008C04A800080180068C84000069D -:10BFA000800F7047BD4948788978884201D3401A8C -:10BFB00002E02122511A0818C0B27047B749233154 -:10BFC00048788978884201D3401A02E02122511A28 -:10BFD0000818C0B27047B14946314878897888421C -:10BFE00001D3401A02E02122511A0818C0B270474A -:10BFF000A94910B50C310868FF22120290430122B2 -:10C00000D20310430860A54900202331487088708E -:10C01000233948708870463148708870A04806F00F -:10C02000BCF89F48401C06F0B8F8F6F7A3FB00F0F8 -:10C0300028F910BD20207047B4E770B50C460546BE -:10C040000026FFF7AFFF9549A04214D30A46203AD5 -:10C0500000232046641EE4B200280BD08878105CD0 -:10C06000287088786D1C401CC0B288702128F0D1DF -:10C070008B70EEE7012600F004F9304670BD2020F9 -:10C0800070479BE770B50C4605460026FFF796FF04 -:10C0900082492331A04214D30A46203A0023204685 -:10C0A000641EE4B200280BD08878105C2870887871 -:10C0B0006D1C401CC0B288702128F0D18B70EEE757 -:10C0C000012600F0DEF8304670BD2021017000200E -:10C0D000704710B50446FFF77EFF2070002010BDAA -:10C0E00070B50C460546FFF776FF6C494631A04215 -:10C0F00015D30A46203A00232046641EE4B20028E5 -:10C100000BD08878105C287088786D1C401CC0B2F9 -:10C1100088702128F0D18B70EEE7002400E0614C9C -:10C1200000F0AFF8204670BD70B50C4605462129D9 -:10C1300004D9FF205CA147300FF00DF85548406846 -:10C14000103840B2FFF718FFC6B20D20FFF714FFFA -:10C15000C0B2864207D2FF2053A14D300EF0FBFF44 -:10C1600001E0F6F74AFB21462846FFF766FF002864 -:10C17000F7D070BDF8B507464948484C401E474EB9 -:10C180000078254646362335002806D1A9786878F8 -:10C19000212200F06BF800280ED0A17860782122CF -:10C1A00000F064F8002814D0B1787078212200F0F3 -:10C1B0005DF8002828D033E038496878C91C0F544E -:10C1C0006878401CC0B26870212829D100206870AE -:10C1D00026E03249607820390F546078401CC0B2A4 -:10C1E0006070212801D1002060702D4F7F1E3878AB -:10C1F000002815D0A1786078212200F037F80028B7 -:10C200000ED0002038700BE02449707826310F548E -:10C210007078401CC0B27070212801D1002070706D -:10C22000A9786878212200F021F800281DD0A17893 -:10C230006078212200F01AF8002816D0B1787078C2 -:10C24000212200F013F800280FD0F6F7B8FA1448AE -:10C2500005F0ABFF01214903884203D016A1C1209C -:10C260000EF079FF0E4805F0B8FFF8BD401C88427B -:10C2700005D0904201D1002901D000207047012053 -:10C28000704710B5064805F090FF002801D1F6F779 -:10C2900085FA10BD00ED00E000E400E0F00E0020A3 -:10C2A00069000020072000007372635C736F635F96 -:10C2B00072616E642E6300007372635C736F635F00 -:10C2C00072616E642E630000FEB5F54C074660682F -:10C2D000FF213E0181552178FF2913D00901083142 -:10C2E00041583246491E083209020192090A805813 -:10C2F00000F0CCF9002802D02478254615E06168CA -:10C30000207888552770FEBDE5484268019811588D -:10C31000280100900830105800F0B8F9002806D124 -:10C32000DF482C46416800980D5CFF2DECD1DC48BD -:10C330002101406885554754FEBD70B5D84A044672 -:10C340000020157A53680AE00201561C9E5DA64241 -:10C3500003D10C329A588A4204D0401CC0B28542A4 -:10C36000F2D8FF2070BDF8B5CD4F3E7801F00AFE3F -:10C370000146FF2E68D034012546786808354059BB -:10C3800000F084F9022802D9786840595AE0C4497B -:10C390004868025D0A70A11C425C002A0CD0521E43 -:10C3A000425441590122D20589180902090A415112 -:10C3B0003046FFF789FF30E0631CC25C0092221D0B -:10C3C00094468258002A10D001239B029A420FD92A -:10C3D0009205920D43595703DB191B021B0A435167 -:10C3E0006346C3589A1A920A09E0FF21C1540AE031 -:10C3F000435952039A181202120A4251002242541F -:10C400003046FFF761FFA6480C344168C2680098C7 -:10C4100009598000125800989047A14C2078FF28B5 -:10C4200012D001F0AFFD01462078626800010830AB -:10C43000105800F02BF9012896D920786168000186 -:10C440000830085801F091FDF8BDF8B51C461546B6 -:10C450000E460746FF2B03D392A1D3200EF07BFE9E -:10C460008F48FF21C7604560047206740170002286 -:10C470004270104604E00201521C401CA954C0B294 -:10C48000A042F8D3F8BD70B5854C06466578207C8F -:10C49000854203D383A1E6200EF05DFEE068A9008B -:10C4A00046506078401C6070284670BDFFB581B072 -:10C4B0001D46FF2401F066FD794F06467978019804 -:10C4C000814203D877A1F4200EF045FE7448002184 -:10C4D000037A406810E00A019446521C825CFF2AED -:10C4E00024D0019FBA4205D162460C328758029A85 -:10C4F00097421DD0491CC9B28B42ECD8FF2C17D0F3 -:10C5000021014B1C019AC2540B33029AC250039B67 -:10C51000634F0022012B0ED00B1DC25001239B0242 -:10C520009D4216D9AA05920D08D008E00C46E1E715 -:10C53000FF2005B0F0BD0B1DC550EFE71A465303B1 -:10C540009B190E461B0208361B0AAA1A8351920A2F -:10C5500009E0002D00D101256B039B191D022D0A56 -:10C560000B460833C550891C42543D463E78204650 -:10C57000FFF7AAFE2878B04217D001F003FD01466C -:10C5800028786A6800010830105800F07FF8012808 -:10C5900007D92878696800010830085801F0E5FCDF -:10C5A00003E001F010F9F5F7AFFE0198C1E770B5AF -:10C5B0000C46054601F0E6FC064621462846FFF7F4 -:10C5C000BCFEFF2817D0364D0401204669680830AC -:10C5D0000858314600F05AF80121090340186968EB -:10C5E000A41C095D400B002901D08902081800280D -:10C5F00000D1012070BD002070BDF3B581B00F46A1 -:10C600000198FFF79AFEFF282AD0254D2E786968F9 -:10C610003246344604E0844205D026462301CC5CF1 -:10C62000FF2CF8D11CE0FF2C1AD0A64221D110011A -:10C63000085C2870FF281AD001F0A4FC2A78014673 -:10C64000120168680832805800F020F8012809D9E2 -:10C650002878696800010830085801F086FC08E075 -:10C660000020FEBD01F0AFF8F5F74EFE01E001F04D -:10C6700084FC39460198FFF79AFF22016968FF237D -:10C68000541C0B558A5C3301CA54FEBD401A00028B -:10C690000121000AC905884200D900207047000026 -:10C6A0003C0F00207372635C736F635F74696D6528 -:10C6B000722E6300F0B500241C4A01211C4B0803B4 -:10C6C000546018601B4B1C601B4C20601B480469A5 -:10C6D000E443E406E617046910252C430461184C72 -:10C6E0006160184D2960761C00E020BF1F68002F94 -:10C6F000FBD0002E03D107691026B743076190686D -:10C700008005906801D5104A10436960A16000213E -:10C7100019600121084A09031160F0BD10B50446F3 -:10C72000FFF7C8FF2060002010BD000000C50040DA -:10C7300080E100E000C1004080E200E000ED00E0A8 -:10C7400000C3004000C0004000FCFFFF70B51F495F -:10C750000A68002A17D000231D4601244A68521C8B -:10C760004A60092A00D34D600E792246B2400E6815 -:10C7700016420AD072B60B6893430B6062B64968E2 -:10C780000160002070BD052070BD5B1C092BE5D346 -:10C790000FA136200EF0DFFCF5E7012010498005DF -:10C7A00008607047EFF31081CA07D20F72B60121FB -:10C7B00081400648036819430160002A00D162B62F -:10C7C000EBE70248002101604160704770000020E3 -:10C7D0007372635C736F635F6576742E6300000031 -:10C7E00000E200E001208107086070470120810716 -:10C7F000486070471048C068C00700D001207047EB -:10C800000D488068C00700D0012070470A48406981 -:10C81000C00700D0012070470748C069704706492B -:10C820008A69D20306D589698907890F814201D1B6 -:10C83000012070470020704700040040F8B5F74C15 -:10C84000207EE17D88421CD00126F54D0027E07D49 -:10C85000215C14200A4642435019037C052B11D059 -:10C86000037C062B1CD0037C072B28D0437C012B98 -:10C8700033D0ECA1EE480EF06EFC207EE17D8842C4 -:10C88000E5D1F8BD0674E07D162807D0E07D401C98 -:10C89000E075491CC8B2AA5802210CE00020F7E755 -:10C8A0000674E07D162808D0E07D401CE075491C28 -:10C8B000C8B2AA5803219047DFE70020F6E70674C4 -:10C8C000E07D162807D0E07D401CE075491CC8B209 -:10C8D000AA580821EFE70020F7E74774E07D162803 -:10C8E00007D0E07D401CE075491CC8B2AA5807215A -:10C8F000E1E70020F7E770B50024CE4E0C207072FF -:10C90000CD4825464473047328300476C475CB485B -:10C9100005F043FCCA480575F572CA49601E886077 -:10C920007571B570F57035717570C748E839057067 -:10C9300045701420604340180574641CE4B20B2C4D -:10C94000F7D30120F5F7E0FF0020F5F7DDFF012028 -:10C95000B071F5F7A3FCBD48F5F7B2FCBC4C2070F4 -:10C96000BC48F5F7ADFC6070F5F76EFF70BD10B513 -:10C97000F5F795FFB64C2078F5F7C0FC6078F5F731 -:10C98000BDFCAC4C207A002803D0F5F746FD002012 -:10C99000207210BD70B5A74CA079002804D0A1A1C9 -:10C9A000AD480EF0D8FB70BDE07A002803D19DA100 -:10C9B000AA480EF0D0FB0126A6710025E572607A28 -:10C9C000042114225043964A801801749D488168BE -:10C9D000491C04D0691E81600120F5F795FF0020F5 -:10C9E000F5F792FFF5F776FF05F018FDF6F777F803 -:10C9F0009B480560056001209A49C0030860F6F76E -:10CA0000EDF891480078022804D0032804D1E0789A -:10CA1000002801D0A67000E0A570F6F74CF870BDB4 -:10CA200003467F490B20142242435218203A127FBA -:10CA3000002A04D0401E0006000EF4D170471422D4 -:10CA4000424351180A46803AD366012220390A77B8 -:10CA50007047012805D0032805D1002903D1002003 -:10CA600070470029FBD010B4724C00236370764AE3 -:10CA7000002890700CD002280AD007291AD208008A -:10CA800078440079001887441505070D0F1113002D -:10CA9000D37003E01B2000E03A20D07001206070CA -:10CAA00010BC70475820F8E77720F6E79620F4E7A7 -:10CAB000B520F2E710BC0020704710B562484078FE -:10CAC000F6F714F880B210BD411E1422504310B581 -:10CAD000534A8418203C0A2902D8207F002803D119 -:10CAE00050A161480EF037FB207F012804D0B3200D -:10CAF0004CA180000EF02FFB0020207710BD70B5F8 -:10CB00004D4C607B217B884201D1012500E000254E -:10CB1000F5F785FFF5F7EAFF617B227B914201D1B2 -:10CB2000012100E00021A942EBD170BDF7B5064616 -:10CB3000481E84468EB0C0B2142205905043384A35 -:10CB400085180495287C2D1D07282AD1334C0027F1 -:10CB5000E07D227E824221D0235C059A934201D15E -:10CB6000012701E0002F04D0162811D0421CA25C3E -:10CB7000225416280ED0401C227EC0B28242EBD135 -:10CB8000002F0BD0207E002806D0207E401E04E01F -:10CB90000022ECE70020EFE716202076049801221F -:10CBA00002746046234C0A2813D8142041431C48C1 -:10CBB00008182038007F00280BD00498007C01283A -:10CBC0000BD00498007C012803D01098807A0128AB -:10CBD00007D014A125480EF0BEFA1098807A0128DB -:10CBE0006DD104980E4B007C022843D00B4C207E64 -:10CBF000162870D0207EE17D401C884203D109A117 -:10CC00001B480EF0A8FA049901204874217E05986B -:10CC10006054207E162862D063E0000038110020A6 -:10CC2000541100207372635C72656D2E6300000006 -:10CC3000D40500005C1200201011002068120020B2 -:10CC4000201100203C1200207A00002067C3000061 -:10CC5000780000203DC800007D0200005E02000058 -:10CC600000F5004080E200E0CB0200001503000068 -:10CC700022030000607A059A0146904206D00146E0 -:10CC800014277843C018807C9042F8D1627A82429F -:10CC900008D1617A14225143C918897C617201213B -:10CCA000A17207E014224243D21814277943927CE0 -:10CCB000C9188A7414220C215043C018817410982A -:10CCC000007A06281DD201007944097949188F4459 -:10CCD0000C161412100EE07D002890D093E700206F -:10CCE00001E0207E401C2076B5E000210FE0B42159 -:10CCF0000DE073210BE0322109E00A2107E0062153 -:10CD000005E0FF20FDA1E0300EF025FA002110988B -:10CD100002910068401A28601099097A002912D0FF -:10CD20000221401A0102090A29601098026840682D -:10CD300010180002000A68601098807A0228109883 -:10CD400003D0007B71E00421EBE7007A002812D0C9 -:10CD500002220298121810984368104610301818D2 -:10CD60000A90E948029B4078984202D9E378002B68 -:10CD700003D00A9805E00422EBE7029BC31A0A9845 -:10CD80001818637A10300C2B1CD0637A14277B435D -:10CD9000DE4FDB195B68994214D0DD4F617ABC46E7 -:10CDA00014235943D94BC9184B6889689B1B891BAD -:10CDB0001B0209021B0A090A984237D8634535D875 -:10CDC000614533D831180A980123081A0002000A75 -:10CDD000286010998018C9680002000A471ACD4AD5 -:10CDE0009B05BC469F4201D2384610E00F1A9F4275 -:10CDF00001D260460BE0944503D9511A0818401C33 -:10CE000005E0974206D9101A4018401C40420028FD -:10CE10005FDC03E0B9A1C0480EF09DF929680A98CB -:10CE200008180002000A686000202872686810274D -:10CE300010300002000A68601098407AA8721098BA -:10CE4000007A687203280ED200280CD0FFF7D2FCBB -:10CE5000002803D007E0002011B0F0BD0298422165 -:10CE60000F1A32200290A8490878012801D003281F -:10CE700009D148780299884205D9E178002902D180 -:10CE80000299401AC7196B6828689B1B801B9C4637 -:10CE900001021B029E4A090A1B0A8F4219D8174633 -:10CEA000914216D8BB4214D8617A0C2915D0677A02 -:10CEB00061460C22039200921422944B7A43D218BA -:10CEC00093689B1B834216D80397977C0C2FF3D152 -:10CED00073E0059801F04CF9BDE70498022205992A -:10CEE0000274627A0C2A00D0627A82746172012024 -:10CEF000A07211B0F0BD0C2F5FD0002238469446CE -:10CF00001422824B4243D21853689B1B8B4225D27A -:10CF1000907BAB7A98421BD804980521059D01743B -:10CF20007E4C207E16280FD0207EE17D401C88425A -:10CF300003D172A17A480EF00EF9207E2554207E8E -:10CF4000162800D0CDE6CAE6E07D0028F1D0F4E74F -:10CF500001208446907C0C28D2D102E06146002951 -:10CF60002AD03D46009014202A46424367480621B5 -:10CF7000161831741C38007E1628684816D0017EB9 -:10CF8000C07D491C814203D15CA166480EF0E3F8E4 -:10CF90006248017E4554017E16290BD0017E491C52 -:10CFA0000176B57C0098A842DDD106E0C07D00285E -:10CFB000EAD0EDE70021F3E7009704990220534DF2 -:10CFC0000874607AB84207D104990098887405986B -:10CFD00060720120A07221E003980C2F0FD00C2862 -:10CFE00003D146A150480EF0B6F8039814225043DE -:10CFF0004019059981740499009888740EE00C28F2 -:10D0000003D13EA149480EF0A6F8039814225043DC -:10D0100040190599817404990C208874012011B07D -:10D02000F0BD70B50D46424A441900210B46101A56 -:10D030008B4103D231A13F480EF08DF83E48854226 -:10D0400003DD2EA13D480EF086F83D48854203DA07 -:10D050002AA13C480EF07FF83B48844205DA002CB8 -:10D0600001DB204670BD384800E03848201870BD0C -:10D07000401E70B5C0B21421484324494418607B57 -:10D08000062813D201007944097949188F44020C0B -:10D090000A080604002067E0B42010E073200EE0C8 -:10D0A00032200CE00A200AE0062008E0FF2013A14D -:10D0B000E0300EF050F8617B0020002954D00221AE -:10D0C0004018616840180002000AF5F70FFD0C25B2 -:10D0D0006557174A441900210B46101A8B4103D299 -:10D0E00006A114480EF037F81348854203DD03A16A -:10D0F00012480EF030F81248854229E07372635CE2 -:10D1000072656D2E630000007A000020541100202B -:10D11000FFFF3F00FFFFFF00130700003811002052 -:10D1200007020000C5030000DD030000E303000068 -:10D13000FF7F841EF50300000020A107F603000016 -:10D1400000E05EF8F70300000080841E00807BE1B1 -:10D1500003DAF749F7480DF0FEFFF748844207DA93 -:10D16000002C03DB204670BD0421A9E7F24800E053 -:10D17000F248201870BDF0B5064683B0F048019023 -:10D18000457A029534687068001B0702ED483F0A33 -:10D19000001B00900C2D2DD0142029464143EA4855 -:10D1A0000122081884464168E64892058646081B15 -:10D1B000904210D3631A93420DD3024670467245D3 -:10D1C00003D900984018401C05E073450ED9411A58 -:10D1D0000819401C404200280CDA60460295857C04 -:10D1E0000198C0790028D5D003B0F0BDD049D74808 -:10D1F0000DF0B1FF0298854226D014214843D24950 -:10D200000123401802908068CE499B058C46011B83 -:10D210008646994210D3221A9A420DD3634661453D -:10D2200003D900997144491C06E0194662452DD97D -:10D23000091A0819401C4142002905DD0298B17AFB -:10D24000807B814200D374460C2D15D0BE4914203A -:10D25000454368184268121B1202120ABA420BD2E6 -:10D26000B37A827B934200D38468857C0198C0792D -:10D270000028B9D10C2DEAD13068A042B4D0E01911 -:10D280000002000A3460706003B0F0BDA849AF48E6 -:10D290000DF061FFD8E7F0B5AD490446486885B0A8 -:10D2A000C005C00D1CD0103840B200280CDA0207AF -:10D2B000120F083A920892005118C9698007C00EEF -:10D2C000C1400806800F09E08108A24A8900891838 -:10D2D00009688007C00EC1400806800F002808D0EA -:10D2E00000272078002806D0012804D0002005B0AF -:10D2F000F0BD0127F5E72079062813D20100794413 -:10D30000097949188F44020C0A080604002018E025 -:10D31000B42010E073200EE032200CE00A200AE076 -:10D32000062008E0FF208249E0300DF014FF21794B -:10D330000020002905D002214618814D002F02D07F -:10D3400003E00421F8E70020E871694602AAA0681A -:10D35000F5F7D6FB694608228A56E06801A98018CD -:10D360000122C01C1F2801DA019209E003AAF5F787 -:10D37000C7FB6846007B002802D00198401C019042 -:10D3800000990198401810300002000A0190881B93 -:10D390000002000A00906079694688720098039044 -:10D3A000F5F73DFB009A019B121A181A6A491202FE -:10D3B0000002120A000A8A4216D8884214D8684627 -:10D3C000FFF7D9FE00990398814205D08819000221 -:10D3D000000AF5F78BFBA0600120E979002986D0CF -:10D3E000002FB0D005B0F0BD0020F6E7F3B58FB048 -:10D3F0005A480C460B9004F0D8FE594A0F99504FEA -:10D400005618584D203E00280BD05748007D002864 -:10D4100003D056A158480DF09EFE207801287CD0FC -:10D420005AE1687B16280CD0687B297B401C884217 -:10D4300003D14EA151480DF08EFE2078012804D072 -:10D440000CE0287B0028F4D0F7E7F07F002803D019 -:10D4500046A14B480DF07FFE0120F077697B0F98C5 -:10D460001422484E5143891908742078022822D08A -:10D47000687B142148438619207930726079707274 -:10D4800032460C323146A068F5F73AFB0C20305694 -:10D490000F2804DD1F3830733068401C30600C21C9 -:10D4A0007156301DE26801905018C01C1F283EDAEA -:10D4B00001200199F7E026494868C005C00D21D038 -:10D4C000103840B200280CDA0207120F083A92080E -:10D4D00092005118C9698007C00EC1400806800F2C -:10D4E00009E081081B4A8900891809688007C00E75 -:10D4F000C1400806800F002804D105201BA10002AE -:10D500000DF029FE687B1421484386190021E0684C -:10D510006A460691117006A900E0D3E0F5F7F0FA2B -:10D520006A46002010560F282EDD01202DE0AEE0C7 -:10D53000FCD00000F70300000080841E00807BE127 -:10D540005C120020FFFFFF005411002013070000B1 -:10D5500000ED00E000E400E0FFFF3F006812002063 -:10D560003012002010110020201100207372635C23 -:10D5700072656D2E6300000011050000EF040000CD -:10D58000F4040000500F0020002006994018079076 -:10D590000220B0722079307260797072A068311DFB -:10D5A000C01C06911F2801DA012009E0F5F7A8FA4E -:10D5B00068460078002804D0069806990068401C48 -:10D5C0000860307A062813D2010079440979491895 -:10D5D0008F44020C0A08060400200FE0B4200DE07E -:10D5E00073200BE0322009E00A2007E0062005E066 -:10D5F000FF20FE49E0300DF0AEFD0020217900292A -:10D6000043D002214018069071681030081807991D -:10D61000089009180698081A0C900020F871F5F780 -:10D62000FEF904463060079820180002000AF060F6 -:10D63000787A0C2825D0797A14204143EC480818D0 -:10D6400040680899029040180002000A0390707A1E -:10D650006946887402A8FFF78EFD0299039A091B98 -:10D66000121B09021202E34B090A120A0C98994292 -:10D6700007D8824205D80299069808180002000AC5 -:10D680003060F8790028C8D110E00421BAE704AA74 -:10D690000199F5F735FA6846007C002804D0019816 -:10D6A00001990068401C08602078B072687B1628D9 -:10D6B00006D0687B401C68730B9804F08EFD47E031 -:10D6C0000020F8E7F07F002804D0A320CAA1C00002 -:10D6D0000DF041FD0120F077CA490F9808742078B9 -:10D6E000022803D1C4A1C8480DF035FDC54E2079EC -:10D6F00030726079707232460C323146A068F5F7AC -:10D70000FFF90C2030560F2804DD1F3830733068C5 -:10D71000401C30600C22B256301DE1680190881820 -:10D72000C01C1F2802DA012001990BE003AA01990D -:10D73000F5F7E6F96846007B002804D001980199C6 -:10D740000068401C08602078B072AE49012008755E -:10D75000687B297B884224D07C7A0C2C23D0F5F777 -:10D760005EF914214C43A24961180A7C042A18D09E -:10D770000A7C032A15D04B6889681B1A081A1B02F9 -:10D7800000029C4A1B0A000A102B0AD3114693423E -:10D7900007D8884205D8687B297B884201D0F5F7F5 -:10D7A0008AF911B0F0BD687B297B8842F7D111B0AE -:10D7B000F0BD10B50020F5F794F810BD10B50120AC -:10D7C000F5F78FF810BD914800787047F1B50098D3 -:10D7D00002281ED08E4C607A0C2803D186A18D4879 -:10D7E0000DF0B9FC0026A6710125E572607A0321CF -:10D7F00014227F4F5043C0190174F5F761F9009866 -:10D8000000280BD001282AD003287AD07AA1824898 -:10D8100045E07E480078F4F777FDF8BD7F48007F4B -:10D82000002804D02B2074A140010DF094FC6571F8 -:10D830007A4D00202E60F5F767F8A968481C04D0DF -:10D84000012300221846F5F795F8607A617A401CAA -:10D85000C0B2142251437A5801219047F8BD0120EB -:10D86000F5F752F8607900280DD06C488068401CAC -:10D8700009D0607A617A401CC0B2142251437A58B0 -:10D8800006219047F8BD6548007F01280AD002288C -:10D8900012D0032822D0042834D057A160480DF0BC -:10D8A0005AFCF8BD2079002803D02671F5F70DF950 -:10D8B000E5705A480677F8BD207A002802D1F4F7BF -:10D8C00083FD2572607A617A401CC0B214225143F4 -:10D8D0007A580021904751480677F8BD4F4F0123F1 -:10D8E000397B78680022411A1846F5F743F8207909 -:10D8F000002803D02671F5F7E8F8E57002203877A4 -:10D90000F8BD19E0454E217870680123411A0022C4 -:10D910001846F5F72FF8207A002802D1F4F754FDC5 -:10D920002572607A617A401CC0B2142251437A5841 -:10D93000002190473577F8BD607A617A401CC0B20B -:10D94000142251437A5805219047F8BD10B5304C48 -:10D95000607A0C2803D128A132480DF0FCFB607AD4 -:10D96000617A401CC0B214225143214A525804210A -:10D97000904710BDF0B583B00C200290F5F74FF83A -:10D98000234C0090617A284801900C2920D0617ABC -:10D990001420414316480918097C042918D0617ADB -:10D9A000142251430818007C032879D0019900986B -:10D9B0000B6849681B1A081A1B0200020D4A1B0A51 -:10D9C000000A102B6CD31146934269D8884267D85D -:10D9D00012488068401C03D007A114480DF0BBFB1F -:10D9E00000206071607A0C282AD121E0FCD0000070 -:10D9F00054110020FFFF3F007372635C72656D2E4F -:10DA000063000000201100201E05000078000020A7 -:10DA10005C12002054050000A70500003C12002005 -:10DA20009B050000AE0500004C120020EA05000036 -:10DA30006078002804D0FE48C17841708178017078 -:10DA4000607A0C2815D0607A1421FA4A484380186D -:10DA5000007C04280DD1607A0290607A01211423A1 -:10DA6000584380180174607A58438018807C607233 -:10DA7000A172F14D687B297BF04F884233D0F04E84 -:10DA8000287B142148438019007CC05D0128287B35 -:10DA900007D048438019007CC05D02282FD044E0A5 -:10DAA000FCE1142148438019807A01280AD0287BA0 -:10DAB0000221142250438019007CC155287B16286E -:10DAC00008D009E0287B0021142250438019007CF3 -:10DAD000C1552AE0002001E0287B401C2873687BA8 -:10DAE000297B8842CCD1D74D287D00284DD0287C79 -:10DAF000C15D012928D0C05D022830D03BE0287BE1 -:10DB0000142148438019807A012803D0CEA1D1483E -:10DB10000DF021FB297B00201422514389198872C2 -:10DB2000297B51438919097CC855287B1421484316 -:10DB30008219287B48438019017C0098FEF7F6FF84 -:10DB4000287B1628C8D1C5E7A97A012904D002216B -:10DB5000C155002028750EE00021C1550BE0A87AC0 -:10DB6000012804D0C520B8A1C0000DF0F4FA0020AF -:10DB7000A872297CC855287D002806D0297CB14A86 -:10DB80000098FEF7D3FF0020287502980C281ED0BD -:10DB900014214843A7494018017C012917D10721C6 -:10DBA0000174AD4D287E16283CD0287EE97D401CAE -:10DBB000884203D1A4A1A9480DF0CDFA297E02988C -:10DBC0006854287E162831D0287E401C2876607A3A -:10DBD0000C287DD0A07A00287BD00020A072617A2A -:10DBE0001420414393480E189D49B56873680A464E -:10DBF000F6687C32CB67966055609A4D697E002945 -:10DC000016D00226617A14228A4851430818407BB4 -:10DC100006281BD201007944097949188F440A1457 -:10DC200012100E0CE87D0028C4D0C7E70020CDE715 -:10DC30000426E7E700210FE0B4210DE073210BE09B -:10DC4000322109E00A2107E0062105E0FF2086498C -:10DC5000E0300DF080FA00212973687E022801D09F -:10DC6000012810D12869009A4018821A1202120A5B -:10DC7000422A08D93238032100026976000A286155 -:10DC80003220287308E0322906D2207A00280AD1EF -:10DC9000F4F79AFB012005E0207A002803D0F4F77E -:10DCA000BCFB00202072624910224878207009785D -:10DCB000012901D0032906D101212171297B884244 -:10DCC00001D9421A1032A378002B00D0921C01E037 -:10DCD0008DE09BE02179002901D1002B5DD0944695 -:10DCE000624A00990092019A176852687F1A511A85 -:10DCF0003F0209023F0A090ABC451BD85B4A97420A -:10DD000018D8009A914215D8297B884223D92B69CB -:10DD1000421A9A1A1202120A101880190002000AF6 -:10DD20002A616860002914D0032028770006000EBD -:10DD30003ED14CE000202071A070297B002925D025 -:10DD40002869401880190002000A686002202877BC -:10DD50002EE00120E9E781420BD92A69511889197F -:10DD60000902090A6960002801D00420DDE70220C9 -:10DD7000DBE7002B03D134A13D480DF0ECF9286915 -:10DD800080190002000A6860002004E029698919EE -:10DD90000902090A6960287719E0287B00280FD05A -:10DDA0002969081880190002000A68600220287793 -:10DDB00028690123811900221846F4F7DBFD09E0E8 -:10DDC000286980190002000A686000202877012075 -:10DDD000F4F79AFD607A1421484316490C22401842 -:10DDE0008256012300206968F4F7C4FD0EE001208B -:10DDF000F4F78AFD0020F4F787FDF4F76BFD207A35 -:10DE0000002803D0F4F709FB00202072A078002836 -:10DE100004D0F4F75AFE0020E070A070607800286B -:10DE200004D00348C178417081780170207921E0E5 -:10DE30007A00002054110020101100202F12002021 -:10DE4000500F0020201100207372635C72656D2EEC -:10DE5000630000000C060000381100203A060000A4 -:10DE6000D01100203C120020FCD00000FFFF3F003A -:10DE70008C060000002806D00020CF49E070097809 -:10DE8000002900D12071CD48017EC07D814203D0A0 -:10DE9000CB484078F4F738FA0120E07103B0F0BDC8 -:10DEA000F0B5C84C0746607A83B00C2803D1C6A1F0 -:10DEB000C8480DF050F9607A1421C74E48438019C4 -:10DEC000007C032804D06F20BFA100010DF043F9AE -:10DED000C24DA868401C03D0BBA1C1480DF03BF95E -:10DEE000607A1421484381190C20085600216A46A3 -:10DEF00000911171C01901AA6946F4F701FE6A4642 -:10DF0000042010560F2801DD012000E000200099B8 -:10DF10004018696840180102090AA9606079002860 -:10DF200004D0012300221846F4F724FD03B0F0BD0D -:10DF300070B5AD4CAB4A0B1AA34214D3451AA54297 -:10DF400011D3934203D9101A43185B1C0BE095427E -:10DF500004D9511A0818401C434204E0A349A448BC -:10DF60000DF0F9F80023184670BD10B501460123E5 -:10DF700000220220F4F7FEFC10BD10B50220F4F7D9 -:10DF8000C3FC10BD10B5F4F74AFD10BDF0B58D4DC2 -:10DF90000446E87A83B0002803D18BA195480DF0A0 -:10DFA000DAF8642C4DD3944900200246091B8241C3 -:10DFB00047D39248417B007B814242D19048007D0B -:10DFC00000283ED1687A1421834F4843834EC519F7 -:10DFD000306801AA00196946F4F792FD69460420E9 -:10DFE0000856002802DD0098401C0090A96800989F -:10DFF0006B680A18D21A1202824B120A9A4220D86F -:10E00000AA7C0C2A08D014235A43D2195268511AF8 -:10E010000902090A814214D3B068401C05D00120CE -:10E02000F4F772FC0020C043B06030680019306023 -:10E03000A868009940180002000A7061012003B02E -:10E04000F0BD002003B0F0BDF8B50646401EC5B2D5 -:10E050001420614968434418207C002803D15AA148 -:10E0600069480DF078F86548017B407B81420CD00F -:10E07000664A14234B439B181B7CB3420CD01629D1 -:10E080000CD0491CC9B28142F3D15D48017D002901 -:10E0900064D0007CB04261D10020F8BD0021F1E7DE -:10E0A000217C052905D0217C062902D0217C072965 -:10E0B00028D101212174C17D0023027E8A4221D012 -:10E0C0000246565CAE4201D1012301E0002B04D090 -:10E0D000162911D04E1C965D565416290ED0491C97 -:10E0E000167EC9B28E42ECD1002B0BD0117E0029D6 -:10E0F00006D0117E491E04E00026ECE70021EFE780 -:10E1000016211176617C00292AD06774C17D002315 -:10E11000027E8A4224D0425CAA4201D1012301E05E -:10E12000002B04D0162912D04A1C825C42541629B6 -:10E130000FD0491C027EC9B28A42ECD1002B0FD00D -:10E14000027E0146002A06D00A7E521E04E000220A -:10E15000EBE70021EEE716220A7601E017480027D8 -:10E16000217C01299CD1617C002999D10120F8BD35 -:10E1700070B505461420184A0521684380180174BB -:10E180000E4C207E162811D0207EE17D401C884256 -:10E1900003D116491E480CF0DEFF207E2554207E58 -:10E1A000162807D0207E401C207670BDE07D002818 -:10E1B000EFD0F2E70020F7E77A00002038110020C6 -:10E1C000780000205C1200207372635C72656D2E13 -:10E1D00063000000EF060000541100203C120020F4 -:10E1E000F1060000FF7F841E0020A107FCD0000084 -:10E1F0001307000032070000FF1FA10710110020C5 -:10E2000020110020FFFF3F006F070000500F00208B -:10E210000702000010B509F063FC042803D009F0E0 -:10E220005FFC052803D106F0D1FE00280BD104F0D5 -:10E2300007F9032803D004F009F9032805D109F0F0 -:10E24000B0FD002801D0012010BD002010BDF0B5A8 -:10E2500085B00746002668460D4606726946384670 -:10E2600005F05CFA00287DD16846007800280BD0C4 -:10E2700009F009FDB84275D00022294638460AF057 -:10E28000CCFE00283ED120E006F077FCB842F2D068 -:10E2900000222946384608F01DF900287DD1019C4E -:10E2A0009020005D2834002804D1607E002801D031 -:10E2B000012000E000200490204660300390807828 -:10E2C00006F08AFB002804D008E0019C2834607E18 -:10E2D000F1E7FF20FDA1DA300CF03DFF20462030B1 -:10E2E000417B00290FD0817B89070CD56E700121FD -:10E2F0002970AE70AF80C17BA971218E2981618E9A -:10E300006981467349E0039802A9807806F030FAE3 -:10E31000002804D1FF20EDA1EE300CF01CFF684670 -:10E32000007A002809D06E700D202870AF806846F2 -:10E33000007AE8800120A8702FE0049800282FD0F0 -:10E3400006F0B5FB00282BD068460078002806D1DF -:10E3500001988030406A4188B94200D10670039824 -:10E36000807800E01CE006F0CAF8002803D1D7A1AD -:10E37000DA480CF0F0FE6E700A202870AE70AF80A4 -:10E38000A07EA8716676684605F07EFA002804D063 -:10E39000D248CEA10E300CF0DEFE012005B0F0BD5B -:10E3A0000020FBE77CB5CEA103C9CF4D002401912D -:10E3B0000090AC7001F067FD2946EC7004204039F4 -:10E3C000088710204887C81DC84AF9304280047168 -:10E3D000C280E03844740C7084730475C0300477D4 -:10E3E0001D300522694604460CF02BFD28462146C7 -:10E3F000BC3008F0F7F97CBDF8B5BD4C0D46606047 -:10E40000217006F057F805F0D1F8FFF7CBFF207820 -:10E4100009F03AF9B4498431084681380F46064676 -:10E4200006F08CFC606808F0D8F8284604F06EFC12 -:10E430003946304609F057FC60680AF08AFE01F060 -:10E4400022FDA9480021C170F8BDFEB50E461D464B -:10E45000144601A905F062F9002839D102988030EC -:10E46000807A06F079F800280CD0684606F087F824 -:10E47000002806D0002C03D006F01DF8A04206D2DA -:10E480000020FEBD91A19B480CF065FEF8E70098C6 -:10E4900005F0AAFB3146009805F0ABFBE2B2294635 -:10E4A000009805F063FD06F08FF8002804D191482C -:10E4B00086A11E300CF04FFE68460079012807D176 -:10E4C00001A801F0E7FC8A48002180688030418281 -:10E4D0000120FEBD30B40179002904D0012907D004 -:10E4E00030BC00207047831D42880488022103E06D -:10E4F00042880488831D0121204630BCA5E7FFB572 -:10E50000794C85B00E460746C0346088694608805D -:10E51000154602A905F002F9002811D0002168462D -:10E5200005F059F9002823D1684602A9008805F0B2 -:10E53000F5F8002804D06F4864A13C300CF00BFEC5 -:10E5400068460088388068460088608066480021F8 -:10E55000C23005F040F9002802D00020C04360809E -:10E5600003988030807A06F037FA002803D007E05D -:10E57000002009B0F0BD5F4854A156300CF0EBFD0F -:10E5800004A806F03CFA0028F3D0049805F068FBD4 -:10E590003070022807D0012805D056484BA17230B0 -:10E5A0000CF0D9FDE4E70899049805F0F6FC288002 -:10E5B000002804D14F4845A165300CF0CCFD06F091 -:10E5C00045FA002804D1E92040A180000CF0C3FDE9 -:10E5D0000120CEE73EB50446831D02AA694601A884 -:10E5E000FFF78DFF002813D068468088208068469A -:10E5F000008960800020607168460078012808D09A -:10E60000022806D03B4831A192380CF0A4FD01202D -:10E610003EBD2071FBE7FEB5040004D135482BA1B7 -:10E620007E380CF098FD304D0026203D687C002897 -:10E6300008D0667010202070A87CA070E87CE07084 -:10E640006E7430E0284F403F3878002808D02C22E4 -:10E65000B91C20460CF0F5FB0E2020703E7022E025 -:10E66000A87B002809D00120E070E87BA070287CFE -:10E6700060700F202070AE7315E01B480221C63079 -:10E68000029005F0A8F8002871D1174FC037F8881C -:10E690000190F888042808D0052831D02146FFF7DA -:10E6A000D6FD002859D00120FEBD0021204606F0ED -:10E6B00019FA0028F7D1287D00284ED06670132063 -:10E6C00020701C21A01C0CF019FC15E07372635C17 -:10E6D0006C6C5F6374726C2E630000000D020000AE -:10E6E000FFFFFFFF1F000000AC120020FFFF000033 -:10E6F00080000020390300000220A0702E75D2E7B0 -:10E700000021204609F098FA002826D02078132806 -:10E71000C9D1A0783C28C6D1A088694604F07CFF06 -:10E72000002803D0FD49FE480CF015FD009880300C -:10E73000807A05F0E4FE002804D1F948F749001D6D -:10E740000CF009FD009804F09FFF0028ABD0F448BE -:10E75000F24908300CF0FFFCA5E70221029805F011 -:10E760003AF8002803D1F9880198814291D100201C -:10E77000FEBD50E710B508F011FF002804D0E848AE -:10E78000E649BE300CF0E7FC07F01FFF06F09AFAEE -:10E7900004F07AFA002804D07920E049C0000CF097 -:10E7A000DAFC0AF0CEFC002804D03D20DB49000151 -:10E7B0000CF0D1FC09F070FA002804D0F520D749FC -:10E7C00080000CF0C8FCFFF7EDFD04F0ABFE002864 -:10E7D00004D0F720D14980000CF0BDFC05F01CFEF0 -:10E7E00001F051FBCF480021C17040380171012177 -:10E7F00041710222C270017010BD10B5C94C403C7D -:10E800002078002804D00A210E2001F002FB10BD60 -:10E81000FFF700FD002801D00C2002E001F033FBDF -:10E8200000202071012060710A21E170207010BD6C -:10E8300070B5BC4C0646403C2078002804D03A21F4 -:10E840000E2001F0E6FA70BDFFF7E4FC002801D0CD -:10E850000C2010E0B34DE87808280BD20001001915 -:10E8600010223146443001F0DEFAE878401CE870AE -:10E87000002000E007202071012060713A21E17042 -:10E88000207070BD70B5A74C0646403C207800282B -:10E8900004D00B210E2001F0BCFA70BD30780028A6 -:10E8A00003D0012801D0122015E09E4D8035287933 -:10E8B000082817D2FFF7AEFC002801D00C200AE090 -:10E8C000984833782979721C883001F098FB2879B0 -:10E8D000401C287100202071012060710B21E17023 -:10E8E000207070BD0720F6E710B58E4C403C2078B4 -:10E8F000002804D039210E2001F08BFA10BDFFF75B -:10E9000089FC002801D00C2002E086490020C87054 -:10E910002071012060713921E170207010BD8148A3 -:10E9200010B540380178002904D00F210E2001F0E5 -:10E9300070FA10BD002101710E2181700F21C1708C -:10E94000FF2181710021C9430181774949680A7813 -:10E9500082728A8882814988C18101214171017056 -:10E9600010BD704910B540390A78002A04D03C2106 -:10E970000E2001F04EFA10BD6A4A0088C032508065 -:10E980000120107100220A7148713C22CA7008707F -:10E9900010BD10B5634C403C2078002804D02B21DA -:10E9A0000E2001F036FA10BD0821A01DFDF7BCFBBA -:10E9B00000202071012060712B21E170207010BDBA -:10E9C00010B5584C403C2078002804D005210E207A -:10E9D00001F01FFA10BD05F06EFDE08005F0C6FEE7 -:10E9E000207200202071012060710521E1702070EB -:10E9F00010BD10B54B4C403C2178002904D031218A -:10EA00000E2001F006FA10BD00214156042911D054 -:10EA100000290FD0081D0DD0001D0BD0001D09D0FE -:10EA2000001D07D0001D05D00A3003D00A3001D0E8 -:10EA3000122003E0084601F033FB00202071312052 -:10EA4000E07001206071207010BD30B5354D044676 -:10EA5000403D28788DB0002805D02A210E2001F0F5 -:10EA6000D8F90DB030BD10222146684601F0DBF91F -:10EA70001022A11804A801F0D6F9684603F00BFC97 -:10EA800010222C46A81D08A901F0CDF90020207104 -:10EA90000E20A0702A20E070012060712070E0E755 -:10EAA000F0B5204C85B0403C2078002804D03B21B4 -:10EAB0000E2001F0AEF971E40020A07119486946FA -:10EAC000C0304088888002A904F028FE002805D0C4 -:10EAD000002101A804F07FFE002865D16846114D91 -:10EAE00081880180283D684602A9008804F016FE4E -:10EAF000002803D009490D480CF02DFB039E04A902 -:10EB000037468837B878283605F04BFE002804D100 -:10EB100006480249401D0CF01EFB09E0CCE600004F -:10EB2000FF020000AC12002080000020140500004D -:10EB3000767EB87805F050FF002803D1FB49FC48E9 -:10EB40000CF009FB05F0B3FF0121484031460143B9 -:10EB50001FD06A461188A279FD2352001219118133 -:10EB6000A2794000515D4908490031435155A279CD -:10EB70001940014351556A46107C002802D00420F8 -:10EB8000014301E0FB200140A0794155A079401CE0 -:10EB9000A0710021684604F01EFE002804D16846DA -:10EBA0000188808881429ED10020207101206071FF -:10EBB0003B21E17020707EE770B5DE4C0546207881 -:10EBC000002804D034210E2001F023F970BD08F094 -:10EBD00087FF052804D0284608F03FFD002000E00C -:10EBE0000C202071012060713421E170207070BD13 -:10EBF00010B5D04C2078002804D00E21084601F032 -:10EC000008F910BD0622CC49A01D0CF01AF900200D -:10EC10002071012060710E21E170207010BD70B56F -:10EC2000C44C06462078251D002804D032210E2031 -:10EC300001F0EFF870BD3146002009F032F928707C -:10EC400000280CD100213246084606F080F92870D1 -:10EC5000002804D106223146B7480CF0F2F8012012 -:10EC600060713221E170207070BD70B5B14C054605 -:10EC70002078002804D030210E2001F0CAF870BDA1 -:10EC800008F073FD002803D104F0DEFA00280DD04F -:10EC9000287804F08AF8287806F0C0F9002020715E -:10ECA000012060713021E170207070BD0C20F6E70A -:10ECB000F8B5A04C06462078251D002804D0172161 -:10ECC0000E2001F0A6F8F8BD3146012009F0E9F860 -:10ECD0000127287000280FD13246012106F037F9AC -:10ECE0002870002808D19348062231463C300CF0A9 -:10ECF000A8F890484030877067711720E07027703F -:10ED0000F8BDFEB58B4C05462034A07B002804D00E -:10ED100028210F2001F07DF8FEBDA8781A2824D004 -:10ED20000EDC03000CF038FB16333333333321335E -:10ED300033333333333333333333333321212133D9 -:10ED40002A2824D00ADC1E3803000CF025FB0C20F6 -:10ED5000202020202020202020200E203A380300D0 -:10ED60000CF01AFB04150315031528887349884213 -:10ED70000DD81F21E173282121740120A073288858 -:10ED8000694604F0CBFC002803D0022014E01220D6 -:10ED900012E068460078019F00280FD0C637019E18 -:10EDA00000280DD0C736684601F05CF8002802D074 -:10EDB0003878002806D00C20E073FEBD9C37EEE7C3 -:10EDC0009D36F0E701203870A87830700020E0739D -:10EDD000684601F05FF8FEBDF0B5564C0746207856 -:10EDE00085B0002804D025210E2001F012F862E63B -:10EDF000388802A904F092FC4E4E00210836002803 -:10EE00000CD00220207131603171E1800E20A070A1 -:10EE10002520E0700120607120704CE6039D28469B -:10EE20000A30483501900020A87505223046019926 -:10EE30000CF007F8A87D0028F5D13888E080E5E7D8 -:10EE4000FEB53C4C06462034A07B002804D010219F -:10EE50000F2000F0DEFFFEBD1F20E07310202074A5 -:10EE60000127A7733088694604F058FC002810D1A8 -:10EE7000684600F0F7FF00280BD06846019D007837 -:10EE800028350028019806D0CA300178002909D118 -:10EE900004E0022007E08030406AF6E72035697B15 -:10EEA000002902D03A20E073FEBDA97B89070DD16D -:10EEB0000621017068460078002804D10198318845 -:10EEC0008030406A4180684600F0E4FF0020E07333 -:10EED0006F73FEBD70B5174D04462878002804D026 -:10EEE00038210E2000F095FF70BD1F2028710120F1 -:10EEF00068713821E97028702078002808D001282E -:10EF000006D0022804D0032802D01220287170BD38 -:10EF1000002606F051F8207807F061FC207808F010 -:10EF2000E6FF20780AF0ABFA2E7170BDCCE6000047 -:10EF30001F0500006C1200208C000020FF0E000056 -:10EF4000F8B5FE4D06462878002804D01D210E2075 -:10EF500000F05FFFF8BD1F202871012068711D219E -:10EF6000E970287008F0BCFD0C27042857D005284C -:10EF700055D0B0791224012801D000281DD1307855 -:10EF8000002801D0012818D1F079002801D00128EB -:10EF900013D17088EA49021F30248A420DD2B28808 -:10EFA000121F8A4209D22887B0886887B079002466 -:10EFB000012804D000280CD016E02C71F8BDDF48E1 -:10EFC0004030807800282AD0DC4A3C3201210846B3 -:10EFD00002E0DC4A0021012005F0B9FF040003D063 -:10EFE000D949DA480CF0B7F8F079012801D00028A7 -:10EFF00002D105F0C8FF0446002C01D01F2011E00B -:10F000003078012802D0002803D00AE00021022035 -:10F0100001E00021012005F0C6FF002801D02F717A -:10F02000F8BD00202871F8BD70B5C44C21780029C6 -:10F0300004D01E210E2000F0ECFE76E71F21217186 -:10F04000012161711E22E270217002781221012AD1 -:10F0500001D0002A04D14078002803D0012801D033 -:10F06000217162E700260C25012A09D008F038FD3D -:10F07000052803D008F042FA002806D0257154E78D -:10F08000618F208F08F083FBF6E726714DE7F0B51E -:10F09000AD490446143103C987B0A84D0591203508 -:10F0A0000490A87B002805D021210F2000F0B1FE9C -:10F0B00007B0F0BD1F20E873212028740126AE732D -:10F0C00022889F4B111F3020994243D261880F1F25 -:10F0D0009F42FAD291423DD8E2899D4B911F9942BD -:10F0E000F3D2218A8F1F9F42EFD28A42F3D8628ADD -:10F0F000FF23F4339A42EED8A28A954F13460A3B77 -:10F100003F1FBB42E1D2C9088A4223D9E18A228B40 -:10F110009142E0D821791220002902D0012919D189 -:10F1200002E061790029F9D1217B002901D0012970 -:10F13000F5D108F0D5FC05280BD008F0D1FC042847 -:10F1400007D0287D002804D105F017FD81498842A9 -:10F1500001D00C20BDE0684604F0AEFA002801D0D2 -:10F160000920B6E001220321009804F0E6FF009F89 -:10F17000042178880F3703903846FCF7D5FF3846CE -:10F18000039905F0C2F874A0009F0068069003215F -:10F1900006A81337FCF751FF002006A90A5C3A5471 -:10F1A000401CC0B20328F9D30098218A8180618A6B -:10F1B000C180A18A01810146002720318F73CF735E -:10F1C0006179002902D0012903D101E0C77600E06E -:10F1D000C6760622A11D1C300BF033FE00980522D6 -:10F1E00004A90A300BF02DFE0098A0300673694682 -:10F1F0000F71012101A8FCF720FF6946087941073A -:10F20000C206490F920F80068918C00F0818694678 -:10F210000871401D009B0928987601D20830987625 -:10F2200001220021184604F088FF00988A3005F07A -:10F2300044F9002804D145484349FC300BF08BFFCA -:10F24000207B002806D0012808D03F4943480BF016 -:10F2500082FF40E000213B4A012008E0374840306F -:10F26000807800280FD0354A01213C32084605F04D -:10F270006EFE00282FD000988030807A05F03FF98C -:10F28000002816D01AE000988030807A05F037F90F -:10F29000002804D131482C490D380BF05CFF009850 -:10F2A00004F0DAFA002800D153E72C48264909383F -:10F2B00041E02A482449C01D0BF04DFF009804F09E -:10F2C000CBFA002804D025481F490B300BF043FF30 -:10F2D0001F20E873ECE62079012801D0002803D133 -:10F2E00005F051FE00280CD10320009905F05BFECB -:10F2F000002806D162882188009808F0F5F90028D6 -:10F3000007D000988030807A05F0F9F8002805D001 -:10F3100009E00098A0300770EF73C9E60F480A496A -:10F3200031300BF018FF009804F096FA0028BBD09B -:10F330000A48054935300BF00EFF0AE76C12002031 -:10F34000FD3F00008C000020CCE600000607000016 -:10F350007B0C0000FFFF0000112233001C0800009E -:10F3600038B5F94C2078002804D022210E2000F076 -:10F3700050FD38BD1F202071012565712220E070ED -:10F38000257008F0ADFB052802D00C20207138BD97 -:10F3900000202071684608F059FA0028F7D100983B -:10F3A0008030807A05F0ABF8002803D1E749E848BF -:10F3B0000BF0D1FE009804F04FFA002804D0E44886 -:10F3C000E249001D0BF0C7FEDF4820300575E1481B -:10F3D0000078F2F799FF38BDF8B5DB4D04462035CB -:10F3E000A87B002804D023210F2000F012FDF8BDD7 -:10F3F0001F20E873232028740120A8736288D64B4D -:10F40000911F302099424CD2A1888E1F9E4248D233 -:10F410008A4246D8E288FF23F4339A4241D82289AF -:10F42000CD4E13460A3B361FB3423AD2C9088A4230 -:10F4300037D96189A289914233D80026208869464C -:10F4400004F05EF9022700280BD1009800F0F8FCC8 -:10F45000002806D000988030416A0A78002A06D138 -:10F4600001E0EF73F8BD826B1278002A01D03A20D8 -:10F4700017E005228A71416A0E81426AA188518192 -:10F48000426AE1889181426A2189D181406A018979 -:10F490004289914204D88179082901D8914202D346 -:10F4A0001220E873F8BD2188418000988030406ABE -:10F4B0000770EE73F8BDFEB5A34C06462078002811 -:10F4C00004D024210E2000F0A4FCFEBD01256571AE -:10F4D0002420E0702570304604F039FF002801D068 -:10F4E000002000E0122020710028EED1964F052266 -:10F4F000E03738463D7731461D300BF0A2FC002640 -:10F500003E77701E69460880684604F031F900288D -:10F5100019D168460788684601A9008804F0F0F808 -:10F52000002804D08A4889498F300BF014FE0198D6 -:10F53000A0300573684604F01BF9002803D1684623 -:10F5400000888742E7D12671FEBD38B57E4C05465E -:10F550002034A07B002804D026210F2000F059FC85 -:10F5600038BD1F20E073262020740120A073288856 -:10F57000694604F0C5F800280BD1009800F060FC43 -:10F58000002806D000988030416A0A78002A06D107 -:10F5900001E002200DE0806B0078002801D03A20C5 -:10F5A00007E007200870009829888030406A418071 -:10F5B0000020E07338BD10B5634C2078002804D0DB -:10F5C00006210E2000F025FC10BD002020710E2029 -:10F5D000A0700620E0700821A01D0BF08FFCA1791F -:10F5E00001200143A1716071207010BD38B5564CE7 -:10F5F00005462034A07B002804D02C210F2000F0E9 -:10F6000008FC38BD1F20E0732C2020740120A0735B -:10F610002888694604F074F800280CD1009800F09E -:10F620000FFC002807D00098014680314B6A1A78F9 -:10F63000002A06D101E0022025E0896B0978002923 -:10F6400001D03A201FE04030007F00281DD0082262 -:10F65000A91C181D0BF0F5FB00986A898030416ADF -:10F660008A81406A294610220C310E300BF0E9FBEA -:10F67000009803218030406A01700098298880300A -:10F68000406A41800020E07338BD0C20FBE770B574 -:10F690002D4E044630780C25002804D018210E2069 -:10F6A00000F0B7FB41E402F0CBFE032865D002F086 -:10F6B000CDFE032861D06079002801D001282DD12A -:10F6C000A079002801D0012828D1A07B002805D0EE -:10F6D000012803D0022801D003281FD1607B002815 -:10F6E0001CD0C0081AD1628801208003824202D84F -:10F6F0002188814203D9207901280FD119E020798E -:10F70000002806D0012814D0022805D0032805D1EE -:10F7100002E0202A0BD30CE0A0290AD22079042889 -:10F7200005D12088202802D36188884201D912257A -:10F7300023E00548217920308175607900280DD0BB -:10F7400001280FD019E000006C120020CCE6000068 -:10F750007F080000800000207B0C0000FA4A002196 -:10F76000204607E0F9488078002806D0F74A0121B2 -:10F77000121F204608F01BFB0546012035717071F1 -:10F780001821F170307058E410B5F04C403C2178ED -:10F79000002904D01A210E2000F03BFB10BD017897 -:10F7A0001F2902D91220207106E000212171027860 -:10F7B000411C104608F09EFB012060711A21E17087 -:10F7C000207010BD10B5E14C403C2178002904D0D8 -:10F7D00020210E2000F01DFB10BD01781F2902D949 -:10F7E0001220207106E0002121710278411C104690 -:10F7F00008F06FFB012060712021E170207010BDC6 -:10F80000F8B5D24C403C2178002904D01B210E20B1 -:10F8100000F0FFFAF8BD012666710C212171007815 -:10F820000025012804D000285CD01220207188E037 -:10F8300002F006FE002835D102F008FE002831D182 -:10F8400008F021FAC24988422CD108F07AFA00283F -:10F8500077D0684603F0C6FEBB4A00990C3A916027 -:10F86000002803D0BB49BC480BF075FC01220321E2 -:10F87000009804F008FC009808F0CDFB00988A304E -:10F8800004F01BFE002804D1B348B24908300BF045 -:10F8900062FC009803F08CFA002851D0AE48AD49C4 -:10F8A0000C301CE002F0CCFD02284AD102F0CEFD63 -:10F8B000002846D1A5482038807D002841D0012865 -:10F8C0003FD004283DD008F03CFA002839D0002071 -:10F8D00003F06EFA002833D09F489E4924300BF085 -:10F8E0003AFC2DE002F0ACFD032804D002F0AEFD9E -:10F8F000032820D025E002F0A6FD0090002003F0B0 -:10F900004FF900281DD1257100988030807A04F0CD -:10F91000F6FD002804D190488E493E300BF01BFCC8 -:10F92000009803F0B1FE00280BD08B488949423083 -:10F930000BF011FC05E0002003F032F9002800D1A3 -:10F9400025711B20E0702670F8BD38B57F4C054648 -:10F95000403C2078002804D02D210E2000F059FAD8 -:10F9600038BD2888694603F057FE002801D00220E0 -:10F970000FE00098CA21095C002909D13321095CF4 -:10F980000F2901D0102903D1FC21095C00290BD0DB -:10F990000C2020710E20A0702D20E0702888E080BF -:10F9A00001206071207038BD1022A91CD8300BF0E6 -:10F9B00048FA00980421C03081720020E9E738B588 -:10F9C000624C0546403C2078002804D02E210E20B1 -:10F9D00000F01FFA38BD2888694603F01DFE002894 -:10F9E00001D002200CE000980146C030827A002A43 -:10F9F00005D12031C97C0F290DD010290BD00C2046 -:10FA000020710E20A0702E20E0702888E080012058 -:10FA10006071207038BD052181720020F0E77CB54F -:10FA20004A4C0546403C2078002804D037210E205F -:10FA300000F0EFF97CBD2888694603F06FFE0028CE -:10FA400007D002202071012060713721E170207001 -:10FA50007CBD01987F22014628300272427200224A -:10FA60008272A87822318870E878C8702879087185 -:10FA70002271E8E71CB5354C403C2178002904D0C0 -:10FA800013210E2000F0C5F91CBD0088694603F063 -:10FA900045FE002801D0022006E001982421095CDF -:10FAA000801C012902D00C20207107E0002201995E -:10FAB00022712831097A21720088E080012060716A -:10FAC0001321E1700E21A17020701CBDF8B51F4CF0 -:10FAD0000546403C2078002804D035210E2000F057 -:10FAE00098F9F8BDA878002801D0012804D1A88889 -:10FAF000FF21F531884201D91220207128886946FA -:10FB000003F08AFD0126002806D0022020716671CC -:10FB10003520E0702670F8BD009800270246C030FE -:10FB20000770AB8801464380104680300677AA787C -:10FB3000012A00D000220A70407F002801D003F083 -:10FB400027FA2771E3E700008C000020AC120020A8 -:10FB5000FFFF0000CCE600002D0A0000F8B5D44EEF -:10FB600004463078002804D03D210E2000F051F9E1 -:10FB7000F8BD2088694603F04FFD002801D002201F -:10FB800027E0009F6488FD883A896800B988401C96 -:10FB9000844217D3C7484143800050430BF0BAF961 -:10FBA000401EFF2180B2F531884200D908468442C8 -:10FBB00000D22046691C401C0BF0ACF96D1C684358 -:10FBC000401E85B2E820C05D002800D17D84F5800C -:10FBD00000203071012070713D21F1703070F8BD4E -:10FBE00070B5B34C05462078002804D033210E2090 -:10FBF00000F00FF956E502F023FC002801D00C209C -:10FC000018E02978002911D00A290FD014290DD025 -:10FC10001E290BD0282909D0322907D04B2905D01D -:10FC2000642903D0FF2901D0122003E0284603F005 -:10FC30004BF900202071012060713321E1702070A8 -:10FC400030E570B59A4C05462078002804D03E2156 -:10FC50000E2000F0DEF825E502F0F2FB002803D1CB -:10FC600002F0F4FB002801D00C2003E0287808F013 -:10FC70004DF900202071012060713E21E17020705B -:10FC800010E510B5017801240B000BF085FB3FBF98 -:10FC9000BF21BFBF4C94BFBFBF2427BFBF464F612A -:10FCA000BFBF59BFBFBF2B97BF9B9FBF797DBFA36E -:10FCB0008185888C6590BF5DBF555275A7ABBF37F6 -:10FCC0002F33BB6DAFBF71423F3B4969B3B7C00033 -:10FCD000FEF750FD9BE0FEF790FD98E0801CFEF7DC -:10FCE000D1FD94E0801CFEF7E3FF90E0801CFEF75E -:10FCF00080FE8CE0801CFEF792FF88E0801CFEF7FF -:10FD0000B4FF84E0801CFEF793FD80E0FEF7ECFD7D -:10FD10007DE0801CFFF7DEF879E0FEF769FF76E012 -:10FD2000FEF7BEFE73E0FEF74BFE70E0FEF7F7FD58 -:10FD30006DE0FEF72EFE6AE0801CFEF786FE66E0B0 -:10FD4000801CFFF797FE62E0801CFEF7DAFF5EE0A2 -:10FD5000801CFFF775F85AE0801CFFF73DF856E06D -:10FD6000801CFEF7FEFD52E0801CFEF725FF4EE0F2 -:10FD7000801CFFF754FE4AE0801CFFF737FC46E08A -:10FD8000801CFFF7DDF842E0801CFFF74DF93EE0F4 -:10FD9000801CFFF77CF93AE0FFF7E2FA37E0801CBD -:10FDA000FFF71AFB33E0801CFFF785FB2FE0801C78 -:10FDB000FFF7CBFB2BE0FFF7FEFB28E0801CFFF7F3 -:10FDC00066FC24E0801CFFF7DFFC20E0801CFFF7CE -:10FDD00017FD1CE0801CFFF7F5FC18E0801CFFF706 -:10FDE000B4FD14E0801CFFF7EAFD10E0801CFFF773 -:10FDF0006DFE0CE0801CFFF7B1FE08E0801CFFF7F1 -:10FE000020FF04E0801CFFF7EBFE00E0002420460A -:10FE100010BD274A2032537C002B03D19074D1743B -:10FE200001205074704730B5134606E0CC18203CD2 -:10FE3000D51AE47F5B1E4455DBB2002BF6D130BDF2 -:10FE4000017800290CD14121095C002908D18030BA -:10FE5000017C002904D0007C042801D001207047D7 -:10FE60000020704701784068002903D001780029FC -:10FE700005D100E0E4E740304078002801D00020C0 -:10FE80007047012070470A4900208031886740315F -:10FE90000871704710B50178012908D14068803099 -:10FEA000417F002903D00021417703F071F810BD94 -:10FEB0006C120020C409000070B5FC4D00246C7069 -:10FEC0002C70AC616C72AC720120E872F84844701E -:10FED000C473AC62F7482C6302F05FF9002804D0C9 -:10FEE000FF20F5A14F300BF036F92C7770BDF8B537 -:10FEF000F54902250D60F5490026CE630127CF6341 -:10FF0000F349C96A09070DD4F24AD36AF2494B6230 -:10FF1000136B8B62536BCB62936B0B63D26BCB0512 -:10FF20001A434A63ED4C002823D0012825D0FF2036 -:10FF3000E1A1A2300BF00FF9E948A063FF200430E3 -:10FF40006063276303202061E64996204860D74913 -:10FF50001C2008560B22D243811A904237D011DC64 -:10FF60001C313AD00A2938D0142934D0182911D19B -:10FF70002FE0DD486061DD4802E0DD486061DD487A -:10FF8000A061D9E708301FD004281BD0082817D05B -:10FF90000C2812D0FF20D8A176300BF0DCF8DB491A -:10FFA000D9488860DB48DA494160DB490160DB48B9 -:10FFB0000560DB4910204860F8BD0420E060EEE7F2 -:10FFC000E660ECE7FC2000E0F820E060E7E7F420E2 -:10FFD000FBE7F020F9E7EC20F7E7D820F5E710B5CC -:10FFE0000C460146CF480BF0B2F9B048047210BD80 -:10FFF000AF4840787047AD4A517010707047F8B5FF -:020000040001F9 -:1000000004460D4650791179000208436900091928 -:100010000884501C01460E78012730464E7836027F -:1000200030438E78C9783604304309060843117886 -:1000300000020843A9006050284608303E4686402A -:10004000002B0CD0012B04D0FF209BA1E9300BF03A -:1000500082F8206B3043AF4038432063F8BD206BFB -:10006000B043F8E770B50D460446082904D9FF20CF -:1000700091A1FA300BF06FF80022002D0CD9AA489C -:100080009100635809180B6053001B191B8C0B62FD -:10009000521CD2B2AA42F3D3206BA449086070BDAF -:1000A00010B504460B22D2430C308C49944223D025 -:1000B00008DC1C3026D00A2824D0142820D0182888 -:1000C00009D11BE02046083014D0042810D008289D -:1000D0000BD00C2807D0FF2087A176300BF03BF81F -:1000E0007248047710BD042000E00020C860F7E7E4 -:1000F000FC20FBE7F820F9E7F420F7E7F020F5E72C -:10010000EC20F3E7D820F1E76948007B704773499A -:10011000C2784A6202461378184653781B02184385 -:100120009378D2781B041843120610430002C8616A -:100130007047252808D0262808D0272808D0410055 -:100140000A2807D8091D06E0022105E01A2103E06C -:10015000502101E0891DC9B2604A9160614948613E -:10016000704752498861704770B5002816D0022246 -:100170004E4C6F4BA27203201860644D6248686059 -:1001800000200126207500290AD001290FD002295C -:100190001DD049A167480AF0DEFF70BD0122E7E7E4 -:1001A0006548012A01D0466070BD066070BD3F48B9 -:1001B000012A006B05D001214905084320636960CD -:1001C00070BD0121090508432063696070BDA06905 -:1001D000002804D1492038A1C0000AF0BCFFA16961 -:1001E000A06A4018554988604A4855498160554978 -:1001F000C1600120216BC0030143216368602C486A -:10020000C67370BDF8B54A4801688F084449BF00FD -:100210004A68D206D60F10228A60002404603B4848 -:10022000394981600C2069460870474D2C6142496C -:10023000012008610BE000BF00BF00BF00BF00BF8E -:1002400000BF00BF00BF69460878401E08706846BE -:100250000078002802D028690028ECD06846007891 -:10026000002804D14D2024A1C0000AF074FF2C61A5 -:100270000E48012144728472C1722D480760002E1D -:1002800002D0274910204860F8BD01460A78104680 -:100290004A78120210438A78C9781204104309067A -:1002A000084300020D49000AC86370477413002018 -:1002B00094130020A81300207372635C68616C5F64 -:1002C0007263732E6300000080E100E0C01F0040F5 -:1002D00080000010C0000010001700400015004012 -:1002E0005B060000401500400601020025000302E5 -:1002F000050103001F0003027372635C68616C5F99 -:100300007263732E630000000040000400F501409A -:100310004080004080F501401011004080E200E084 -:1003200000130040761300200016004040160040E5 -:1003300000120040550200000010004040850040BF -:10034000488100401010004000110040FB4902208D -:100350000860FB4908607047FA490220086070474E -:10036000F9490870704710B5F84801F01EFF0028E1 -:1003700003D0F749F7480AF0EEFE10BD10B5F34878 -:1003800001F02BFF10BDF4494860704770B5F34C85 -:100390000546A06AA84203D3ED49F1480AF0DBFE06 -:1003A00001202073EF49002025614860EE48456038 -:1003B0000120216B800501432163EC49486070BD39 -:1003C000E64802210173C6210161E64A002151601D -:1003D000816AE54AC63151600121026B89050A43F1 -:1003E0000263E248416070470121E048890581606D -:1003F000DA48026B8A430021026301737047DC48CC -:1004000001214160C160D74900204860D649486059 -:10041000D24988627047D74940200862D6490A68A5 -:1004200002430A607047D44801684022914301604A -:10043000D049002008627047CF48016810229143DC -:100440000160CE49012088617047CD490020C86114 -:10045000C94801681022114301607047C849CA6940 -:10046000012A01D000207047C24A92685206520EFB -:10047000524202700020C8610120704770B50C0024 -:10048000054604D1D920B24980000AF064FEE00795 -:1004900005D0012C03D0AE49BA480AF05CFE002D0D -:1004A0000DD00221AD4801294172C472B24808D072 -:1004B00002290BD0A649B4480AF04DFE70BD0121B7 -:1004C000F0E7016804221143016070BD0168082251 -:1004D0001143016070BDF8B5A04C0025E27A910788 -:1004E00001D5410713D4D306A849002B05DA4B7B6D -:1004F000002B02D08B7B002B09D0130702D50B7881 -:10050000002B04D1520703D54978002900D10125D9 -:10051000677A002201239849002F1BD00226304021 -:10052000284348D0084601688E089949B6004D68AE -:10053000ED06ED0F10278F60002101608B4A954872 -:1005400090600C206A4610708D4F39618B490120F4 -:10055000086114E0854D8F48A86008688008800015 -:100560000860A272E372F8BD00BF00BF00BF00BF09 -:1005700000BF00BF00BF00BF1078401E1070107891 -:10058000002802D038690028EED01078002804D165 -:100590004D208149C0000AF0DEFD00203861607204 -:1005A000A0720120E07274480660002DDBD078480C -:1005B00010214160F8BD012F06D0022F0CD06449F4 -:1005C00076480AF0C8FDF8BD08680425A84308600D -:1005D0006272E372A372F8BD08680825A843086038 -:1005E0006272E372A672F8BD5C4908757047F8B58F -:1005F000664D5A49EC7B086B002C58D001245B4AAD -:10060000E4039460A04308635B480768604C1021D2 -:10061000A16000210160001490600C206A461070F7 -:10062000574C21615548012606610AE000BF00BF12 -:1006300000BF00BF00BF00BF00BF00BF1078401E5A -:1006400010701078002802D020690028EED01078B1 -:10065000002804D14D205049C0000AF07CFD002044 -:10066000E060206160606061A061434807603F49CD -:1006700000144860464910204860384CA07A012890 -:100680000FD0022810D0444945480AF064FD0020EC -:10069000E873207D022803D1424801688907FCD510 -:1006A000F8BD36480660F2E734484660EFE72F4A67 -:1006B000906000200863087B2A4E002802D07068F2 -:1006C000012809D000222E4C2069012806D00023E1 -:1006D000887A012804D006E00122F4E74023F7E7F6 -:1006E000E768012F04D000271F43012802D004E04F -:1006F0002027F9E76368012B05D000233B432A4FED -:10070000022802D007E01023F8E73968012902D156 -:10071000E168012904D000211943022802D007E032 -:100720000821F9E73B68002B02D1E368012B3DD09B -:1007300000230B4302283BD03EE0000080E100E0B4 -:1007400080E200E000E100E092000020A813002019 -:10075000B8020100A202000000150040741300203E -:10076000B3020000408100404085004000F5014098 -:100770000080004040150040001200400010004082 -:1007800000110040690300007E0300009413002064 -:100790000013004000400004F8020100CF030000F5 -:1007A0005E03000000E200E0001400400423C0E704 -:1007B000002A01D0022100E000211943022807D1BC -:1007C0006068012804D17068012801D0012700E089 -:1007D000002790480F4301680906090E02D061699D -:1007E000012900D00021297300680006000E02D004 -:1007F000A069012800D0002068738748006A00289B -:1008000003D000F0DCF9012800D00020A8730020FC -:10081000E060206160606061A06180494860804E56 -:100820008049307548683C4670620968B1620B4681 -:10083000B17A022909D17178002906D07A4A526822 -:1008400012780A40317891430ED000212970774FF9 -:10085000E10710D03978032908D0022906D002F028 -:10086000D1FC0121B06A20E00121EFE707F022F975 -:100870000121B06A27E0A0060ED53878032806D0FB -:10088000022804D00221184602F0CBFC0FE002211E -:10089000184607F010F90AE0A00708D538780328B1 -:1008A0000FD002280DD00021184602F0BAFC5E4895 -:1008B00041680622B01C09310AF096FA002805D0DA -:1008C0000DE00021184607F0F6F8F0E75648317AB7 -:1008D00040680078C009814201D1012000E0002079 -:1008E00068702046FFF7F7FD387800280DD0012802 -:1008F0001ED002282FD003284AD04D494D480AF077 -:100900002AFCB07A022856D075E0A00701D507F07E -:10091000C6FC200702D5012007F0FDFC600702D5C8 -:10092000002007F0F8FCA006EBD507F059FCE8E73B -:10093000A00701D508F0E8FF200702D5012008F044 -:100940004DFE600702D5002008F048FEA006D8D56D -:1009500008F098FDD5E7A007BF25002802DA2C4053 -:1009600004F022FF200703D52C40012004F05DFB9A -:10097000600703D52C40002004F057FBA00602D5E9 -:100980002C4004F061FE6006BBD504F04AFBB8E7DA -:10099000A00701D506F0F0F8200702D5012005F0E8 -:1009A000B1FF600702D5002005F0ACFFA006A8D576 -:1009B00005F01CFFA5E7307B00281CD0174900225A -:1009C0004A60022820D0012803D019491A480AF0A9 -:1009D000C2FBB16A3069884203D8154917480AF04A -:1009E000BAFB1048316941600120316B8005014339 -:1009F000316313494860307D012800D050E611482A -:100A000001688907FCD5F8BD3169B06A411805480D -:100A10004160E9E740160040401500404081004039 -:100A20007413002040850040001500409200002013 -:100A3000B8020100FD0400001205000013050000CB -:100A400000F5014000E200E02E48002101704170F5 -:100A5000704770B5064614460D460120F0F7A2FC1B -:100A600028490120284B08709E60DC601D6170BD24 -:100A7000F8B504460120F0F795FC224901200870E2 -:100A800021494C60214900264E600321204D090672 -:100A9000A960204F002C0AD0012C03D01EA14120B8 -:100AA0000AF059FB3E60032000066860F8BD38601C -:100AB00001200006F9E710B51248017800290ED090 -:100AC0000321134A0906916010494A680021002A4F -:100AD00003D0154A1268427000E041700170002096 -:100AE000F0F760FC10BD07480178002907D00748DF -:100AF0004068002802D00C480068C0B270474078B7 -:100B0000704700009300002000F5004000F1004015 -:100B100000F5014000F200407372635C68616C5F35 -:100B200063636D2E6300000000F400403B48002129 -:100B30000170417010218170704770B506461446EF -:100B40000D460220F0F72EFC01203449344A08708B -:100B5000E41E14619660556070BD10B50220F0F778 -:100B600021FC2E49012008702E48002101604160BF -:100B7000816001202C49C005486010BD10B5274890 -:100B80000178002917D00121274AC905916025491C -:100B90000B680022002B05D04B68002B02D089681F -:100BA000002902D04270102103E0012141701F4949 -:100BB0000968817002700020F0F7F4FB10BD17483F -:100BC0000178002912D01748016800290AD001686D -:100BD000002905D04168002902D08068002803D090 -:100BE000002070470220704701207047407870470E -:100BF0000A48017800290FD00A480168002905D069 -:100C00004168002902D08068002801D01020704778 -:100C100006480068C0B27047807870479500002091 -:100C200000F5004000F1004000F5014000F40040F4 -:100C3000FFB593B0044600201D9E049015981C9D9E -:100C40001027082806D0E06901F014F8002809D020 -:100C50003770CCE028880921384328801F98022764 -:100C6000017016E0E169012088710521E269C9027D -:100C70009180E1698872E169F9480881E1690020A1 -:100C80008873288820210843288011211F98042771 -:100C900001701F980225801C0390307810900A2064 -:100CA0003070204618301190F5F7A1FC00206FE05D -:100CB0001598102809D1022D07D06846828A049918 -:100CC0000398401A8270110AC1706846C08A16994A -:100CD000884203D9E349097A149106E0884204D195 -:100CE0001099002901D0317021E003990870000AA1 -:100CF00048701E980088401BC01B83B2FF20C01B99 -:100D0000984200D203460398149AC0190CA9009285 -:100D1000019002912020015D6846C08A0022F5F70B -:100D2000DBFC3070002806D0C0B2832862D0684651 -:100D3000C08A208345E00F98002805D0C948006884 -:100D400000790A2830D33CE06846008EC119C9B248 -:100D50000491022D0FD01F99049A4978914203D132 -:100D60006A46128C824209D0BE480491006801781C -:100D7000032909D027E008461F994870B948006840 -:100D80000178042906D008E000790A281BD2012046 -:100D90000F9009E06946C98A818003990498081870 -:100DA00003900498281885B205AA14991198F5F7AC -:100DB00021FC002805D11E980088401BB84200DBAA -:100DC00076E7022D0ED01598102807D1049A0399C2 -:100DD0006846808A891A8870000AC8701E98058043 -:100DE000002030709F4800680078032802D000205F -:100DF00017B0F0BD0220FBE7F8B50446406B0026B3 -:100E0000134600282BD0491F8DB2618F2A46083225 -:100E1000278F8A18BA4221D89A7840185F78110231 -:100E200039430170090A41701A79DF781102394398 -:100E30008170090AC1700571290A41712A46591D3C -:100E4000801D09F0FEFF608FAD1D401980B26087E4 -:100E5000626B002110180170417000E009263046D5 -:100E6000F8BD30B50B88048F9C4212D9446BE01852 -:100E70004478057824022C430BD044790579240268 -:100E80002C436404640CA41D1B190B80106000200B -:100E900030BD822030BDF7B588B000256846058298 -:100EA00005275DE00398417802780E0216434179E8 -:100EB000027908021043000452D40A9801230680E4 -:100EC00005A802905B02002200970195304609991F -:100ED000F5F702FC04004AD16846018A01830398B1 -:100EE0004179027909021143437802781C021443C4 -:100EF000B4421ED10A041CD44B0401215B0C8903AB -:100F000000950B4301970295C17880780A0202434D -:100F100020460999F5F7FCF9040011D103994879A5 -:100F20000A79000210430122D20310430871000A1B -:100F3000487103AA06A90898FFF793FF0400CED0D2 -:100F400003990095019702954878097800020843B3 -:100F500069468B8A00220999F5F7DAF9822C06D1C5 -:100F600003AA04A90898FFF77CFF04009AD06846FA -:100F7000058209E003984179027909021143490485 -:100F8000490C0171090A417103AA04A90898FFF7E5 -:100F900068FF0028EED0822C02D020460BB0F0BDB6 -:100FA0000020FBE730B50446406B002597B00028D1 -:100FB0000DD00B2268460270228F0281606B039174 -:100FC000019000216846F2F72AFB684605706563C8 -:100FD0006587258717B030BDF8B50F460546696BA4 -:100FE0000020069E144600290FD0012B0DD1324659 -:100FF00039462846FFF74FFF002806D1002C04D0C1 -:1010000032463946284600F044FEF8BD00220280F0 -:10101000C262831D0263C36142634287028720303C -:101020000170704710B50022D24302800420FBF704 -:10103000E4FA10BD10B596B00446FFF7B3FF208E5A -:10104000002808D0012069460870E06A019000215C -:101050006846F2F7E4FA0020E062206316B010BDA3 -:1010600001280000AC1300200146098800200A076F -:1010700000D501200A06120F01D002221043CA0532 -:1010800001D5042210438A0501D5102210434905D9 -:1010900001D5202108437047FFB5A9B00600329D55 -:1010A000359C2B981F46229016D0007841060FD40D -:1010B0008106890E1E2909D021884A05520E0BD1BE -:1010C0003A88172A08D3FE4A914205D0C10906D0B2 -:1010D0008006800E122802D003202DB0F0BD2046DD -:1010E0002C302690F7492A980872002018AA0390FD -:1010F00010726A46107404AA0A60339A4A6020AAE1 -:10110000908090812298007801908106681C1C9044 -:10111000701F1D902B98890EC21C249222462032EB -:101120001B92083A401C02920B000AF035F91FFD91 -:10113000FD11FD1FFD8EFDFCFDFBFDFAFDF9FDFC23 -:10114000FDF8FDFDFDF7FDF6FDFDFDFDFDF5FD00E6 -:10115000032E76D102E018A9087219E30320287043 -:101160001C9917220A7000224A70CFE2052EF0D196 -:101170004178027808021043208320A98880249AAD -:101180005178127809021143618300287ED0884289 -:101190007CD800202072E080401E60840298F5F721 -:1011A00026FA05202870A81C0190022000901BAA96 -:1011B0002A990298F5F71EFA002868D118A8807CB1 -:1011C000012803D002206870102002E0012068701E -:1011D00002202490002225A91CA8F1F7AAFD0028CE -:1011E0002BD120A8007D2499814226D13A880099EC -:1011F000801C511A814220DB10A8C18D019801701A -:10120000090A417001991CA8891C01910099019A51 -:10121000891C009125A9F1F78CFD20A8007D01997A -:101220001BAA091801910099081880B200902A9908 -:101230000298F5F7DFF90028CCD00098022826D0D4 -:1012400064E272E018A9087261E2072E6DD341785A -:101250000346027808021043208320A98880249A3C -:101260005178127809021143618300280ED0884218 -:101270000CD8012020725879197900020843E080C7 -:1012800000202073E06900F0F5FC01E098E0A9E09F -:1012900000280ED1E169012088710521E269C902A7 -:1012A0009180E1698872E16987480881E1690020DD -:1012B0008873F01F60842298C01D60620298F5F761 -:1012C00096F907202870681C0090012001900020EA -:1012D00010A9C8852FE00198012814D0E069807911 -:1012E000012830D000981E38417F007F0902014359 -:1012F00000980170090A41700098801C00900198C4 -:10130000801C80B2019010A8C18D00980170090A5C -:1013100041700098801C09E00AE296E13BE1DFE0C1 -:1013200004E29BE077E036E016E2AFE0009001983F -:10133000801C80B201901BAA2A990298F5F75AF9ED -:10134000002803D007E010A8818DD1E739880198E3 -:10135000081A0428BFDA0198012843D0E06980798F -:10136000012804D010A8818D5548814206D110A8CB -:10137000818D00980170090A417009E000981E38BB -:10138000417F027F0802009910430870000A4870EC -:101390000198801CBAE1072E01D0152E76D1417834 -:1013A000027808021043208320A98880249A51786B -:1013B0001278090211436183002801D0884201D9C3 -:1013C00001203FE7012020720020E0802073052EDD -:1013D0000AD01D982299E269C0B2491DF1F783FC39 -:1013E000002801D00A202DE70020C04360841AA8FD -:1013F000019023A922980297039500910078002379 -:101400008206920E20462A99FFF712FC0390208B49 -:1014100020A988807BE1032EC0D1402220A98A81A7 -:101420004178027808021043208320A988802A99F5 -:101430001EAB1C9A02930192009139880022491E2A -:101440008BB21B990978F5F747F918A9087200289B -:1014500033D10B20287010A8008F3FE0052E9DD1BE -:10146000802220A98A8141780278080210432083D3 -:10147000249984464A78097812020A43628420A992 -:1014800088801248824202D30720DBE6AFE03F208B -:101490008002024362842A981FAB1C990293019137 -:1014A00000903888401E83B21B9801786046F5F79B -:1014B00013F918A9087200280CD08328AAD107E0D4 -:1014C000FFFF0000AC130020012800000102000013 -:1014D0000220B8E00D20287010A8808F401C15E174 -:1014E00001990C22C9095143C91CB14204D9019880 -:1014F00040067CD5002009E14278037810021843A9 -:1015000020AA9080844622980078400609D50520BC -:101510006A46107422980078C00905D00020107423 -:101520001DE106206A46107424981F902A9A0090A4 -:101530000023701A029383B21E9001921B9800221E -:1015400001786046F4F7E4FE18A9087200226946A3 -:101550000A74832801D10220039022980078400663 -:101560000DD52088C00506D520A9208B8988884202 -:1015700001D100206062002018A90872C6E0FF2196 -:10158000013120A88181808820831E9860841F9863 -:1015900060621320B8E0052E29D341780278080252 -:1015A000104320A98880218F002902D0FE4A914251 -:1015B00006D10A216A4611740121C943218702E03C -:1015C00007216A46117422992A9A491D01920091B5 -:1015D00001221D990023D203029311438BB2249957 -:1015E0004A78097812020A431B99097800E0C9E099 -:1015F000F4F78EFE18A90872002269460A740122C7 -:10160000520220A98A81832808D0002809D0218F7E -:10161000E54881427ED10020208778E088882083B9 -:101620004DE7606B002808D031462046229AFFF72C -:10163000E3FB18A90872002869D12B463A463046C8 -:10164000229900F056FB039061E02298022E407828 -:1016500001907DD1002801D0012879D10820694668 -:1016600008740198087521A800901B980022017841 -:101670002046019BFFF7B0FC6946002248758A7539 -:10168000002802D10198012809D0208F002806D017 -:10169000002008740120800220A988810EE004A89F -:1016A0003399F1F7BCFF03900020694608740120CC -:1016B000800220A988810398022807D0BB480068CF -:1016C0008079002805D018A908722BE001982083A2 -:1016D0001DE00398002803D0812018A9087240E07B -:1016E00021A800901B98012201782046019BFFF75A -:1016F00073FC18A9087220463499FFF753FC18A907 -:10170000087A002803D11920287001203880684603 -:10171000007C00E03CE0002804D004A83399F1F7F5 -:101720007EFF0390039800282ED01AE0062012E5D1 -:101730002078000713D5012E11D1092168460174C4 -:10174000A188818204203499FAF757FF082100E02C -:1017500005E020A88181CDE60198400612D503203E -:10176000039020A9208889890843208020A988899E -:101770004005400E04D026992B9808602698868054 -:101780000398AAE40420E6E418A8007A00280ED002 -:101790000120287022980078687020A88088A8709E -:1017A000000AE87018A8007A28710520388020A95E -:1017B0002088898988432080E2E7FFB50746A1B0E9 -:1017C00000201C903A7801209040794A7C681040B3 -:1017D00010AA1087744B22885B1C9A4203D0002801 -:1017E00004D0100702D5012025B0F0BD249E0020B2 -:1017F000307023980025028810A8028518A8057566 -:101800006A4B68461972057404A8186020462C308B -:101810001B902A985860249E94463878721C0521A3 -:10182000039201282DD0022808D003287DD13078DA -:10183000800980011D303070B889A0803878022876 -:1018400004D13078800980011B303070F01C1FAA51 -:1018500001900292009110A8008D0022C01E83B258 -:101860002020015DB889F4F737FF0028DED1039806 -:10187000B9890170090A417010A9888FC01C0885B8 -:1018800028E1787B18AA10753A7B012A02D0022A37 -:10189000CCD1FCE022887F231B011A4010AB1A87B1 -:1018A000802A4AD006DC102A10D0202A0ED0402AE6 -:1018B0000AD124E0FF3A013A65D0FF3A013A79D0E3 -:1018C000FF3AFF3A022A76D00525A2E02078C0062A -:1018D00001D5082000E010201C9004206A461074F6 -:1018E000002090821AA81DAA1EAB039601920290B6 -:1018F00000933B8A20461C9AFFF79AF984E0228BDA -:101900003B8A9646934268D10A221C92002839D11C -:10191000039801906046401E1FAA83B202922020C5 -:101920000091015D0022704600E0BAE0F4F7D4FEB9 -:10193000014618A801750B201AE0228B3B8A9646B7 -:1019400093424AD10C221C92002862D10398019044 -:1019500060461FAA401E0292009183B22020015DC2 -:10196000628C7046F4F7B8FE014618A801750D2088 -:10197000307010A8818F491C0185042168460174CC -:10198000218B818245E0238B3A8A9C469A4224D15E -:1019900012221C9200283CD1606A002813D0002239 -:1019A0006B4607C3638C07E0FEFF0000AC1300200A -:1019B00009F800000DE04BE02020015D6046F4F7DF -:1019C000A7FC18A9087513203070012010A90885FC -:1019D0001FE0398A228B914201D00425B6E01621FE -:1019E0001C91002815D11B98818802682046FFF7BA -:1019F00003FA18A9087500280BD11B983346016813 -:101A000080881AAA00F075F9054602281BD0042D1B -:101A100019D01B988088002811D06846007C0028C7 -:101A200004D004A82A99F1F7FAFD05460120694679 -:101A300008741B981B990068059000208880002D71 -:101A400048D0052D2ED06846007C032878D07DE054 -:101A500018211C91002806D0388A20832046B968B6 -:101A6000FFF7A0FAD5E72046183000902020015D4E -:101A7000237E01222046FFF7AFFA18A90875002837 -:101A8000ECD119203070012010A90885E6E72088E4 -:101A900001214902084010A90887FF38FF380228B1 -:101AA00006D0052510A92088098F884320804DE0A5 -:101AB000208F9849884290D116201C9038690028C0 -:101AC00005D06063B88A20870020608702E000208C -:101AD000C043208710A8008F7F21090102468A4356 -:101AE0000DD0782300220420B968FAF7DFFC38789B -:101AF000A07010A92088098F0843208002E0218867 -:101B0000814321806846007C002805D082484168D6 -:101B100004A8F1F784FD054618A8007D002815D01B -:101B20001C98707001203070208BB070000AF0702B -:101B300018A8007D3071052110A8018506E0FFE797 -:101B40007548416804A8F1F76AFD05467248017AB4 -:101B500020884005400E22D11B98808800281ED086 -:101B6000239A0026138810AA1385249A2A9B6F466D -:101B70004CC71B9A039412681AABFFF78DFA0546FF -:101B800002280CD00120694608741B982A99006825 -:101B9000059004A8F1F743FD05461B98868010A820 -:101BA000018D2398018028461EE600B597B00428D1 -:101BB00007D102206A461070019100216846F1F7B2 -:101BC0002EFD17B000BD10B5534C037800222168DC -:101BD000012B02D0022B42D126E00B78002B01D042 -:101BE000042B03D10A7122680321117021688388B4 -:101BF0000A79D200921D8B5221680A79D2000832EC -:101C00008918C2880A80216803890A79D2000A32B9 -:101C10008B52428920680179C9000C3142522168F7 -:101C20000879401C08711EE00A7482888A80216845 -:101C3000C288CA8022680189118122684189518144 -:101C4000C1682068C1606168F1F7E9FC01460228BB -:101C500007D02068007C002802D1002903D0812011 -:101C600010BD832010BD002010BD406B002800D0A7 -:101C7000012070478178012909D100880521C90216 -:101C8000884202D0491C884201D1002070470520BB -:101C90007047F7B586B00024684615460F46848124 -:101CA00005261AE004984178027809021143298038 -:101CB000811D019602940091417902790B02134330 -:101CC000C178827809020A43417800780902084302 -:101CD0003946F4F71DFB002806D104AA03A906988B -:101CE000FFF7BFF80028DDD0822800D1002009B01E -:101CF000F0BD10B51488844201D2052010BD172410 -:101D00001C701080421E581C491C09F09AF80020D3 -:101D100010BD0000FEFF0000AC13002030B50346EC -:101D2000002002460DE09C5C2546303D0A2D02D382 -:101D30000020C04330BD0A25684330382018521CAB -:101D4000D2B28A42EFD330BD70B50D46144608E0DA -:101D50000A2109F0DFF82A193031203A641ED177C0 -:101D6000E4B2002CF4D170BD10B5002310E0040AD9 -:101D700000020443A0B2CC5C44402006000F604047 -:101D80000407240C44402006C00C60405B1C9BB23E -:101D90009342ECD310BD000010B572B600F0DCF831 -:101DA00000280BD0EFF77CFAFAF7E1FD08F097FB7B -:101DB0006E490020C86288626D49086062B60020E2 -:101DC00010BDF3B5002501200007C06A81B0C043F3 -:101DD0000006000E04D167480068401C00D10125B0 -:101DE00072B600F0B9F8002802D062B60820FEBD35 -:101DF000EFF7ACF9EFF758FA5F4B604E00211A6825 -:101E0000CA40D2071FD00246CA40D20718D14AB2F0 -:101E1000002A07DA1407240F083CA408A400A41918 -:101E2000E46904E09408564FA400E419246892077A -:101E3000D20ED4402206920F012A04D0032A02D0E7 -:101E400062B65048FEBD491C2029D8D30198030032 -:101E500009F0A2FA142123232323232323230B0D88 -:101E60000F11131F1517191B1D2E002416E0012436 -:101E700014E0022412E0032410E004240EE00824FD -:101E80000CE009240AE00A2408E00B2406E00C24F4 -:101E900004E0052402E0072400E00624F0690121A3 -:101EA0000002000AC9070843F061002D04D009E0D0 -:101EB00062B601200003FEBD2C4D3348E862EFF707 -:101EC000F3F9A8622A49314808603149029808604C -:101ED000EFF7EAF9214608F0E9FAFAF70CFD08F005 -:101EE000EFFC08F065FB0198EFF7A8F9040062B673 -:101EF00003D0FFF751FF2046FEBD0020FEBD10B508 -:101F0000044600F029F8002800D0012020700020AD -:101F100010BD204908600020704710B50C461028FD -:101F200008D011280BD012280CD013280ED0012075 -:101F3000086010BD03CC083CFFF743FF0AE0FFF741 -:101F40002BFF07E02068FFF7DAFF03E01149206864 -:101F500008600020206010BD05480C4900688842D8 -:101F600001D10120704700207047000000050040AB -:101F7000640000200010001000E100E000ED00E02F -:101F800000E400E00110000000220000BEBAFECA1A -:101F9000980000200400002010B520380C460300F3 -:101FA00009F0FAF933A6AAAEB2B8BCC0C5E0DBE4CA -:101FB0001B1F23272C31373C41474D5054585C6040 -:101FC0006D71656974787C8084888C9094989C9FEE -:101FD000A2CACFE9F0F3D3D7F800206800F0DDF80B -:101FE000D6E0206800F0E1F8D2E0206800F0F5F8D3 -:101FF000CEE0207840B208F0C9F8C9E0207840B2BD -:1020000008F0E7F8C4E02078616840B208F0FAF818 -:10201000BEE0207840B208F00AF9B9E0207840B27A -:1020200008F015F9B4E02078217940B208F020F9E1 -:10203000AEE02078616840B208F04AF9A8E008F004 -:1020400056F9A5E0206808F05AF9A1E0207808F0D8 -:102050006FF99DE02068FAF738F899E02068FAF700 -:1020600038F895E021792068FAF73AF890E020688E -:1020700007F0D8FF8CE0206807F0D9FF88E02078CF -:1020800007F0D9FF84E007F0E3FF81E0207807F054 -:10209000E5FF7DE0207807F0F7FF79E0206808F0A1 -:1020A00010F875E0206808F012F871E0206808F078 -:1020B00014F86DE0206808F015F869E0206808F071 -:1020C00017F865E0206808F019F861E0206808F06A -:1020D0001AF85DE00846EFF751F859E0F0F787F994 -:1020E00056E0F0F7B4F953E02068F0F7BCF94FE0A0 -:1020F000206800F0E1F84BE0206800F0E9F847E0E4 -:10210000206800F0F0F843E02078A268616800F0F1 -:10211000F5F83DE0207800F006F939E0207800F08D -:1021200017F935E02078616800F027F930E0207871 -:10213000616800F03AF92BE02179207808F008FA7C -:1021400026E0206800F06BF822E02068FAF7FEFA3B -:102150001EE02068FAF7E2FA1AE007CC0C3C08F01F -:10216000F1FA15E0206808F044FB11E003CC083CCC -:1021700008F06FFB0CE0206808F065FD08E009E05E -:1021800003E0FFE708F077FD02E0206808F0AEFD0D -:10219000206010BD0120086010BD002101700846BC -:1021A00070470146002008707047EFF31081C9079F -:1021B000C90F72B60278012A01D0012200E0002284 -:1021C00001230370002900D162B6002A01D000204B -:1021D0007047012040037047E7E7EFF31081C9071C -:1021E000C90F72B600220270002900D162B6002029 -:1021F0007047F2E710B52848FFF7CFFF002803D05B -:1022000026A11D2008F0A7FF2348401CFFF7C5FFAB -:10221000002803D021A1212008F09DFF10BDF1B5B9 -:10222000224D6F6801261C48FFF7BFFF1A4C00289B -:1022300003D10026601CFFF7D0FF1D4A1D49012075 -:10224000506000BF00BF00BF00BF00BF00230B6095 -:102250004B60009B6B60106000BF00BF00BF00BF01 -:1022600000BF0868002802D148680028F9D04868F3 -:102270000028E4D1002E04D06F60601CFFF795FFAA -:1022800007E0601CFFF791FF0028D3D10248FFF759 -:10229000A4FF0020F8BDC2E79C0000207372635CBD -:1022A000736F635F6563622E6300000000E50040AA -:1022B00000E0004000E100405A495B4B0A685B497E -:1022C0009A42096801D18904890C01600020704795 -:1022D0005449554B0A6855499A4201D18004800CF3 -:1022E0004860002070474F494F4B0A684F499A4257 -:1022F00001D18004800C88600020704730B5494BC4 -:10230000494D1C684A4BAC4202D0102802D203E06F -:102310000E2801D3184630BDC30044481818016187 -:102320004261002030BD3F493F4B0A684049491C8B -:102330009A4202D0042802D203E0022801D30846C0 -:1023400070473C4A0121C00080180160002070479E -:102350003449354B0A683649491C9A4202D0042850 -:1023600002D203E0022801D308467047314A012116 -:10237000C000801841600020704770B5294A2C4B7E -:1023800014682D4E284D82005B1C9219AC4203D07C -:10239000042803D2116006E0022801D3184670BD5C -:1023A0008804800C1060002070BD70B51D4A204B61 -:1023B0001468214E1C4D82005B1C9219AC4203D064 -:1023C000042803D2106806E0022801D3184670BD25 -:1023D00010688004800C0860002070BD10B5134A9E -:1023E000164890600E200021C3009B1819615961A6 -:1023F000401C1028F8D300200F4A05E0022803D320 -:1024000083009B18196005E083009B181C68A404D6 -:10241000A40C1C60401C0428F0D310BD03490748DD -:102420008860704764000020BEBAFECA00F5014013 -:102430000820000000F0014000F8014000C0FFFF4C -:10244000FE48C07E7047FE4840687047FD48C07E29 -:102450007047FFB5F94E85B0706A346805686068EA -:102460000190306A0390298D0798401A80B202903B -:102470000898002804D0274638372046483002E024 -:10248000371D2846A0300090032038710598002899 -:102490001FD001287ED0022863D003287BD0EAA178 -:1024A000ED4808F058FE0898002806D0387903282F -:1024B00003D0E5A1E94808F04EFEA16A7069FAF779 -:1024C000B0FDB860216A606A814265D900990860F0 -:1024D00034E1306A002803D1DBA1E14808F03BFE7B -:1024E000288BE0494843421806980021002804D070 -:1024F0005043DD4908F00EFD411CA1610191AA88FD -:10250000D848002142430698002804D05043D649B9 -:1025100008F000FD411CE161306AD24A801CA062D3 -:10252000298BD04B5143019A891AD04A891809182E -:10253000A162AA7D01985A4340008018FF301930EB -:1025400020626062306A081AC949FF38153888422B -:10255000A9D2C84988427DD2BBA1C74808F0FBFD7B -:102560008BE0288BBF4AE16850430A180698002187 -:10257000002804D05043BC4908F0CCFC411CA161A8 -:10258000AA88B848002142430698002808D0504342 -:10259000B54902E03EE073E0CEE008F0BBFC411C30 -:1025A000E161306A002803D1A7A1B44808F0D3FD47 -:1025B000A620405BAB4A0028288BE16821D050431D -:1025C0000818A169401AA0622169A068A54A484379 -:1025D000A1694018A97D400051434018FF301730D1 -:1025E0002062A888E1695043411AA5480818606232 -:1025F000A06A316A401A9E49FF38553888423CD358 -:1026000051E750430818A169401A3168D638496823 -:102610004018D8E7284680300190C08C002802D0AE -:10262000306A002803D188A1964808F094FDA88854 -:102630008C49E3694843C01AA06201999C46CA8C40 -:102640002169A368521A4B43A16959186346534341 -:10265000C91800E011E0AA7D824B49005A4389184D -:10266000FF3117312162864941186162316A401A8F -:102670007F49FF3855388842C2D20120387112E7AD -:102680000898002803D03420005D00287ED1A88857 -:1026900074494843E169401A02994843A0622846B8 -:1026A00080300490C08C0028019825D0002803D0E9 -:1026B00065A1754808F04FFD04986A4AC18C0298DC -:1026C0000818E16948434000FF3017302062A888AD -:1026D0005043411A6A48081860626C4840680028F4 -:1026E00019D0A26A03990120511A614AFF3955395C -:1026F000914285D23871D6E6002802D0039800288E -:1027000003D151A1624808F026FD0198A16AD6388C -:102710000818A062D0E7FAF7F2F97269014610468C -:10272000FBF706FCA16A081A5149FF385038884265 -:10273000A5D2012009B0F0BD00980160009855496C -:1027400000684018F86028468030028A0799511ABC -:1027500009B2002904DD0599022901D0032100E016 -:10276000002179710E99002915D0028F002A1ED000 -:10277000418F4187A0352B7F491C4B4393420AD29E -:102780007979491E002906DD012100E00CE079710C -:10279000418F491C4187089838700898002808D054 -:1027A0003420005D002804D0022009B0F0BD0021D3 -:1027B000DFE708980121484020346075307FF27EC1 -:1027C0003946B37E9A4202D0FAF710FE04E00020A8 -:1027D000F076B07630607062002009B0F0BDF0B5E0 -:1027E0002A4F83B038680568416A2E460C68203647 -:1027F000717D00290AD0698E228D914206D1407ADE -:10280000002803D110A1244808F0A5FCFAF777F9B5 -:102810001E4F39684A6901461046FBF789FB3F683D -:102820000028796A096807D089880E4A51433A68B6 -:10283000D269891A08F06EFB698E2FE0B813002068 -:10284000B8000020E01300207372635C6C6C5F6C56 -:102850006D2E73302E630000310500003A05000034 -:10286000B7040000E204000040420F0033040000FF -:102870005C0800001D030000D4040000DC0400001C -:1028800094FBFFFFF50400001B050000A8000020DA -:1028900014050000FF0B000021060000228D131814 -:1028A000994202DB491C698602E0401C10186886C8 -:1028B000B07D002806D19421688E095B884201D141 -:1028C000401C6886388BFB4E401C388320464030C5 -:1028D0000190C1888088081A218D401E401887B257 -:1028E000C03418E03068F449406A002300794000A1 -:1028F000085A009323795B00C95A081881B2287DD1 -:102900000023FFF7A6FD00280FD001280FD0EB49C8 -:10291000EB4808F020FC6A8EB81A00B20028E1DA11 -:1029200001980821817005F0BDFF03B0F0BD688EED -:10293000401C6886EFE770B5DE4D09292B686A6890 -:102940007BD20C007C4424792419A7440463869626 -:1029500083A5A575A20000201062D17E042956D25D -:102960000B007B441B79DB189F4451510147516A8E -:102970000C68116808701168486010682030407D4C -:10298000002808D1FAF7BBF869680968096CFBF7F9 -:10299000CFFA002817DC6868228D0168498E9142C1 -:1029A00005D123468033998A8A1ADA8204E0891A8B -:1029B000962211530168498E21850268C16811640D -:1029C000C168416111E068680168098E228D8B1A27 -:1029D00022468032D3820168098E218501680B6C02 -:1029E000C3600B6C4361886C1062204606F0C8FB24 -:1029F000002821D0B3A1B74829E0D068506105F084 -:102A000088FA002818D0EF20AEA180001FE0ADA109 -:102A1000B1481CE0D07E042817D20100794409791E -:102A200049188F441212010B06F0E6FC002803D06F -:102A3000A4A1AA4808F08FFB70BD2DE005F09FFB14 -:102A40000028F9D09FA1A64801E09EA1A54808F062 -:102A500082FB70BDFDF7CBFD70BDD87E022806D08D -:102A6000D87E032806D0FF2096A1AB300EE0FFF7FA -:102A7000B6FE70BD00F013FC70BDD87E0228F6D003 -:102A8000D87E0328F6D0FF208EA1B83008F063FB73 -:102A9000F0E7FAF719F870BDFF208AA1C630D6E733 -:102AA000F3B50126834C904D81B00F46092945D2DC -:102AB00008007844007900188744042D38382D40E8 -:102AC000403838000121884800F0D0FB3946019891 -:102AD000FFF731FFE87E022826D160680468406A6B -:102AE0000768F9F7EAFFB988804A5143E269891A11 -:102AF000D639E162B72803D283200001081A02E028 -:102B0000081A7B494018E0627A48E16A814200D89D -:102B10000846E06205E00198FFF70DFFE87E022815 -:102B200002D128682030067503B0F0BD25600198F9 -:102B3000FFF701FF0020206003B0F0BDFF2061A17E -:102B4000623008F008FB03B0F0BD70B506460C46D5 -:102B500009291FD208007844007900188744040D21 -:102B600011110D1A1A1111000121634800F07EFBAA -:102B700021463046FFF7DFFE70BD3046FFF7DBFE33 -:102B800070BD4C4D5C4828603046FFF7D4FE0020F5 -:102B9000286070BDFF204BA1883008F0DCFA70BDC2 -:102BA000F0B5514985B0CA7E0026424C032A03D0B5 -:102BB0002831CA7E032A64D100252160002824D050 -:102BC00001280ED03FA14D4808F0C5FA2068002E1C -:102BD00005604562256054D049484560002005B035 -:102BE000F0BD0320887600E020BF2068C17E002968 -:102BF00003D0C17E827E9142F6D0C17E002902D0F0 -:102C000000268576E2E70126FBE700260327084633 -:102C10008F76C97E032903D0C07E00282DD02DE0F9 -:102C2000007F002803D127A1364808F094FA2068D5 -:102C3000067F684607714771F9F761FF0290FF2030 -:102C4000F530039001216846017069463046FAF775 -:102C5000CDFB2068007FFBF7F7F900280BD0206838 -:102C6000007FF9F731FF20680577C5768576056026 -:102C70000126456202E020BFEBE701262068857649 -:102C8000A4E70C2005B0F0BD10B5174800F04DFBCF -:102C9000194800F04AFB1C49002008751849487083 -:102CA00011494861144A506188769076014948601C -:102CB000086010BDA800002034B4010048280100BD -:102CC0005B0600007372635C6C6C5F6C6D2E73301E -:102CD0002E630000B6030000C3030000D60300000B -:102CE000DB030000E2030000B8130020E204000050 -:102CF00087F8FFFFEC060000E01300201E03000031 -:102D0000B80000207E02000008140020F8B5FF4E35 -:102D100005463068002401270004810FFC48006844 -:102D2000800F814204D0FF20FA49D03008F013FA16 -:102D30003068F94E0004810F30680006800F814230 -:102D400004D0FF20F349D13008F005FAF348C069F8 -:102D50003168800F0904890F884204D0FF20ED49B3 -:102D6000D23008F0F8F9EE480570EE4DEC76AC760E -:102D7000ED4EF476B476ED48077104606C627462CF -:102D80002C60EB4F346028467C6000F0CEFA304671 -:102D900000F0CBFAE74804757C706C617461AC7626 -:102DA000B476E54844600460F8BDE04908717047B6 -:102DB000F8B5DC490546CA7EDB48DF4C002A02D163 -:102DC000C27E002A03D0C97E022907D009E0DB4871 -:102DD0002160F9F725FE216808770AE0C17E002905 -:102DE00001D00C20F8BD2060D548F9F719FE216804 -:102DF0000877CF48456021680860D2484862284675 -:102E00000121BC30F9F790F9A035287F8007800FA9 -:102E1000401C28772068007F002803D1BD49CA489C -:102E200008F099F9F9F749FEC849884200D20846E6 -:102E3000C749401886B221680320C87604F084FF91 -:102E40002168086104F0A8FF01270025002826D08A -:102E500004F0A2FF21684A6A106008680121077027 -:102E60006846F9F7EAF868460078BA49000208F0BF -:102E700051F80F46F9F743FEF119FAF7D2F8216835 -:102E8000C86022680320107250721571107FD37EC3 -:102E9000111D967EB3420ED0FAF7A8FA0FE0F9F7AB -:102EA0002EFE3146FAF7BDF82168C8600868057043 -:102EB00008684770E5E7D576957615605562206815 -:102EC000058300202560F8BD7047F8B5954EF17E6A -:102ED000002903D19449C97E002901D00C20F8BDF6 -:102EE0000221F176914F934D77623560002438606E -:102EF0002C7500943979C0304A00974900798A5A74 -:102F00004000085A2346101881B222462046FFF797 -:102F1000A0FA002803D07F49904808F01CF92C61E2 -:102F20000120AC6028756C862C868D4884753968C4 -:102F3000088D401E088534830020F8BD10B57E48FA -:102F400001244068817E03290CD00168497800295A -:102F500006D0006A8349884202D9002405F03CF972 -:102F6000204610BD0024FBE77348406802681178D2 -:102F7000491C1170016A0068C26A914204D8007D40 -:102F8000012801D0012070470020704700207047C1 -:102F9000F8B5694D63482860416A00270C680068ED -:102FA000342126460F548036B17F002927D1007D79 -:102FB000032824D1F9F7A3FD29684A690146104680 -:102FC000FAF7B6FF00281ADD2D68674B6A6A296890 -:102FD000126892880091C9695A43511A07F09AFF02 -:102FE000218D401C4218009953480A862968B28AEC -:102FF0000B8ED21A12B2002A03DC0760F8BD2F60D4 -:10300000F8BD012220318A7521464031CA8889885D -:10301000514F511A228D491E89188EB20546C0346F -:1030200019E0496A09794900795A00220092028E12 -:103030002379007D5B00FB5A591889B20123FFF701 -:1030400008FA00280ED001280FD002280AD03149F2 -:10305000464808F080F829680868028EB21A12B251 -:10306000002ADEDA00202860F8BD28680068018E9A -:10307000491C0186EFE770B52F4900244D680628EA -:1030800076D202007A441279921897441820020EE0 -:10309000240D002000F08FF9EC76AC762C60002136 -:1030A00008466C6200F0E2F870BD1D480D680078BB -:1030B000EFF72AF9EC76AC762C606C6270BD0120DB -:1030C00000F079F90021084600F0D0F870BD2968B9 -:1030D0000320087570BD686A29680068CA698A603B -:1030E0008188214A51432A68D1600146C0310A8A49 -:1030F00002838A7B82754A8A82808A8AC280C98AD0 -:10310000018129680220087570BD31E000E400E00B -:1031100008E400E0C42C010018E400E000ED00E049 -:10312000A0000020B8130020E0130020B000002011 -:10313000B800002008140020A8000020A12A0100E7 -:103140004B2B0100A4000020C9020000F60500007E -:10315000BB0200001027000034B40100520300003D -:1031600028140020D9821300E204000007060000A2 -:10317000DD49DE4807F0EFFF70BD70B500280BD0C9 -:103180000024DB4D01280ED002282FD0EF20D64995 -:10319000C00007F0E0FF70BD00F06BF900210846A9 -:1031A00000F064F870BD686801684C70C47684767D -:1031B0000460D04E446201220021706800F063FF79 -:1031C00071680846C0318C72CC72FFF77EFE002811 -:1031D00003D0C549C84807F0BEFFF9F7DBFBC74875 -:1031E0006C600078EFF790F86C6070BD00F041F90A -:1031F0006868C4768476046000214462084600F062 -:1032000035F870BDBA494968CA7E022A08D10A68F1 -:103210001378002B04D150600968CA6A1018C8627C -:10322000704710B5B24A002952680BD0012906D068 -:10323000022906D0AC49B24807F08DFF10BD801EB0 -:1032400000E0401F106210BD08B50020C043694671 -:103250000880AC48C07E002801D0002008BD084688 -:1032600000F0F6F90028F9D0012008BD70B5A04C97 -:1032700005466268002908D0002A04D0FF209A4938 -:103280000D3007F068FF656070BD002A04D1FF2093 -:103290009549133007F05FFF0020606070BD38B5BE -:1032A000934C20680168497801291FD001216846A4 -:1032B000F8F7C3FE684600789349000207F02AFE3B -:1032C0002068426AC06812685118F9F7AAFE21689E -:1032D000C8608C4822680321824202D0108B0A28E1 -:1032E00010D2108B401C108351720DE07D21C068FC -:1032F000C900F9F796FE2168C86004F025FD216831 -:103300000861E6E702205072117200231371107FEA -:10331000D47E111D957EAC4202D0FAF767F838BD15 -:10332000D37693761360536238BDF8B5704C05467A -:103330001F27EE7E042E2DD230007844007900182D -:103340008744312801237148854203D0664970487B -:1033500007F001FF02202560A87600E020BF216869 -:10336000C87E002803D0CA7E887E8242F6D0CA7EFC -:10337000002A04D000228A760C27226010E0002266 -:103380008A760A604A6222600DE00120FFF708FC9D -:10339000074603E054495F4807F0DDFE002F02D0E6 -:1033A000E87EB042C5D1E87E002803D04E495A4895 -:1033B00007F0D1FEF8BDF8B54D4D01286A68516A95 -:1033C0000C6846D10879554940000B5A1068077DB2 -:1033D0000126032F06D0027D022A13D0007D01288A -:1033E00024D036E00027076110688760942000969B -:1033F000025BC420005D4000085AC01881B23B4601 -:1034000003201EE022468032D78C07610096C4203C -:10341000005D928A4000085AC01881B20023022041 -:10342000FFF717F8696809680E750CE0942000969C -:10343000025BC420005D4000085AC01881B200231E -:103440000120FFF706F8002803D02749344807F089 -:1034500082FEF9F79FFA29480078EEF755FF696870 -:10346000002008830B68228D5A86096820318875F0 -:10347000F8BDF8B51E4D002168680C46006842781A -:10348000002A01D0447027E00078002809D00121EB -:103490006846F8F7F7FD684600781B49000207F018 -:1034A00039FD6868426AC06812685118F9F7B9FDB9 -:1034B0006A68D060147103205072107FD37E111D92 -:1034C000967EB34202D0F9F791FF03E0D47694766A -:1034D0001460546268680483F9F75CFA074800785E -:1034E000EEF712FFF8BD0000C42C010056070000E3 -:1034F000A8000020B800002003070000A000002062 -:103500009D070000E013002010270000B8130020E2 -:1035100007020000130200001902000034B4010089 -:10352000BC060000F8B50024E948FEF73EFE00287E -:1035300025D1E84FC02026464643F51901462846C6 -:1035400007F0DEFC0120B8556C80E34900200870CC -:10355000E24A4A8080356962E149641C0870A962C8 -:10356000E049E4B208704A80A963032CE2D3D8484A -:10357000FEF733FED648FEF718FE002801D00C20D7 -:10358000F8BDFF211931D84807F0BAFCD64801210F -:1035900001704480D5490020087208750877D44925 -:1035A0008872CB48FEF719FE0020F8BD10B5C84858 -:1035B000FEF7F3FD002803D0CEA1282007F0CBFDB5 -:1035C000C348FEF7EAFD002803D0CAA12D2007F06A -:1035D000C2FDFFF7A7FF002803D0C6A1332007F0E4 -:1035E000BAFD10BD10B50446B948FEF7DEFD00284F -:1035F00001D00C2010BDBC490878002807D000205D -:103600000870B3482160FEF7E8FD002010BDB04807 -:10361000FEF7E3FD1F2010BD70B505460C46AC4813 -:10362000FEF7C3FD002801D00C2070BDAE4A5088C3 -:10363000A84202D11078002804D0A548FEF7CDFD9D -:10364000122070BDA2482260FEF7C7FD002070BDA9 -:1036500010B504469E48FEF7A8FD002801D00C20B6 -:1036600010BDA1480178002907D00020C043208068 -:103670009748FEF7B2FD122010BD40882080944884 -:10368000FEF7ABFD002010BD10B504469048FEF7D4 -:103690008CFD002801D00C2010BD2078002804D01B -:1036A0008B48FEF79AFD0C2010BD01202070884841 -:1036B000FEF793FD002010BD10B504468448FEF7C8 -:1036C00074FD002801D00C2010BD824A0021C020CA -:1036D0004843105C00280AD0C023002059435054AE -:1036E000881820607A48FEF778FD002010BD491C3C -:1036F000C9B20329EBD37648FEF76FFD1F2010BD3A -:10370000032805D2C0225043724A135C002B01D01B -:1037100012207047801808600020704710B5002202 -:103720000C46032809D2C02148436A490B5C002B90 -:1037300014D122704018606018E003280ED164484C -:10374000FEF733FD002809D167484188032902D1DB -:103750000178002904D05E48FEF73FFD122010BD1D -:1037600060605B48FEF739FD01202070002010BD2D -:1037700010B504465648FEF718FD002801D00C206D -:1037800010BD2088534A032804D2C0214843105C4E -:10379000002801D00020208000202188491C89B207 -:1037A0002180032900D300212180C0235943515C8B -:1037B00000290BD0401CC0B20328EED30020C04328 -:1037C00020804348FEF709FD122010BD4048FEF757 -:1037D00004FD002010BD70B505460E463C48FEF7BE -:1037E000E4FC002801D00C2070BD2888341D03287B -:1037F00004D303D0A04201D3002028800020361D2E -:103800001DD0394B33492A88521C92B22A80A242D9 -:1038100000D300222A80042A02D3A24217D301E057 -:10382000032A05D0C02672438A5C002A0FD002E02A -:103830001A78002A0BD0401CC0B2A042E3D300206B -:10384000C04328802248FEF7C8FC122070BD2048E3 -:10385000FEF7C3FC002070BD10B504461C48FEF7FF -:10386000A4FC002801D00C2010BD2078002804D032 -:103870001748FEF7B2FC0C2010BD01202070144840 -:10388000FEF7ABFC002010BD10B504461048FEF753 -:103890008CFC002801D00C2010BD217801200029CB -:1038A00002D0012905D008E061680A78002A09D011 -:1038B00003E061680A78002A04D00548FEF78DFC11 -:1038C0000C2010BD08700248FEF787FC002010BDD8 -:1038D000C00000205814002098160020FFFF0000B0 -:1038E000C1000020C6160020D8160020B8170020FE -:1038F000D81700207372635C6C6C5F64622E630087 -:1039000010B5282107F0FAFA10BD70B50546007809 -:103910000A0700090001120F1043287007290ED270 -:10392000080078440079001887440305030503075D -:103930000300062408E00C2406E0222404E000240E -:10394000F8A1572007F007FC687880098001204320 -:10395000687070BD00780007000F704710B5C01C7C -:1039600007F0F5FC10BD0A4610B5C11C104607F063 -:10397000EEFC10BD10B5093007F0E9FC10BD02786F -:10398000BF23C9071A40490E0A43027070470078E6 -:103990004006C00F704702785206520EC9010A4312 -:1039A0000270704770B50C460546C11C20460930B0 -:1039B00007F0CDFC20784006400E2070297849069B -:1039C000C90FC9010843207070BD70B515460E4679 -:1039D00004461F2A03D9D3A1A82007F0BCFB204628 -:1039E0002A463146093007F02CFA6078AD1D80096F -:1039F0008001A906890E0843607070BD70B5054648 -:103A000040780E468406A40E062C03D2C5A1B82029 -:103A100007F0A1FBA41FE4B21F2C00D91F242946E4 -:103A200022460931304607F00CFA204670BD70B5C9 -:103A300015460E4604461F2A03D9BAA1CC2007F02A -:103A40008AFB20462A463146093007F0FAF96078A9 -:103A5000AD1D80098001A906890E0843607070BD04 -:103A600070B5044640780E468506AD0E062D03D28D -:103A7000ACA1DD2007F06FFBAD1FEDB21F2D03D908 -:103A8000A8A1E12007F067FB21462A46093130460C -:103A900007F0D7F9284670BD0A78C2734A780274D5 -:103AA0008A784274C978817470470A78C2744A78F7 -:103AB00002758978417570474176090A81767047A9 -:103AC000C176090A017770474177090A8177704703 -:103AD000C175090A017670478175704720300279F7 -:103AE000C90652095201C90E0A43027170472030BB -:103AF0000279D206D20E49010A430271704710B50D -:103B00001F3007F019FC10BD417800788906890E36 -:103B10000007000F06D0012808D0022809D0062887 -:103B200010D10AE0891F1F290AD90BE00C2907D000 -:103B300008E0891F1F2903D904E0891F1F2901D824 -:103B400001207047002070474178007889060007FF -:103B5000890E000F042805D1062903D3252901D891 -:103B6000012070470020704770B401780907090FE1 -:103B700003292ED0052931D1411C827E0C46437E7B -:103B800011021943037FC27D1D02037EC67E1B0204 -:103B90001343827D407835438006800E22281DD154 -:103BA00006291BD31920C001814217D8FF26F436FD -:103BB000B54213D8002A11D0082A0FD88A420DD254 -:103BC0008B420BD8617F227F09021143814208D9C1 -:103BD00004E040788006800E0C2802D070BC0020E3 -:103BE000704770BC0120704710B5222107F086F99C -:103BF00010BD10B502788B07920892009B0F1A43F4 -:103C000002704278520952014270012908D00229FB -:103C100006D0032905D0FF2042A1E83007F09BFA27 -:103C200010BD01210A43427010BD10B502788B0708 -:103C3000920892009B0F1A43027042785209520177 -:103C40004270012907D0022905D0032904D035A1EB -:103C5000384807F080FA10BD01210A43427010BDB8 -:103C600000788007800F70470278EF23C9071A4059 -:103C7000C90E0A43027070474178C078C906C90E60 -:103C80000E2835D202007A44127992189744060918 -:103C90000C0F1215181B1E2124272A2D0C2929D0A0 -:103CA0002AE0082926D027E0022923D024E017297A -:103CB00020D021E00D291DD01EE001291AD01BE0E3 -:103CC000012917D018E0022914D015E0092911D0D4 -:103CD00012E009290ED00FE001290BD00CE00129D8 -:103CE00008D009E0062905D006E0022902D003E049 -:103CF0001B2901D8012070470020704770B5054688 -:103D0000C1700E2926D20800784400790018874433 -:103D100006131517191B1B151D1D1B1B1F150C2426 -:103D20001DE000007372635C756C5F7064752E63D8 -:103D30000000000001020000082410E002240EE050 -:103D400017240CE00D240AE0012408E0092406E011 -:103D5000062404E000249A499A4807F0FCF96878A0 -:103D6000400940012043687070BDC0787047C17140 -:103D7000090A01727047017AC2790802104370473C -:103D80004172090A81727047817A427A08021043AF -:103D90007047C172090A01737047017BC27A080239 -:103DA000104370474171090A8171704781794279E6 -:103DB00008021043704701717047007970474173E2 -:103DC000090A81737047817B427B08021043704768 -:103DD00070B4017AC37909021943431C857A1C46E1 -:103DE000467A2B023343657926792C023443C21C70 -:103DF000754E00798D1FB54215D8FF25F435AB42BD -:103E000011D800280FD008280DD888420BD28C4238 -:103E100009D8507A117A00020843B11D884202D8AD -:103E200070BC0120704770BC0020704710B5001DA9 -:103E300007F082FA10BD0A4610B5011D104607F0C2 -:103E40007BFA10BD4172090A81727047817A427A09 -:103E5000080210437047017170470079704710B530 -:103E6000001D07F081FA10BD0A4610B5011D10466D -:103E700007F07AFA10BD0A780273497841737047E7 -:103E8000027B0A70407B4870704710B50E3007F017 -:103E90006BFA10BD0A46014610B50E31104607F008 -:103EA00063FA10BD0A7882754A78C2758A780276FC -:103EB000C97841767047827D0A70C27D4A70027E61 -:103EC0008A70407EC870704710B5001D07F04CFA2C -:103ED00010BD0A4610B5011D104607F045FA10BD89 -:103EE0000A7802734A7842738A788273C978C173F8 -:103EF0007047027B0A70427B4A70827B8A70C07B6B -:103F0000C8707047017170474171090A817170472B -:103F1000C171090A0172704700797047817942794D -:103F2000080210437047017AC279080210437047B3 -:103F300001717047007970470171704710B5001D1D -:103F400007F012FA10BD0A4610B5011D104607F021 -:103F50000BFA10BD10B5001D07F006FA10BD0A4699 -:103F600010B5011D104607F0FFF910BD70B51546DC -:103F70000E4604461B2A03D91149144807F0EBF8F2 -:103F80002A463146E01C06F05CFF6078E9064009ED -:103F90004001C90E0843607070BD70B50546407899 -:103FA0000E46C406E40E1B2C03D90549084807F049 -:103FB000D2F82246E91C304606F043FF204670BD89 -:103FC000243D0100A10200007A0C0000F103000072 -:103FD000FD03000070B504460020A083208C1E461F -:103FE00048431546114606F0A3FF2084F0002946F9 -:103FF00006F090FF401C80B20146192269439202EC -:10400000E083914201DD401EE0837D2029460002CD -:1040100006F080FF401CA08470BD70B50A7BD206FC -:10402000D20E0A73002282758B181B7ADC075B089C -:10403000DD07E40FED0F2C195B08DD07ED0F2C19E0 -:104040005B08DD07ED0F2C195B08DD07ED0F2D195F -:104050005C08E307DB0F5B196508EC07E40FE41865 -:104060006B081B1984186374847D521CE318D2B248 -:104070008375052AD8D3D8B2252803D9E1A18A208F -:1040800007F069F870BD70B504460B462546264614 -:10409000214600202835C0368031032B0AD0002B62 -:1040A0003AD0012B41D0022B03D1A11C2846FFF7A7 -:1040B000B4FF70BD2880A871E871E8722873687336 -:1040C000A873A870E870287168716876A8832B4679 -:1040D00068842033987128859872E8752876E8738B -:1040E0002874D872187398731A752884FF22603563 -:1040F000AA709875088248828882C882088348839B -:104100004877C884A4221055088748872421085579 -:1041100060843070B07170BDC8848877A1882389AD -:104120000A462846FFF756FFBFE7C884F38A728A1B -:10413000A1882846FFF74EFF70BD70B504460346C0 -:1041400028348033054603290AD0002933D00129B9 -:1041500038D0022903D1A91C2046FFF75EFF70BDAD -:1041600000202080A071E071E07220736073A07362 -:10417000A070E070207160716076A0832146608439 -:104180002031887120858872E0752076E073207474 -:10419000C872087388730A752084FF226034A27085 -:1041A00088751883987618742421586148551877B3 -:1041B000A035287370BDA9882B890A462046FFF7D1 -:1041C00009FFC8E7586AA988C38942892046FFF7D2 -:1041D00001FF70BD70B5867D0D460446002E01D0EE -:1041E000252E01D9122070BD002A18D0287EE17D2D -:1041F00050430818252106F08DFEE1750846CA08CF -:104200004907490F834BAA18595C127A914308D089 -:10421000314606F07FFE491CCAB200200AE00020A9 -:1042200070BD2076002070BD002803D02118097CC5 -:10423000511ACAB22118497C91423AD32918097AF5 -:10424000C943CB07DB17D21A521E1206120E35D005 -:104250008B07DB17D21A521E1206120E32D04B07F2 -:10426000DB17D21A521E1206120E30D00B07DB17C4 -:10427000D21A521E1206120E2ED0CB06DB17D21AFD -:10428000521E1206120E2CD08B06DB17D21A521EAB -:104290001206120E2AD04B06DB17D21A521E120635 -:1042A000120E28D00906C917511A491E0A06120E05 -:1042B00026D0401C0528B7DB1F2070BDC00020762B -:1042C000002070BDC000401C2076002070BDC000E2 -:1042D000801C2076002070BDC000C01C207600200D -:1042E00070BDC000001D2076002070BDC000401DC4 -:1042F0002076002070BDC000801D2076002070BD9B -:10430000C000C01D2076002070BD70B50D4604466B -:10431000072904D9FF203BA15D3006F01CFFE0789F -:10432000502108406907490F88300843E070A078A1 -:10433000A72108401830A07060785E210840203026 -:1043400060702078BC2108404030207070BD017939 -:10435000490901D000207047002230B41146445C66 -:10436000491CE3076408E507DB0FED0FEB18640851 -:10437000E507ED0FEB186408E507ED0FEB1864088F -:10438000E507ED0FEB186408E507ED0FEB1864087F -:10439000E507ED0FA407EB18E40FE318D218D2B22B -:1043A0000529DCDB002A02D030BC0120704730BC7C -:1043B0000020704738B505460C466846FCF74EF8B5 -:1043C00000281ED069460020085620720921615637 -:1043D0000022411A00D549422035EB788B420FDC90 -:1043E000FF2B0DD0A17A491CC9B2A1722B79994239 -:1043F00002D8617A7F2903D160720020A072012265 -:10440000104638BD7372635C6C6C5F7574696C2E9A -:104410006300000044B40100F8B50024F74EFF200B -:10442000B470F0702546F64F06E0042D04D3FF204B -:10443000F4A1AB3006F08FFEFF212846A03148439F -:10444000FF213331C0194A1C0C540146FF3114546A -:1044500021310C754C75F178A94202D1B470FF215D -:10446000F170FF219D314A1C6D1C0C54EDB21454A7 -:10447000042DDAD30020FF21A0314143C919FF31B7 -:1044800081318C77401CC0B20428F4D3E048FFF798 -:10449000ABFB0021DE48FFF7E7FB0121DC48FFF71B -:1044A000A8FBDC49FF20087048708870C87008714C -:1044B0004871F8BDB0E71B20704710B4D04A002106 -:1044C000FF23A0334B439B18FF3381339B7F002B8B -:1044D00004D0491CC9B20429F2D30DE004290BD23F -:1044E000FF23A0334B439A180124FF328132947783 -:1044F0000170204610BC704710BC0020704730B4DB -:104500000025042825D2FF220146A0325143BC4A8F -:1045100089180B46FF3381339A7F002A19D0FF2474 -:104520003334621C655455541A46603A15755575F6 -:10453000B24AD478844202D19570FF20D070FF2017 -:104540009D304554FF319E310D709D7730BC012068 -:10455000704730BC0020704704280ED2FF2201466D -:10456000A0325143A64A8918FF318131897F002941 -:1045700003D0A8494871012070470020704710B44B -:10458000A449FF224979A03251439D4A82B089183B -:104590000A46FF322132937C6C462370D27C227112 -:1045A000237822795A40802A0AD022782223520680 -:1045B000520E5A435118016002B010BC01207047DE -:1045C00002B010BC002070479248FF214079A03112 -:1045D00048438B4981B041180846FF303330FF31E2 -:1045E0002131CA7C69460A7003780922097859404A -:1045F00080290ED0037869460B7009784906490E68 -:10460000491C914208D26A461178491CC9B21170FE -:1046100009E0002001B0704769460978090601D514 -:10462000002100E080210170012001B070470428C2 -:104630000ED2FF220146A0325143714A8918FF3140 -:104640008131897F002903D07249087101207047A8 -:104650000020704710B46F49FF220979A0325143FE -:10466000674A82B089180A46FF322132947C6B4631 -:104670001C71D27C1A701C781A7994420AD01A786C -:1046800022235206520E5A435118016002B010BC48 -:104690000120704702B010BC0020704738B55D485B -:1046A0000179FF20A0304143554808180146FF31E9 -:1046B00021318A7C6C4622700922FF303430037825 -:1046C0002478A34223D004786B461C701B785B06C9 -:1046D0005B0E5B1C934205D26B461A78521CD2B219 -:1046E0001A7006E06A461278120601D5002200E030 -:1046F00080220270087D401C0875087D497D884233 -:1047000003D140A1444806F026FD012038BD002019 -:1047100038BD4048FF210079A0314843384940184E -:10472000FF302130C17C807C814201D10120704763 -:10473000002070473748FF210079A03148433049B5 -:104740004018FF302130817CC27C092013464B4049 -:10475000802B0AD049065206490E520E914201D3CF -:10476000881A01E0511A401AC0B2704709207047F8 -:104770000022042813D2FF23A0335843204BC01833 -:10478000FF239F331B5C002B09D0FF300A702130C0 -:10479000027D437DD31A0B704275012070470020C3 -:1047A0007047042811D2FF22A0325043144A8018C7 -:1047B000FF229F32125C002A07D0FF302130027D99 -:1047C000407D101A08700120704700207047104982 -:1047D0000160704704280ED2FF220146A0325143E7 -:1047E000074A8918FF318131897F002903D009499F -:1047F000087001207047002070470000101800204A -:10480000141800207372635C646D5F712E63000086 -:10481000901E0020C70000205A020000AC49CA7850 -:10482000FF2A03D000210160084670478A78A94911 -:10483000012A02D001600120704700207047A6487D -:104840000178012907D001210170A4480178A0480E -:10485000C170012070470020704704280ED2FF224B -:104860000146A03251439E4A8918FF318131897F28 -:10487000002903D0994948700120704700207047F3 -:104880009349964BCA785B789A4206D18A78203948 -:10489000002A02D0016001207047002070478C4838 -:1048A0008E4AC1785278914209D1FF21C170801C93 -:1048B0000178002903D000210170012070470020F9 -:1048C00070478348854AC1785278914204D18078F4 -:1048D000002801D0002070470120704704280ED224 -:1048E000FF220146A03251437D4A8918FF318131B0 -:1048F000897F002903D07949C870012070470020C2 -:10490000704710B47549FF22C978A0325143744AE8 -:1049100082B089180A46FF328132147F6B461C70C0 -:10492000527F1A711C781A79FF3162403731802A20 -:104930000AD01A7822235206520E5A4351180160A7 -:1049400002B010BC0120704702B010BC00207047BC -:104950006248FF21C078A0314843614981B04118C5 -:104960000846FF309D30FF3181314A7F69460A7029 -:10497000037803220978594080290ED003786946CC -:104980000B7009784906490E491C914208D26A46C3 -:104990001178491CC9B2117009E0002001B07047BC -:1049A00069460978090601D5002100E080210170DF -:1049B000012001B070474948FF21C078A031484329 -:1049C00047494018FF308130417F007F814201D14B -:1049D000012070470020704704280ED2FF220146B4 -:1049E000A03251433E4A8918FF318131897F002925 -:1049F00003D03A498870012070470020704710B4F6 -:104A00003649FF228978A0325143354A82B089184D -:104A10000A46FF328132147F6B461C71527F1A7036 -:104A20001A781B79FF3137319A420BD06A461278D7 -:104A300022235206520E5A435118016002B010BC94 -:104A40000120704702B010BC002070472348FF21AE -:104A50008078A0314843224981B04018FF219D3120 -:104A6000095C6B4619700321FF309E3002781B7879 -:104A70009A4219D003786A46137012785206520E81 -:104A8000521C8A4205D26A461178491CC9B211707B -:104A900006E069460978090601D5002100E0802179 -:104AA0000170012001B07047002001B070470B4831 -:104AB000FF218078A031484309494018FF308130F8 -:104AC000417F007F814201D1012070470020704763 -:104AD00010180020F017002012180020C700002036 -:104AE00014180020F8B5FD4F0A46044600207978D6 -:104AF000FB4D0646002902D0012909D00FE0F949F3 -:104B0000497A00290BD0002A08D10120787005E0ED -:104B1000A97F002903D0002A00D17E700120797876 -:104B20002B23594349198B7F034311D0002A22D1EB -:104B30002A22A01C1F3106F084F966700420207020 -:104B40000120A07078782B2148434019867712E025 -:104B50002878012801D00020F8BD002A0BD166700A -:104B6000132020701C22A91CA01C06F06AF9A67153 -:104B70002E70DD48C6770120F8BDD948017800299C -:104B800001D080887047D9487047F8B5D44E0746A1 -:104B9000B07F00282DD13846FEF7DCFE002101252C -:104BA000D34C072824D202007A44127992189744F1 -:104BB0000305081F1F1F0A00217006E025702172DF -:104BC00008E0032000E002202070CA493846FEF7C2 -:104BD00015FF20723846FEF7DAFE6070C649384687 -:104BE000FEF7C1FEBD4CC54F20787F2807D101E0FC -:104BF0002172F8BDFF20C2A1543006F0ACFA207833 -:104C000038707F202070B577032002F0E7FEF8BDF2 -:104C100010B5002002F072FE002812D0FBF79CFBBA -:104C200000210120FBF7A0FABA48FBF7ACFBAE4C21 -:104C3000A06AFBF7ABFB2079032805D0022803D03C -:104C400006E000F0F3FD10BD01210020FBF716FC8B -:104C5000FBF7FBFBB04C6078002803D0FBF77DFF2F -:104C6000FBF7D9FB0320E07010BD70B59E4900280A -:104C7000CA8D08D0FF2A0DD25004000CC885FF2829 -:104C800008D9FF2005E0012A04D95008C88501D1C0 -:104C90000120C88591484268012A01D0002A01D12B -:104CA0000D224260D24317239B4C5A43637B3B2522 -:104CB000DB436B43D2184260C98D900C06F02AF991 -:104CC000617370BDF8B5944CE078022804D0E078A8 -:104CD000012801D00C20F8BD0020814A05462B2177 -:104CE000414389188D77401CC0B20228F7D3157054 -:104CF0006078002804D0FBF796FBFBF73FFF657058 -:104D0000794845778577C5778449257001228A7768 -:104D10000571A570CA760A774A77714E0146324608 -:104D2000736F7432B46FF66FD7688B60CC600E61AE -:104D30004F6112698A6105770020F8BD10B5764A87 -:104D40000023D3701371684B596318630120D0702E -:104D5000FFF7B8FF002803D069A1714806F0FBF9FE -:104D600010BDF1B582B00C2001906B480090C07866 -:104D7000012806D00098C078022802D00C2003B089 -:104D8000F0BDFBF7F0FA0020FBF7B1F8564C207F9E -:104D9000002837D0524920460F4682687437C368CE -:104DA000056946694A678B67CD67FE60806938612F -:104DB00000266677A677594DE87E002805D1287F22 -:104DC000002802D1687F00281AD0009800780028B7 -:104DD00016D02079032802D0022805D008E005214A -:104DE000504800F040FD03E003214E4800F03BFD39 -:104DF000A97E3846FBF7F3F80020019026770CE0F7 -:104E0000267703E00098C078022804D00098C07884 -:104E1000022828D00AE0002001900098C0780128DC -:104E200004D10099087300980221C170606B017869 -:104E3000002903D00178001DFBF714F9206B0178DD -:104E4000002906D0384A401CFBF777FE0099012064 -:104E500048700298A0623548FBF717FAFBF78EFA04 -:104E6000019803B0F0BD00990120C8700C2003B078 -:104E7000F0BD70B5FBF777FA274CE078022803D035 -:104E8000FBF77CFA0C2070BD012017496073C885C0 -:104E90000220FBF765FA2648FBF739F9254E002575 -:104EA000A0780321401C06F035F8A170885D012828 -:104EB00044D06D1CEDB2032DF2D3FFF7A9FE20798B -:104EC000002809D0012807D002283DD003283BD074 -:104ED0000BA1194806F03FF9002070BDD00000205A -:104EE000B41E0020F41E0020341F0020FFFF00002D -:104EF000D41E0020DD1E0020D61E0020FC1E002037 -:104F00007372635C6C6C5F64645F7363616E2E6369 -:104F1000000000006C1F0020541F0020141F002000 -:104F200051030000941F00206F1F00204CB40100AB -:104F300052B401002F1F0020EA030000C8B2FC4950 -:104F4000085CFBF7F6F8B8E7EEF762F8C4E770B56F -:104F5000F84C0125A577E37F002B01D03A2070BDE6 -:104F60000026002802D1A07B884209D1A173667770 -:104F70001146F14806F0EBF96577F04805702577A2 -:104F8000A677002070BD024600200123E949002ACF -:104F900003D0012A03D0122070478B7400E088747C -:104FA0000B774A767047E34A032800D151611076A7 -:104FB0000120107700207047E049012803D0032822 -:104FC00001D0002000E0012008717047D948017F1E -:104FD000002903D0407E002803D170474079002883 -:104FE000FBD00120704710B5FBF709FAFBF7FCF97D -:104FF000FBF708F9FBF7AAF9D04C6078002805D038 -:10500000FBF711FAFBF7BAFD002060700120207356 -:105010000220E070FBF7B2F9002010BDC7494871CB -:10502000704710B500F002FC10BDF0B5C44EC34D82 -:1050300083B0002810D0C348FEF766FD002804D1D5 -:10504000C048FEF781FD002806D0BA4C207903281D -:105050000DD1A07F00280AD0E87805286BD2010086 -:105060007944097949188F44666666F7F600E8784E -:1050700005287AD201007944097949188F44757559 -:105080007502EE00AF48FEF765FCAD498870AE488A -:105090000190807F002803D1FBF736F8002800D06C -:1050A000012000906878002813D00526761EF6B2FD -:1050B000FBF785FD0746022805D1002EF6D1A3494E -:1050C000A34806F048F80098002810D1012F0ED010 -:1050D00000909B4F9F4EB878072871D20100794409 -:1050E000097949188F446DFE056C6C6C280001200D -:1050F000EEE76878002803D0FBF795F9FBF73EFD53 -:105100008F48FBF7ABF9002801D17F203870FBF7FF -:1051100093F9009800280AD02079012801D00228AC -:1051200005D1FBF76FF88748FFF72FFD37E2FBF754 -:1051300069F8FFF76DFD34E26878002803D0FBF7CB -:1051400072F9FBF71BFD7E48FBF788F9002801D1B7 -:105150007F203870FBF770F90098002879D020790B -:10516000022803D001287AD047E221E27548FFF7F0 -:105170000CFD012002F0C2FB00286ED07649714878 -:10518000FEF710FC7448FBF7FEF8607F00280ED095 -:105190006848019902898A824289CA828089088383 -:1051A00031466D48FEF7DAFB00206077A0770121D9 -:1051B0000846FBF763F9FBF703F90520E870F0E117 -:1051C0005BE16878002803D0FBF72DF9FBF7D6FCEC -:1051D0005B48FBF743F9002801D17F203870FBF7CB -:1051E0002BF90098002834D02079022808D0012813 -:1051F00035D0032837D05549584805F0ACFFD0E1E9 -:105200005048FFF7C2FC012002F078FB002824D0B0 -:1052100051494C48FEF7C6FB4F48FBF7B4F8607F96 -:1052200000280ED04348019902898A824289CA82A5 -:105230008089088331464848FEF790FB002060775C -:10524000A07701210846FBF719F9FBF7B9F805200B -:1052500001E10EE103E0BFE1ADE1B3E022E1394855 -:10526000FFF793FC9BE137482168C2780B7F9A4295 -:105270001DD102794B7F9A4219D142798B7F9A4294 -:1052800015D18279CB7F9A4211D10A462032C37957 -:105290001778BB420BD1037A5278934207D100783A -:1052A000CA7E4006C00F904201D1012000E00020DC -:1052B0006279012A30D0002800D138E7022002F0BC -:1052C0001DFB00287ED0012002F088FB22491D48EA -:1052D000FEF768FB2068018B1F48FEF7F9FB20688A -:1052E000817D00E03CE01C48FEF7F6FB1A48FBF726 -:1052F0004AF8607F002866D00E48019902898A82A8 -:105300004289CA828089088331461348FEF726FB0A -:1053100000206077A0779BE00028CFD109481C319E -:10532000FEF721FB0748FEF732FB2168C876C5E788 -:105330004FB40100341F00203C1F0020541F0020E8 -:10534000D00000206C1F0020141F0020004F01001F -:10535000D4040000281F0020941F0020CC0500006A -:105360006878002803D0FBF75EF8FBF707FCF948E4 -:10537000FBF774F8002801D17F203870FBF75CF848 -:105380000098002875D0FAF733FE002871D02079F4 -:105390000328F14804D0FFF7F8FBFAF733FFFEE0EB -:1053A0002168C2780B7F9A4220D102794B7F9A42C2 -:1053B0001CD142798B7F9A4218D18279CB7F9A4255 -:1053C00014D101E056E043E00A462032C379177851 -:1053D000BB420BD1037A5278934207D10078CA7E40 -:1053E0004006C00F904201D1012000E00020627908 -:1053F000012A32D0002800D199E6022002F07EFA7C -:10540000002837D0012002F0E9FAD449D248FEF74B -:10541000C9FA2068018BD148FEF75AFB2068817DCC -:10542000CE48FEF759FBCD48FAF7ADFF607F002864 -:105430000ED0CB4901980A8982824A89C282898921 -:1054400001833146C548FEF789FA00206077A077CE -:105450000120E0770620E870A3E00028CDD1BE4807 -:105460001C31FEF780FABC48FEF791FA2168C87635 -:10547000C3E7C2E000F0DAF993E06878002803D0CF -:10548000FAF7D1FFFBF77AFBB248FAF7E7FF0028FB -:1054900001D17F203870FAF7CFFFFAF7B3FEFFF79C -:1054A000B7FB7EE0AC48FEF755FAB070AA48AB49AE -:1054B000C3784A7A93421CD103798A7A934218D1ED -:1054C0004379CA7A934214D183790A7B934210D1EB -:1054D000C3794A7B93420CD1037A8A7B934208D1E9 -:1054E000007809784006C00FC909884201D101241B -:1054F00000E00024FAF786FEB07804283ED1002CA4 -:105500003CD09448FAF7AAFF002801D17F203070E0 -:10551000FAF792FF287B002802D00020FFF7A5FBB6 -:105520000120904C28738C4F607A002837D10420DA -:10553000E0723846FEF72BFA002801D0012800D18E -:10554000207389493846FEF70EFA88493846FEF737 -:1055500087FAE0741F2801D91F20E0743078844F47 -:105560007F2804D1FF208349543005F0F4FD3078C2 -:1055700038707F2030700120607210E07548FAF7B3 -:105580006DFF002801D17F203070FAF755FF287B8E -:10559000002802D10120FFF768FB00202873FFF7E5 -:1055A00037FBE87802283DD0E87804282DD127E0A1 -:1055B0007049714821E66878002803D0FAF733FF74 -:1055C000FBF7DCFA6348FAF749FF002801D17F2096 -:1055D0003070FAF731FF10E05E48FAF73FFF00281D -:1055E00001D17F203070FAF727FF287B002802D1F5 -:1055F0000120FFF73AFB00202873FAF703FECEE7FD -:1056000037205C49400105F0A6FD2879002809D023 -:1056100001280ED0022807D0032810D0554957483A -:1056200005F099FD03B0F0BDE878032807D003B07A -:10563000F0BDE878062802D0E8780528F7D10120E7 -:10564000FAF7D2FF03B0F0BD70B54D4CE0780728F3 -:105650005FD201007944097949188F445A5A5A5A3D -:105660005A030B003C48FAF78EFEFAF7EEFE0420D0 -:10567000E07053E0FAF7C3FEFAF7B6FEFAF7C2FDA0 -:10568000FAF764FE012626730220E070FAF776FE30 -:105690003C4D2878002803D036493B4805F05BFD97 -:1056A0000020A8702E4800684188A980C17EE97159 -:1056B000818B2981C18B6981018CA9818188E982D3 -:1056C000C188298300896883607928772F48304909 -:1056D000807EA8732F4805F03AFE6078002803D03A -:1056E000FBF76DFA012808D0687F40084000687712 -:1056F0002E70022002F072F910E0687F3043687764 -:10570000FBF776FA697F4000C907C90F0143697743 -:10571000EEE775201749000105F01DFDE07802282D -:1057200016D0E078032806D0E078042803D0114989 -:10573000194805F010FD2079002809D0012807D06C -:1057400002282DD003282BD00A49144805F003FD68 -:1057500070BD0000D00000206C1F0020941F0020AE -:10576000341F0020F41E0020011F0020081F00200D -:10577000271F0020004F01009E060000F5060000D4 -:10578000541F0020B41E002029070000141F002011 -:10579000281F0020C31E00205607000062070000DB -:1057A0000120FAF721FF70BD10B55C4CE0780528A8 -:1057B00020D201007944097949188F441B1B1B1919 -:1057C00002005748FAF74AFE002802D154497F20C8 -:1057D0000870FAF731FE207B002802D10120FFF784 -:1057E00044FA00202073FAF70DFDFFF711FA01E0EB -:1057F00000F01CF8E078022813D0E078032803D0EA -:105800004849494805F0A7FC2079002809D001281B -:1058100007D0022806D0032804D04249434805F0A7 -:105820009AFC10BD0120FAF7DFFE10BD10B5FAF7A3 -:10583000E6FDFAF7D9FDFAF7E5FCFAF787FD374CF4 -:105840006078002805D0FAF7EEFDFBF797F9002005 -:105850006070012020730220E070FAF78FFD0020B5 -:1058600002F0BCF810BD70B5314C054626466036D6 -:105870007434032943D0052940D1FEF741F80521AE -:105880002846FEF742F8B17E2846FEF778F8214612 -:105890002846FEF763F8274C284621680F31FEF7AB -:1058A000FBF8216828461331FEF7FFF82068817D58 -:1058B0002846FEF711F92068018B2846FEF708F903 -:1058C000206881882846FEF7F7F82068C1882846B6 -:1058D000FEF7F6F8206801892846FEF7F5F82168FA -:1058E00028460A31FEF70BF92068817E2846FEF72C -:1058F000F5F80A4841792846FEF7F9F870BDFDF73A -:10590000FFFF03212846FEF700F8B17E2846FEF788 -:1059100036F821462846FEF721F870BD541F0020B6 -:10592000D0000020004F010099070000A5070000EB -:10593000B41E0020341F0020F8B5FEF7FBFE04461D -:10594000FEF7BFFFF74E0546F0682030407B002889 -:1059500026D0012867D0022869D0032871D0FF2003 -:10596000F1A1793005F0F7FB3069F7220178114099 -:105970000170F2682032937BDB071B0F1943FB2376 -:1059800019400170D37BDB075B0F19430170577B14 -:10599000EF23022F60D0012F63D0032F65D06AE080 -:1059A000E548FEF76DFF002827D030690090F168C8 -:1059B000088DC9884018801D87B20098FEF7D5F978 -:1059C000012805D00098FEF7D0F9002808D00FE094 -:1059D000F06839468030C7850098FEF733FA07E053 -:1059E000F06839468030406A87800098FEF7E7F912 -:1059F000F168032020314873B6E7CF48FEF72AFE4E -:105A0000002804D0F0685321095C002907D0CA4857 -:105A1000FEF7DDFEF168012020314873A4E7022182 -:105A200020304173A0E7C448FEF7D1FE9CE7C2488E -:105A3000FEF710FE002897D1FF20BBA16B3008E0D5 -:105A4000FFE7BD48FEF71CFF00288DD1FF20B6A15F -:105A5000733005F080FB87E7012C08D8002D06D0B5 -:105A600009E06D1E2C4302D105E0002C03D0194043 -:105A70001023194300E019400170D17D002915D091 -:105A8000517B012912D0AD48FAF77DFCAC480121C9 -:105A90000176F268116E526E42610161A749326966 -:105AA000FAF7D7FF0020FAF7E3FF03E0FAF76BFC01 -:105AB000FBF701F801210846FAF7E0FC03203070FB -:105AC000F8BD08282FD203007B441B79DB189F44C4 -:105AD00003060B0E11152528002926D023E00229E4 -:105AE00023D0032921D01EE007291ED01BE008295E -:105AF0001BD018E00A390B2917D914E00D2914D04E -:105B00000C2912D0002A04D00D290CD315290CD948 -:105B100009E0112907D3152907D904E0092904D080 -:105B200001E0012901D0002070470120704730B505 -:105B3000054683B08048FEF771FE002803D17AA1A4 -:105B4000804805F008FB774C2069FEF74DF80321EB -:105B50002069FEF76AF82069EF2201781140017090 -:105B60002946FEF7CBF80D2D76D22800784400792F -:105B7000001887441F1606448080840E7280848437 -:105B800060006848C16800698031497FFEF763F9A9 -:105B900075E06448C16800698031497AFEF7CCF944 -:105BA0006DE06048C16800698031896A491CFEF770 -:105BB0003DF964E05B4CE0688030406A817920699F -:105BC000FEF7F9F8E0688030406A01892069FEF745 -:105BD000E9F8E0688030406A41892069FEF7C7F83B -:105BE000E0688030406A81892069FEF7C9F8E06882 -:105BF0008030406AC1892069FEF7CBF83FE0494C0C -:105C0000E0688030416A2069091DFEF728F9E068E4 -:105C10008030416A20690C31FEF72DF9E068803050 -:105C2000416A20691E31FEF730F9E1682069803150 -:105C3000FEF738F923E03B4CA06901782069FEF7B4 -:105C400061F9A06981882069FEF75EF9A069418841 -:105C50002069FEF75DF912E00DE000200090694632 -:105C60000190087801210843694608702D480069B1 -:105C7000FEF764F903E02CA1334805F06CFAFEF757 -:105C8000DEFD002803D128A1304805F064FA0C2D70 -:105C90000ED0072D0ED0012D0AD0002D08D0022DD8 -:105CA00006D020480021C068403041810121817325 -:105CB00003B030BD1B480021C0684030018203B0F2 -:105CC00030BDF0B5174C8DB02079C0077ED060791B -:105CD00000287BD16069C0780E2878D20100794411 -:105CE000097949188F44737306733D5DE25C73FD57 -:105CF0007334FCA5E06854210A5C2030417D01200A -:105D0000FFF7DFFE00284BD16069FEF7A6F8E168D7 -:105D10009E22505402223520425400204031887483 -:105D20008873EFE1D80000207372635C6C6C5F6D68 -:105D300061737465722E6300E8000020E21F00208A -:105D40000820002083060000C7060000CD060000E2 -:105D5000E0682030C17C0A297ED10021C1750D2167 -:105D60001DE0E0683321095C0E2975D1A421095892 -:105D700040884988814203D0FAA1FE4805F0EBF93A -:105D8000E0688030416A60692631FEF7A2F8E16878 -:105D900060698431FEF7ADF8E06811212030C174EC -:105DA000B0E1E1683320405C112855D180318C4648 -:105DB0004B6AF14810260022082168440E33B51AB8 -:105DC000ED18203DEF7F4770AD7F01E0A2E17AE161 -:105DD0008570801C491E921C0029F0D161464B6AD7 -:105DE00003A810260022082103301E33B51AED182F -:105DF000203DEF7F4770AD7F8570801C491E921C4F -:105E00000029F3D16846FCF746FA08AD8DCDE1686C -:105E100000260E664E660D4670318DC10126203576 -:105E2000EE75D64E8DC6D64805F09EFA1320E8745E -:105E300068E1E0683321095C112901D00E293AD1CB -:105E40004030007D002836D16069FEF773F8E168C4 -:105E50000B460A46803300E02DE0187200254031E1 -:105E6000CD748D73586A51884088884203D0BDA193 -:105E7000C44805F070F9E06801468030426A157048 -:105E8000826B1378002B03D0D920B6A1800033E0B9 -:105E90004B88D380836B027A1A71826B1572836B85 -:105EA0000B221A70806B4988418008E1E068332139 -:105EB000095C152902D00220607123E1014600250A -:105EC0004031CD748D73A42109584088498881429E -:105ED00003D0A4A1AC4805F03EF9E068014601E01A -:105EE0002CE094E080314A6A15708A6B1378002B9D -:105EF00005D071209BA1C00005F02DF9DFE003461D -:105F000040331E7D002E0BD01D754388D3808A6BD5 -:105F100015718B6B0C221A70896B40884880CEE01B -:105F20004388D3808A6B15718B6B01221A728B6B3D -:105F30000B221A70896B40884880C0E0E0685421C9 -:105F40000A5C2030017D0020FFF7BBFD00280DD149 -:105F5000E06854210A5C2030C17C0720FFF7B1FDC6 -:105F6000002803D16079012108436071607900281D -:105F70004CD1E0684030807D800715D46069FDF722 -:105F8000CBFFE1684031C8756069FDF7C7FFE16884 -:105F9000403108836069FDF7C6FFE16802224031A5 -:105FA0004883887D10438875E068014640318A7DCA -:105FB000D20716D10A7D2030017D0020FFF781FD38 -:105FC000002803D167A1714805F0C5F8E0680121F8 -:105FD000342211540623A02213544030817400212E -:105FE0000182E06801462031CA7C012A03D10022E7 -:105FF000CA744E210A54A421095840884A88824212 -:1060000004D1087806287DD1002008707AE0E06885 -:1060100054210A5C2030C17C0620FFF752FD002885 -:1060200003D160790121084360716079002869D14A -:1060300069466069FDF793FF68460078C107C90F9C -:106040006846017004D0E06801214030017703E028 -:10605000E068002140300177E06800254E210D54B2 -:10606000A421095840884988814203D03DA148486D -:1060700005F071F8E06802468030416A0D70816B6E -:106080000B78002B04D037A1424805F064F816E0E5 -:106090005388CB80816B6B460D71816B1B880B81A4 -:1060A0006B465B884B816B469B888B816B46DB889C -:1060B000CB81836B06211970806B51884180E06829 -:1060C0002030C5741EE0E06854210A5C2030017D58 -:1060D0000020FFF7F6FC002803D160790121084376 -:1060E0006071607900280DD16069FDF73EFEE168BE -:1060F0008922505405223420425400204031088225 -:1061000001208874E2680023916ED06E491C5841CA -:106110009166D0660DB0F0BDF8B5FAF770F9FAF7F0 -:1061200063F9FAF76FF8FAF711F9FAF7C4FCFAF71E -:1061300025F9194CE06820300079012801D1FAF7DF -:106140007BF9E068012502462032917D002908D1C3 -:10615000E178CB0701D1890703D59575012101F0BD -:10616000F9FB1BE07372635C6C6C5F6D617374654B -:10617000722E630021030000FFFFFFFF08200020B4 -:10618000212000205F03000083030000C303000000 -:10619000F1030000F6030000D8000020E07900269B -:1061A00000284FD100F06DFDF848FEF737FB0028BE -:1061B00048D06079002845D1E06854210A5C20303D -:1061C000417D0120FFF77DFC00283BD1E0680246BD -:1061D0008032117F002901D0022051E00346203394 -:1061E000D97C05292AD0E927FF000C292DD00D29BB -:1061F00029D0132943D01B7D012B4BD0052B42D036 -:10620000526A1378002B61D0528843889A425DD13C -:106210004030027D0020FFF754FC00287FD0E0686A -:10622000A42109580978891E062978D20A007A44DF -:106230001279921897443A3C7373658CD449D548C7 -:1062400004F089FFB6E00B201AE0F5F71AFF0C28DE -:106250007DD3E06808218030406A1E30F5F712FFD8 -:10626000002806D0E06804218030F5F70BFF0028F5 -:1062700003D1C749384604F06EFF032000E0062032 -:10628000FFF755FC96E00720FFF751FCE06820304F -:1062900006758FE00C20FFF74AFCE06801464030AD -:1062A000827D2A43827520310E7583E000200BE049 -:1062B0002030C17D00290AD0007E002803D1B449D6 -:1062C000B54804F048FF0A20FFF731FC27E0F5F756 -:1062D000D8FE0C2823D3E06808218030406A1E30A5 -:1062E000F5F7D0FE002806D0E06804218030F5F7ED -:1062F000C9FE002803D1A649384604F02CFF03202C -:10630000E2E74030807D800709D10C20FFF70FFCC9 -:10631000E068403046818573817D294381759B48C3 -:10632000FEF77CFA002845D0E06854210A5C203052 -:10633000C17C0020FFF7C5FB00283BD0E168AC2002 -:10634000405C002836D0E0690078002802D031E0B7 -:106350000820B9E7088D0A282CD905220A31206ABD -:1063600004F042FD002822D0E0688030816A08787D -:1063700000280CD00522491C206A04F035FD0028B5 -:1063800018D1E0688030806A0078002806D1E06883 -:10639000216A8030806A401C04F0CEFFE0688030C3 -:1063A000806A0178491C01700120FFF7C0FBE0689A -:1063B000A0300673E078C007E06802D040308680E5 -:1063C00003E040308188491C8180E0689C21095CA1 -:1063D000002908D154210A5C2030417D0120FFF7BB -:1063E00070FB002804D0E06840300189491C01811D -:1063F000E0793D21002804D0E0684030817045708C -:106400005AE0207A02280AD001280AD060790028B0 -:106410001AD0420701D4C2060AD51E21ECE7162184 -:10642000EAE7E0689E21095C40308170457043E0F6 -:106430000207E1D4C10705D1800703D45449574866 -:1064400004F089FE2A21D7E7E06802464032917BBA -:10645000002905D05389591C518191898B4213D24F -:10646000917C002905D0118A4B1C13829389994293 -:106470000AD21789D3889F4203D39C21095C002943 -:1064800002D191898F4203D322209070557013E07E -:106490003621095C0029918805D0994209D308204A -:1064A0009070557008E0062903D33E209070557017 -:1064B00002E05178002908D0E06801462031CE740E -:1064C0000E758E752570022101E02570002101F006 -:1064D00041FAF8BDF8B50C4616466946FDF710F9C5 -:1064E000002801D00020F8BD009800250246803029 -:1064F000816B0B78072B1CD0A71C0C2B29D00B2BE6 -:1065000034D0062B4CD01146A031087C0028EAD0AC -:10651000657012202070087C002808D0A2320D740B -:10652000108A6080508AA080087C0028F7D1012062 -:10653000F8BD002EFBD1657007212170816B0A2206 -:10654000A01C091D04F07DFC00988030806B057054 -:10655000EDE7002EEBD165700C212170816B8A88EC -:106560006280C988A180806B0570E0E7002EDED1D3 -:1065700065700B212170816B8A883A80CA887A8085 -:106580000989B980806B0570D1E70000E800002020 -:1065900064610100BE0500007905000032020000C0 -:1065A000002EC4D1657006212170816B8A883A80E3 -:1065B000CA887A800A89BA804A89FA808A893A81A7 -:1065C000CA897A81806B0570B1E7FE48007801289E -:1065D00001D00C2070470020704770B5F94C05467B -:1065E0002078002803D0F849F84804F0B4FD0020D2 -:1065F000A5616072012020702078012803D0F24943 -:10660000F34804F0A8FD70BDF8B5EE4C21780129DF -:1066100001D00C20F8BDE0608030807AFEF707F8EA -:1066200000283AD0E0688030807AFEF757F90028D9 -:1066300033D0E0688030807AFEF7CCF800282CD088 -:10664000E0688030807AFEF708F9002825D0F9F755 -:106650008AFE0026E6710120F9F749FCE068014650 -:1066600040318A7B002A03D04A898B899A4211D211 -:106670008A7C002A03D00A8A8B899A420AD20B8923 -:10668000CA88934206D236231B5C8988002B06D029 -:10669000914206D30120A0703BE01220F8BD0629EC -:1066A000F8D2A6701330F9F7F0FDE0680F30F9F773 -:1066B0002EFD0320F9F754FEE06805462030017EE8 -:1066C000002902D1C07D002809D0294670318EC929 -:1066D000C0488EC02946C048803104F045FE98204D -:1066E000405BA91C401C82B228462830FDF772FD91 -:1066F000002803D0B449B94804F02DFDE0684030CB -:106700000078F9F716FDF9F727FE01210020F9F7C7 -:106710002BFDE67026716671A6712672022020702C -:10672000E06880300683F9F729FE0020F8BD10B537 -:10673000F9F719FEA34C2078022803D0F9F71EFEC2 -:106740000C2010BDA078002802D0FFF7E5FC17E070 -:10675000F9F736FEFFF7F0F8E068203000790128FD -:1067600001D1F9F772FE607A002809D0012809D01A -:10677000022805D0032805D09349994804F0EBFC82 -:10678000002010BDECF744FCFAE770B505468030F8 -:10679000018B2C46491C01834034A188491CA180EF -:1067A000A17B002902D06189491C6181A17C00295B -:1067B00002D0218A491C2182007F002807D1352080 -:1067C000415D227D0120FFF77CF9002802D020895D -:1067D000401C2081284600F0EBF9002070BD79496B -:1067E00048727047774A1162D0617047F8B5754CAE -:1067F0002078032803D074497A4804F0ACFCE1689F -:1068000004272031887A0025002803D08D72207952 -:1068100038432071206901260278D2439207002A6A -:106820001FD1CA7A002A1CD1CE72217902221143CB -:106830002171FDF79AFA062802D00B2811D10AE03F -:10684000E06801462030C27C132A0AD100228A6601 -:10685000CA66067605E0E0682030C17C0D2900D1CB -:1068600005762079400704D5E0682030407D022875 -:1068700005D06079002802D1A079002802D0FFF766 -:106880004BFC2AE05848FEF73CF8002801D0657020 -:1068900002E0667055486061E0682030007E0028A4 -:1068A00011D05348F9F76FFD4A480576E268916EBA -:1068B000D26E426101614E4A6169FAF7CAF801205D -:1068C000FAF7D6F804E06069F9F75DFDFAF7F3F836 -:1068D00002210020F9F7D2FD2770207801280CD082 -:1068E000607A002809D0012807D0022806D00328A2 -:1068F00004D035493F4804F02EFCF8BD0120F9F7DB -:1069000073FEF8BDF8B52F4C05462078042803D057 -:106910002D49394804F01FFC002D71D0FAF7E3F837 -:106920000125002812D1E0682030017E00290DD019 -:1069300061694A78D20609D00978C07B0907C90F76 -:10694000814203D1E571FFF7E7FBACE0E06820305E -:106950000079012811D1F9F76FFDE168881C283111 -:10696000FDF728FD002808D0E068B22142880A52CD -:106970003121095CA030017505746069002600783A -:106980004007C10FE0682030827B914255D0407BA8 -:10699000002852D002280FD1FDF780FE002803D135 -:1069A0000949164804F0D7FBE2680023106E516EC7 -:1069B000401C594151661066E06820304673C17A28 -:1069C00001291EE0D800002064610100EF070000EB -:1069D000FB07000008200020212000203A080000CA -:1069E0007A080000AF080000EC000020C01F002063 -:1069F000E21F0020F3080000FB080000FD05000076 -:106A0000B1E014D1C6722079082108432071FDF746 -:106A100046FF002803D1FE49FE4804F09CFBE268D3 -:106A20000023106E516E401C594151661066E0689B -:106A30002030817B012948D08573606901788C46BC -:106A40000907CF0FE1680A462031CB7B9F420CD16A -:106A50006746BF07BF0F012F4FD0022F4DD0032F26 -:106A600035D06079042108436071E0782843E070F4 -:106A700020690078C00604D460690078C00600D49C -:106A800061E720790028FBD160780028F8D100F078 -:106A900056FF0028F4D060790028F1D1A0790028B1 -:106AA000EED1FEF749FF207801280DD0607A00284A -:106AB0000AD001285CD0022806D0032858D095209F -:106AC000D349000104F047FBF8BD8673B5E7FDF735 -:106AD000D3F800280CD0E068203085722179294352 -:106AE0002171C17B012901D1C673BEE7C573BCE723 -:106AF0006079102108436071B7E74078C7062CD051 -:106B00006378002BB1D1C006C00E1B28F0D84032EC -:106B1000127DC97C0520FEF7D4FF002804D0A0799F -:106B200008210843A071A0E7E07804210843E07041 -:106B3000FDF70EFF002803D1B549B74804F00BFB61 -:106B4000E0680023816EC26E491C5A41C2668166AC -:106B50002030C17B0129C9D1C6E7012B01D0CD73FB -:106B600083E7CE7381E7E07802210843E070EAE62C -:106B70000120F9F739FDF8BD10B5A84800780428C0 -:106B800003D0A349A64804F0E6FAFFF7C5FA10BD02 -:106B900036210A5C40308188091D002A04D0C08853 -:106BA000814203D3012070470629FBD200207047A1 -:106BB000F8B5054606462036F07C2C460027803482 -:106BC000072820D1288DE18D401C884258D1A16A28 -:106BD00028460A30491C04F0AFFB01220221284656 -:106BE000FDF7ABFAF77401215E204155A06A0078E9 -:106BF000002804D1A1208649800004F0ACFAA16AE3 -:106C00000878401E0870F07C082839D1616A288D08 -:106C10008988401C884233D1A06B0178002904D0B8 -:106C20007B49804804F097FA15E06988C180606A62 -:106C3000A16B40890881606AA16B80894881606A84 -:106C4000A16BC0898881A06B0771A16B07200870B8 -:106C5000A16B68884880012211462846FDF76DFA2D -:106C60000321284600F076FE606A698840888842E1 -:106C700003D067496C4804F06EFA606A0770F774D5 -:106C8000F8BDF8B5654C6079002875D120790126EA -:106C900040070025002815DAE0682030C07C022873 -:106CA00002D0052807D102E05949604801E058495F -:106CB0005F4804F050FAE0682030417D022901D19C -:106CC00026724575207908278007002840DA607908 -:106CD00000283DD12069C0780D2875D20100794483 -:106CE000097949188F4449350681FCFCBB1722FC01 -:106CF0005B71CA00E06854210A5C2030417D0120AC -:106D0000FEF7DFFE002823D1E0680321352211546D -:106D100040308573E2E0E06854210A5C2030017D58 -:106D20000020FEF7CEFE002870D1DDE0E06854219F -:106D30000A5C2030C17C0020FEF7C3FE002803D18E -:106D400033493C4804F007FAE06809212030C17457 -:106D5000CAE0E06854210A5C2030C17C0020FEF7C4 -:106D6000B0FE002803D12A49334804F0F4F9E06862 -:106D700007212030C174B7E0FBE0E06854210A5CD1 -:106D80002030C17C0020FEF79CFE002803D1204962 -:106D90002A4804F0E0F9E0682030C774A4E0E06815 -:106DA00054210A5C2030C17C0020FEF78AFE0028B6 -:106DB00003D11749224804F0CEF9E06853210E545C -:106DC0000A212030C1748FE08AE0E0682030C07C66 -:106DD0000D2803D00E491B4804F0BDF9E06854218A -:106DE0000E540C212030C1747EE0E06854210A5C0E -:106DF0002030C17C0020FEF764FE002828D1E06826 -:106E00004030007D002823D101491DE064E00000EE -:106E1000646101000E06000057060000D800002043 -:106E20005809000091020000A50200006A04000059 -:106E30006E040000AC040000B1040000B6040000C1 -:106E4000BB040000C20400009920C00004F083F9D4 -:106E5000E06853210E540E212030C17444E0E068F4 -:106E60002030C07C132804D04D204349000104F099 -:106E700072F9E06815212030C17435E0E068A42182 -:106E8000095843884A889A421CD10978062919D1A1 -:106E900054210A5C2030C17C0020FEF712FE00283D -:106EA00003D13549354804F056F9E06801464031D0 -:106EB0008A7D920702D42030C67403E08D7380303F -:106EC000406A0570E06854210A5C2030017D002092 -:106ED000FEF7F7FD002807D0E0684030857403E036 -:106EE0002549274804F037F9207900070AD5607949 -:106EF000002807D1E0682030417D032902D102211A -:106F000021724575FEF7DDFEA07900072ED5E068F9 -:106F100054210A5C2030C17C0520FEF7D2FD0028F8 -:106F20000BD0607938436071E0688030816B0878FD -:106F30000B2800D10020087018E0E07804210843F5 -:106F4000E070FDF705FD002803D10B490D4804F062 -:106F500002F9E0680023816EC26E491C5A41C26684 -:106F600081662030C17B012904D0C673E068FFF739 -:106F70001FFEF8BDC573F9E764610100DC04000081 -:106F8000F6040000EA020000F7B582B00646039856 -:106F900017468188FE48FE4A41430398039D008BB3 -:106FA00000245043009080352A7C002A0CD0F948F8 -:106FB000012A40683CD0022A1FD0032A38D0F6A10B -:106FC000F94804F0C8F84BE0002F04D17D20F2A16D -:106FD000C00004F0C0F8EF4C6068002803D1EEA1B7 -:106FE000F24804F0B8F86068A168001D0918F04A7A -:106FF000009880180C18012018E0791E084303D16E -:10700000E5A1EC4804F0A7F8EB48016800980C18DB -:10701000002F0AD0DF484168E8480818A04204D988 -:107020008120DDA1C00004F096F80320287415E04B -:107030000C46002F12D0D74F002806D178780028B0 -:1070400003D0D5A1DE4804F086F8DC48796808183A -:10705000A04203D9D0A1DB4804F07DF8002C03D175 -:10706000CDA1D94804F077F821466869F5F7D9FF32 -:10707000686100203070012434716869B060039841 -:10708000FFF786FD002801D0747104E0287C0128F8 -:1070900005D003207071CD48F06005B0F0BD02202E -:1070A000F8E7F0B5054687B00F46012000F01BFD5C -:1070B000C4B20B2000F017FDC0B2844204D0FF2000 -:1070C000B5A14D3004F047F8012000F00CFDC4B22A -:1070D000182000F008FDC0B2844204D0FF20AEA109 -:1070E0004E3004F038F83846B94F6C1E6900CD199F -:1070F0000026403D09287DD20100794409794918CC -:107100008F44044150504CE9E9E9A0000B2C04DB0A -:10711000FF20B0A1213004F01EF8E88F6946FCF78B -:10712000EFFA002804D0FF209BA1563004F013F89A -:107130000B2C04DBFF20A7A1213004F00CF80099F0 -:10714000E88F4988884204D0FF2093A1583004F08A -:1071500002F800988030007C002804D1FF208EA126 -:10716000593003F0F8FF8B484660467086600098FF -:10717000FFF74AFA002804D0FF2087A1603003F00F -:10718000EAFF07B0F0BDFFF7D2FA0028F9D0FF20E0 -:1071900081A1663003F0DFFF07B0F0BDF9F727FAF1 -:1071A00007B0F0BD0420C04300F09DFCC6B219201A -:1071B00000F099FCC0B2864204D0FF2076A1723064 -:1071C00003F0C9FF0B2C04DBFF2082A1213003F068 -:1071D000C2FFE88F6946FCF793FA002804D0FF202D -:1071E0006DA1763003F0B7FF0B2C06DBFF2079A1F1 -:1071F000213000E06FE003F0AEFF0099E88F49888E -:10720000884204D0FF2064A1783003F0A4FF0098E6 -:10721000FFF7BBFA002804D0FF205FA17B3003F00A -:107220009AFF009C0022214602A8FFF7ADFE8034A1 -:10723000A07E02A9F6F7DAF80099088D401C0885AF -:1072400007B0F0BD0B2C04DBFF2062A1213003F05E -:1072500082FFE88F6946FCF753FA002804D0FF202C -:107260004DA1863003F077FF0B2C04DBFF2059A1E2 -:10727000213003F070FF0099E88F4988884204D0DC -:10728000FF2045A1883003F066FF00988030007C25 -:10729000042804D0FF2040A1893003F05CFF009C4B -:1072A00080342674A57E4F4F681E0B2804DBFF2018 -:1072B00048A1273003F04FFF4548690008184038BF -:1072C000C787A07EF5F700FC4748A6760078EBF765 -:1072D0001BF807B0F0BDFF202FA193304FE770B52A -:1072E000424C0646E08B0025401C80B2E0832378A8 -:1072F0000A46002B09D021464968042B0BD0052BE8 -:1073000017D03D2024A1000102E0ED2022A1800041 -:1073100003F021FF14E00A2801D3022000E003203B -:107320007071002A0BD00320226900F0F5FB05469E -:1073300006E002207071002A01D02D4D00E00D46BC -:1073400029462069F5F76DFE002120613170012189 -:107350003171B060A068FF303130F06070BDF0B5C1 -:10736000074685B00E46012000F0BDFBC4B20B20DD -:1073700000F0B9FBC0B2844204D0FF2006A19E30C9 -:1073800003F0E9FE012000F0AEFBC4B2182031E0AA -:10739000E2040000302000207372635C6C6C5F6C50 -:1073A0006D2E6D302E6300001C040000E903000008 -:1073B0005504000003040000000100205F040000E9 -:1073C00016040000170400001F040000F60400006B -:1073D0005C2000207372635C6C6C5F6C6D2E6D3092 -:1073E0002E630000FFFF0000FC0000203C20002076 -:1073F000B80B000000F077FBC0B2844204D0FF203D -:10740000FD499F3003F0A7FE00250120FB4C092E0B -:1074100070D231007944097949188F44041A3737FA -:10742000336B6B18520060732073607800280ED1A4 -:10743000F348456085602573A068C338FDF791FC6B -:10744000002804D0FF20EC49B33003F084FE05B0DF -:10745000F0BD6178002909D0207B002801D1FDF71B -:10746000C2FD6573F5F796FA05B0F0BDA073FDF7A0 -:1074700000FD0028F8D0FF20DF49C73003F06BFE85 -:1074800005B0F0BDF9F7B3F805B0F0BD0420C04376 -:1074900000F029FBC4B2192000F025FBC0B28442E1 -:1074A00004D0FF20D449D53003F055FE012200213D -:1074B0006846FFF714FF69463846F5F797FF05B0B1 -:1074C000F0BD2078052804D0FF20CB49E13003F03F -:1074D00042FE207F002804D1FF20C749E23003F09C -:1074E0003AFE25772570207DF5F7EEFA257505B073 -:1074F000F0BDFFE7FF20C049ED30A6E7F0B5BF4C77 -:1075000087B020780026042805D02078052802D0EE -:107510000C2007B0F0BD01276770607B00250028B4 -:1075200027D072B6607B002808D0A07B002805D049 -:10753000FDF759FD6573A573F5F72CFA62B6207D4A -:10754000F6F782FD002827D0207F002808D0257775 -:107550002078052803D0A849AA4803F0FCFD0C2692 -:1075600065702570207DF5F7AFFA2575304607B0B8 -:10757000F0BD207D00900320694608734873F5F73D -:10758000BEFA04900020C043694605900F7202A91C -:107590000098F5F72BFFD2E720BFD0E7F0B597486A -:1075A00083B00078002801D0FFF7A8FF944F012096 -:1075B0003870FF26944D2D36002405E00B2C03D3A4 -:1075C0009249304603F0C7FD204601A9FCF798F820 -:1075D000002838D101988030007C002833D00B2C53 -:1075E00003D38A49304603F0B6FD2046AC422ED084 -:1075F0006946FCF785F8002803D08449844803F0E5 -:10760000AAFD00988030807EF6F71EFD002822D06B -:107610000098002180300174847E0C2C04D3FF205C -:107620007A49273003F097FD7A48610008184038FE -:10763000C58700988030807EF5F746FA00990020D3 -:1076400080318876B8E7641CE4B2032CB6D30020FE -:10765000387003B0F0BD20BFD3E710B500786E4C92 -:1076600000280FD001280CD068496C4803F073FD46 -:10767000A0686B49884203D364496A4803F06BFDF4 -:1076800010BD6948A060F3E710B55D4900220A709B -:10769000614C207059480270427002770273427345 -:1076A0008273826102752030574B0380052143802D -:1076B0008380001D491EFAD1100004D0002A04D096 -:1076C0005948A06005E0A26003E05049534803F028 -:1076D00042FDA0685249884203D34C49514803F007 -:1076E0003AFDFFF75BFF10BD70B5444C0E462178A4 -:1076F00084B01546002902D00C2004B070BDA061F2 -:107700008030007C002803D03B49484803F023FD2B -:107710004748464345434748ED1C30186660A5601E -:10772000854200D82846A0603549002088600521A0 -:10773000217060702077E0833F48F5F771F920757C -:10774000002803D12C493D4803F005FDF5F7D7F992 -:107750002061002201216846FFF7C1FD207D6946B6 -:10776000F5F744FE002004B070BD08B50020C0430A -:107770006946088021480078002801D0002008BD13 -:107780000846FBF7F5FF0028F9D0012008BD10B529 -:107790001A4C84B02278002A02D00C2004B010BD0C -:1077A000234A51435043C91C224AA160606080189B -:1077B000814200D80846A06000206070042121703A -:1077C000E0831D48F5F72CF92075002803D10A49FC -:1077D0001B4803F0C0FCF5F792F91A49F5F721FCB4 -:1077E0002061002201216846FFF779FD207D69466E -:1077F000F5F7FCFD002027E0987301003C200020F5 -:107800003020002076020000FFFF0000D47301004A -:10781000190300005C200020FC000020510500003E -:107820006A1800005A050000C40900008B0200001D -:1078300071020000B3FBFFFF5F73010097020000BD -:10784000C6020000B80B000004B010BD10B5E14C3A -:10785000A1690160FFF752FE0021A16110BD70B562 -:10786000DC4C84B02078052802D00C2004B070BD18 -:10787000A069002803D1D849D84803F06CFCA0695E -:107880008030007C002803D0D349D54803F063FC46 -:10789000A0698030807E002803D0CF49D14803F012 -:1078A0005AFCD148F5F7BCF8A1699A225054054614 -:1078B0004E88401E0B2804DBFF20C749273003F009 -:1078C0004AFCCA49680040184038C687A069803021 -:1078D000807E002803D1C049C54803F03CFC01224A -:1078E0006846A169FFF750FBA06969468030807E39 -:1078F000F5F77CFD0020A06104B070BD10B5BD4956 -:107900004C68983400280ED001280FD0022811D0DE -:107910003520B949000103F01EFCAE488068A04242 -:107920000BD9012010BDFF347934F6E7B120800077 -:107930002418F2E7FF346134EFE7002010BDAD48B2 -:107940004178002902D10078002801D0002070473A -:107950000120704770B504460422A84E803484B0DC -:1079600000290DD0012923D0022907D0032921D0D5 -:10797000A149A34803F0EFFB04B070BD227410E0EE -:1079800005469C4800780028F8D12946012268461F -:10799000FFF7FAFAA07E6946F5F728FD288D401C0E -:1079A0002885F4F7F7FF3078EAF7AEFC04B070BD35 -:1079B000032010E08188934A5143934A1160616A21 -:1079C0000A8902838A7982754A8982808A89C2807B -:1079D000C98901810220207404B070BDF0B5874EC2 -:1079E0000146307800257B4C85B0002908D001295C -:1079F00016D0022942D0032958D07F49834839E064 -:107A0000E583EAF781FC6078002849D1002211461D -:107A10006846FFF764FC207D6946F5F7E7FC3FE028 -:107A2000744F20697968774B401879494218A069EA -:107A300081884088594300F06FF8B1680546884254 -:107A400005D2A1696F4A88884243551903E06D4900 -:107A500003F060FAA1690883A06905218175008B94 -:107A600068494843281A6B49B860884204D32520E6 -:107A70005949400103F06FFB05B0F0BDE583EAF71B -:107A800043FC01202077A0692169803041610574A1 -:107A9000FFF7E5FE002803D04F495F4803F05BFB8A -:107AA000F4F778FF6573A57305B0F0BDEAF72CFC19 -:107AB00005B0F0BD704710B54E4A00290ED001291F -:107AC00006D0022906D04C49544803F044FB10BDAF -:107AD000401E03E05178491C5170001F506010BDDA -:107AE0003C48007870478107C90E00280BDA000770 -:107AF000000F083880084A4A80008018C069C840D2 -:107B00000006800F70478008464A80008018006891 -:107B1000C8400006800F7047F7B582B00D46064694 -:107B2000414F002406E00B2C04D3FF202A492D30BE -:107B300003F011FB204601A9FBF7E2FD00280ED15E -:107B400001988030007C002809D00B2C04D3FF2042 -:107B500021492D3003F0FFFABC4204D006E0641C3A -:107B6000E4B2032CDFD3002005B0F0BD6946204607 -:107B7000FBF7C6FD002803D017492C4803F0EBFAA9 -:107B8000A64204D1DD201449800003F0E4FA28481D -:107B9000341B44430098803041690498F6F7C8F9D3 -:107BA000041908D5281B66422946401E03F0C0F977 -:107BB0006843841B05E02946204603F0B9F9684371 -:107BC000241AAC4203D904491A4803F0C4FA2046E7 -:107BD00005B0F0BD3C200020D4730100E702000096 -:107BE000E9020000EB020000A37001005C2000200D -:107BF000EE0200003020002098730100FC000020FD -:107C0000ED040000E204000000010020190500005E -:107C10004E0600006A180000B3040000360500009C -:107C200000ED00E000E400E0FFFF00007103000051 -:107C3000770800008903000070B5F84E0446B0795B -:107C40000025012805D0F64E307A01280CD00020FE -:107C500070BD002915D1657014202070F149A01C59 -:107C600003F082FBB5710CE000290AD16570132086 -:107C700020701C22EC49A01C03F0E3F80120A07145 -:107C80003572012070BDE648007A002802D0E7482E -:107C9000808D7047E6487047F8B5E64801780029BE -:107CA00002D00C263046F8BD0026E04D34462E7535 -:107CB0006E75EE752E76AE75DF496E734E73D84FC6 -:107CC0007F217E718170687E002804D0F8F7ABFBBD -:107CD000F8F754FF6C763C72D848FBF711FED84891 -:107CE000FBF70EFEDEE770B5D24A00251570CC4ECC -:107CF000D44B35711966D8651078002805D0FF205F -:107D0000D1A17A3003F027FA70BDC84C257565758E -:107D1000E5752576A575C8486573457375717F202F -:107D20009070607E002804D0F8F77DFBF8F726FFFE -:107D300065763572C148FBF7E3FDC148FBF7E0FD0E -:107D400070BDBA48007D704710B5B849C87B897BC3 -:107D500042078307D20FDB0FC007D218C00F1018DD -:107D60004000052911D20A007A44127992189744EA -:107D7000090509020700B849085A10BDB74810BDE7 -:107D8000B74900E0B749085A10BDFF20AEA19A30AC -:107D900003F0E1F9002010BDA448B349008A48432C -:107DA00070479F488079002800D001207047F8B5BF -:107DB00006469E4C407BE07330790027A073012873 -:107DC00025D0308820829648B37B83719D4DA7488B -:107DD0002970114603F0BBFAB0796873F11DA4480D -:107DE00003F0B5FA607B0126002800D06675924842 -:107DF000407B002800D0A675A07B05284DD201004D -:107E00007944097949188F440409262B09002782EF -:107E1000D9E700218948FBF778FD25E00121874853 -:107E2000FBF773FDE91D8548FBF7A4FD687B00287F -:107E300007D001280AD0FF2083A1E83003F08BF996 -:107E400012E000217D48FBF7A6FD0DE001217B48F3 -:107E5000FBF7A1FD08E006217848FBF756FD03E09B -:107E600002217648FBF751FDE7752776691C7348B8 -:107E7000FBF774FD29787148FBF781FD04217048F8 -:107E8000FBF743FD691C6E48FBF768FD29786C48D9 -:107E9000FBF775FD26750020F8BDFF206AA1F230C2 -:107EA000CCE770B5614C012525765D4A127A002A2F -:107EB00001D03A2070BD634A13780022834205D175 -:107EC000E2756A4803F043FAE57500E02276002087 -:107ED00070BD70B50446554D0020A8752246654812 -:107EE00002F0AFFF544844730120A87570BD4C499F -:107EF0000871704710B54D4C0022627560730246E0 -:107F00005D4802F09EFF0120607510BD4449487134 -:107F10007047F8B5474D287800282CD1434C207D78 -:107F2000002828D0F8F71FFA0026A674E6746E70B1 -:107F30003046F8F715FA0020F7F7D9FF4F48F8F761 -:107F4000E6F84F48F8F7A1F9F8F73AFAE07B01278D -:107F5000C107002902D0A17CC9070ED0810712D524 -:107F6000A17C89070FD42620F8F7E3F8A07C022132 -:107F70000843A07413E00C20F8BD2520F8F7D9F8C9 -:107F8000A07C38430AE0400709D5A07C400706D40E -:107F90002720F8F7CEF8A07C04210843A074F8F756 -:107FA000DBF901210020F8F7DFF80F210520F8F7B1 -:107FB00022F8244D2978681CF8F711F8A07B0128D5 -:107FC0000AD0042808D0607D002805D0627B2A49A9 -:107FD0001A48FBF7FAFC6675A07D002806D0164803 -:107FE0002449427B9830FBF722FDA675286E017864 -:107FF000002903D00178001DF8F734F8E86D017806 -:10800000002904D01F4A401CF8F797FD6776F8F75F -:10801000B5F90020F8BD074948607047F4200020FA -:10802000D4200020FB200020DE200020B4200020EF -:10803000FFFF000008010020942000200421002000 -:108040002C210020742000207372635C6C6C5F61D3 -:1080500064762E630000000066B401009A89130064 -:108060006EB401005EB401007102000075200020B2 -:108070007B20002082200020A220002059B4010093 -:1080800056B4010057210020F8B50126FE4C0546E4 -:10809000002824D0E07B2146C207897C002A01D039 -:1080A000CA070BD082070FD58A070DD42620F8F710 -:1080B00040F8A07C02210843A07410E02520F8F7C6 -:1080C00038F8A07C3043F7E7400708D5480706D4C6 -:1080D0002720F8F72EF8A07C04210843A074E07C48 -:1080E00000280AD0A07B012804D14B20E7490001D9 -:1080F00003F031F800F0BDFAF8BD002D0CD00221DC -:108100000020F8F731F8E2480079032801D001286F -:1081100002D10220F8F768FAE07D002700280AD093 -:10812000DC4DDD48691CFBF719FC691CDB48FBF7DB -:1081300015FCE7752776D848F8F725F9A07B0528C0 -:108140000CD201007944097949188F440202020BCC -:10815000020001210846F8F791F903E0CB49D04825 -:1081600002F0F9FFE07BA17C884303D1A07B0128CA -:1081700003D0E674CB480670F8BDA774FAE710B5D3 -:10818000F8F7F1F8C7480078002816D1BE48007DFE -:10819000002812D00020FFF777FFBD4800790028A3 -:1081A00009D0012815D0022805D0032811D0B749DD -:1081B000BD4802F0D0FF002010BDF8F720F9F8F715 -:1081C00013F9F8F71FF8F8F7C1F8F8F7D7F80C200B -:1081D00010BDEAF71DFFEEE7B24901204870704775 -:1081E000F8B50024FAF7AAFE002822D0FF202D308F -:1081F000F7F7B7FFAB4D2878A54F01281CD0022810 -:1082000001D0032831D0CF20A049800002F0A3FF85 -:10821000287800280CD03879002809D0012807D008 -:10822000022835D0032833D09849A04802F093FFA4 -:10823000F8BD00F01EFAF8BD934EB07B032814D0B1 -:10824000707E002803D0F8F788FCF8F7E4F8984827 -:10825000F8F799F8B07B012812D0042810D0B8792B -:10826000012806D0032804D004E00120FFF70CFF0A -:10827000CEE7102421460E2001430020F8F7FEF837 -:108280007879012801D1F8F7E0F802202870BFE7DB -:1082900028780228CFD10120F8F7A6F9F8BD70B5EB -:1082A0007B48804C4079012808D18248F8F7D6F8FD -:1082B000002801D17F20A070F8F7BEF8724D687ECB -:1082C000002803D0F8F7AFF8F8F758FCFAF736FEB5 -:1082D00000280BD02078022804D0DD206B498000D4 -:1082E00002F039FFA87B012803D006E000F0C1F9B5 -:1082F00070BD99208000F7F734FF0120FFF7C4FE1E -:1083000020780028F4D020780128F1D05F496A480D -:1083100002F021FF70BDF0B5044689B00020069040 -:108320000190F7F7F1FE03905E480078022803D031 -:108330005649624802F00FFF554D6879012809D16E -:108340005C48F8F78BF8002802D156497F208870E6 -:10835000F8F772F85648FBF7FDFA4B4E0746002C2B -:108360006FD05348FBF700FC00286AD0F7F740FEB7 -:10837000002866D0707E00280AD00524641EE4B26E -:10838000F8F71DFC022811D0012800D00020019030 -:10839000474A4B4CD01C0290062F52D238007844EA -:1083A000007900188744B4B4B409B44E002CE5D168 -:1083B00044A1484802F0CFFEE8E7B07B012840D056 -:1083C00004283ED001990398084304D1A8790028D5 -:1083D00001D0022835D1687901281AD1A079002866 -:1083E00017D10120A07110784006C00FE0713A4803 -:1083F000029902F0ACFF2B4C384FA0787F2804D1B3 -:10840000532030A1000102F0A6FEA07838707F2032 -:10841000A0702248F7F7B7FF22480321017028799E -:10842000002877D0012808D0022873D0032804D070 -:1084300024A12B4802F08FFE6CE00120F8F7D4F85D -:1084400068E065E01348D178C07981424AD111488B -:108450001179037A994245D15179437A994241D1B0 -:108460009179837A99423DD1D179C37A994239D1B0 -:10847000117A037B994235D11178407B4906C90FA7 -:1084800081422FD101212EE0B4200020488001003C -:10849000D420002074200020042100202C21002062 -:1084A000DE04000008010020D1020000510300009A -:1084B000542100200A01002083030000C1030000B2 -:1084C000F42000207372635C6C6C5F6164762E63D1 -:1084D00000000000AB030000FC200020022100206F -:1084E000090400000021B07B012801D0042801D13B -:1084F00000290AD100280BD101990398084304D11F -:10850000A879002801D0012802D1307E00281FD090 -:1085100001200690707E002803D0F7F784FFF8F75B -:108520002DFB0698002802D00120FFF7ADFD73480F -:10853000017800290AD00178012907D000780328A2 -:1085400004D049206E49000102F005FE09B0F0BDDB -:108550006A486C4F4068397BC173797B0174B97B81 -:108560004174F97B8174684909784906C90FC1765D -:108570001C30029902F0EBFE6048397C4068C174FF -:10858000797C0175B97C4175F91E897D81750299E7 -:108590004A7D0B7D110219430183F91E8A7E4B7EB1 -:1085A00012021A438280029A537E177E1A023A43BD -:1085B000C2808A7F4B7F11021943018153490A30DF -:1085C00002F0BAFE52480179CA064C49D20E4968F7 -:1085D0008A7600794009C0310871287A002803D0D2 -:1085E00047494C4802F0B7FD0020A87243484B4968 -:1085F00047687888B085F87EE873B88B2882F88B56 -:108600006882388CA88244480078A875444802F0F3 -:108610009EFEB888F087F888208038896080C0374F -:10862000387920710198002860790BD00121084326 -:108630006071F8F7DDFA61794000C907C90F01439D -:10864000617102E0400840006071012028722B4CEB -:1086500000202070F7F7D3FEF7F7C6FEF7F7D2FD3C -:10866000F7F774FEF7F78AFE01206168FAF785FDD7 -:1086700050E7F8B5F7F7C3FEF7F7B6FEF7F7C2FD18 -:10868000F7F764FE274E0027707E002804D0F7F726 -:10869000CAFEF8F773FA7776184D2F70F7F76EFE6B -:1086A000B07B012804D000210846FAF766FDF8BD2A -:1086B00000210220FAF761FD1B4C207A002803D02C -:1086C0000F491A4802F047FD68780028EFD0124899 -:1086D000417BE1730078A0751549164802F037FE1A -:1086E0000E490F4802F033FE3C20A07268684088B3 -:1086F000B085012020726F70F8BD000008010020D5 -:10870000C48401005721002054210020732100203F -:10871000742100203D0400007420002075200020FA -:10872000EB200020B4200020D42000204F020000C5 -:108730007B200020E4200020F8B5FBF7FBFF044677 -:10874000FCF7BFF8FE4E054670692030407B0028DC -:1087500026D0012844D0022846D003284DD0FF203F -:10876000F8A19C3002F0F7FCB069F72201781140C3 -:10877000017072692032937BDB071B0F1943FB23C7 -:1087800019400170D37BDB075B0F19430170577BE6 -:10879000EF23022F3CD0012F3FD0032F41D046E0E2 -:1087A000EC48FCF76DF8002804D0716903202031F3 -:1087B0004873D9E7E748FBF74DFF002804D07069FC -:1087C0005321095C002907D0E248FCF700F87169E1 -:1087D000012020314873C7E7022120304173C3E7ED -:1087E000DC48FBF7F4FFBFE7DA48FBF733FF00286C -:1087F000BAD1FF20D3A18E3007E0D648FCF740F86D -:108800000028B1D1FF20CFA1963002F0A4FCABE745 -:10881000012C08D8002D06D009E06D1E2C4302D192 -:1088200005E0002C03D019401023194300E0194043 -:108830000170D17D002915D0517B012912D0C64885 -:10884000F7F7A1FDC548002101767269116E526EDD -:1088500042610161C049B269F8F7FBF80020F8F7FE -:1088600007F903E0F7F78FFDF8F725F9B06900780D -:10887000C00606D4F0690078C00602D4F07900285A -:1088800006D0B079002803D101210846F7F7F6FD9C -:10889000032030703079002803D1F7F791FD0120D3 -:1088A0003071F8BD10B5A649002348690246203052 -:1088B000C37483750120412398548032927F002A2B -:1088C00003D008700021022001E000210320FAF704 -:1088D000D2FB10BD06281AD202007A4412799218EF -:1088E00097440205090D101000290ED00FE0891ED3 -:1088F00002290AD90BE0891F012906D907E00829B6 -:1089000003D004E00B390B2901D801207047002067 -:10891000704730B5044683B08E48FBF77FFF0028D0 -:1089200004D1F52087A1C00002F015FC844DA86990 -:10893000FBF75AF90321A869FBF777F9A869EF2239 -:108940000178114001702146FBF7D8F90E2C5BD25B -:1089500020007844007900188744565606561F5A5E -:108960005A175642565A312B75485D224169525C5E -:10897000002A04D006218069FBF76DFA48E0C03177 -:10898000C9798069FBF767FA42E06D4841698069FF -:108990008031497AFBF7D0FA3AE0694D6969A869F4 -:1089A000B031FBF791FA6969A8698431FBF798FA4D -:1089B0002EE0634806218069FBF7BAFA28E0604D93 -:1089C00028690178A869FBF79DFA28698188A86958 -:1089D000FBF79AFA28694188A869FBF799FA17E02A -:1089E000002000900190564841694031097F0029DC -:1089F00005D06A461178012211436A461170694612 -:108A00008069FBF7A7FA03E04EA1554802F0A3FBEB -:108A1000FBF715FF002804D17F204AA1000102F0D6 -:108A20009AFB0C2C0AD0072C06D04548002140693F -:108A3000403041810121817303B030BD40480021A5 -:108A400040694030018203B030BDF0B53C4D064670 -:108A500068698DB020300079012801D1F7F7ECFC6E -:108A60000024012E1ED168692030017E002902D128 -:108A7000C07D002801D0F8F71EF8F7F7C0FCF7F723 -:108A8000B3FCF7F7BFFBF7F761FCF7F777FC687902 -:108A9000C006686902D58030048703E08030018F0A -:108AA000491C018768790226C107002901D1800786 -:108AB00013D568692030817D002902D0032907D0B1 -:108AC0000BE00121817500210120FAF7D4FA04E0BE -:108AD000867500210120FAF7CEFA68692030817D81 -:108AE000012903D16979090700D586751448807A70 -:108AF000002861D100F015FF1648FBF78FFE002813 -:108B00005AD00F4D287A002856D16869C621095CD1 -:108B100000290ED02030C17C0120FFF7DBFE0028A9 -:108B200007D168692030C17C0420FFF7D3FE0028FC -:108B300018D06869CB21095C062919D01FE0000014 -:108B4000100100207372635C6C6C5F736C617665FE -:108B50002E6300002801002080210020A821002091 -:108B6000EA070000686940300481447702204DE044 -:108B70002030C17C0420FFF7ADFE002815D06869C5 -:108B80002030C07C801E15287ED2010079440979EE -:108B900049188F449B9B9B1C9B9B9B979B1E9B9B5D -:108BA0009B243E9B9B9B9B9B900068695621095C84 -:108BB000C90702D0C030C472AEE00C20FFF7A9FE96 -:108BC000686901224030817D11438175A4E007204E -:108BD0001CE0FBF7F0FE00286CD00B2016E0F3F74A -:108BE00050FA0C2866D368690821B030F3F74AFAC6 -:108BF000002806D0686904218430F3F743FA00287E -:108C000003D1F4A1F74802F0A6FA0420FFF781FE91 -:108C100082E068698446C030807A042802D0052842 -:108C200039D079E06046E030007D002874D1EE490B -:108C30006046102600230822D8306944F51A2D1802 -:108C4000203DEF7F4F70AD7F8D70891C521E9B1CA5 -:108C5000002AF3D103A86346102608210330A83365 -:108C6000B51AED18203DEF7F4770AD7F8570801CF1 -:108C7000491E921C0029F3D16846F9F70CFB08AF96 -:108C80004ECFDA4D686900E020E070304EC005201C -:108C9000FFF73FFE0BE060464030017D002903D026 -:108CA00001214177022000E00D20FFF732FE6869C4 -:108CB000C030847230E00620FFF72BFE6869403038 -:108CC000847329E00920FFF724FE25E06869CA21A2 -:108CD000095C002920D0062906D02030C17C002064 -:108CE000FFF7F8FD002817D068690146C0318A7A7D -:108CF000072A11D213007B441B79DB189F440C0C0C -:108D00000C0C0C0C03004030807DC20700D154E7EE -:108D1000C043800700D18C72B44D2879002868695F -:108D200002D08030048303E08030018B491C018332 -:108D30006879C007686904D0A4210C54403084804D -:108D400003E040308188491C8180E879002806D002 -:108D50006969A0310879022806D8401C0871686941 -:108D6000A0300079022806D9686901468030048362 -:108D70004483A0310C7168692030C17C0020FFF76A -:108D8000A9FD002804D168692030C07C07284CD197 -:108D900068690146C0318A7A062A46D0C97A06290E -:108DA00043D03621095C02293FD1A0300079002848 -:108DB0003BD1FBF7AEFC002837D0FBF782FD002843 -:108DC00033D06869014680314A8A012A2DD90122AF -:108DD0004A77024640329688D288931E9E4201DB33 -:108DE000012302E0921B521E93B20A8BAE89B2425B -:108DF00001D3012202E0B21A521C92B2934200D96E -:108E00001346012B00D14C77C0300278002A10D0D5 -:108E1000498B4088814201D3012102E0401A401C65 -:108E200081B28B4205D90B4603E06869012380308B -:108E300044776A69118D1646C81883B2104680308F -:108E400083822036B77D002F25D0012F23D0022F1B -:108E50000CD0032F0AD05FA1654802F07CF9687935 -:108E6000C006686919D58030C4841BE0F67C032EE7 -:108E700009D0082E0FD04032D1889288891A891ED5 -:108E800059180182EBE740329688032E03D3D2882B -:108E90008918491CF5E70382E1E78030C18CC28A5A -:108EA0008918C18468690246C0329179002906D0C8 -:108EB0000146403196230E891B5AF3180B81A97A7B -:108EC0000426002913D002463D214032917001460C -:108ED0002031CC748C75012151708030807F002846 -:108EE00070D0297000210220FAF7C5F85EE0014633 -:108EF0002031CB7C042B48D02B7A002B1ED05A0774 -:108F000001D4DA0604D51E2240308270CE743CE0D3 -:108F10001A0704D53D2240308270CE7435E0D80760 -:108F200005D1980703D42BA1324802F014F96869DF -:108F30002A21422211542030C67426E04030837B1F -:108F4000002B05D047897B1C438183899F420FD228 -:108F5000D37A062B02D0927A062A05D1038A5A1CAC -:108F600002828289934203D20389C288934203D347 -:108F700022228270CE7408E08B7D002B23D0838860 -:108F800093423CD308228270CE7468694122014624 -:108F90002031CC748C75012111548030807F0028E1 -:108FA0002AD0297000210220FAF765F8F9F7EEFFC0 -:108FB00000282DD068690146FF300130827A002AEE -:108FC00022D025E018E08288062A18D33E2282703B -:108FD000CE74DAE77372635C6C6C5F736C61766598 -:108FE0002E63000039060000FFFFFFFF1001002084 -:108FF000790800004502000000210320D4E7012089 -:10900000287000210846CFE74988818101218172BB -:109010006869803084770DB0F0BDF8B50C4617460E -:109020006946FAF7F9FA002801D00020F8BD009847 -:109030000146E030027AF74E0025002A17D0002FB3 -:109040007DD1657007212170007A00280DD07169EB -:10905000E8204D8445540A22A01CEA3101F0F1FEBB -:109060000098E030007A0028F1D1A57067E0027D19 -:10907000002A2AD0002F62D1017D0D2920D20A00BA -:109080007A441279921897441B1B1B1B1B1B1B1B3A -:109090001B1B1B0F060065700C212170817DA170C8 -:1090A00071694988A18009E065700B212170817D7B -:1090B000A17071694988A180817EA17105753EE02A -:1090C000D549D64802F047F839E0027F002A15D08A -:1090D000002F34D16570082222707269FF315288E6 -:1090E000628001310A88A2804A88E2808A882281CF -:1090F000CA8862810989A181057720E0FF310131A9 -:10910000887A002808D0002F19D1657011202070AE -:10911000888960808D7212E0887B002886D0002FBD -:109120000DD1657012202070887B002807D08D73C8 -:10913000088A6080488AA080887B0028F7D10120B7 -:10914000F8BDB4480078012801D00C2070470020F9 -:10915000704770B5AF4C05462078002803D0AE4963 -:10916000AF4801F0F8FF00202561E0720120207077 -:109170002078012803D0A849AA4801F0ECFF70BD6F -:10918000F8B5A44D2978012901D00C20F8BD01269D -:10919000686180308677807AFBF749FA00282ED004 -:1091A00068698030807AFBF799FB002827D06869CE -:1091B0008030807AFBF70EFB002820D06869803071 -:1091C000807AFBF74AFB002819D0F7F7CCF86869DA -:1091D00000248030408A002825D09348FBF71EFBEE -:1091E000002820D06869C621095C00291BD02030E6 -:1091F000C17C0120FFF76EFB002802D013E0122093 -:10920000F8BD68692030C17C0420FFF763FB0028AB -:1092100009D168694030048144770220FFF779FB67 -:109220006869803044776869E821095C002905D1C4 -:10923000418CC288914201D9A98101E0C188A981EC -:1092400001468031CA8A521E93B20A8BD21892B25A -:109250000A830F7F002F02D04C830C7702E04F8BE4 -:10926000FF184F8305464035AF88FF18AF804D8A01 -:10927000012D01D86D1C4D82002B01D0A4231C545C -:109280002030C07C634D042817D0487F002816D0BA -:10929000A889824213D2FBF73CFA00280FD06869F4 -:1092A0000146C0310A78002A09D08030408B4988B5 -:1092B000884204D3AC70EE7003E0AE7001E0AC7095 -:1092C000EC7068699D210C543321095C062901D09A -:1092D000072917D1CC21028D095A511A09B2002948 -:1092E00010DB0146CE310A3002F04FF80122022194 -:1092F0006869FAF7C8FE6869CB210C5433210C5415 -:1093000040308677434D962168690A5A01462830D5 -:10931000891CFAF75FFFA87800284DD16869C02141 -:10932000095C002901D0803044830120F6F7DFFD7D -:10933000384D68691330F6F7A8FF68690F30F6F703 -:10934000E6FE0120F7F70CF8686901462030027E3E -:10935000002A02D1C07D002806D07031ACC9334844 -:10936000ACC0334802F000F8F6F7F6FF01210846DA -:10937000F6F7FAFE274D68698030006AF7F706F8BD -:109380002C48FBF7BEFA002801D06C7002E06E702A -:109390002948E86168692030007E002802D068789A -:1093A000002817D0E869F6F7EEFFF7F784FB686945 -:1093B00040300078F6F7BDFE164802214471C471B2 -:1093C000847104724472847204710170F6F7D6FFDE -:1093D0000020F8BD1848F6F7D6FF144806766A69EB -:1093E000916ED26E42610161134AE969F7F731FB70 -:1093F0000120F7F73DFBDAE710B5064C207802288C -:1094000001D00C2010BDA078002817D00020FFF755 -:109410001CFB2FE010010020D48F0100DD080000AC -:109420002D0900003809000028010020A821002093 -:10943000C12100202C01002080210020F6F793FF9D -:1094400001210020F7F71AF804202070606920300D -:109450000079012801D1F6F7F8FFE07A002809D059 -:10946000012807D0022807D0032805D0F949FA4877 -:1094700001F071FE002010BDE9F7CAFDFAE7F749D7 -:10948000C8727047F8B5F54C2078032803D0F1492D -:10949000F34801F060FE616901252031887A0028D7 -:1094A00006D0002088720D73A07904221043A071A9 -:1094B000A0690278D24392072BD1C97A002928D11A -:1094C000FAF753FC04281DD0052802D00B2819D127 -:1094D00011E0606901462030C27C102A12D10022BE -:1094E0008A66CA6605767031CCC9DE48CCC0DE48D3 -:1094F00001F03AFF06E060692030C17C0B2901D100 -:1095000000210176606902212030C572A0790843EC -:10951000A071A0690078C00606D4E0690078C00692 -:1095200002D4E07900280FD0607800280CD1A0790F -:10953000002809D1F9F718FD002805D0207A002865 -:1095400002D1607A002803D00120FFF77EFA1DE0E7 -:10955000C648FBF7D6F9002802D00020607002E070 -:109560006570C348E06160692030007E002802D049 -:10957000607800281CD0E069F6F705FFF7F79BFA42 -:1095800001210020F6F77AFF0420207020780128BE -:109590000DD0E07A00280AD0012808D0022819D07E -:1095A000032817D0A920AB49000101F0D4FDF8BD74 -:1095B000AF48F6F7E8FEAB4805766269916ED26E69 -:1095C00042610161AA4AE169F7F743FA0120F7F71E -:1095D0004FFAD5E70120F7F707F8F8BDF8B59F4C2B -:1095E00005462078042803D09A49A24801F0B3FD2B -:1095F0009A481027417939434171002D7ED0F7F701 -:1096000072FA0125002814D1944842692032117E53 -:1096100000290ED0C1694B78DB060AD00978D27BCD -:109620000907C90F914204D185720120FFF70DFA95 -:1096300054E18A4CE07800281ED0E0694178C906E0 -:109640001AD10078C00617D460692030007901284B -:109650007ED1F6F7F1FE6169881C2831FAF7AAFE7F -:10966000002875D06069C21D4388F932138220300A -:10967000007C907495732BE160692030007901289B -:1096800011D1F6F7D9FE6169881C2831FAF792FEEC -:10969000002808D06069C21D4388F9321382203047 -:1096A000007C90749573E069002600784007C10F34 -:1096B00060692030827B914242D0407B00283BD0C1 -:1096C00002280FD1FAF7EAFF002803D161496A485E -:1096D00001F041FD62690023106E516E401C59413A -:1096E00051661066606920304673017B012903D101 -:1096F0000673A1793943A171C17A00E0D1E0012953 -:1097000014D1C672A07908210843A071FBF7C7F8ED -:10971000002803D14F49594801F01DFD626900231B -:10972000106E516E401C59415166106660692030C0 -:10973000817B01292ED085736079082108436071EF -:109740004649C869496903781A07D40F203100E0F7 -:109750007FE0CA7B94420CD19B07404C9B0F012BAE -:1097600048D0022B46D0032B16D0207A0421084380 -:1097700020723A48417929434171C67181790907BC -:1097800004D541692031C97C032962D0017A0029BE -:109790005FD182E08673CFE76378002BE9D18D72C9 -:1097A000A3792B43A371012A10D0CD73FAF7DDFA08 -:1097B00006280DD00B28DCD1606901462030C27C20 -:1097C0000C2AD6D1C67540310D75D2E7CE73EDE7C0 -:1097D000606901462030C27C122ACAD100220A6682 -:1097E0004A66C57570319CC91E489CC0093001F09D -:1097F000BBFDBEE74078C30649D06278002AB8D1E5 -:10980000C006C00E1B283FD8C97C0520FFF762F8B0 -:10981000002804D0607A082108436072A9E76079C3 -:10982000042108436071FBF793F8002803D109492C -:10983000134801F090FC60690023816EC26E491CE0 -:109840005A41C26681662030C17B01291AD0C57396 -:109850008FE73DE0D48F01000D0A000010010020C9 -:10986000360A0000A8210020C12100202C01002080 -:1098700080210020A80A00000A070000220700003B -:109880007C070000C67374E7207A384370E7012A2A -:1098900001D0CD736DE7CE736BE7407A002817D106 -:1098A0001AE0F948022211434171C179491CC9B239 -:1098B000C17101290CD840692030007E00280BD0EE -:1098C000F2484078C106C90E052905D2C00603D06A -:1098D0000120FFF7BAF801E0FEF72EFFEA48017811 -:1098E00001290CD0C07A002809D0012808D002280C -:1098F00005D0032804D0E649E64801F02CFCF8BD69 -:109900000120F6F771FEF8BD10B5DF480078042895 -:1099100003D0DF49E04801F01EFC0120FFF795F875 -:1099200010BDF8B5D84C0427A07900250007002801 -:109930002FDA207A00282CD160692030C07C801E6C -:10994000132826D201007944097949188F44210946 -:1099500021212121212121212121212121212121F7 -:109960001A006069014640318D734A7F002A04D095 -:1099700006228A702030C7740BE016228A702030CD -:10998000C77406E0606901464031CD748D732030A4 -:10999000C57400F063F9BC4801268279500700289D -:1099A00022DAB948017A00291ED1406901462031E6 -:1099B0000B46C97C891E072916D20C007C442479E9 -:1099C0002419A744031111110B110E000146403157 -:1099D0008D73C030007A8870DF7405E0C030C672C5 -:1099E00002E00221C030C172A74C90074AD5207A0C -:1099F000002847D160692030C17C0120FEF76AFF52 -:109A000000283FD1A069C0780E287DD2010079449A -:109A1000097949188F44A7A706A73747630BA718EA -:109A2000A7279755616903202031C8749FE06069BA -:109A30002030C07C052803D09549984801F08BFB65 -:109A400060692030C57492E060692030C07C0928CC -:109A500003D08F49924801F07EFB60694E210D547E -:109A60002030C57483E060692030C07C0B2803D0AF -:109A700087498C4801F06FFB606953210E540C211B -:109A80002030C17473E060692030C07C0F2803D09F -:109A90007F49854801F05FFB606953210E54102116 -:109AA0002030C17463E060692030C07C102803D08E -:109AB00077497E4801F04FFB606912212030C17464 -:109AC00055E060692030C07C102803D07049784888 -:109AD00001F041FB606914212030C17447E06069E6 -:109AE0002030C07C162803D06949724801F033FB4E -:109AF000606901464030C5748573E031087D0028F7 -:109B000006D063492B2000E02DE0400101F023FB4B -:109B10006069014640310A7D002A08D00D754288EF -:109B2000F8210A520146E0318D750C2207E0418888 -:109B3000F82211520146E0318D758E760B220A759E -:109B40002030C57413E060690146C030827A062A6D -:109B500004D14031897D890700D58572C17A0629F3 -:109B600005D1C57203E04A49534801F0F4FAA079DF -:109B7000C00612D5207A00280FD160692030C17C40 -:109B800007290AD20A007A441279921897440505E7 -:109B90000505050503000721C174607A000727D574 -:109BA00060692030C17C0520FEF794FE002807D0B4 -:109BB000207A0821084320726069E030057517E0BB -:109BC000607938436071FAF7C3FE002803D1304949 -:109BD0003A4801F0C0FA60690023816EC26E491CE8 -:109BE0005A41C26681662030C17B012934D0C673D8 -:109BF00060693321095C08292DD10146028DC031ED -:109C00008B89521C9A4226D1227A002A23D14A8A71 -:109C100083889A4207D18B8AC788BB4203D1CB8AFB -:109C20000789BB4208D043888B85CA858A8A0A8601 -:109C3000CA8A4A86E8210E5401221146FAF723FA0D -:109C400000210420F9F717FA6069CB210D54203068 -:109C5000C57403218175F8BDC573C9E730B50A4CD9 -:109C600083B0A079C0077DD0207A00287AD16069BE -:109C70002030C17C0120FEF72DFE00284AD1E0698A -:109C8000C0780D286FD21BE0100100208021002039 -:109C9000D48F01000E0B0000160B000027050000FA -:109CA0002D050000340500003C05000043050000C0 -:109CB000490500005B050000BD0500009E03000093 -:109CC00001007944097949188F443B1506C14D4D6F -:109CD000FE24FD4D98B2FC00E069FAF7BEF8616918 -:109CE000C82250540222332042540020403148817F -:109CF0000120887385E160692030C17C0020FEF777 -:109D0000E9FD0028207A02D0002803D103E00121D8 -:109D10000843207275E1E069FAF798F86169CC228E -:109D200050520A8D801ABC4A00B290425FDC002873 -:109D30005DDDCE31E069FAF77EF8606906212030FA -:109D400083E060692030C17C0020FEF7C3FD00285D -:109D500003D1207A012108432072207A00284CD1B7 -:109D6000E06901E055E134E1FAF732F800282ED03D -:109D7000E069FAF728F86169CC2250520A8D801AFE -:109D8000A54A00B2904232DC002830DDE069FAF7E3 -:109D900014F86169C0318873E069FAF707F86169FE -:109DA000C0310882E069F9F7E6FF6169C031488295 -:109DB000E069F9F7E9FF6169C0318882E069F9F784 -:109DC000ECFF6169D62250520820203196E060698C -:109DD0002030C17C0020FEF77DFD002803D1207AD1 -:109DE000012108432072207A002806D100E12820B2 -:109DF0004222505404202031C87402E160692030AE -:109E0000C17C0020FEF766FD002803D1207A0121E5 -:109E100008432072207A00285FD160690022014641 -:109E200040304281012282730B202031C874E8E067 -:109E300060692030C17C0C2903D0217A02221143B1 -:109E40002172217A002948D10D21C174D9E06069BD -:109E50002030C17C0020FEF73DFD002808D160695C -:109E60004030007D002803D1207A01210843207270 -:109E7000207A002831D160690022014640304281B9 -:109E800001258573A831E069FAF704F86169E06992 -:109E90008031FAF710F86069E030007F002803D0C5 -:109EA0005E495F4801F057F96169FE204A884252D5 -:109EB000FF310131E069F9F7D7FF6169E069FF31EE -:109EC000093102E01CE056E008E0F9F7D9FF6069CB -:109ED000FC210D540F212030C17492E060690146CD -:109EE0002031CA7C122A03D0227A02231A4322721A -:109EF000227A002A6CD1403082731620C87480E028 -:109F000060690146C031CA7A002A06D0897A0629DA -:109F100003D0217A012211432172217A002970D1C4 -:109F20004030807D800715D4E069F9F7F5FF61695D -:109F30004031C875E069F9F7F1FF61694031088384 -:109F4000E069F9F7F0FF6169022240314883887DBA -:109F50001043887560690146C0318A7A062A01D1AA -:109F600000228A724030827DD2074AD10622CA720C -:109F70000021018245E060692030C17C0020FEF7AD -:109F8000A9FC002803D1207A012108432072207AFD -:109F9000002836D16946E069F9F7D5FF68460078B0 -:109FA000C107C90F6846017004D0606901214030C3 -:109FB000017703E060690021403001776069002289 -:109FC0000146403042810122827309202031C87449 -:109FD00017E060692030C17C0020FEF77BFC002880 -:109FE00003D1207A012108432072207A002808D169 -:109FF000E069F9F7BAFE61698922505405202031E1 -:10A00000C87461690023886ECA6E401C5A41CA66D2 -:10A01000886603B030BD0000FE7F0000D48F0100D1 -:10A020002104000047490968016000207047454944 -:10A030000860002070470121434A002803D001280E -:10A0400003D042487047916300E0D163002070471D -:10A050003F49012008603D48801C704704223D4B69 -:10A060003B49002805D05A60086901221043086165 -:10A0700008E008694008400008619A603249002001 -:10A08000C03188600020704731490622002808D07E -:10A09000012809D002280DD003280FD02B48401CDE -:10A0A00070470869904302E008699043801C08618A -:10A0B0000020704708699043001DF8E708691043C5 -:10A0C000F5E723494A6A02434A6200207047204963 -:10A0D0004A6A82434A62002070471D49496A01600A -:10A0E000002070471A49CA690243CA6100207047BC -:10A0F0001749CA698243CA61002070471449C96977 -:10A100000160002070471249024600204031002AB9 -:10A1100003D0012A01D0072070478A6370470D4998 -:10A120000420886008490020C03188600A4801681E -:10A130008022090A090211430160084901200860D0 -:10A140007047000000040040400000400420000070 -:10A15000000500400003004000E400E000E100E0F2 -:10A160008107C90E002808DA0007000F08388008A8 -:10A17000814A80008018C06904E080087F4A80001E -:10A1800080180068C8400006800F704710B504466C -:10A1900000F0DBF8002813D02046FFF7E1FFC0B243 -:10A1A00000F0E1F800280DD07549E2060B78D20ED8 -:10A1B00001209040002B08D04A681043486006E018 -:10A1C000704810BD6F48401C10BD6F4908600020EA -:10A1D00010BD10B5044600F0B8F800280BD068494F -:10A1E000E2060B78D20E01209040002B05D04A6881 -:10A1F00082434A6004E0634810BD634980310860CF -:10A20000002010BD70B50D46044600F09EF80028F1 -:10A210000BD05E480068E206D20E01219140084052 -:10A2200000D001202860002070BD564870BD10B5D8 -:10A23000044600F08AF8002807D0E106C90E012084 -:10A24000884052490860002010BD4E4810BD10B52E -:10A25000044600F07AF8002808D0E106C90E012073 -:10A2600088404A4980310860002010BD454810BD33 -:10A2700070B50D46044600F068F8002819D028464D -:10A2800000F071F8002816D0A007C10EFF228A4006 -:10A29000A807000E8840002C10DA2107090F0839A2 -:10A2A0008B0835499B005B18D96991430143D961FB -:10A2B0000CE0344870BD3348401C70BDA3082F49E2 -:10A2C0009B005B181968914301431960002070BD21 -:10A2D00070B50C46054600F038F8002805D0284631 -:10A2E000FFF73EFF2070002070BD264870BDBFF311 -:10A2F0004F8F21492648C860BFF34F8FFEE770B5E6 -:10A300001F4C05462178012000290ED1207072B61D -:10A3100000F0F4F81C4E803631688143616000F033 -:10A32000EDF8C043306062B600202870002070BD98 -:10A3300013490A78002A06D0002804D1124A486836 -:10A340001060002008700020704710B504462028D7 -:10A3500007DA00F0D3F80121A140084201D1012021 -:10A3600010BD002010BD012803D0032801D000201B -:10A37000704701207047000000ED00E000E400E0BD -:10A38000300100200120000000E100E000E200E0D8 -:10A390000400FA05F8B504468007002501260028C8 -:10A3A00004DA5848C563C66302208443E00404D538 -:10A3B0005548C563C66380148443600003D5534881 -:10A3C000456080058443E00504D55148C563C663F4 -:10A3D00080158443A00404D54E48C563C663401469 -:10A3E000844360042704C00FF90F884203D04AA1B8 -:10A3F000612000F0B0FEB80F0AD04C49CD634C4844 -:10A40000C563C563CE63C663C6630320800384430C -:10A4100020050AD5474FFD632F20E6F7C5FEFE63F2 -:10A420002F20E6F7C1FEF8148443F7F7D7FF424820 -:10A43000044203D038A18D2000F08DFEF8BDF0B5A8 -:10A4400000210A46FF230446CC40E4072AD04CB240 -:10A45000E606F60E0125B540384E3560384E3560BB -:10A46000002C11DA25072D0F083DAE08354DB6003A -:10A470007719FD69A407E60E1C46B440A5431446AF -:10A48000B4402543FD610DE0A6082F4DB6007619B6 -:10A490003568A407E70E1C46BC40A5431446BC40E3 -:10A4A00025433560491C2029CDD3F0BD70B5274C1C -:10A4B0000D462060FFF76EFF2068FFF7C0FF2846BB -:10A4C000E8F766F8F7F796FEF1F792FDF7F786FFE3 -:10A4D000FFF725FEE7F7E2FE00F06AF870BD10B561 -:10A4E0001A4C2068FFF756FF2068FFF7A8FFF7F720 -:10A4F00075FFE8F7C7F80020206010BD134800681A -:10A5000070470000C01F0040C0CF004000E5014080 -:10A51000C08F0040C0DF00407372635C736F635F85 -:10A52000636F6E6669672E6300000000C0EF004035 -:10A53000C0FF0040C0BF0040FEFF0FFC80E100E014 -:10A5400080E200E000ED00E000E400E038010020DF -:10A5500070B5002402460D4620462146002A1ED032 -:10A56000012A04D0022A04D0032A1ED103E00120CC -:10A5700002E0022013E003202B0000F00DFF07167D -:10A580000507090B0D0F1600012108E0022106E066 -:10A59000032104E0042102E0052100E00621F2F796 -:10A5A00058FA002801D0204670BD0724FBE70000C0 -:10A5B000B348002101708170704770B5B14D01231F -:10A5C0006B60B14B1C68002CFCD0002407E00E68C7 -:10A5D00006601E68002EFCD0001D091D641C9442FC -:10A5E000F5D30020686018680028FCD070BD70B5F5 -:10A5F000A34C0E466178884203D0A4A16F2000F0DE -:10A60000AAFD0325330000F0C7FE09520624245298 -:10A610005252524952002078022803D09BA1732045 -:10A6200000F099FD2570A078022802D0012804D0FE -:10A6300008E0A068E8F7C6FC04E02046083007C838 -:10A64000FFF7BBFF0020A070F2F7A4F904202070F0 -:10A6500070BDF2F754FA01466068F3F769FC0646EC -:10A660002078022803D089A1872000F074FD8B4A4E -:10A670008B498C48964205D86269032A02D2521C43 -:10A68000626102E0864207D84D71801BC860844930 -:10A690006078F2F7ABFE70BD032003E0A0780028DD -:10A6A000FAD10220F2F77EF800F0E1F870BD77A150 -:10A6B000B12000F050FD70BD70B50546F2F71FFAED -:10A6C0006F4C60602078012803D070A1B82000F0A2 -:10A6D00042FD73490220087000220A718D60042235 -:10A6E0004A71704ACA6020706078F2F77FFE70BDD0 -:10A6F00010B5634CA078002802D12078002801D042 -:10A70000112010BD6848F2F78BF96070607800285E -:10A7100004D0012020700020606110BD032010BD16 -:10A7200010B50124020B64040121604BA04202D247 -:10A730009140186802E0203A58689140084000D0E3 -:10A74000012010BDF8B50E46910005464F1914467C -:10A750003F1F0091E8F747FC009980028919091F03 -:10A76000B14201D2012200E00022002C03D0FF21DF -:10A7700001318C4201D90920F8BD4D498D4219D3D0 -:10A78000AF4217D3854205D2874203D228463043D1 -:10A79000800701D01020F8BD8E420BD3002A09D1CA -:10A7A0002846FFF7BDFF002804D13846FFF7B8FF61 -:10A7B000002801D00F20F8BD3E483F49006888427C -:10A7C00005D0224631462846FFF7F7FE0FE0FFF797 -:10A7D0008FFF0028EFD12A480121C66085600461FF -:10A7E00081702046302148431830FFF765FF002074 -:10A7F000F8BD10B504462E48800A84420BD3E8F712 -:10A80000F2FBA04201D8102010BDA0020446FFF7C1 -:10A8100087FF002801D00F2010BD26482649006878 -:10A82000884203D02046E8F7CDFB0AE0FFF760FF3F -:10A830000028F1D112480221846081701F48FFF77F -:10A840003BFF002010BD1A48010B01208840401E2C -:10A85000704700B50B460246FFF7F5FF104201D0E6 -:10A860000F2000BD114802604360002000BD10B5FC -:10A87000034C6078F2F728F900202070A07010BD1A -:10A880003C01002000E5014000E401407372635C7C -:10A89000736F635F666C6173682E630030750000D0 -:10A8A000D0210020D0FB0100EFA5010000060040F0 -:10A8B00000C0010064000020BEBAFECA3A56000083 -:10A8C000F94805218170002101704170C1708160DB -:10A8D000704710B5F5490A78022A07D0CA681018DF -:10A8E000C860C8689638F3F7DBFA10BD8A6810189C -:10A8F00088608868F6E70378ED49EE4A002B02D0BD -:10A90000012B10D014E00379002B01D0012B0FD1C3 -:10A910004379002B01D0012B0AD18368643B8B4221 -:10A9200006D2C06810E00379002B03D0012B01D0C0 -:10A93000002070474379002B01D0012BF8D1C36868 -:10A94000643B8B42F4D280689042F1D8012070477A -:10A95000F8B504460226F2F731FF0068002803D05C -:10A96000D5A1BD2000F0F7FB0127CF4D002C08D06A -:10A970002078002817D0012805D0022811D00328FC -:10A9800013D02F710DE06068C82808D3F3F7FEFAE2 -:10A99000002804D06068FFF79CFF012603E0002632 -:10A9A00001E000F0FDF93046F8BD28780028F8D124 -:10A9B0006068FFF7A0FF0028E3D0606800780028F7 -:10A9C00026D0A878042803D0BBA1F72000F0C3FB51 -:10A9D000B64F0020387060680079012800D0002050 -:10A9E000387160684079002837D004207871606839 -:10A9F0008168E868F2F715FBB8606068C068963057 -:10AA0000F8600320A870A949E878F2F7EFFCC8E7DE -:10AA1000A6480221017061680979012919D0002135 -:10AA2000017161684979002915D00421417161687B -:10AA30008968963181606168C968C160C0689A4C54 -:10AA400014346060F2F75BF820606F700220A87029 -:10AA5000A7E70321E4E70321E8E70320C6E7F8B509 -:10AA6000914C0D46E178884204D0FF2092A11A3023 -:10AA700000F071FB2846002501268C4F030000F0F2 -:10AA80008BFC0906123C5E82939DCAA6CA00A07880 -:10AA9000032807D0A078022804D0FF2086A11E300A -:10AAA00000F059FBF8BDA078032807D0A078022851 -:10AAB00004D0FF2080A1223000F04DFB0420A070C4 -:10AAC00025712078002815D1FFF703FF3878022878 -:10AAD0000CD0B868E0607F49886A7F4A02402261F2 -:10AAE0007D4AD24310408862002055E0E078F2F7BA -:10AAF000BFFAEFE700F054F9F8BDA078032807D0BB -:10AB0000A078022804D0FF206BA14B3000F023FB7B -:10AB10002078002802D000F04FF9F8BDA078032873 -:10AB20001ED104202BE0081AF8606049E078F2F7A3 -:10AB30005DFCF8BD0420F1F735FEA570F8BDA078E6 -:10AB4000032807D0A078022804D0FF205AA16C3037 -:10AB500000F001FB20780028DDD1A07803280DD07B -:10AB6000F1F7CDFF504E014614363068F3F7E0F9A7 -:10AB70000028DFDB71688142DCDBD4E70520F1F7D8 -:10AB800011FEA670F8BDA078042804D0FF204AA1C9 -:10AB90008D3000F0E0FA0220A1688847FFF7D8FE68 -:10ABA000FF260546C63642E0A078042804D0FF20E0 -:10ABB00041A1923000F0CFFA0120EDE7A0780428FF -:10ABC00098D0FF203CA1973000F0C5FA92E7A0781A -:10ABD00004280AD06078002802D0A078022804D087 -:10ABE000FF2035A19C3000F0B6FA2078002892D1E1 -:10ABF0002079002804D00620F1F7D4FD2571C0E7A4 -:10AC00006078002805D02949E078F2F7EFFB6570FD -:10AC1000F8BD0720B3E7FF2027A1B73040E7002D9C -:10AC20000AD0012D06D024A1304600F094FA022D5E -:10AC3000F5D1F8BD042000E00320A1688847FFF7A4 -:10AC400087FE0546F3E770B5050005D0164CA078E1 -:10AC5000052803D0112070BD102070BD1F48F1F7EA -:10AC6000DFFEE070E078002803D0A5600020A0702F -:10AC700070BD032070BD10B50B480178002901D0CC -:10AC8000112010BD817805292AD08178012929D089 -:10AC90008178002926D0012101708178012921D0F5 -:10ACA000807800281ED01FE054010020E021002001 -:10ACB0003D860100FF1FA1077372635C736F635FC2 -:10ACC000726164696F5F74696D65736C6F742E6314 -:10ACD0000000000000050040028100005FAA0100A2 -:10ACE0000F2010BD00F068F8002010BDF8B5394EF7 -:10ACF0000446B078002801D001280DD1002C0DD0D9 -:10AD00002046FFF7F8FD00280AD02078324D0028B1 -:10AD100008D0B078012823D00F20F8BD1020F8BD4E -:10AD20000720F8BD02272F702079012814D00020B9 -:10AD300028716079002811D004206871A0689630CD -:10AD4000A860E068E860E868224C14346060F1F7BD -:10AD5000D6FE2060B77019E00320E9E70320ECE796 -:10AD6000002028702079012816D0002028716079F1 -:10AD7000002813D004206871A168F068F2F751F937 -:10AD8000A860E0689630E8600320B0701249F0785F -:10AD9000F2F72CFB0020F8BD0320E7E70320EAE7E9 -:10ADA00010B50E48816A0E4A11400A4A12691143D1 -:10ADB0008162F1F7EFFD10BD10B5064CE078F1F7B8 -:10ADC00083FE0820F1F7EEFC0520A0700020207023 -:10ADD000607010BD54010020E021002000050040FB -:10ADE000FD7EFFFF70477047034610B50B439B077E -:10ADF0000FD1042A0DD308C810C9121FA342F8D0DE -:10AE000018BA21BA884201D9012010BD0020C043E0 -:10AE100010BD002A03D0D30703D0521C07E0002046 -:10AE200010BD03780C78401C491C1B1B07D103780C -:10AE30000C78401C491C1B1B01D1921EF1D11846F5 -:10AE400010BDF8B5042A2CD3830712D00B78491C07 -:10AE50000370401C521E83070BD00B78491C0370F3 -:10AE6000401C521E830704D00B78491C0370401C01 -:10AE7000521E8B079B0F05D0C91ADF002023DE1B53 -:10AE800008C90AE0E6F7A0F9F8BD1D4608C9FD406B -:10AE90001C46B4402C4310C0121F042AF5D2F308FC -:10AEA000C91A521EF0D40B78491C0370401C521E64 -:10AEB000EAD40B78491C0370401C012AE4D40978B9 -:10AEC0000170F8BD01E004C0091F0429FBD28B0703 -:10AED00001D50280801CC90700D00270704700298C -:10AEE0000BD0C30702D00270401C491E022904D3B4 -:10AEF000830702D50280801C891EE3E70022EEE76B -:10AF00000022DFE7020A08704A70020C8A70020E03 -:10AF1000CA707047002203098B4273D3030A8B4225 -:10AF200058D3030B8B423CD3030C8B4221D312E04A -:10AF300003460B437FD4002243088B4274D303099A -:10AF40008B425FD3030A8B4244D3030B8B4228D33B -:10AF5000030C8B420DD3FF22090212BA030C8B4261 -:10AF600002D31212090265D0030B8B4219D300E001 -:10AF7000090AC30B8B4201D3CB03C01A5241830B86 -:10AF80008B4201D38B03C01A5241430B8B4201D336 -:10AF90004B03C01A5241030B8B4201D30B03C01A5F -:10AFA0005241C30A8B4201D3CB02C01A5241830AD9 -:10AFB0008B4201D38B02C01A5241430A8B4201D308 -:10AFC0004B02C01A5241030A8B4201D30B02C01A32 -:10AFD0005241CDD2C3098B4201D3CB01C01A524199 -:10AFE00083098B4201D38B01C01A524143098B4222 -:10AFF00001D34B01C01A524103098B4201D30B010B -:10B00000C01A5241C3088B4201D3CB00C01A52412F -:10B0100083088B4201D38B00C01A524143088B42F4 -:10B0200001D34B00C01A5241411A00D2014652418D -:10B03000104670475DE0CA0F00D04942031000D3AC -:10B040004042534000229C4603098B422DD3030A01 -:10B050008B4212D3FC22890112BA030A8B420CD311 -:10B06000890192118B4208D3890192118B4204D33A -:10B0700089013AD0921100E08909C3098B4201D3BA -:10B08000CB01C01A524183098B4201D38B01C01AF4 -:10B09000524143098B4201D34B01C01A524103096B -:10B0A0008B4201D30B01C01A5241C3088B4201D31A -:10B0B000CB00C01A524183088B4201D38B00C01AC7 -:10B0C0005241D9D243088B4201D34B00C01A52419E -:10B0D000411A00D20146634652415B10104601D32B -:10B0E0004042002B00D54942704763465B1000D3B5 -:10B0F000404201B50020C046C04602BD70477047BF -:10B10000704710B500F058F810BD30B58C180278B3 -:10B11000401C13071B0F01D10378401C120906D1F4 -:10B120000278401C03E00578401C0D70491C5B1E32 -:10B13000F9D101E00B70491C521EFBD1A142E6D3AC -:10B14000002030BD012308CB134B1860134B19604E -:10B15000134B1A607047134A134B13607246053A3B -:10B16000F0E7114A0F4B1B689A420ED10D4B00209D -:10B17000186001980D4B04B598470CBC9E460246DA -:10B18000029800990A4B1B68184706980599094BC5 -:10B190001B68DB6818470000780100207C01002054 -:10B1A0008001002070010020EFBEADDE4D2F0000B9 -:10B1B00098000020040000201D481E497047FFF73A -:10B1C000FBFFE5F7BBFF00BD01200007C06AC0B26E -:10B1D000FF2804D1184819490968884202D0184844 -:10B1E00018490160184819490968884203D1184A6A -:10B1F00013605B68184700BD20BFFDE71248134984 -:10B20000096888420ED1134B18680B498842F3D065 -:10B2100080F308881049884204DD10480268022142 -:10B220000A4302600E4880470E4880470E48004798 -:10B23000F0210020F0210020FFFFFFFF0010001090 -:10B240002C05004008000000001000000000002055 -:10B250000400002000C00100002000202405004060 -:10B26000632F0000C9B1010045B1010013487045CA -:10B2700002D1EFF3098101E0EFF308818869023818 -:10B280000078102814DB202810DB2B280BDB0C4A5D -:10B2900012680C4B9A4203D1602804DB0A4A10471B -:10B2A000022008607047094A10470000084A10470A -:10B2B000084A12682C32126810470000FDFFFFFF99 -:10B2C00064000020BEBAFECAAD120000991F010042 -:10B2D0001B1F0100040000200D4B0E4908470E4BB8 -:10B2E0000C4908470D4B0B4908470D4B09490847C6 -:10B2F0000C4B084908470C4B064908470B4B0549BE -:10B3000008470B4B034908470A4B0249084700000E -:10B31000B125000051220000D52B0000772A000043 -:10B32000252A0000D7270000B912000017140000DA -:10B33000392B0000472300000A7802704B784370D5 -:10B340008A788270CA78C2700B79037170470A7864 -:10B3500002704B7843708A788270CA78C2700B7919 -:10B3600003714A79427170470A7802704B784370D2 -:10B370008A788270CA78C2700B7903714A794271F7 -:10B380008A798271CB79C37170470A8802804A88B2 -:10B3900042800A790271704730B47446641E257881 -:10B3A000641CAB4200D21D46635D5B00E31830BCF9 -:10B3B00018470000FFFFFFFF0000FFFF0100030030 -:10B3C000000001000000000000000000000000007C -:10B3D00000000000870000000000000000000000E6 -:10B3E0000000000000000001020304000D0E0F1019 -:10B3F000000000000F6900002D6B0000F56B0000DD -:10B400004F6C0000A36C00000B6D00006969000028 -:10B41000216A0000AD6D0000BB7900001001100131 -:10B420003A0200001A020000040104013C00170067 -:10B4300044000E00F401FA00960064004B00320054 -:10B440001E001400010204081020408055555525A7 -:10B450002627D6BE898E555555D6BE898E0000004A -:10B460007006120DB413000014035A06A009000060 -:10B470006004F208840D0000A8B401000800002058 -:10B480001000000004110000B8B4010018000020F2 -:10B490006C0100000AB10100D8B401008401002051 -:10B4A0006C20000020110000024801688907FCD5CB -:10B4B0007047000000E200E0013536010001005451 -:10B4C0003720FB349B5F80B4800010026801337F1B -:08B4D0000102A029E449B101C9 -:00000001FF
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/PeripheralNames.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,58 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2013 Nordic Semiconductor
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define STDIO_UART_TX TX_PIN_NUMBER
-#define STDIO_UART_RX RX_PIN_NUMBER
-#define STDIO_UART UART_0
-
-typedef enum {
- UART_0 = (int)NRF_UART0_BASE
-} UARTName;
-
-
-typedef enum {
- SPI_0 = (int)NRF_SPI0_BASE,
- SPI_1 = (int)NRF_SPI1_BASE,
- SPIS = (int)NRF_SPIS1_BASE
-} SPIName;
-
-typedef enum {
- PWM_1 = 0,
- PWM_2
-} PWMName;
-
-typedef enum {
- I2C_0 = (int)NRF_TWI0_BASE,
- I2C_1 = (int)NRF_TWI1_BASE
-} I2CName;
-
-typedef enum {
- ADC0_0 = (int)NRF_ADC_BASE
-} ADCName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/PortNames.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,30 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2013 Nordic Semiconductor
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PORTNAMES_H
-#define MBED_PORTNAMES_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- Port0 = 0 //GPIO pins 0-31
-} PortName;
-
-#ifdef __cplusplus
-}
-#endif
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/PinNames.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,198 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2013 Nordic Semiconductor
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PINNAMES_H
-#define MBED_PINNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- PIN_INPUT,
- PIN_OUTPUT
-} PinDirection;
-
-#define PORT_SHIFT 3
-
-typedef enum {
- p0 = 0,
- p1 = 1,
- p2 = 2,
- p3 = 3,
- p4 = 4,
- p5 = 5,
- p6 = 6,
- p7 = 7,
- p8 = 8,
- p9 = 9,
- p10 = 10,
- p11 = 11,
- p12 = 12,
- p13 = 13,
- p14 = 14,
- p15 = 15,
- p16 = 16,
- p17 = 17,
- p18 = 18,
- p19 = 19,
- p20 = 20,
- p21 = 21,
- p22 = 22,
- p23 = 23,
- p24 = 24,
- p25 = 25,
- p26 = 26,
- p27 = 27,
- p28 = 28,
- p29 = 29,
- p30 = 30,
-
- //NORMAL PINS...
- P0_0 = p0,
- P0_1 = p1,
- P0_2 = p2,
- P0_3 = p3,
- P0_4 = p4,
- P0_5 = p5,
- P0_6 = p6,
- P0_7 = p7,
-
- P0_8 = p8,
- P0_9 = p9,
- P0_10 = p10,
- P0_11 = p11,
- P0_12 = p12,
- P0_13 = p13,
- P0_14 = p14,
- P0_15 = p15,
-
- P0_16 = p16,
- P0_17 = p17,
- P0_18 = p18,
- P0_19 = p19,
- P0_20 = p20,
- P0_21 = p21,
- P0_22 = p22,
- P0_23 = p23,
-
- P0_24 = p24,
- P0_25 = p25,
- P0_26 = p26,
- P0_27 = p27,
- P0_28 = p28,
- P0_29 = p29,
- P0_30 = p30,
-
- //PADS
- PAD3 = p1,
- PAD2 = p2,
- PAD1 = p3,
-
-
- //LED MATRIX COLS
- COL1 = p4,
- COL2 = p5,
- COL3 = p6,
- COL4 = p7,
- COL5 = p8,
- COL6 = p9,
- COL7 = p10,
- COL8 = p11,
- COL9 = p12,
-
- //LED MATRIX ROWS
- ROW1 = p13,
- ROW2 = p14,
- ROW3 = p15,
-
- //NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
- //PIN_16
-
- // BUTTON A
- BUTTON_A = p17,
-
-
- //NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
- //PIN_18
-
- //TARGET RESET
- TGT_NRESET = p19,
-
- //NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
- //PIN_20
-
- //MASTER OUT SLAVE IN
- MOSI = p21,
-
- //MASTER IN SLAVE OUT
- MISO = p22,
-
- //SERIAL CLOCK
- SCK = p23,
-
- // RX AND TX PINS
- TGT_TX = p24,
- TGT_RX = p25,
-
- //BUTTON B
- BUTTON_B = p26,
-
- //ACCEL INTERRUPT PINS (MMA8653FC)
- ACCEL_INT2 = p27,
- ACCEL_INT1 = p28,
-
- //MAGENETOMETER INTERRUPT PIN (MAG3110)
- MAG_INT1 = p29,
-
- // Not connected
- NC = (int)0xFFFFFFFF,
-
- RX_PIN_NUMBER = TGT_RX,
- TX_PIN_NUMBER = TGT_TX,
- CTS_PIN_NUMBER = 31, //unused ** REQUIRES A PROPER FIX **
- RTS_PIN_NUMBER = 31, //unused
-
- // mBed interface Pins
- USBTX = TX_PIN_NUMBER,
- USBRX = RX_PIN_NUMBER,
-
- LED1 = PAD1,
- LED2 = PAD2,
- LED3 = PAD3,
- LED4 = P0_16,
-
- //SDA (SERIAL DATA LINE)
- I2C_SDA0 = p30,
-
- //SCL (SERIAL CLOCK LINE)
- I2C_SCL0 = p0
-
-} PinName;
-
-typedef enum {
- PullNone = 0,
- PullDown = 1,
- PullUp = 3,
- PullDefault = PullUp
-} PinMode;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/device.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_DEVICE_H -#define MBED_DEVICE_H - -#define DEVICE_PORTIN 1 -#define DEVICE_PORTOUT 1 -#define DEVICE_PORTINOUT 1 - -#define DEVICE_INTERRUPTIN 1 - -#define DEVICE_ANALOGIN 1 -#define DEVICE_ANALOGOUT 0 - -#define DEVICE_SERIAL 1 - -#define DEVICE_I2C 1 -#define DEVICE_I2CSLAVE 0 - -#define DEVICE_SPI 1 -#define DEVICE_SPISLAVE 1 - -#define DEVICE_CAN 0 - -#define DEVICE_RTC 0 - -#define DEVICE_ETHERNET 0 - -#define DEVICE_PWMOUT 1 - -#define DEVICE_SEMIHOST 0 -#define DEVICE_LOCALFILESYSTEM 0 - -#define DEVICE_SLEEP 1 - -#define DEVICE_DEBUG_AWARENESS 0 - -#define DEVICE_STDIO_MESSAGES 0 - -#define DEVICE_ERROR_PATTERN 1 - -#include "objects.h" - -#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_object.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,56 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_GPIO_OBJECT_H
-#define MBED_GPIO_OBJECT_H
-
-#include "mbed_assert.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct {
- PinName pin;
- uint32_t mask;
-
- __IO uint32_t *reg_dir;
- __IO uint32_t *reg_set;
- __IO uint32_t *reg_clr;
- __I uint32_t *reg_in;
-} gpio_t;
-
-static inline void gpio_write(gpio_t *obj, int value) {
- MBED_ASSERT(obj->pin != (PinName)NC);
- if (value)
- *obj->reg_set = obj->mask;
- else
- *obj->reg_clr = obj->mask;
-}
-
-static inline int gpio_read(gpio_t *obj) {
- MBED_ASSERT(obj->pin != (PinName)NC);
- return ((*obj->reg_in & obj->mask) ? 1 : 0);
-}
-
-static inline int gpio_is_connected(const gpio_t *obj) {
- return obj->pin != (PinName)NC;
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/objects.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,86 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2013 Nordic Semiconductor
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define I2C_SPI_PERIPHERAL_FOR_I2C 1
-#define I2C_SPI_PERIPHERAL_FOR_SPI 2
-
-typedef struct {
- uint8_t usage; // I2C: 1, SPI: 2
- uint8_t sda_mosi;
- uint8_t scl_miso;
- uint8_t sclk;
-} i2c_spi_peripheral_t;
-
-struct serial_s {
- NRF_UART_Type *uart;
- int index;
-};
-
-struct spi_s {
- NRF_SPI_Type *spi;
- NRF_SPIS_Type *spis;
- uint8_t peripheral;
-};
-
-struct port_s {
- __IO uint32_t *reg_cnf;
- __IO uint32_t *reg_out;
- __I uint32_t *reg_in;
- PortName port;
- uint32_t mask;
-};
-
-struct pwmout_s {
- PWMName pwm;
- PinName pin;
-};
-
-struct i2c_s {
- NRF_TWI_Type *i2c;
- PinName sda;
- PinName scl;
- int freq;
- uint8_t address_set;
- uint8_t peripheral;
-};
-
-struct analogin_s {
- ADCName adc;
- uint8_t adc_pin;
-};
-
-struct gpio_irq_s {
- uint32_t ch;
-};
-
-#include "gpio_object.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_config.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,20 +0,0 @@ -/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved. - * - * The information contained herein is property of Nordic Semiconductor ASA. - * Terms and conditions of usage are described in detail in NORDIC - * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. - * - * Licensees are granted free, non-transferable use of the information. NO - * WARRANTY of ANY KIND is provided. This heading must NOT be removed from - * the file. - * - */ -#ifndef TWI_MASTER_CONFIG -#define TWI_MASTER_CONFIG - -#include "PinNames.h" - -#define TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER (I2C_SCL0) -#define TWI_MASTER_CONFIG_DATA_PIN_NUMBER (I2C_SDA0) - -#endif
--- a/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,108 +0,0 @@
- /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef TWI_MASTER_H
-#define TWI_MASTER_H
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*lint ++flb "Enter library region" */
-
-#include <stdbool.h>
-#include <stdint.h>
-
-/** @file
-* @brief Software controlled TWI Master driver.
-*
-*
-* @defgroup lib_driver_twi_master Software controlled TWI Master driver
-* @{
-* @ingroup nrf_drivers
-* @brief Software controlled TWI Master driver.
-*
-* Supported features:
-* - Repeated start
-* - No multi-master
-* - Only 7-bit addressing
-* - Supports clock stretching (with optional SMBus style slave timeout)
-* - Tries to handle slaves stuck in the middle of transfer
-*/
-
-#define TWI_READ_BIT (0x01) //!< If this bit is set in the address field, transfer direction is from slave to master.
-
-#define TWI_ISSUE_STOP ((bool)true) //!< Parameter for @ref twi_master_transfer
-#define TWI_DONT_ISSUE_STOP ((bool)false) //!< Parameter for @ref twi_master_transfer
-
-/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */
-/*lint -e717 -save "Suppress do {} while (0) for these macros" */
-/*lint ++flb "Enter library region" */
-#define TWI_SCL_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line high */
-#define TWI_SCL_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line low */
-#define TWI_SDA_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line high */
-#define TWI_SDA_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line low */
-#define TWI_SDA_INPUT() do { NRF_GPIO->DIRCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as input */
-#define TWI_SDA_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as output */
-#define TWI_SCL_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Configures SCL pin as output */
-/*lint -restore */
-
-#define TWI_SDA_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_DATA_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SDA */
-#define TWI_SCL_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SCL */
-
-#define TWI_DELAY() nrf_delay_us(4) /*!< Time to wait when pin states are changed. For fast-mode the delay can be zero and for standard-mode 4 us delay is sufficient. */
-
-
-/**
- * @brief Function for initializing TWI bus IO pins and checks if the bus is operational.
- *
- * Both pins are configured as Standard-0, No-drive-1 (open drain).
- *
- * @return
- * @retval true TWI bus is clear for transfers.
- * @retval false TWI bus is stuck.
- */
-bool twi_master_init_and_clear(void);
-
-/**
- * @brief Function for transferring data over TWI bus.
- *
- * If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
- * and the function returns false.
- * Bit 0 (@ref TWI_READ_BIT) in the address parameter controls transfer direction;
- * - If 1, master reads data_length number of bytes from the slave
- * - If 0, master writes data_length number of bytes to the slave.
- *
- * @note Make sure at least data_length number of bytes is allocated in data if TWI_READ_BIT is set.
- * @note @ref TWI_ISSUE_STOP
- *
- * @param address Data transfer direction (LSB) / Slave address (7 MSBs).
- * @param data Pointer to data.
- * @param data_length Number of bytes to transfer.
- * @param issue_stop_condition If @ref TWI_ISSUE_STOP, STOP condition is issued before exiting function. If @ref TWI_DONT_ISSUE_STOP, STOP condition is not issued before exiting function. If transfer failed for any reason, STOP condition will be issued in any case.
- * @return
- * @retval true Data transfer succeeded without errors.
- * @retval false Data transfer failed.
- */
-bool twi_master_transfer(uint8_t address, uint8_t *data, uint8_t data_length, bool issue_stop_condition);
-
-/**
- *@}
- **/
-
-#ifdef __cplusplus
-}
-#endif
-
-/*lint --flb "Leave library region" */
-#endif //TWI_MASTER_H
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/.archive_files.txt Wed Jul 13 15:09:26 2016 +0100 @@ -0,0 +1,1 @@ +"C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/analogin_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_irq_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/i2c_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/pinmap.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/port_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/pwmout_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/sleep.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/spi_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/TARGET_NORDIC/TARGET_MCU_NRF51822/us_ticker.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./BusIn.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./BusInOut.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./BusOut.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./CAN.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./CallChain.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Ethernet.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./FileBase.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./FileLike.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./FilePath.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./FileSystemLike.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./I2C.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./I2CSlave.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./InterruptIn.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./InterruptManager.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./LocalFileSystem.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./RawSerial.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./SPI.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./SPISlave.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Serial.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./SerialBase.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Stream.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Ticker.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Timeout.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./Timer.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./TimerEvent.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./assert.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./error.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./gpio.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./lp_ticker_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./mbed_interface.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./pinmap_common.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./rtc_time.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./semihost_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./ticker_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./us_ticker_api.o" "C:/Users/devinej/Desktop/mbed/.build/mbed/.temp/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/./wait_api.o" \ No newline at end of file
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/mbed.ar has changed
--- a/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/nRF51822.sct Thu Apr 07 17:50:29 2016 +0000
+++ b/TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/nRF51822.sct Wed Jul 13 15:09:26 2016 +0100
@@ -1,26 +1,24 @@
-;WITHOUT SOFTDEVICE:
-;LR_IROM1 0x00000000 0x00040000 {
-; ER_IROM1 0x00000000 0x00040000 {
-; *.o (RESET, +First)
-; *(InRoot$$Sections)
-; .ANY (+RO)
-; }
-; RW_IRAM1 0x20000000 0x00004000 {
-; .ANY (+RW +ZI)
-; }
-;}
-;
-;WITH SOFTDEVICE:
-
-LR_IROM1 0x18000 0x0028000 {
- ER_IROM1 0x18000 0x0028000 {
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
- RW_IRAM1 0x20002000 0x00002000 {
- .ANY (+RW +ZI)
- }
-}
-
+;WITHOUT SOFTDEVICE:
+;LR_IROM1 0x00000000 0x00040000 {
+; ER_IROM1 0x00000000 0x00040000 {
+; *.o (RESET, +First)
+; *(InRoot$$Sections)
+; .ANY (+RO)
+; }
+; RW_IRAM1 0x20000000 0x00004000 {
+; .ANY (+RW +ZI)
+; }
+;}
+;
+;WITH SOFTDEVICE:
+LR_IROM1 0x18000 0x0028000 {
+ ER_IROM1 0x18000 0x0028000 {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20002000 0x00002000 {
+ .ANY (+RW +ZI)
+ }
+}
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/retarget.o has changed
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/startup_nRF51822.o has changed
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/sys.o has changed
Binary file TARGET_NRF51_MICROBIT/TOOLCHAIN_ARM_STD/system_nrf51.o has changed
--- a/TARGET_NRF51_MICROBIT/cmsis.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,13 +0,0 @@ -/* mbed Microcontroller Library - CMSIS - * Copyright (C) 2009-2011 ARM Limited. All rights reserved. - * - * A generic CMSIS include header, pulling in LPC407x_8x specifics - */ - -#ifndef MBED_CMSIS_H -#define MBED_CMSIS_H - -#include "nrf.h" -#include "cmsis_nvic.h" - -#endif
--- a/TARGET_NRF51_MICROBIT/cmsis_nvic.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,53 +0,0 @@
-/* mbed Microcontroller Library
- * CMSIS-style functionality to support dynamic vectors
- *******************************************************************************
- * Copyright (c) 2011 ARM Limited. All rights reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of ARM Limited nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-
-#ifndef MBED_CMSIS_NVIC_H
-#define MBED_CMSIS_NVIC_H
-
-#define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals
-#define NVIC_USER_IRQ_OFFSET 16
-
-#include "nrf51.h"
-#include "cmsis.h"
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/TARGET_NRF51_MICROBIT/compiler_abstraction.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,109 +0,0 @@
-/* Copyright (c) 2013, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * * Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef _COMPILER_ABSTRACTION_H
-#define _COMPILER_ABSTRACTION_H
-
-/*lint ++flb "Enter library region" */
-
-#if defined ( __CC_ARM )
-
- #ifndef __ASM
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #endif
-
- #ifndef __INLINE
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #endif
-
- #ifndef __WEAK
- #define __WEAK __weak /*!< weak keyword for ARM Compiler */
- #endif
-
- #define GET_SP() __current_sp() /*!> read current SP function for ARM Compiler */
-
-#elif defined ( __ICCARM__ )
-
- #ifndef __ASM
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #endif
-
- #ifndef __WEAK
- #define __WEAK __weak /*!> define weak function for IAR Compiler */
- #endif
-
- #define GET_SP() __get_SP() /*!> read current SP function for IAR Compiler */
-
-#elif defined ( __GNUC__ )
-
- #ifndef __ASM
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #endif
-
- #ifndef __WEAK
- #define __WEAK __attribute__((weak)) /*!< weak keyword for GNU Compiler */
- #endif
-
- #define GET_SP() gcc_current_sp() /*!> read current SP function for GNU Compiler */
-
- static inline unsigned int gcc_current_sp(void)
- {
- register unsigned sp asm("sp");
- return sp;
- }
-
-#elif defined ( __TASKING__ )
-
- #ifndef __ASM
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #endif
-
- #ifndef __INLINE
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #endif
-
- #ifndef __WEAK
- #define __WEAK __attribute__((weak)) /*!< weak keyword for TASKING Compiler */
- #endif
-
- #define GET_SP() __get_MSP() /*!> read current SP function for TASKING Compiler */
-
-#endif
-
-/*lint --flb "Leave library region" */
-
-#endif
--- a/TARGET_NRF51_MICROBIT/core_ca9.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,271 +0,0 @@
-/**************************************************************************//**
- * @file core_ca9.h
- * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
- * @version
- * @date 25 March 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2012 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CA9_H_GENERIC
-#define __CORE_CA9_H_GENERIC
-
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_A9
- @{
- */
-
-/* CMSIS CA9 definitions */
-#define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
-#define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
- __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_A (0x09) /*!< Cortex-A Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
- #define __STATIC_ASM static __asm
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
- #define __STATIC_ASM static __asm
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
- #define __STATIC_ASM static __asm
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
- #define __STATIC_ASM static __asm
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
- #define __STATIC_ASM static __asm
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-#endif
-
-#include <stdint.h> /*!< standard types definitions */
-#include "core_caInstr.h" /*!< Core Instruction Access */
-#include "core_caFunc.h" /*!< Core Function Access */
-#include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
-
-#endif /* __CORE_CA9_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CA9_H_DEPENDANT
-#define __CORE_CA9_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CA9_REV
- #define __CA9_REV 0x0000
- #warning "__CA9_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 1
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 1
- #endif
-
- #if __Vendor_SysTickConfig == 0
- #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_A9 */
-
-
-/*******************************************************************************
- * Register Abstraction
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-A processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/*@} end of group CMSIS_CORE */
-
-/*@} end of CMSIS_Core_FPUFunctions */
-
-
-#endif /* __CORE_CA9_H_GENERIC */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-
-
-#endif
--- a/TARGET_NRF51_MICROBIT/core_caFunc.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1161 +0,0 @@
-/**************************************************************************//**
- * @file core_caFunc.h
- * @brief CMSIS Cortex-A Core Function Access Header File
- * @version V3.10
- * @date 9 May 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2012 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CAFUNC_H__
-#define __CORE_CAFUNC_H__
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-#define MODE_USR 0x10
-#define MODE_FIQ 0x11
-#define MODE_IRQ 0x12
-#define MODE_SVC 0x13
-#define MODE_MON 0x16
-#define MODE_ABT 0x17
-#define MODE_HYP 0x1A
-#define MODE_UND 0x1B
-#define MODE_SYS 0x1F
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-}
-
-
-/** \brief Get CPSR Register
-
- This function returns the content of the CPSR Register.
-
- \return CPSR Register value
- */
-__STATIC_INLINE uint32_t __get_CPSR(void)
-{
- register uint32_t __regCPSR __ASM("cpsr");
- return(__regCPSR);
-}
-
-/** \brief Set Stack Pointer
-
- This function assigns the given value to the current stack pointer.
-
- \param [in] topOfStack Stack Pointer value to set
- */
-register uint32_t __regSP __ASM("sp");
-__STATIC_INLINE void __set_SP(uint32_t topOfStack)
-{
- __regSP = topOfStack;
-}
-
-
-/** \brief Get link register
-
- This function returns the value of the link register
-
- \return Value of link register
- */
-register uint32_t __reglr __ASM("lr");
-__STATIC_INLINE uint32_t __get_LR(void)
-{
- return(__reglr);
-}
-
-/** \brief Set link register
-
- This function sets the value of the link register
-
- \param [in] lr LR value to set
- */
-__STATIC_INLINE void __set_LR(uint32_t lr)
-{
- __reglr = lr;
-}
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the USR/SYS Stack Pointer (PSP).
-
- \param [in] topOfProcStack USR/SYS Stack Pointer value to set
- */
-__STATIC_ASM void __set_PSP(uint32_t topOfProcStack)
-{
- ARM
- PRESERVE8
-
- BIC R0, R0, #7 ;ensure stack is 8-byte aligned
- MRS R1, CPSR
- CPS #MODE_SYS ;no effect in USR mode
- MOV SP, R0
- MSR CPSR_c, R1 ;no effect in USR mode
- ISB
- BX LR
-
-}
-
-/** \brief Set User Mode
-
- This function changes the processor state to User Mode
-
- \param [in] topOfProcStack USR/SYS Stack Pointer value to set
- */
-__STATIC_ASM void __set_CPS_USR(void)
-{
- ARM
-
- CPS #MODE_USR
- BX LR
-}
-
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#endif
-}
-
-/** \brief Get FPEXC
-
- This function returns the current value of the Floating Point Exception Control register.
-
- \return Floating Point Exception Control register value
- */
-__STATIC_INLINE uint32_t __get_FPEXC(void)
-{
-#if (__FPU_PRESENT == 1)
- register uint32_t __regfpexc __ASM("fpexc");
- return(__regfpexc);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPEXC
-
- This function assigns the given value to the Floating Point Exception Control register.
-
- \param [in] fpscr Floating Point Exception Control value to set
- */
-__STATIC_INLINE void __set_FPEXC(uint32_t fpexc)
-{
-#if (__FPU_PRESENT == 1)
- register uint32_t __regfpexc __ASM("fpexc");
- __regfpexc = (fpexc);
-#endif
-}
-
-/** \brief Get CPACR
-
- This function returns the current value of the Coprocessor Access Control register.
-
- \return Coprocessor Access Control register value
- */
-__STATIC_INLINE uint32_t __get_CPACR(void)
-{
- register uint32_t __regCPACR __ASM("cp15:0:c1:c0:2");
- return __regCPACR;
-}
-
-/** \brief Set CPACR
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] cpacr Coporcessor Acccess Control value to set
- */
-__STATIC_INLINE void __set_CPACR(uint32_t cpacr)
-{
- register uint32_t __regCPACR __ASM("cp15:0:c1:c0:2");
- __regCPACR = cpacr;
- __ISB();
-}
-
-/** \brief Get CBAR
-
- This function returns the value of the Configuration Base Address register.
-
- \return Configuration Base Address register value
- */
-__STATIC_INLINE uint32_t __get_CBAR() {
- register uint32_t __regCBAR __ASM("cp15:4:c15:c0:0");
- return(__regCBAR);
-}
-
-/** \brief Get TTBR0
-
- This function returns the value of the Configuration Base Address register.
-
- \return Translation Table Base Register 0 value
- */
-__STATIC_INLINE uint32_t __get_TTBR0() {
- register uint32_t __regTTBR0 __ASM("cp15:0:c2:c0:0");
- return(__regTTBR0);
-}
-
-/** \brief Set TTBR0
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] ttbr0 Translation Table Base Register 0 value to set
- */
-__STATIC_INLINE void __set_TTBR0(uint32_t ttbr0) {
- register uint32_t __regTTBR0 __ASM("cp15:0:c2:c0:0");
- __regTTBR0 = ttbr0;
- __ISB();
-}
-
-/** \brief Get DACR
-
- This function returns the value of the Domain Access Control Register.
-
- \return Domain Access Control Register value
- */
-__STATIC_INLINE uint32_t __get_DACR() {
- register uint32_t __regDACR __ASM("cp15:0:c3:c0:0");
- return(__regDACR);
-}
-
-/** \brief Set DACR
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] dacr Domain Access Control Register value to set
- */
-__STATIC_INLINE void __set_DACR(uint32_t dacr) {
- register uint32_t __regDACR __ASM("cp15:0:c3:c0:0");
- __regDACR = dacr;
- __ISB();
-}
-
-/******************************** Cache and BTAC enable ****************************************************/
-
-/** \brief Set SCTLR
-
- This function assigns the given value to the System Control Register.
-
- \param [in] sctlr System Control Register, value to set
- */
-__STATIC_INLINE void __set_SCTLR(uint32_t sctlr)
-{
- register uint32_t __regSCTLR __ASM("cp15:0:c1:c0:0");
- __regSCTLR = sctlr;
-}
-
-/** \brief Get SCTLR
-
- This function returns the value of the System Control Register.
-
- \return System Control Register value
- */
-__STATIC_INLINE uint32_t __get_SCTLR() {
- register uint32_t __regSCTLR __ASM("cp15:0:c1:c0:0");
- return(__regSCTLR);
-}
-
-/** \brief Enable Caches
-
- Enable Caches
- */
-__STATIC_INLINE void __enable_caches(void) {
- // Set I bit 12 to enable I Cache
- // Set C bit 2 to enable D Cache
- __set_SCTLR( __get_SCTLR() | (1 << 12) | (1 << 2));
-}
-
-/** \brief Disable Caches
-
- Disable Caches
- */
-__STATIC_INLINE void __disable_caches(void) {
- // Clear I bit 12 to disable I Cache
- // Clear C bit 2 to disable D Cache
- __set_SCTLR( __get_SCTLR() & ~(1 << 12) & ~(1 << 2));
- __ISB();
-}
-
-/** \brief Enable BTAC
-
- Enable BTAC
- */
-__STATIC_INLINE void __enable_btac(void) {
- // Set Z bit 11 to enable branch prediction
- __set_SCTLR( __get_SCTLR() | (1 << 11));
- __ISB();
-}
-
-/** \brief Disable BTAC
-
- Disable BTAC
- */
-__STATIC_INLINE void __disable_btac(void) {
- // Clear Z bit 11 to disable branch prediction
- __set_SCTLR( __get_SCTLR() & ~(1 << 11));
-}
-
-
-/** \brief Enable MMU
-
- Enable MMU
- */
-__STATIC_INLINE void __enable_mmu(void) {
- // Set M bit 0 to enable the MMU
- // Set AFE bit to enable simplified access permissions model
- // Clear TRE bit to disable TEX remap and A bit to disable strict alignment fault checking
- __set_SCTLR( (__get_SCTLR() & ~(1 << 28) & ~(1 << 1)) | 1 | (1 << 29));
- __ISB();
-}
-
-/** \brief Enable MMU
-
- Enable MMU
- */
-__STATIC_INLINE void __disable_mmu(void) {
- // Clear M bit 0 to disable the MMU
- __set_SCTLR( __get_SCTLR() & ~1);
- __ISB();
-}
-
-/******************************** TLB maintenance operations ************************************************/
-/** \brief Invalidate the whole tlb
-
- TLBIALL. Invalidate the whole tlb
- */
-
-__STATIC_INLINE void __ca9u_inv_tlb_all(void) {
- register uint32_t __TLBIALL __ASM("cp15:0:c8:c7:0");
- __TLBIALL = 0;
- __DSB();
- __ISB();
-}
-
-/******************************** BTB maintenance operations ************************************************/
-/** \brief Invalidate entire branch predictor array
-
- BPIALL. Branch Predictor Invalidate All.
- */
-
-__STATIC_INLINE void __v7_inv_btac(void) {
- register uint32_t __BPIALL __ASM("cp15:0:c7:c5:6");
- __BPIALL = 0;
- __DSB(); //ensure completion of the invalidation
- __ISB(); //ensure instruction fetch path sees new state
-}
-
-
-/******************************** L1 cache operations ******************************************************/
-
-/** \brief Invalidate the whole I$
-
- ICIALLU. Instruction Cache Invalidate All to PoU
- */
-__STATIC_INLINE void __v7_inv_icache_all(void) {
- register uint32_t __ICIALLU __ASM("cp15:0:c7:c5:0");
- __ICIALLU = 0;
- __DSB(); //ensure completion of the invalidation
- __ISB(); //ensure instruction fetch path sees new I cache state
-}
-
-/** \brief Clean D$ by MVA
-
- DCCMVAC. Data cache clean by MVA to PoC
- */
-__STATIC_INLINE void __v7_clean_dcache_mva(void *va) {
- register uint32_t __DCCMVAC __ASM("cp15:0:c7:c10:1");
- __DCCMVAC = (uint32_t)va;
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief Invalidate D$ by MVA
-
- DCIMVAC. Data cache invalidate by MVA to PoC
- */
-__STATIC_INLINE void __v7_inv_dcache_mva(void *va) {
- register uint32_t __DCIMVAC __ASM("cp15:0:c7:c6:1");
- __DCIMVAC = (uint32_t)va;
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief Clean and Invalidate D$ by MVA
-
- DCCIMVAC. Data cache clean and invalidate by MVA to PoC
- */
-__STATIC_INLINE void __v7_clean_inv_dcache_mva(void *va) {
- register uint32_t __DCCIMVAC __ASM("cp15:0:c7:c14:1");
- __DCCIMVAC = (uint32_t)va;
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief
- * Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency.
- */
-#pragma push
-#pragma arm
-__STATIC_ASM void __v7_all_cache(uint32_t op) {
- ARM
-
- PUSH {R4-R11}
-
- MRC p15, 1, R6, c0, c0, 1 // Read CLIDR
- ANDS R3, R6, #0x07000000 // Extract coherency level
- MOV R3, R3, LSR #23 // Total cache levels << 1
- BEQ Finished // If 0, no need to clean
-
- MOV R10, #0 // R10 holds current cache level << 1
-Loop1 ADD R2, R10, R10, LSR #1 // R2 holds cache "Set" position
- MOV R1, R6, LSR R2 // Bottom 3 bits are the Cache-type for this level
- AND R1, R1, #7 // Isolate those lower 3 bits
- CMP R1, #2
- BLT Skip // No cache or only instruction cache at this level
-
- MCR p15, 2, R10, c0, c0, 0 // Write the Cache Size selection register
- ISB // ISB to sync the change to the CacheSizeID reg
- MRC p15, 1, R1, c0, c0, 0 // Reads current Cache Size ID register
- AND R2, R1, #7 // Extract the line length field
- ADD R2, R2, #4 // Add 4 for the line length offset (log2 16 bytes)
- LDR R4, =0x3FF
- ANDS R4, R4, R1, LSR #3 // R4 is the max number on the way size (right aligned)
- CLZ R5, R4 // R5 is the bit position of the way size increment
- LDR R7, =0x7FFF
- ANDS R7, R7, R1, LSR #13 // R7 is the max number of the index size (right aligned)
-
-Loop2 MOV R9, R4 // R9 working copy of the max way size (right aligned)
-
-Loop3 ORR R11, R10, R9, LSL R5 // Factor in the Way number and cache number into R11
- ORR R11, R11, R7, LSL R2 // Factor in the Set number
- CMP R0, #0
- BNE Dccsw
- MCR p15, 0, R11, c7, c6, 2 // DCISW. Invalidate by Set/Way
- B cont
-Dccsw CMP R0, #1
- BNE Dccisw
- MCR p15, 0, R11, c7, c10, 2 // DCCSW. Clean by Set/Way
- B cont
-Dccisw MCR p15, 0, R11, c7, c14, 2 // DCCISW, Clean and Invalidate by Set/Way
-cont SUBS R9, R9, #1 // Decrement the Way number
- BGE Loop3
- SUBS R7, R7, #1 // Decrement the Set number
- BGE Loop2
-Skip ADD R10, R10, #2 // increment the cache number
- CMP R3, R10
- BGT Loop1
-
-Finished
- DSB
- POP {R4-R11}
- BX lr
-
-}
-#pragma pop
-
-/** \brief __v7_all_cache - helper function
-
- */
-
-/** \brief Invalidate the whole D$
-
- DCISW. Invalidate by Set/Way
- */
-
-__STATIC_INLINE void __v7_inv_dcache_all(void) {
- __v7_all_cache(0);
-}
-
-/** \brief Clean the whole D$
-
- DCCSW. Clean by Set/Way
- */
-
-__STATIC_INLINE void __v7_clean_dcache_all(void) {
- __v7_all_cache(1);
-}
-
-/** \brief Clean and invalidate the whole D$
-
- DCCISW. Clean and Invalidate by Set/Way
- */
-
-__STATIC_INLINE void __v7_clean_inv_dcache_all(void) {
- __v7_all_cache(2);
-}
-
-#include "core_ca_mmu.h"
-
-#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
-
-#error IAR Compiler support not implemented for Cortex-A
-
-#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
-
-/* GNU gcc specific functions */
-
-#define MODE_USR 0x10
-#define MODE_FIQ 0x11
-#define MODE_IRQ 0x12
-#define MODE_SVC 0x13
-#define MODE_MON 0x16
-#define MODE_ABT 0x17
-#define MODE_HYP 0x1A
-#define MODE_UND 0x1B
-#define MODE_SYS 0x1F
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i");
-}
-
-/** \brief Disable IRQ Interrupts
-
- This function disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __disable_irq(void)
-{
- uint32_t result;
-
- __ASM volatile ("mrs %0, cpsr" : "=r" (result));
- __ASM volatile ("cpsid i");
- return(result & 0x80);
-}
-
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
-#if 1
- uint32_t result;
-
- __ASM volatile ("mrs %0, apsr" : "=r" (result) );
- return (result);
-#else
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-#endif
-}
-
-
-/** \brief Get CPSR Register
-
- This function returns the content of the CPSR Register.
-
- \return CPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CPSR(void)
-{
-#if 1
- register uint32_t __regCPSR;
- __ASM volatile ("mrs %0, cpsr" : "=r" (__regCPSR));
-#else
- register uint32_t __regCPSR __ASM("cpsr");
-#endif
- return(__regCPSR);
-}
-
-#if 0
-/** \brief Set Stack Pointer
-
- This function assigns the given value to the current stack pointer.
-
- \param [in] topOfStack Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_SP(uint32_t topOfStack)
-{
- register uint32_t __regSP __ASM("sp");
- __regSP = topOfStack;
-}
-#endif
-
-/** \brief Get link register
-
- This function returns the value of the link register
-
- \return Value of link register
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_LR(void)
-{
- register uint32_t __reglr __ASM("lr");
- return(__reglr);
-}
-
-#if 0
-/** \brief Set link register
-
- This function sets the value of the link register
-
- \param [in] lr LR value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_LR(uint32_t lr)
-{
- register uint32_t __reglr __ASM("lr");
- __reglr = lr;
-}
-#endif
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the USR/SYS Stack Pointer (PSP).
-
- \param [in] topOfProcStack USR/SYS Stack Pointer value to set
- */
-extern void __set_PSP(uint32_t topOfProcStack);
-
-/** \brief Set User Mode
-
- This function changes the processor state to User Mode
-
- \param [in] topOfProcStack USR/SYS Stack Pointer value to set
- */
-extern void __set_CPS_USR(void);
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-#if 1
- uint32_t result;
-
- __ASM volatile ("vmrs %0, fpscr" : "=r" (result) );
- return (result);
-#else
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#endif
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-#if 1
- __ASM volatile ("vmsr fpscr, %0" : : "r" (fpscr) );
-#else
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#endif
-#endif
-}
-
-/** \brief Get FPEXC
-
- This function returns the current value of the Floating Point Exception Control register.
-
- \return Floating Point Exception Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPEXC(void)
-{
-#if (__FPU_PRESENT == 1)
-#if 1
- uint32_t result;
-
- __ASM volatile ("vmrs %0, fpexc" : "=r" (result));
- return (result);
-#else
- register uint32_t __regfpexc __ASM("fpexc");
- return(__regfpexc);
-#endif
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPEXC
-
- This function assigns the given value to the Floating Point Exception Control register.
-
- \param [in] fpscr Floating Point Exception Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPEXC(uint32_t fpexc)
-{
-#if (__FPU_PRESENT == 1)
-#if 1
- __ASM volatile ("vmsr fpexc, %0" : : "r" (fpexc));
-#else
- register uint32_t __regfpexc __ASM("fpexc");
- __regfpexc = (fpexc);
-#endif
-#endif
-}
-
-/** \brief Get CPACR
-
- This function returns the current value of the Coprocessor Access Control register.
-
- \return Coprocessor Access Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CPACR(void)
-{
-#if 1
- register uint32_t __regCPACR;
- __ASM volatile ("mrc p15, 0, %0, c1, c0, 2" : "=r" (__regCPACR));
-#else
- register uint32_t __regCPACR __ASM("cp15:0:c1:c0:2");
-#endif
- return __regCPACR;
-}
-
-/** \brief Set CPACR
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] cpacr Coporcessor Acccess Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CPACR(uint32_t cpacr)
-{
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c1, c0, 2" : : "r" (cpacr));
-#else
- register uint32_t __regCPACR __ASM("cp15:0:c1:c0:2");
- __regCPACR = cpacr;
-#endif
- __ISB();
-}
-
-/** \brief Get CBAR
-
- This function returns the value of the Configuration Base Address register.
-
- \return Configuration Base Address register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CBAR() {
-#if 1
- register uint32_t __regCBAR;
- __ASM volatile ("mrc p15, 4, %0, c15, c0, 0" : "=r" (__regCBAR));
-#else
- register uint32_t __regCBAR __ASM("cp15:4:c15:c0:0");
-#endif
- return(__regCBAR);
-}
-
-/** \brief Get TTBR0
-
- This function returns the value of the Configuration Base Address register.
-
- \return Translation Table Base Register 0 value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_TTBR0() {
-#if 1
- register uint32_t __regTTBR0;
- __ASM volatile ("mrc p15, 0, %0, c2, c0, 0" : "=r" (__regTTBR0));
-#else
- register uint32_t __regTTBR0 __ASM("cp15:0:c2:c0:0");
-#endif
- return(__regTTBR0);
-}
-
-/** \brief Set TTBR0
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] ttbr0 Translation Table Base Register 0 value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_TTBR0(uint32_t ttbr0) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r" (ttbr0));
-#else
- register uint32_t __regTTBR0 __ASM("cp15:0:c2:c0:0");
- __regTTBR0 = ttbr0;
-#endif
- __ISB();
-}
-
-/** \brief Get DACR
-
- This function returns the value of the Domain Access Control Register.
-
- \return Domain Access Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_DACR() {
-#if 1
- register uint32_t __regDACR;
- __ASM volatile ("mrc p15, 0, %0, c3, c0, 0" : "=r" (__regDACR));
-#else
- register uint32_t __regDACR __ASM("cp15:0:c3:c0:0");
-#endif
- return(__regDACR);
-}
-
-/** \brief Set DACR
-
- This function assigns the given value to the Coprocessor Access Control register.
-
- \param [in] dacr Domain Access Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_DACR(uint32_t dacr) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c3, c0, 0" : : "r" (dacr));
-#else
- register uint32_t __regDACR __ASM("cp15:0:c3:c0:0");
- __regDACR = dacr;
-#endif
- __ISB();
-}
-
-/******************************** Cache and BTAC enable ****************************************************/
-
-/** \brief Set SCTLR
-
- This function assigns the given value to the System Control Register.
-
- \param [in] sctlr System Control Register, value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_SCTLR(uint32_t sctlr)
-{
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c1, c0, 0" : : "r" (sctlr));
-#else
- register uint32_t __regSCTLR __ASM("cp15:0:c1:c0:0");
- __regSCTLR = sctlr;
-#endif
-}
-
-/** \brief Get SCTLR
-
- This function returns the value of the System Control Register.
-
- \return System Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_SCTLR() {
-#if 1
- register uint32_t __regSCTLR;
- __ASM volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (__regSCTLR));
-#else
- register uint32_t __regSCTLR __ASM("cp15:0:c1:c0:0");
-#endif
- return(__regSCTLR);
-}
-
-/** \brief Enable Caches
-
- Enable Caches
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_caches(void) {
- // Set I bit 12 to enable I Cache
- // Set C bit 2 to enable D Cache
- __set_SCTLR( __get_SCTLR() | (1 << 12) | (1 << 2));
-}
-
-/** \brief Disable Caches
-
- Disable Caches
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_caches(void) {
- // Clear I bit 12 to disable I Cache
- // Clear C bit 2 to disable D Cache
- __set_SCTLR( __get_SCTLR() & ~(1 << 12) & ~(1 << 2));
- __ISB();
-}
-
-/** \brief Enable BTAC
-
- Enable BTAC
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_btac(void) {
- // Set Z bit 11 to enable branch prediction
- __set_SCTLR( __get_SCTLR() | (1 << 11));
- __ISB();
-}
-
-/** \brief Disable BTAC
-
- Disable BTAC
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_btac(void) {
- // Clear Z bit 11 to disable branch prediction
- __set_SCTLR( __get_SCTLR() & ~(1 << 11));
-}
-
-
-/** \brief Enable MMU
-
- Enable MMU
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_mmu(void) {
- // Set M bit 0 to enable the MMU
- // Set AFE bit to enable simplified access permissions model
- // Clear TRE bit to disable TEX remap and A bit to disable strict alignment fault checking
- __set_SCTLR( (__get_SCTLR() & ~(1 << 28) & ~(1 << 1)) | 1 | (1 << 29));
- __ISB();
-}
-
-/** \brief Enable MMU
-
- Enable MMU
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_mmu(void) {
- // Clear M bit 0 to disable the MMU
- __set_SCTLR( __get_SCTLR() & ~1);
- __ISB();
-}
-
-/******************************** TLB maintenance operations ************************************************/
-/** \brief Invalidate the whole tlb
-
- TLBIALL. Invalidate the whole tlb
- */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __ca9u_inv_tlb_all(void) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c8, c7, 0" : : "r" (0));
-#else
- register uint32_t __TLBIALL __ASM("cp15:0:c8:c7:0");
- __TLBIALL = 0;
-#endif
- __DSB();
- __ISB();
-}
-
-/******************************** BTB maintenance operations ************************************************/
-/** \brief Invalidate entire branch predictor array
-
- BPIALL. Branch Predictor Invalidate All.
- */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_inv_btac(void) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c7, c5, 6" : : "r" (0));
-#else
- register uint32_t __BPIALL __ASM("cp15:0:c7:c5:6");
- __BPIALL = 0;
-#endif
- __DSB(); //ensure completion of the invalidation
- __ISB(); //ensure instruction fetch path sees new state
-}
-
-
-/******************************** L1 cache operations ******************************************************/
-
-/** \brief Invalidate the whole I$
-
- ICIALLU. Instruction Cache Invalidate All to PoU
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_inv_icache_all(void) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
-#else
- register uint32_t __ICIALLU __ASM("cp15:0:c7:c5:0");
- __ICIALLU = 0;
-#endif
- __DSB(); //ensure completion of the invalidation
- __ISB(); //ensure instruction fetch path sees new I cache state
-}
-
-/** \brief Clean D$ by MVA
-
- DCCMVAC. Data cache clean by MVA to PoC
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_clean_dcache_mva(void *va) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c7, c10, 1" : : "r" ((uint32_t)va));
-#else
- register uint32_t __DCCMVAC __ASM("cp15:0:c7:c10:1");
- __DCCMVAC = (uint32_t)va;
-#endif
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief Invalidate D$ by MVA
-
- DCIMVAC. Data cache invalidate by MVA to PoC
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_inv_dcache_mva(void *va) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" ((uint32_t)va));
-#else
- register uint32_t __DCIMVAC __ASM("cp15:0:c7:c6:1");
- __DCIMVAC = (uint32_t)va;
-#endif
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief Clean and Invalidate D$ by MVA
-
- DCCIMVAC. Data cache clean and invalidate by MVA to PoC
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_clean_inv_dcache_mva(void *va) {
-#if 1
- __ASM volatile ("mcr p15, 0, %0, c7, c14, 1" : : "r" ((uint32_t)va));
-#else
- register uint32_t __DCCIMVAC __ASM("cp15:0:c7:c14:1");
- __DCCIMVAC = (uint32_t)va;
-#endif
- __DMB(); //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief
- * Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency.
- */
-
-/** \brief __v7_all_cache - helper function
-
- */
-
-extern void __v7_all_cache(uint32_t op);
-
-
-/** \brief Invalidate the whole D$
-
- DCISW. Invalidate by Set/Way
- */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_inv_dcache_all(void) {
- __v7_all_cache(0);
-}
-
-/** \brief Clean the whole D$
-
- DCCSW. Clean by Set/Way
- */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_clean_dcache_all(void) {
- __v7_all_cache(1);
-}
-
-/** \brief Clean and invalidate the whole D$
-
- DCCISW. Clean and Invalidate by Set/Way
- */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __v7_clean_inv_dcache_all(void) {
- __v7_all_cache(2);
-}
-
-#include "core_ca_mmu.h"
-
-#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
-
-#error TASKING Compiler support not implemented for Cortex-A
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-#endif /* __CORE_CAFUNC_H__ */
--- a/TARGET_NRF51_MICROBIT/core_caInstr.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,45 +0,0 @@ -/**************************************************************************//** - * @file core_caInstr.h - * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File - * @version - * @date 04. December 2012 - * - * @note - * - ******************************************************************************/ -/* Copyright (c) 2009 - 2012 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - -#ifndef __CORE_CAINSTR_H__ -#define __CORE_CAINSTR_H__ - -#define __CORTEX_M 0x3 -#include "core_cmInstr.h" -#undef __CORTEX_M - -#endif -
--- a/TARGET_NRF51_MICROBIT/core_ca_mmu.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,848 +0,0 @@
-;/**************************************************************************//**
-; * @file core_ca_mmu.h
-; * @brief MMU Startup File for
-; * VE_A9_MP Device Series
-; * @version V1.01
-; * @date 25 March 2013
-; *
-; * @note
-; *
-; ******************************************************************************/
-;/* Copyright (c) 2012 ARM LIMITED
-;
-; All rights reserved.
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-; - Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; - Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in the
-; documentation and/or other materials provided with the distribution.
-; - Neither the name of ARM nor the names of its contributors may be used
-; to endorse or promote products derived from this software without
-; specific prior written permission.
-; *
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-; ---------------------------------------------------------------------------*/
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef _MMU_FUNC_H
-#define _MMU_FUNC_H
-
-#define SECTION_DESCRIPTOR (0x2)
-#define SECTION_MASK (0xFFFFFFFC)
-
-#define SECTION_TEXCB_MASK (0xFFFF8FF3)
-#define SECTION_B_SHIFT (2)
-#define SECTION_C_SHIFT (3)
-#define SECTION_TEX0_SHIFT (12)
-#define SECTION_TEX1_SHIFT (13)
-#define SECTION_TEX2_SHIFT (14)
-
-#define SECTION_XN_MASK (0xFFFFFFEF)
-#define SECTION_XN_SHIFT (4)
-
-#define SECTION_DOMAIN_MASK (0xFFFFFE1F)
-#define SECTION_DOMAIN_SHIFT (5)
-
-#define SECTION_P_MASK (0xFFFFFDFF)
-#define SECTION_P_SHIFT (9)
-
-#define SECTION_AP_MASK (0xFFFF73FF)
-#define SECTION_AP_SHIFT (10)
-#define SECTION_AP2_SHIFT (15)
-
-#define SECTION_S_MASK (0xFFFEFFFF)
-#define SECTION_S_SHIFT (16)
-
-#define SECTION_NG_MASK (0xFFFDFFFF)
-#define SECTION_NG_SHIFT (17)
-
-#define SECTION_NS_MASK (0xFFF7FFFF)
-#define SECTION_NS_SHIFT (19)
-
-
-#define PAGE_L1_DESCRIPTOR (0x1)
-#define PAGE_L1_MASK (0xFFFFFFFC)
-
-#define PAGE_L2_4K_DESC (0x2)
-#define PAGE_L2_4K_MASK (0xFFFFFFFD)
-
-#define PAGE_L2_64K_DESC (0x1)
-#define PAGE_L2_64K_MASK (0xFFFFFFFC)
-
-#define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
-#define PAGE_4K_B_SHIFT (2)
-#define PAGE_4K_C_SHIFT (3)
-#define PAGE_4K_TEX0_SHIFT (6)
-#define PAGE_4K_TEX1_SHIFT (7)
-#define PAGE_4K_TEX2_SHIFT (8)
-
-#define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
-#define PAGE_64K_B_SHIFT (2)
-#define PAGE_64K_C_SHIFT (3)
-#define PAGE_64K_TEX0_SHIFT (12)
-#define PAGE_64K_TEX1_SHIFT (13)
-#define PAGE_64K_TEX2_SHIFT (14)
-
-#define PAGE_TEXCB_MASK (0xFFFF8FF3)
-#define PAGE_B_SHIFT (2)
-#define PAGE_C_SHIFT (3)
-#define PAGE_TEX_SHIFT (12)
-
-#define PAGE_XN_4K_MASK (0xFFFFFFFE)
-#define PAGE_XN_4K_SHIFT (0)
-#define PAGE_XN_64K_MASK (0xFFFF7FFF)
-#define PAGE_XN_64K_SHIFT (15)
-
-
-#define PAGE_DOMAIN_MASK (0xFFFFFE1F)
-#define PAGE_DOMAIN_SHIFT (5)
-
-#define PAGE_P_MASK (0xFFFFFDFF)
-#define PAGE_P_SHIFT (9)
-
-#define PAGE_AP_MASK (0xFFFFFDCF)
-#define PAGE_AP_SHIFT (4)
-#define PAGE_AP2_SHIFT (9)
-
-#define PAGE_S_MASK (0xFFFFFBFF)
-#define PAGE_S_SHIFT (10)
-
-#define PAGE_NG_MASK (0xFFFFF7FF)
-#define PAGE_NG_SHIFT (11)
-
-#define PAGE_NS_MASK (0xFFFFFFF7)
-#define PAGE_NS_SHIFT (3)
-
-#define OFFSET_1M (0x00100000)
-#define OFFSET_64K (0x00010000)
-#define OFFSET_4K (0x00001000)
-
-#define DESCRIPTOR_FAULT (0x00000000)
-
-/* ########################### MMU Function Access ########################### */
-/** \ingroup MMU_FunctionInterface
- \defgroup MMU_Functions MMU Functions Interface
- @{
- */
-
-/* Attributes enumerations */
-
-/* Region size attributes */
-typedef enum
-{
- SECTION,
- PAGE_4k,
- PAGE_64k,
-} mmu_region_size_Type;
-
-/* Region type attributes */
-typedef enum
-{
- NORMAL,
- DEVICE,
- SHARED_DEVICE,
- NON_SHARED_DEVICE,
- STRONGLY_ORDERED
-} mmu_memory_Type;
-
-/* Region cacheability attributes */
-typedef enum
-{
- NON_CACHEABLE,
- WB_WA,
- WT,
- WB_NO_WA,
-} mmu_cacheability_Type;
-
-/* Region parity check attributes */
-typedef enum
-{
- ECC_DISABLED,
- ECC_ENABLED,
-} mmu_ecc_check_Type;
-
-/* Region execution attributes */
-typedef enum
-{
- EXECUTE,
- NON_EXECUTE,
-} mmu_execute_Type;
-
-/* Region global attributes */
-typedef enum
-{
- GLOBAL,
- NON_GLOBAL,
-} mmu_global_Type;
-
-/* Region shareability attributes */
-typedef enum
-{
- NON_SHARED,
- SHARED,
-} mmu_shared_Type;
-
-/* Region security attributes */
-typedef enum
-{
- SECURE,
- NON_SECURE,
-} mmu_secure_Type;
-
-/* Region access attributes */
-typedef enum
-{
- NO_ACCESS,
- RW,
- READ,
-} mmu_access_Type;
-
-/* Memory Region definition */
-typedef struct RegionStruct {
- mmu_region_size_Type rg_t;
- mmu_memory_Type mem_t;
- uint8_t domain;
- mmu_cacheability_Type inner_norm_t;
- mmu_cacheability_Type outer_norm_t;
- mmu_ecc_check_Type e_t;
- mmu_execute_Type xn_t;
- mmu_global_Type g_t;
- mmu_secure_Type sec_t;
- mmu_access_Type priv_t;
- mmu_access_Type user_t;
- mmu_shared_Type sh_t;
-
-} mmu_region_attributes_Type;
-
-/** \brief Set section execution-never attribute
-
- The function sets section execution-never attribute
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
-
- \return 0
- */
-__STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
-{
- *descriptor_l1 &= SECTION_XN_MASK;
- *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
- return 0;
-}
-
-/** \brief Set section domain
-
- The function sets section domain
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] domain Section domain
-
- \return 0
- */
-__STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
-{
- *descriptor_l1 &= SECTION_DOMAIN_MASK;
- *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
- return 0;
-}
-
-/** \brief Set section parity check
-
- The function sets section parity check
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
-
- \return 0
- */
-__STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
-{
- *descriptor_l1 &= SECTION_P_MASK;
- *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
- return 0;
-}
-
-/** \brief Set section access privileges
-
- The function sets section access privileges
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] user User Level Access: NO_ACCESS, RW, READ
- \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
- \param [in] afe Access flag enable
-
- \return 0
- */
-__STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
-{
- uint32_t ap = 0;
-
- if (afe == 0) { //full access
- if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
- else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
- else if ((priv == RW) && (user == READ)) { ap = 0x2; }
- else if ((priv == RW) && (user == RW)) { ap = 0x3; }
- else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
- else if ((priv == READ) && (user == READ)) { ap = 0x6; }
- }
-
- else { //Simplified access
- if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
- else if ((priv == RW) && (user == RW)) { ap = 0x3; }
- else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
- else if ((priv == READ) && (user == READ)) { ap = 0x7; }
- }
-
- *descriptor_l1 &= SECTION_AP_MASK;
- *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
- *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
-
- return 0;
-}
-
-/** \brief Set section shareability
-
- The function sets section shareability
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] s_bit Section shareability: NON_SHARED, SHARED
-
- \return 0
- */
-__STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
-{
- *descriptor_l1 &= SECTION_S_MASK;
- *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
- return 0;
-}
-
-/** \brief Set section Global attribute
-
- The function sets section Global attribute
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
-
- \return 0
- */
-__STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
-{
- *descriptor_l1 &= SECTION_NG_MASK;
- *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
- return 0;
-}
-
-/** \brief Set section Security attribute
-
- The function sets section Global attribute
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
-
- \return 0
- */
-__STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
-{
- *descriptor_l1 &= SECTION_NS_MASK;
- *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
- return 0;
-}
-
-/* Page 4k or 64k */
-/** \brief Set 4k/64k page execution-never attribute
-
- The function sets 4k/64k page execution-never attribute
-
- \param [out] descriptor_l2 L2 descriptor.
- \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
- \param [in] page Page size: PAGE_4k, PAGE_64k,
-
- \return 0
- */
-__STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
-{
- if (page == PAGE_4k)
- {
- *descriptor_l2 &= PAGE_XN_4K_MASK;
- *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
- }
- else
- {
- *descriptor_l2 &= PAGE_XN_64K_MASK;
- *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
- }
- return 0;
-}
-
-/** \brief Set 4k/64k page domain
-
- The function sets 4k/64k page domain
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] domain Page domain
-
- \return 0
- */
-__STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
-{
- *descriptor_l1 &= PAGE_DOMAIN_MASK;
- *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
- return 0;
-}
-
-/** \brief Set 4k/64k page parity check
-
- The function sets 4k/64k page parity check
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
-
- \return 0
- */
-__STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
-{
- *descriptor_l1 &= SECTION_P_MASK;
- *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
- return 0;
-}
-
-/** \brief Set 4k/64k page access privileges
-
- The function sets 4k/64k page access privileges
-
- \param [out] descriptor_l2 L2 descriptor.
- \param [in] user User Level Access: NO_ACCESS, RW, READ
- \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
- \param [in] afe Access flag enable
-
- \return 0
- */
-__STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
-{
- uint32_t ap = 0;
-
- if (afe == 0) { //full access
- if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
- else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
- else if ((priv == RW) && (user == READ)) { ap = 0x2; }
- else if ((priv == RW) && (user == RW)) { ap = 0x3; }
- else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
- else if ((priv == READ) && (user == READ)) { ap = 0x6; }
- }
-
- else { //Simplified access
- if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
- else if ((priv == RW) && (user == RW)) { ap = 0x3; }
- else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
- else if ((priv == READ) && (user == READ)) { ap = 0x7; }
- }
-
- *descriptor_l2 &= PAGE_AP_MASK;
- *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
- *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
-
- return 0;
-}
-
-/** \brief Set 4k/64k page shareability
-
- The function sets 4k/64k page shareability
-
- \param [out] descriptor_l2 L2 descriptor.
- \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
-
- \return 0
- */
-__STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
-{
- *descriptor_l2 &= PAGE_S_MASK;
- *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
- return 0;
-}
-
-/** \brief Set 4k/64k page Global attribute
-
- The function sets 4k/64k page Global attribute
-
- \param [out] descriptor_l2 L2 descriptor.
- \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
-
- \return 0
- */
-__STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
-{
- *descriptor_l2 &= PAGE_NG_MASK;
- *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
- return 0;
-}
-
-/** \brief Set 4k/64k page Security attribute
-
- The function sets 4k/64k page Global attribute
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
-
- \return 0
- */
-__STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
-{
- *descriptor_l1 &= PAGE_NS_MASK;
- *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
- return 0;
-}
-
-
-/** \brief Set Section memory attributes
-
- The function sets section memory attributes
-
- \param [out] descriptor_l1 L1 descriptor.
- \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
- \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
- \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-
- \return 0
- */
-__STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
-{
- *descriptor_l1 &= SECTION_TEXCB_MASK;
-
- if (STRONGLY_ORDERED == mem)
- {
- return 0;
- }
- else if (SHARED_DEVICE == mem)
- {
- *descriptor_l1 |= (1 << SECTION_B_SHIFT);
- }
- else if (NON_SHARED_DEVICE == mem)
- {
- *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
- }
- else if (NORMAL == mem)
- {
- *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
- switch(inner)
- {
- case NON_CACHEABLE:
- break;
- case WB_WA:
- *descriptor_l1 |= (1 << SECTION_B_SHIFT);
- break;
- case WT:
- *descriptor_l1 |= 1 << SECTION_C_SHIFT;
- break;
- case WB_NO_WA:
- *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
- break;
- }
- switch(outer)
- {
- case NON_CACHEABLE:
- break;
- case WB_WA:
- *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
- break;
- case WT:
- *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
- break;
- case WB_NO_WA:
- *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
- break;
- }
- }
-
- return 0;
-}
-
-/** \brief Set 4k/64k page memory attributes
-
- The function sets 4k/64k page memory attributes
-
- \param [out] descriptor_l2 L2 descriptor.
- \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
- \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
- \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-
- \return 0
- */
-__STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
-{
- *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
-
- if (page == PAGE_64k)
- {
- //same as section
- __memory_section(descriptor_l2, mem, outer, inner);
- }
- else
- {
- if (STRONGLY_ORDERED == mem)
- {
- return 0;
- }
- else if (SHARED_DEVICE == mem)
- {
- *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
- }
- else if (NON_SHARED_DEVICE == mem)
- {
- *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
- }
- else if (NORMAL == mem)
- {
- *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
- switch(inner)
- {
- case NON_CACHEABLE:
- break;
- case WB_WA:
- *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
- break;
- case WT:
- *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
- break;
- case WB_NO_WA:
- *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
- break;
- }
- switch(outer)
- {
- case NON_CACHEABLE:
- break;
- case WB_WA:
- *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
- break;
- case WT:
- *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
- break;
- case WB_NO_WA:
- *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
- break;
- }
- }
- }
-
- return 0;
-}
-
-/** \brief Create a L1 section descriptor
-
- The function creates a section descriptor.
-
- Assumptions:
- - 16MB super sections not suported
- - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
- - Functions always return 0
-
- \param [out] descriptor L1 descriptor
- \param [out] descriptor2 L2 descriptor
- \param [in] reg Section attributes
-
- \return 0
- */
-__STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
-{
- *descriptor = 0;
-
- __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
- __xn_section(descriptor,reg.xn_t);
- __domain_section(descriptor, reg.domain);
- __p_section(descriptor, reg.e_t);
- __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
- __shared_section(descriptor,reg.sh_t);
- __global_section(descriptor,reg.g_t);
- __secure_section(descriptor,reg.sec_t);
- *descriptor &= SECTION_MASK;
- *descriptor |= SECTION_DESCRIPTOR;
-
- return 0;
-
-}
-
-
-/** \brief Create a L1 and L2 4k/64k page descriptor
-
- The function creates a 4k/64k page descriptor.
- Assumptions:
- - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
- - Functions always return 0
-
- \param [out] descriptor L1 descriptor
- \param [out] descriptor2 L2 descriptor
- \param [in] reg 4k/64k page attributes
-
- \return 0
- */
-__STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
-{
- *descriptor = 0;
- *descriptor2 = 0;
-
- switch (reg.rg_t)
- {
- case PAGE_4k:
- __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
- __xn_page(descriptor2, reg.xn_t, PAGE_4k);
- __domain_page(descriptor, reg.domain);
- __p_page(descriptor, reg.e_t);
- __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
- __shared_page(descriptor2,reg.sh_t);
- __global_page(descriptor2,reg.g_t);
- __secure_page(descriptor,reg.sec_t);
- *descriptor &= PAGE_L1_MASK;
- *descriptor |= PAGE_L1_DESCRIPTOR;
- *descriptor2 &= PAGE_L2_4K_MASK;
- *descriptor2 |= PAGE_L2_4K_DESC;
- break;
-
- case PAGE_64k:
- __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
- __xn_page(descriptor2, reg.xn_t, PAGE_64k);
- __domain_page(descriptor, reg.domain);
- __p_page(descriptor, reg.e_t);
- __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
- __shared_page(descriptor2,reg.sh_t);
- __global_page(descriptor2,reg.g_t);
- __secure_page(descriptor,reg.sec_t);
- *descriptor &= PAGE_L1_MASK;
- *descriptor |= PAGE_L1_DESCRIPTOR;
- *descriptor2 &= PAGE_L2_64K_MASK;
- *descriptor2 |= PAGE_L2_64K_DESC;
- break;
-
- case SECTION:
- //error
- break;
-
- }
-
- return 0;
-
-}
-
-/** \brief Create a 1MB Section
-
- \param [in] ttb Translation table base address
- \param [in] base_address Section base address
- \param [in] count Number of sections to create
- \param [in] descriptor_l1 L1 descriptor (region attributes)
-
- */
-__STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
-{
- uint32_t offset;
- uint32_t entry;
- uint32_t i;
-
- offset = base_address >> 20;
- entry = (base_address & 0xFFF00000) | descriptor_l1;
-
- //4 bytes aligned
- ttb = ttb + offset;
-
- for (i = 0; i < count; i++ )
- {
- //4 bytes aligned
- *ttb++ = entry;
- entry += OFFSET_1M;
- }
-}
-
-/** \brief Create a 4k page entry
-
- \param [in] ttb L1 table base address
- \param [in] base_address 4k base address
- \param [in] count Number of 4k pages to create
- \param [in] descriptor_l1 L1 descriptor (region attributes)
- \param [in] ttb_l2 L2 table base address
- \param [in] descriptor_l2 L2 descriptor (region attributes)
-
- */
-__STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
-{
-
- uint32_t offset, offset2;
- uint32_t entry, entry2;
- uint32_t i;
-
-
- offset = base_address >> 20;
- entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
-
- //4 bytes aligned
- ttb += offset;
- //create l1_entry
- *ttb = entry;
-
- offset2 = (base_address & 0xff000) >> 12;
- ttb_l2 += offset2;
- entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
- for (i = 0; i < count; i++ )
- {
- //4 bytes aligned
- *ttb_l2++ = entry2;
- entry2 += OFFSET_4K;
- }
-}
-
-/** \brief Create a 64k page entry
-
- \param [in] ttb L1 table base address
- \param [in] base_address 64k base address
- \param [in] count Number of 64k pages to create
- \param [in] descriptor_l1 L1 descriptor (region attributes)
- \param [in] ttb_l2 L2 table base address
- \param [in] descriptor_l2 L2 descriptor (region attributes)
-
- */
-__STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
-{
- uint32_t offset, offset2;
- uint32_t entry, entry2;
- uint32_t i,j;
-
-
- offset = base_address >> 20;
- entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
-
- //4 bytes aligned
- ttb += offset;
- //create l1_entry
- *ttb = entry;
-
- offset2 = (base_address & 0xff000) >> 12;
- ttb_l2 += offset2;
- entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
- for (i = 0; i < count; i++ )
- {
- //create 16 entries
- for (j = 0; j < 16; j++)
- //4 bytes aligned
- *ttb_l2++ = entry2;
- entry2 += OFFSET_64K;
- }
-}
-
-/*@} end of MMU_Functions */
-#endif
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm0.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,682 +0,0 @@
-/**************************************************************************//**
- * @file core_cm0.h
- * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M0
- @{
- */
-
-/* CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | \
- __CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x00) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0_REV
- #define __CM0_REV 0x0000
- #warning "__CM0_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[1]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31];
- __IO uint32_t ICER[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31];
- __IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31];
- __IO uint32_t ICPR[1]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31];
- uint32_t RESERVED4[64];
- __IO uint32_t IP[8]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- uint32_t RESERVED0;
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IO uint32_t SHP[2]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
- are only accessible over DAP and not via processor. Therefore
- they are not covered by the Cortex-M0 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M0 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
-#define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
-#define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
- else {
- NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M0 system interrupts */
- else {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = ticks - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm0plus.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,793 +0,0 @@
-/**************************************************************************//**
- * @file core_cm0plus.h
- * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM0PLUS_H_GENERIC
-#define __CORE_CM0PLUS_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex-M0+
- @{
- */
-
-/* CMSIS CM0P definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM0PLUS_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
-#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16) | \
- __CM0PLUS_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x00) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM0PLUS_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0PLUS_H_DEPENDANT
-#define __CORE_CM0PLUS_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0PLUS_REV
- #define __CM0PLUS_REV 0x0000
- #warning "__CM0PLUS_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __VTOR_PRESENT
- #define __VTOR_PRESENT 0
- #warning "__VTOR_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex-M0+ */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core MPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[1]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31];
- __IO uint32_t ICER[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31];
- __IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31];
- __IO uint32_t ICPR[1]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31];
- uint32_t RESERVED4[64];
- __IO uint32_t IP[8]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
-#if (__VTOR_PRESENT == 1)
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
-#else
- uint32_t RESERVED0;
-#endif
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IO uint32_t SHP[2]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if (__VTOR_PRESENT == 1)
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 8 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 8 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
- are only accessible over DAP and not via processor. Therefore
- they are not covered by the Cortex-M0 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M0+ Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
-#define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
-#define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
- else {
- NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M0 system interrupts */
- else {
- return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = ticks - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#endif /* __CORE_CM0PLUS_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm3.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1627 +0,0 @@
-/**************************************************************************//**
- * @file core_cm3.h
- * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM3_H_GENERIC
-#define __CORE_CM3_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M3
- @{
- */
-
-/* CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
-#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | \
- __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x03) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI__VFP_SUPPORT____
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM3_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM3_H_DEPENDANT
-#define __CORE_CM3_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM3_REV
- #define __CM3_REV 0x0200
- #warning "__CM3_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M3 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24];
- __IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24];
- __IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24];
- __IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24];
- __IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56];
- __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644];
- __O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5];
- __IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#if (__CM3_REV < 0x0201) /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#else
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/** \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
- __IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-#else
- uint32_t RESERVED1[1];
-#endif
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __O union
- {
- __O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864];
- __IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15];
- __IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15];
- __IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29];
- __O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6];
- __I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __I uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __I uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __I uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __I uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __I uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __I uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __I uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __I uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __I uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1];
- __IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1];
- __IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1];
- __IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28 /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27 /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26 /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25 /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24 /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22 /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21 /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20 /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19 /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18 /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17 /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16 /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12 /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10 /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9 /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5 /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1 /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL << DWT_CTRL_CYCCNTENA_Pos) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0 /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL << DWT_CPICNT_CPICNT_Pos) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0 /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL << DWT_EXCCNT_EXCCNT_Pos) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0 /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0 /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0 /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL << DWT_MASK_MASK_Pos) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24 /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16 /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12 /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10 /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9 /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8 /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7 /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5 /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0 /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL << DWT_FUNCTION_FUNCTION_Pos) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/** \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IO uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IO uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2];
- __IO uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55];
- __IO uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131];
- __I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IO uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __I uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759];
- __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1];
- __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39];
- __IO uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IO uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8];
- __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __I uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0 /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0 /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3 /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2 /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1 /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0 /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8 /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1 /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0 /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29 /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27 /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26 /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24 /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16 /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8 /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0 /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0 /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29 /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27 /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26 /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24 /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16 /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8 /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0 /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0 /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0 /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11 /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10 /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9 /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6 /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5 /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0 /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 0 /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 4 /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/** \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/** \brief Set Priority Grouping
-
- The function sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8)); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/** \brief Get Priority Grouping
-
- The function reads the priority grouping field from the NVIC Interrupt Controller.
-
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
-}
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Get Active Interrupt
-
- The function reads the active register in NVIC and returns the active bit.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
- else {
- NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
- else {
- return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief Encode Priority
-
- The function encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
-
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- return (
- ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
- ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
- );
-}
-
-
-/** \brief Decode Priority
-
- The function decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
-
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
- *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = ticks - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief ITM Send Character
-
- The function transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
- \param [in] ch Character to transmit.
-
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
- (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0].u32 == 0);
- ITM->PORT[0].u8 = (uint8_t) ch;
- }
- return (ch);
-}
-
-
-/** \brief ITM Receive Character
-
- The function inputs a character via the external variable \ref ITM_RxBuffer.
-
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/** \brief ITM Check Character
-
- The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-#endif /* __CORE_CM3_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm4.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1772 +0,0 @@
-/**************************************************************************//**
- * @file core_cm4.h
- * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M4
- @{
- */
-
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16) | \
- __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x04) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-#include <core_cm4_simd.h> /* Compiler specific SIMD Intrinsics */
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM4_REV
- #define __CM4_REV 0x0000
- #warning "__CM4_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24];
- __IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24];
- __IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24];
- __IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24];
- __IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56];
- __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644];
- __O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5];
- __IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/** \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos 9 /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos 8 /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __O union
- {
- __O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864];
- __IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15];
- __IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15];
- __IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29];
- __O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6];
- __I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __I uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __I uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __I uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __I uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __I uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __I uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __I uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __I uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __I uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1];
- __IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1];
- __IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1];
- __IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28 /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27 /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26 /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25 /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24 /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22 /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21 /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20 /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19 /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18 /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17 /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16 /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12 /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10 /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9 /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5 /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1 /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL << DWT_CTRL_CYCCNTENA_Pos) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0 /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL << DWT_CPICNT_CPICNT_Pos) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0 /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL << DWT_EXCCNT_EXCCNT_Pos) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0 /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0 /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0 /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL << DWT_MASK_MASK_Pos) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24 /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16 /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12 /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10 /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9 /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8 /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7 /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5 /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0 /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL << DWT_FUNCTION_FUNCTION_Pos) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/** \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IO uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IO uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2];
- __IO uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55];
- __IO uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131];
- __I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IO uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __I uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759];
- __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1];
- __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39];
- __IO uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IO uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8];
- __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __I uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0 /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0 /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3 /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2 /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1 /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0 /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8 /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1 /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0 /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29 /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27 /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26 /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24 /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16 /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8 /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0 /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0 /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29 /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27 /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26 /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24 /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16 /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8 /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0 /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0 /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0 /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11 /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10 /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9 /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6 /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5 /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0 /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 0 /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 4 /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/** \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __IO uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IO uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IO uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __I uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __I uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register */
-#define FPU_FPCCR_ASPEN_Pos 31 /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30 /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8 /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6 /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5 /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4 /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3 /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1 /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0 /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL << FPU_FPCCR_LSPACT_Pos) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register */
-#define FPU_FPCAR_ADDRESS_Pos 3 /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register */
-#define FPU_FPDSCR_AHP_Pos 26 /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25 /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24 /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22 /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28 /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24 /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20 /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16 /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12 /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8 /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4 /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0 /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL << FPU_MVFR0_A_SIMD_registers_Pos) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28 /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24 /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4 /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0 /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL << FPU_MVFR1_FtZ_mode_Pos) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/** \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1)
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/** \brief Set Priority Grouping
-
- The function sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8)); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/** \brief Get Priority Grouping
-
- The function reads the priority grouping field from the NVIC Interrupt Controller.
-
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
-}
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-/* NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); enable interrupt */
- NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); /* enable interrupt */
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Get Active Interrupt
-
- The function reads the active register in NVIC and returns the active bit.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
- else {
- NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
- else {
- return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief Encode Priority
-
- The function encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
-
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- return (
- ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
- ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
- );
-}
-
-
-/** \brief Decode Priority
-
- The function decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
-
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
- *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = ticks - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief ITM Send Character
-
- The function transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
- \param [in] ch Character to transmit.
-
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
- (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0].u32 == 0);
- ITM->PORT[0].u8 = (uint8_t) ch;
- }
- return (ch);
-}
-
-
-/** \brief ITM Receive Character
-
- The function inputs a character via the external variable \ref ITM_RxBuffer.
-
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/** \brief ITM Check Character
-
- The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm4_simd.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,673 +0,0 @@
-/**************************************************************************//**
- * @file core_cm4_simd.h
- * @brief CMSIS Cortex-M4 SIMD Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM4_SIMD_H
-#define __CORE_CM4_SIMD_H
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- ******************************************************************************/
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#define __SADD8 __sadd8
-#define __QADD8 __qadd8
-#define __SHADD8 __shadd8
-#define __UADD8 __uadd8
-#define __UQADD8 __uqadd8
-#define __UHADD8 __uhadd8
-#define __SSUB8 __ssub8
-#define __QSUB8 __qsub8
-#define __SHSUB8 __shsub8
-#define __USUB8 __usub8
-#define __UQSUB8 __uqsub8
-#define __UHSUB8 __uhsub8
-#define __SADD16 __sadd16
-#define __QADD16 __qadd16
-#define __SHADD16 __shadd16
-#define __UADD16 __uadd16
-#define __UQADD16 __uqadd16
-#define __UHADD16 __uhadd16
-#define __SSUB16 __ssub16
-#define __QSUB16 __qsub16
-#define __SHSUB16 __shsub16
-#define __USUB16 __usub16
-#define __UQSUB16 __uqsub16
-#define __UHSUB16 __uhsub16
-#define __SASX __sasx
-#define __QASX __qasx
-#define __SHASX __shasx
-#define __UASX __uasx
-#define __UQASX __uqasx
-#define __UHASX __uhasx
-#define __SSAX __ssax
-#define __QSAX __qsax
-#define __SHSAX __shsax
-#define __USAX __usax
-#define __UQSAX __uqsax
-#define __UHSAX __uhsax
-#define __USAD8 __usad8
-#define __USADA8 __usada8
-#define __SSAT16 __ssat16
-#define __USAT16 __usat16
-#define __UXTB16 __uxtb16
-#define __UXTAB16 __uxtab16
-#define __SXTB16 __sxtb16
-#define __SXTAB16 __sxtab16
-#define __SMUAD __smuad
-#define __SMUADX __smuadx
-#define __SMLAD __smlad
-#define __SMLADX __smladx
-#define __SMLALD __smlald
-#define __SMLALDX __smlaldx
-#define __SMUSD __smusd
-#define __SMUSDX __smusdx
-#define __SMLSD __smlsd
-#define __SMLSDX __smlsdx
-#define __SMLSLD __smlsld
-#define __SMLSLDX __smlsldx
-#define __SEL __sel
-#define __QADD __qadd
-#define __QSUB __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
- ((int64_t)(ARG3) << 32) ) >> 32))
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#include <cmsis_iar.h>
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#include <cmsis_ccs.h>
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SMLALD(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-#define __SMLALDX(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SMLSLD(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-#define __SMLSLDX(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-/* not yet supported */
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CORE_CM4_SIMD_H */
-
-#ifdef __cplusplus
-}
-#endif
--- a/TARGET_NRF51_MICROBIT/core_cm7.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,2397 +0,0 @@
-/**************************************************************************//**
- * @file core_cm7.h
- * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version V4.10
- * @date 18. March 2015
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifndef __CORE_CM7_H_GENERIC
-#define __CORE_CM7_H_GENERIC
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M7
- @{
- */
-
-/* CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN (0x04) /*!< [31:16] CMSIS HAL main version */
-#define __CM7_CMSIS_VERSION_SUB (0x00) /*!< [15:0] CMSIS HAL sub version */
-#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16) | \
- __CM7_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x07) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __CSMC__ )
- #define __packed
- #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
- #define __INLINE inline /*use -pc99 on compile line !< inline keyword for COSMIC Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __CSMC__ ) /* Cosmic */
- #if ( __CSMC__ & 0x400) // FPU present for parser
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-#include <core_cmSimd.h> /* Compiler specific SIMD Intrinsics */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM7_H_DEPENDANT
-#define __CORE_CM7_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM7_REV
- #define __CM7_REV 0x0000
- #warning "__CM7_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __ICACHE_PRESENT
- #define __ICACHE_PRESENT 0
- #warning "__ICACHE_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DCACHE_PRESENT
- #define __DCACHE_PRESENT 0
- #warning "__DCACHE_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __DTCM_PRESENT
- #define __DTCM_PRESENT 0
- #warning "__DTCM_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 3
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M7 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31 /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30 /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29 /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28 /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27 /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16 /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0 /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31 /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30 /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29 /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28 /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27 /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos 25 /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos 24 /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16 /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos 0 /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos 2 /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1 /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0 /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24];
- __IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24];
- __IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24];
- __IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24];
- __IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56];
- __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644];
- __O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IO uint8_t SHPR[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __I uint32_t ID_PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __I uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __I uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __I uint32_t ID_MFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __I uint32_t ID_ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[1];
- __I uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */
- __I uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */
- __I uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */
- __IO uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */
- __IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
- uint32_t RESERVED3[93];
- __O uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */
- uint32_t RESERVED4[15];
- __I uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */
- __I uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */
- __I uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 1 */
- uint32_t RESERVED5[1];
- __O uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */
- uint32_t RESERVED6[1];
- __O uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */
- __O uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */
- __O uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */
- __O uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */
- __O uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */
- __O uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */
- __O uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */
- __O uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */
- uint32_t RESERVED7[6];
- __IO uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */
- __IO uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */
- __IO uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */
- __IO uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */
- __IO uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */
- uint32_t RESERVED8[1];
- __IO uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos 18 /*!< SCB CCR: Branch prediction enable bit Position */
-#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */
-
-#define SCB_CCR_IC_Pos 17 /*!< SCB CCR: Instruction cache enable bit Position */
-#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */
-
-#define SCB_CCR_DC_Pos 16 /*!< SCB CCR: Cache enable bit Position */
-#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */
-
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/* Cache Level ID register */
-#define SCB_CLIDR_LOUU_Pos 27 /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos 24 /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_FORMAT_Pos) /*!< SCB CLIDR: LoC Mask */
-
-/* Cache Type register */
-#define SCB_CTR_FORMAT_Pos 29 /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos 24 /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos 20 /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos 16 /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos 0 /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */
-
-/* Cache Size ID Register */
-#define SCB_CCSIDR_WT_Pos 31 /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk (7UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos 30 /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk (7UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos 29 /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk (7UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos 28 /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk (7UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos 13 /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3 /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos 0 /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */
-
-/* Cache Size Selection Register */
-#define SCB_CSSELR_LEVEL_Pos 1 /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos 0 /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register */
-#define SCB_STIR_INTID_Pos 0 /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register*/
-#define SCB_ITCMCR_SZ_Pos 3 /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos 2 /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos 1 /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos 0 /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Registers */
-#define SCB_DTCMCR_SZ_Pos 3 /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos 2 /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos 1 /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos 0 /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register */
-#define SCB_AHBPCR_SZ_Pos 1 /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos 0 /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register */
-#define SCB_CACR_FORCEWT_Pos 2 /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos 1 /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos 0 /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */
-
-/* AHBS control register */
-#define SCB_AHBSCR_INITCOUNT_Pos 11 /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos 2 /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos 0 /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register */
-#define SCB_ABFSR_AXIMTYPE_Pos 8 /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos 4 /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos 3 /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos 2 /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos 1 /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos 0 /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/** \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12 /*!< ACTLR: DISITMATBFLUSH Position */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */
-
-#define SCnSCB_ACTLR_DISRAMODE_Pos 11 /*!< ACTLR: DISRAMODE Position */
-#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */
-
-#define SCnSCB_ACTLR_FPEXCODIS_Pos 10 /*!< ACTLR: FPEXCODIS Position */
-#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __O union
- {
- __O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864];
- __IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15];
- __IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15];
- __IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29];
- __O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6];
- __I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __I uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __I uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __I uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __I uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __I uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __I uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __I uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __I uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __I uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1];
- __IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1];
- __IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1];
- __IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
- uint32_t RESERVED3[981];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28 /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27 /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26 /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25 /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24 /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22 /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21 /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20 /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19 /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18 /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17 /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16 /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12 /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10 /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9 /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5 /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1 /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0 /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0 /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0 /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0 /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0 /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24 /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16 /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12 /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10 /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9 /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8 /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7 /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5 /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0 /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/** \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IO uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IO uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2];
- __IO uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55];
- __IO uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131];
- __I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IO uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __I uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759];
- __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1];
- __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39];
- __IO uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IO uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8];
- __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __I uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0 /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0 /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3 /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2 /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1 /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0 /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8 /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1 /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0 /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29 /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27 /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26 /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24 /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16 /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8 /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0 /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0 /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29 /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27 /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26 /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24 /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16 /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8 /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0 /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0 /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0 /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11 /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10 /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9 /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6 /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5 /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0 /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos 4 /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos 0 /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/** \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __IO uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IO uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IO uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __I uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __I uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
- __I uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register */
-#define FPU_FPCCR_ASPEN_Pos 31 /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30 /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8 /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6 /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5 /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4 /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3 /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1 /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0 /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register */
-#define FPU_FPCAR_ADDRESS_Pos 3 /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register */
-#define FPU_FPDSCR_AHP_Pos 26 /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25 /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24 /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22 /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28 /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24 /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20 /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16 /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12 /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8 /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4 /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0 /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28 /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24 /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4 /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0 /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/* Media and FP Feature Register 2 */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/** \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1)
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/** \brief Set Priority Grouping
-
- The function sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8) ); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/** \brief Get Priority Grouping
-
- The function reads the priority grouping field from the NVIC Interrupt Controller.
-
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/** \brief Get Active Interrupt
-
- The function reads the active register in NVIC and returns the active bit.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if((int32_t)IRQn < 0) {
- SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else {
- NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if((int32_t)IRQn < 0) {
- return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8 - __NVIC_PRIO_BITS)));
- }
- else {
- return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8 - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/** \brief Encode Priority
-
- The function encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/** \brief Decode Priority
-
- The function decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- while(1) { __NOP(); } /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ########################## FPU functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_FpuFunctions FPU Functions
- \brief Function that provides FPU type.
- @{
- */
-
-/**
- \fn uint32_t SCB_GetFPUType(void)
- \brief get FPU type
- \returns
- - \b 0: No FPU
- - \b 1: Single precision FPU
- - \b 2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
- uint32_t mvfr0;
-
- mvfr0 = SCB->MVFR0;
- if ((mvfr0 & 0x00000FF0UL) == 0x220UL) {
- return 2UL; // Double + Single precision FPU
- } else if ((mvfr0 & 0x00000FF0UL) == 0x020UL) {
- return 1UL; // Single precision FPU
- } else {
- return 0UL; // No FPU
- }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ########################## Cache functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_CacheFunctions Cache Functions
- \brief Functions that configure Instruction and Data cache.
- @{
- */
-
-/* Cache Size ID Register Macros */
-#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
-#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
-#define CCSIDR_LSSHIFT(x) (((x) & SCB_CCSIDR_LINESIZE_Msk ) /*>> SCB_CCSIDR_LINESIZE_Pos*/ )
-
-
-/** \brief Enable I-Cache
-
- The function turns on I-Cache
- */
-__STATIC_INLINE void SCB_EnableICache (void)
-{
- #if (__ICACHE_PRESENT == 1)
- __DSB();
- __ISB();
- SCB->ICIALLU = 0UL; // invalidate I-Cache
- SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; // enable I-Cache
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Disable I-Cache
-
- The function turns off I-Cache
- */
-__STATIC_INLINE void SCB_DisableICache (void)
-{
- #if (__ICACHE_PRESENT == 1)
- __DSB();
- __ISB();
- SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; // disable I-Cache
- SCB->ICIALLU = 0UL; // invalidate I-Cache
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Invalidate I-Cache
-
- The function invalidates I-Cache
- */
-__STATIC_INLINE void SCB_InvalidateICache (void)
-{
- #if (__ICACHE_PRESENT == 1)
- __DSB();
- __ISB();
- SCB->ICIALLU = 0UL;
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Enable D-Cache
-
- The function turns on D-Cache
- */
-__STATIC_INLINE void SCB_EnableDCache (void)
-{
- #if (__DCACHE_PRESENT == 1)
- uint32_t ccsidr, sshift, wshift, sw;
- uint32_t sets, ways;
-
- SCB->CSSELR = (0UL << 1) | 0UL; // Level 1 data cache
- ccsidr = SCB->CCSIDR;
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- sshift = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- wshift = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
-
- __DSB();
-
- do { // invalidate D-Cache
- uint32_t tmpways = ways;
- do {
- sw = ((tmpways << wshift) | (sets << sshift));
- SCB->DCISW = sw;
- } while(tmpways--);
- } while(sets--);
- __DSB();
-
- SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; // enable D-Cache
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Disable D-Cache
-
- The function turns off D-Cache
- */
-__STATIC_INLINE void SCB_DisableDCache (void)
-{
- #if (__DCACHE_PRESENT == 1)
- uint32_t ccsidr, sshift, wshift, sw;
- uint32_t sets, ways;
-
- SCB->CSSELR = (0UL << 1) | 0UL; // Level 1 data cache
- ccsidr = SCB->CCSIDR;
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- sshift = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- wshift = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
-
- __DSB();
-
- SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; // disable D-Cache
-
- do { // clean & invalidate D-Cache
- uint32_t tmpways = ways;
- do {
- sw = ((tmpways << wshift) | (sets << sshift));
- SCB->DCCISW = sw;
- } while(tmpways--);
- } while(sets--);
-
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Invalidate D-Cache
-
- The function invalidates D-Cache
- */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
-{
- #if (__DCACHE_PRESENT == 1)
- uint32_t ccsidr, sshift, wshift, sw;
- uint32_t sets, ways;
-
- SCB->CSSELR = (0UL << 1) | 0UL; // Level 1 data cache
- ccsidr = SCB->CCSIDR;
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- sshift = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- wshift = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
-
- __DSB();
-
- do { // invalidate D-Cache
- uint32_t tmpways = ways;
- do {
- sw = ((tmpways << wshift) | (sets << sshift));
- SCB->DCISW = sw;
- } while(tmpways--);
- } while(sets--);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Clean D-Cache
-
- The function cleans D-Cache
- */
-__STATIC_INLINE void SCB_CleanDCache (void)
-{
- #if (__DCACHE_PRESENT == 1)
- uint32_t ccsidr, sshift, wshift, sw;
- uint32_t sets, ways;
-
- SCB->CSSELR = (0UL << 1) | 0UL; // Level 1 data cache
- ccsidr = SCB->CCSIDR;
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- sshift = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- wshift = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
-
- __DSB();
-
- do { // clean D-Cache
- uint32_t tmpways = ways;
- do {
- sw = ((tmpways << wshift) | (sets << sshift));
- SCB->DCCSW = sw;
- } while(tmpways--);
- } while(sets--);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/** \brief Clean & Invalidate D-Cache
-
- The function cleans and Invalidates D-Cache
- */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
-{
- #if (__DCACHE_PRESENT == 1)
- uint32_t ccsidr, sshift, wshift, sw;
- uint32_t sets, ways;
-
- SCB->CSSELR = (0UL << 1) | 0UL; // Level 1 data cache
- ccsidr = SCB->CCSIDR;
- sets = (uint32_t)(CCSIDR_SETS(ccsidr));
- sshift = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
- ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
- wshift = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
-
- __DSB();
-
- do { // clean & invalidate D-Cache
- uint32_t tmpways = ways;
- do {
- sw = ((tmpways << wshift) | (sets << sshift));
- SCB->DCCISW = sw;
- } while(tmpways--);
- } while(sets--);
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \fn void SCB_InvalidateDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
- \brief D-Cache Invalidate by address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if (__DCACHE_PRESENT == 1)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t)addr;
- uint32_t linesize = 32UL; // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCIMVAC = op_addr;
- op_addr += linesize;
- op_size -= (int32_t)linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \fn void SCB_CleanDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
- \brief D-Cache Clean by address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if (__DCACHE_PRESENT == 1)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t) addr;
- uint32_t linesize = 32UL; // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCCMVAC = op_addr;
- op_addr += linesize;
- op_size -= (int32_t)linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/**
- \fn void SCB_CleanInvalidateDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
- \brief D-Cache Clean and Invalidate by address
- \param[in] addr address (aligned to 32-byte boundary)
- \param[in] dsize size of memory block (in number of bytes)
-*/
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
- #if (__DCACHE_PRESENT == 1)
- int32_t op_size = dsize;
- uint32_t op_addr = (uint32_t) addr;
- uint32_t linesize = 32UL; // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
- __DSB();
-
- while (op_size > 0) {
- SCB->DCCIMVAC = op_addr;
- op_addr += linesize;
- op_size -= (int32_t)linesize;
- }
-
- __DSB();
- __ISB();
- #endif
-}
-
-
-/*@} end of CMSIS_Core_CacheFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); } /* Reload value impossible */
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief ITM Send Character
-
- The function transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
- \param [in] ch Character to transmit.
-
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0].u32 == 0UL) { __NOP(); }
- ITM->PORT[0].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/** \brief ITM Receive Character
-
- The function inputs a character via the external variable \ref ITM_RxBuffer.
-
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/** \brief ITM Check Character
-
- The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
--- a/TARGET_NRF51_MICROBIT/core_cmFunc.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,636 +0,0 @@
-/**************************************************************************//**
- * @file core_cmFunc.h
- * @brief CMSIS Cortex-M Core Function Access Header File
- * @version V3.20
- * @date 25. February 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* intrinsic void __enable_irq(); */
-/* intrinsic void __disable_irq(); */
-
-/** \brief Get Control Register
-
- This function returns the content of the Control Register.
-
- \return Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- register uint32_t __regControl __ASM("control");
- return(__regControl);
-}
-
-
-/** \brief Set Control Register
-
- This function writes the given value to the Control Register.
-
- \param [in] control Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- register uint32_t __regControl __ASM("control");
- __regControl = control;
-}
-
-
-/** \brief Get IPSR Register
-
- This function returns the content of the IPSR Register.
-
- \return IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
- register uint32_t __regIPSR __ASM("ipsr");
- return(__regIPSR);
-}
-
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-}
-
-
-/** \brief Get xPSR Register
-
- This function returns the content of the xPSR Register.
-
- \return xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
- register uint32_t __regXPSR __ASM("xpsr");
- return(__regXPSR);
-}
-
-
-/** \brief Get Process Stack Pointer
-
- This function returns the current value of the Process Stack Pointer (PSP).
-
- \return PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- return(__regProcessStackPointer);
-}
-
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the Process Stack Pointer (PSP).
-
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- __regProcessStackPointer = topOfProcStack;
-}
-
-
-/** \brief Get Main Stack Pointer
-
- This function returns the current value of the Main Stack Pointer (MSP).
-
- \return MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- return(__regMainStackPointer);
-}
-
-
-/** \brief Set Main Stack Pointer
-
- This function assigns the given value to the Main Stack Pointer (MSP).
-
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- __regMainStackPointer = topOfMainStack;
-}
-
-
-/** \brief Get Priority Mask
-
- This function returns the current state of the priority mask bit from the Priority Mask Register.
-
- \return Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- register uint32_t __regPriMask __ASM("primask");
- return(__regPriMask);
-}
-
-
-/** \brief Set Priority Mask
-
- This function assigns the given value to the Priority Mask Register.
-
- \param [in] priMask Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- register uint32_t __regPriMask __ASM("primask");
- __regPriMask = (priMask);
-}
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/** \brief Get Base Priority
-
- This function returns the current value of the Base Priority register.
-
- \return Base Priority register value
- */
-__STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- register uint32_t __regBasePri __ASM("basepri");
- return(__regBasePri);
-}
-
-
-/** \brief Set Base Priority
-
- This function assigns the given value to the Base Priority register.
-
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
- register uint32_t __regBasePri __ASM("basepri");
- __regBasePri = (basePri & 0xff);
-}
-
-
-/** \brief Get Fault Mask
-
- This function returns the current value of the Fault Mask register.
-
- \return Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- return(__regFaultMask);
-}
-
-
-/** \brief Set Fault Mask
-
- This function assigns the given value to the Fault Mask register.
-
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if (__CORTEX_M == 0x04)
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) */
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/** \brief Enable IRQ Interrupts
-
- This function enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/** \brief Disable IRQ Interrupts
-
- This function disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
- __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/** \brief Get Control Register
-
- This function returns the content of the Control Register.
-
- \return Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Control Register
-
- This function writes the given value to the Control Register.
-
- \param [in] control Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-/** \brief Get IPSR Register
-
- This function returns the content of the IPSR Register.
-
- \return IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get xPSR Register
-
- This function returns the content of the xPSR Register.
-
- \return xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get Process Stack Pointer
-
- This function returns the current value of the Process Stack Pointer (PSP).
-
- \return PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the Process Stack Pointer (PSP).
-
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
-}
-
-
-/** \brief Get Main Stack Pointer
-
- This function returns the current value of the Main Stack Pointer (MSP).
-
- \return MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Main Stack Pointer
-
- This function assigns the given value to the Main Stack Pointer (MSP).
-
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
-}
-
-
-/** \brief Get Priority Mask
-
- This function returns the current state of the priority mask bit from the Priority Mask Register.
-
- \return Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Priority Mask
-
- This function assigns the given value to the Priority Mask Register.
-
- \param [in] priMask Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
- __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
- __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/** \brief Get Base Priority
-
- This function returns the current value of the Base Priority register.
-
- \return Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Base Priority
-
- This function assigns the given value to the Base Priority register.
-
- \param [in] basePri Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-/** \brief Get Fault Mask
-
- This function returns the current value of the Fault Mask register.
-
- \return Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Fault Mask
-
- This function assigns the given value to the Fault Mask register.
-
- \param [in] faultMask Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if (__CORTEX_M == 0x04)
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- uint32_t result;
-
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
- __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- __ASM volatile ("");
- return(result);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
- __ASM volatile ("");
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) */
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all instrinsics,
- * Including the CMSIS ones.
- */
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-#endif /* __CORE_CMFUNC_H */
--- a/TARGET_NRF51_MICROBIT/core_cmInstr.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,688 +0,0 @@
-/**************************************************************************//**
- * @file core_cmInstr.h
- * @brief CMSIS Cortex-M Core Instruction Access Header File
- * @version V3.20
- * @date 05. March 2013
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2013 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-
-/** \brief No Operation
-
- No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __nop
-
-
-/** \brief Wait For Interrupt
-
- Wait For Interrupt is a hint instruction that suspends execution
- until one of a number of events occurs.
- */
-#define __WFI __wfi
-
-
-/** \brief Wait For Event
-
- Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __wfe
-
-
-/** \brief Send Event
-
- Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __sev
-
-
-/** \brief Instruction Synchronization Barrier
-
- Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or
- memory, after the instruction has been completed.
- */
-#define __ISB() __isb(0xF)
-
-
-/** \brief Data Synchronization Barrier
-
- This function acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() __dsb(0xF)
-
-
-/** \brief Data Memory Barrier
-
- This function ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() __dmb(0xF)
-
-
-/** \brief Reverse byte order (32 bit)
-
- This function reverses the byte order in integer value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV __rev
-
-
-/** \brief Reverse byte order (16 bit)
-
- This function reverses the byte order in two unsigned short values.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
- rev16 r0, r0
- bx lr
-}
-#endif
-
-/** \brief Reverse byte order in signed short value
-
- This function reverses the byte order in a signed short value with sign extension to integer.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
-{
- revsh r0, r0
- bx lr
-}
-#endif
-
-
-/** \brief Rotate Right in unsigned value (32 bit)
-
- This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-#define __ROR __ror
-
-
-/** \brief Breakpoint
-
- This function causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __breakpoint(value)
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Reverse bit order of value
-
- This function reverses the bit order of the given value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __RBIT __rbit
-
-
-/** \brief LDR Exclusive (8 bit)
-
- This function performs a exclusive LDR command for 8 bit value.
-
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
-
-
-/** \brief LDR Exclusive (16 bit)
-
- This function performs a exclusive LDR command for 16 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
-
-
-/** \brief LDR Exclusive (32 bit)
-
- This function performs a exclusive LDR command for 32 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
-
-
-/** \brief STR Exclusive (8 bit)
-
- This function performs a exclusive STR command for 8 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXB(value, ptr) __strex(value, ptr)
-
-
-/** \brief STR Exclusive (16 bit)
-
- This function performs a exclusive STR command for 16 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXH(value, ptr) __strex(value, ptr)
-
-
-/** \brief STR Exclusive (32 bit)
-
- This function performs a exclusive STR command for 32 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXW(value, ptr) __strex(value, ptr)
-
-
-/** \brief Remove the exclusive lock
-
- This function removes the exclusive lock which is created by LDREX.
-
- */
-#define __CLREX __clrex
-
-
-/** \brief Signed Saturate
-
- This function saturates a signed value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT __ssat
-
-
-/** \brief Unsigned Saturate
-
- This function saturates an unsigned value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __usat
-
-
-/** \brief Count leading zeros
-
- This function counts the number of leading zeros of a data value.
-
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __clz
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constrant "l"
- * Otherwise, use general registers, specified by constrant "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/** \brief No Operation
-
- No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
-{
- __ASM volatile ("nop");
-}
-
-
-/** \brief Wait For Interrupt
-
- Wait For Interrupt is a hint instruction that suspends execution
- until one of a number of events occurs.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
-{
- __ASM volatile ("wfi");
-}
-
-
-/** \brief Wait For Event
-
- Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
-{
- __ASM volatile ("wfe");
-}
-
-
-/** \brief Send Event
-
- Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
-{
- __ASM volatile ("sev");
-}
-
-
-/** \brief Instruction Synchronization Barrier
-
- Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or
- memory, after the instruction has been completed.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
-{
- __ASM volatile ("isb");
-}
-
-
-/** \brief Data Synchronization Barrier
-
- This function acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
-{
- __ASM volatile ("dsb");
-}
-
-
-/** \brief Data Memory Barrier
-
- This function ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
-{
- __ASM volatile ("dmb");
-}
-
-
-/** \brief Reverse byte order (32 bit)
-
- This function reverses the byte order in integer value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
- return __builtin_bswap32(value);
-#else
- uint32_t result;
-
- __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-#endif
-}
-
-
-/** \brief Reverse byte order (16 bit)
-
- This function reverses the byte order in two unsigned short values.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/** \brief Reverse byte order in signed short value
-
- This function reverses the byte order in a signed short value with sign extension to integer.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- return (short)__builtin_bswap16(value);
-#else
- uint32_t result;
-
- __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-#endif
-}
-
-
-/** \brief Rotate Right in unsigned value (32 bit)
-
- This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
- return (op1 >> op2) | (op1 << (32 - op2));
-}
-
-
-/** \brief Breakpoint
-
- This function causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __ASM volatile ("bkpt "#value)
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Reverse bit order of value
-
- This function reverses the bit order of the given value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-
-/** \brief LDR Exclusive (8 bit)
-
- This function performs a exclusive LDR command for 8 bit value.
-
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return(result);
-}
-
-
-/** \brief LDR Exclusive (16 bit)
-
- This function performs a exclusive LDR command for 16 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return(result);
-}
-
-
-/** \brief LDR Exclusive (32 bit)
-
- This function performs a exclusive LDR command for 32 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (8 bit)
-
- This function performs a exclusive STR command for 8 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (16 bit)
-
- This function performs a exclusive STR command for 16 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (32 bit)
-
- This function performs a exclusive STR command for 32 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- return(result);
-}
-
-
-/** \brief Remove the exclusive lock
-
- This function removes the exclusive lock which is created by LDREX.
-
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
-{
- __ASM volatile ("clrex" ::: "memory");
-}
-
-
-/** \brief Signed Saturate
-
- This function saturates a signed value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/** \brief Unsigned Saturate
-
- This function saturates an unsigned value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/** \brief Count leading zeros
-
- This function counts the number of leading zeros of a data value.
-
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
--- a/TARGET_NRF51_MICROBIT/core_cmSimd.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,697 +0,0 @@
-/**************************************************************************//**
- * @file core_cmSimd.h
- * @brief CMSIS Cortex-M SIMD Header File
- * @version V4.10
- * @date 18. March 2015
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2014 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifndef __CORE_CMSIMD_H
-#define __CORE_CMSIMD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- ******************************************************************************/
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-#define __SADD8 __sadd8
-#define __QADD8 __qadd8
-#define __SHADD8 __shadd8
-#define __UADD8 __uadd8
-#define __UQADD8 __uqadd8
-#define __UHADD8 __uhadd8
-#define __SSUB8 __ssub8
-#define __QSUB8 __qsub8
-#define __SHSUB8 __shsub8
-#define __USUB8 __usub8
-#define __UQSUB8 __uqsub8
-#define __UHSUB8 __uhsub8
-#define __SADD16 __sadd16
-#define __QADD16 __qadd16
-#define __SHADD16 __shadd16
-#define __UADD16 __uadd16
-#define __UQADD16 __uqadd16
-#define __UHADD16 __uhadd16
-#define __SSUB16 __ssub16
-#define __QSUB16 __qsub16
-#define __SHSUB16 __shsub16
-#define __USUB16 __usub16
-#define __UQSUB16 __uqsub16
-#define __UHSUB16 __uhsub16
-#define __SASX __sasx
-#define __QASX __qasx
-#define __SHASX __shasx
-#define __UASX __uasx
-#define __UQASX __uqasx
-#define __UHASX __uhasx
-#define __SSAX __ssax
-#define __QSAX __qsax
-#define __SHSAX __shsax
-#define __USAX __usax
-#define __UQSAX __uqsax
-#define __UHSAX __uhsax
-#define __USAD8 __usad8
-#define __USADA8 __usada8
-#define __SSAT16 __ssat16
-#define __USAT16 __usat16
-#define __UXTB16 __uxtb16
-#define __UXTAB16 __uxtab16
-#define __SXTB16 __sxtb16
-#define __SXTAB16 __sxtab16
-#define __SMUAD __smuad
-#define __SMUADX __smuadx
-#define __SMLAD __smlad
-#define __SMLADX __smladx
-#define __SMLALD __smlald
-#define __SMLALDX __smlaldx
-#define __SMUSD __smusd
-#define __SMUSDX __smusdx
-#define __SMLSD __smlsd
-#define __SMLSDX __smlsdx
-#define __SMLSLD __smlsld
-#define __SMLSLDX __smlsldx
-#define __SEL __sel
-#define __QADD __qadd
-#define __QSUB __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
- ((int64_t)(ARG3) << 32) ) >> 32))
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ // Little endian
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else // Big endian
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ // Little endian
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else // Big endian
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ // Little endian
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else // Big endian
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ // Little endian
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else // Big endian
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-/* not yet supported */
-
-
-#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
-/* Cosmic specific functions */
-#include <cmsis_csm.h>
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CMSIMD_H */
--- a/TARGET_NRF51_MICROBIT/nrf.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,48 +0,0 @@ -/* Copyright (c) 2013, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_H -#define NRF_H - -#ifndef _WIN32 - -/* Family selection for main includes. NRF51 must be selected. */ -#ifdef NRF51 - #include "nrf51.h" - #include "nrf51_bitfields.h" -#else - #error "Device family must be defined. See nrf.h." -#endif /* NRF51 */ - -#include "compiler_abstraction.h" - -#endif /* _WIN32 */ - -#endif /* NRF_H */ -
--- a/TARGET_NRF51_MICROBIT/nrf51.h Thu Apr 07 17:50:29 2016 +0000 +++ b/TARGET_NRF51_MICROBIT/nrf51.h Wed Jul 13 15:09:26 2016 +0100 @@ -1,35 +1,35 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - +/* + * Copyright (c) Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of other + * contributors to this software may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + #ifndef NRF51_H #define NRF51_H
--- a/TARGET_NRF51_MICROBIT/nrf51_bitfields.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,7135 +0,0 @@ -/* Copyright (c) 2013, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * * Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef __NRF51_BITS_H -#define __NRF51_BITS_H - -/*lint ++flb "Enter library region */ - -#include <core_cm0.h> - -/* Peripheral: AAR */ -/* Description: Accelerated Address Resolver. */ - -/* Register: AAR_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 2 : Enable interrupt on NOTRESOLVED event. */ -#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on RESOLVED event. */ -#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on END event. */ -#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: AAR_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 2 : Disable interrupt on NOTRESOLVED event. */ -#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ -#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on RESOLVED event. */ -#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ -#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on ENDKSGEN event. */ -#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ -#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define AAR_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define AAR_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: AAR_STATUS */ -/* Description: Resolution status. */ - -/* Bits 3..0 : The IRK used last time an address was resolved. */ -#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ - -/* Register: AAR_ENABLE */ -/* Description: Enable AAR. */ - -/* Bits 1..0 : Enable AAR. */ -#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define AAR_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled AAR. */ -#define AAR_ENABLE_ENABLE_Enabled (0x03UL) /*!< Enable AAR. */ - -/* Register: AAR_NIRK */ -/* Description: Number of Identity root Keys in the IRK data structure. */ - -/* Bits 4..0 : Number of Identity root Keys in the IRK data structure. */ -#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ -#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ - -/* Register: AAR_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define AAR_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define AAR_POWER_POWER_Msk (0x1UL << AAR_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define AAR_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define AAR_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: ADC */ -/* Description: Analog to digital converter. */ - -/* Register: ADC_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 0 : Enable interrupt on END event. */ -#define ADC_INTENSET_END_Pos (0UL) /*!< Position of END field. */ -#define ADC_INTENSET_END_Msk (0x1UL << ADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define ADC_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define ADC_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define ADC_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: ADC_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 0 : Disable interrupt on END event. */ -#define ADC_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ -#define ADC_INTENCLR_END_Msk (0x1UL << ADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define ADC_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define ADC_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define ADC_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: ADC_BUSY */ -/* Description: ADC busy register. */ - -/* Bit 0 : ADC busy register. */ -#define ADC_BUSY_BUSY_Pos (0UL) /*!< Position of BUSY field. */ -#define ADC_BUSY_BUSY_Msk (0x1UL << ADC_BUSY_BUSY_Pos) /*!< Bit mask of BUSY field. */ -#define ADC_BUSY_BUSY_Ready (0UL) /*!< No ongoing ADC conversion is taking place. ADC is ready. */ -#define ADC_BUSY_BUSY_Busy (1UL) /*!< An ADC conversion is taking place. ADC is busy. */ - -/* Register: ADC_ENABLE */ -/* Description: ADC enable. */ - -/* Bits 1..0 : ADC enable. */ -#define ADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define ADC_ENABLE_ENABLE_Msk (0x3UL << ADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define ADC_ENABLE_ENABLE_Disabled (0x00UL) /*!< ADC is disabled. */ -#define ADC_ENABLE_ENABLE_Enabled (0x01UL) /*!< ADC is enabled. If an analog input pin is selected as source of the conversion, the selected pin is configured as an analog input. */ - -/* Register: ADC_CONFIG */ -/* Description: ADC configuration register. */ - -/* Bits 17..16 : ADC external reference pin selection. */ -#define ADC_CONFIG_EXTREFSEL_Pos (16UL) /*!< Position of EXTREFSEL field. */ -#define ADC_CONFIG_EXTREFSEL_Msk (0x3UL << ADC_CONFIG_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define ADC_CONFIG_EXTREFSEL_None (0UL) /*!< Analog external reference inputs disabled. */ -#define ADC_CONFIG_EXTREFSEL_AnalogReference0 (1UL) /*!< Use analog reference 0 as reference. */ -#define ADC_CONFIG_EXTREFSEL_AnalogReference1 (2UL) /*!< Use analog reference 1 as reference. */ - -/* Bits 15..8 : ADC analog pin selection. */ -#define ADC_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ -#define ADC_CONFIG_PSEL_Msk (0xFFUL << ADC_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define ADC_CONFIG_PSEL_Disabled (0UL) /*!< Analog input pins disabled. */ -#define ADC_CONFIG_PSEL_AnalogInput0 (1UL) /*!< Use analog input 0 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput1 (2UL) /*!< Use analog input 1 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput2 (4UL) /*!< Use analog input 2 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput3 (8UL) /*!< Use analog input 3 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput4 (16UL) /*!< Use analog input 4 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput5 (32UL) /*!< Use analog input 5 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput6 (64UL) /*!< Use analog input 6 as analog input. */ -#define ADC_CONFIG_PSEL_AnalogInput7 (128UL) /*!< Use analog input 7 as analog input. */ - -/* Bits 6..5 : ADC reference selection. */ -#define ADC_CONFIG_REFSEL_Pos (5UL) /*!< Position of REFSEL field. */ -#define ADC_CONFIG_REFSEL_Msk (0x3UL << ADC_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define ADC_CONFIG_REFSEL_VBG (0x00UL) /*!< Use internal 1.2V bandgap voltage as reference for conversion. */ -#define ADC_CONFIG_REFSEL_External (0x01UL) /*!< Use external source configured by EXTREFSEL as reference for conversion. */ -#define ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling (0x02UL) /*!< Use supply voltage with 1/2 prescaling as reference for conversion. Only usable when supply voltage is between 1.7V and 2.6V. */ -#define ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling (0x03UL) /*!< Use supply voltage with 1/3 prescaling as reference for conversion. Only usable when supply voltage is between 2.5V and 3.6V. */ - -/* Bits 4..2 : ADC input selection. */ -#define ADC_CONFIG_INPSEL_Pos (2UL) /*!< Position of INPSEL field. */ -#define ADC_CONFIG_INPSEL_Msk (0x7UL << ADC_CONFIG_INPSEL_Pos) /*!< Bit mask of INPSEL field. */ -#define ADC_CONFIG_INPSEL_AnalogInputNoPrescaling (0x00UL) /*!< Analog input specified by PSEL with no prescaling used as input for the conversion. */ -#define ADC_CONFIG_INPSEL_AnalogInputTwoThirdsPrescaling (0x01UL) /*!< Analog input specified by PSEL with 2/3 prescaling used as input for the conversion. */ -#define ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling (0x02UL) /*!< Analog input specified by PSEL with 1/3 prescaling used as input for the conversion. */ -#define ADC_CONFIG_INPSEL_SupplyTwoThirdsPrescaling (0x05UL) /*!< Supply voltage with 2/3 prescaling used as input for the conversion. */ -#define ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling (0x06UL) /*!< Supply voltage with 1/3 prescaling used as input for the conversion. */ - -/* Bits 1..0 : ADC resolution. */ -#define ADC_CONFIG_RES_Pos (0UL) /*!< Position of RES field. */ -#define ADC_CONFIG_RES_Msk (0x3UL << ADC_CONFIG_RES_Pos) /*!< Bit mask of RES field. */ -#define ADC_CONFIG_RES_8bit (0x00UL) /*!< 8bit ADC resolution. */ -#define ADC_CONFIG_RES_9bit (0x01UL) /*!< 9bit ADC resolution. */ -#define ADC_CONFIG_RES_10bit (0x02UL) /*!< 10bit ADC resolution. */ - -/* Register: ADC_RESULT */ -/* Description: Result of ADC conversion. */ - -/* Bits 9..0 : Result of ADC conversion. */ -#define ADC_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define ADC_RESULT_RESULT_Msk (0x3FFUL << ADC_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ - -/* Register: ADC_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define ADC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define ADC_POWER_POWER_Msk (0x1UL << ADC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define ADC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define ADC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: AMLI */ -/* Description: AHB Multi-Layer Interface. */ - -/* Register: AMLI_RAMPRI_CPU0 */ -/* Description: Configurable priority configuration register for CPU0. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_CPU0_RAM7_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_CPU0_RAM6_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_CPU0_RAM5_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_CPU0_RAM4_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_CPU0_RAM3_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_CPU0_RAM2_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_CPU0_RAM1_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_CPU0_RAM0_Msk (0xFUL << AMLI_RAMPRI_CPU0_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CPU0_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Register: AMLI_RAMPRI_SPIS1 */ -/* Description: Configurable priority configuration register for SPIS1. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Msk (0xFUL << AMLI_RAMPRI_SPIS1_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_SPIS1_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Register: AMLI_RAMPRI_RADIO */ -/* Description: Configurable priority configuration register for RADIO. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_RADIO_RAM7_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_RADIO_RAM6_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_RADIO_RAM5_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_RADIO_RAM4_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_RADIO_RAM3_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_RADIO_RAM2_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_RADIO_RAM1_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_RADIO_RAM0_Msk (0xFUL << AMLI_RAMPRI_RADIO_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_RADIO_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Register: AMLI_RAMPRI_ECB */ -/* Description: Configurable priority configuration register for ECB. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_ECB_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_ECB_RAM7_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_ECB_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_ECB_RAM6_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_ECB_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_ECB_RAM5_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_ECB_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_ECB_RAM4_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_ECB_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_ECB_RAM3_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_ECB_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_ECB_RAM2_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_ECB_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_ECB_RAM1_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_ECB_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_ECB_RAM0_Msk (0xFUL << AMLI_RAMPRI_ECB_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_ECB_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Register: AMLI_RAMPRI_CCM */ -/* Description: Configurable priority configuration register for CCM. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_CCM_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_CCM_RAM7_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_CCM_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_CCM_RAM6_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_CCM_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_CCM_RAM5_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_CCM_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_CCM_RAM4_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_CCM_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_CCM_RAM3_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_CCM_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_CCM_RAM2_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_CCM_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_CCM_RAM1_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_CCM_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_CCM_RAM0_Msk (0xFUL << AMLI_RAMPRI_CCM_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_CCM_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Register: AMLI_RAMPRI_AAR */ -/* Description: Configurable priority configuration register for AAR. */ - -/* Bits 31..28 : Configuration field for RAM block 7. */ -#define AMLI_RAMPRI_AAR_RAM7_Pos (28UL) /*!< Position of RAM7 field. */ -#define AMLI_RAMPRI_AAR_RAM7_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM7_Pos) /*!< Bit mask of RAM7 field. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM7_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 27..24 : Configuration field for RAM block 6. */ -#define AMLI_RAMPRI_AAR_RAM6_Pos (24UL) /*!< Position of RAM6 field. */ -#define AMLI_RAMPRI_AAR_RAM6_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM6_Pos) /*!< Bit mask of RAM6 field. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM6_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 23..20 : Configuration field for RAM block 5. */ -#define AMLI_RAMPRI_AAR_RAM5_Pos (20UL) /*!< Position of RAM5 field. */ -#define AMLI_RAMPRI_AAR_RAM5_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM5_Pos) /*!< Bit mask of RAM5 field. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM5_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 19..16 : Configuration field for RAM block 4. */ -#define AMLI_RAMPRI_AAR_RAM4_Pos (16UL) /*!< Position of RAM4 field. */ -#define AMLI_RAMPRI_AAR_RAM4_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM4_Pos) /*!< Bit mask of RAM4 field. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM4_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 15..12 : Configuration field for RAM block 3. */ -#define AMLI_RAMPRI_AAR_RAM3_Pos (12UL) /*!< Position of RAM3 field. */ -#define AMLI_RAMPRI_AAR_RAM3_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM3_Pos) /*!< Bit mask of RAM3 field. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM3_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 11..8 : Configuration field for RAM block 2. */ -#define AMLI_RAMPRI_AAR_RAM2_Pos (8UL) /*!< Position of RAM2 field. */ -#define AMLI_RAMPRI_AAR_RAM2_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM2_Pos) /*!< Bit mask of RAM2 field. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM2_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 7..4 : Configuration field for RAM block 1. */ -#define AMLI_RAMPRI_AAR_RAM1_Pos (4UL) /*!< Position of RAM1 field. */ -#define AMLI_RAMPRI_AAR_RAM1_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM1_Pos) /*!< Bit mask of RAM1 field. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM1_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Bits 3..0 : Configuration field for RAM block 0. */ -#define AMLI_RAMPRI_AAR_RAM0_Pos (0UL) /*!< Position of RAM0 field. */ -#define AMLI_RAMPRI_AAR_RAM0_Msk (0xFUL << AMLI_RAMPRI_AAR_RAM0_Pos) /*!< Bit mask of RAM0 field. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri0 (0x0UL) /*!< Priority 0. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri2 (0x2UL) /*!< Priority 2. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri4 (0x4UL) /*!< Priority 4. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri6 (0x6UL) /*!< Priority 6. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri8 (0x8UL) /*!< Priority 8. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri10 (0xAUL) /*!< Priority 10. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri12 (0xCUL) /*!< Priority 12. */ -#define AMLI_RAMPRI_AAR_RAM0_Pri14 (0xEUL) /*!< Priority 14. */ - -/* Peripheral: CCM */ -/* Description: AES CCM Mode Encryption. */ - -/* Register: CCM_SHORTS */ -/* Description: Shortcuts for the CCM. */ - -/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Shortcut disabled. */ -#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: CCM_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 2 : Enable interrupt on ERROR event. */ -#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on ENDCRYPT event. */ -#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on ENDKSGEN event. */ -#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: CCM_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 2 : Disable interrupt on ERROR event. */ -#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ -#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on ENDCRYPT event. */ -#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ -#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on ENDKSGEN event. */ -#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ -#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Interrupt disabled. */ -#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Interrupt enabled. */ -#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: CCM_MICSTATUS */ -/* Description: CCM RX MIC check result. */ - -/* Bit 0 : Result of the MIC check performed during the previous CCM RX STARTCRYPT */ -#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ -#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed. */ -#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed. */ - -/* Register: CCM_ENABLE */ -/* Description: CCM enable. */ - -/* Bits 1..0 : CCM enable. */ -#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define CCM_ENABLE_ENABLE_Disabled (0x00UL) /*!< CCM is disabled. */ -#define CCM_ENABLE_ENABLE_Enabled (0x02UL) /*!< CCM is enabled. */ - -/* Register: CCM_MODE */ -/* Description: Operation mode. */ - -/* Bit 0 : CCM mode operation. */ -#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define CCM_MODE_MODE_Encryption (0UL) /*!< CCM mode TX */ -#define CCM_MODE_MODE_Decryption (1UL) /*!< CCM mode TX */ - -/* Register: CCM_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define CCM_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define CCM_POWER_POWER_Msk (0x1UL << CCM_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define CCM_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define CCM_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: CLOCK */ -/* Description: Clock control. */ - -/* Register: CLOCK_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 4 : Enable interrupt on CTTO event. */ -#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 3 : Enable interrupt on DONE event. */ -#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on LFCLKSTARTED event. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on HFCLKSTARTED event. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: CLOCK_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 4 : Disable interrupt on CTTO event. */ -#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ -#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 3 : Disable interrupt on DONE event. */ -#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ -#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ -#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on LFCLKSTARTED event. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on HFCLKSTARTED event. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: CLOCK_HFCLKRUN */ -/* Description: Task HFCLKSTART trigger status. */ - -/* Bit 0 : Task HFCLKSTART trigger status. */ -#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task HFCLKSTART has not been triggered. */ -#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task HFCLKSTART has been triggered. */ - -/* Register: CLOCK_HFCLKSTAT */ -/* Description: High frequency clock status. */ - -/* Bit 16 : State for the HFCLK. */ -#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK clock not running. */ -#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK clock running. */ - -/* Bit 0 : Active clock source for the HF clock. */ -#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< Internal 16MHz RC oscillator running and generating the HFCLK clock. */ -#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< External 16MHz/32MHz crystal oscillator running and generating the HFCLK clock. */ - -/* Register: CLOCK_LFCLKRUN */ -/* Description: Task LFCLKSTART triggered status. */ - -/* Bit 0 : Task LFCLKSTART triggered status. */ -#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ -#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task LFCLKSTART has not been triggered. */ -#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task LFCLKSTART has been triggered. */ - -/* Register: CLOCK_LFCLKSTAT */ -/* Description: Low frequency clock status. */ - -/* Bit 16 : State for the LF clock. */ -#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ -#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK clock not running. */ -#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK clock running. */ - -/* Bits 1..0 : Active clock source for the LF clock. */ -#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator running and generating the LFCLK clock. */ -#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< External 32KiHz crystal oscillator running and generating the LFCLK clock. */ -#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from the HFCLK running and generating the LFCLK clock. */ - -/* Register: CLOCK_LFCLKSRCCOPY */ -/* Description: Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. */ - -/* Bits 1..0 : Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< External 32KiHz crystal. */ -#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from HFCLK system clock. */ - -/* Register: CLOCK_LFCLKSRC */ -/* Description: Clock source for the LFCLK clock. */ - -/* Bits 1..0 : Clock source. */ -#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ -#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator. */ -#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< External 32KiHz crystal. */ -#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from HFCLK system clock. */ - -/* Register: CLOCK_CTIV */ -/* Description: Calibration timer interval. */ - -/* Bits 6..0 : Calibration timer interval in 0.25s resolution. */ -#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ -#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ - -/* Register: CLOCK_XTALFREQ */ -/* Description: Crystal frequency. */ - -/* Bits 7..0 : External Xtal frequency selection. */ -#define CLOCK_XTALFREQ_XTALFREQ_Pos (0UL) /*!< Position of XTALFREQ field. */ -#define CLOCK_XTALFREQ_XTALFREQ_Msk (0xFFUL << CLOCK_XTALFREQ_XTALFREQ_Pos) /*!< Bit mask of XTALFREQ field. */ -#define CLOCK_XTALFREQ_XTALFREQ_16MHz (0xFFUL) /*!< 16MHz xtal is used as source for the HFCLK oscillator. */ -#define CLOCK_XTALFREQ_XTALFREQ_32MHz (0x00UL) /*!< 32MHz xtal is used as source for the HFCLK oscillator. */ - - -/* Peripheral: ECB */ -/* Description: AES ECB Mode Encryption. */ - -/* Register: ECB_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 1 : Enable interrupt on ERRORECB event. */ -#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Interrupt disabled. */ -#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Interrupt enabled. */ -#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on ENDECB event. */ -#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Interrupt disabled. */ -#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Interrupt enabled. */ -#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: ECB_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 1 : Disable interrupt on ERRORECB event. */ -#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ -#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Interrupt disabled. */ -#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Interrupt enabled. */ -#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on ENDECB event. */ -#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ -#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Interrupt disabled. */ -#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Interrupt enabled. */ -#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: ECB_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define ECB_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define ECB_POWER_POWER_Msk (0x1UL << ECB_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define ECB_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define ECB_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: FICR */ -/* Description: Factory Information Configuration. */ - -/* Register: FICR_PPFC */ -/* Description: Pre-programmed factory code present. */ - -/* Bits 7..0 : Pre-programmed factory code present. */ -#define FICR_PPFC_PPFC_Pos (0UL) /*!< Position of PPFC field. */ -#define FICR_PPFC_PPFC_Msk (0xFFUL << FICR_PPFC_PPFC_Pos) /*!< Bit mask of PPFC field. */ -#define FICR_PPFC_PPFC_NotPresent (0xFFUL) /*!< Not present. */ -#define FICR_PPFC_PPFC_Present (0x00UL) /*!< Present. */ - -/* Register: FICR_CONFIGID */ -/* Description: Configuration identifier. */ - -/* Bits 31..16 : Firmware Identification Number pre-loaded into the flash. */ -#define FICR_CONFIGID_FWID_Pos (16UL) /*!< Position of FWID field. */ -#define FICR_CONFIGID_FWID_Msk (0xFFFFUL << FICR_CONFIGID_FWID_Pos) /*!< Bit mask of FWID field. */ - -/* Bits 15..0 : Hardware Identification Number. */ -#define FICR_CONFIGID_HWID_Pos (0UL) /*!< Position of HWID field. */ -#define FICR_CONFIGID_HWID_Msk (0xFFFFUL << FICR_CONFIGID_HWID_Pos) /*!< Bit mask of HWID field. */ - -/* Register: FICR_DEVICEADDRTYPE */ -/* Description: Device address type. */ - -/* Bit 0 : Device address type. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address. */ -#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address. */ - -/* Register: FICR_OVERRIDEEN */ -/* Description: Radio calibration override enable. */ - -/* Bit 3 : Override default values for BLE_1Mbit mode. */ -#define FICR_OVERRIDEEN_BLE_1MBIT_Pos (3UL) /*!< Position of BLE_1MBIT field. */ -#define FICR_OVERRIDEEN_BLE_1MBIT_Msk (0x1UL << FICR_OVERRIDEEN_BLE_1MBIT_Pos) /*!< Bit mask of BLE_1MBIT field. */ -#define FICR_OVERRIDEEN_BLE_1MBIT_Override (0UL) /*!< Override the default values for BLE_1Mbit mode. */ -#define FICR_OVERRIDEEN_BLE_1MBIT_NotOverride (1UL) /*!< Do not override the default values for BLE_1Mbit mode. */ - -/* Bit 0 : Override default values for NRF_1Mbit mode. */ -#define FICR_OVERRIDEEN_NRF_1MBIT_Pos (0UL) /*!< Position of NRF_1MBIT field. */ -#define FICR_OVERRIDEEN_NRF_1MBIT_Msk (0x1UL << FICR_OVERRIDEEN_NRF_1MBIT_Pos) /*!< Bit mask of NRF_1MBIT field. */ -#define FICR_OVERRIDEEN_NRF_1MBIT_Override (0UL) /*!< Override the default values for NRF_1Mbit mode. */ -#define FICR_OVERRIDEEN_NRF_1MBIT_NotOverride (1UL) /*!< Do not override the default values for NRF_1Mbit mode. */ - -/* Register: FICR_INFO_PART */ -/* Description: Part code */ - -/* Bits 31..0 : Part code */ -#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ -#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ -#define FICR_INFO_PART_PART_N51822 (0x51822UL) /*!< nRF51822 */ -#define FICR_INFO_PART_PART_N51422 (0x51422UL) /*!< nRF51422 */ -#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_VARIANT */ -/* Description: Part variant */ - -/* Bits 31..0 : Part variant */ -#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ -#define FICR_INFO_VARIANT_VARIANT_nRF51C (0x1002UL) /*!< nRF51-C (XLR3) */ -#define FICR_INFO_VARIANT_VARIANT_nRF51D (0x1003UL) /*!< nRF51-D (L3) */ -#define FICR_INFO_VARIANT_VARIANT_nRF51E (0x1004UL) /*!< nRF51-E (XLR3P) */ -#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_PACKAGE */ -/* Description: Package option */ - -/* Bits 31..0 : Package option */ -#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ -#define FICR_INFO_PACKAGE_PACKAGE_QFN48 (0x0000UL) /*!< 48-pin QFN with 31 GPIO */ -#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP56A (0x1000UL) /*!< nRF51x22 CDxx - WLCSP 56 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62A (0x1001UL) /*!< nRF51x22 CExx - WLCSP 62 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62B (0x1002UL) /*!< nRF51x22 CFxx - WLCSP 62 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62C (0x1003UL) /*!< nRF51x22 CTxx - WLCSP 62 balls */ -#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ - -/* Register: FICR_INFO_RAM */ -/* Description: RAM variant */ - -/* Bits 31..0 : RAM variant */ -#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ -#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ -#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ -#define FICR_INFO_RAM_RAM_K16 (16UL) /*!< 16 kByte RAM. */ -#define FICR_INFO_RAM_RAM_K32 (32UL) /*!< 32 kByte RAM. */ - -/* Register: FICR_INFO_FLASH */ -/* Description: Flash variant */ - -/* Bits 31..0 : Flash variant */ -#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ -#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ -#define FICR_INFO_FLASH_FLASH_K128 (128UL) /*!< 128 kByte FLASH. */ -#define FICR_INFO_FLASH_FLASH_K256 (256UL) /*!< 256 kByte FLASH. */ - - -/* Peripheral: GPIO */ -/* Description: General purpose input and output. */ - -/* Register: GPIO_OUT */ -/* Description: Write GPIO port. */ - -/* Bit 31 : Pin 31. */ -#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high. */ - -/* Bit 30 : Pin 30. */ -#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high. */ - -/* Bit 29 : Pin 29. */ -#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high. */ - -/* Bit 28 : Pin 28. */ -#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high. */ - -/* Bit 27 : Pin 27. */ -#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high. */ - -/* Bit 26 : Pin 26. */ -#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high. */ - -/* Bit 25 : Pin 25. */ -#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high. */ - -/* Bit 24 : Pin 24. */ -#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high. */ - -/* Bit 23 : Pin 23. */ -#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high. */ - -/* Bit 22 : Pin 22. */ -#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high. */ - -/* Bit 21 : Pin 21. */ -#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high. */ - -/* Bit 20 : Pin 20. */ -#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high. */ - -/* Bit 19 : Pin 19. */ -#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high. */ - -/* Bit 18 : Pin 18. */ -#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high. */ - -/* Bit 17 : Pin 17. */ -#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high. */ - -/* Bit 16 : Pin 16. */ -#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high. */ - -/* Bit 15 : Pin 15. */ -#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high. */ - -/* Bit 14 : Pin 14. */ -#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high. */ - -/* Bit 13 : Pin 13. */ -#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high. */ - -/* Bit 12 : Pin 12. */ -#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high. */ - -/* Bit 11 : Pin 11. */ -#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high. */ - -/* Bit 10 : Pin 10. */ -#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high. */ - -/* Bit 9 : Pin 9. */ -#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high. */ - -/* Bit 8 : Pin 8. */ -#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high. */ - -/* Bit 7 : Pin 7. */ -#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high. */ - -/* Bit 6 : Pin 6. */ -#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high. */ - -/* Bit 5 : Pin 5. */ -#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high. */ - -/* Bit 4 : Pin 4. */ -#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high. */ - -/* Bit 3 : Pin 3. */ -#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high. */ - -/* Bit 2 : Pin 2. */ -#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high. */ - -/* Bit 1 : Pin 1. */ -#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high. */ - -/* Bit 0 : Pin 0. */ -#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high. */ - -/* Register: GPIO_OUTSET */ -/* Description: Set individual bits in GPIO port. */ - -/* Bit 31 : Pin 31. */ -#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN31_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 30 : Pin 30. */ -#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN30_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 29 : Pin 29. */ -#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN29_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 28 : Pin 28. */ -#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN28_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 27 : Pin 27. */ -#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN27_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 26 : Pin 26. */ -#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN26_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 25 : Pin 25. */ -#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN25_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 24 : Pin 24. */ -#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN24_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 23 : Pin 23. */ -#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN23_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 22 : Pin 22. */ -#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN22_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 21 : Pin 21. */ -#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN21_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 20 : Pin 20. */ -#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN20_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 19 : Pin 19. */ -#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN19_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 18 : Pin 18. */ -#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN18_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 17 : Pin 17. */ -#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN17_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 16 : Pin 16. */ -#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN16_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 15 : Pin 15. */ -#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN15_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 14 : Pin 14. */ -#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN14_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 13 : Pin 13. */ -#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN13_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 12 : Pin 12. */ -#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN12_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 11 : Pin 11. */ -#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN11_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 10 : Pin 10. */ -#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN10_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 9 : Pin 9. */ -#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN9_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 8 : Pin 8. */ -#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN8_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 7 : Pin 7. */ -#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN7_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 6 : Pin 6. */ -#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN6_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 5 : Pin 5. */ -#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN5_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 4 : Pin 4. */ -#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN4_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 3 : Pin 3. */ -#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN3_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 2 : Pin 2. */ -#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN2_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 1 : Pin 1. */ -#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN1_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Set pin driver high. */ - -/* Bit 0 : Pin 0. */ -#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTSET_PIN0_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Set pin driver high. */ - -/* Register: GPIO_OUTCLR */ -/* Description: Clear individual bits in GPIO port. */ - -/* Bit 31 : Pin 31. */ -#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 30 : Pin 30. */ -#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 29 : Pin 29. */ -#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 28 : Pin 28. */ -#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 27 : Pin 27. */ -#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 26 : Pin 26. */ -#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 25 : Pin 25. */ -#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 24 : Pin 24. */ -#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 23 : Pin 23. */ -#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 22 : Pin 22. */ -#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 21 : Pin 21. */ -#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 20 : Pin 20. */ -#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 19 : Pin 19. */ -#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 18 : Pin 18. */ -#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 17 : Pin 17. */ -#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 16 : Pin 16. */ -#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 15 : Pin 15. */ -#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 14 : Pin 14. */ -#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 13 : Pin 13. */ -#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 12 : Pin 12. */ -#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 11 : Pin 11. */ -#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 10 : Pin 10. */ -#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 9 : Pin 9. */ -#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 8 : Pin 8. */ -#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 7 : Pin 7. */ -#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 6 : Pin 6. */ -#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 5 : Pin 5. */ -#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 4 : Pin 4. */ -#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 3 : Pin 3. */ -#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 2 : Pin 2. */ -#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 1 : Pin 1. */ -#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Set pin driver low. */ - -/* Bit 0 : Pin 0. */ -#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Pin driver is low. */ -#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Pin driver is high. */ -#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Set pin driver low. */ - -/* Register: GPIO_IN */ -/* Description: Read GPIO port. */ - -/* Bit 31 : Pin 31. */ -#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high. */ - -/* Bit 30 : Pin 30. */ -#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high. */ - -/* Bit 29 : Pin 29. */ -#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high. */ - -/* Bit 28 : Pin 28. */ -#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high. */ - -/* Bit 27 : Pin 27. */ -#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high. */ - -/* Bit 26 : Pin 26. */ -#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high. */ - -/* Bit 25 : Pin 25. */ -#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high. */ - -/* Bit 24 : Pin 24. */ -#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high. */ - -/* Bit 23 : Pin 23. */ -#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high. */ - -/* Bit 22 : Pin 22. */ -#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high. */ - -/* Bit 21 : Pin 21. */ -#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high. */ - -/* Bit 20 : Pin 20. */ -#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high. */ - -/* Bit 19 : Pin 19. */ -#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high. */ - -/* Bit 18 : Pin 18. */ -#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high. */ - -/* Bit 17 : Pin 17. */ -#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high. */ - -/* Bit 16 : Pin 16. */ -#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high. */ - -/* Bit 15 : Pin 15. */ -#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high. */ - -/* Bit 14 : Pin 14. */ -#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high. */ - -/* Bit 13 : Pin 13. */ -#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high. */ - -/* Bit 12 : Pin 12. */ -#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high. */ - -/* Bit 11 : Pin 11. */ -#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high. */ - -/* Bit 10 : Pin 10. */ -#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high. */ - -/* Bit 9 : Pin 9. */ -#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high. */ - -/* Bit 8 : Pin 8. */ -#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high. */ - -/* Bit 7 : Pin 7. */ -#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high. */ - -/* Bit 6 : Pin 6. */ -#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high. */ - -/* Bit 5 : Pin 5. */ -#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high. */ - -/* Bit 4 : Pin 4. */ -#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high. */ - -/* Bit 3 : Pin 3. */ -#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high. */ - -/* Bit 2 : Pin 2. */ -#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high. */ - -/* Bit 1 : Pin 1. */ -#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high. */ - -/* Bit 0 : Pin 0. */ -#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low. */ -#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high. */ - -/* Register: GPIO_DIR */ -/* Description: Direction of GPIO pins. */ - -/* Bit 31 : Pin 31. */ -#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output. */ - -/* Bit 30 : Pin 30. */ -#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output. */ - -/* Bit 29 : Pin 29. */ -#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output. */ - -/* Bit 28 : Pin 28. */ -#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output. */ - -/* Bit 27 : Pin 27. */ -#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output. */ - -/* Bit 26 : Pin 26. */ -#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output. */ - -/* Bit 25 : Pin 25. */ -#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output. */ - -/* Bit 24 : Pin 24. */ -#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output. */ - -/* Bit 23 : Pin 23. */ -#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output. */ - -/* Bit 22 : Pin 22. */ -#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output. */ - -/* Bit 21 : Pin 21. */ -#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output. */ - -/* Bit 20 : Pin 20. */ -#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output. */ - -/* Bit 19 : Pin 19. */ -#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output. */ - -/* Bit 18 : Pin 18. */ -#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output. */ - -/* Bit 17 : Pin 17. */ -#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output. */ - -/* Bit 16 : Pin 16. */ -#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output. */ - -/* Bit 15 : Pin 15. */ -#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output. */ - -/* Bit 14 : Pin 14. */ -#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output. */ - -/* Bit 13 : Pin 13. */ -#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output. */ - -/* Bit 12 : Pin 12. */ -#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output. */ - -/* Bit 11 : Pin 11. */ -#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output. */ - -/* Bit 10 : Pin 10. */ -#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output. */ - -/* Bit 9 : Pin 9. */ -#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output. */ - -/* Bit 8 : Pin 8. */ -#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output. */ - -/* Bit 7 : Pin 7. */ -#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output. */ - -/* Bit 6 : Pin 6. */ -#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output. */ - -/* Bit 5 : Pin 5. */ -#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output. */ - -/* Bit 4 : Pin 4. */ -#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output. */ - -/* Bit 3 : Pin 3. */ -#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output. */ - -/* Bit 2 : Pin 2. */ -#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output. */ - -/* Bit 1 : Pin 1. */ -#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output. */ - -/* Bit 0 : Pin 0. */ -#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output. */ - -/* Register: GPIO_DIRSET */ -/* Description: DIR set register. */ - -/* Bit 31 : Set as output pin 31. */ -#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Set pin as output. */ - -/* Bit 30 : Set as output pin 30. */ -#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Set pin as output. */ - -/* Bit 29 : Set as output pin 29. */ -#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Set pin as output. */ - -/* Bit 28 : Set as output pin 28. */ -#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Set pin as output. */ - -/* Bit 27 : Set as output pin 27. */ -#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Set pin as output. */ - -/* Bit 26 : Set as output pin 26. */ -#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Set pin as output. */ - -/* Bit 25 : Set as output pin 25. */ -#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Set pin as output. */ - -/* Bit 24 : Set as output pin 24. */ -#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Set pin as output. */ - -/* Bit 23 : Set as output pin 23. */ -#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Set pin as output. */ - -/* Bit 22 : Set as output pin 22. */ -#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Set pin as output. */ - -/* Bit 21 : Set as output pin 21. */ -#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Set pin as output. */ - -/* Bit 20 : Set as output pin 20. */ -#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Set pin as output. */ - -/* Bit 19 : Set as output pin 19. */ -#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Set pin as output. */ - -/* Bit 18 : Set as output pin 18. */ -#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Set pin as output. */ - -/* Bit 17 : Set as output pin 17. */ -#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Set pin as output. */ - -/* Bit 16 : Set as output pin 16. */ -#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Set pin as output. */ - -/* Bit 15 : Set as output pin 15. */ -#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Set pin as output. */ - -/* Bit 14 : Set as output pin 14. */ -#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Set pin as output. */ - -/* Bit 13 : Set as output pin 13. */ -#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Set pin as output. */ - -/* Bit 12 : Set as output pin 12. */ -#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Set pin as output. */ - -/* Bit 11 : Set as output pin 11. */ -#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Set pin as output. */ - -/* Bit 10 : Set as output pin 10. */ -#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Set pin as output. */ - -/* Bit 9 : Set as output pin 9. */ -#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Set pin as output. */ - -/* Bit 8 : Set as output pin 8. */ -#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Set pin as output. */ - -/* Bit 7 : Set as output pin 7. */ -#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Set pin as output. */ - -/* Bit 6 : Set as output pin 6. */ -#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Set pin as output. */ - -/* Bit 5 : Set as output pin 5. */ -#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Set pin as output. */ - -/* Bit 4 : Set as output pin 4. */ -#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Set pin as output. */ - -/* Bit 3 : Set as output pin 3. */ -#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Set pin as output. */ - -/* Bit 2 : Set as output pin 2. */ -#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Set pin as output. */ - -/* Bit 1 : Set as output pin 1. */ -#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Set pin as output. */ - -/* Bit 0 : Set as output pin 0. */ -#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Set pin as output. */ - -/* Register: GPIO_DIRCLR */ -/* Description: DIR clear register. */ - -/* Bit 31 : Set as input pin 31. */ -#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ -#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 30 : Set as input pin 30. */ -#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ -#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 29 : Set as input pin 29. */ -#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ -#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 28 : Set as input pin 28. */ -#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ -#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 27 : Set as input pin 27. */ -#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ -#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 26 : Set as input pin 26. */ -#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ -#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 25 : Set as input pin 25. */ -#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ -#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 24 : Set as input pin 24. */ -#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ -#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 23 : Set as input pin 23. */ -#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ -#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 22 : Set as input pin 22. */ -#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ -#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 21 : Set as input pin 21. */ -#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ -#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 20 : Set as input pin 20. */ -#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ -#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 19 : Set as input pin 19. */ -#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ -#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 18 : Set as input pin 18. */ -#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ -#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 17 : Set as input pin 17. */ -#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ -#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 16 : Set as input pin 16. */ -#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ -#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 15 : Set as input pin 15. */ -#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ -#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 14 : Set as input pin 14. */ -#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ -#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 13 : Set as input pin 13. */ -#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ -#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 12 : Set as input pin 12. */ -#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ -#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 11 : Set as input pin 11. */ -#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ -#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 10 : Set as input pin 10. */ -#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ -#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 9 : Set as input pin 9. */ -#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ -#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 8 : Set as input pin 8. */ -#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ -#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 7 : Set as input pin 7. */ -#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ -#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 6 : Set as input pin 6. */ -#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ -#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 5 : Set as input pin 5. */ -#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ -#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 4 : Set as input pin 4. */ -#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ -#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 3 : Set as input pin 3. */ -#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ -#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 2 : Set as input pin 2. */ -#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ -#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 1 : Set as input pin 1. */ -#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ -#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Set pin as input. */ - -/* Bit 0 : Set as input pin 0. */ -#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ -#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Pin set as input. */ -#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Pin set as output. */ -#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Set pin as input. */ - -/* Register: GPIO_PIN_CNF */ -/* Description: Configuration of GPIO pins. */ - -/* Bits 17..16 : Pin sensing mechanism. */ -#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ -#define GPIO_PIN_CNF_SENSE_Disabled (0x00UL) /*!< Disabled. */ -#define GPIO_PIN_CNF_SENSE_High (0x02UL) /*!< Wakeup on high level. */ -#define GPIO_PIN_CNF_SENSE_Low (0x03UL) /*!< Wakeup on low level. */ - -/* Bits 10..8 : Drive configuration. */ -#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ -#define GPIO_PIN_CNF_DRIVE_S0S1 (0x00UL) /*!< Standard '0', Standard '1'. */ -#define GPIO_PIN_CNF_DRIVE_H0S1 (0x01UL) /*!< High '0', Standard '1'. */ -#define GPIO_PIN_CNF_DRIVE_S0H1 (0x02UL) /*!< Standard '0', High '1'. */ -#define GPIO_PIN_CNF_DRIVE_H0H1 (0x03UL) /*!< High '0', High '1'. */ -#define GPIO_PIN_CNF_DRIVE_D0S1 (0x04UL) /*!< Disconnected '0', Standard '1'. */ -#define GPIO_PIN_CNF_DRIVE_D0H1 (0x05UL) /*!< Disconnected '0', High '1'. */ -#define GPIO_PIN_CNF_DRIVE_S0D1 (0x06UL) /*!< Standard '0', Disconnected '1'. */ -#define GPIO_PIN_CNF_DRIVE_H0D1 (0x07UL) /*!< High '0', Disconnected '1'. */ - -/* Bits 3..2 : Pull-up or -down configuration. */ -#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ -#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ -#define GPIO_PIN_CNF_PULL_Disabled (0x00UL) /*!< No pull. */ -#define GPIO_PIN_CNF_PULL_Pulldown (0x01UL) /*!< Pulldown on pin. */ -#define GPIO_PIN_CNF_PULL_Pullup (0x03UL) /*!< Pullup on pin. */ - -/* Bit 1 : Connect or disconnect input path. */ -#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ -#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input pin. */ -#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input pin. */ - -/* Bit 0 : Pin direction. */ -#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ -#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ -#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin. */ -#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin. */ - - -/* Peripheral: GPIOTE */ -/* Description: GPIO tasks and events. */ - -/* Register: GPIOTE_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 31 : Enable interrupt on PORT event. */ -#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 3 : Enable interrupt on IN[3] event. */ -#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 2 : Enable interrupt on IN[2] event. */ -#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on IN[1] event. */ -#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on IN[0] event. */ -#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: GPIOTE_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 31 : Disable interrupt on PORT event. */ -#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ -#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 3 : Disable interrupt on IN[3] event. */ -#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ -#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 2 : Disable interrupt on IN[2] event. */ -#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ -#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on IN[1] event. */ -#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ -#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on IN[0] event. */ -#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ -#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Interrupt disabled. */ -#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Interrupt enabled. */ -#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: GPIOTE_CONFIG */ -/* Description: Channel configuration registers. */ - -/* Bit 20 : Initial value of the output when the GPIOTE channel is configured as a Task. */ -#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ -#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Initial low output when in task mode. */ -#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Initial high output when in task mode. */ - -/* Bits 17..16 : Effects on output when in Task mode, or events on input that generates an event. */ -#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ -#define GPIOTE_CONFIG_POLARITY_LoToHi (0x01UL) /*!< Low to high. */ -#define GPIOTE_CONFIG_POLARITY_HiToLo (0x02UL) /*!< High to low. */ -#define GPIOTE_CONFIG_POLARITY_Toggle (0x03UL) /*!< Toggle. */ - -/* Bits 12..8 : Pin select. */ -#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ -#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ - -/* Bits 1..0 : Mode */ -#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ -#define GPIOTE_CONFIG_MODE_Disabled (0x00UL) /*!< Disabled. */ -#define GPIOTE_CONFIG_MODE_Event (0x01UL) /*!< Channel configure in event mode. */ -#define GPIOTE_CONFIG_MODE_Task (0x03UL) /*!< Channel configure in task mode. */ - -/* Register: GPIOTE_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define GPIOTE_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define GPIOTE_POWER_POWER_Msk (0x1UL << GPIOTE_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define GPIOTE_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define GPIOTE_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: LPCOMP */ -/* Description: Low power comparator. */ - -/* Register: LPCOMP_SHORTS */ -/* Description: Shortcuts for the LPCOMP. */ - -/* Bit 4 : Shortcut between CROSS event and STOP task. */ -#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ -#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 3 : Shortcut between UP event and STOP task. */ -#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ -#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 2 : Shortcut between DOWN event and STOP task. */ -#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ -#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 1 : Shortcut between RADY event and STOP task. */ -#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ -#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 0 : Shortcut between READY event and SAMPLE task. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Shortcut disabled. */ -#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: LPCOMP_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 3 : Enable interrupt on CROSS event. */ -#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 2 : Enable interrupt on UP event. */ -#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on DOWN event. */ -#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on READY event. */ -#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: LPCOMP_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 3 : Disable interrupt on CROSS event. */ -#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ -#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 2 : Disable interrupt on UP event. */ -#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ -#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ -#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on DOWN event. */ -#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ -#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on READY event. */ -#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: LPCOMP_RESULT */ -/* Description: Result of last compare. */ - -/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ -#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ -#define LPCOMP_RESULT_RESULT_Bellow (0UL) /*!< Input voltage is bellow the reference threshold. */ -#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold. */ - -/* Register: LPCOMP_ENABLE */ -/* Description: Enable the LPCOMP. */ - -/* Bits 1..0 : Enable or disable LPCOMP. */ -#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define LPCOMP_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled LPCOMP. */ -#define LPCOMP_ENABLE_ENABLE_Enabled (0x01UL) /*!< Enable LPCOMP. */ - -/* Register: LPCOMP_PSEL */ -/* Description: Input pin select. */ - -/* Bits 2..0 : Analog input pin select. */ -#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ -#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ -#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< Use analog input 0 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< Use analog input 1 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< Use analog input 2 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< Use analog input 3 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< Use analog input 4 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< Use analog input 5 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< Use analog input 6 as analog input. */ -#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< Use analog input 7 as analog input. */ - -/* Register: LPCOMP_REFSEL */ -/* Description: Reference select. */ - -/* Bits 2..0 : Reference select. */ -#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_Msk (0x7UL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ -#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling (0UL) /*!< Use supply with a 1/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling (1UL) /*!< Use supply with a 2/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling (2UL) /*!< Use supply with a 3/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling (3UL) /*!< Use supply with a 4/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling (4UL) /*!< Use supply with a 5/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling (5UL) /*!< Use supply with a 6/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling (6UL) /*!< Use supply with a 7/8 prescaler as reference. */ -#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< Use external analog reference as reference. */ - -/* Register: LPCOMP_EXTREFSEL */ -/* Description: External reference select. */ - -/* Bit 0 : External analog reference pin selection. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use analog reference 0 as reference. */ -#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use analog reference 1 as reference. */ - -/* Register: LPCOMP_ANADETECT */ -/* Description: Analog detect configuration. */ - -/* Bits 1..0 : Analog detect configuration. */ -#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ -#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETEC on crossing, both upwards and downwards crossing. */ -#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETEC on upwards crossing only. */ -#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETEC on downwards crossing only. */ - -/* Register: LPCOMP_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define LPCOMP_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define LPCOMP_POWER_POWER_Msk (0x1UL << LPCOMP_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define LPCOMP_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define LPCOMP_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: MPU */ -/* Description: Memory Protection Unit. */ - -/* Register: MPU_PERR0 */ -/* Description: Configuration of peripherals in mpu regions. */ - -/* Bit 31 : PPI region configuration. */ -#define MPU_PERR0_PPI_Pos (31UL) /*!< Position of PPI field. */ -#define MPU_PERR0_PPI_Msk (0x1UL << MPU_PERR0_PPI_Pos) /*!< Bit mask of PPI field. */ -#define MPU_PERR0_PPI_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_PPI_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 30 : NVMC region configuration. */ -#define MPU_PERR0_NVMC_Pos (30UL) /*!< Position of NVMC field. */ -#define MPU_PERR0_NVMC_Msk (0x1UL << MPU_PERR0_NVMC_Pos) /*!< Bit mask of NVMC field. */ -#define MPU_PERR0_NVMC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_NVMC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 19 : LPCOMP region configuration. */ -#define MPU_PERR0_LPCOMP_Pos (19UL) /*!< Position of LPCOMP field. */ -#define MPU_PERR0_LPCOMP_Msk (0x1UL << MPU_PERR0_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ -#define MPU_PERR0_LPCOMP_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_LPCOMP_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 18 : QDEC region configuration. */ -#define MPU_PERR0_QDEC_Pos (18UL) /*!< Position of QDEC field. */ -#define MPU_PERR0_QDEC_Msk (0x1UL << MPU_PERR0_QDEC_Pos) /*!< Bit mask of QDEC field. */ -#define MPU_PERR0_QDEC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_QDEC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 17 : RTC1 region configuration. */ -#define MPU_PERR0_RTC1_Pos (17UL) /*!< Position of RTC1 field. */ -#define MPU_PERR0_RTC1_Msk (0x1UL << MPU_PERR0_RTC1_Pos) /*!< Bit mask of RTC1 field. */ -#define MPU_PERR0_RTC1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_RTC1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 16 : WDT region configuration. */ -#define MPU_PERR0_WDT_Pos (16UL) /*!< Position of WDT field. */ -#define MPU_PERR0_WDT_Msk (0x1UL << MPU_PERR0_WDT_Pos) /*!< Bit mask of WDT field. */ -#define MPU_PERR0_WDT_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_WDT_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 15 : CCM and AAR region configuration. */ -#define MPU_PERR0_CCM_AAR_Pos (15UL) /*!< Position of CCM_AAR field. */ -#define MPU_PERR0_CCM_AAR_Msk (0x1UL << MPU_PERR0_CCM_AAR_Pos) /*!< Bit mask of CCM_AAR field. */ -#define MPU_PERR0_CCM_AAR_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_CCM_AAR_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 14 : ECB region configuration. */ -#define MPU_PERR0_ECB_Pos (14UL) /*!< Position of ECB field. */ -#define MPU_PERR0_ECB_Msk (0x1UL << MPU_PERR0_ECB_Pos) /*!< Bit mask of ECB field. */ -#define MPU_PERR0_ECB_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_ECB_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 13 : RNG region configuration. */ -#define MPU_PERR0_RNG_Pos (13UL) /*!< Position of RNG field. */ -#define MPU_PERR0_RNG_Msk (0x1UL << MPU_PERR0_RNG_Pos) /*!< Bit mask of RNG field. */ -#define MPU_PERR0_RNG_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_RNG_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 12 : TEMP region configuration. */ -#define MPU_PERR0_TEMP_Pos (12UL) /*!< Position of TEMP field. */ -#define MPU_PERR0_TEMP_Msk (0x1UL << MPU_PERR0_TEMP_Pos) /*!< Bit mask of TEMP field. */ -#define MPU_PERR0_TEMP_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_TEMP_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 11 : RTC0 region configuration. */ -#define MPU_PERR0_RTC0_Pos (11UL) /*!< Position of RTC0 field. */ -#define MPU_PERR0_RTC0_Msk (0x1UL << MPU_PERR0_RTC0_Pos) /*!< Bit mask of RTC0 field. */ -#define MPU_PERR0_RTC0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_RTC0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 10 : TIMER2 region configuration. */ -#define MPU_PERR0_TIMER2_Pos (10UL) /*!< Position of TIMER2 field. */ -#define MPU_PERR0_TIMER2_Msk (0x1UL << MPU_PERR0_TIMER2_Pos) /*!< Bit mask of TIMER2 field. */ -#define MPU_PERR0_TIMER2_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_TIMER2_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 9 : TIMER1 region configuration. */ -#define MPU_PERR0_TIMER1_Pos (9UL) /*!< Position of TIMER1 field. */ -#define MPU_PERR0_TIMER1_Msk (0x1UL << MPU_PERR0_TIMER1_Pos) /*!< Bit mask of TIMER1 field. */ -#define MPU_PERR0_TIMER1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_TIMER1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 8 : TIMER0 region configuration. */ -#define MPU_PERR0_TIMER0_Pos (8UL) /*!< Position of TIMER0 field. */ -#define MPU_PERR0_TIMER0_Msk (0x1UL << MPU_PERR0_TIMER0_Pos) /*!< Bit mask of TIMER0 field. */ -#define MPU_PERR0_TIMER0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_TIMER0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 7 : ADC region configuration. */ -#define MPU_PERR0_ADC_Pos (7UL) /*!< Position of ADC field. */ -#define MPU_PERR0_ADC_Msk (0x1UL << MPU_PERR0_ADC_Pos) /*!< Bit mask of ADC field. */ -#define MPU_PERR0_ADC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_ADC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 6 : GPIOTE region configuration. */ -#define MPU_PERR0_GPIOTE_Pos (6UL) /*!< Position of GPIOTE field. */ -#define MPU_PERR0_GPIOTE_Msk (0x1UL << MPU_PERR0_GPIOTE_Pos) /*!< Bit mask of GPIOTE field. */ -#define MPU_PERR0_GPIOTE_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_GPIOTE_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 4 : SPI1 and TWI1 region configuration. */ -#define MPU_PERR0_SPI1_TWI1_Pos (4UL) /*!< Position of SPI1_TWI1 field. */ -#define MPU_PERR0_SPI1_TWI1_Msk (0x1UL << MPU_PERR0_SPI1_TWI1_Pos) /*!< Bit mask of SPI1_TWI1 field. */ -#define MPU_PERR0_SPI1_TWI1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_SPI1_TWI1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 3 : SPI0 and TWI0 region configuration. */ -#define MPU_PERR0_SPI0_TWI0_Pos (3UL) /*!< Position of SPI0_TWI0 field. */ -#define MPU_PERR0_SPI0_TWI0_Msk (0x1UL << MPU_PERR0_SPI0_TWI0_Pos) /*!< Bit mask of SPI0_TWI0 field. */ -#define MPU_PERR0_SPI0_TWI0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_SPI0_TWI0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 2 : UART0 region configuration. */ -#define MPU_PERR0_UART0_Pos (2UL) /*!< Position of UART0 field. */ -#define MPU_PERR0_UART0_Msk (0x1UL << MPU_PERR0_UART0_Pos) /*!< Bit mask of UART0 field. */ -#define MPU_PERR0_UART0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_UART0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 1 : RADIO region configuration. */ -#define MPU_PERR0_RADIO_Pos (1UL) /*!< Position of RADIO field. */ -#define MPU_PERR0_RADIO_Msk (0x1UL << MPU_PERR0_RADIO_Pos) /*!< Bit mask of RADIO field. */ -#define MPU_PERR0_RADIO_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_RADIO_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Bit 0 : POWER_CLOCK region configuration. */ -#define MPU_PERR0_POWER_CLOCK_Pos (0UL) /*!< Position of POWER_CLOCK field. */ -#define MPU_PERR0_POWER_CLOCK_Msk (0x1UL << MPU_PERR0_POWER_CLOCK_Pos) /*!< Bit mask of POWER_CLOCK field. */ -#define MPU_PERR0_POWER_CLOCK_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ -#define MPU_PERR0_POWER_CLOCK_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ - -/* Register: MPU_PROTENSET0 */ -/* Description: Erase and write protection bit enable set register. */ - -/* Bit 31 : Protection enable for region 31. */ -#define MPU_PROTENSET0_PROTREG31_Pos (31UL) /*!< Position of PROTREG31 field. */ -#define MPU_PROTENSET0_PROTREG31_Msk (0x1UL << MPU_PROTENSET0_PROTREG31_Pos) /*!< Bit mask of PROTREG31 field. */ -#define MPU_PROTENSET0_PROTREG31_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG31_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG31_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 30 : Protection enable for region 30. */ -#define MPU_PROTENSET0_PROTREG30_Pos (30UL) /*!< Position of PROTREG30 field. */ -#define MPU_PROTENSET0_PROTREG30_Msk (0x1UL << MPU_PROTENSET0_PROTREG30_Pos) /*!< Bit mask of PROTREG30 field. */ -#define MPU_PROTENSET0_PROTREG30_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG30_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG30_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 29 : Protection enable for region 29. */ -#define MPU_PROTENSET0_PROTREG29_Pos (29UL) /*!< Position of PROTREG29 field. */ -#define MPU_PROTENSET0_PROTREG29_Msk (0x1UL << MPU_PROTENSET0_PROTREG29_Pos) /*!< Bit mask of PROTREG29 field. */ -#define MPU_PROTENSET0_PROTREG29_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG29_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG29_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 28 : Protection enable for region 28. */ -#define MPU_PROTENSET0_PROTREG28_Pos (28UL) /*!< Position of PROTREG28 field. */ -#define MPU_PROTENSET0_PROTREG28_Msk (0x1UL << MPU_PROTENSET0_PROTREG28_Pos) /*!< Bit mask of PROTREG28 field. */ -#define MPU_PROTENSET0_PROTREG28_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG28_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG28_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 27 : Protection enable for region 27. */ -#define MPU_PROTENSET0_PROTREG27_Pos (27UL) /*!< Position of PROTREG27 field. */ -#define MPU_PROTENSET0_PROTREG27_Msk (0x1UL << MPU_PROTENSET0_PROTREG27_Pos) /*!< Bit mask of PROTREG27 field. */ -#define MPU_PROTENSET0_PROTREG27_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG27_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG27_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 26 : Protection enable for region 26. */ -#define MPU_PROTENSET0_PROTREG26_Pos (26UL) /*!< Position of PROTREG26 field. */ -#define MPU_PROTENSET0_PROTREG26_Msk (0x1UL << MPU_PROTENSET0_PROTREG26_Pos) /*!< Bit mask of PROTREG26 field. */ -#define MPU_PROTENSET0_PROTREG26_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG26_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG26_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 25 : Protection enable for region 25. */ -#define MPU_PROTENSET0_PROTREG25_Pos (25UL) /*!< Position of PROTREG25 field. */ -#define MPU_PROTENSET0_PROTREG25_Msk (0x1UL << MPU_PROTENSET0_PROTREG25_Pos) /*!< Bit mask of PROTREG25 field. */ -#define MPU_PROTENSET0_PROTREG25_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG25_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG25_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 24 : Protection enable for region 24. */ -#define MPU_PROTENSET0_PROTREG24_Pos (24UL) /*!< Position of PROTREG24 field. */ -#define MPU_PROTENSET0_PROTREG24_Msk (0x1UL << MPU_PROTENSET0_PROTREG24_Pos) /*!< Bit mask of PROTREG24 field. */ -#define MPU_PROTENSET0_PROTREG24_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG24_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG24_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 23 : Protection enable for region 23. */ -#define MPU_PROTENSET0_PROTREG23_Pos (23UL) /*!< Position of PROTREG23 field. */ -#define MPU_PROTENSET0_PROTREG23_Msk (0x1UL << MPU_PROTENSET0_PROTREG23_Pos) /*!< Bit mask of PROTREG23 field. */ -#define MPU_PROTENSET0_PROTREG23_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG23_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG23_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 22 : Protection enable for region 22. */ -#define MPU_PROTENSET0_PROTREG22_Pos (22UL) /*!< Position of PROTREG22 field. */ -#define MPU_PROTENSET0_PROTREG22_Msk (0x1UL << MPU_PROTENSET0_PROTREG22_Pos) /*!< Bit mask of PROTREG22 field. */ -#define MPU_PROTENSET0_PROTREG22_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG22_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG22_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 21 : Protection enable for region 21. */ -#define MPU_PROTENSET0_PROTREG21_Pos (21UL) /*!< Position of PROTREG21 field. */ -#define MPU_PROTENSET0_PROTREG21_Msk (0x1UL << MPU_PROTENSET0_PROTREG21_Pos) /*!< Bit mask of PROTREG21 field. */ -#define MPU_PROTENSET0_PROTREG21_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG21_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG21_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 20 : Protection enable for region 20. */ -#define MPU_PROTENSET0_PROTREG20_Pos (20UL) /*!< Position of PROTREG20 field. */ -#define MPU_PROTENSET0_PROTREG20_Msk (0x1UL << MPU_PROTENSET0_PROTREG20_Pos) /*!< Bit mask of PROTREG20 field. */ -#define MPU_PROTENSET0_PROTREG20_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG20_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG20_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 19 : Protection enable for region 19. */ -#define MPU_PROTENSET0_PROTREG19_Pos (19UL) /*!< Position of PROTREG19 field. */ -#define MPU_PROTENSET0_PROTREG19_Msk (0x1UL << MPU_PROTENSET0_PROTREG19_Pos) /*!< Bit mask of PROTREG19 field. */ -#define MPU_PROTENSET0_PROTREG19_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG19_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG19_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 18 : Protection enable for region 18. */ -#define MPU_PROTENSET0_PROTREG18_Pos (18UL) /*!< Position of PROTREG18 field. */ -#define MPU_PROTENSET0_PROTREG18_Msk (0x1UL << MPU_PROTENSET0_PROTREG18_Pos) /*!< Bit mask of PROTREG18 field. */ -#define MPU_PROTENSET0_PROTREG18_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG18_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG18_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 17 : Protection enable for region 17. */ -#define MPU_PROTENSET0_PROTREG17_Pos (17UL) /*!< Position of PROTREG17 field. */ -#define MPU_PROTENSET0_PROTREG17_Msk (0x1UL << MPU_PROTENSET0_PROTREG17_Pos) /*!< Bit mask of PROTREG17 field. */ -#define MPU_PROTENSET0_PROTREG17_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG17_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG17_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 16 : Protection enable for region 16. */ -#define MPU_PROTENSET0_PROTREG16_Pos (16UL) /*!< Position of PROTREG16 field. */ -#define MPU_PROTENSET0_PROTREG16_Msk (0x1UL << MPU_PROTENSET0_PROTREG16_Pos) /*!< Bit mask of PROTREG16 field. */ -#define MPU_PROTENSET0_PROTREG16_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG16_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG16_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 15 : Protection enable for region 15. */ -#define MPU_PROTENSET0_PROTREG15_Pos (15UL) /*!< Position of PROTREG15 field. */ -#define MPU_PROTENSET0_PROTREG15_Msk (0x1UL << MPU_PROTENSET0_PROTREG15_Pos) /*!< Bit mask of PROTREG15 field. */ -#define MPU_PROTENSET0_PROTREG15_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG15_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG15_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 14 : Protection enable for region 14. */ -#define MPU_PROTENSET0_PROTREG14_Pos (14UL) /*!< Position of PROTREG14 field. */ -#define MPU_PROTENSET0_PROTREG14_Msk (0x1UL << MPU_PROTENSET0_PROTREG14_Pos) /*!< Bit mask of PROTREG14 field. */ -#define MPU_PROTENSET0_PROTREG14_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG14_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG14_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 13 : Protection enable for region 13. */ -#define MPU_PROTENSET0_PROTREG13_Pos (13UL) /*!< Position of PROTREG13 field. */ -#define MPU_PROTENSET0_PROTREG13_Msk (0x1UL << MPU_PROTENSET0_PROTREG13_Pos) /*!< Bit mask of PROTREG13 field. */ -#define MPU_PROTENSET0_PROTREG13_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG13_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG13_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 12 : Protection enable for region 12. */ -#define MPU_PROTENSET0_PROTREG12_Pos (12UL) /*!< Position of PROTREG12 field. */ -#define MPU_PROTENSET0_PROTREG12_Msk (0x1UL << MPU_PROTENSET0_PROTREG12_Pos) /*!< Bit mask of PROTREG12 field. */ -#define MPU_PROTENSET0_PROTREG12_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG12_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG12_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 11 : Protection enable for region 11. */ -#define MPU_PROTENSET0_PROTREG11_Pos (11UL) /*!< Position of PROTREG11 field. */ -#define MPU_PROTENSET0_PROTREG11_Msk (0x1UL << MPU_PROTENSET0_PROTREG11_Pos) /*!< Bit mask of PROTREG11 field. */ -#define MPU_PROTENSET0_PROTREG11_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG11_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG11_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 10 : Protection enable for region 10. */ -#define MPU_PROTENSET0_PROTREG10_Pos (10UL) /*!< Position of PROTREG10 field. */ -#define MPU_PROTENSET0_PROTREG10_Msk (0x1UL << MPU_PROTENSET0_PROTREG10_Pos) /*!< Bit mask of PROTREG10 field. */ -#define MPU_PROTENSET0_PROTREG10_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG10_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG10_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 9 : Protection enable for region 9. */ -#define MPU_PROTENSET0_PROTREG9_Pos (9UL) /*!< Position of PROTREG9 field. */ -#define MPU_PROTENSET0_PROTREG9_Msk (0x1UL << MPU_PROTENSET0_PROTREG9_Pos) /*!< Bit mask of PROTREG9 field. */ -#define MPU_PROTENSET0_PROTREG9_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG9_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG9_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 8 : Protection enable for region 8. */ -#define MPU_PROTENSET0_PROTREG8_Pos (8UL) /*!< Position of PROTREG8 field. */ -#define MPU_PROTENSET0_PROTREG8_Msk (0x1UL << MPU_PROTENSET0_PROTREG8_Pos) /*!< Bit mask of PROTREG8 field. */ -#define MPU_PROTENSET0_PROTREG8_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG8_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG8_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 7 : Protection enable for region 7. */ -#define MPU_PROTENSET0_PROTREG7_Pos (7UL) /*!< Position of PROTREG7 field. */ -#define MPU_PROTENSET0_PROTREG7_Msk (0x1UL << MPU_PROTENSET0_PROTREG7_Pos) /*!< Bit mask of PROTREG7 field. */ -#define MPU_PROTENSET0_PROTREG7_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG7_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG7_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 6 : Protection enable for region 6. */ -#define MPU_PROTENSET0_PROTREG6_Pos (6UL) /*!< Position of PROTREG6 field. */ -#define MPU_PROTENSET0_PROTREG6_Msk (0x1UL << MPU_PROTENSET0_PROTREG6_Pos) /*!< Bit mask of PROTREG6 field. */ -#define MPU_PROTENSET0_PROTREG6_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG6_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG6_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 5 : Protection enable for region 5. */ -#define MPU_PROTENSET0_PROTREG5_Pos (5UL) /*!< Position of PROTREG5 field. */ -#define MPU_PROTENSET0_PROTREG5_Msk (0x1UL << MPU_PROTENSET0_PROTREG5_Pos) /*!< Bit mask of PROTREG5 field. */ -#define MPU_PROTENSET0_PROTREG5_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG5_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG5_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 4 : Protection enable for region 4. */ -#define MPU_PROTENSET0_PROTREG4_Pos (4UL) /*!< Position of PROTREG4 field. */ -#define MPU_PROTENSET0_PROTREG4_Msk (0x1UL << MPU_PROTENSET0_PROTREG4_Pos) /*!< Bit mask of PROTREG4 field. */ -#define MPU_PROTENSET0_PROTREG4_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG4_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG4_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 3 : Protection enable for region 3. */ -#define MPU_PROTENSET0_PROTREG3_Pos (3UL) /*!< Position of PROTREG3 field. */ -#define MPU_PROTENSET0_PROTREG3_Msk (0x1UL << MPU_PROTENSET0_PROTREG3_Pos) /*!< Bit mask of PROTREG3 field. */ -#define MPU_PROTENSET0_PROTREG3_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG3_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG3_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 2 : Protection enable for region 2. */ -#define MPU_PROTENSET0_PROTREG2_Pos (2UL) /*!< Position of PROTREG2 field. */ -#define MPU_PROTENSET0_PROTREG2_Msk (0x1UL << MPU_PROTENSET0_PROTREG2_Pos) /*!< Bit mask of PROTREG2 field. */ -#define MPU_PROTENSET0_PROTREG2_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG2_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG2_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 1 : Protection enable for region 1. */ -#define MPU_PROTENSET0_PROTREG1_Pos (1UL) /*!< Position of PROTREG1 field. */ -#define MPU_PROTENSET0_PROTREG1_Msk (0x1UL << MPU_PROTENSET0_PROTREG1_Pos) /*!< Bit mask of PROTREG1 field. */ -#define MPU_PROTENSET0_PROTREG1_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG1_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG1_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 0 : Protection enable for region 0. */ -#define MPU_PROTENSET0_PROTREG0_Pos (0UL) /*!< Position of PROTREG0 field. */ -#define MPU_PROTENSET0_PROTREG0_Msk (0x1UL << MPU_PROTENSET0_PROTREG0_Pos) /*!< Bit mask of PROTREG0 field. */ -#define MPU_PROTENSET0_PROTREG0_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET0_PROTREG0_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET0_PROTREG0_Set (1UL) /*!< Enable protection on write. */ - -/* Register: MPU_PROTENSET1 */ -/* Description: Erase and write protection bit enable set register. */ - -/* Bit 31 : Protection enable for region 63. */ -#define MPU_PROTENSET1_PROTREG63_Pos (31UL) /*!< Position of PROTREG63 field. */ -#define MPU_PROTENSET1_PROTREG63_Msk (0x1UL << MPU_PROTENSET1_PROTREG63_Pos) /*!< Bit mask of PROTREG63 field. */ -#define MPU_PROTENSET1_PROTREG63_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG63_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG63_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 30 : Protection enable for region 62. */ -#define MPU_PROTENSET1_PROTREG62_Pos (30UL) /*!< Position of PROTREG62 field. */ -#define MPU_PROTENSET1_PROTREG62_Msk (0x1UL << MPU_PROTENSET1_PROTREG62_Pos) /*!< Bit mask of PROTREG62 field. */ -#define MPU_PROTENSET1_PROTREG62_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG62_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG62_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 29 : Protection enable for region 61. */ -#define MPU_PROTENSET1_PROTREG61_Pos (29UL) /*!< Position of PROTREG61 field. */ -#define MPU_PROTENSET1_PROTREG61_Msk (0x1UL << MPU_PROTENSET1_PROTREG61_Pos) /*!< Bit mask of PROTREG61 field. */ -#define MPU_PROTENSET1_PROTREG61_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG61_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG61_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 28 : Protection enable for region 60. */ -#define MPU_PROTENSET1_PROTREG60_Pos (28UL) /*!< Position of PROTREG60 field. */ -#define MPU_PROTENSET1_PROTREG60_Msk (0x1UL << MPU_PROTENSET1_PROTREG60_Pos) /*!< Bit mask of PROTREG60 field. */ -#define MPU_PROTENSET1_PROTREG60_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG60_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG60_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 27 : Protection enable for region 59. */ -#define MPU_PROTENSET1_PROTREG59_Pos (27UL) /*!< Position of PROTREG59 field. */ -#define MPU_PROTENSET1_PROTREG59_Msk (0x1UL << MPU_PROTENSET1_PROTREG59_Pos) /*!< Bit mask of PROTREG59 field. */ -#define MPU_PROTENSET1_PROTREG59_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG59_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG59_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 26 : Protection enable for region 58. */ -#define MPU_PROTENSET1_PROTREG58_Pos (26UL) /*!< Position of PROTREG58 field. */ -#define MPU_PROTENSET1_PROTREG58_Msk (0x1UL << MPU_PROTENSET1_PROTREG58_Pos) /*!< Bit mask of PROTREG58 field. */ -#define MPU_PROTENSET1_PROTREG58_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG58_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG58_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 25 : Protection enable for region 57. */ -#define MPU_PROTENSET1_PROTREG57_Pos (25UL) /*!< Position of PROTREG57 field. */ -#define MPU_PROTENSET1_PROTREG57_Msk (0x1UL << MPU_PROTENSET1_PROTREG57_Pos) /*!< Bit mask of PROTREG57 field. */ -#define MPU_PROTENSET1_PROTREG57_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG57_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG57_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 24 : Protection enable for region 56. */ -#define MPU_PROTENSET1_PROTREG56_Pos (24UL) /*!< Position of PROTREG56 field. */ -#define MPU_PROTENSET1_PROTREG56_Msk (0x1UL << MPU_PROTENSET1_PROTREG56_Pos) /*!< Bit mask of PROTREG56 field. */ -#define MPU_PROTENSET1_PROTREG56_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG56_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG56_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 23 : Protection enable for region 55. */ -#define MPU_PROTENSET1_PROTREG55_Pos (23UL) /*!< Position of PROTREG55 field. */ -#define MPU_PROTENSET1_PROTREG55_Msk (0x1UL << MPU_PROTENSET1_PROTREG55_Pos) /*!< Bit mask of PROTREG55 field. */ -#define MPU_PROTENSET1_PROTREG55_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG55_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG55_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 22 : Protection enable for region 54. */ -#define MPU_PROTENSET1_PROTREG54_Pos (22UL) /*!< Position of PROTREG54 field. */ -#define MPU_PROTENSET1_PROTREG54_Msk (0x1UL << MPU_PROTENSET1_PROTREG54_Pos) /*!< Bit mask of PROTREG54 field. */ -#define MPU_PROTENSET1_PROTREG54_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG54_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG54_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 21 : Protection enable for region 53. */ -#define MPU_PROTENSET1_PROTREG53_Pos (21UL) /*!< Position of PROTREG53 field. */ -#define MPU_PROTENSET1_PROTREG53_Msk (0x1UL << MPU_PROTENSET1_PROTREG53_Pos) /*!< Bit mask of PROTREG53 field. */ -#define MPU_PROTENSET1_PROTREG53_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG53_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG53_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 20 : Protection enable for region 52. */ -#define MPU_PROTENSET1_PROTREG52_Pos (20UL) /*!< Position of PROTREG52 field. */ -#define MPU_PROTENSET1_PROTREG52_Msk (0x1UL << MPU_PROTENSET1_PROTREG52_Pos) /*!< Bit mask of PROTREG52 field. */ -#define MPU_PROTENSET1_PROTREG52_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG52_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG52_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 19 : Protection enable for region 51. */ -#define MPU_PROTENSET1_PROTREG51_Pos (19UL) /*!< Position of PROTREG51 field. */ -#define MPU_PROTENSET1_PROTREG51_Msk (0x1UL << MPU_PROTENSET1_PROTREG51_Pos) /*!< Bit mask of PROTREG51 field. */ -#define MPU_PROTENSET1_PROTREG51_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG51_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG51_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 18 : Protection enable for region 50. */ -#define MPU_PROTENSET1_PROTREG50_Pos (18UL) /*!< Position of PROTREG50 field. */ -#define MPU_PROTENSET1_PROTREG50_Msk (0x1UL << MPU_PROTENSET1_PROTREG50_Pos) /*!< Bit mask of PROTREG50 field. */ -#define MPU_PROTENSET1_PROTREG50_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG50_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG50_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 17 : Protection enable for region 49. */ -#define MPU_PROTENSET1_PROTREG49_Pos (17UL) /*!< Position of PROTREG49 field. */ -#define MPU_PROTENSET1_PROTREG49_Msk (0x1UL << MPU_PROTENSET1_PROTREG49_Pos) /*!< Bit mask of PROTREG49 field. */ -#define MPU_PROTENSET1_PROTREG49_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG49_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG49_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 16 : Protection enable for region 48. */ -#define MPU_PROTENSET1_PROTREG48_Pos (16UL) /*!< Position of PROTREG48 field. */ -#define MPU_PROTENSET1_PROTREG48_Msk (0x1UL << MPU_PROTENSET1_PROTREG48_Pos) /*!< Bit mask of PROTREG48 field. */ -#define MPU_PROTENSET1_PROTREG48_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG48_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG48_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 15 : Protection enable for region 47. */ -#define MPU_PROTENSET1_PROTREG47_Pos (15UL) /*!< Position of PROTREG47 field. */ -#define MPU_PROTENSET1_PROTREG47_Msk (0x1UL << MPU_PROTENSET1_PROTREG47_Pos) /*!< Bit mask of PROTREG47 field. */ -#define MPU_PROTENSET1_PROTREG47_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG47_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG47_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 14 : Protection enable for region 46. */ -#define MPU_PROTENSET1_PROTREG46_Pos (14UL) /*!< Position of PROTREG46 field. */ -#define MPU_PROTENSET1_PROTREG46_Msk (0x1UL << MPU_PROTENSET1_PROTREG46_Pos) /*!< Bit mask of PROTREG46 field. */ -#define MPU_PROTENSET1_PROTREG46_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG46_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG46_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 13 : Protection enable for region 45. */ -#define MPU_PROTENSET1_PROTREG45_Pos (13UL) /*!< Position of PROTREG45 field. */ -#define MPU_PROTENSET1_PROTREG45_Msk (0x1UL << MPU_PROTENSET1_PROTREG45_Pos) /*!< Bit mask of PROTREG45 field. */ -#define MPU_PROTENSET1_PROTREG45_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG45_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG45_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 12 : Protection enable for region 44. */ -#define MPU_PROTENSET1_PROTREG44_Pos (12UL) /*!< Position of PROTREG44 field. */ -#define MPU_PROTENSET1_PROTREG44_Msk (0x1UL << MPU_PROTENSET1_PROTREG44_Pos) /*!< Bit mask of PROTREG44 field. */ -#define MPU_PROTENSET1_PROTREG44_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG44_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG44_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 11 : Protection enable for region 43. */ -#define MPU_PROTENSET1_PROTREG43_Pos (11UL) /*!< Position of PROTREG43 field. */ -#define MPU_PROTENSET1_PROTREG43_Msk (0x1UL << MPU_PROTENSET1_PROTREG43_Pos) /*!< Bit mask of PROTREG43 field. */ -#define MPU_PROTENSET1_PROTREG43_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG43_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG43_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 10 : Protection enable for region 42. */ -#define MPU_PROTENSET1_PROTREG42_Pos (10UL) /*!< Position of PROTREG42 field. */ -#define MPU_PROTENSET1_PROTREG42_Msk (0x1UL << MPU_PROTENSET1_PROTREG42_Pos) /*!< Bit mask of PROTREG42 field. */ -#define MPU_PROTENSET1_PROTREG42_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG42_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG42_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 9 : Protection enable for region 41. */ -#define MPU_PROTENSET1_PROTREG41_Pos (9UL) /*!< Position of PROTREG41 field. */ -#define MPU_PROTENSET1_PROTREG41_Msk (0x1UL << MPU_PROTENSET1_PROTREG41_Pos) /*!< Bit mask of PROTREG41 field. */ -#define MPU_PROTENSET1_PROTREG41_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG41_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG41_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 8 : Protection enable for region 40. */ -#define MPU_PROTENSET1_PROTREG40_Pos (8UL) /*!< Position of PROTREG40 field. */ -#define MPU_PROTENSET1_PROTREG40_Msk (0x1UL << MPU_PROTENSET1_PROTREG40_Pos) /*!< Bit mask of PROTREG40 field. */ -#define MPU_PROTENSET1_PROTREG40_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG40_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG40_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 7 : Protection enable for region 39. */ -#define MPU_PROTENSET1_PROTREG39_Pos (7UL) /*!< Position of PROTREG39 field. */ -#define MPU_PROTENSET1_PROTREG39_Msk (0x1UL << MPU_PROTENSET1_PROTREG39_Pos) /*!< Bit mask of PROTREG39 field. */ -#define MPU_PROTENSET1_PROTREG39_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG39_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG39_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 6 : Protection enable for region 38. */ -#define MPU_PROTENSET1_PROTREG38_Pos (6UL) /*!< Position of PROTREG38 field. */ -#define MPU_PROTENSET1_PROTREG38_Msk (0x1UL << MPU_PROTENSET1_PROTREG38_Pos) /*!< Bit mask of PROTREG38 field. */ -#define MPU_PROTENSET1_PROTREG38_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG38_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG38_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 5 : Protection enable for region 37. */ -#define MPU_PROTENSET1_PROTREG37_Pos (5UL) /*!< Position of PROTREG37 field. */ -#define MPU_PROTENSET1_PROTREG37_Msk (0x1UL << MPU_PROTENSET1_PROTREG37_Pos) /*!< Bit mask of PROTREG37 field. */ -#define MPU_PROTENSET1_PROTREG37_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG37_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG37_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 4 : Protection enable for region 36. */ -#define MPU_PROTENSET1_PROTREG36_Pos (4UL) /*!< Position of PROTREG36 field. */ -#define MPU_PROTENSET1_PROTREG36_Msk (0x1UL << MPU_PROTENSET1_PROTREG36_Pos) /*!< Bit mask of PROTREG36 field. */ -#define MPU_PROTENSET1_PROTREG36_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG36_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG36_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 3 : Protection enable for region 35. */ -#define MPU_PROTENSET1_PROTREG35_Pos (3UL) /*!< Position of PROTREG35 field. */ -#define MPU_PROTENSET1_PROTREG35_Msk (0x1UL << MPU_PROTENSET1_PROTREG35_Pos) /*!< Bit mask of PROTREG35 field. */ -#define MPU_PROTENSET1_PROTREG35_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG35_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG35_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 2 : Protection enable for region 34. */ -#define MPU_PROTENSET1_PROTREG34_Pos (2UL) /*!< Position of PROTREG34 field. */ -#define MPU_PROTENSET1_PROTREG34_Msk (0x1UL << MPU_PROTENSET1_PROTREG34_Pos) /*!< Bit mask of PROTREG34 field. */ -#define MPU_PROTENSET1_PROTREG34_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG34_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG34_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 1 : Protection enable for region 33. */ -#define MPU_PROTENSET1_PROTREG33_Pos (1UL) /*!< Position of PROTREG33 field. */ -#define MPU_PROTENSET1_PROTREG33_Msk (0x1UL << MPU_PROTENSET1_PROTREG33_Pos) /*!< Bit mask of PROTREG33 field. */ -#define MPU_PROTENSET1_PROTREG33_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG33_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG33_Set (1UL) /*!< Enable protection on write. */ - -/* Bit 0 : Protection enable for region 32. */ -#define MPU_PROTENSET1_PROTREG32_Pos (0UL) /*!< Position of PROTREG32 field. */ -#define MPU_PROTENSET1_PROTREG32_Msk (0x1UL << MPU_PROTENSET1_PROTREG32_Pos) /*!< Bit mask of PROTREG32 field. */ -#define MPU_PROTENSET1_PROTREG32_Disabled (0UL) /*!< Protection disabled. */ -#define MPU_PROTENSET1_PROTREG32_Enabled (1UL) /*!< Protection enabled. */ -#define MPU_PROTENSET1_PROTREG32_Set (1UL) /*!< Enable protection on write. */ - -/* Register: MPU_DISABLEINDEBUG */ -/* Description: Disable erase and write protection mechanism in debug mode. */ - -/* Bit 0 : Disable protection mechanism in debug mode. */ -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Protection enabled. */ -#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Protection disabled. */ - -/* Register: MPU_PROTBLOCKSIZE */ -/* Description: Erase and write protection block size. */ - -/* Bits 1..0 : Erase and write protection block size. */ -#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Pos (0UL) /*!< Position of PROTBLOCKSIZE field. */ -#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Msk (0x3UL << MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Pos) /*!< Bit mask of PROTBLOCKSIZE field. */ -#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_4k (0UL) /*!< Erase and write protection block size is 4k. */ - - -/* Peripheral: NVMC */ -/* Description: Non Volatile Memory Controller. */ - -/* Register: NVMC_READY */ -/* Description: Ready flag. */ - -/* Bit 0 : NVMC ready. */ -#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ -#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ -#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation). */ -#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready. */ - -/* Register: NVMC_CONFIG */ -/* Description: Configuration register. */ - -/* Bits 1..0 : Program write enable. */ -#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ -#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ -#define NVMC_CONFIG_WEN_Ren (0x00UL) /*!< Read only access. */ -#define NVMC_CONFIG_WEN_Wen (0x01UL) /*!< Write enabled. */ -#define NVMC_CONFIG_WEN_Een (0x02UL) /*!< Erase enabled. */ - -/* Register: NVMC_ERASEALL */ -/* Description: Register for erasing all non-volatile user memory. */ - -/* Bit 0 : Starts the erasing of all user NVM (code region 0/1 and UICR registers). */ -#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ -#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation. */ -#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase. */ - -/* Register: NVMC_ERASEUICR */ -/* Description: Register for start erasing User Information Congfiguration Registers. */ - -/* Bit 0 : It can only be used when all contents of code region 1 are erased. */ -#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ -#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation. */ -#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start UICR erase. */ - - -/* Peripheral: POWER */ -/* Description: Power Control. */ - -/* Register: POWER_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 2 : Enable interrupt on POFWARN event. */ -#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Interrupt disabled. */ -#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Interrupt enabled. */ -#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: POWER_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 2 : Disable interrupt on POFWARN event. */ -#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ -#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Interrupt disabled. */ -#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Interrupt enabled. */ -#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: POWER_RESETREAS */ -/* Description: Reset reason. */ - -/* Bit 18 : Reset from wake-up from OFF mode detected by entering into debug interface mode. */ -#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ -#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ - -/* Bit 17 : Reset from wake-up from OFF mode detected by the use of ANADETECT signal from LPCOMP. */ -#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ -#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ - -/* Bit 16 : Reset from wake-up from OFF mode detected by the use of DETECT signal from GPIO. */ -#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ -#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ - -/* Bit 3 : Reset from CPU lock-up detected. */ -#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ -#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ - -/* Bit 2 : Reset from AIRCR.SYSRESETREQ detected. */ -#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ -#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ - -/* Bit 1 : Reset from watchdog detected. */ -#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ -#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ - -/* Bit 0 : Reset from pin-reset detected. */ -#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ -#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ - -/* Register: POWER_RAMSTATUS */ -/* Description: Ram status register. */ - -/* Bit 3 : RAM block 3 status. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ -#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< RAM block 3 is off or powering up. */ -#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< RAM block 3 is on. */ - -/* Bit 2 : RAM block 2 status. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ -#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< RAM block 2 is off or powering up. */ -#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< RAM block 2 is on. */ - -/* Bit 1 : RAM block 1 status. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ -#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< RAM block 1 is off or powering up. */ -#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< RAM block 1 is on. */ - -/* Bit 0 : RAM block 0 status. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ -#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< RAM block 0 is off or powering up. */ -#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< RAM block 0 is on. */ - -/* Register: POWER_SYSTEMOFF */ -/* Description: System off register. */ - -/* Bit 0 : Enter system off mode. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ -#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enter system off mode. */ - -/* Register: POWER_POFCON */ -/* Description: Power failure configuration. */ - -/* Bits 2..1 : Set threshold level. */ -#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_Msk (0x3UL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ -#define POWER_POFCON_THRESHOLD_V21 (0x00UL) /*!< Set threshold to 2.1Volts. */ -#define POWER_POFCON_THRESHOLD_V23 (0x01UL) /*!< Set threshold to 2.3Volts. */ -#define POWER_POFCON_THRESHOLD_V25 (0x02UL) /*!< Set threshold to 2.5Volts. */ -#define POWER_POFCON_THRESHOLD_V27 (0x03UL) /*!< Set threshold to 2.7Volts. */ - -/* Bit 0 : Power failure comparator enable. */ -#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ -#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ -#define POWER_POFCON_POF_Disabled (0UL) /*!< Disabled. */ -#define POWER_POFCON_POF_Enabled (1UL) /*!< Enabled. */ - -/* Register: POWER_GPREGRET */ -/* Description: General purpose retention register. This register is a retained register. */ - -/* Bits 7..0 : General purpose retention register. */ -#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ -#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ - -/* Register: POWER_RAMON */ -/* Description: Ram on/off. */ - -/* Bit 17 : RAM block 1 behaviour in OFF mode. */ -#define POWER_RAMON_OFFRAM1_Pos (17UL) /*!< Position of OFFRAM1 field. */ -#define POWER_RAMON_OFFRAM1_Msk (0x1UL << POWER_RAMON_OFFRAM1_Pos) /*!< Bit mask of OFFRAM1 field. */ -#define POWER_RAMON_OFFRAM1_RAM1Off (0UL) /*!< RAM block 1 OFF in OFF mode. */ -#define POWER_RAMON_OFFRAM1_RAM1On (1UL) /*!< RAM block 1 ON in OFF mode. */ - -/* Bit 16 : RAM block 0 behaviour in OFF mode. */ -#define POWER_RAMON_OFFRAM0_Pos (16UL) /*!< Position of OFFRAM0 field. */ -#define POWER_RAMON_OFFRAM0_Msk (0x1UL << POWER_RAMON_OFFRAM0_Pos) /*!< Bit mask of OFFRAM0 field. */ -#define POWER_RAMON_OFFRAM0_RAM0Off (0UL) /*!< RAM block 0 OFF in OFF mode. */ -#define POWER_RAMON_OFFRAM0_RAM0On (1UL) /*!< RAM block 0 ON in OFF mode. */ - -/* Bit 1 : RAM block 1 behaviour in ON mode. */ -#define POWER_RAMON_ONRAM1_Pos (1UL) /*!< Position of ONRAM1 field. */ -#define POWER_RAMON_ONRAM1_Msk (0x1UL << POWER_RAMON_ONRAM1_Pos) /*!< Bit mask of ONRAM1 field. */ -#define POWER_RAMON_ONRAM1_RAM1Off (0UL) /*!< RAM block 1 OFF in ON mode. */ -#define POWER_RAMON_ONRAM1_RAM1On (1UL) /*!< RAM block 1 ON in ON mode. */ - -/* Bit 0 : RAM block 0 behaviour in ON mode. */ -#define POWER_RAMON_ONRAM0_Pos (0UL) /*!< Position of ONRAM0 field. */ -#define POWER_RAMON_ONRAM0_Msk (0x1UL << POWER_RAMON_ONRAM0_Pos) /*!< Bit mask of ONRAM0 field. */ -#define POWER_RAMON_ONRAM0_RAM0Off (0UL) /*!< RAM block 0 OFF in ON mode. */ -#define POWER_RAMON_ONRAM0_RAM0On (1UL) /*!< RAM block 0 ON in ON mode. */ - -/* Register: POWER_RESET */ -/* Description: Pin reset functionality configuration register. This register is a retained register. */ - -/* Bit 0 : Enable or disable pin reset in debug interface mode. */ -#define POWER_RESET_RESET_Pos (0UL) /*!< Position of RESET field. */ -#define POWER_RESET_RESET_Msk (0x1UL << POWER_RESET_RESET_Pos) /*!< Bit mask of RESET field. */ -#define POWER_RESET_RESET_Disabled (0UL) /*!< Pin reset in debug interface mode disabled. */ -#define POWER_RESET_RESET_Enabled (1UL) /*!< Pin reset in debug interface mode enabled. */ - -/* Register: POWER_RAMONB */ -/* Description: Ram on/off. */ - -/* Bit 17 : RAM block 3 behaviour in OFF mode. */ -#define POWER_RAMONB_OFFRAM3_Pos (17UL) /*!< Position of OFFRAM3 field. */ -#define POWER_RAMONB_OFFRAM3_Msk (0x1UL << POWER_RAMONB_OFFRAM3_Pos) /*!< Bit mask of OFFRAM3 field. */ -#define POWER_RAMONB_OFFRAM3_RAM3Off (0UL) /*!< RAM block 3 OFF in OFF mode. */ -#define POWER_RAMONB_OFFRAM3_RAM3On (1UL) /*!< RAM block 3 ON in OFF mode. */ - -/* Bit 16 : RAM block 2 behaviour in OFF mode. */ -#define POWER_RAMONB_OFFRAM2_Pos (16UL) /*!< Position of OFFRAM2 field. */ -#define POWER_RAMONB_OFFRAM2_Msk (0x1UL << POWER_RAMONB_OFFRAM2_Pos) /*!< Bit mask of OFFRAM2 field. */ -#define POWER_RAMONB_OFFRAM2_RAM2Off (0UL) /*!< RAM block 2 OFF in OFF mode. */ -#define POWER_RAMONB_OFFRAM2_RAM2On (1UL) /*!< RAM block 2 ON in OFF mode. */ - -/* Bit 1 : RAM block 3 behaviour in ON mode. */ -#define POWER_RAMONB_ONRAM3_Pos (1UL) /*!< Position of ONRAM3 field. */ -#define POWER_RAMONB_ONRAM3_Msk (0x1UL << POWER_RAMONB_ONRAM3_Pos) /*!< Bit mask of ONRAM3 field. */ -#define POWER_RAMONB_ONRAM3_RAM3Off (0UL) /*!< RAM block 33 OFF in ON mode. */ -#define POWER_RAMONB_ONRAM3_RAM3On (1UL) /*!< RAM block 3 ON in ON mode. */ - -/* Bit 0 : RAM block 2 behaviour in ON mode. */ -#define POWER_RAMONB_ONRAM2_Pos (0UL) /*!< Position of ONRAM2 field. */ -#define POWER_RAMONB_ONRAM2_Msk (0x1UL << POWER_RAMONB_ONRAM2_Pos) /*!< Bit mask of ONRAM2 field. */ -#define POWER_RAMONB_ONRAM2_RAM2Off (0UL) /*!< RAM block 2 OFF in ON mode. */ -#define POWER_RAMONB_ONRAM2_RAM2On (1UL) /*!< RAM block 2 ON in ON mode. */ - -/* Register: POWER_DCDCEN */ -/* Description: DCDC converter enable configuration register. */ - -/* Bit 0 : Enable DCDC converter. */ -#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ -#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< DCDC converter disabled. */ -#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< DCDC converter enabled. */ - -/* Register: POWER_DCDCFORCE */ -/* Description: DCDC power-up force register. */ - -/* Bit 1 : DCDC power-up force on. */ -#define POWER_DCDCFORCE_FORCEON_Pos (1UL) /*!< Position of FORCEON field. */ -#define POWER_DCDCFORCE_FORCEON_Msk (0x1UL << POWER_DCDCFORCE_FORCEON_Pos) /*!< Bit mask of FORCEON field. */ -#define POWER_DCDCFORCE_FORCEON_NoForce (0UL) /*!< No force. */ -#define POWER_DCDCFORCE_FORCEON_Force (1UL) /*!< Force. */ - -/* Bit 0 : DCDC power-up force off. */ -#define POWER_DCDCFORCE_FORCEOFF_Pos (0UL) /*!< Position of FORCEOFF field. */ -#define POWER_DCDCFORCE_FORCEOFF_Msk (0x1UL << POWER_DCDCFORCE_FORCEOFF_Pos) /*!< Bit mask of FORCEOFF field. */ -#define POWER_DCDCFORCE_FORCEOFF_NoForce (0UL) /*!< No force. */ -#define POWER_DCDCFORCE_FORCEOFF_Force (1UL) /*!< Force. */ - - -/* Peripheral: PPI */ -/* Description: PPI controller. */ - -/* Register: PPI_CHEN */ -/* Description: Channel enable. */ - -/* Bit 31 : Enable PPI channel 31. */ -#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHEN_CH31_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH31_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 30 : Enable PPI channel 30. */ -#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHEN_CH30_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH30_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 29 : Enable PPI channel 29. */ -#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHEN_CH29_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH29_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 28 : Enable PPI channel 28. */ -#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHEN_CH28_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH28_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 27 : Enable PPI channel 27. */ -#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHEN_CH27_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH27_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 26 : Enable PPI channel 26. */ -#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHEN_CH26_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH26_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 25 : Enable PPI channel 25. */ -#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHEN_CH25_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH25_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 24 : Enable PPI channel 24. */ -#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHEN_CH24_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH24_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 23 : Enable PPI channel 23. */ -#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHEN_CH23_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH23_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 22 : Enable PPI channel 22. */ -#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHEN_CH22_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH22_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 21 : Enable PPI channel 21. */ -#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHEN_CH21_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH21_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 20 : Enable PPI channel 20. */ -#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHEN_CH20_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH20_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 15 : Enable PPI channel 15. */ -#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHEN_CH15_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH15_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 14 : Enable PPI channel 14. */ -#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHEN_CH14_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH14_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 13 : Enable PPI channel 13. */ -#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHEN_CH13_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH13_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 12 : Enable PPI channel 12. */ -#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHEN_CH12_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH12_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 11 : Enable PPI channel 11. */ -#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHEN_CH11_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH11_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 10 : Enable PPI channel 10. */ -#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHEN_CH10_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH10_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 9 : Enable PPI channel 9. */ -#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHEN_CH9_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH9_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 8 : Enable PPI channel 8. */ -#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHEN_CH8_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH8_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 7 : Enable PPI channel 7. */ -#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHEN_CH7_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH7_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 6 : Enable PPI channel 6. */ -#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHEN_CH6_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH6_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 5 : Enable PPI channel 5. */ -#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHEN_CH5_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH5_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 4 : Enable PPI channel 4. */ -#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHEN_CH4_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH4_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 3 : Enable PPI channel 3. */ -#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHEN_CH3_Disabled (0UL) /*!< Channel disabled */ -#define PPI_CHEN_CH3_Enabled (1UL) /*!< Channel enabled */ - -/* Bit 2 : Enable PPI channel 2. */ -#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHEN_CH2_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH2_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 1 : Enable PPI channel 1. */ -#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHEN_CH1_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH1_Enabled (1UL) /*!< Channel enabled. */ - -/* Bit 0 : Enable PPI channel 0. */ -#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHEN_CH0_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHEN_CH0_Enabled (1UL) /*!< Channel enabled. */ - -/* Register: PPI_CHENSET */ -/* Description: Channel enable set. */ - -/* Bit 31 : Enable PPI channel 31. */ -#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH31_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 30 : Enable PPI channel 30. */ -#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH30_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 29 : Enable PPI channel 29. */ -#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH29_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 28 : Enable PPI channel 28. */ -#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH28_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 27 : Enable PPI channel 27. */ -#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH27_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 26 : Enable PPI channel 26. */ -#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH26_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 25 : Enable PPI channel 25. */ -#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH25_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 24 : Enable PPI channel 24. */ -#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH24_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 23 : Enable PPI channel 23. */ -#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH23_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 22 : Enable PPI channel 22. */ -#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH22_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 21 : Enable PPI channel 21. */ -#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH21_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 20 : Enable PPI channel 20. */ -#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH20_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 15 : Enable PPI channel 15. */ -#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH15_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 14 : Enable PPI channel 14. */ -#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH14_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 13 : Enable PPI channel 13. */ -#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH13_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 12 : Enable PPI channel 12. */ -#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH12_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 11 : Enable PPI channel 11. */ -#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH11_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 10 : Enable PPI channel 10. */ -#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH10_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 9 : Enable PPI channel 9. */ -#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH9_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 8 : Enable PPI channel 8. */ -#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH8_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 7 : Enable PPI channel 7. */ -#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH7_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 6 : Enable PPI channel 6. */ -#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH6_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 5 : Enable PPI channel 5. */ -#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH5_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 4 : Enable PPI channel 4. */ -#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH4_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 3 : Enable PPI channel 3. */ -#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH3_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 2 : Enable PPI channel 2. */ -#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH2_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 1 : Enable PPI channel 1. */ -#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH1_Set (1UL) /*!< Enable channel on write. */ - -/* Bit 0 : Enable PPI channel 0. */ -#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENSET_CH0_Set (1UL) /*!< Enable channel on write. */ - -/* Register: PPI_CHENCLR */ -/* Description: Channel enable clear. */ - -/* Bit 31 : Disable PPI channel 31. */ -#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 30 : Disable PPI channel 30. */ -#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 29 : Disable PPI channel 29. */ -#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 28 : Disable PPI channel 28. */ -#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 27 : Disable PPI channel 27. */ -#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 26 : Disable PPI channel 26. */ -#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 25 : Disable PPI channel 25. */ -#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 24 : Disable PPI channel 24. */ -#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 23 : Disable PPI channel 23. */ -#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 22 : Disable PPI channel 22. */ -#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 21 : Disable PPI channel 21. */ -#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 20 : Disable PPI channel 20. */ -#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 15 : Disable PPI channel 15. */ -#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 14 : Disable PPI channel 14. */ -#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 13 : Disable PPI channel 13. */ -#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 12 : Disable PPI channel 12. */ -#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 11 : Disable PPI channel 11. */ -#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 10 : Disable PPI channel 10. */ -#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 9 : Disable PPI channel 9. */ -#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 8 : Disable PPI channel 8. */ -#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 7 : Disable PPI channel 7. */ -#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 6 : Disable PPI channel 6. */ -#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 5 : Disable PPI channel 5. */ -#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 4 : Disable PPI channel 4. */ -#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 3 : Disable PPI channel 3. */ -#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 2 : Disable PPI channel 2. */ -#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 1 : Disable PPI channel 1. */ -#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Disable channel on write. */ - -/* Bit 0 : Disable PPI channel 0. */ -#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Channel disabled. */ -#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Channel enabled. */ -#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Disable channel on write. */ - -/* Register: PPI_CHG */ -/* Description: Channel group configuration. */ - -/* Bit 31 : Include CH31 in channel group. */ -#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ -#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ -#define PPI_CHG_CH31_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH31_Included (1UL) /*!< Channel included. */ - -/* Bit 30 : Include CH30 in channel group. */ -#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ -#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ -#define PPI_CHG_CH30_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH30_Included (1UL) /*!< Channel included. */ - -/* Bit 29 : Include CH29 in channel group. */ -#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ -#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ -#define PPI_CHG_CH29_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH29_Included (1UL) /*!< Channel included. */ - -/* Bit 28 : Include CH28 in channel group. */ -#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ -#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ -#define PPI_CHG_CH28_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH28_Included (1UL) /*!< Channel included. */ - -/* Bit 27 : Include CH27 in channel group. */ -#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ -#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ -#define PPI_CHG_CH27_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH27_Included (1UL) /*!< Channel included. */ - -/* Bit 26 : Include CH26 in channel group. */ -#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ -#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ -#define PPI_CHG_CH26_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH26_Included (1UL) /*!< Channel included. */ - -/* Bit 25 : Include CH25 in channel group. */ -#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ -#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ -#define PPI_CHG_CH25_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH25_Included (1UL) /*!< Channel included. */ - -/* Bit 24 : Include CH24 in channel group. */ -#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ -#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ -#define PPI_CHG_CH24_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH24_Included (1UL) /*!< Channel included. */ - -/* Bit 23 : Include CH23 in channel group. */ -#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ -#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ -#define PPI_CHG_CH23_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH23_Included (1UL) /*!< Channel included. */ - -/* Bit 22 : Include CH22 in channel group. */ -#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ -#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ -#define PPI_CHG_CH22_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH22_Included (1UL) /*!< Channel included. */ - -/* Bit 21 : Include CH21 in channel group. */ -#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ -#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ -#define PPI_CHG_CH21_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH21_Included (1UL) /*!< Channel included. */ - -/* Bit 20 : Include CH20 in channel group. */ -#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ -#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ -#define PPI_CHG_CH20_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH20_Included (1UL) /*!< Channel included. */ - -/* Bit 15 : Include CH15 in channel group. */ -#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ -#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ -#define PPI_CHG_CH15_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH15_Included (1UL) /*!< Channel included. */ - -/* Bit 14 : Include CH14 in channel group. */ -#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ -#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ -#define PPI_CHG_CH14_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH14_Included (1UL) /*!< Channel included. */ - -/* Bit 13 : Include CH13 in channel group. */ -#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ -#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ -#define PPI_CHG_CH13_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH13_Included (1UL) /*!< Channel included. */ - -/* Bit 12 : Include CH12 in channel group. */ -#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ -#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ -#define PPI_CHG_CH12_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH12_Included (1UL) /*!< Channel included. */ - -/* Bit 11 : Include CH11 in channel group. */ -#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ -#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ -#define PPI_CHG_CH11_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH11_Included (1UL) /*!< Channel included. */ - -/* Bit 10 : Include CH10 in channel group. */ -#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ -#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ -#define PPI_CHG_CH10_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH10_Included (1UL) /*!< Channel included. */ - -/* Bit 9 : Include CH9 in channel group. */ -#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ -#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ -#define PPI_CHG_CH9_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH9_Included (1UL) /*!< Channel included. */ - -/* Bit 8 : Include CH8 in channel group. */ -#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ -#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ -#define PPI_CHG_CH8_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH8_Included (1UL) /*!< Channel included. */ - -/* Bit 7 : Include CH7 in channel group. */ -#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ -#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ -#define PPI_CHG_CH7_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH7_Included (1UL) /*!< Channel included. */ - -/* Bit 6 : Include CH6 in channel group. */ -#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ -#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ -#define PPI_CHG_CH6_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH6_Included (1UL) /*!< Channel included. */ - -/* Bit 5 : Include CH5 in channel group. */ -#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ -#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ -#define PPI_CHG_CH5_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH5_Included (1UL) /*!< Channel included. */ - -/* Bit 4 : Include CH4 in channel group. */ -#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ -#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ -#define PPI_CHG_CH4_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH4_Included (1UL) /*!< Channel included. */ - -/* Bit 3 : Include CH3 in channel group. */ -#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ -#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ -#define PPI_CHG_CH3_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH3_Included (1UL) /*!< Channel included. */ - -/* Bit 2 : Include CH2 in channel group. */ -#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ -#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ -#define PPI_CHG_CH2_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH2_Included (1UL) /*!< Channel included. */ - -/* Bit 1 : Include CH1 in channel group. */ -#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ -#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ -#define PPI_CHG_CH1_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH1_Included (1UL) /*!< Channel included. */ - -/* Bit 0 : Include CH0 in channel group. */ -#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ -#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ -#define PPI_CHG_CH0_Excluded (0UL) /*!< Channel excluded. */ -#define PPI_CHG_CH0_Included (1UL) /*!< Channel included. */ - - -/* Peripheral: PU */ -/* Description: Patch unit. */ - -/* Register: PU_PATCHADDR */ -/* Description: Relative address of patch instructions. */ - -/* Bits 24..0 : Relative address of patch instructions. */ -#define PU_PATCHADDR_PATCHADDR_Pos (0UL) /*!< Position of PATCHADDR field. */ -#define PU_PATCHADDR_PATCHADDR_Msk (0x1FFFFFFUL << PU_PATCHADDR_PATCHADDR_Pos) /*!< Bit mask of PATCHADDR field. */ - -/* Register: PU_PATCHEN */ -/* Description: Patch enable register. */ - -/* Bit 7 : Patch 7 enabled. */ -#define PU_PATCHEN_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */ -#define PU_PATCHEN_PATCH7_Msk (0x1UL << PU_PATCHEN_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */ -#define PU_PATCHEN_PATCH7_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH7_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 6 : Patch 6 enabled. */ -#define PU_PATCHEN_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */ -#define PU_PATCHEN_PATCH6_Msk (0x1UL << PU_PATCHEN_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */ -#define PU_PATCHEN_PATCH6_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH6_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 5 : Patch 5 enabled. */ -#define PU_PATCHEN_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */ -#define PU_PATCHEN_PATCH5_Msk (0x1UL << PU_PATCHEN_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */ -#define PU_PATCHEN_PATCH5_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH5_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 4 : Patch 4 enabled. */ -#define PU_PATCHEN_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */ -#define PU_PATCHEN_PATCH4_Msk (0x1UL << PU_PATCHEN_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */ -#define PU_PATCHEN_PATCH4_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH4_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 3 : Patch 3 enabled. */ -#define PU_PATCHEN_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */ -#define PU_PATCHEN_PATCH3_Msk (0x1UL << PU_PATCHEN_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */ -#define PU_PATCHEN_PATCH3_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH3_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 2 : Patch 2 enabled. */ -#define PU_PATCHEN_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */ -#define PU_PATCHEN_PATCH2_Msk (0x1UL << PU_PATCHEN_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */ -#define PU_PATCHEN_PATCH2_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH2_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 1 : Patch 1 enabled. */ -#define PU_PATCHEN_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */ -#define PU_PATCHEN_PATCH1_Msk (0x1UL << PU_PATCHEN_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */ -#define PU_PATCHEN_PATCH1_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH1_Enabled (1UL) /*!< Patch enabled. */ - -/* Bit 0 : Patch 0 enabled. */ -#define PU_PATCHEN_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */ -#define PU_PATCHEN_PATCH0_Msk (0x1UL << PU_PATCHEN_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */ -#define PU_PATCHEN_PATCH0_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHEN_PATCH0_Enabled (1UL) /*!< Patch enabled. */ - -/* Register: PU_PATCHENSET */ -/* Description: Patch enable register. */ - -/* Bit 7 : Patch 7 enabled. */ -#define PU_PATCHENSET_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */ -#define PU_PATCHENSET_PATCH7_Msk (0x1UL << PU_PATCHENSET_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */ -#define PU_PATCHENSET_PATCH7_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH7_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH7_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 6 : Patch 6 enabled. */ -#define PU_PATCHENSET_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */ -#define PU_PATCHENSET_PATCH6_Msk (0x1UL << PU_PATCHENSET_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */ -#define PU_PATCHENSET_PATCH6_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH6_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH6_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 5 : Patch 5 enabled. */ -#define PU_PATCHENSET_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */ -#define PU_PATCHENSET_PATCH5_Msk (0x1UL << PU_PATCHENSET_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */ -#define PU_PATCHENSET_PATCH5_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH5_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH5_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 4 : Patch 4 enabled. */ -#define PU_PATCHENSET_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */ -#define PU_PATCHENSET_PATCH4_Msk (0x1UL << PU_PATCHENSET_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */ -#define PU_PATCHENSET_PATCH4_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH4_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH4_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 3 : Patch 3 enabled. */ -#define PU_PATCHENSET_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */ -#define PU_PATCHENSET_PATCH3_Msk (0x1UL << PU_PATCHENSET_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */ -#define PU_PATCHENSET_PATCH3_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH3_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH3_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 2 : Patch 2 enabled. */ -#define PU_PATCHENSET_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */ -#define PU_PATCHENSET_PATCH2_Msk (0x1UL << PU_PATCHENSET_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */ -#define PU_PATCHENSET_PATCH2_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH2_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH2_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 1 : Patch 1 enabled. */ -#define PU_PATCHENSET_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */ -#define PU_PATCHENSET_PATCH1_Msk (0x1UL << PU_PATCHENSET_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */ -#define PU_PATCHENSET_PATCH1_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH1_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH1_Set (1UL) /*!< Enable patch on write. */ - -/* Bit 0 : Patch 0 enabled. */ -#define PU_PATCHENSET_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */ -#define PU_PATCHENSET_PATCH0_Msk (0x1UL << PU_PATCHENSET_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */ -#define PU_PATCHENSET_PATCH0_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENSET_PATCH0_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENSET_PATCH0_Set (1UL) /*!< Enable patch on write. */ - -/* Register: PU_PATCHENCLR */ -/* Description: Patch disable register. */ - -/* Bit 7 : Patch 7 enabled. */ -#define PU_PATCHENCLR_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */ -#define PU_PATCHENCLR_PATCH7_Msk (0x1UL << PU_PATCHENCLR_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */ -#define PU_PATCHENCLR_PATCH7_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH7_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH7_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 6 : Patch 6 enabled. */ -#define PU_PATCHENCLR_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */ -#define PU_PATCHENCLR_PATCH6_Msk (0x1UL << PU_PATCHENCLR_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */ -#define PU_PATCHENCLR_PATCH6_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH6_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH6_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 5 : Patch 5 enabled. */ -#define PU_PATCHENCLR_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */ -#define PU_PATCHENCLR_PATCH5_Msk (0x1UL << PU_PATCHENCLR_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */ -#define PU_PATCHENCLR_PATCH5_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH5_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH5_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 4 : Patch 4 enabled. */ -#define PU_PATCHENCLR_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */ -#define PU_PATCHENCLR_PATCH4_Msk (0x1UL << PU_PATCHENCLR_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */ -#define PU_PATCHENCLR_PATCH4_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH4_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH4_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 3 : Patch 3 enabled. */ -#define PU_PATCHENCLR_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */ -#define PU_PATCHENCLR_PATCH3_Msk (0x1UL << PU_PATCHENCLR_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */ -#define PU_PATCHENCLR_PATCH3_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH3_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH3_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 2 : Patch 2 enabled. */ -#define PU_PATCHENCLR_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */ -#define PU_PATCHENCLR_PATCH2_Msk (0x1UL << PU_PATCHENCLR_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */ -#define PU_PATCHENCLR_PATCH2_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH2_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH2_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 1 : Patch 1 enabled. */ -#define PU_PATCHENCLR_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */ -#define PU_PATCHENCLR_PATCH1_Msk (0x1UL << PU_PATCHENCLR_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */ -#define PU_PATCHENCLR_PATCH1_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH1_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH1_Clear (1UL) /*!< Disable patch on write. */ - -/* Bit 0 : Patch 0 enabled. */ -#define PU_PATCHENCLR_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */ -#define PU_PATCHENCLR_PATCH0_Msk (0x1UL << PU_PATCHENCLR_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */ -#define PU_PATCHENCLR_PATCH0_Disabled (0UL) /*!< Patch disabled. */ -#define PU_PATCHENCLR_PATCH0_Enabled (1UL) /*!< Patch enabled. */ -#define PU_PATCHENCLR_PATCH0_Clear (1UL) /*!< Disable patch on write. */ - - -/* Peripheral: QDEC */ -/* Description: Rotary decoder. */ - -/* Register: QDEC_SHORTS */ -/* Description: Shortcuts for the QDEC. */ - -/* Bit 1 : Shortcut between SAMPLERDY event and STOP task. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Shortcut disabled. */ -#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: QDEC_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 2 : Enable interrupt on ACCOF event. */ -#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on REPORTRDY event. */ -#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on SAMPLERDY event. */ -#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: QDEC_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 2 : Disable interrupt on ACCOF event. */ -#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ -#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on REPORTRDY event. */ -#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ -#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on SAMPLERDY event. */ -#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ -#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: QDEC_ENABLE */ -/* Description: Enable the QDEC. */ - -/* Bit 0 : Enable or disable QDEC. */ -#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled QDEC. */ -#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable QDEC. */ - -/* Register: QDEC_LEDPOL */ -/* Description: LED output pin polarity. */ - -/* Bit 0 : LED output pin polarity. */ -#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ -#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< LED output is active low. */ -#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< LED output is active high. */ - -/* Register: QDEC_SAMPLEPER */ -/* Description: Sample period. */ - -/* Bits 2..0 : Sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0x7UL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ -#define QDEC_SAMPLEPER_SAMPLEPER_128us (0x00UL) /*!< 128us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_256us (0x01UL) /*!< 256us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_512us (0x02UL) /*!< 512us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_1024us (0x03UL) /*!< 1024us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_2048us (0x04UL) /*!< 2048us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_4096us (0x05UL) /*!< 4096us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_8192us (0x06UL) /*!< 8192us sample period. */ -#define QDEC_SAMPLEPER_SAMPLEPER_16384us (0x07UL) /*!< 16384us sample period. */ - -/* Register: QDEC_SAMPLE */ -/* Description: Motion sample value. */ - -/* Bits 31..0 : Last sample taken in compliment to 2. */ -#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ -#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ - -/* Register: QDEC_REPORTPER */ -/* Description: Number of samples to generate an EVENT_REPORTRDY. */ - -/* Bits 2..0 : Number of samples to generate an EVENT_REPORTRDY. */ -#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_Msk (0x7UL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ -#define QDEC_REPORTPER_REPORTPER_10Smpl (0x00UL) /*!< 10 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_40Smpl (0x01UL) /*!< 40 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_80Smpl (0x02UL) /*!< 80 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_120Smpl (0x03UL) /*!< 120 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_160Smpl (0x04UL) /*!< 160 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_200Smpl (0x05UL) /*!< 200 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_240Smpl (0x06UL) /*!< 240 samples per report. */ -#define QDEC_REPORTPER_REPORTPER_280Smpl (0x07UL) /*!< 280 samples per report. */ - -/* Register: QDEC_DBFEN */ -/* Description: Enable debouncer input filters. */ - -/* Bit 0 : Enable debounce input filters. */ -#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ -#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled. */ -#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled. */ - -/* Register: QDEC_LEDPRE */ -/* Description: Time LED is switched ON before the sample. */ - -/* Bits 8..0 : Period in us the LED in switched on prior to sampling. */ -#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ -#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ - -/* Register: QDEC_ACCDBL */ -/* Description: Accumulated double (error) transitions register. */ - -/* Bits 3..0 : Accumulated double (error) transitions. */ -#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ -#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ - -/* Register: QDEC_ACCDBLREAD */ -/* Description: Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC task. */ - -/* Bits 3..0 : Snapshot of accumulated double (error) transitions. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ -#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ - -/* Register: QDEC_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define QDEC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define QDEC_POWER_POWER_Msk (0x1UL << QDEC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define QDEC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define QDEC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: RADIO */ -/* Description: The radio. */ - -/* Register: RADIO_SHORTS */ -/* Description: Shortcuts for the radio. */ - -/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 6 : Shortcut between ADDRESS event and BCSTART task. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 5 : Shortcut between END event and START task. */ -#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ -#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 3 : Shortcut between DISABLED event and RXEN task. */ -#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ -#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 2 : Shortcut between DISABLED event and TXEN task. */ -#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ -#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 1 : Shortcut between END event and DISABLE task. */ -#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ -#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 0 : Shortcut between READY event and START task. */ -#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ -#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ -#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Shortcut disabled. */ -#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: RADIO_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 10 : Enable interrupt on BCMATCH event. */ -#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 7 : Enable interrupt on RSSIEND event. */ -#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 6 : Enable interrupt on DEVMISS event. */ -#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 5 : Enable interrupt on DEVMATCH event. */ -#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 4 : Enable interrupt on DISABLED event. */ -#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 3 : Enable interrupt on END event. */ -#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 2 : Enable interrupt on PAYLOAD event. */ -#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on ADDRESS event. */ -#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on READY event. */ -#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: RADIO_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 10 : Disable interrupt on BCMATCH event. */ -#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ -#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 7 : Disable interrupt on RSSIEND event. */ -#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ -#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 6 : Disable interrupt on DEVMISS event. */ -#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ -#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 5 : Disable interrupt on DEVMATCH event. */ -#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ -#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 4 : Disable interrupt on DISABLED event. */ -#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ -#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 3 : Disable interrupt on END event. */ -#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ -#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 2 : Disable interrupt on PAYLOAD event. */ -#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ -#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on ADDRESS event. */ -#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ -#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on READY event. */ -#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ -#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: RADIO_CRCSTATUS */ -/* Description: CRC status of received packet. */ - -/* Bit 0 : CRC status of received packet. */ -#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error. */ -#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok. */ - -/* Register: RADIO_CD */ -/* Description: Carrier detect. */ - -/* Bit 0 : Carrier detect. */ -#define RADIO_CD_CD_Pos (0UL) /*!< Position of CD field. */ -#define RADIO_CD_CD_Msk (0x1UL << RADIO_CD_CD_Pos) /*!< Bit mask of CD field. */ - -/* Register: RADIO_RXMATCH */ -/* Description: Received address. */ - -/* Bits 2..0 : Logical address in which previous packet was received. */ -#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ -#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ - -/* Register: RADIO_RXCRC */ -/* Description: Received CRC. */ - -/* Bits 23..0 : CRC field of previously received packet. */ -#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ -#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ - -/* Register: RADIO_DAI */ -/* Description: Device address match index. */ - -/* Bits 2..0 : Index (n) of device address (see DAB[n] and DAP[n]) that obtained an address match. */ -#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ -#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ - -/* Register: RADIO_FREQUENCY */ -/* Description: Frequency. */ - -/* Bits 6..0 : Radio channel frequency offset in MHz: RF Frequency = 2400 + FREQUENCY (MHz). Decision point: TXEN or RXEN task. */ -#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ - -/* Register: RADIO_TXPOWER */ -/* Description: Output power. */ - -/* Bits 7..0 : Radio output power. Decision point: TXEN task. */ -#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ -#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x04UL) /*!< +4dBm. */ -#define RADIO_TXPOWER_TXPOWER_0dBm (0x00UL) /*!< 0dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20dBm. */ -#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< -30dBm. */ - -/* Register: RADIO_MODE */ -/* Description: Data rate and modulation. */ - -/* Bits 1..0 : Radio data rate and modulation setting. Decision point: TXEN or RXEN task. */ -#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define RADIO_MODE_MODE_Msk (0x3UL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define RADIO_MODE_MODE_Nrf_1Mbit (0x00UL) /*!< 1Mbit/s Nordic propietary radio mode. */ -#define RADIO_MODE_MODE_Nrf_2Mbit (0x01UL) /*!< 2Mbit/s Nordic propietary radio mode. */ -#define RADIO_MODE_MODE_Nrf_250Kbit (0x02UL) /*!< 250kbit/s Nordic propietary radio mode. */ -#define RADIO_MODE_MODE_Ble_1Mbit (0x03UL) /*!< 1Mbit/s Bluetooth Low Energy */ - -/* Register: RADIO_PCNF0 */ -/* Description: Packet configuration 0. */ - -/* Bits 19..16 : Length of S1 field in number of bits. Decision point: START task. */ -#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ -#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ - -/* Bit 8 : Length of S0 field in number of bytes. Decision point: START task. */ -#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ -#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ - -/* Bits 3..0 : Length of length field in number of bits. Decision point: START task. */ -#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ -#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ - -/* Register: RADIO_PCNF1 */ -/* Description: Packet configuration 1. */ - -/* Bit 25 : Packet whitening enable. */ -#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ -#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Whitening disabled. */ -#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Whitening enabled. */ - -/* Bit 24 : On air endianness of packet length field. Decision point: START task. */ -#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ -#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */ -#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ - -/* Bits 18..16 : Base address length in number of bytes. Decision point: START task. */ -#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ -#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ - -/* Bits 15..8 : Static length in number of bytes. Decision point: START task. */ -#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ -#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ - -/* Bits 7..0 : Maximum length of packet payload in number of bytes. */ -#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ -#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ - -/* Register: RADIO_PREFIX0 */ -/* Description: Prefixes bytes for logical addresses 0 to 3. */ - -/* Bits 31..24 : Address prefix 3. Decision point: START task. */ -#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ -#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ - -/* Bits 23..16 : Address prefix 2. Decision point: START task. */ -#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ -#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ - -/* Bits 15..8 : Address prefix 1. Decision point: START task. */ -#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ -#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ - -/* Bits 7..0 : Address prefix 0. Decision point: START task. */ -#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ -#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ - -/* Register: RADIO_PREFIX1 */ -/* Description: Prefixes bytes for logical addresses 4 to 7. */ - -/* Bits 31..24 : Address prefix 7. Decision point: START task. */ -#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ -#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ - -/* Bits 23..16 : Address prefix 6. Decision point: START task. */ -#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ -#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ - -/* Bits 15..8 : Address prefix 5. Decision point: START task. */ -#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ -#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ - -/* Bits 7..0 : Address prefix 4. Decision point: START task. */ -#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ -#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ - -/* Register: RADIO_TXADDRESS */ -/* Description: Transmit address select. */ - -/* Bits 2..0 : Logical address to be used when transmitting a packet. Decision point: START task. */ -#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ -#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ - -/* Register: RADIO_RXADDRESSES */ -/* Description: Receive address select. */ - -/* Bit 7 : Enable reception on logical address 7. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ -#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 6 : Enable reception on logical address 6. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ -#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 5 : Enable reception on logical address 5. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ -#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 4 : Enable reception on logical address 4. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ -#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 3 : Enable reception on logical address 3. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ -#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 2 : Enable reception on logical address 2. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ -#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 1 : Enable reception on logical address 1. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ -#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Reception enabled. */ - -/* Bit 0 : Enable reception on logical address 0. Decision point: START task. */ -#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ -#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Reception disabled. */ -#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Reception enabled. */ - -/* Register: RADIO_CRCCNF */ -/* Description: CRC configuration. */ - -/* Bit 8 : Leave packet address field out of the CRC calculation. Decision point: START task. */ -#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Msk (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ -#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< Include packet address in CRC calculation. */ -#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< Packet address is skipped in CRC calculation. The CRC calculation will start at the first byte after the address. */ - -/* Bits 1..0 : CRC length. Decision point: START task. */ -#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ -#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ -#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC calculation disabled. */ -#define RADIO_CRCCNF_LEN_One (1UL) /*!< One byte long CRC. */ -#define RADIO_CRCCNF_LEN_Two (2UL) /*!< Two bytes long CRC. */ -#define RADIO_CRCCNF_LEN_Three (3UL) /*!< Three bytes long CRC. */ - -/* Register: RADIO_CRCPOLY */ -/* Description: CRC polynomial. */ - -/* Bits 23..0 : CRC polynomial. Decision point: START task. */ -#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ -#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ - -/* Register: RADIO_CRCINIT */ -/* Description: CRC initial value. */ - -/* Bits 23..0 : Initial value for CRC calculation. Decision point: START task. */ -#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ -#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ - -/* Register: RADIO_TEST */ -/* Description: Test features enable register. */ - -/* Bit 1 : PLL lock. Decision point: TXEN or RXEN task. */ -#define RADIO_TEST_PLLLOCK_Pos (1UL) /*!< Position of PLLLOCK field. */ -#define RADIO_TEST_PLLLOCK_Msk (0x1UL << RADIO_TEST_PLLLOCK_Pos) /*!< Bit mask of PLLLOCK field. */ -#define RADIO_TEST_PLLLOCK_Disabled (0UL) /*!< PLL lock disabled. */ -#define RADIO_TEST_PLLLOCK_Enabled (1UL) /*!< PLL lock enabled. */ - -/* Bit 0 : Constant carrier. Decision point: TXEN task. */ -#define RADIO_TEST_CONSTCARRIER_Pos (0UL) /*!< Position of CONSTCARRIER field. */ -#define RADIO_TEST_CONSTCARRIER_Msk (0x1UL << RADIO_TEST_CONSTCARRIER_Pos) /*!< Bit mask of CONSTCARRIER field. */ -#define RADIO_TEST_CONSTCARRIER_Disabled (0UL) /*!< Constant carrier disabled. */ -#define RADIO_TEST_CONSTCARRIER_Enabled (1UL) /*!< Constant carrier enabled. */ - -/* Register: RADIO_TIFS */ -/* Description: Inter Frame Spacing in microseconds. */ - -/* Bits 7..0 : Inter frame spacing in microseconds. Decision point: START rask */ -#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ -#define RADIO_TIFS_TIFS_Msk (0xFFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ - -/* Register: RADIO_RSSISAMPLE */ -/* Description: RSSI sample. */ - -/* Bits 6..0 : RSSI sample result. The result is read as a positive value so that ReceivedSignalStrength = -RSSISAMPLE dBm */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ -#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ - -/* Register: RADIO_STATE */ -/* Description: Current radio state. */ - -/* Bits 3..0 : Current radio state. */ -#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ -#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ -#define RADIO_STATE_STATE_Disabled (0x00UL) /*!< Radio is in the Disabled state. */ -#define RADIO_STATE_STATE_RxRu (0x01UL) /*!< Radio is in the Rx Ramp Up state. */ -#define RADIO_STATE_STATE_RxIdle (0x02UL) /*!< Radio is in the Rx Idle state. */ -#define RADIO_STATE_STATE_Rx (0x03UL) /*!< Radio is in the Rx state. */ -#define RADIO_STATE_STATE_RxDisable (0x04UL) /*!< Radio is in the Rx Disable state. */ -#define RADIO_STATE_STATE_TxRu (0x09UL) /*!< Radio is in the Tx Ramp Up state. */ -#define RADIO_STATE_STATE_TxIdle (0x0AUL) /*!< Radio is in the Tx Idle state. */ -#define RADIO_STATE_STATE_Tx (0x0BUL) /*!< Radio is in the Tx state. */ -#define RADIO_STATE_STATE_TxDisable (0x0CUL) /*!< Radio is in the Tx Disable state. */ - -/* Register: RADIO_DATAWHITEIV */ -/* Description: Data whitening initial value. */ - -/* Bits 6..0 : Data whitening initial value. Bit 0 corresponds to Position 0 of the LSFR, Bit 1 to position 5... Decision point: TXEN or RXEN task. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ -#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ - -/* Register: RADIO_DAP */ -/* Description: Device address prefix. */ - -/* Bits 15..0 : Device address prefix. */ -#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ -#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ - -/* Register: RADIO_DACNF */ -/* Description: Device address match configuration. */ - -/* Bit 15 : TxAdd for device address 7. */ -#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ -#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ - -/* Bit 14 : TxAdd for device address 6. */ -#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ -#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ - -/* Bit 13 : TxAdd for device address 5. */ -#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ -#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ - -/* Bit 12 : TxAdd for device address 4. */ -#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ -#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ - -/* Bit 11 : TxAdd for device address 3. */ -#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ -#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ - -/* Bit 10 : TxAdd for device address 2. */ -#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ -#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ - -/* Bit 9 : TxAdd for device address 1. */ -#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ -#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ - -/* Bit 8 : TxAdd for device address 0. */ -#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ -#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ - -/* Bit 7 : Enable or disable device address matching using device address 7. */ -#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ -#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ -#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled. */ - -/* Bit 6 : Enable or disable device address matching using device address 6. */ -#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ -#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ -#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled. */ - -/* Bit 5 : Enable or disable device address matching using device address 5. */ -#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ -#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ -#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled. */ - -/* Bit 4 : Enable or disable device address matching using device address 4. */ -#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ -#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ -#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled. */ - -/* Bit 3 : Enable or disable device address matching using device address 3. */ -#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ -#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ -#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled. */ - -/* Bit 2 : Enable or disable device address matching using device address 2. */ -#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ -#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ -#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled. */ - -/* Bit 1 : Enable or disable device address matching using device address 1. */ -#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ -#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ -#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled. */ - -/* Bit 0 : Enable or disable device address matching using device address 0. */ -#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ -#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ -#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled. */ -#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled. */ - -/* Register: RADIO_OVERRIDE0 */ -/* Description: Trim value override register 0. */ - -/* Bits 31..0 : Trim value override 0. */ -#define RADIO_OVERRIDE0_OVERRIDE0_Pos (0UL) /*!< Position of OVERRIDE0 field. */ -#define RADIO_OVERRIDE0_OVERRIDE0_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE0_OVERRIDE0_Pos) /*!< Bit mask of OVERRIDE0 field. */ - -/* Register: RADIO_OVERRIDE1 */ -/* Description: Trim value override register 1. */ - -/* Bits 31..0 : Trim value override 1. */ -#define RADIO_OVERRIDE1_OVERRIDE1_Pos (0UL) /*!< Position of OVERRIDE1 field. */ -#define RADIO_OVERRIDE1_OVERRIDE1_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE1_OVERRIDE1_Pos) /*!< Bit mask of OVERRIDE1 field. */ - -/* Register: RADIO_OVERRIDE2 */ -/* Description: Trim value override register 2. */ - -/* Bits 31..0 : Trim value override 2. */ -#define RADIO_OVERRIDE2_OVERRIDE2_Pos (0UL) /*!< Position of OVERRIDE2 field. */ -#define RADIO_OVERRIDE2_OVERRIDE2_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE2_OVERRIDE2_Pos) /*!< Bit mask of OVERRIDE2 field. */ - -/* Register: RADIO_OVERRIDE3 */ -/* Description: Trim value override register 3. */ - -/* Bits 31..0 : Trim value override 3. */ -#define RADIO_OVERRIDE3_OVERRIDE3_Pos (0UL) /*!< Position of OVERRIDE3 field. */ -#define RADIO_OVERRIDE3_OVERRIDE3_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE3_OVERRIDE3_Pos) /*!< Bit mask of OVERRIDE3 field. */ - -/* Register: RADIO_OVERRIDE4 */ -/* Description: Trim value override register 4. */ - -/* Bit 31 : Enable or disable override of default trim values. */ -#define RADIO_OVERRIDE4_ENABLE_Pos (31UL) /*!< Position of ENABLE field. */ -#define RADIO_OVERRIDE4_ENABLE_Msk (0x1UL << RADIO_OVERRIDE4_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define RADIO_OVERRIDE4_ENABLE_Disabled (0UL) /*!< Override trim values disabled. */ -#define RADIO_OVERRIDE4_ENABLE_Enabled (1UL) /*!< Override trim values enabled. */ - -/* Bits 27..0 : Trim value override 4. */ -#define RADIO_OVERRIDE4_OVERRIDE4_Pos (0UL) /*!< Position of OVERRIDE4 field. */ -#define RADIO_OVERRIDE4_OVERRIDE4_Msk (0xFFFFFFFUL << RADIO_OVERRIDE4_OVERRIDE4_Pos) /*!< Bit mask of OVERRIDE4 field. */ - -/* Register: RADIO_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define RADIO_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define RADIO_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: RNG */ -/* Description: Random Number Generator. */ - -/* Register: RNG_SHORTS */ -/* Description: Shortcuts for the RNG. */ - -/* Bit 0 : Shortcut between VALRDY event and STOP task. */ -#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ -#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: RNG_INTENSET */ -/* Description: Interrupt enable set register */ - -/* Bit 0 : Enable interrupt on VALRDY event. */ -#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: RNG_INTENCLR */ -/* Description: Interrupt enable clear register */ - -/* Bit 0 : Disable interrupt on VALRDY event. */ -#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ -#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: RNG_CONFIG */ -/* Description: Configuration register. */ - -/* Bit 0 : Digital error correction enable. */ -#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ -#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Digital error correction disabled. */ -#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Digital error correction enabled. */ - -/* Register: RNG_VALUE */ -/* Description: RNG random number. */ - -/* Bits 7..0 : Generated random number. */ -#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ -#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ - -/* Register: RNG_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define RNG_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define RNG_POWER_POWER_Msk (0x1UL << RNG_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define RNG_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define RNG_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: RTC */ -/* Description: Real time counter 0. */ - -/* Register: RTC_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 19 : Enable interrupt on COMPARE[3] event. */ -#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 18 : Enable interrupt on COMPARE[2] event. */ -#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 17 : Enable interrupt on COMPARE[1] event. */ -#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 16 : Enable interrupt on COMPARE[0] event. */ -#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on OVRFLW event. */ -#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on TICK event. */ -#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: RTC_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 19 : Disable interrupt on COMPARE[3] event. */ -#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 18 : Disable interrupt on COMPARE[2] event. */ -#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 17 : Disable interrupt on COMPARE[1] event. */ -#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 16 : Disable interrupt on COMPARE[0] event. */ -#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on OVRFLW event. */ -#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on TICK event. */ -#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Interrupt disabled. */ -#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Interrupt enabled. */ -#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: RTC_EVTEN */ -/* Description: Configures event enable routing to PPI for each RTC event. */ - -/* Bit 19 : COMPARE[3] event enable. */ -#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Event enabled. */ - -/* Bit 18 : COMPARE[2] event enable. */ -#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Event enabled. */ - -/* Bit 17 : COMPARE[1] event enable. */ -#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Event enabled. */ - -/* Bit 16 : COMPARE[0] event enable. */ -#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Event enabled. */ - -/* Bit 1 : OVRFLW event enable. */ -#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Event enabled. */ - -/* Bit 0 : TICK event enable. */ -#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Event enabled. */ - -/* Register: RTC_EVTENSET */ -/* Description: Enable events routing to PPI. The reading of this register gives the value of EVTEN. */ - -/* Bit 19 : Enable routing to PPI of COMPARE[3] event. */ -#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable event on write. */ - -/* Bit 18 : Enable routing to PPI of COMPARE[2] event. */ -#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable event on write. */ - -/* Bit 17 : Enable routing to PPI of COMPARE[1] event. */ -#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable event on write. */ - -/* Bit 16 : Enable routing to PPI of COMPARE[0] event. */ -#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable event on write. */ - -/* Bit 1 : Enable routing to PPI of OVRFLW event. */ -#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable event on write. */ - -/* Bit 0 : Enable routing to PPI of TICK event. */ -#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable event on write. */ - -/* Register: RTC_EVTENCLR */ -/* Description: Disable events routing to PPI. The reading of this register gives the value of EVTEN. */ - -/* Bit 19 : Disable routing to PPI of COMPARE[3] event. */ -#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable event on write. */ - -/* Bit 18 : Disable routing to PPI of COMPARE[2] event. */ -#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable event on write. */ - -/* Bit 17 : Disable routing to PPI of COMPARE[1] event. */ -#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable event on write. */ - -/* Bit 16 : Disable routing to PPI of COMPARE[0] event. */ -#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable event on write. */ - -/* Bit 1 : Disable routing to PPI of OVRFLW event. */ -#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ -#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable event on write. */ - -/* Bit 0 : Disable routing to PPI of TICK event. */ -#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ -#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ -#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Event disabled. */ -#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Event enabled. */ -#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable event on write. */ - -/* Register: RTC_COUNTER */ -/* Description: Current COUNTER value. */ - -/* Bits 23..0 : Counter value. */ -#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ -#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ - -/* Register: RTC_PRESCALER */ -/* Description: 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)). Must be written when RTC is STOPed. */ - -/* Bits 11..0 : RTC PRESCALER value. */ -#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: RTC_CC */ -/* Description: Capture/compare registers. */ - -/* Bits 23..0 : Compare value. */ -#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ -#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ - -/* Register: RTC_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define RTC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define RTC_POWER_POWER_Msk (0x1UL << RTC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define RTC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define RTC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: SPI */ -/* Description: SPI master 0. */ - -/* Register: SPI_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 2 : Enable interrupt on READY event. */ -#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPI_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPI_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: SPI_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 2 : Disable interrupt on READY event. */ -#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ -#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ -#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: SPI_ENABLE */ -/* Description: Enable SPI. */ - -/* Bits 2..0 : Enable or disable SPI. */ -#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Msk (0x7UL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPI_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled SPI. */ -#define SPI_ENABLE_ENABLE_Enabled (0x01UL) /*!< Enable SPI. */ - -/* Register: SPI_RXD */ -/* Description: RX data. */ - -/* Bits 7..0 : RX data from last transfer. */ -#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: SPI_TXD */ -/* Description: TX data. */ - -/* Bits 7..0 : TX data for next transfer. */ -#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: SPI_FREQUENCY */ -/* Description: SPI frequency */ - -/* Bits 31..0 : SPI data rate. */ -#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125kbps. */ -#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250kbps. */ -#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500kbps. */ -#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1Mbps. */ -#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2Mbps. */ -#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4Mbps. */ -#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8Mbps. */ - -/* Register: SPI_CONFIG */ -/* Description: Configuration register. */ - -/* Bit 2 : Serial clock (SCK) polarity. */ -#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high. */ -#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low. */ - -/* Bit 1 : Serial clock (SCK) phase. */ -#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of the clock. Shift serial data on trailing edge. */ -#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of the clock. Shift serial data on leading edge. */ - -/* Bit 0 : Bit order. */ -#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit transmitted out first. */ -#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit transmitted out first. */ - -/* Register: SPI_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define SPI_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define SPI_POWER_POWER_Msk (0x1UL << SPI_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define SPI_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define SPI_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: SPIM */ -/* Description: SPI master with easyDMA 1. */ - -/* Register: SPIM_SHORTS */ -/* Description: Shortcuts for SPIM. */ - -/* Bit 17 : Shortcut between END event and START task. */ -#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ -#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ -#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Shortcut disabled. */ -#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: SPIM_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 19 : Enable interrupt on STARTED event. */ -#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 8 : Enable interrupt on ENDTX event. */ -#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 6 : Enable interrupt on END event. */ -#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 4 : Enable interrupt on ENDRX event. */ -#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on STOPPED event. */ -#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: SPIM_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 19 : Disable interrupt on STARTED event. */ -#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ -#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 8 : Disable interrupt on ENDTX event. */ -#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ -#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 6 : Disable interrupt on END event. */ -#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ -#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 4 : Disable interrupt on ENDRX event. */ -#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ -#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on STOPPED event. */ -#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: SPIM_ENABLE */ -/* Description: Enable SPIM. */ - -/* Bits 3..0 : Enable or disable SPIM. */ -#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIM_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled SPIM. */ -#define SPIM_ENABLE_ENABLE_Enabled (0x07UL) /*!< Enable SPIM. */ - -/* Register: SPIM_RXDDATA */ -/* Description: RXD register. */ - -/* Bits 7..0 : RX data received. Double buffered. */ -#define SPIM_RXDDATA_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define SPIM_RXDDATA_RXD_Msk (0xFFUL << SPIM_RXDDATA_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: SPIM_TXDDATA */ -/* Description: TXD register. */ - -/* Bits 7..0 : TX data to send. Double buffered. */ -#define SPIM_TXDDATA_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define SPIM_TXDDATA_TXD_Msk (0xFFUL << SPIM_TXDDATA_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: SPIM_FREQUENCY */ -/* Description: SPI frequency. */ - -/* Bits 31..0 : SPI master data rate. */ -#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps. */ -#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps. */ -#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps. */ -#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps. */ -#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps. */ -#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps. */ -#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps. */ - -/* Register: SPIM_CONFIG */ -/* Description: Configuration register. */ - -/* Bit 2 : Serial clock (SCK) polarity. */ -#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high. */ -#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low. */ - -/* Bit 1 : Serial clock (SCK) phase. */ -#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of the clock. Shift serial data on trailing edge. */ -#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of the clock. Shift serial data on leading edge. */ - -/* Bit 0 : Bit order. */ -#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit transmitted out first. */ -#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit transmitted out first. */ - -/* Register: SPIM_ORC */ -/* Description: Over-read character. */ - -/* Bits 7..0 : Over-read character. */ -#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - -/* Register: SPIM_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define SPIM_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define SPIM_POWER_POWER_Msk (0x1UL << SPIM_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define SPIM_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define SPIM_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - -/* Register: SPIM_RXD_PTR */ -/* Description: Data pointer. */ - -/* Bits 31..0 : Data pointer. */ -#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_RXD_MAXCNT */ -/* Description: Maximum number of buffer bytes to receive. */ - -/* Bits 7..0 : Maximum number of buffer bytes to receive. */ -#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_RXD_AMOUNT */ -/* Description: Number of bytes received in the last transaction. */ - -/* Bits 7..0 : Number of bytes received in the last transaction. */ -#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - -/* Register: SPIM_TXD_PTR */ -/* Description: Data pointer. */ - -/* Bits 31..0 : Data pointer. */ -#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ -#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ - -/* Register: SPIM_TXD_MAXCNT */ -/* Description: Maximum number of buffer bytes to send. */ - -/* Bits 7..0 : Maximum number of buffer bytes to send. */ -#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ -#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ - -/* Register: SPIM_TXD_AMOUNT */ -/* Description: Number of bytes sent in the last transaction. */ - -/* Bits 7..0 : Number of bytes sent in the last transaction. */ -#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ -#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ - - -/* Peripheral: SPIS */ -/* Description: SPI slave 1. */ - -/* Register: SPIS_SHORTS */ -/* Description: Shortcuts for SPIS. */ - -/* Bit 2 : Shortcut between END event and the ACQUIRE task. */ -#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ -#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Shortcut disabled. */ -#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: SPIS_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 10 : Enable interrupt on ACQUIRED event. */ -#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on END event. */ -#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: SPIS_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 10 : Disable interrupt on ACQUIRED event. */ -#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ -#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on END event. */ -#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ -#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ -#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ -#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ -#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: SPIS_SEMSTAT */ -/* Description: Semaphore status. */ - -/* Bits 1..0 : Semaphore status. */ -#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ -#define SPIS_SEMSTAT_SEMSTAT_Free (0x00UL) /*!< Semaphore is free. */ -#define SPIS_SEMSTAT_SEMSTAT_CPU (0x01UL) /*!< Semaphore is assigned to the CPU. */ -#define SPIS_SEMSTAT_SEMSTAT_SPIS (0x02UL) /*!< Semaphore is assigned to the SPIS. */ -#define SPIS_SEMSTAT_SEMSTAT_CPUPending (0x03UL) /*!< Semaphore is assigned to the SPIS, but a handover to the CPU is pending. */ - -/* Register: SPIS_STATUS */ -/* Description: Status from last transaction. */ - -/* Bit 1 : RX buffer overflow detected, and prevented. */ -#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ -#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Error not present. */ -#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Error present. */ -#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Clear on write. */ - -/* Bit 0 : TX buffer overread detected, and prevented. */ -#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ -#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Error not present. */ -#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Error present. */ -#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Clear on write. */ - -/* Register: SPIS_ENABLE */ -/* Description: Enable SPIS. */ - -/* Bits 2..0 : Enable or disable SPIS. */ -#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Msk (0x7UL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define SPIS_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled SPIS. */ -#define SPIS_ENABLE_ENABLE_Enabled (0x02UL) /*!< Enable SPIS. */ - -/* Register: SPIS_MAXRX */ -/* Description: Maximum number of bytes in the receive buffer. */ - -/* Bits 7..0 : Maximum number of bytes in the receive buffer. */ -#define SPIS_MAXRX_MAXRX_Pos (0UL) /*!< Position of MAXRX field. */ -#define SPIS_MAXRX_MAXRX_Msk (0xFFUL << SPIS_MAXRX_MAXRX_Pos) /*!< Bit mask of MAXRX field. */ - -/* Register: SPIS_AMOUNTRX */ -/* Description: Number of bytes received in last granted transaction. */ - -/* Bits 7..0 : Number of bytes received in last granted transaction. */ -#define SPIS_AMOUNTRX_AMOUNTRX_Pos (0UL) /*!< Position of AMOUNTRX field. */ -#define SPIS_AMOUNTRX_AMOUNTRX_Msk (0xFFUL << SPIS_AMOUNTRX_AMOUNTRX_Pos) /*!< Bit mask of AMOUNTRX field. */ - -/* Register: SPIS_MAXTX */ -/* Description: Maximum number of bytes in the transmit buffer. */ - -/* Bits 7..0 : Maximum number of bytes in the transmit buffer. */ -#define SPIS_MAXTX_MAXTX_Pos (0UL) /*!< Position of MAXTX field. */ -#define SPIS_MAXTX_MAXTX_Msk (0xFFUL << SPIS_MAXTX_MAXTX_Pos) /*!< Bit mask of MAXTX field. */ - -/* Register: SPIS_AMOUNTTX */ -/* Description: Number of bytes transmitted in last granted transaction. */ - -/* Bits 7..0 : Number of bytes transmitted in last granted transaction. */ -#define SPIS_AMOUNTTX_AMOUNTTX_Pos (0UL) /*!< Position of AMOUNTTX field. */ -#define SPIS_AMOUNTTX_AMOUNTTX_Msk (0xFFUL << SPIS_AMOUNTTX_AMOUNTTX_Pos) /*!< Bit mask of AMOUNTTX field. */ - -/* Register: SPIS_CONFIG */ -/* Description: Configuration register. */ - -/* Bit 2 : Serial clock (SCK) polarity. */ -#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ -#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ -#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high. */ -#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low. */ - -/* Bit 1 : Serial clock (SCK) phase. */ -#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ -#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ -#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of the clock. Shift serial data on trailing edge. */ -#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of the clock. Shift serial data on leading edge. */ - -/* Bit 0 : Bit order. */ -#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ -#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ -#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit transmitted out first. */ -#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit transmitted out first. */ - -/* Register: SPIS_DEF */ -/* Description: Default character. */ - -/* Bits 7..0 : Default character. */ -#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ -#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ - -/* Register: SPIS_ORC */ -/* Description: Over-read character. */ - -/* Bits 7..0 : Over-read character. */ -#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ -#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ - -/* Register: SPIS_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define SPIS_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define SPIS_POWER_POWER_Msk (0x1UL << SPIS_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define SPIS_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define SPIS_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: TEMP */ -/* Description: Temperature Sensor. */ - -/* Register: TEMP_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 0 : Enable interrupt on DATARDY event. */ -#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: TEMP_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 0 : Disable interrupt on DATARDY event. */ -#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ -#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: TEMP_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define TEMP_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define TEMP_POWER_POWER_Msk (0x1UL << TEMP_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define TEMP_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define TEMP_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: TIMER */ -/* Description: Timer 0. */ - -/* Register: TIMER_SHORTS */ -/* Description: Shortcuts for Timer. */ - -/* Bit 11 : Shortcut between CC[3] event and the STOP task. */ -#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ -#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 10 : Shortcut between CC[2] event and the STOP task. */ -#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ -#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 9 : Shortcut between CC[1] event and the STOP task. */ -#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ -#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 8 : Shortcut between CC[0] event and the STOP task. */ -#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ -#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 3 : Shortcut between CC[3] event and the CLEAR task. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 2 : Shortcut between CC[2] event and the CLEAR task. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 1 : Shortcut between CC[1] event and the CLEAR task. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 0 : Shortcut between CC[0] event and the CLEAR task. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ -#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: TIMER_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 19 : Enable interrupt on COMPARE[3] */ -#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 18 : Enable interrupt on COMPARE[2] */ -#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 17 : Enable interrupt on COMPARE[1] */ -#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 16 : Enable interrupt on COMPARE[0] */ -#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: TIMER_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 19 : Disable interrupt on COMPARE[3] */ -#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ -#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 18 : Disable interrupt on COMPARE[2] */ -#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ -#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 17 : Disable interrupt on COMPARE[1] */ -#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ -#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 16 : Disable interrupt on COMPARE[0] */ -#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ -#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ -#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ -#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: TIMER_MODE */ -/* Description: Timer Mode selection. */ - -/* Bit 0 : Select Normal or Counter mode. */ -#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ -#define TIMER_MODE_MODE_Msk (0x1UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ -#define TIMER_MODE_MODE_Timer (0UL) /*!< Timer in Normal mode. */ -#define TIMER_MODE_MODE_Counter (1UL) /*!< Timer in Counter mode. */ - -/* Register: TIMER_BITMODE */ -/* Description: Sets timer behaviour. */ - -/* Bits 1..0 : Sets timer behaviour ro be like the implementation of a timer with width as indicated. */ -#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ -#define TIMER_BITMODE_BITMODE_16Bit (0x00UL) /*!< 16-bit timer behaviour. */ -#define TIMER_BITMODE_BITMODE_08Bit (0x01UL) /*!< 8-bit timer behaviour. */ -#define TIMER_BITMODE_BITMODE_24Bit (0x02UL) /*!< 24-bit timer behaviour. */ -#define TIMER_BITMODE_BITMODE_32Bit (0x03UL) /*!< 32-bit timer behaviour. */ - -/* Register: TIMER_PRESCALER */ -/* Description: 4-bit prescaler to source clock frequency (max value 9). Source clock frequency is divided by 2^SCALE. */ - -/* Bits 3..0 : Timer PRESCALER value. Max value is 9. */ -#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ -#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ - -/* Register: TIMER_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define TIMER_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define TIMER_POWER_POWER_Msk (0x1UL << TIMER_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define TIMER_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define TIMER_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: TWI */ -/* Description: Two-wire interface master 0. */ - -/* Register: TWI_SHORTS */ -/* Description: Shortcuts for TWI. */ - -/* Bit 1 : Shortcut between BB event and the STOP task. */ -#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ -#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Shortcut disabled. */ -#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 0 : Shortcut between BB event and the SUSPEND task. */ -#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ -#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Shortcut disabled. */ -#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: TWI_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 18 : Enable interrupt on SUSPENDED event. */ -#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 14 : Enable interrupt on BB event. */ -#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENSET_BB_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_BB_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_BB_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 9 : Enable interrupt on ERROR event. */ -#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 7 : Enable interrupt on TXDSENT event. */ -#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 2 : Enable interrupt on READY event. */ -#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on STOPPED event. */ -#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: TWI_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 18 : Disable interrupt on SUSPENDED event. */ -#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ -#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 14 : Disable interrupt on BB event. */ -#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ -#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ -#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 9 : Disable interrupt on ERROR event. */ -#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 7 : Disable interrupt on TXDSENT event. */ -#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ -#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 2 : Disable interrupt on RXDREADY event. */ -#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ -#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on STOPPED event. */ -#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ -#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ -#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ -#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: TWI_ERRORSRC */ -/* Description: Two-wire error source. Write error field to 1 to clear error. */ - -/* Bit 2 : NACK received after sending a data byte. */ -#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ -#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ -#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Error not present. */ -#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Error present. */ -#define TWI_ERRORSRC_DNACK_Clear (1UL) /*!< Clear error on write. */ - -/* Bit 1 : NACK received after sending the address. */ -#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ -#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ -#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Error not present. */ -#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Error present. */ -#define TWI_ERRORSRC_ANACK_Clear (1UL) /*!< Clear error on write. */ - -/* Register: TWI_ENABLE */ -/* Description: Enable two-wire master. */ - -/* Bits 2..0 : Enable or disable W2M */ -#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Msk (0x7UL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define TWI_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled. */ -#define TWI_ENABLE_ENABLE_Enabled (0x05UL) /*!< Enabled. */ - -/* Register: TWI_RXD */ -/* Description: RX data register. */ - -/* Bits 7..0 : RX data from last transfer. */ -#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: TWI_TXD */ -/* Description: TX data register. */ - -/* Bits 7..0 : TX data for next transfer. */ -#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: TWI_FREQUENCY */ -/* Description: Two-wire frequency. */ - -/* Bits 31..0 : Two-wire master clock frequency. */ -#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ -#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps. */ -#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps. */ -#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps. */ - -/* Register: TWI_ADDRESS */ -/* Description: Address used in the two-wire transfer. */ - -/* Bits 6..0 : Two-wire address. */ -#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ -#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ - -/* Register: TWI_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define TWI_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define TWI_POWER_POWER_Msk (0x1UL << TWI_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define TWI_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define TWI_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: UART */ -/* Description: Universal Asynchronous Receiver/Transmitter. */ - -/* Register: UART_SHORTS */ -/* Description: Shortcuts for UART. */ - -/* Bit 4 : Shortcut between NCTS event and the STOPRX task. */ -#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ -#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Shortcut disabled. */ -#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Bit 3 : Shortcut between CTS event and the STARTRX task. */ -#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ -#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Shortcut disabled. */ -#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Shortcut enabled. */ - -/* Register: UART_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 17 : Enable interrupt on RXTO event. */ -#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 9 : Enable interrupt on ERROR event. */ -#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 7 : Enable interrupt on TXRDY event. */ -#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 2 : Enable interrupt on RXRDY event. */ -#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 1 : Enable interrupt on NCTS event. */ -#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable interrupt on write. */ - -/* Bit 0 : Enable interrupt on CTS event. */ -#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENSET_CTS_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENSET_CTS_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENSET_CTS_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: UART_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 17 : Disable interrupt on RXTO event. */ -#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ -#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ -#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 9 : Disable interrupt on ERROR event. */ -#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ -#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ -#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 7 : Disable interrupt on TXRDY event. */ -#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ -#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 2 : Disable interrupt on RXRDY event. */ -#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ -#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 1 : Disable interrupt on NCTS event. */ -#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ -#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ -#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Bit 0 : Disable interrupt on CTS event. */ -#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ -#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ -#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Interrupt disabled. */ -#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Interrupt enabled. */ -#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: UART_ERRORSRC */ -/* Description: Error source. Write error field to 1 to clear error. */ - -/* Bit 3 : The serial data input is '0' for longer than the length of a data frame. */ -#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ -#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ -#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Error not present. */ -#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Error present. */ -#define UART_ERRORSRC_BREAK_Clear (1UL) /*!< Clear error on write. */ - -/* Bit 2 : A valid stop bit is not detected on the serial data input after all bits in a character have been received. */ -#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ -#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Error not present. */ -#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Error present. */ -#define UART_ERRORSRC_FRAMING_Clear (1UL) /*!< Clear error on write. */ - -/* Bit 1 : A character with bad parity is received. Only checked if HW parity control is enabled. */ -#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Error not present. */ -#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Error present. */ -#define UART_ERRORSRC_PARITY_Clear (1UL) /*!< Clear error on write. */ - -/* Bit 0 : A start bit is received while the previous data still lies in RXD. (Data loss). */ -#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Error not present. */ -#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Error present. */ -#define UART_ERRORSRC_OVERRUN_Clear (1UL) /*!< Clear error on write. */ - -/* Register: UART_ENABLE */ -/* Description: Enable UART and acquire IOs. */ - -/* Bits 2..0 : Enable or disable UART and acquire IOs. */ -#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ -#define UART_ENABLE_ENABLE_Msk (0x7UL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ -#define UART_ENABLE_ENABLE_Disabled (0x00UL) /*!< UART disabled. */ -#define UART_ENABLE_ENABLE_Enabled (0x04UL) /*!< UART enabled. */ - -/* Register: UART_RXD */ -/* Description: RXD register. On read action the buffer pointer is displaced. Once read the character is consumed. If read when no character available, the UART will stop working. */ - -/* Bits 7..0 : RX data from previous transfer. Double buffered. */ -#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ -#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ - -/* Register: UART_TXD */ -/* Description: TXD register. */ - -/* Bits 7..0 : TX data for transfer. */ -#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ -#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ - -/* Register: UART_BAUDRATE */ -/* Description: UART Baudrate. */ - -/* Bits 31..0 : UART baudrate. */ -#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ -#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBEDFA4UL) /*!< 921600 baud. */ -#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1M baud. */ - -/* Register: UART_CONFIG */ -/* Description: Configuration of parity and hardware flow control register. */ - -/* Bits 3..1 : Include parity bit. */ -#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ -#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ -#define UART_CONFIG_PARITY_Excluded (0UL) /*!< Parity bit excluded. */ -#define UART_CONFIG_PARITY_Included (7UL) /*!< Parity bit included. */ - -/* Bit 0 : Hardware flow control. */ -#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ -#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ -#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Hardware flow control disabled. */ -#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Hardware flow control enabled. */ - -/* Register: UART_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define UART_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define UART_POWER_POWER_Msk (0x1UL << UART_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define UART_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define UART_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/* Peripheral: UICR */ -/* Description: User Information Configuration. */ - -/* Register: UICR_RBPCONF */ -/* Description: Readback protection configuration. */ - -/* Bits 15..8 : Readback protect all code in the device. */ -#define UICR_RBPCONF_PALL_Pos (8UL) /*!< Position of PALL field. */ -#define UICR_RBPCONF_PALL_Msk (0xFFUL << UICR_RBPCONF_PALL_Pos) /*!< Bit mask of PALL field. */ -#define UICR_RBPCONF_PALL_Disabled (0xFFUL) /*!< Disabled. */ -#define UICR_RBPCONF_PALL_Enabled (0x00UL) /*!< Enabled. */ - -/* Bits 7..0 : Readback protect region 0. Will be ignored if pre-programmed factory code is present on the chip. */ -#define UICR_RBPCONF_PR0_Pos (0UL) /*!< Position of PR0 field. */ -#define UICR_RBPCONF_PR0_Msk (0xFFUL << UICR_RBPCONF_PR0_Pos) /*!< Bit mask of PR0 field. */ -#define UICR_RBPCONF_PR0_Disabled (0xFFUL) /*!< Disabled. */ -#define UICR_RBPCONF_PR0_Enabled (0x00UL) /*!< Enabled. */ - -/* Register: UICR_XTALFREQ */ -/* Description: Reset value for CLOCK XTALFREQ register. */ - -/* Bits 7..0 : Reset value for CLOCK XTALFREQ register. */ -#define UICR_XTALFREQ_XTALFREQ_Pos (0UL) /*!< Position of XTALFREQ field. */ -#define UICR_XTALFREQ_XTALFREQ_Msk (0xFFUL << UICR_XTALFREQ_XTALFREQ_Pos) /*!< Bit mask of XTALFREQ field. */ -#define UICR_XTALFREQ_XTALFREQ_16MHz (0xFFUL) /*!< 16MHz Xtal is used. */ -#define UICR_XTALFREQ_XTALFREQ_32MHz (0x00UL) /*!< 32MHz Xtal is used. */ - -/* Register: UICR_FWID */ -/* Description: Firmware ID. */ - -/* Bits 15..0 : Identification number for the firmware loaded into the chip. */ -#define UICR_FWID_FWID_Pos (0UL) /*!< Position of FWID field. */ -#define UICR_FWID_FWID_Msk (0xFFFFUL << UICR_FWID_FWID_Pos) /*!< Bit mask of FWID field. */ - - -/* Peripheral: WDT */ -/* Description: Watchdog Timer. */ - -/* Register: WDT_INTENSET */ -/* Description: Interrupt enable set register. */ - -/* Bit 0 : Enable interrupt on TIMEOUT event. */ -#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Interrupt disabled. */ -#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Interrupt enabled. */ -#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable interrupt on write. */ - -/* Register: WDT_INTENCLR */ -/* Description: Interrupt enable clear register. */ - -/* Bit 0 : Disable interrupt on TIMEOUT event. */ -#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ -#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Interrupt disabled. */ -#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Interrupt enabled. */ -#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable interrupt on write. */ - -/* Register: WDT_RUNSTATUS */ -/* Description: Watchdog running status. */ - -/* Bit 0 : Watchdog running status. */ -#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ -#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog timer is not running. */ -#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog timer is running. */ - -/* Register: WDT_REQSTATUS */ -/* Description: Request status. */ - -/* Bit 7 : Request status for RR[7]. */ -#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled and has not jet requested. */ - -/* Bit 6 : Request status for RR[6]. */ -#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled and has not jet requested. */ - -/* Bit 5 : Request status for RR[5]. */ -#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled and has not jet requested. */ - -/* Bit 4 : Request status for RR[4]. */ -#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled and has not jet requested. */ - -/* Bit 3 : Request status for RR[3]. */ -#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled and has not jet requested. */ - -/* Bit 2 : Request status for RR[2]. */ -#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled and has not jet requested. */ - -/* Bit 1 : Request status for RR[1]. */ -#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled and has not jet requested. */ - -/* Bit 0 : Request status for RR[0]. */ -#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled or has already requested reload. */ -#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled and has not jet requested. */ - -/* Register: WDT_RREN */ -/* Description: Reload request enable. */ - -/* Bit 7 : Enable or disable RR[7] register. */ -#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ -#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ -#define WDT_RREN_RR7_Disabled (0UL) /*!< RR[7] register is disabled. */ -#define WDT_RREN_RR7_Enabled (1UL) /*!< RR[7] register is enabled. */ - -/* Bit 6 : Enable or disable RR[6] register. */ -#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ -#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ -#define WDT_RREN_RR6_Disabled (0UL) /*!< RR[6] register is disabled. */ -#define WDT_RREN_RR6_Enabled (1UL) /*!< RR[6] register is enabled. */ - -/* Bit 5 : Enable or disable RR[5] register. */ -#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ -#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ -#define WDT_RREN_RR5_Disabled (0UL) /*!< RR[5] register is disabled. */ -#define WDT_RREN_RR5_Enabled (1UL) /*!< RR[5] register is enabled. */ - -/* Bit 4 : Enable or disable RR[4] register. */ -#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ -#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ -#define WDT_RREN_RR4_Disabled (0UL) /*!< RR[4] register is disabled. */ -#define WDT_RREN_RR4_Enabled (1UL) /*!< RR[4] register is enabled. */ - -/* Bit 3 : Enable or disable RR[3] register. */ -#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ -#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ -#define WDT_RREN_RR3_Disabled (0UL) /*!< RR[3] register is disabled. */ -#define WDT_RREN_RR3_Enabled (1UL) /*!< RR[3] register is enabled. */ - -/* Bit 2 : Enable or disable RR[2] register. */ -#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ -#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ -#define WDT_RREN_RR2_Disabled (0UL) /*!< RR[2] register is disabled. */ -#define WDT_RREN_RR2_Enabled (1UL) /*!< RR[2] register is enabled. */ - -/* Bit 1 : Enable or disable RR[1] register. */ -#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ -#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ -#define WDT_RREN_RR1_Disabled (0UL) /*!< RR[1] register is disabled. */ -#define WDT_RREN_RR1_Enabled (1UL) /*!< RR[1] register is enabled. */ - -/* Bit 0 : Enable or disable RR[0] register. */ -#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ -#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ -#define WDT_RREN_RR0_Disabled (0UL) /*!< RR[0] register is disabled. */ -#define WDT_RREN_RR0_Enabled (1UL) /*!< RR[0] register is enabled. */ - -/* Register: WDT_CONFIG */ -/* Description: Configuration register. */ - -/* Bit 3 : Configure the watchdog to pause or not while the CPU is halted by the debugger. */ -#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ -#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ -#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger. */ -#define WDT_CONFIG_HALT_Run (1UL) /*!< Do not pause watchdog while the CPU is halted by the debugger. */ - -/* Bit 0 : Configure the watchdog to pause or not while the CPU is sleeping. */ -#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ -#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is asleep. */ -#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Do not pause watchdog while the CPU is asleep. */ - -/* Register: WDT_RR */ -/* Description: Reload requests registers. */ - -/* Bits 31..0 : Reload register. */ -#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ -#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ -#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer. */ - -/* Register: WDT_POWER */ -/* Description: Peripheral power control. */ - -/* Bit 0 : Peripheral power control. */ -#define WDT_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ -#define WDT_POWER_POWER_Msk (0x1UL << WDT_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ -#define WDT_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ -#define WDT_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ - - -/*lint --flb "Leave library region" */ -#endif
--- a/TARGET_NRF51_MICROBIT/nrf_delay.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,74 +0,0 @@
-#ifndef _NRF_DELAY_H
-#define _NRF_DELAY_H
-
-// #include "nrf.h"
-
-/*lint --e{438, 522} "Variable not used" "Function lacks side-effects" */
-#if defined ( __CC_ARM )
-static __ASM void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
-{
-loop
- SUBS R0, R0, #1
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- NOP
- BNE loop
- BX LR
-}
-#elif defined ( __ICCARM__ )
-static void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
-{
-__ASM (
-"loop:\n\t"
- " SUBS R0, R0, #1\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " NOP\n\t"
- " BNE loop\n\t");
-}
-#elif defined ( __GNUC__ )
-__INLINE static void nrf_delay_us(uint32_t volatile number_of_us)
-{
- do
- {
- __ASM volatile (
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- "NOP\n\t"
- );
- } while (--number_of_us);
-}
-#endif
-
-void nrf_delay_ms(uint32_t volatile number_of_ms);
-
-#endif
--- a/TARGET_NRF51_MICROBIT/system_nrf51.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,68 +0,0 @@
-/* Copyright (c) 2013, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * * Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef SYSTEM_NRF51_H
-#define SYSTEM_NRF51_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_NRF51_H */
--- a/Ticker.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,127 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TICKER_H
-#define MBED_TICKER_H
-
-#include "TimerEvent.h"
-#include "FunctionPointer.h"
-
-namespace mbed {
-
-/** A Ticker is used to call a function at a recurring interval
- *
- * You can use as many seperate Ticker objects as you require.
- *
- * Example:
- * @code
- * // Toggle the blinking led after 5 seconds
- *
- * #include "mbed.h"
- *
- * Ticker timer;
- * DigitalOut led1(LED1);
- * DigitalOut led2(LED2);
- *
- * int flip = 0;
- *
- * void attime() {
- * flip = !flip;
- * }
- *
- * int main() {
- * timer.attach(&attime, 5);
- * while(1) {
- * if(flip == 0) {
- * led1 = !led1;
- * } else {
- * led2 = !led2;
- * }
- * wait(0.2);
- * }
- * }
- * @endcode
- */
-class Ticker : public TimerEvent {
-
-public:
- Ticker() : TimerEvent() {
- }
-
- Ticker(const ticker_data_t *data) : TimerEvent(data) {
- }
-
- /** Attach a function to be called by the Ticker, specifiying the interval in seconds
- *
- * @param fptr pointer to the function to be called
- * @param t the time between calls in seconds
- */
- void attach(void (*fptr)(void), float t) {
- attach_us(fptr, t * 1000000.0f);
- }
-
- /** Attach a member function to be called by the Ticker, specifiying the interval in seconds
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- * @param t the time between calls in seconds
- */
- template<typename T>
- void attach(T* tptr, void (T::*mptr)(void), float t) {
- attach_us(tptr, mptr, t * 1000000.0f);
- }
-
- /** Attach a function to be called by the Ticker, specifiying the interval in micro-seconds
- *
- * @param fptr pointer to the function to be called
- * @param t the time between calls in micro-seconds
- */
- void attach_us(void (*fptr)(void), timestamp_t t) {
- _function.attach(fptr);
- setup(t);
- }
-
- /** Attach a member function to be called by the Ticker, specifiying the interval in micro-seconds
- *
- * @param tptr pointer to the object to call the member function on
- * @param mptr pointer to the member function to be called
- * @param t the time between calls in micro-seconds
- */
- template<typename T>
- void attach_us(T* tptr, void (T::*mptr)(void), timestamp_t t) {
- _function.attach(tptr, mptr);
- setup(t);
- }
-
- virtual ~Ticker() {
- detach();
- }
-
- /** Detach the function
- */
- void detach();
-
-protected:
- void setup(timestamp_t t);
- virtual void handler();
-
-protected:
- timestamp_t _delay; /**< Time delay (in microseconds) for re-setting the multi-shot callback. */
- FunctionPointer _function; /**< Callback. */
-};
-
-} // namespace mbed
-
-#endif
--- a/Timeout.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,59 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TIMEOUT_H
-#define MBED_TIMEOUT_H
-
-#include "Ticker.h"
-
-namespace mbed {
-
-/** A Timeout is used to call a function at a point in the future
- *
- * You can use as many seperate Timeout objects as you require.
- *
- * Example:
- * @code
- * // Blink until timeout.
- *
- * #include "mbed.h"
- *
- * Timeout timeout;
- * DigitalOut led(LED1);
- *
- * int on = 1;
- *
- * void attimeout() {
- * on = 0;
- * }
- *
- * int main() {
- * timeout.attach(&attimeout, 5);
- * while(on) {
- * led = !led;
- * wait(0.2);
- * }
- * }
- * @endcode
- */
-class Timeout : public Ticker {
-
-protected:
- virtual void handler();
-};
-
-} // namespace mbed
-
-#endif
--- a/Timer.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,91 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TIMER_H
-#define MBED_TIMER_H
-
-#include "platform.h"
-#include "ticker_api.h"
-
-namespace mbed {
-
-/** A general purpose timer
- *
- * Example:
- * @code
- * // Count the time to toggle a LED
- *
- * #include "mbed.h"
- *
- * Timer timer;
- * DigitalOut led(LED1);
- * int begin, end;
- *
- * int main() {
- * timer.start();
- * begin = timer.read_us();
- * led = !led;
- * end = timer.read_us();
- * printf("Toggle the led takes %d us", end - begin);
- * }
- * @endcode
- */
-class Timer {
-
-public:
- Timer();
- Timer(const ticker_data_t *data);
-
- /** Start the timer
- */
- void start();
-
- /** Stop the timer
- */
- void stop();
-
- /** Reset the timer to 0.
- *
- * If it was already counting, it will continue
- */
- void reset();
-
- /** Get the time passed in seconds
- */
- float read();
-
- /** Get the time passed in mili-seconds
- */
- int read_ms();
-
- /** Get the time passed in micro-seconds
- */
- int read_us();
-
-#ifdef MBED_OPERATORS
- operator float();
-#endif
-
-protected:
- int slicetime();
- int _running; // whether the timer is running
- unsigned int _start; // the start time of the latest slice
- int _time; // any accumulated time from previous slices
- const ticker_data_t *_ticker_data;
-};
-
-} // namespace mbed
-
-#endif
--- a/TimerEvent.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,56 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TIMEREVENT_H
-#define MBED_TIMEREVENT_H
-
-#include "ticker_api.h"
-#include "us_ticker_api.h"
-
-namespace mbed {
-
-/** Base abstraction for timer interrupts
-*/
-class TimerEvent {
-public:
- TimerEvent();
- TimerEvent(const ticker_data_t *data);
-
- /** The handler registered with the underlying timer interrupt
- */
- static void irq(uint32_t id);
-
- /** Destruction removes it...
- */
- virtual ~TimerEvent();
-
-protected:
- // The handler called to service the timer event of the derived class
- virtual void handler() = 0;
-
- // insert in to linked list
- void insert(timestamp_t timestamp);
-
- // remove from linked list, if in it
- void remove();
-
- ticker_event_t event;
-
- const ticker_data_t *_ticker_data;
-};
-
-} // namespace mbed
-
-#endif
--- a/Transaction.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,73 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TRANSACTION_H
-#define MBED_TRANSACTION_H
-
-#include "platform.h"
-#include "FunctionPointer.h"
-
-namespace mbed {
-
-/** Transaction structure
- */
-typedef struct {
- void *tx_buffer; /**< Tx buffer */
- size_t tx_length; /**< Length of Tx buffer*/
- void *rx_buffer; /**< Rx buffer */
- size_t rx_length; /**< Length of Rx buffer */
- uint32_t event; /**< Event for a transaction */
- event_callback_t callback; /**< User's callback */
- uint8_t width; /**< Buffer's word width (8, 16, 32, 64) */
-} transaction_t;
-
-/** Transaction class defines a transaction.
- */
-template<typename Class>
-class Transaction {
-public:
- Transaction(Class *tpointer, const transaction_t& transaction) : _obj(tpointer), _data(transaction) {
- }
-
- Transaction() : _obj(), _data() {
- }
-
- ~Transaction() {
- }
-
- /** Get object's instance for the transaction
- *
- * @return The object which was stored
- */
- Class* get_object() {
- return _obj;
- }
-
- /** Get the transaction
- *
- * @return The transaction which was stored
- */
- transaction_t* get_transaction() {
- return &_data;
- }
-
-private:
- Class* _obj;
- transaction_t _data;
-};
-
-}
-
-#endif
--- a/analogin_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,39 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ANALOGIN_API_H
-#define MBED_ANALOGIN_API_H
-
-#include "device.h"
-
-#if DEVICE_ANALOGIN
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct analogin_s analogin_t;
-
-void analogin_init (analogin_t *obj, PinName pin);
-float analogin_read (analogin_t *obj);
-uint16_t analogin_read_u16(analogin_t *obj);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/analogout_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ANALOGOUT_API_H
-#define MBED_ANALOGOUT_API_H
-
-#include "device.h"
-
-#if DEVICE_ANALOGOUT
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct dac_s dac_t;
-
-void analogout_init (dac_t *obj, PinName pin);
-void analogout_free (dac_t *obj);
-void analogout_write (dac_t *obj, float value);
-void analogout_write_u16(dac_t *obj, uint16_t value);
-float analogout_read (dac_t *obj);
-uint16_t analogout_read_u16 (dac_t *obj);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/buffer.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,30 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2014-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_BUFFER_H
-#define MBED_BUFFER_H
-
-#include <stddef.h>
-
-/** Generic buffer structure
- */
-typedef struct buffer_s {
- void *buffer; /**< the pointer to a buffer */
- size_t length; /**< the buffer length */
- size_t pos; /**< actual buffer position */
- uint8_t width; /**< The buffer unit width (8, 16, 32, 64), used for proper *buffer casting */
-} buffer_t;
-
-#endif
--- a/can_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,80 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_CAN_API_H
-#define MBED_CAN_API_H
-
-#include "device.h"
-
-#if DEVICE_CAN
-
-#include "PinNames.h"
-#include "PeripheralNames.h"
-#include "can_helper.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- IRQ_RX,
- IRQ_TX,
- IRQ_ERROR,
- IRQ_OVERRUN,
- IRQ_WAKEUP,
- IRQ_PASSIVE,
- IRQ_ARB,
- IRQ_BUS,
- IRQ_READY
-} CanIrqType;
-
-
-typedef enum {
- MODE_RESET,
- MODE_NORMAL,
- MODE_SILENT,
- MODE_TEST_LOCAL,
- MODE_TEST_GLOBAL,
- MODE_TEST_SILENT
-} CanMode;
-
-typedef void (*can_irq_handler)(uint32_t id, CanIrqType type);
-
-typedef struct can_s can_t;
-
-void can_init (can_t *obj, PinName rd, PinName td);
-void can_free (can_t *obj);
-int can_frequency(can_t *obj, int hz);
-
-void can_irq_init (can_t *obj, can_irq_handler handler, uint32_t id);
-void can_irq_free (can_t *obj);
-void can_irq_set (can_t *obj, CanIrqType irq, uint32_t enable);
-
-int can_write (can_t *obj, CAN_Message, int cc);
-int can_read (can_t *obj, CAN_Message *msg, int handle);
-int can_mode (can_t *obj, CanMode mode);
-int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle);
-void can_reset (can_t *obj);
-unsigned char can_rderror (can_t *obj);
-unsigned char can_tderror (can_t *obj);
-void can_monitor (can_t *obj, int silent);
-
-#ifdef __cplusplus
-};
-#endif
-
-#endif // MBED_CAN_API_H
-
-#endif
--- a/can_helper.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,53 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_CAN_HELPER_H
-#define MBED_CAN_HELPER_H
-
-#if DEVICE_CAN
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-enum CANFormat {
- CANStandard = 0,
- CANExtended = 1,
- CANAny = 2
-};
-typedef enum CANFormat CANFormat;
-
-enum CANType {
- CANData = 0,
- CANRemote = 1
-};
-typedef enum CANType CANType;
-
-struct CAN_Message {
- unsigned int id; // 29 bit identifier
- unsigned char data[8]; // Data field
- unsigned char len; // Length of data field in bytes
- CANFormat format; // 0 - STANDARD, 1- EXTENDED IDENTIFIER
- CANType type; // 0 - DATA FRAME, 1 - REMOTE FRAME
-};
-typedef struct CAN_Message CAN_Message;
-
-#ifdef __cplusplus
-};
-#endif
-
-#endif
-
-#endif // MBED_CAN_HELPER_H
--- a/dma_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,45 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2014-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DMA_API_H
-#define MBED_DMA_API_H
-
-#include <stdint.h>
-
-#define DMA_ERROR_OUT_OF_CHANNELS (-1)
-
-typedef enum {
- DMA_USAGE_NEVER,
- DMA_USAGE_OPPORTUNISTIC,
- DMA_USAGE_ALWAYS,
- DMA_USAGE_TEMPORARY_ALLOCATED,
- DMA_USAGE_ALLOCATED
-} DMAUsage;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void dma_init(void);
-
-int dma_channel_allocate(uint32_t capabilities);
-
-int dma_channel_free(int channelid);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/ethernet_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,63 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ETHERNET_API_H
-#define MBED_ETHERNET_API_H
-
-#include "device.h"
-
-#if DEVICE_ETHERNET
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Connection constants
-
-int ethernet_init(void);
-void ethernet_free(void);
-
-// write size bytes from data to ethernet buffer
-// return num bytes written
-// or -1 if size is too big
-int ethernet_write(const char *data, int size);
-
-// send ethernet write buffer, returning the packet size sent
-int ethernet_send(void);
-
-// recieve from ethernet buffer, returning packet size, or 0 if no packet
-int ethernet_receive(void);
-
-// read size bytes in to data, return actual num bytes read (0..size)
-// if data == NULL, throw the bytes away
-int ethernet_read(char *data, int size);
-
-// get the ethernet address
-void ethernet_address(char *mac);
-
-// see if the link is up
-int ethernet_link(void);
-
-// force link settings
-void ethernet_set_link(int speed, int duplex);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
-
--- a/gpio_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,57 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_GPIO_API_H
-#define MBED_GPIO_API_H
-
-#include "device.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Set the given pin as GPIO
- * @param pin The pin to be set as GPIO
- * @return The GPIO port mask for this pin
- **/
-uint32_t gpio_set(PinName pin);
-
-/* Checks if gpio object is connected (pin was not initialized with NC)
- * @param pin The pin to be set as GPIO
- * @return 0 if port is initialized with NC
- **/
-int gpio_is_connected(const gpio_t *obj);
-
-/* GPIO object */
-void gpio_init(gpio_t *obj, PinName pin);
-
-void gpio_mode (gpio_t *obj, PinMode mode);
-void gpio_dir (gpio_t *obj, PinDirection direction);
-
-void gpio_write(gpio_t *obj, int value);
-int gpio_read (gpio_t *obj);
-
-// the following set of functions are generic and are implemented in the common gpio.c file
-void gpio_init_in(gpio_t* gpio, PinName pin);
-void gpio_init_in_ex(gpio_t* gpio, PinName pin, PinMode mode);
-void gpio_init_out(gpio_t* gpio, PinName pin);
-void gpio_init_out_ex(gpio_t* gpio, PinName pin, int value);
-void gpio_init_inout(gpio_t* gpio, PinName pin, PinDirection direction, PinMode mode, int value);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/gpio_irq_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,49 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_GPIO_IRQ_API_H
-#define MBED_GPIO_IRQ_API_H
-
-#include "device.h"
-
-#if DEVICE_INTERRUPTIN
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- IRQ_NONE,
- IRQ_RISE,
- IRQ_FALL
-} gpio_irq_event;
-
-typedef struct gpio_irq_s gpio_irq_t;
-
-typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
-
-int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
-void gpio_irq_free(gpio_irq_t *obj);
-void gpio_irq_set (gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
-void gpio_irq_enable(gpio_irq_t *obj);
-void gpio_irq_disable(gpio_irq_t *obj);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/i2c_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,223 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_I2C_API_H
-#define MBED_I2C_API_H
-
-#include "device.h"
-#include "buffer.h"
-
-#if DEVICE_I2C
-
-/**
- * @defgroup I2CEvents I2C Events Macros
- *
- * @{
- */
-#define I2C_EVENT_ERROR (1 << 1)
-#define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
-#define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
-#define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
-#define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
-
-/**@}*/
-
-#if DEVICE_I2C_ASYNCH
-/** Asynch i2c hal structure
- */
-typedef struct {
- struct i2c_s i2c; /**< Target specific i2c structure */
- struct buffer_s tx_buff; /**< Tx buffer */
- struct buffer_s rx_buff; /**< Rx buffer */
-} i2c_t;
-
-#else
-/** Non-asynch i2c hal structure
- */
-typedef struct i2c_s i2c_t;
-
-#endif
-
-enum {
- I2C_ERROR_NO_SLAVE = -1,
- I2C_ERROR_BUS_BUSY = -2
-};
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup GeneralI2C I2C Configuration Functions
- * @{
- */
-
-/** Initialize the I2C peripheral. It sets the default parameters for I2C
- * peripheral, and configure its specifieds pins.
- * @param obj The i2c object
- * @param sda The sda pin
- * @param scl The scl pin
- */
-void i2c_init(i2c_t *obj, PinName sda, PinName scl);
-
-/** Configure the I2C frequency.
- * @param obj The i2c object
- * @param hz Frequency in Hz
- */
-void i2c_frequency(i2c_t *obj, int hz);
-
-/** Send START command.
- * @param obj The i2c object
- */
-int i2c_start(i2c_t *obj);
-
-/** Send STOP command.
- * @param obj The i2c object
- */
-int i2c_stop(i2c_t *obj);
-
-/** Blocking reading data.
- * @param obj The i2c object
- * @param address 7-bit address (last bit is 1)
- * @param data The buffer for receiving
- * @param length Number of bytes to read
- * @param stop Stop to be generated after the transfer is done
- * @return Number of read bytes
- */
-int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
-
-/** Blocking sending data.
- * @param obj The i2c object
- * @param address 7-bit address (last bit is 0)
- * @param data The buffer for sending
- * @param length Number of bytes to wrte
- * @param stop Stop to be generated after the transfer is done
- * @return Number of written bytes
- */
-int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
-
-/** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop().
- * @param obj The i2c object
- */
-void i2c_reset(i2c_t *obj);
-
-/** Read one byte.
- * @param obj The i2c object
- * @param last Acknoledge
- * @return The read byte
- */
-int i2c_byte_read(i2c_t *obj, int last);
-
-/** Write one byte.
- * @param obj The i2c object
- * @param data Byte to be written
- * @return 1 if NAK was received, 0 if ACK was received, 2 for timeout.
- */
-int i2c_byte_write(i2c_t *obj, int data);
-
-/**@}*/
-
-#if DEVICE_I2CSLAVE
-
-/**
- * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
- * @{
- */
-
-/** Configure I2C as slave or master.
- * @param obj The I2C object
- * @return non-zero if a value is available
- */
-void i2c_slave_mode(i2c_t *obj, int enable_slave);
-
-/** Check to see if the I2C slave has been addressed.
- * @param obj The I2C object
- * @return The status - 1 - read addresses, 2 - write to all slaves,
- * 3 write addressed, 0 - the slave has not been addressed
- */
-int i2c_slave_receive(i2c_t *obj);
-
-/** Configure I2C as slave or master.
- * @param obj The I2C object
- * @return non-zero if a value is available
- */
-int i2c_slave_read(i2c_t *obj, char *data, int length);
-
-/** Configure I2C as slave or master.
- * @param obj The I2C object
- * @return non-zero if a value is available
- */
-int i2c_slave_write(i2c_t *obj, const char *data, int length);
-
-/** Configure I2C address.
- * @param obj The I2C object
- * @param idx Currently not used
- * @param address The address to be set
- * @param mask Currently not used
- */
-void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
-
-#endif
-
-/**@}*/
-
-#if DEVICE_I2C_ASYNCH
-
-/**
- * \defgroup AsynchI2C Asynchronous I2C Hardware Abstraction Layer
- * @{
- */
-
-/** Start i2c asynchronous transfer.
- * @param obj The I2C object
- * @param tx The buffer to send
- * @param tx_length The number of words to transmit
- * @param rx The buffer to receive
- * @param rx_length The number of words to receive
- * @param address The address to be set - 7bit or 9 bit
- * @param stop If true, stop will be generated after the transfer is done
- * @param handler The I2C IRQ handler to be set
- * @param hint DMA hint usage
- */
-void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
-
-/** The asynchronous IRQ handler
- * @param obj The I2C object which holds the transfer information
- * @return event flags if a transfer termination condition was met or 0 otherwise.
- */
-uint32_t i2c_irq_handler_asynch(i2c_t *obj);
-
-/** Attempts to determine if I2C peripheral is already in use.
- * @param obj The I2C object
- * @return non-zero if the I2C module is active or zero if it is not
- */
-uint8_t i2c_active(i2c_t *obj);
-
-/** Abort ongoing asynchronous transaction.
- * @param obj The I2C object
- */
-void i2c_abort_asynch(i2c_t *obj);
-
-#endif
-
-/**@}*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/lp_ticker_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,82 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_LPTICKER_API_H
-#define MBED_LPTICKER_API_H
-
-#include "device.h"
-
-#if DEVICE_LOWPOWERTIMER
-
-#include "ticker_api.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup LpTicker Low Power Ticker Functions
- * @{
- */
-
-/** Get low power ticker's data
- *
- * @return The low power ticker data
- */
-const ticker_data_t* get_lp_ticker_data(void);
-
-/** The wrapper for ticker_irq_handler, to pass lp ticker's data
- *
- */
-void lp_ticker_irq_handler(void);
-
-/* HAL lp ticker */
-
-/** Initialize the low power ticker
- *
- */
-void lp_ticker_init(void);
-
-/** Read the current counter
- *
- * @return The current timer's counter value in microseconds
- */
-uint32_t lp_ticker_read(void);
-
-/** Set interrupt for specified timestamp
- *
- * @param timestamp The time in microseconds to be set
- */
-void lp_ticker_set_interrupt(timestamp_t timestamp);
-
-/** Disable low power ticker interrupt
- *
- */
-void lp_ticker_disable_interrupt(void);
-
-/** Clear the low power ticker interrupt
- *
- */
-void lp_ticker_clear_interrupt(void);
-
-/**@}*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/mbed.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,69 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_H -#define MBED_H - -#define MBED_LIBRARY_VERSION 103 - -#include "platform.h" - -// Useful C libraries -#include <math.h> -#include <time.h> - -// mbed Debug libraries -#include "mbed_error.h" -#include "mbed_interface.h" - -// mbed Peripheral components -#include "DigitalIn.h" -#include "DigitalOut.h" -#include "DigitalInOut.h" -#include "BusIn.h" -#include "BusOut.h" -#include "BusInOut.h" -#include "PortIn.h" -#include "PortInOut.h" -#include "PortOut.h" -#include "AnalogIn.h" -#include "AnalogOut.h" -#include "PwmOut.h" -#include "Serial.h" -#include "SPI.h" -#include "SPISlave.h" -#include "I2C.h" -#include "I2CSlave.h" -#include "Ethernet.h" -#include "CAN.h" -#include "RawSerial.h" - -// mbed Internal components -#include "Timer.h" -#include "Ticker.h" -#include "Timeout.h" -#include "LowPowerTimeout.h" -#include "LowPowerTicker.h" -#include "LowPowerTimer.h" -#include "LocalFileSystem.h" -#include "InterruptIn.h" -#include "wait_api.h" -#include "sleep_api.h" -#include "rtc_time.h" - -using namespace mbed; -using namespace std; - -#endif
--- a/mbed_assert.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,49 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ASSERT_H
-#define MBED_ASSERT_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** Internal mbed assert function which is invoked when MBED_ASSERT macro failes.
- * This function is active only if NDEBUG is not defined prior to including this
- * assert header file.
- * In case of MBED_ASSERT failing condition, error() is called with the assertation message.
- * @param expr Expresion to be checked.
- * @param file File where assertation failed.
- * @param line Failing assertation line number.
- */
-void mbed_assert_internal(const char *expr, const char *file, int line);
-
-#ifdef __cplusplus
-}
-#endif
-
-#ifdef NDEBUG
-#define MBED_ASSERT(expr) ((void)0)
-
-#else
-#define MBED_ASSERT(expr) \
-do { \
- if (!(expr)) { \
- mbed_assert_internal(#expr, __FILE__, __LINE__); \
- } \
-} while (0)
-#endif
-
-#endif
--- a/mbed_debug.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,66 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_DEBUG_H
-#define MBED_DEBUG_H
-#include "device.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if DEVICE_STDIO_MESSAGES
-#include <stdio.h>
-#include <stdarg.h>
-
-/** Output a debug message
- *
- * @param format printf-style format string, followed by variables
- */
-static inline void debug(const char *format, ...) {
- va_list args;
- va_start(args, format);
- vfprintf(stderr, format, args);
- va_end(args);
-}
-
-/** Conditionally output a debug message
- *
- * NOTE: If the condition is constant false (!= 1) and the compiler optimization
- * level is greater than 0, then the whole function will be compiled away.
- *
- * @param condition output only if condition is true (== 1)
- * @param format printf-style format string, followed by variables
- */
-static inline void debug_if(int condition, const char *format, ...) {
- if (condition == 1) {
- va_list args;
- va_start(args, format);
- vfprintf(stderr, format, args);
- va_end(args);
- }
-}
-
-#else
-static inline void debug(const char *format, ...) {}
-static inline void debug_if(int condition, const char *format, ...) {}
-
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/mbed_error.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,66 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_ERROR_H
-#define MBED_ERROR_H
-
-/** To generate a fatal compile-time error, you can use the pre-processor #error directive.
- *
- * @code
- * #error "That shouldn't have happened!"
- * @endcode
- *
- * If the compiler evaluates this line, it will report the error and stop the compile.
- *
- * For example, you could use this to check some user-defined compile-time variables:
- *
- * @code
- * #define NUM_PORTS 7
- * #if (NUM_PORTS > 4)
- * #error "NUM_PORTS must be less than 4"
- * #endif
- * @endcode
- *
- * Reporting Run-Time Errors:
- * To generate a fatal run-time error, you can use the mbed error() function.
- *
- * @code
- * error("That shouldn't have happened!");
- * @endcode
- *
- * If the mbed running the program executes this function, it will print the
- * message via the USB serial port, and then die with the blue lights of death!
- *
- * The message can use printf-style formatting, so you can report variables in the
- * message too. For example, you could use this to check a run-time condition:
- *
- * @code
- * if(x >= 5) {
- * error("expected x to be less than 5, but got %d", x);
- * }
- * #endcode
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void error(const char* format, ...);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/mbed_interface.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,114 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_INTERFACE_H
-#define MBED_INTERFACE_H
-
-#include "device.h"
-
-/* Mbed interface mac address
- * if MBED_MAC_ADD_x are zero, interface uid sets mac address,
- * otherwise MAC_ADD_x are used.
- */
-#define MBED_MAC_ADDR_INTERFACE 0x00
-#define MBED_MAC_ADDR_0 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDR_1 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDR_2 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDR_3 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDR_4 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDR_5 MBED_MAC_ADDR_INTERFACE
-#define MBED_MAC_ADDRESS_SUM (MBED_MAC_ADDR_0 | MBED_MAC_ADDR_1 | MBED_MAC_ADDR_2 | MBED_MAC_ADDR_3 | MBED_MAC_ADDR_4 | MBED_MAC_ADDR_5)
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if DEVICE_SEMIHOST
-
-/** Functions to control the mbed interface
- *
- * mbed Microcontrollers have a built-in interface to provide functionality such as
- * drag-n-drop download, reset, serial-over-usb, and access to the mbed local file
- * system. These functions provide means to control the interface suing semihost
- * calls it supports.
- */
-
-/** Determine whether the mbed interface is connected, based on whether debug is enabled
- *
- * @returns
- * 1 if interface is connected,
- * 0 otherwise
- */
-int mbed_interface_connected(void);
-
-/** Instruct the mbed interface to reset, as if the reset button had been pressed
- *
- * @returns
- * 1 if successful,
- * 0 otherwise (e.g. interface not present)
- */
-int mbed_interface_reset(void);
-
-/** This will disconnect the debug aspect of the interface, so semihosting will be disabled.
- * The interface will still support the USB serial aspect
- *
- * @returns
- * 0 if successful,
- * -1 otherwise (e.g. interface not present)
- */
-int mbed_interface_disconnect(void);
-
-/** This will disconnect the debug aspect of the interface, and if the USB cable is not
- * connected, also power down the interface. If the USB cable is connected, the interface
- * will remain powered up and visible to the host
- *
- * @returns
- * 0 if successful,
- * -1 otherwise (e.g. interface not present)
- */
-int mbed_interface_powerdown(void);
-
-/** This returns a string containing the 32-character UID of the mbed interface
- * This is a weak function that can be overwritten if required
- *
- * @param uid A 33-byte array to write the null terminated 32-byte string
- *
- * @returns
- * 0 if successful,
- * -1 otherwise (e.g. interface not present)
- */
-int mbed_interface_uid(char *uid);
-
-#endif
-
-/** This returns a unique 6-byte MAC address, based on the interface UID
- * If the interface is not present, it returns a default fixed MAC address (00:02:F7:F0:00:00)
- *
- * This is a weak function that can be overwritten if you want to provide your own mechanism to
- * provide a MAC address.
- *
- * @param mac A 6-byte array to write the MAC address
- */
-void mbed_mac_address(char *mac);
-
-/** Cause the mbed to flash the BLOD (Blue LEDs Of Death) sequence
- */
-void mbed_die(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/pinmap.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,45 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PINMAP_H
-#define MBED_PINMAP_H
-
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct {
- PinName pin;
- int peripheral;
- int function;
-} PinMap;
-
-void pin_function(PinName pin, int function);
-void pin_mode (PinName pin, PinMode mode);
-
-uint32_t pinmap_peripheral(PinName pin, const PinMap* map);
-uint32_t pinmap_function(PinName pin, const PinMap* map);
-uint32_t pinmap_merge (uint32_t a, uint32_t b);
-void pinmap_pinout (PinName pin, const PinMap *map);
-uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map);
-uint32_t pinmap_find_function(PinName pin, const PinMap* map);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/platform.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PLATFORM_H -#define MBED_PLATFORM_H - -#define MBED_OPERATORS 1 - -#include "device.h" -#include "PinNames.h" -#include "PeripheralNames.h" - -#include <cstddef> -#include <cstdlib> -#include <cstdio> -#include <cstring> - -#endif
--- a/port_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PORTMAP_H
-#define MBED_PORTMAP_H
-
-#include "device.h"
-
-#if DEVICE_PORTIN || DEVICE_PORTOUT
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct port_s port_t;
-
-PinName port_pin(PortName port, int pin_n);
-
-void port_init (port_t *obj, PortName port, int mask, PinDirection dir);
-void port_mode (port_t *obj, PinMode mode);
-void port_dir (port_t *obj, PinDirection dir);
-void port_write(port_t *obj, int value);
-int port_read (port_t *obj);
-
-#ifdef __cplusplus
-}
-#endif
-#endif
-
-#endif
--- a/pwmout_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,49 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_PWMOUT_API_H
-#define MBED_PWMOUT_API_H
-
-#include "device.h"
-
-#if DEVICE_PWMOUT
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct pwmout_s pwmout_t;
-
-void pwmout_init (pwmout_t* obj, PinName pin);
-void pwmout_free (pwmout_t* obj);
-
-void pwmout_write (pwmout_t* obj, float percent);
-float pwmout_read (pwmout_t* obj);
-
-void pwmout_period (pwmout_t* obj, float seconds);
-void pwmout_period_ms (pwmout_t* obj, int ms);
-void pwmout_period_us (pwmout_t* obj, int us);
-
-void pwmout_pulsewidth (pwmout_t* obj, float seconds);
-void pwmout_pulsewidth_ms(pwmout_t* obj, int ms);
-void pwmout_pulsewidth_us(pwmout_t* obj, int us);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/rtc_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_RTC_API_H
-#define MBED_RTC_API_H
-
-#include "device.h"
-
-#if DEVICE_RTC
-
-#include <time.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void rtc_init(void);
-void rtc_free(void);
-int rtc_isenabled(void);
-
-time_t rtc_read(void);
-void rtc_write(time_t t);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/rtc_time.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,85 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <time.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** Implementation of the C time.h functions
- *
- * Provides mechanisms to set and read the current time, based
- * on the microcontroller Real-Time Clock (RTC), plus some
- * standard C manipulation and formating functions.
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * int main() {
- * set_time(1256729737); // Set RTC time to Wed, 28 Oct 2009 11:35:37
- *
- * while(1) {
- * time_t seconds = time(NULL);
- *
- * printf("Time as seconds since January 1, 1970 = %d\n", seconds);
- *
- * printf("Time as a basic string = %s", ctime(&seconds));
- *
- * char buffer[32];
- * strftime(buffer, 32, "%I:%M %p\n", localtime(&seconds));
- * printf("Time as a custom formatted string = %s", buffer);
- *
- * wait(1);
- * }
- * }
- * @endcode
- */
-
-/** Set the current time
- *
- * Initialises and sets the time of the microcontroller Real-Time Clock (RTC)
- * to the time represented by the number of seconds since January 1, 1970
- * (the UNIX timestamp).
- *
- * @param t Number of seconds since January 1, 1970 (the UNIX timestamp)
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * int main() {
- * set_time(1256729737); // Set time to Wed, 28 Oct 2009 11:35:37
- * }
- * @endcode
- */
-void set_time(time_t t);
-
-/** Attach an external RTC to be used for the C time functions
- *
- * Do not call this function from an interrupt while an RTC read/write operation may be occurring
- *
- * @param read_rtc pointer to function which returns current UNIX timestamp
- * @param write_rtc pointer to function which sets current UNIX timestamp, can be NULL
- * @param init_rtc pointer to funtion which initializes RTC, can be NULL
- * @param isenabled_rtc pointer to function wich returns if the rtc is enabled, can be NULL
- */
-void attach_rtc(time_t (*read_rtc)(void), void (*write_rtc)(time_t), void (*init_rtc)(void), int (*isenabled_rtc)(void));
-
-#ifdef __cplusplus
-}
-#endif
--- a/semihost_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,93 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SEMIHOST_H
-#define MBED_SEMIHOST_H
-
-#include "device.h"
-#include "toolchain.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if DEVICE_SEMIHOST
-
-#ifndef __CC_ARM
-
-#if defined(__ICCARM__)
-inline int __semihost(int reason, const void *arg) {
- return __semihosting(reason, (void*)arg);
-}
-#else
-
-#ifdef __thumb__
-# define AngelSWI 0xAB
-# define AngelSWIInsn "bkpt"
-# define AngelSWIAsm bkpt
-#else
-# define AngelSWI 0x123456
-# define AngelSWIInsn "swi"
-# define AngelSWIAsm swi
-#endif
-
-static inline int __semihost(int reason, const void *arg) {
- int value;
-
- asm volatile (
- "mov r0, %1" "\n\t"
- "mov r1, %2" "\n\t"
- AngelSWIInsn " %a3" "\n\t"
- "mov %0, r0"
- : "=r" (value) /* output operands */
- : "r" (reason), "r" (arg), "i" (AngelSWI) /* input operands */
- : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc" /* list of clobbered registers */
- );
-
- return value;
-}
-#endif
-#endif
-
-#if DEVICE_LOCALFILESYSTEM
-FILEHANDLE semihost_open(const char* name, int openmode);
-int semihost_close (FILEHANDLE fh);
-int semihost_read (FILEHANDLE fh, unsigned char* buffer, unsigned int length, int mode);
-int semihost_write (FILEHANDLE fh, const unsigned char* buffer, unsigned int length, int mode);
-int semihost_ensure(FILEHANDLE fh);
-long semihost_flen (FILEHANDLE fh);
-int semihost_seek (FILEHANDLE fh, long position);
-int semihost_istty (FILEHANDLE fh);
-
-int semihost_remove(const char *name);
-int semihost_rename(const char *old_name, const char *new_name);
-#endif
-
-int semihost_uid(char *uid);
-int semihost_reset(void);
-int semihost_vbus(void);
-int semihost_powerdown(void);
-int semihost_exit(void);
-
-int semihost_connected(void);
-int semihost_disabledebug(void);
-
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/serial_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,302 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SERIAL_API_H
-#define MBED_SERIAL_API_H
-
-#include "device.h"
-#include "buffer.h"
-#include "dma_api.h"
-
-#if DEVICE_SERIAL
-
-#define SERIAL_EVENT_TX_SHIFT (2)
-#define SERIAL_EVENT_RX_SHIFT (8)
-
-#define SERIAL_EVENT_TX_MASK (0x00FC)
-#define SERIAL_EVENT_RX_MASK (0x3F00)
-
-#define SERIAL_EVENT_ERROR (1 << 1)
-
-/**
- * @defgroup SerialTXEvents Serial TX Events Macros
- *
- * @{
- */
-#define SERIAL_EVENT_TX_COMPLETE (1 << (SERIAL_EVENT_TX_SHIFT + 0))
-#define SERIAL_EVENT_TX_ALL (SERIAL_EVENT_TX_COMPLETE)
-/**@}*/
-
-/**
- * @defgroup SerialRXEvents Serial RX Events Macros
- *
- * @{
- */
-#define SERIAL_EVENT_RX_COMPLETE (1 << (SERIAL_EVENT_RX_SHIFT + 0))
-#define SERIAL_EVENT_RX_OVERRUN_ERROR (1 << (SERIAL_EVENT_RX_SHIFT + 1))
-#define SERIAL_EVENT_RX_FRAMING_ERROR (1 << (SERIAL_EVENT_RX_SHIFT + 2))
-#define SERIAL_EVENT_RX_PARITY_ERROR (1 << (SERIAL_EVENT_RX_SHIFT + 3))
-#define SERIAL_EVENT_RX_OVERFLOW (1 << (SERIAL_EVENT_RX_SHIFT + 4))
-#define SERIAL_EVENT_RX_CHARACTER_MATCH (1 << (SERIAL_EVENT_RX_SHIFT + 5))
-#define SERIAL_EVENT_RX_ALL (SERIAL_EVENT_RX_OVERFLOW | SERIAL_EVENT_RX_PARITY_ERROR | \
- SERIAL_EVENT_RX_FRAMING_ERROR | SERIAL_EVENT_RX_OVERRUN_ERROR | \
- SERIAL_EVENT_RX_COMPLETE | SERIAL_EVENT_RX_CHARACTER_MATCH)
-/**@}*/
-
-#define SERIAL_RESERVED_CHAR_MATCH (255)
-
-typedef enum {
- ParityNone = 0,
- ParityOdd = 1,
- ParityEven = 2,
- ParityForced1 = 3,
- ParityForced0 = 4
-} SerialParity;
-
-typedef enum {
- RxIrq,
- TxIrq
-} SerialIrq;
-
-typedef enum {
- FlowControlNone,
- FlowControlRTS,
- FlowControlCTS,
- FlowControlRTSCTS
-} FlowControl;
-
-typedef void (*uart_irq_handler)(uint32_t id, SerialIrq event);
-
-#if DEVICE_SERIAL_ASYNCH
-/** Asynch serial hal structure
- */
-typedef struct {
- struct serial_s serial; /**< Target specific serial structure */
- struct buffer_s tx_buff; /**< Tx buffer */
- struct buffer_s rx_buff; /**< Rx buffer */
- uint8_t char_match; /**< Character to be matched */
- uint8_t char_found; /**< State of the matched character */
-} serial_t;
-
-#else
-/** Non-asynch serial hal structure
- */
-typedef struct serial_s serial_t;
-
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup GeneralSerial Serial Configuration Functions
- * @{
- */
-
-/** Initialize the serial peripheral. It sets the default parameters for serial
- * peripheral, and configure its specifieds pins.
- *
- * @param obj The serial object
- * @param tx The TX pin
- * @param rx The RX pin
- */
-void serial_init(serial_t *obj, PinName tx, PinName rx);
-
-/** Release the serial peripheral, not currently invoked. It requires further
- * resource management.
- *
- * @param obj The serial object
- */
-void serial_free(serial_t *obj);
-
-/** Configure the baud rate
- *
- * @param obj The serial object
- * @param baudrate The baud rate to be configured
- */
-void serial_baud(serial_t *obj, int baudrate);
-
-/** Configure the format. Set the number of bits, parity and the number of stop bits
- *
- * @param obj The serial object
- * @param data_bits The number of data bits
- * @param parity The parity
- * @param stop_bits The number of stop bits
- */
-void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
-
-/** The serial interrupt handler registration.
- *
- * @param obj The serial object
- * @param handler The interrupt handler which will be invoked when interrupt fires.
- * @param id The SerialBase object
- */
-void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id);
-
-/** Configure serial interrupt. This function is used for word-approach
- *
- * @param obj The serial object
- * @param irq The serial IRQ type (RX or TX)
- * @param enable Set to non-zero to enable events, or zero to disable them
- */
-void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable);
-
-/** Get character. This is a blocking call, waiting for a character
- *
- * @param obj The serial object
- */
-int serial_getc(serial_t *obj);
-
-/** Put a character. This is a blocking call, waiting for a peripheral to be available
- * for writing
- *
- * @param obj The serial object
- * @param c The character to be sent
- */
-void serial_putc(serial_t *obj, int c);
-
-/** Check if the serial peripheral is readable
- *
- * @param obj The serial object
- * @return Non-zero value if a character can be read, 0 if nothing to read.
- */
-int serial_readable(serial_t *obj);
-
-/** Check if the serial peripheral is writable
- *
- * @param obj The serial object
- * @return Non-zero value if a character can be written, 0 otherwise.
- */
-int serial_writable(serial_t *obj);
-
-/** Clear the serial peripheral
- *
- * @param obj The serial object
- */
-void serial_clear(serial_t *obj);
-
-/** Set the break
- *
- * @param obj The serial object
- */
-void serial_break_set(serial_t *obj);
-
-/** Clear the break
- *
- * @param obj The serial object
- */
-void serial_break_clear(serial_t *obj);
-
-/** Configure the TX pin for UART function.
- *
- * @param tx The pin used for TX
- */
-void serial_pinout_tx(PinName tx);
-
-/** Configure the serial for the flow control. It sets flow control in the hardware
- * if a serial peripheral supports it, otherwise software emulation is used.
- *
- * @param obj The serial object
- * @param type The type of the flow control. Look at the available FlowControl types.
- * @param rxflow The tx pin
- * @param txflow The rx pin
- */
-void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow);
-
-#if DEVICE_SERIAL_ASYNCH
-
-/**@}*/
-
-/**
- * \defgroup AsynchSerial Asynchronous Serial Hardware Abstraction Layer
- * @{
- */
-
-/** Begin asynchronous TX transfer. The used buffer is specified in the serial object,
- * tx_buff
- *
- * @param obj The serial object
- * @param tx The buffer for sending
- * @param tx_length The number of words to transmit
- * @param tx_width The bit width of buffer word
- * @param handler The serial handler
- * @param event The logical OR of events to be registered
- * @param hint A suggestion for how to use DMA with this transfer
- * @return Returns number of data transfered, or 0 otherwise
- */
-int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint);
-
-/** Begin asynchronous RX transfer (enable interrupt for data collecting)
- * The used buffer is specified in the serial object - rx_buff
- *
- * @param obj The serial object
- * @param rx The buffer for sending
- * @param rx_length The number of words to transmit
- * @param rx_width The bit width of buffer word
- * @param handler The serial handler
- * @param event The logical OR of events to be registered
- * @param handler The serial handler
- * @param char_match A character in range 0-254 to be matched
- * @param hint A suggestion for how to use DMA with this transfer
- */
-void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint);
-
-/** Attempts to determine if the serial peripheral is already in use for TX
- *
- * @param obj The serial object
- * @return Non-zero if the RX transaction is ongoing, 0 otherwise
- */
-uint8_t serial_tx_active(serial_t *obj);
-
-/** Attempts to determine if the serial peripheral is already in use for RX
- *
- * @param obj The serial object
- * @return Non-zero if the RX transaction is ongoing, 0 otherwise
- */
-uint8_t serial_rx_active(serial_t *obj);
-
-/** The asynchronous TX and RX handler.
- *
- * @param obj The serial object
- * @return Returns event flags if a RX transfer termination condition was met or 0 otherwise
- */
-int serial_irq_handler_asynch(serial_t *obj);
-
-/** Abort the ongoing TX transaction. It disables the enabled interupt for TX and
- * flush TX hardware buffer if TX FIFO is used
- *
- * @param obj The serial object
- */
-void serial_tx_abort_asynch(serial_t *obj);
-
-/** Abort the ongoing RX transaction It disables the enabled interrupt for RX and
- * flush RX hardware buffer if RX FIFO is used
- *
- * @param obj The serial object
- */
-void serial_rx_abort_asynch(serial_t *obj);
-
-/**@}*/
-
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/sleep_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,64 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SLEEP_API_H
-#define MBED_SLEEP_API_H
-
-#include "device.h"
-
-#if DEVICE_SLEEP
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** Send the microcontroller to sleep
- *
- * The processor is setup ready for sleep, and sent to sleep using __WFI(). In this mode, the
- * system clock to the core is stopped until a reset or an interrupt occurs. This eliminates
- * dynamic power used by the processor, memory systems and buses. The processor, peripheral and
- * memory state are maintained, and the peripherals continue to work and can generate interrupts.
- *
- * The processor can be woken up by any internal peripheral interrupt or external pin interrupt.
- *
- * @note
- * The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
- * Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
- * able to access the LocalFileSystem
- */
-void sleep(void);
-
-/** Send the microcontroller to deep sleep
- *
- * This processor is setup ready for deep sleep, and sent to sleep using __WFI(). This mode
- * has the same sleep features as sleep plus it powers down peripherals and clocks. All state
- * is still maintained.
- *
- * The processor can only be woken up by an external interrupt on a pin or a watchdog timer.
- *
- * @note
- * The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
- * Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
- * able to access the LocalFileSystem
- */
-void deepsleep(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
--- a/spi_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,213 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_SPI_API_H
-#define MBED_SPI_API_H
-
-#include "device.h"
-#include "dma_api.h"
-#include "buffer.h"
-
-#if DEVICE_SPI
-
-#define SPI_EVENT_ERROR (1 << 1)
-#define SPI_EVENT_COMPLETE (1 << 2)
-#define SPI_EVENT_RX_OVERFLOW (1 << 3)
-#define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
-
-#define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
-
-#define SPI_FILL_WORD (0xFFFF)
-
-#if DEVICE_SPI_ASYNCH
-/** Asynch spi hal structure
- */
-typedef struct {
- struct spi_s spi; /**< Target specific spi structure */
- struct buffer_s tx_buff; /**< Tx buffer */
- struct buffer_s rx_buff; /**< Rx buffer */
-} spi_t;
-
-#else
-/** Non-asynch spi hal structure
- */
-typedef struct spi_s spi_t;
-
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup GeneralSPI SPI Configuration Functions
- * @{
- */
-
-/** Initialize the SPI peripheral
- *
- * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
- * @param[out] obj The SPI object to initialize
- * @param[in] mosi The pin to use for MOSI
- * @param[in] miso The pin to use for MISO
- * @param[in] sclk The pin to use for SCLK
- * @param[in] ssel The pin to use for SSEL
- */
-void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
-
-/** Release a SPI object
- *
- * TODO: spi_free is currently unimplemented
- * This will require reference counting at the C++ level to be safe
- *
- * Return the pins owned by the SPI object to their reset state
- * Disable the SPI peripheral
- * Disable the SPI clock
- * @param[in] obj The SPI object to deinitialize
- */
-void spi_free(spi_t *obj);
-
-/** Configure the SPI format
- *
- * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
- * @param[in,out] obj The SPI object to configure
- * @param[in] bits The number of bits per frame
- * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
- * @param[in] slave Zero for master mode or non-zero for slave mode
- */
-void spi_format(spi_t *obj, int bits, int mode, int slave);
-
-/** Set the SPI baud rate
- *
- * Actual frequency may differ from the desired frequency due to available dividers and bus clock
- * Configures the SPI peripheral's baud rate
- * @param[in,out] obj The SPI object to configure
- * @param[in] hz The baud rate in Hz
- */
-void spi_frequency(spi_t *obj, int hz);
-
-/**@}*/
-/**
- * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
- * @{
- */
-
-/** Write a byte out in master mode and receive a value
- *
- * @param[in] obj The SPI peripheral to use for sending
- * @param[in] value The value to send
- * @return Returns the value received during send
- */
-int spi_master_write(spi_t *obj, int value);
-
-/** Check if a value is available to read
- *
- * @param[in] obj The SPI peripheral to check
- * @return non-zero if a value is available
- */
-int spi_slave_receive(spi_t *obj);
-
-/** Get a received value out of the SPI receive buffer in slave mode
- *
- * Blocks until a value is available
- * @param[in] obj The SPI peripheral to read
- * @return The value received
- */
-int spi_slave_read(spi_t *obj);
-
-/** Write a value to the SPI peripheral in slave mode
- *
- * Blocks until the SPI peripheral can be written to
- * @param[in] obj The SPI peripheral to write
- * @param[in] value The value to write
- */
-void spi_slave_write(spi_t *obj, int value);
-
-/** Checks if the specified SPI peripheral is in use
- *
- * @param[in] obj The SPI peripheral to check
- * @return non-zero if the peripheral is currently transmitting
- */
-int spi_busy(spi_t *obj);
-
-/** Get the module number
- *
- * @param[in] obj The SPI peripheral to check
- * @return The module number
- */
-uint8_t spi_get_module(spi_t *obj);
-
-/**@}*/
-
-#if DEVICE_SPI_ASYNCH
-/**
- * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
- * @{
- */
-
-/** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
- *
- * @param[in] obj The SPI object which holds the transfer information
- * @param[in] tx The buffer to send
- * @param[in] tx_length The number of words to transmit
- * @param[in] rx The buffer to receive
- * @param[in] rx_length The number of words to receive
- * @param[in] bit_width The bit width of buffer words
- * @param[in] event The logical OR of events to be registered
- * @param[in] handler SPI interrupt handler
- * @param[in] hint A suggestion for how to use DMA with this transfer
- */
-void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
-
-/** The asynchronous IRQ handler
- *
- * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
- * conditions, such as buffer overflows or transfer complete.
- * @param[in] obj The SPI object which holds the transfer information
- * @return event flags if a transfer termination condition was met or 0 otherwise.
- */
-uint32_t spi_irq_handler_asynch(spi_t *obj);
-
-/** Attempts to determine if the SPI peripheral is already in use.
- *
- * If a temporary DMA channel has been allocated, peripheral is in use.
- * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
- * channel were allocated.
- * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
- * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
- * there are any bytes in the FIFOs.
- * @param[in] obj The SPI object to check for activity
- * @return non-zero if the SPI port is active or zero if it is not.
- */
-uint8_t spi_active(spi_t *obj);
-
-/** Abort an SPI transfer
- *
- * @param obj The SPI peripheral to stop
- */
-void spi_abort_asynch(spi_t *obj);
-
-
-#endif
-
-/**@}*/
-
-#ifdef __cplusplus
-}
-#endif // __cplusplus
-
-#endif // SPI_DEVICE
-
-#endif // MBED_SPI_API_H
--- a/ticker_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,108 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_TICKER_API_H
-#define MBED_TICKER_API_H
-
-#include "device.h"
-
-typedef uint32_t timestamp_t;
-
-/** Ticker's event structure
- */
-typedef struct ticker_event_s {
- timestamp_t timestamp; /**< Event's timestamp */
- uint32_t id; /**< TimerEvent object */
- struct ticker_event_s *next; /**< Next event in the queue */
-} ticker_event_t;
-
-typedef void (*ticker_event_handler)(uint32_t id);
-
-/** Ticker's interface structure - required API for a ticker
- */
-typedef struct {
- void (*init)(void); /**< Init function */
- uint32_t (*read)(void); /**< Read function */
- void (*disable_interrupt)(void); /**< Disable interrupt function */
- void (*clear_interrupt)(void); /**< Clear interrupt function */
- void (*set_interrupt)(timestamp_t timestamp); /**< Set interrupt function */
-} ticker_interface_t;
-
-/** Tickers events queue structure
- */
-typedef struct {
- ticker_event_handler event_handler; /**< Event handler */
- ticker_event_t *head; /**< A pointer to head */
-} ticker_event_queue_t;
-
-/** Tickers data structure
- */
-typedef struct {
- const ticker_interface_t *interface; /**< Ticker's interface */
- ticker_event_queue_t *queue; /**< Ticker's events queue */
-} ticker_data_t;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** Initialize a ticker and sets the event handler
- *
- * @param data The ticker's data
- * @param handler A handler to be set
- */
-void ticker_set_handler(const ticker_data_t *const data, ticker_event_handler handler);
-
-/** Irq handler which goes through the events to trigger events in the past.
- *
- * @param data The ticker's data
- */
-void ticker_irq_handler(const ticker_data_t *const data);
-
-/** Remove an event from the queue
- *
- * @param data The ticker's data
- * @param obj The event's queue to be removed
- */
-void ticker_remove_event(const ticker_data_t *const data, ticker_event_t *obj);
-
-/** Insert an event from the queue
- *
- * @param data The ticker's data
- * @param obj The event's queue to be removed
- * @param timestamp The event's timestamp
- * @param id The event object
- */
-void ticker_insert_event(const ticker_data_t *const data, ticker_event_t *obj, timestamp_t timestamp, uint32_t id);
-
-/** Read the current ticker's timestamp
- *
- * @param data The ticker's data
- * @return The current timestamp
- */
-timestamp_t ticker_read(const ticker_data_t *const data);
-
-/** Read the next event's timestamp
- *
- * @param data The ticker's data
- * @return 1 if timestamp is pending event, 0 if there's no event pending
- */
-int ticker_get_next_timestamp(const ticker_data_t *const data, timestamp_t *timestamp);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/toolchain.h Thu Apr 07 17:50:29 2016 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,35 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_TOOLCHAIN_H -#define MBED_TOOLCHAIN_H - -#if defined(TOOLCHAIN_ARM) -#include <rt_sys.h> -#endif - -#ifndef FILEHANDLE -typedef int FILEHANDLE; -#endif - -#if defined (__ICCARM__) -# define WEAK __weak -# define PACKED __packed -#else -# define WEAK __attribute__((weak)) -# define PACKED __attribute__((packed)) -#endif - -#endif
--- a/us_ticker_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,78 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2015 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_US_TICKER_API_H
-#define MBED_US_TICKER_API_H
-
-#include <stdint.h>
-#include "ticker_api.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup UsTicker Microseconds Ticker Functions
- * @{
- */
-
-/** Get ticker's data
- *
- * @return The low power ticker data
- */
-const ticker_data_t* get_us_ticker_data(void);
-
-
-/** The wrapper for ticker_irq_handler, to pass us ticker's data
- *
- */
-void us_ticker_irq_handler(void);
-
-/* HAL us ticker */
-
-/** Initialize the ticker
- *
- */
-void us_ticker_init(void);
-
-/** Read the current counter
- *
- * @return The current timer's counter value in microseconds
- */
-uint32_t us_ticker_read(void);
-
-/** Set interrupt for specified timestamp
- *
- * @param timestamp The time in microseconds to be set
- */
-void us_ticker_set_interrupt(timestamp_t timestamp);
-
-/** Disable us ticker interrupt
- *
- */
-void us_ticker_disable_interrupt(void);
-
-/** Clear us ticker interrupt
- *
- */
-void us_ticker_clear_interrupt(void);
-
-/**@}*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
--- a/wait_api.h Thu Apr 07 17:50:29 2016 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,66 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2013 ARM Limited
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_WAIT_API_H
-#define MBED_WAIT_API_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** Generic wait functions.
- *
- * These provide simple NOP type wait capabilities.
- *
- * Example:
- * @code
- * #include "mbed.h"
- *
- * DigitalOut heartbeat(LED1);
- *
- * int main() {
- * while (1) {
- * heartbeat = 1;
- * wait(0.5);
- * heartbeat = 0;
- * wait(0.5);
- * }
- * }
- */
-
-/** Waits for a number of seconds, with microsecond resolution (within
- * the accuracy of single precision floating point).
- *
- * @param s number of seconds to wait
- */
-void wait(float s);
-
-/** Waits a number of milliseconds.
- *
- * @param ms the whole number of milliseconds to wait
- */
-void wait_ms(int ms);
-
-/** Waits a number of microseconds.
- *
- * @param us the whole number of microseconds to wait
- */
-void wait_us(int us);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif