marco valli / TFT_ILI9163C

Dependents:   TFTLCDSCREEN Pong_ILI9163C

Fork of TFT_ILI9163C by _ peu605

Committer:
peu605
Date:
Tue Jan 27 06:23:31 2015 +0000
Revision:
5:836673938ba7
Parent:
3:254e799c24ca
Child:
6:83f3605478ab
enable dma FIFO

Who changed what in which revision?

UserRevisionLine numberNew contents of line
peu605 0:f90a4405ef98 1 #include "TFT_ILI9163C.h"
peu605 0:f90a4405ef98 2 #include "mbed.h"
peu605 0:f90a4405ef98 3
peu605 0:f90a4405ef98 4 /**
peu605 0:f90a4405ef98 5 * TFT_ILI9163C library for ST Nucleo F411RE
peu605 0:f90a4405ef98 6 *
peu605 0:f90a4405ef98 7 * @author Copyright (c) 2014, .S.U.M.O.T.O.Y., coded by Max MC Costa
peu605 0:f90a4405ef98 8 * https://github.com/sumotoy/TFT_ILI9163C
peu605 0:f90a4405ef98 9 *
peu605 0:f90a4405ef98 10 * @author modified by masuda, Masuda Naika
peu605 0:f90a4405ef98 11 */
peu605 0:f90a4405ef98 12
peu605 0:f90a4405ef98 13 //constructors
peu605 0:f90a4405ef98 14 TFT_ILI9163C::TFT_ILI9163C(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName dc, PinName reset)
peu605 0:f90a4405ef98 15 : Adafruit_GFX(_TFTWIDTH,_TFTHEIGHT) , SPI(mosi,miso,sclk,NC), _cs(cs), _dc(dc) {
peu605 0:f90a4405ef98 16
peu605 0:f90a4405ef98 17 _resetPinName = reset;
peu605 2:6c1fadae252f 18 init(cs, dc);
peu605 0:f90a4405ef98 19 }
peu605 0:f90a4405ef98 20
peu605 0:f90a4405ef98 21 TFT_ILI9163C::TFT_ILI9163C(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName dc)
peu605 0:f90a4405ef98 22 : Adafruit_GFX(_TFTWIDTH,_TFTHEIGHT) , SPI(mosi,miso,sclk,NC), _cs(cs), _dc(dc) {
peu605 0:f90a4405ef98 23
peu605 3:254e799c24ca 24 _resetPinName = NC;
peu605 3:254e799c24ca 25 init(cs, dc);
peu605 0:f90a4405ef98 26 }
peu605 0:f90a4405ef98 27
peu605 0:f90a4405ef98 28 //Serial pc(SERIAL_TX, SERIAL_RX);
peu605 0:f90a4405ef98 29
peu605 1:c271e7e2e330 30 // F411RE specific
peu605 2:6c1fadae252f 31 #if defined(TARGET_NUCLEO_F411RE)
peu605 2:6c1fadae252f 32 void TFT_ILI9163C::init(PinName cs, PinName dc){
peu605 0:f90a4405ef98 33
peu605 2:6c1fadae252f 34 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 35
peu605 2:6c1fadae252f 36 uint32_t cs_port_index = (uint32_t) cs >> 4;
peu605 2:6c1fadae252f 37 uint32_t dc_port_index = (uint32_t) dc >> 4;
peu605 2:6c1fadae252f 38
peu605 2:6c1fadae252f 39 //set cs/dc port addresses and masks
peu605 2:6c1fadae252f 40 cs_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (cs_port_index << 10));
peu605 2:6c1fadae252f 41 cs_reg_mask = 1 << ((uint32_t) cs & 0xf);
peu605 2:6c1fadae252f 42 dc_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (dc_port_index << 10));
peu605 2:6c1fadae252f 43 dc_reg_mask = 1 << ((uint32_t) dc & 0xf);
peu605 2:6c1fadae252f 44
peu605 2:6c1fadae252f 45 // set bit band addresses
peu605 2:6c1fadae252f 46 // GPIO_TypeDef *cs_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (cs_port_index << 10));
peu605 2:6c1fadae252f 47 // GPIO_TypeDef *dc_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (dc_port_index << 10));
peu605 2:6c1fadae252f 48 // uint8_t cs_port_bit = (uint32_t) cs & 0xf;
peu605 2:6c1fadae252f 49 // uint8_t dc_port_bit = (uint32_t) dc & 0xf;
peu605 2:6c1fadae252f 50 // bb_cs_port = BITBAND_PERIPH(&cs_port_reg->ODR, cs_port_bit);
peu605 2:6c1fadae252f 51 // bb_dc_port = BITBAND_PERIPH(&dc_port_reg->ODR, dc_port_bit);
peu605 2:6c1fadae252f 52
peu605 2:6c1fadae252f 53 bb_spi_txe = BITBAND_PERIPH(&spi_ptr->SR, MASK_TO_BITNUM(SPI_SR_TXE));
peu605 2:6c1fadae252f 54 bb_spi_bsy = BITBAND_PERIPH(&spi_ptr->SR, MASK_TO_BITNUM(SPI_SR_BSY));
peu605 2:6c1fadae252f 55 bb_spi_spe = BITBAND_PERIPH(&spi_ptr->CR1, MASK_TO_BITNUM(SPI_CR1_SPE));
peu605 2:6c1fadae252f 56 bb_spi_dff = BITBAND_PERIPH(&spi_ptr->CR1, MASK_TO_BITNUM(SPI_CR1_DFF));
peu605 0:f90a4405ef98 57
peu605 0:f90a4405ef98 58 #if defined(__F411RE_DMA__)
peu605 2:6c1fadae252f 59 // init DMA
peu605 0:f90a4405ef98 60 hdma.Init.Direction = DMA_MEMORY_TO_PERIPH;
peu605 0:f90a4405ef98 61 hdma.Init.PeriphInc = DMA_PINC_DISABLE;
peu605 0:f90a4405ef98 62 hdma.Init.MemInc = DMA_MINC_DISABLE;
peu605 0:f90a4405ef98 63 hdma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
peu605 0:f90a4405ef98 64 hdma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
peu605 0:f90a4405ef98 65 hdma.Init.Mode = DMA_NORMAL;
peu605 0:f90a4405ef98 66 hdma.Init.Priority = DMA_PRIORITY_MEDIUM;
peu605 5:836673938ba7 67 hdma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
peu605 0:f90a4405ef98 68 hdma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
peu605 0:f90a4405ef98 69 hdma.Init.MemBurst = DMA_MBURST_SINGLE;
peu605 0:f90a4405ef98 70 hdma.Init.PeriphBurst = DMA_PBURST_SINGLE;
peu605 0:f90a4405ef98 71
peu605 0:f90a4405ef98 72 if(_spi.spi == SPI_1){
peu605 0:f90a4405ef98 73 hdma.Instance = DMA2_Stream3; // DMA2_Stream2
peu605 0:f90a4405ef98 74 hdma.Init.Channel = DMA_CHANNEL_3; // DMA_CHANNEL_2
peu605 0:f90a4405ef98 75 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 76 } else if(_spi.spi == SPI_2){
peu605 0:f90a4405ef98 77 hdma.Instance = DMA1_Stream4;
peu605 0:f90a4405ef98 78 hdma.Init.Channel = DMA_CHANNEL_0;
peu605 0:f90a4405ef98 79 __DMA1_CLK_ENABLE();
peu605 0:f90a4405ef98 80 } else if(_spi.spi == SPI_3){
peu605 0:f90a4405ef98 81 hdma.Instance = DMA1_Stream5; // DMA1_Stream7
peu605 0:f90a4405ef98 82 hdma.Init.Channel = DMA_CHANNEL_0; // DMA_CHANNEL0
peu605 0:f90a4405ef98 83 __DMA1_CLK_ENABLE();
peu605 0:f90a4405ef98 84 } else if(_spi.spi == SPI_4){
peu605 0:f90a4405ef98 85 hdma.Instance = DMA2_Stream1; // DMA2_Stream4
peu605 0:f90a4405ef98 86 hdma.Init.Channel = DMA_CHANNEL_4; // DMA_CHANNEL_5
peu605 0:f90a4405ef98 87 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 88 } else if(_spi.spi == SPI_5){
peu605 0:f90a4405ef98 89 hdma.Instance = DMA2_Stream4; // DMA2_Stream5, DMA2_Stream6
peu605 0:f90a4405ef98 90 hdma.Init.Channel = DMA_CHANNEL_2; // DMA_CHANNEL5, DMA_CHANNEL7
peu605 0:f90a4405ef98 91 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 92 }
peu605 0:f90a4405ef98 93
peu605 0:f90a4405ef98 94 HAL_DMA_Init(&hdma);
peu605 0:f90a4405ef98 95
peu605 0:f90a4405ef98 96 // set SPI DR ss Peripheral address
peu605 0:f90a4405ef98 97 hdma.Instance->PAR = (uint32_t) &spi_ptr->DR;
peu605 2:6c1fadae252f 98
peu605 2:6c1fadae252f 99 // set bit band addresses
peu605 2:6c1fadae252f 100 bb_spi_txdmaen = BITBAND_PERIPH(&spi_ptr->CR2, MASK_TO_BITNUM(SPI_CR2_TXDMAEN));
peu605 2:6c1fadae252f 101 bb_dma_sxcr_en = BITBAND_PERIPH(&hdma.Instance->CR, MASK_TO_BITNUM(DMA_SxCR_EN));
peu605 0:f90a4405ef98 102 #endif
peu605 2:6c1fadae252f 103 }
peu605 2:6c1fadae252f 104 inline void TFT_ILI9163C::selectSlave() {
peu605 2:6c1fadae252f 105 // _cs = 0; // Use DigitalOut
peu605 2:6c1fadae252f 106 // *bb_cs_port = 0; // Use bit band
peu605 2:6c1fadae252f 107 cs_port_reg->BSRRH = cs_reg_mask; // Use BSRR register
peu605 2:6c1fadae252f 108 }
peu605 2:6c1fadae252f 109 inline void TFT_ILI9163C::deselectSlave() {
peu605 2:6c1fadae252f 110 // _cs = 1;
peu605 2:6c1fadae252f 111 // *bb_cs_port = 1;
peu605 2:6c1fadae252f 112 cs_port_reg->BSRRL = cs_reg_mask;
peu605 2:6c1fadae252f 113 }
peu605 2:6c1fadae252f 114 inline void TFT_ILI9163C::setCommandMode() {
peu605 2:6c1fadae252f 115 // _dc = 0;
peu605 2:6c1fadae252f 116 // *bb_dc_port = 0;
peu605 2:6c1fadae252f 117 dc_port_reg->BSRRH = dc_reg_mask;
peu605 2:6c1fadae252f 118 }
peu605 2:6c1fadae252f 119 inline void TFT_ILI9163C::setDataMode() {
peu605 2:6c1fadae252f 120 // _dc = 1;
peu605 2:6c1fadae252f 121 // *bb_dc_port = 1;
peu605 2:6c1fadae252f 122 dc_port_reg->BSRRL = dc_reg_mask;
peu605 2:6c1fadae252f 123 }
peu605 2:6c1fadae252f 124 inline void TFT_ILI9163C::waitSpiFree() {
peu605 2:6c1fadae252f 125
peu605 2:6c1fadae252f 126 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 127 // while ((spi_ptr->SR & SPI_SR_TXE) == 0);
peu605 2:6c1fadae252f 128 // while ((spi_ptr->SR & SPI_SR_BSY) != 0);
peu605 2:6c1fadae252f 129
peu605 2:6c1fadae252f 130 while (*bb_spi_txe == 0);
peu605 2:6c1fadae252f 131 while (*bb_spi_bsy != 0);
peu605 2:6c1fadae252f 132 }
peu605 2:6c1fadae252f 133
peu605 2:6c1fadae252f 134 inline void TFT_ILI9163C::waitBufferFree() {
peu605 2:6c1fadae252f 135
peu605 2:6c1fadae252f 136 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 137 // while ((spi_ptr->SR & SPI_SR_TXE) == 0);
peu605 2:6c1fadae252f 138
peu605 2:6c1fadae252f 139 while (*bb_spi_txe == 0);
peu605 2:6c1fadae252f 140 }
peu605 2:6c1fadae252f 141
peu605 2:6c1fadae252f 142 inline void TFT_ILI9163C::set8bitMode() {
peu605 2:6c1fadae252f 143
peu605 2:6c1fadae252f 144 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 145 // spi_ptr->CR1 &= ~(SPI_CR1_SPE | SPI_CR1_DFF);
peu605 2:6c1fadae252f 146 // spi_ptr->CR1 |= SPI_CR1_SPE;
peu605 2:6c1fadae252f 147
peu605 2:6c1fadae252f 148 *bb_spi_spe = 0;
peu605 2:6c1fadae252f 149 *bb_spi_dff = 0;
peu605 2:6c1fadae252f 150 *bb_spi_spe = 1;
peu605 2:6c1fadae252f 151 }
peu605 2:6c1fadae252f 152
peu605 2:6c1fadae252f 153 inline void TFT_ILI9163C::set16bitMode() {
peu605 2:6c1fadae252f 154
peu605 2:6c1fadae252f 155 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 156 // spi_ptr->CR1 &= ~SPI_CR1_SPE;
peu605 2:6c1fadae252f 157 // spi_ptr->CR1 |= (SPI_CR1_SPE | SPI_CR1_DFF);
peu605 2:6c1fadae252f 158
peu605 2:6c1fadae252f 159 *bb_spi_spe = 0;
peu605 2:6c1fadae252f 160 *bb_spi_dff = 1;
peu605 2:6c1fadae252f 161 *bb_spi_spe = 1;
peu605 2:6c1fadae252f 162 }
peu605 2:6c1fadae252f 163
peu605 2:6c1fadae252f 164 void TFT_ILI9163C::writecommand(uint8_t c){
peu605 2:6c1fadae252f 165
peu605 2:6c1fadae252f 166 set8bitMode();
peu605 2:6c1fadae252f 167 setCommandMode();
peu605 2:6c1fadae252f 168 selectSlave();
peu605 2:6c1fadae252f 169
peu605 2:6c1fadae252f 170 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 171 spi_ptr->DR = c;
peu605 2:6c1fadae252f 172
peu605 2:6c1fadae252f 173 waitSpiFree();
peu605 2:6c1fadae252f 174 deselectSlave();
peu605 2:6c1fadae252f 175 }
peu605 2:6c1fadae252f 176
peu605 2:6c1fadae252f 177
peu605 2:6c1fadae252f 178 void TFT_ILI9163C::writedata(uint8_t c){
peu605 2:6c1fadae252f 179
peu605 2:6c1fadae252f 180 set8bitMode();
peu605 2:6c1fadae252f 181 setDataMode();
peu605 2:6c1fadae252f 182 selectSlave();
peu605 2:6c1fadae252f 183
peu605 2:6c1fadae252f 184 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 185 spi_ptr->DR = c;
peu605 2:6c1fadae252f 186
peu605 2:6c1fadae252f 187 waitSpiFree();
peu605 2:6c1fadae252f 188 deselectSlave();
peu605 2:6c1fadae252f 189 }
peu605 2:6c1fadae252f 190
peu605 2:6c1fadae252f 191
peu605 2:6c1fadae252f 192 void TFT_ILI9163C::writedata16(uint16_t d){
peu605 2:6c1fadae252f 193
peu605 2:6c1fadae252f 194 set16bitMode();
peu605 2:6c1fadae252f 195 setDataMode();
peu605 2:6c1fadae252f 196 selectSlave();
peu605 2:6c1fadae252f 197
peu605 2:6c1fadae252f 198 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 199 spi_ptr->DR = d;
peu605 2:6c1fadae252f 200
peu605 2:6c1fadae252f 201 waitSpiFree();
peu605 2:6c1fadae252f 202 deselectSlave();
peu605 2:6c1fadae252f 203 }
peu605 2:6c1fadae252f 204
peu605 2:6c1fadae252f 205
peu605 2:6c1fadae252f 206 void TFT_ILI9163C::writedata32(uint16_t d1, uint16_t d2){
peu605 2:6c1fadae252f 207
peu605 2:6c1fadae252f 208 set16bitMode();
peu605 2:6c1fadae252f 209 setDataMode();
peu605 2:6c1fadae252f 210 selectSlave();
peu605 2:6c1fadae252f 211
peu605 2:6c1fadae252f 212 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 213 spi_ptr->DR = d1;
peu605 2:6c1fadae252f 214 waitBufferFree();
peu605 2:6c1fadae252f 215 spi_ptr->DR = d2;
peu605 2:6c1fadae252f 216
peu605 2:6c1fadae252f 217 waitSpiFree();
peu605 2:6c1fadae252f 218 deselectSlave();
peu605 2:6c1fadae252f 219 }
peu605 2:6c1fadae252f 220
peu605 2:6c1fadae252f 221 #if defined(__F411RE_DMA__)
peu605 2:6c1fadae252f 222 // use DMA, but polling... :-(
peu605 2:6c1fadae252f 223 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 224
peu605 2:6c1fadae252f 225 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 226
peu605 2:6c1fadae252f 227 if (len > 0) {
peu605 2:6c1fadae252f 228 set16bitMode();
peu605 2:6c1fadae252f 229 setDataMode();
peu605 2:6c1fadae252f 230 selectSlave();
peu605 2:6c1fadae252f 231
peu605 2:6c1fadae252f 232 // clear DMA flags
peu605 2:6c1fadae252f 233 // __HAL_DMA_CLEAR_FLAG(&hdma, __HAL_DMA_GET_TE_FLAG_INDEX(&hdma));
peu605 2:6c1fadae252f 234 __HAL_DMA_CLEAR_FLAG(&hdma, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma));
peu605 2:6c1fadae252f 235
peu605 2:6c1fadae252f 236 hdma.Instance->M0AR = (uint32_t) &d;
peu605 2:6c1fadae252f 237 hdma.Instance->NDTR = len;
peu605 2:6c1fadae252f 238
peu605 2:6c1fadae252f 239 // // enable DMA
peu605 2:6c1fadae252f 240 // hdma.Instance->CR |= DMA_SxCR_EN;
peu605 2:6c1fadae252f 241 //
peu605 2:6c1fadae252f 242 // // enable DMA request from SPI
peu605 2:6c1fadae252f 243 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 244 // spi_ptr->CR2 |= SPI_CR2_TXDMAEN;
peu605 2:6c1fadae252f 245 //
peu605 2:6c1fadae252f 246 // // wait DMA complete
peu605 2:6c1fadae252f 247 // while (hdma.Instance->NDTR);
peu605 2:6c1fadae252f 248 //
peu605 2:6c1fadae252f 249 // // disable SPI-DMA
peu605 2:6c1fadae252f 250 // spi_ptr->CR2 &= ~SPI_CR2_TXDMAEN;
peu605 2:6c1fadae252f 251 //
peu605 2:6c1fadae252f 252 // // disable DMA
peu605 2:6c1fadae252f 253 // hdma.Instance->CR &= ~DMA_SxCR_EN;
peu605 2:6c1fadae252f 254 // while (hdma.Instance->CR & DMA_SxCR_EN);
peu605 2:6c1fadae252f 255
peu605 2:6c1fadae252f 256 // enable DMA
peu605 2:6c1fadae252f 257 *bb_dma_sxcr_en = 1;
peu605 2:6c1fadae252f 258
peu605 2:6c1fadae252f 259 // enable DMA request from SPI
peu605 2:6c1fadae252f 260 *bb_spi_txdmaen = 1;
peu605 2:6c1fadae252f 261
peu605 2:6c1fadae252f 262 // wait DMA complete
peu605 2:6c1fadae252f 263 while (hdma.Instance->NDTR);
peu605 2:6c1fadae252f 264
peu605 2:6c1fadae252f 265 // disable SPI-DMA
peu605 2:6c1fadae252f 266 *bb_spi_txdmaen = 0;
peu605 2:6c1fadae252f 267
peu605 2:6c1fadae252f 268 // disable DMA
peu605 2:6c1fadae252f 269 *bb_dma_sxcr_en = 0;
peu605 2:6c1fadae252f 270 while (*bb_dma_sxcr_en);
peu605 2:6c1fadae252f 271
peu605 2:6c1fadae252f 272 waitSpiFree();
peu605 2:6c1fadae252f 273 deselectSlave();
peu605 2:6c1fadae252f 274 }
peu605 2:6c1fadae252f 275 }
peu605 2:6c1fadae252f 276
peu605 2:6c1fadae252f 277 #else
peu605 2:6c1fadae252f 278 // use software loop, fast enough :-)
peu605 2:6c1fadae252f 279 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 280
peu605 2:6c1fadae252f 281 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 282
peu605 2:6c1fadae252f 283 if (len > 0) {
peu605 2:6c1fadae252f 284 set16bitMode();
peu605 2:6c1fadae252f 285 setDataMode();
peu605 2:6c1fadae252f 286 selectSlave();
peu605 2:6c1fadae252f 287
peu605 2:6c1fadae252f 288 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 289 while (len--) {
peu605 2:6c1fadae252f 290 waitBufferFree();
peu605 2:6c1fadae252f 291 spi_ptr->DR = d;
peu605 2:6c1fadae252f 292 }
peu605 2:6c1fadae252f 293
peu605 2:6c1fadae252f 294 waitSpiFree();
peu605 2:6c1fadae252f 295 deselectSlave();
peu605 2:6c1fadae252f 296 }
peu605 2:6c1fadae252f 297 }
peu605 1:c271e7e2e330 298 #endif
peu605 2:6c1fadae252f 299
peu605 2:6c1fadae252f 300 // mbed general
peu605 2:6c1fadae252f 301 #else
peu605 2:6c1fadae252f 302 void TFT_ILI9163C::init(PinName cs, PinName dc){
peu605 2:6c1fadae252f 303 // nothing here
peu605 2:6c1fadae252f 304 }
peu605 2:6c1fadae252f 305
peu605 2:6c1fadae252f 306 void TFT_ILI9163C::writecommand(uint8_t c){
peu605 2:6c1fadae252f 307
peu605 2:6c1fadae252f 308 _dc = 0;
peu605 2:6c1fadae252f 309 _cs = 0;
peu605 2:6c1fadae252f 310
peu605 2:6c1fadae252f 311 SPI::write(c);
peu605 2:6c1fadae252f 312
peu605 2:6c1fadae252f 313 _cs = 1;
peu605 2:6c1fadae252f 314 }
peu605 2:6c1fadae252f 315
peu605 2:6c1fadae252f 316
peu605 2:6c1fadae252f 317 void TFT_ILI9163C::writedata(uint8_t c){
peu605 2:6c1fadae252f 318
peu605 2:6c1fadae252f 319 _dc = 1;
peu605 2:6c1fadae252f 320 _cs = 0;
peu605 2:6c1fadae252f 321
peu605 2:6c1fadae252f 322 SPI::write(c);
peu605 2:6c1fadae252f 323
peu605 2:6c1fadae252f 324 _cs = 1;
peu605 2:6c1fadae252f 325 }
peu605 2:6c1fadae252f 326
peu605 2:6c1fadae252f 327
peu605 2:6c1fadae252f 328 void TFT_ILI9163C::writedata16(uint16_t d){
peu605 2:6c1fadae252f 329
peu605 2:6c1fadae252f 330 _dc = 1;
peu605 2:6c1fadae252f 331 _cs = 0;
peu605 2:6c1fadae252f 332
peu605 2:6c1fadae252f 333 SPI::write(d >> 8);
peu605 2:6c1fadae252f 334 SPI::write(d & 0xff);
peu605 2:6c1fadae252f 335
peu605 2:6c1fadae252f 336 _cs = 1;
peu605 2:6c1fadae252f 337 }
peu605 2:6c1fadae252f 338
peu605 2:6c1fadae252f 339
peu605 2:6c1fadae252f 340 void TFT_ILI9163C::writedata32(uint16_t d1, uint16_t d2){
peu605 2:6c1fadae252f 341
peu605 2:6c1fadae252f 342 _dc = 1;
peu605 2:6c1fadae252f 343 _cs = 0;
peu605 2:6c1fadae252f 344
peu605 2:6c1fadae252f 345 SPI::write(d1 >> 8);
peu605 2:6c1fadae252f 346 SPI::write(d1 & 0xff);
peu605 2:6c1fadae252f 347 SPI::write(d2 >> 8);
peu605 2:6c1fadae252f 348 SPI::write(d2 & 0xff);
peu605 2:6c1fadae252f 349
peu605 2:6c1fadae252f 350 _cs = 1;
peu605 2:6c1fadae252f 351 }
peu605 2:6c1fadae252f 352
peu605 2:6c1fadae252f 353
peu605 2:6c1fadae252f 354 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 355
peu605 2:6c1fadae252f 356 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 357
peu605 2:6c1fadae252f 358 if (len > 0) {
peu605 2:6c1fadae252f 359
peu605 2:6c1fadae252f 360 _dc = 1;
peu605 2:6c1fadae252f 361 _cs = 0;
peu605 2:6c1fadae252f 362
peu605 2:6c1fadae252f 363 while (len--) {
peu605 2:6c1fadae252f 364 SPI::write(d >> 8);
peu605 2:6c1fadae252f 365 SPI::write(d & 0xff);
peu605 2:6c1fadae252f 366 }
peu605 2:6c1fadae252f 367
peu605 2:6c1fadae252f 368 _cs = 1;
peu605 2:6c1fadae252f 369 }
peu605 2:6c1fadae252f 370 }
peu605 2:6c1fadae252f 371 #endif
peu605 2:6c1fadae252f 372
peu605 2:6c1fadae252f 373
peu605 2:6c1fadae252f 374 void TFT_ILI9163C::setBitrate(uint32_t n){
peu605 2:6c1fadae252f 375 SPI::frequency(n);
peu605 2:6c1fadae252f 376 }
peu605 2:6c1fadae252f 377
peu605 2:6c1fadae252f 378
peu605 2:6c1fadae252f 379 void TFT_ILI9163C::begin(void) {
peu605 2:6c1fadae252f 380
peu605 2:6c1fadae252f 381 SPI::format(8,0); // 8 bit spi mode 0
peu605 2:6c1fadae252f 382 SPI::frequency(5000000L); // 5MHz
peu605 0:f90a4405ef98 383
peu605 0:f90a4405ef98 384 if (_resetPinName != NC) {
peu605 0:f90a4405ef98 385 DigitalOut _reset(_resetPinName);
peu605 0:f90a4405ef98 386 _reset = 1;
peu605 0:f90a4405ef98 387 wait_ms(1);
peu605 0:f90a4405ef98 388 _reset = 0;
peu605 0:f90a4405ef98 389 wait_ms(2);
peu605 0:f90a4405ef98 390 _reset = 1;
peu605 0:f90a4405ef98 391 wait_ms(120);
peu605 0:f90a4405ef98 392 }
peu605 0:f90a4405ef98 393
peu605 0:f90a4405ef98 394 /*
peu605 0:f90a4405ef98 395 7) MY: 1(bottom to top), 0(top to bottom) Row Address Order
peu605 0:f90a4405ef98 396 6) MX: 1(R to L), 0(L to R) Column Address Order
peu605 0:f90a4405ef98 397 5) MV: 1(Exchanged), 0(normal) Row/Column exchange
peu605 0:f90a4405ef98 398 4) ML: 1(bottom to top), 0(top to bottom) Vertical Refresh Order
peu605 0:f90a4405ef98 399 3) RGB: 1(BGR), 0(RGB) Color Space
peu605 0:f90a4405ef98 400 2) MH: 1(R to L), 0(L to R) Horizontal Refresh Order
peu605 0:f90a4405ef98 401 1)
peu605 0:f90a4405ef98 402 0)
peu605 0:f90a4405ef98 403
peu605 0:f90a4405ef98 404 MY, MX, MV, ML,RGB, MH, D1, D0
peu605 0:f90a4405ef98 405 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //normal
peu605 0:f90a4405ef98 406 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //Y-Mirror
peu605 0:f90a4405ef98 407 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Mirror
peu605 0:f90a4405ef98 408 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Y-Mirror
peu605 0:f90a4405ef98 409 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange
peu605 0:f90a4405ef98 410 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange, Y-Mirror
peu605 0:f90a4405ef98 411 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 //XY exchange
peu605 0:f90a4405ef98 412 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0
peu605 0:f90a4405ef98 413 */
peu605 0:f90a4405ef98 414 _Mactrl_Data = 0; // 0b00000000;
peu605 0:f90a4405ef98 415 _colorspaceData = __COLORSPC;//start with default data;
peu605 0:f90a4405ef98 416 chipInit();
peu605 0:f90a4405ef98 417 }
peu605 0:f90a4405ef98 418
peu605 0:f90a4405ef98 419
peu605 0:f90a4405ef98 420 void TFT_ILI9163C::chipInit() {
peu605 0:f90a4405ef98 421 writecommand(CMD_SWRESET);//software reset
peu605 0:f90a4405ef98 422 wait_ms(120);
peu605 0:f90a4405ef98 423 writecommand(CMD_SLPOUT);//exit sleep
peu605 0:f90a4405ef98 424 wait_ms(5);
peu605 0:f90a4405ef98 425 writecommand(CMD_PIXFMT);//Set Color Format 16bit
peu605 0:f90a4405ef98 426 writedata(0x05);
peu605 0:f90a4405ef98 427 wait_ms(5);
peu605 0:f90a4405ef98 428 writecommand(CMD_GAMMASET);//default gamma curve 3
peu605 0:f90a4405ef98 429 writedata(0x04);//0x04
peu605 0:f90a4405ef98 430 wait_ms(1);
peu605 0:f90a4405ef98 431 writecommand(CMD_GAMRSEL);//Enable Gamma adj
peu605 0:f90a4405ef98 432 writedata(0x01);
peu605 0:f90a4405ef98 433 wait_ms(1);
peu605 0:f90a4405ef98 434 writecommand(CMD_NORML);
peu605 0:f90a4405ef98 435
peu605 0:f90a4405ef98 436 writecommand(CMD_DFUNCTR);
peu605 0:f90a4405ef98 437 writedata(0xff); // writedata(0b11111111);//
peu605 0:f90a4405ef98 438 writedata(0x06); // writedata(0b00000110);//
peu605 0:f90a4405ef98 439
peu605 0:f90a4405ef98 440 writecommand(CMD_PGAMMAC);//Positive Gamma Correction Setting
peu605 0:f90a4405ef98 441 #if defined(__GAMMASET1)
peu605 0:f90a4405ef98 442 writedata(0x36);//p1
peu605 0:f90a4405ef98 443 writedata(0x29);//p2
peu605 0:f90a4405ef98 444 writedata(0x12);//p3
peu605 0:f90a4405ef98 445 writedata(0x22);//p4
peu605 0:f90a4405ef98 446 writedata(0x1C);//p5
peu605 0:f90a4405ef98 447 writedata(0x15);//p6
peu605 0:f90a4405ef98 448 writedata(0x42);//p7
peu605 0:f90a4405ef98 449 writedata(0xB7);//p8
peu605 0:f90a4405ef98 450 writedata(0x2F);//p9
peu605 0:f90a4405ef98 451 writedata(0x13);//p10
peu605 0:f90a4405ef98 452 writedata(0x12);//p11
peu605 0:f90a4405ef98 453 writedata(0x0A);//p12
peu605 0:f90a4405ef98 454 writedata(0x11);//p13
peu605 0:f90a4405ef98 455 writedata(0x0B);//p14
peu605 0:f90a4405ef98 456 writedata(0x06);//p15
peu605 0:f90a4405ef98 457 #else
peu605 0:f90a4405ef98 458 writedata(0x3F);//p1
peu605 0:f90a4405ef98 459 writedata(0x25);//p2
peu605 0:f90a4405ef98 460 writedata(0x1C);//p3
peu605 0:f90a4405ef98 461 writedata(0x1E);//p4
peu605 0:f90a4405ef98 462 writedata(0x20);//p5
peu605 0:f90a4405ef98 463 writedata(0x12);//p6
peu605 0:f90a4405ef98 464 writedata(0x2A);//p7
peu605 0:f90a4405ef98 465 writedata(0x90);//p8
peu605 0:f90a4405ef98 466 writedata(0x24);//p9
peu605 0:f90a4405ef98 467 writedata(0x11);//p10
peu605 0:f90a4405ef98 468 writedata(0x00);//p11
peu605 0:f90a4405ef98 469 writedata(0x00);//p12
peu605 0:f90a4405ef98 470 writedata(0x00);//p13
peu605 0:f90a4405ef98 471 writedata(0x00);//p14
peu605 0:f90a4405ef98 472 writedata(0x00);//p15
peu605 0:f90a4405ef98 473 #endif
peu605 0:f90a4405ef98 474
peu605 0:f90a4405ef98 475 writecommand(CMD_NGAMMAC);//Negative Gamma Correction Setting
peu605 0:f90a4405ef98 476 #if defined(__GAMMASET1)
peu605 0:f90a4405ef98 477 writedata(0x09);//p1
peu605 0:f90a4405ef98 478 writedata(0x16);//p2
peu605 0:f90a4405ef98 479 writedata(0x2D);//p3
peu605 0:f90a4405ef98 480 writedata(0x0D);//p4
peu605 0:f90a4405ef98 481 writedata(0x13);//p5
peu605 0:f90a4405ef98 482 writedata(0x15);//p6
peu605 0:f90a4405ef98 483 writedata(0x40);//p7
peu605 0:f90a4405ef98 484 writedata(0x48);//p8
peu605 0:f90a4405ef98 485 writedata(0x53);//p9
peu605 0:f90a4405ef98 486 writedata(0x0C);//p10
peu605 0:f90a4405ef98 487 writedata(0x1D);//p11
peu605 0:f90a4405ef98 488 writedata(0x25);//p12
peu605 0:f90a4405ef98 489 writedata(0x2E);//p13
peu605 0:f90a4405ef98 490 writedata(0x34);//p14
peu605 0:f90a4405ef98 491 writedata(0x39);//p15
peu605 0:f90a4405ef98 492 #else
peu605 0:f90a4405ef98 493 writedata(0x20);//p1
peu605 0:f90a4405ef98 494 writedata(0x20);//p2
peu605 0:f90a4405ef98 495 writedata(0x20);//p3
peu605 0:f90a4405ef98 496 writedata(0x20);//p4
peu605 0:f90a4405ef98 497 writedata(0x05);//p5
peu605 0:f90a4405ef98 498 writedata(0x15);//p6
peu605 0:f90a4405ef98 499 writedata(0x00);//p7
peu605 0:f90a4405ef98 500 writedata(0xA7);//p8
peu605 0:f90a4405ef98 501 writedata(0x3D);//p9
peu605 0:f90a4405ef98 502 writedata(0x18);//p10
peu605 0:f90a4405ef98 503 writedata(0x25);//p11
peu605 0:f90a4405ef98 504 writedata(0x2A);//p12
peu605 0:f90a4405ef98 505 writedata(0x2B);//p13
peu605 0:f90a4405ef98 506 writedata(0x2B);//p14
peu605 0:f90a4405ef98 507 writedata(0x3A);//p15
peu605 0:f90a4405ef98 508 #endif
peu605 0:f90a4405ef98 509
peu605 0:f90a4405ef98 510 writecommand(CMD_FRMCTR1);//Frame Rate Control (In normal mode/Full colors)
peu605 0:f90a4405ef98 511 writedata(0x08);//0x0C//0x08
peu605 0:f90a4405ef98 512 writedata(0x02);//0x14//0x08
peu605 0:f90a4405ef98 513 wait_ms(1);
peu605 0:f90a4405ef98 514 writecommand(CMD_DINVCTR);//display inversion
peu605 0:f90a4405ef98 515 writedata(0x07);
peu605 0:f90a4405ef98 516 wait_ms(1);
peu605 0:f90a4405ef98 517 writecommand(CMD_PWCTR1);//Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD
peu605 0:f90a4405ef98 518 writedata(0x0A);//4.30 - 0x0A
peu605 0:f90a4405ef98 519 writedata(0x02);//0x05
peu605 0:f90a4405ef98 520 wait_ms(1);
peu605 0:f90a4405ef98 521 writecommand(CMD_PWCTR2);//Set BT[2:0] for AVDD & VCL & VGH & VGL
peu605 0:f90a4405ef98 522 writedata(0x02);
peu605 0:f90a4405ef98 523 wait_ms(1);
peu605 0:f90a4405ef98 524 writecommand(CMD_VCOMCTR1);//Set VMH[6:0] & VML[6:0] for VOMH & VCOML
peu605 0:f90a4405ef98 525 writedata(0x50);//0x50
peu605 0:f90a4405ef98 526 writedata(99);//0x5b
peu605 0:f90a4405ef98 527 wait_ms(1);
peu605 0:f90a4405ef98 528 writecommand(CMD_VCOMOFFS);
peu605 0:f90a4405ef98 529 writedata(0);//0x40
peu605 0:f90a4405ef98 530 wait_ms(1);
peu605 0:f90a4405ef98 531
peu605 0:f90a4405ef98 532 colorSpace(_colorspaceData);
peu605 0:f90a4405ef98 533 setRotation(0);
peu605 0:f90a4405ef98 534 wait_ms(1);
peu605 0:f90a4405ef98 535
peu605 0:f90a4405ef98 536 fillScreen(BLACK);
peu605 0:f90a4405ef98 537 writecommand(CMD_DISPON);//display ON
peu605 0:f90a4405ef98 538 }
peu605 0:f90a4405ef98 539
peu605 0:f90a4405ef98 540 /*
peu605 0:f90a4405ef98 541 Colorspace selection:
peu605 0:f90a4405ef98 542 0: RGB
peu605 0:f90a4405ef98 543 1: GBR
peu605 0:f90a4405ef98 544 */
peu605 0:f90a4405ef98 545 void TFT_ILI9163C::colorSpace(uint8_t cspace) {
peu605 0:f90a4405ef98 546 if (cspace < 1){
peu605 0:f90a4405ef98 547 _Mactrl_Data &= ~(1 << 3); // bitClear(_Mactrl_Data,3);
peu605 0:f90a4405ef98 548 } else {
peu605 0:f90a4405ef98 549 _Mactrl_Data |= 1 << 3; // bitSet(_Mactrl_Data,3);
peu605 0:f90a4405ef98 550 }
peu605 0:f90a4405ef98 551 }
peu605 0:f90a4405ef98 552
peu605 0:f90a4405ef98 553
peu605 0:f90a4405ef98 554 void TFT_ILI9163C::clearScreen(uint16_t color) {
peu605 0:f90a4405ef98 555 homeAddress();
peu605 0:f90a4405ef98 556 writedata16burst(color, _GRAMSIZE);
peu605 0:f90a4405ef98 557 }
peu605 0:f90a4405ef98 558
peu605 0:f90a4405ef98 559 void TFT_ILI9163C::homeAddress() {
peu605 0:f90a4405ef98 560 setAddrWindow(0x00,0x00,_GRAMWIDTH-1,_GRAMHEIGH-1);
peu605 0:f90a4405ef98 561 }
peu605 0:f90a4405ef98 562
peu605 0:f90a4405ef98 563
peu605 0:f90a4405ef98 564 void TFT_ILI9163C::setCursor(int16_t x, int16_t y) {
peu605 0:f90a4405ef98 565 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 566 setAddrWindow(0x00,0x00,x,y);
peu605 0:f90a4405ef98 567 cursor_x = x;
peu605 0:f90a4405ef98 568 cursor_y = y;
peu605 0:f90a4405ef98 569 }
peu605 0:f90a4405ef98 570
peu605 0:f90a4405ef98 571
peu605 0:f90a4405ef98 572 void TFT_ILI9163C::pushColor(uint16_t color) {
peu605 0:f90a4405ef98 573 writedata16(color);
peu605 0:f90a4405ef98 574 }
peu605 0:f90a4405ef98 575
peu605 0:f90a4405ef98 576
peu605 0:f90a4405ef98 577 void TFT_ILI9163C::drawPixel(int16_t x, int16_t y, uint16_t color) {
peu605 0:f90a4405ef98 578 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 579 if ((x < 0) || (y < 0)) return;
peu605 0:f90a4405ef98 580 setAddrWindow(x,y,x+1,y+1);
peu605 0:f90a4405ef98 581 writedata16(color);
peu605 0:f90a4405ef98 582 }
peu605 0:f90a4405ef98 583
peu605 0:f90a4405ef98 584
peu605 0:f90a4405ef98 585 void TFT_ILI9163C::drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color) {
peu605 0:f90a4405ef98 586 // Rudimentary clipping
peu605 0:f90a4405ef98 587 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 588 if (((y + h) - 1) >= _height) h = _height-y;
peu605 0:f90a4405ef98 589
peu605 0:f90a4405ef98 590 setAddrWindow(x,y,x,(y+h)-1);
peu605 0:f90a4405ef98 591 writedata16burst(color, h);
peu605 0:f90a4405ef98 592 }
peu605 0:f90a4405ef98 593
peu605 0:f90a4405ef98 594 inline bool TFT_ILI9163C::boundaryCheck(int16_t x,int16_t y){
peu605 0:f90a4405ef98 595 if ((x >= _width) || (y >= _height)) return true;
peu605 0:f90a4405ef98 596 return false;
peu605 0:f90a4405ef98 597 }
peu605 0:f90a4405ef98 598
peu605 0:f90a4405ef98 599 void TFT_ILI9163C::drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color) {
peu605 0:f90a4405ef98 600 // Rudimentary clipping
peu605 0:f90a4405ef98 601 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 602 if (((x+w) - 1) >= _width) w = _width-x;
peu605 0:f90a4405ef98 603
peu605 0:f90a4405ef98 604 setAddrWindow(x,y,(x+w)-1,y);
peu605 0:f90a4405ef98 605 writedata16burst(color, w);
peu605 0:f90a4405ef98 606 }
peu605 0:f90a4405ef98 607
peu605 0:f90a4405ef98 608 void TFT_ILI9163C::fillScreen(uint16_t color) {
peu605 0:f90a4405ef98 609 clearScreen(color);
peu605 0:f90a4405ef98 610 }
peu605 0:f90a4405ef98 611
peu605 0:f90a4405ef98 612 // fill a rectangle
peu605 0:f90a4405ef98 613 void TFT_ILI9163C::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color) {
peu605 0:f90a4405ef98 614
peu605 0:f90a4405ef98 615 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 616 if (((x + w) - 1) >= _width) w = _width - x;
peu605 0:f90a4405ef98 617 if (((y + h) - 1) >= _height) h = _height - y;
peu605 0:f90a4405ef98 618
peu605 0:f90a4405ef98 619 setAddrWindow(x,y,(x+w)-1,(y+h)-1);
peu605 0:f90a4405ef98 620 writedata16burst(color, w * h);
peu605 0:f90a4405ef98 621 }
peu605 0:f90a4405ef98 622
peu605 0:f90a4405ef98 623
peu605 0:f90a4405ef98 624 // Pass 8-bit (each) R,G,B, get back 16-bit packed color
peu605 0:f90a4405ef98 625
peu605 0:f90a4405ef98 626 uint16_t TFT_ILI9163C::Color565(uint8_t r, uint8_t g, uint8_t b) {
peu605 0:f90a4405ef98 627 return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
peu605 0:f90a4405ef98 628 }
peu605 0:f90a4405ef98 629
peu605 0:f90a4405ef98 630
peu605 0:f90a4405ef98 631 void TFT_ILI9163C::setAddrWindow(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) {
peu605 0:f90a4405ef98 632
peu605 0:f90a4405ef98 633 writecommand(CMD_CLMADRS); // Column
peu605 0:f90a4405ef98 634
peu605 0:f90a4405ef98 635 if (rotation == 1) {
peu605 0:f90a4405ef98 636 writedata32(x0 + __OFFSET, x1 + __OFFSET);
peu605 0:f90a4405ef98 637 } else {
peu605 0:f90a4405ef98 638 writedata32(x0, x1);
peu605 0:f90a4405ef98 639 }
peu605 0:f90a4405ef98 640
peu605 0:f90a4405ef98 641 writecommand(CMD_PGEADRS); // Page
peu605 0:f90a4405ef98 642 if (rotation == 0){
peu605 0:f90a4405ef98 643 writedata32(y0 + __OFFSET, y1 + __OFFSET);
peu605 0:f90a4405ef98 644 } else {
peu605 0:f90a4405ef98 645 writedata32(y0, y1);
peu605 0:f90a4405ef98 646 }
peu605 0:f90a4405ef98 647
peu605 0:f90a4405ef98 648 writecommand(CMD_RAMWR); //Into RAM
peu605 0:f90a4405ef98 649 }
peu605 0:f90a4405ef98 650
peu605 0:f90a4405ef98 651
peu605 0:f90a4405ef98 652 void TFT_ILI9163C::setRotation(uint8_t m) {
peu605 0:f90a4405ef98 653 rotation = m &3; // can't be higher than 3
peu605 0:f90a4405ef98 654 switch (rotation) {
peu605 0:f90a4405ef98 655 case 0:
peu605 0:f90a4405ef98 656 _Mactrl_Data = 0x08; // 0b00001000;
peu605 0:f90a4405ef98 657 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 658 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 659 break;
peu605 0:f90a4405ef98 660 case 1:
peu605 0:f90a4405ef98 661 _Mactrl_Data = 0x68; // 0b01101000;
peu605 0:f90a4405ef98 662 _width = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 663 _height = _TFTWIDTH;
peu605 0:f90a4405ef98 664 break;
peu605 0:f90a4405ef98 665 case 2:
peu605 0:f90a4405ef98 666 _Mactrl_Data = 0xC8; // 0b11001000;
peu605 0:f90a4405ef98 667 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 668 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 669 break;
peu605 0:f90a4405ef98 670 case 3:
peu605 0:f90a4405ef98 671 _Mactrl_Data = 0xA8; // 0b10101000;
peu605 0:f90a4405ef98 672 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 673 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 674 break;
peu605 0:f90a4405ef98 675 }
peu605 0:f90a4405ef98 676 colorSpace(_colorspaceData);
peu605 0:f90a4405ef98 677 writecommand(CMD_MADCTL);
peu605 0:f90a4405ef98 678 writedata(_Mactrl_Data);
peu605 0:f90a4405ef98 679 }
peu605 0:f90a4405ef98 680
peu605 0:f90a4405ef98 681
peu605 0:f90a4405ef98 682 void TFT_ILI9163C::invertDisplay(bool i) {
peu605 0:f90a4405ef98 683 writecommand(i ? CMD_DINVON : CMD_DINVOF);
peu605 0:f90a4405ef98 684 }