marco valli / TFT_ILI9163C

Dependents:   TFTLCDSCREEN Pong_ILI9163C

Fork of TFT_ILI9163C by _ peu605

Committer:
peu605
Date:
Mon Jan 26 10:39:12 2015 +0000
Revision:
2:6c1fadae252f
Parent:
1:c271e7e2e330
Child:
3:254e799c24ca
apply bit banding

Who changed what in which revision?

UserRevisionLine numberNew contents of line
peu605 0:f90a4405ef98 1 #include "TFT_ILI9163C.h"
peu605 0:f90a4405ef98 2 #include "mbed.h"
peu605 0:f90a4405ef98 3
peu605 0:f90a4405ef98 4 /**
peu605 0:f90a4405ef98 5 * TFT_ILI9163C library for ST Nucleo F411RE
peu605 0:f90a4405ef98 6 *
peu605 0:f90a4405ef98 7 * @author Copyright (c) 2014, .S.U.M.O.T.O.Y., coded by Max MC Costa
peu605 0:f90a4405ef98 8 * https://github.com/sumotoy/TFT_ILI9163C
peu605 0:f90a4405ef98 9 *
peu605 0:f90a4405ef98 10 * @author modified by masuda, Masuda Naika
peu605 0:f90a4405ef98 11 */
peu605 0:f90a4405ef98 12
peu605 0:f90a4405ef98 13 //constructors
peu605 0:f90a4405ef98 14 TFT_ILI9163C::TFT_ILI9163C(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName dc, PinName reset)
peu605 0:f90a4405ef98 15 : Adafruit_GFX(_TFTWIDTH,_TFTHEIGHT) , SPI(mosi,miso,sclk,NC), _cs(cs), _dc(dc) {
peu605 0:f90a4405ef98 16
peu605 0:f90a4405ef98 17 _resetPinName = reset;
peu605 2:6c1fadae252f 18 init(cs, dc);
peu605 0:f90a4405ef98 19 }
peu605 0:f90a4405ef98 20
peu605 0:f90a4405ef98 21 TFT_ILI9163C::TFT_ILI9163C(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName dc)
peu605 0:f90a4405ef98 22 : Adafruit_GFX(_TFTWIDTH,_TFTHEIGHT) , SPI(mosi,miso,sclk,NC), _cs(cs), _dc(dc) {
peu605 0:f90a4405ef98 23
peu605 2:6c1fadae252f 24 TFT_ILI9163C(mosi, miso, sclk, cs, dc, NC);
peu605 0:f90a4405ef98 25 }
peu605 0:f90a4405ef98 26
peu605 0:f90a4405ef98 27 //Serial pc(SERIAL_TX, SERIAL_RX);
peu605 0:f90a4405ef98 28
peu605 1:c271e7e2e330 29 // F411RE specific
peu605 2:6c1fadae252f 30 #if defined(TARGET_NUCLEO_F411RE)
peu605 2:6c1fadae252f 31 void TFT_ILI9163C::init(PinName cs, PinName dc){
peu605 0:f90a4405ef98 32
peu605 2:6c1fadae252f 33 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 34
peu605 2:6c1fadae252f 35 uint32_t cs_port_index = (uint32_t) cs >> 4;
peu605 2:6c1fadae252f 36 uint32_t dc_port_index = (uint32_t) dc >> 4;
peu605 2:6c1fadae252f 37
peu605 2:6c1fadae252f 38 //set cs/dc port addresses and masks
peu605 2:6c1fadae252f 39 cs_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (cs_port_index << 10));
peu605 2:6c1fadae252f 40 cs_reg_mask = 1 << ((uint32_t) cs & 0xf);
peu605 2:6c1fadae252f 41 dc_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (dc_port_index << 10));
peu605 2:6c1fadae252f 42 dc_reg_mask = 1 << ((uint32_t) dc & 0xf);
peu605 2:6c1fadae252f 43
peu605 2:6c1fadae252f 44 // set bit band addresses
peu605 2:6c1fadae252f 45 // GPIO_TypeDef *cs_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (cs_port_index << 10));
peu605 2:6c1fadae252f 46 // GPIO_TypeDef *dc_port_reg = (GPIO_TypeDef *) (GPIOA_BASE + (dc_port_index << 10));
peu605 2:6c1fadae252f 47 // uint8_t cs_port_bit = (uint32_t) cs & 0xf;
peu605 2:6c1fadae252f 48 // uint8_t dc_port_bit = (uint32_t) dc & 0xf;
peu605 2:6c1fadae252f 49 // bb_cs_port = BITBAND_PERIPH(&cs_port_reg->ODR, cs_port_bit);
peu605 2:6c1fadae252f 50 // bb_dc_port = BITBAND_PERIPH(&dc_port_reg->ODR, dc_port_bit);
peu605 2:6c1fadae252f 51
peu605 2:6c1fadae252f 52 bb_spi_txe = BITBAND_PERIPH(&spi_ptr->SR, MASK_TO_BITNUM(SPI_SR_TXE));
peu605 2:6c1fadae252f 53 bb_spi_bsy = BITBAND_PERIPH(&spi_ptr->SR, MASK_TO_BITNUM(SPI_SR_BSY));
peu605 2:6c1fadae252f 54 bb_spi_spe = BITBAND_PERIPH(&spi_ptr->CR1, MASK_TO_BITNUM(SPI_CR1_SPE));
peu605 2:6c1fadae252f 55 bb_spi_dff = BITBAND_PERIPH(&spi_ptr->CR1, MASK_TO_BITNUM(SPI_CR1_DFF));
peu605 0:f90a4405ef98 56
peu605 0:f90a4405ef98 57 #if defined(__F411RE_DMA__)
peu605 2:6c1fadae252f 58 // init DMA
peu605 0:f90a4405ef98 59 hdma.Init.Direction = DMA_MEMORY_TO_PERIPH;
peu605 0:f90a4405ef98 60 hdma.Init.PeriphInc = DMA_PINC_DISABLE;
peu605 0:f90a4405ef98 61 hdma.Init.MemInc = DMA_MINC_DISABLE;
peu605 0:f90a4405ef98 62 hdma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
peu605 0:f90a4405ef98 63 hdma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
peu605 0:f90a4405ef98 64 hdma.Init.Mode = DMA_NORMAL;
peu605 0:f90a4405ef98 65 hdma.Init.Priority = DMA_PRIORITY_MEDIUM;
peu605 0:f90a4405ef98 66 hdma.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
peu605 0:f90a4405ef98 67 hdma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
peu605 0:f90a4405ef98 68 hdma.Init.MemBurst = DMA_MBURST_SINGLE;
peu605 0:f90a4405ef98 69 hdma.Init.PeriphBurst = DMA_PBURST_SINGLE;
peu605 0:f90a4405ef98 70
peu605 0:f90a4405ef98 71 if(_spi.spi == SPI_1){
peu605 0:f90a4405ef98 72 hdma.Instance = DMA2_Stream3; // DMA2_Stream2
peu605 0:f90a4405ef98 73 hdma.Init.Channel = DMA_CHANNEL_3; // DMA_CHANNEL_2
peu605 0:f90a4405ef98 74 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 75 } else if(_spi.spi == SPI_2){
peu605 0:f90a4405ef98 76 hdma.Instance = DMA1_Stream4;
peu605 0:f90a4405ef98 77 hdma.Init.Channel = DMA_CHANNEL_0;
peu605 0:f90a4405ef98 78 __DMA1_CLK_ENABLE();
peu605 0:f90a4405ef98 79 } else if(_spi.spi == SPI_3){
peu605 0:f90a4405ef98 80 hdma.Instance = DMA1_Stream5; // DMA1_Stream7
peu605 0:f90a4405ef98 81 hdma.Init.Channel = DMA_CHANNEL_0; // DMA_CHANNEL0
peu605 0:f90a4405ef98 82 __DMA1_CLK_ENABLE();
peu605 0:f90a4405ef98 83 } else if(_spi.spi == SPI_4){
peu605 0:f90a4405ef98 84 hdma.Instance = DMA2_Stream1; // DMA2_Stream4
peu605 0:f90a4405ef98 85 hdma.Init.Channel = DMA_CHANNEL_4; // DMA_CHANNEL_5
peu605 0:f90a4405ef98 86 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 87 } else if(_spi.spi == SPI_5){
peu605 0:f90a4405ef98 88 hdma.Instance = DMA2_Stream4; // DMA2_Stream5, DMA2_Stream6
peu605 0:f90a4405ef98 89 hdma.Init.Channel = DMA_CHANNEL_2; // DMA_CHANNEL5, DMA_CHANNEL7
peu605 0:f90a4405ef98 90 __DMA2_CLK_ENABLE();
peu605 0:f90a4405ef98 91 }
peu605 0:f90a4405ef98 92
peu605 0:f90a4405ef98 93 HAL_DMA_Init(&hdma);
peu605 0:f90a4405ef98 94
peu605 0:f90a4405ef98 95 // set SPI DR ss Peripheral address
peu605 0:f90a4405ef98 96 hdma.Instance->PAR = (uint32_t) &spi_ptr->DR;
peu605 2:6c1fadae252f 97
peu605 2:6c1fadae252f 98 // set bit band addresses
peu605 2:6c1fadae252f 99 bb_spi_txdmaen = BITBAND_PERIPH(&spi_ptr->CR2, MASK_TO_BITNUM(SPI_CR2_TXDMAEN));
peu605 2:6c1fadae252f 100 bb_dma_sxcr_en = BITBAND_PERIPH(&hdma.Instance->CR, MASK_TO_BITNUM(DMA_SxCR_EN));
peu605 0:f90a4405ef98 101 #endif
peu605 2:6c1fadae252f 102 }
peu605 2:6c1fadae252f 103 inline void TFT_ILI9163C::selectSlave() {
peu605 2:6c1fadae252f 104 // _cs = 0; // Use DigitalOut
peu605 2:6c1fadae252f 105 // *bb_cs_port = 0; // Use bit band
peu605 2:6c1fadae252f 106 cs_port_reg->BSRRH = cs_reg_mask; // Use BSRR register
peu605 2:6c1fadae252f 107 }
peu605 2:6c1fadae252f 108 inline void TFT_ILI9163C::deselectSlave() {
peu605 2:6c1fadae252f 109 // _cs = 1;
peu605 2:6c1fadae252f 110 // *bb_cs_port = 1;
peu605 2:6c1fadae252f 111 cs_port_reg->BSRRL = cs_reg_mask;
peu605 2:6c1fadae252f 112 }
peu605 2:6c1fadae252f 113 inline void TFT_ILI9163C::setCommandMode() {
peu605 2:6c1fadae252f 114 // _dc = 0;
peu605 2:6c1fadae252f 115 // *bb_dc_port = 0;
peu605 2:6c1fadae252f 116 dc_port_reg->BSRRH = dc_reg_mask;
peu605 2:6c1fadae252f 117 }
peu605 2:6c1fadae252f 118 inline void TFT_ILI9163C::setDataMode() {
peu605 2:6c1fadae252f 119 // _dc = 1;
peu605 2:6c1fadae252f 120 // *bb_dc_port = 1;
peu605 2:6c1fadae252f 121 dc_port_reg->BSRRL = dc_reg_mask;
peu605 2:6c1fadae252f 122 }
peu605 2:6c1fadae252f 123 inline void TFT_ILI9163C::waitSpiFree() {
peu605 2:6c1fadae252f 124
peu605 2:6c1fadae252f 125 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 126 // while ((spi_ptr->SR & SPI_SR_TXE) == 0);
peu605 2:6c1fadae252f 127 // while ((spi_ptr->SR & SPI_SR_BSY) != 0);
peu605 2:6c1fadae252f 128
peu605 2:6c1fadae252f 129 while (*bb_spi_txe == 0);
peu605 2:6c1fadae252f 130 while (*bb_spi_bsy != 0);
peu605 2:6c1fadae252f 131 }
peu605 2:6c1fadae252f 132
peu605 2:6c1fadae252f 133 inline void TFT_ILI9163C::waitBufferFree() {
peu605 2:6c1fadae252f 134
peu605 2:6c1fadae252f 135 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 136 // while ((spi_ptr->SR & SPI_SR_TXE) == 0);
peu605 2:6c1fadae252f 137
peu605 2:6c1fadae252f 138 while (*bb_spi_txe == 0);
peu605 2:6c1fadae252f 139 }
peu605 2:6c1fadae252f 140
peu605 2:6c1fadae252f 141 inline void TFT_ILI9163C::set8bitMode() {
peu605 2:6c1fadae252f 142
peu605 2:6c1fadae252f 143 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 144 // spi_ptr->CR1 &= ~(SPI_CR1_SPE | SPI_CR1_DFF);
peu605 2:6c1fadae252f 145 // spi_ptr->CR1 |= SPI_CR1_SPE;
peu605 2:6c1fadae252f 146
peu605 2:6c1fadae252f 147 *bb_spi_spe = 0;
peu605 2:6c1fadae252f 148 *bb_spi_dff = 0;
peu605 2:6c1fadae252f 149 *bb_spi_spe = 1;
peu605 2:6c1fadae252f 150 }
peu605 2:6c1fadae252f 151
peu605 2:6c1fadae252f 152 inline void TFT_ILI9163C::set16bitMode() {
peu605 2:6c1fadae252f 153
peu605 2:6c1fadae252f 154 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 155 // spi_ptr->CR1 &= ~SPI_CR1_SPE;
peu605 2:6c1fadae252f 156 // spi_ptr->CR1 |= (SPI_CR1_SPE | SPI_CR1_DFF);
peu605 2:6c1fadae252f 157
peu605 2:6c1fadae252f 158 *bb_spi_spe = 0;
peu605 2:6c1fadae252f 159 *bb_spi_dff = 1;
peu605 2:6c1fadae252f 160 *bb_spi_spe = 1;
peu605 2:6c1fadae252f 161 }
peu605 2:6c1fadae252f 162
peu605 2:6c1fadae252f 163 void TFT_ILI9163C::writecommand(uint8_t c){
peu605 2:6c1fadae252f 164
peu605 2:6c1fadae252f 165 set8bitMode();
peu605 2:6c1fadae252f 166 setCommandMode();
peu605 2:6c1fadae252f 167 selectSlave();
peu605 2:6c1fadae252f 168
peu605 2:6c1fadae252f 169 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 170 spi_ptr->DR = c;
peu605 2:6c1fadae252f 171
peu605 2:6c1fadae252f 172 waitSpiFree();
peu605 2:6c1fadae252f 173 deselectSlave();
peu605 2:6c1fadae252f 174 }
peu605 2:6c1fadae252f 175
peu605 2:6c1fadae252f 176
peu605 2:6c1fadae252f 177 void TFT_ILI9163C::writedata(uint8_t c){
peu605 2:6c1fadae252f 178
peu605 2:6c1fadae252f 179 set8bitMode();
peu605 2:6c1fadae252f 180 setDataMode();
peu605 2:6c1fadae252f 181 selectSlave();
peu605 2:6c1fadae252f 182
peu605 2:6c1fadae252f 183 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 184 spi_ptr->DR = c;
peu605 2:6c1fadae252f 185
peu605 2:6c1fadae252f 186 waitSpiFree();
peu605 2:6c1fadae252f 187 deselectSlave();
peu605 2:6c1fadae252f 188 }
peu605 2:6c1fadae252f 189
peu605 2:6c1fadae252f 190
peu605 2:6c1fadae252f 191 void TFT_ILI9163C::writedata16(uint16_t d){
peu605 2:6c1fadae252f 192
peu605 2:6c1fadae252f 193 set16bitMode();
peu605 2:6c1fadae252f 194 setDataMode();
peu605 2:6c1fadae252f 195 selectSlave();
peu605 2:6c1fadae252f 196
peu605 2:6c1fadae252f 197 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 198 spi_ptr->DR = d;
peu605 2:6c1fadae252f 199
peu605 2:6c1fadae252f 200 waitSpiFree();
peu605 2:6c1fadae252f 201 deselectSlave();
peu605 2:6c1fadae252f 202 }
peu605 2:6c1fadae252f 203
peu605 2:6c1fadae252f 204
peu605 2:6c1fadae252f 205 void TFT_ILI9163C::writedata32(uint16_t d1, uint16_t d2){
peu605 2:6c1fadae252f 206
peu605 2:6c1fadae252f 207 set16bitMode();
peu605 2:6c1fadae252f 208 setDataMode();
peu605 2:6c1fadae252f 209 selectSlave();
peu605 2:6c1fadae252f 210
peu605 2:6c1fadae252f 211 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 212 spi_ptr->DR = d1;
peu605 2:6c1fadae252f 213 waitBufferFree();
peu605 2:6c1fadae252f 214 spi_ptr->DR = d2;
peu605 2:6c1fadae252f 215
peu605 2:6c1fadae252f 216 waitSpiFree();
peu605 2:6c1fadae252f 217 deselectSlave();
peu605 2:6c1fadae252f 218 }
peu605 2:6c1fadae252f 219
peu605 2:6c1fadae252f 220 #if defined(__F411RE_DMA__)
peu605 2:6c1fadae252f 221 // use DMA, but polling... :-(
peu605 2:6c1fadae252f 222 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 223
peu605 2:6c1fadae252f 224 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 225
peu605 2:6c1fadae252f 226 if (len > 0) {
peu605 2:6c1fadae252f 227 set16bitMode();
peu605 2:6c1fadae252f 228 setDataMode();
peu605 2:6c1fadae252f 229 selectSlave();
peu605 2:6c1fadae252f 230
peu605 2:6c1fadae252f 231 // clear DMA flags
peu605 2:6c1fadae252f 232 // __HAL_DMA_CLEAR_FLAG(&hdma, __HAL_DMA_GET_TE_FLAG_INDEX(&hdma));
peu605 2:6c1fadae252f 233 __HAL_DMA_CLEAR_FLAG(&hdma, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma));
peu605 2:6c1fadae252f 234
peu605 2:6c1fadae252f 235 hdma.Instance->M0AR = (uint32_t) &d;
peu605 2:6c1fadae252f 236 hdma.Instance->NDTR = len;
peu605 2:6c1fadae252f 237
peu605 2:6c1fadae252f 238 // // enable DMA
peu605 2:6c1fadae252f 239 // hdma.Instance->CR |= DMA_SxCR_EN;
peu605 2:6c1fadae252f 240 //
peu605 2:6c1fadae252f 241 // // enable DMA request from SPI
peu605 2:6c1fadae252f 242 // SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 243 // spi_ptr->CR2 |= SPI_CR2_TXDMAEN;
peu605 2:6c1fadae252f 244 //
peu605 2:6c1fadae252f 245 // // wait DMA complete
peu605 2:6c1fadae252f 246 // while (hdma.Instance->NDTR);
peu605 2:6c1fadae252f 247 //
peu605 2:6c1fadae252f 248 // // disable SPI-DMA
peu605 2:6c1fadae252f 249 // spi_ptr->CR2 &= ~SPI_CR2_TXDMAEN;
peu605 2:6c1fadae252f 250 //
peu605 2:6c1fadae252f 251 // // disable DMA
peu605 2:6c1fadae252f 252 // hdma.Instance->CR &= ~DMA_SxCR_EN;
peu605 2:6c1fadae252f 253 // while (hdma.Instance->CR & DMA_SxCR_EN);
peu605 2:6c1fadae252f 254
peu605 2:6c1fadae252f 255 // enable DMA
peu605 2:6c1fadae252f 256 *bb_dma_sxcr_en = 1;
peu605 2:6c1fadae252f 257
peu605 2:6c1fadae252f 258 // enable DMA request from SPI
peu605 2:6c1fadae252f 259 *bb_spi_txdmaen = 1;
peu605 2:6c1fadae252f 260
peu605 2:6c1fadae252f 261 // wait DMA complete
peu605 2:6c1fadae252f 262 while (hdma.Instance->NDTR);
peu605 2:6c1fadae252f 263
peu605 2:6c1fadae252f 264 // disable SPI-DMA
peu605 2:6c1fadae252f 265 *bb_spi_txdmaen = 0;
peu605 2:6c1fadae252f 266
peu605 2:6c1fadae252f 267 // disable DMA
peu605 2:6c1fadae252f 268 *bb_dma_sxcr_en = 0;
peu605 2:6c1fadae252f 269 while (*bb_dma_sxcr_en);
peu605 2:6c1fadae252f 270
peu605 2:6c1fadae252f 271 waitSpiFree();
peu605 2:6c1fadae252f 272 deselectSlave();
peu605 2:6c1fadae252f 273 }
peu605 2:6c1fadae252f 274 }
peu605 2:6c1fadae252f 275
peu605 2:6c1fadae252f 276 #else
peu605 2:6c1fadae252f 277 // use software loop, fast enough :-)
peu605 2:6c1fadae252f 278 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 279
peu605 2:6c1fadae252f 280 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 281
peu605 2:6c1fadae252f 282 if (len > 0) {
peu605 2:6c1fadae252f 283 set16bitMode();
peu605 2:6c1fadae252f 284 setDataMode();
peu605 2:6c1fadae252f 285 selectSlave();
peu605 2:6c1fadae252f 286
peu605 2:6c1fadae252f 287 SPI_TypeDef *spi_ptr = (SPI_TypeDef*) _spi.spi;
peu605 2:6c1fadae252f 288 while (len--) {
peu605 2:6c1fadae252f 289 waitBufferFree();
peu605 2:6c1fadae252f 290 spi_ptr->DR = d;
peu605 2:6c1fadae252f 291 }
peu605 2:6c1fadae252f 292
peu605 2:6c1fadae252f 293 waitSpiFree();
peu605 2:6c1fadae252f 294 deselectSlave();
peu605 2:6c1fadae252f 295 }
peu605 2:6c1fadae252f 296 }
peu605 1:c271e7e2e330 297 #endif
peu605 2:6c1fadae252f 298
peu605 2:6c1fadae252f 299 // mbed general
peu605 2:6c1fadae252f 300 #else
peu605 2:6c1fadae252f 301 void TFT_ILI9163C::init(PinName cs, PinName dc){
peu605 2:6c1fadae252f 302 // nothing here
peu605 2:6c1fadae252f 303 }
peu605 2:6c1fadae252f 304
peu605 2:6c1fadae252f 305 void TFT_ILI9163C::writecommand(uint8_t c){
peu605 2:6c1fadae252f 306
peu605 2:6c1fadae252f 307 _dc = 0;
peu605 2:6c1fadae252f 308 _cs = 0;
peu605 2:6c1fadae252f 309
peu605 2:6c1fadae252f 310 SPI::write(c);
peu605 2:6c1fadae252f 311
peu605 2:6c1fadae252f 312 _cs = 1;
peu605 2:6c1fadae252f 313 }
peu605 2:6c1fadae252f 314
peu605 2:6c1fadae252f 315
peu605 2:6c1fadae252f 316 void TFT_ILI9163C::writedata(uint8_t c){
peu605 2:6c1fadae252f 317
peu605 2:6c1fadae252f 318 _dc = 1;
peu605 2:6c1fadae252f 319 _cs = 0;
peu605 2:6c1fadae252f 320
peu605 2:6c1fadae252f 321 SPI::write(c);
peu605 2:6c1fadae252f 322
peu605 2:6c1fadae252f 323 _cs = 1;
peu605 2:6c1fadae252f 324 }
peu605 2:6c1fadae252f 325
peu605 2:6c1fadae252f 326
peu605 2:6c1fadae252f 327 void TFT_ILI9163C::writedata16(uint16_t d){
peu605 2:6c1fadae252f 328
peu605 2:6c1fadae252f 329 _dc = 1;
peu605 2:6c1fadae252f 330 _cs = 0;
peu605 2:6c1fadae252f 331
peu605 2:6c1fadae252f 332 SPI::write(d >> 8);
peu605 2:6c1fadae252f 333 SPI::write(d & 0xff);
peu605 2:6c1fadae252f 334
peu605 2:6c1fadae252f 335 _cs = 1;
peu605 2:6c1fadae252f 336 }
peu605 2:6c1fadae252f 337
peu605 2:6c1fadae252f 338
peu605 2:6c1fadae252f 339 void TFT_ILI9163C::writedata32(uint16_t d1, uint16_t d2){
peu605 2:6c1fadae252f 340
peu605 2:6c1fadae252f 341 _dc = 1;
peu605 2:6c1fadae252f 342 _cs = 0;
peu605 2:6c1fadae252f 343
peu605 2:6c1fadae252f 344 SPI::write(d1 >> 8);
peu605 2:6c1fadae252f 345 SPI::write(d1 & 0xff);
peu605 2:6c1fadae252f 346 SPI::write(d2 >> 8);
peu605 2:6c1fadae252f 347 SPI::write(d2 & 0xff);
peu605 2:6c1fadae252f 348
peu605 2:6c1fadae252f 349 _cs = 1;
peu605 2:6c1fadae252f 350 }
peu605 2:6c1fadae252f 351
peu605 2:6c1fadae252f 352
peu605 2:6c1fadae252f 353 void TFT_ILI9163C::writedata16burst(uint16_t d, int32_t len) {
peu605 2:6c1fadae252f 354
peu605 2:6c1fadae252f 355 len = len < 0 ? -len : len;
peu605 2:6c1fadae252f 356
peu605 2:6c1fadae252f 357 if (len > 0) {
peu605 2:6c1fadae252f 358
peu605 2:6c1fadae252f 359 _dc = 1;
peu605 2:6c1fadae252f 360 _cs = 0;
peu605 2:6c1fadae252f 361
peu605 2:6c1fadae252f 362 while (len--) {
peu605 2:6c1fadae252f 363 SPI::write(d >> 8);
peu605 2:6c1fadae252f 364 SPI::write(d & 0xff);
peu605 2:6c1fadae252f 365 }
peu605 2:6c1fadae252f 366
peu605 2:6c1fadae252f 367 _cs = 1;
peu605 2:6c1fadae252f 368 }
peu605 2:6c1fadae252f 369 }
peu605 2:6c1fadae252f 370 #endif
peu605 2:6c1fadae252f 371
peu605 2:6c1fadae252f 372
peu605 2:6c1fadae252f 373 void TFT_ILI9163C::setBitrate(uint32_t n){
peu605 2:6c1fadae252f 374 SPI::frequency(n);
peu605 2:6c1fadae252f 375 }
peu605 2:6c1fadae252f 376
peu605 2:6c1fadae252f 377
peu605 2:6c1fadae252f 378 void TFT_ILI9163C::begin(void) {
peu605 2:6c1fadae252f 379
peu605 2:6c1fadae252f 380 SPI::format(8,0); // 8 bit spi mode 0
peu605 2:6c1fadae252f 381 SPI::frequency(5000000L); // 5MHz
peu605 0:f90a4405ef98 382
peu605 0:f90a4405ef98 383 if (_resetPinName != NC) {
peu605 0:f90a4405ef98 384 DigitalOut _reset(_resetPinName);
peu605 0:f90a4405ef98 385 _reset = 1;
peu605 0:f90a4405ef98 386 wait_ms(1);
peu605 0:f90a4405ef98 387 _reset = 0;
peu605 0:f90a4405ef98 388 wait_ms(2);
peu605 0:f90a4405ef98 389 _reset = 1;
peu605 0:f90a4405ef98 390 wait_ms(120);
peu605 0:f90a4405ef98 391 }
peu605 0:f90a4405ef98 392
peu605 0:f90a4405ef98 393 /*
peu605 0:f90a4405ef98 394 7) MY: 1(bottom to top), 0(top to bottom) Row Address Order
peu605 0:f90a4405ef98 395 6) MX: 1(R to L), 0(L to R) Column Address Order
peu605 0:f90a4405ef98 396 5) MV: 1(Exchanged), 0(normal) Row/Column exchange
peu605 0:f90a4405ef98 397 4) ML: 1(bottom to top), 0(top to bottom) Vertical Refresh Order
peu605 0:f90a4405ef98 398 3) RGB: 1(BGR), 0(RGB) Color Space
peu605 0:f90a4405ef98 399 2) MH: 1(R to L), 0(L to R) Horizontal Refresh Order
peu605 0:f90a4405ef98 400 1)
peu605 0:f90a4405ef98 401 0)
peu605 0:f90a4405ef98 402
peu605 0:f90a4405ef98 403 MY, MX, MV, ML,RGB, MH, D1, D0
peu605 0:f90a4405ef98 404 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //normal
peu605 0:f90a4405ef98 405 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 //Y-Mirror
peu605 0:f90a4405ef98 406 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Mirror
peu605 0:f90a4405ef98 407 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 //X-Y-Mirror
peu605 0:f90a4405ef98 408 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange
peu605 0:f90a4405ef98 409 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 //X-Y Exchange, Y-Mirror
peu605 0:f90a4405ef98 410 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 //XY exchange
peu605 0:f90a4405ef98 411 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0
peu605 0:f90a4405ef98 412 */
peu605 0:f90a4405ef98 413 _Mactrl_Data = 0; // 0b00000000;
peu605 0:f90a4405ef98 414 _colorspaceData = __COLORSPC;//start with default data;
peu605 0:f90a4405ef98 415 chipInit();
peu605 0:f90a4405ef98 416 }
peu605 0:f90a4405ef98 417
peu605 0:f90a4405ef98 418
peu605 0:f90a4405ef98 419 void TFT_ILI9163C::chipInit() {
peu605 0:f90a4405ef98 420 writecommand(CMD_SWRESET);//software reset
peu605 0:f90a4405ef98 421 wait_ms(120);
peu605 0:f90a4405ef98 422 writecommand(CMD_SLPOUT);//exit sleep
peu605 0:f90a4405ef98 423 wait_ms(5);
peu605 0:f90a4405ef98 424 writecommand(CMD_PIXFMT);//Set Color Format 16bit
peu605 0:f90a4405ef98 425 writedata(0x05);
peu605 0:f90a4405ef98 426 wait_ms(5);
peu605 0:f90a4405ef98 427 writecommand(CMD_GAMMASET);//default gamma curve 3
peu605 0:f90a4405ef98 428 writedata(0x04);//0x04
peu605 0:f90a4405ef98 429 wait_ms(1);
peu605 0:f90a4405ef98 430 writecommand(CMD_GAMRSEL);//Enable Gamma adj
peu605 0:f90a4405ef98 431 writedata(0x01);
peu605 0:f90a4405ef98 432 wait_ms(1);
peu605 0:f90a4405ef98 433 writecommand(CMD_NORML);
peu605 0:f90a4405ef98 434
peu605 0:f90a4405ef98 435 writecommand(CMD_DFUNCTR);
peu605 0:f90a4405ef98 436 writedata(0xff); // writedata(0b11111111);//
peu605 0:f90a4405ef98 437 writedata(0x06); // writedata(0b00000110);//
peu605 0:f90a4405ef98 438
peu605 0:f90a4405ef98 439 writecommand(CMD_PGAMMAC);//Positive Gamma Correction Setting
peu605 0:f90a4405ef98 440 #if defined(__GAMMASET1)
peu605 0:f90a4405ef98 441 writedata(0x36);//p1
peu605 0:f90a4405ef98 442 writedata(0x29);//p2
peu605 0:f90a4405ef98 443 writedata(0x12);//p3
peu605 0:f90a4405ef98 444 writedata(0x22);//p4
peu605 0:f90a4405ef98 445 writedata(0x1C);//p5
peu605 0:f90a4405ef98 446 writedata(0x15);//p6
peu605 0:f90a4405ef98 447 writedata(0x42);//p7
peu605 0:f90a4405ef98 448 writedata(0xB7);//p8
peu605 0:f90a4405ef98 449 writedata(0x2F);//p9
peu605 0:f90a4405ef98 450 writedata(0x13);//p10
peu605 0:f90a4405ef98 451 writedata(0x12);//p11
peu605 0:f90a4405ef98 452 writedata(0x0A);//p12
peu605 0:f90a4405ef98 453 writedata(0x11);//p13
peu605 0:f90a4405ef98 454 writedata(0x0B);//p14
peu605 0:f90a4405ef98 455 writedata(0x06);//p15
peu605 0:f90a4405ef98 456 #else
peu605 0:f90a4405ef98 457 writedata(0x3F);//p1
peu605 0:f90a4405ef98 458 writedata(0x25);//p2
peu605 0:f90a4405ef98 459 writedata(0x1C);//p3
peu605 0:f90a4405ef98 460 writedata(0x1E);//p4
peu605 0:f90a4405ef98 461 writedata(0x20);//p5
peu605 0:f90a4405ef98 462 writedata(0x12);//p6
peu605 0:f90a4405ef98 463 writedata(0x2A);//p7
peu605 0:f90a4405ef98 464 writedata(0x90);//p8
peu605 0:f90a4405ef98 465 writedata(0x24);//p9
peu605 0:f90a4405ef98 466 writedata(0x11);//p10
peu605 0:f90a4405ef98 467 writedata(0x00);//p11
peu605 0:f90a4405ef98 468 writedata(0x00);//p12
peu605 0:f90a4405ef98 469 writedata(0x00);//p13
peu605 0:f90a4405ef98 470 writedata(0x00);//p14
peu605 0:f90a4405ef98 471 writedata(0x00);//p15
peu605 0:f90a4405ef98 472 #endif
peu605 0:f90a4405ef98 473
peu605 0:f90a4405ef98 474 writecommand(CMD_NGAMMAC);//Negative Gamma Correction Setting
peu605 0:f90a4405ef98 475 #if defined(__GAMMASET1)
peu605 0:f90a4405ef98 476 writedata(0x09);//p1
peu605 0:f90a4405ef98 477 writedata(0x16);//p2
peu605 0:f90a4405ef98 478 writedata(0x2D);//p3
peu605 0:f90a4405ef98 479 writedata(0x0D);//p4
peu605 0:f90a4405ef98 480 writedata(0x13);//p5
peu605 0:f90a4405ef98 481 writedata(0x15);//p6
peu605 0:f90a4405ef98 482 writedata(0x40);//p7
peu605 0:f90a4405ef98 483 writedata(0x48);//p8
peu605 0:f90a4405ef98 484 writedata(0x53);//p9
peu605 0:f90a4405ef98 485 writedata(0x0C);//p10
peu605 0:f90a4405ef98 486 writedata(0x1D);//p11
peu605 0:f90a4405ef98 487 writedata(0x25);//p12
peu605 0:f90a4405ef98 488 writedata(0x2E);//p13
peu605 0:f90a4405ef98 489 writedata(0x34);//p14
peu605 0:f90a4405ef98 490 writedata(0x39);//p15
peu605 0:f90a4405ef98 491 #else
peu605 0:f90a4405ef98 492 writedata(0x20);//p1
peu605 0:f90a4405ef98 493 writedata(0x20);//p2
peu605 0:f90a4405ef98 494 writedata(0x20);//p3
peu605 0:f90a4405ef98 495 writedata(0x20);//p4
peu605 0:f90a4405ef98 496 writedata(0x05);//p5
peu605 0:f90a4405ef98 497 writedata(0x15);//p6
peu605 0:f90a4405ef98 498 writedata(0x00);//p7
peu605 0:f90a4405ef98 499 writedata(0xA7);//p8
peu605 0:f90a4405ef98 500 writedata(0x3D);//p9
peu605 0:f90a4405ef98 501 writedata(0x18);//p10
peu605 0:f90a4405ef98 502 writedata(0x25);//p11
peu605 0:f90a4405ef98 503 writedata(0x2A);//p12
peu605 0:f90a4405ef98 504 writedata(0x2B);//p13
peu605 0:f90a4405ef98 505 writedata(0x2B);//p14
peu605 0:f90a4405ef98 506 writedata(0x3A);//p15
peu605 0:f90a4405ef98 507 #endif
peu605 0:f90a4405ef98 508
peu605 0:f90a4405ef98 509 writecommand(CMD_FRMCTR1);//Frame Rate Control (In normal mode/Full colors)
peu605 0:f90a4405ef98 510 writedata(0x08);//0x0C//0x08
peu605 0:f90a4405ef98 511 writedata(0x02);//0x14//0x08
peu605 0:f90a4405ef98 512 wait_ms(1);
peu605 0:f90a4405ef98 513 writecommand(CMD_DINVCTR);//display inversion
peu605 0:f90a4405ef98 514 writedata(0x07);
peu605 0:f90a4405ef98 515 wait_ms(1);
peu605 0:f90a4405ef98 516 writecommand(CMD_PWCTR1);//Set VRH1[4:0] & VC[2:0] for VCI1 & GVDD
peu605 0:f90a4405ef98 517 writedata(0x0A);//4.30 - 0x0A
peu605 0:f90a4405ef98 518 writedata(0x02);//0x05
peu605 0:f90a4405ef98 519 wait_ms(1);
peu605 0:f90a4405ef98 520 writecommand(CMD_PWCTR2);//Set BT[2:0] for AVDD & VCL & VGH & VGL
peu605 0:f90a4405ef98 521 writedata(0x02);
peu605 0:f90a4405ef98 522 wait_ms(1);
peu605 0:f90a4405ef98 523 writecommand(CMD_VCOMCTR1);//Set VMH[6:0] & VML[6:0] for VOMH & VCOML
peu605 0:f90a4405ef98 524 writedata(0x50);//0x50
peu605 0:f90a4405ef98 525 writedata(99);//0x5b
peu605 0:f90a4405ef98 526 wait_ms(1);
peu605 0:f90a4405ef98 527 writecommand(CMD_VCOMOFFS);
peu605 0:f90a4405ef98 528 writedata(0);//0x40
peu605 0:f90a4405ef98 529 wait_ms(1);
peu605 0:f90a4405ef98 530
peu605 0:f90a4405ef98 531 colorSpace(_colorspaceData);
peu605 0:f90a4405ef98 532 setRotation(0);
peu605 0:f90a4405ef98 533 wait_ms(1);
peu605 0:f90a4405ef98 534
peu605 0:f90a4405ef98 535 fillScreen(BLACK);
peu605 0:f90a4405ef98 536 writecommand(CMD_DISPON);//display ON
peu605 0:f90a4405ef98 537 }
peu605 0:f90a4405ef98 538
peu605 0:f90a4405ef98 539 /*
peu605 0:f90a4405ef98 540 Colorspace selection:
peu605 0:f90a4405ef98 541 0: RGB
peu605 0:f90a4405ef98 542 1: GBR
peu605 0:f90a4405ef98 543 */
peu605 0:f90a4405ef98 544 void TFT_ILI9163C::colorSpace(uint8_t cspace) {
peu605 0:f90a4405ef98 545 if (cspace < 1){
peu605 0:f90a4405ef98 546 _Mactrl_Data &= ~(1 << 3); // bitClear(_Mactrl_Data,3);
peu605 0:f90a4405ef98 547 } else {
peu605 0:f90a4405ef98 548 _Mactrl_Data |= 1 << 3; // bitSet(_Mactrl_Data,3);
peu605 0:f90a4405ef98 549 }
peu605 0:f90a4405ef98 550 }
peu605 0:f90a4405ef98 551
peu605 0:f90a4405ef98 552
peu605 0:f90a4405ef98 553 void TFT_ILI9163C::clearScreen(uint16_t color) {
peu605 0:f90a4405ef98 554 homeAddress();
peu605 0:f90a4405ef98 555 writedata16burst(color, _GRAMSIZE);
peu605 0:f90a4405ef98 556 }
peu605 0:f90a4405ef98 557
peu605 0:f90a4405ef98 558 void TFT_ILI9163C::homeAddress() {
peu605 0:f90a4405ef98 559 setAddrWindow(0x00,0x00,_GRAMWIDTH-1,_GRAMHEIGH-1);
peu605 0:f90a4405ef98 560 }
peu605 0:f90a4405ef98 561
peu605 0:f90a4405ef98 562
peu605 0:f90a4405ef98 563 void TFT_ILI9163C::setCursor(int16_t x, int16_t y) {
peu605 0:f90a4405ef98 564 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 565 setAddrWindow(0x00,0x00,x,y);
peu605 0:f90a4405ef98 566 cursor_x = x;
peu605 0:f90a4405ef98 567 cursor_y = y;
peu605 0:f90a4405ef98 568 }
peu605 0:f90a4405ef98 569
peu605 0:f90a4405ef98 570
peu605 0:f90a4405ef98 571 void TFT_ILI9163C::pushColor(uint16_t color) {
peu605 0:f90a4405ef98 572 writedata16(color);
peu605 0:f90a4405ef98 573 }
peu605 0:f90a4405ef98 574
peu605 0:f90a4405ef98 575
peu605 0:f90a4405ef98 576 void TFT_ILI9163C::drawPixel(int16_t x, int16_t y, uint16_t color) {
peu605 0:f90a4405ef98 577 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 578 if ((x < 0) || (y < 0)) return;
peu605 0:f90a4405ef98 579 setAddrWindow(x,y,x+1,y+1);
peu605 0:f90a4405ef98 580 writedata16(color);
peu605 0:f90a4405ef98 581 }
peu605 0:f90a4405ef98 582
peu605 0:f90a4405ef98 583
peu605 0:f90a4405ef98 584 void TFT_ILI9163C::drawFastVLine(int16_t x, int16_t y, int16_t h, uint16_t color) {
peu605 0:f90a4405ef98 585 // Rudimentary clipping
peu605 0:f90a4405ef98 586 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 587 if (((y + h) - 1) >= _height) h = _height-y;
peu605 0:f90a4405ef98 588
peu605 0:f90a4405ef98 589 setAddrWindow(x,y,x,(y+h)-1);
peu605 0:f90a4405ef98 590 writedata16burst(color, h);
peu605 0:f90a4405ef98 591 }
peu605 0:f90a4405ef98 592
peu605 0:f90a4405ef98 593 inline bool TFT_ILI9163C::boundaryCheck(int16_t x,int16_t y){
peu605 0:f90a4405ef98 594 if ((x >= _width) || (y >= _height)) return true;
peu605 0:f90a4405ef98 595 return false;
peu605 0:f90a4405ef98 596 }
peu605 0:f90a4405ef98 597
peu605 0:f90a4405ef98 598 void TFT_ILI9163C::drawFastHLine(int16_t x, int16_t y, int16_t w, uint16_t color) {
peu605 0:f90a4405ef98 599 // Rudimentary clipping
peu605 0:f90a4405ef98 600 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 601 if (((x+w) - 1) >= _width) w = _width-x;
peu605 0:f90a4405ef98 602
peu605 0:f90a4405ef98 603 setAddrWindow(x,y,(x+w)-1,y);
peu605 0:f90a4405ef98 604 writedata16burst(color, w);
peu605 0:f90a4405ef98 605 }
peu605 0:f90a4405ef98 606
peu605 0:f90a4405ef98 607 void TFT_ILI9163C::fillScreen(uint16_t color) {
peu605 0:f90a4405ef98 608 clearScreen(color);
peu605 0:f90a4405ef98 609 }
peu605 0:f90a4405ef98 610
peu605 0:f90a4405ef98 611 // fill a rectangle
peu605 0:f90a4405ef98 612 void TFT_ILI9163C::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color) {
peu605 0:f90a4405ef98 613
peu605 0:f90a4405ef98 614 if (boundaryCheck(x,y)) return;
peu605 0:f90a4405ef98 615 if (((x + w) - 1) >= _width) w = _width - x;
peu605 0:f90a4405ef98 616 if (((y + h) - 1) >= _height) h = _height - y;
peu605 0:f90a4405ef98 617
peu605 0:f90a4405ef98 618 setAddrWindow(x,y,(x+w)-1,(y+h)-1);
peu605 0:f90a4405ef98 619 writedata16burst(color, w * h);
peu605 0:f90a4405ef98 620 }
peu605 0:f90a4405ef98 621
peu605 0:f90a4405ef98 622
peu605 0:f90a4405ef98 623 // Pass 8-bit (each) R,G,B, get back 16-bit packed color
peu605 0:f90a4405ef98 624
peu605 0:f90a4405ef98 625 uint16_t TFT_ILI9163C::Color565(uint8_t r, uint8_t g, uint8_t b) {
peu605 0:f90a4405ef98 626 return ((r & 0xF8) << 8) | ((g & 0xFC) << 3) | (b >> 3);
peu605 0:f90a4405ef98 627 }
peu605 0:f90a4405ef98 628
peu605 0:f90a4405ef98 629
peu605 0:f90a4405ef98 630 void TFT_ILI9163C::setAddrWindow(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) {
peu605 0:f90a4405ef98 631
peu605 0:f90a4405ef98 632 writecommand(CMD_CLMADRS); // Column
peu605 0:f90a4405ef98 633
peu605 0:f90a4405ef98 634 if (rotation == 1) {
peu605 0:f90a4405ef98 635 writedata32(x0 + __OFFSET, x1 + __OFFSET);
peu605 0:f90a4405ef98 636 } else {
peu605 0:f90a4405ef98 637 writedata32(x0, x1);
peu605 0:f90a4405ef98 638 }
peu605 0:f90a4405ef98 639
peu605 0:f90a4405ef98 640 writecommand(CMD_PGEADRS); // Page
peu605 0:f90a4405ef98 641 if (rotation == 0){
peu605 0:f90a4405ef98 642 writedata32(y0 + __OFFSET, y1 + __OFFSET);
peu605 0:f90a4405ef98 643 } else {
peu605 0:f90a4405ef98 644 writedata32(y0, y1);
peu605 0:f90a4405ef98 645 }
peu605 0:f90a4405ef98 646
peu605 0:f90a4405ef98 647 writecommand(CMD_RAMWR); //Into RAM
peu605 0:f90a4405ef98 648 }
peu605 0:f90a4405ef98 649
peu605 0:f90a4405ef98 650
peu605 0:f90a4405ef98 651 void TFT_ILI9163C::setRotation(uint8_t m) {
peu605 0:f90a4405ef98 652 rotation = m &3; // can't be higher than 3
peu605 0:f90a4405ef98 653 switch (rotation) {
peu605 0:f90a4405ef98 654 case 0:
peu605 0:f90a4405ef98 655 _Mactrl_Data = 0x08; // 0b00001000;
peu605 0:f90a4405ef98 656 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 657 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 658 break;
peu605 0:f90a4405ef98 659 case 1:
peu605 0:f90a4405ef98 660 _Mactrl_Data = 0x68; // 0b01101000;
peu605 0:f90a4405ef98 661 _width = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 662 _height = _TFTWIDTH;
peu605 0:f90a4405ef98 663 break;
peu605 0:f90a4405ef98 664 case 2:
peu605 0:f90a4405ef98 665 _Mactrl_Data = 0xC8; // 0b11001000;
peu605 0:f90a4405ef98 666 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 667 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 668 break;
peu605 0:f90a4405ef98 669 case 3:
peu605 0:f90a4405ef98 670 _Mactrl_Data = 0xA8; // 0b10101000;
peu605 0:f90a4405ef98 671 _width = _TFTWIDTH;
peu605 0:f90a4405ef98 672 _height = _TFTHEIGHT;//-__OFFSET;
peu605 0:f90a4405ef98 673 break;
peu605 0:f90a4405ef98 674 }
peu605 0:f90a4405ef98 675 colorSpace(_colorspaceData);
peu605 0:f90a4405ef98 676 writecommand(CMD_MADCTL);
peu605 0:f90a4405ef98 677 writedata(_Mactrl_Data);
peu605 0:f90a4405ef98 678 }
peu605 0:f90a4405ef98 679
peu605 0:f90a4405ef98 680
peu605 0:f90a4405ef98 681 void TFT_ILI9163C::invertDisplay(bool i) {
peu605 0:f90a4405ef98 682 writecommand(i ? CMD_DINVON : CMD_DINVOF);
peu605 0:f90a4405ef98 683 }