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targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0P/utils/cmsis/TARGET_SAMD21/include/samd21g17a.h@15:a81a8d6c1dfe, 2015-11-04 (annotated)

Committer:
mbed_official
Date:
Wed Nov 04 16:30:11 2015 +0000
Revision:
15:a81a8d6c1dfe
Synchronized with git revision 46af745ef4405614c3fa49abbd9a706a362ea514



Full URL: https://github.com/mbedmicro/mbed/commit/46af745ef4405614c3fa49abbd9a706a362ea514/



Renamed TARGET_SAM_CortexM0+ to TARGET_SAM_CortexM0P for compatiblity with online compiler

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 15:a81a8d6c1dfe 1 /**
mbed_official 15:a81a8d6c1dfe 2 * \file
mbed_official 15:a81a8d6c1dfe 3 *
mbed_official 15:a81a8d6c1dfe 4 * \brief Header file for SAMD21G17A
mbed_official 15:a81a8d6c1dfe 5 *
mbed_official 15:a81a8d6c1dfe 6 * Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
mbed_official 15:a81a8d6c1dfe 7 *
mbed_official 15:a81a8d6c1dfe 8 * \asf_license_start
mbed_official 15:a81a8d6c1dfe 9 *
mbed_official 15:a81a8d6c1dfe 10 * \page License
mbed_official 15:a81a8d6c1dfe 11 *
mbed_official 15:a81a8d6c1dfe 12 * Redistribution and use in source and binary forms, with or without
mbed_official 15:a81a8d6c1dfe 13 * modification, are permitted provided that the following conditions are met:
mbed_official 15:a81a8d6c1dfe 14 *
mbed_official 15:a81a8d6c1dfe 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 15:a81a8d6c1dfe 16 * this list of conditions and the following disclaimer.
mbed_official 15:a81a8d6c1dfe 17 *
mbed_official 15:a81a8d6c1dfe 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 15:a81a8d6c1dfe 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 15:a81a8d6c1dfe 20 * and/or other materials provided with the distribution.
mbed_official 15:a81a8d6c1dfe 21 *
mbed_official 15:a81a8d6c1dfe 22 * 3. The name of Atmel may not be used to endorse or promote products derived
mbed_official 15:a81a8d6c1dfe 23 * from this software without specific prior written permission.
mbed_official 15:a81a8d6c1dfe 24 *
mbed_official 15:a81a8d6c1dfe 25 * 4. This software may only be redistributed and used in connection with an
mbed_official 15:a81a8d6c1dfe 26 * Atmel microcontroller product.
mbed_official 15:a81a8d6c1dfe 27 *
mbed_official 15:a81a8d6c1dfe 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
mbed_official 15:a81a8d6c1dfe 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
mbed_official 15:a81a8d6c1dfe 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
mbed_official 15:a81a8d6c1dfe 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
mbed_official 15:a81a8d6c1dfe 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 15:a81a8d6c1dfe 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
mbed_official 15:a81a8d6c1dfe 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
mbed_official 15:a81a8d6c1dfe 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
mbed_official 15:a81a8d6c1dfe 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 15:a81a8d6c1dfe 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 15:a81a8d6c1dfe 38 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 15:a81a8d6c1dfe 39 *
mbed_official 15:a81a8d6c1dfe 40 * \asf_license_stop
mbed_official 15:a81a8d6c1dfe 41 *
mbed_official 15:a81a8d6c1dfe 42 */
mbed_official 15:a81a8d6c1dfe 43 /*
mbed_official 15:a81a8d6c1dfe 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
mbed_official 15:a81a8d6c1dfe 45 */
mbed_official 15:a81a8d6c1dfe 46
mbed_official 15:a81a8d6c1dfe 47 #ifndef _SAMD21G17A_
mbed_official 15:a81a8d6c1dfe 48 #define _SAMD21G17A_
mbed_official 15:a81a8d6c1dfe 49
mbed_official 15:a81a8d6c1dfe 50 /**
mbed_official 15:a81a8d6c1dfe 51 * \ingroup SAMD21_definitions
mbed_official 15:a81a8d6c1dfe 52 * \addtogroup SAMD21G17A_definitions SAMD21G17A definitions
mbed_official 15:a81a8d6c1dfe 53 * This file defines all structures and symbols for SAMD21G17A:
mbed_official 15:a81a8d6c1dfe 54 * - registers and bitfields
mbed_official 15:a81a8d6c1dfe 55 * - peripheral base address
mbed_official 15:a81a8d6c1dfe 56 * - peripheral ID
mbed_official 15:a81a8d6c1dfe 57 * - PIO definitions
mbed_official 15:a81a8d6c1dfe 58 */
mbed_official 15:a81a8d6c1dfe 59 /*@{*/
mbed_official 15:a81a8d6c1dfe 60
mbed_official 15:a81a8d6c1dfe 61 #ifdef __cplusplus
mbed_official 15:a81a8d6c1dfe 62 extern "C" {
mbed_official 15:a81a8d6c1dfe 63 #endif
mbed_official 15:a81a8d6c1dfe 64
mbed_official 15:a81a8d6c1dfe 65 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 15:a81a8d6c1dfe 66 #include <stdint.h>
mbed_official 15:a81a8d6c1dfe 67 #ifndef __cplusplus
mbed_official 15:a81a8d6c1dfe 68 typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 69 typedef volatile const uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 70 typedef volatile const uint8_t RoReg8; /**< Read only 8-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 71 #else
mbed_official 15:a81a8d6c1dfe 72 typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 73 typedef volatile uint16_t RoReg16; /**< Read only 16-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 74 typedef volatile uint8_t RoReg8; /**< Read only 8-bit register (volatile const unsigned int) */
mbed_official 15:a81a8d6c1dfe 75 #endif
mbed_official 15:a81a8d6c1dfe 76 typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 77 typedef volatile uint16_t WoReg16; /**< Write only 16-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 78 typedef volatile uint32_t WoReg8; /**< Write only 8-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 79 typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 80 typedef volatile uint16_t RwReg16; /**< Read-Write 16-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 81 typedef volatile uint8_t RwReg8; /**< Read-Write 8-bit register (volatile unsigned int) */
mbed_official 15:a81a8d6c1dfe 82 #define CAST(type, value) ((type *)(value))
mbed_official 15:a81a8d6c1dfe 83 #define REG_ACCESS(type, address) (*(type*)(address)) /**< C code: Register value */
mbed_official 15:a81a8d6c1dfe 84 #else
mbed_official 15:a81a8d6c1dfe 85 #define CAST(type, value) (value)
mbed_official 15:a81a8d6c1dfe 86 #define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */
mbed_official 15:a81a8d6c1dfe 87 #endif
mbed_official 15:a81a8d6c1dfe 88
mbed_official 15:a81a8d6c1dfe 89 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 90 /** CMSIS DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 91 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 92 /** \defgroup SAMD21G17A_cmsis CMSIS Definitions */
mbed_official 15:a81a8d6c1dfe 93 /*@{*/
mbed_official 15:a81a8d6c1dfe 94
mbed_official 15:a81a8d6c1dfe 95 /** Interrupt Number Definition */
mbed_official 15:a81a8d6c1dfe 96 typedef enum IRQn {
mbed_official 15:a81a8d6c1dfe 97 /****** Cortex-M0+ Processor Exceptions Numbers ******************************/
mbed_official 15:a81a8d6c1dfe 98 NonMaskableInt_IRQn = -14,/**< 2 Non Maskable Interrupt */
mbed_official 15:a81a8d6c1dfe 99 HardFault_IRQn = -13,/**< 3 Cortex-M0+ Hard Fault Interrupt */
mbed_official 15:a81a8d6c1dfe 100 SVCall_IRQn = -5, /**< 11 Cortex-M0+ SV Call Interrupt */
mbed_official 15:a81a8d6c1dfe 101 PendSV_IRQn = -2, /**< 14 Cortex-M0+ Pend SV Interrupt */
mbed_official 15:a81a8d6c1dfe 102 SysTick_IRQn = -1, /**< 15 Cortex-M0+ System Tick Interrupt */
mbed_official 15:a81a8d6c1dfe 103 /****** SAMD21G17A-specific Interrupt Numbers ***********************/
mbed_official 15:a81a8d6c1dfe 104 PM_IRQn = 0, /**< 0 SAMD21G17A Power Manager (PM) */
mbed_official 15:a81a8d6c1dfe 105 SYSCTRL_IRQn = 1, /**< 1 SAMD21G17A System Control (SYSCTRL) */
mbed_official 15:a81a8d6c1dfe 106 WDT_IRQn = 2, /**< 2 SAMD21G17A Watchdog Timer (WDT) */
mbed_official 15:a81a8d6c1dfe 107 RTC_IRQn = 3, /**< 3 SAMD21G17A Real-Time Counter (RTC) */
mbed_official 15:a81a8d6c1dfe 108 EIC_IRQn = 4, /**< 4 SAMD21G17A External Interrupt Controller (EIC) */
mbed_official 15:a81a8d6c1dfe 109 NVMCTRL_IRQn = 5, /**< 5 SAMD21G17A Non-Volatile Memory Controller (NVMCTRL) */
mbed_official 15:a81a8d6c1dfe 110 DMAC_IRQn = 6, /**< 6 SAMD21G17A Direct Memory Access Controller (DMAC) */
mbed_official 15:a81a8d6c1dfe 111 USB_IRQn = 7, /**< 7 SAMD21G17A Universal Serial Bus (USB) */
mbed_official 15:a81a8d6c1dfe 112 EVSYS_IRQn = 8, /**< 8 SAMD21G17A Event System Interface (EVSYS) */
mbed_official 15:a81a8d6c1dfe 113 SERCOM0_IRQn = 9, /**< 9 SAMD21G17A Serial Communication Interface 0 (SERCOM0) */
mbed_official 15:a81a8d6c1dfe 114 SERCOM1_IRQn = 10, /**< 10 SAMD21G17A Serial Communication Interface 1 (SERCOM1) */
mbed_official 15:a81a8d6c1dfe 115 SERCOM2_IRQn = 11, /**< 11 SAMD21G17A Serial Communication Interface 2 (SERCOM2) */
mbed_official 15:a81a8d6c1dfe 116 SERCOM3_IRQn = 12, /**< 12 SAMD21G17A Serial Communication Interface 3 (SERCOM3) */
mbed_official 15:a81a8d6c1dfe 117 SERCOM4_IRQn = 13, /**< 13 SAMD21G17A Serial Communication Interface 4 (SERCOM4) */
mbed_official 15:a81a8d6c1dfe 118 SERCOM5_IRQn = 14, /**< 14 SAMD21G17A Serial Communication Interface 5 (SERCOM5) */
mbed_official 15:a81a8d6c1dfe 119 TCC0_IRQn = 15, /**< 15 SAMD21G17A Timer Counter Control 0 (TCC0) */
mbed_official 15:a81a8d6c1dfe 120 TCC1_IRQn = 16, /**< 16 SAMD21G17A Timer Counter Control 1 (TCC1) */
mbed_official 15:a81a8d6c1dfe 121 TCC2_IRQn = 17, /**< 17 SAMD21G17A Timer Counter Control 2 (TCC2) */
mbed_official 15:a81a8d6c1dfe 122 TC3_IRQn = 18, /**< 18 SAMD21G17A Basic Timer Counter 3 (TC3) */
mbed_official 15:a81a8d6c1dfe 123 TC4_IRQn = 19, /**< 19 SAMD21G17A Basic Timer Counter 4 (TC4) */
mbed_official 15:a81a8d6c1dfe 124 TC5_IRQn = 20, /**< 20 SAMD21G17A Basic Timer Counter 5 (TC5) */
mbed_official 15:a81a8d6c1dfe 125 ADC_IRQn = 23, /**< 23 SAMD21G17A Analog Digital Converter (ADC) */
mbed_official 15:a81a8d6c1dfe 126 AC_IRQn = 24, /**< 24 SAMD21G17A Analog Comparators (AC) */
mbed_official 15:a81a8d6c1dfe 127 DAC_IRQn = 25, /**< 25 SAMD21G17A Digital Analog Converter (DAC) */
mbed_official 15:a81a8d6c1dfe 128 PTC_IRQn = 26, /**< 26 SAMD21G17A Peripheral Touch Controller (PTC) */
mbed_official 15:a81a8d6c1dfe 129 I2S_IRQn = 27, /**< 27 SAMD21G17A Inter-IC Sound Interface (I2S) */
mbed_official 15:a81a8d6c1dfe 130
mbed_official 15:a81a8d6c1dfe 131 PERIPH_COUNT_IRQn = 28 /**< Number of peripheral IDs */
mbed_official 15:a81a8d6c1dfe 132 } IRQn_Type;
mbed_official 15:a81a8d6c1dfe 133
mbed_official 15:a81a8d6c1dfe 134 typedef struct _DeviceVectors {
mbed_official 15:a81a8d6c1dfe 135 /* Stack pointer */
mbed_official 15:a81a8d6c1dfe 136 void* pvStack;
mbed_official 15:a81a8d6c1dfe 137
mbed_official 15:a81a8d6c1dfe 138 /* Cortex-M handlers */
mbed_official 15:a81a8d6c1dfe 139 void* pfnReset_Handler;
mbed_official 15:a81a8d6c1dfe 140 void* pfnNMI_Handler;
mbed_official 15:a81a8d6c1dfe 141 void* pfnHardFault_Handler;
mbed_official 15:a81a8d6c1dfe 142 void* pfnReservedM12;
mbed_official 15:a81a8d6c1dfe 143 void* pfnReservedM11;
mbed_official 15:a81a8d6c1dfe 144 void* pfnReservedM10;
mbed_official 15:a81a8d6c1dfe 145 void* pfnReservedM9;
mbed_official 15:a81a8d6c1dfe 146 void* pfnReservedM8;
mbed_official 15:a81a8d6c1dfe 147 void* pfnReservedM7;
mbed_official 15:a81a8d6c1dfe 148 void* pfnReservedM6;
mbed_official 15:a81a8d6c1dfe 149 void* pfnSVC_Handler;
mbed_official 15:a81a8d6c1dfe 150 void* pfnReservedM4;
mbed_official 15:a81a8d6c1dfe 151 void* pfnReservedM3;
mbed_official 15:a81a8d6c1dfe 152 void* pfnPendSV_Handler;
mbed_official 15:a81a8d6c1dfe 153 void* pfnSysTick_Handler;
mbed_official 15:a81a8d6c1dfe 154
mbed_official 15:a81a8d6c1dfe 155 /* Peripheral handlers */
mbed_official 15:a81a8d6c1dfe 156 void* pfnPM_Handler; /* 0 Power Manager */
mbed_official 15:a81a8d6c1dfe 157 void* pfnSYSCTRL_Handler; /* 1 System Control */
mbed_official 15:a81a8d6c1dfe 158 void* pfnWDT_Handler; /* 2 Watchdog Timer */
mbed_official 15:a81a8d6c1dfe 159 void* pfnRTC_Handler; /* 3 Real-Time Counter */
mbed_official 15:a81a8d6c1dfe 160 void* pfnEIC_Handler; /* 4 External Interrupt Controller */
mbed_official 15:a81a8d6c1dfe 161 void* pfnNVMCTRL_Handler; /* 5 Non-Volatile Memory Controller */
mbed_official 15:a81a8d6c1dfe 162 void* pfnDMAC_Handler; /* 6 Direct Memory Access Controller */
mbed_official 15:a81a8d6c1dfe 163 void* pfnUSB_Handler; /* 7 Universal Serial Bus */
mbed_official 15:a81a8d6c1dfe 164 void* pfnEVSYS_Handler; /* 8 Event System Interface */
mbed_official 15:a81a8d6c1dfe 165 void* pfnSERCOM0_Handler; /* 9 Serial Communication Interface 0 */
mbed_official 15:a81a8d6c1dfe 166 void* pfnSERCOM1_Handler; /* 10 Serial Communication Interface 1 */
mbed_official 15:a81a8d6c1dfe 167 void* pfnSERCOM2_Handler; /* 11 Serial Communication Interface 2 */
mbed_official 15:a81a8d6c1dfe 168 void* pfnSERCOM3_Handler; /* 12 Serial Communication Interface 3 */
mbed_official 15:a81a8d6c1dfe 169 void* pfnSERCOM4_Handler; /* 13 Serial Communication Interface 4 */
mbed_official 15:a81a8d6c1dfe 170 void* pfnSERCOM5_Handler; /* 14 Serial Communication Interface 5 */
mbed_official 15:a81a8d6c1dfe 171 void* pfnTCC0_Handler; /* 15 Timer Counter Control 0 */
mbed_official 15:a81a8d6c1dfe 172 void* pfnTCC1_Handler; /* 16 Timer Counter Control 1 */
mbed_official 15:a81a8d6c1dfe 173 void* pfnTCC2_Handler; /* 17 Timer Counter Control 2 */
mbed_official 15:a81a8d6c1dfe 174 void* pfnTC3_Handler; /* 18 Basic Timer Counter 3 */
mbed_official 15:a81a8d6c1dfe 175 void* pfnTC4_Handler; /* 19 Basic Timer Counter 4 */
mbed_official 15:a81a8d6c1dfe 176 void* pfnTC5_Handler; /* 20 Basic Timer Counter 5 */
mbed_official 15:a81a8d6c1dfe 177 void* pfnReserved21;
mbed_official 15:a81a8d6c1dfe 178 void* pfnReserved22;
mbed_official 15:a81a8d6c1dfe 179 void* pfnADC_Handler; /* 23 Analog Digital Converter */
mbed_official 15:a81a8d6c1dfe 180 void* pfnAC_Handler; /* 24 Analog Comparators */
mbed_official 15:a81a8d6c1dfe 181 void* pfnDAC_Handler; /* 25 Digital Analog Converter */
mbed_official 15:a81a8d6c1dfe 182 void* pfnPTC_Handler; /* 26 Peripheral Touch Controller */
mbed_official 15:a81a8d6c1dfe 183 void* pfnI2S_Handler; /* 27 Inter-IC Sound Interface */
mbed_official 15:a81a8d6c1dfe 184 } DeviceVectors;
mbed_official 15:a81a8d6c1dfe 185
mbed_official 15:a81a8d6c1dfe 186 /* Cortex-M0+ processor handlers */
mbed_official 15:a81a8d6c1dfe 187 void Reset_Handler ( void );
mbed_official 15:a81a8d6c1dfe 188 void NMI_Handler ( void );
mbed_official 15:a81a8d6c1dfe 189 void HardFault_Handler ( void );
mbed_official 15:a81a8d6c1dfe 190 void SVC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 191 void PendSV_Handler ( void );
mbed_official 15:a81a8d6c1dfe 192 void SysTick_Handler ( void );
mbed_official 15:a81a8d6c1dfe 193
mbed_official 15:a81a8d6c1dfe 194 /* Peripherals handlers */
mbed_official 15:a81a8d6c1dfe 195 void PM_Handler ( void );
mbed_official 15:a81a8d6c1dfe 196 void SYSCTRL_Handler ( void );
mbed_official 15:a81a8d6c1dfe 197 void WDT_Handler ( void );
mbed_official 15:a81a8d6c1dfe 198 void RTC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 199 void EIC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 200 void NVMCTRL_Handler ( void );
mbed_official 15:a81a8d6c1dfe 201 void DMAC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 202 void USB_Handler ( void );
mbed_official 15:a81a8d6c1dfe 203 void EVSYS_Handler ( void );
mbed_official 15:a81a8d6c1dfe 204 void SERCOM0_Handler ( void );
mbed_official 15:a81a8d6c1dfe 205 void SERCOM1_Handler ( void );
mbed_official 15:a81a8d6c1dfe 206 void SERCOM2_Handler ( void );
mbed_official 15:a81a8d6c1dfe 207 void SERCOM3_Handler ( void );
mbed_official 15:a81a8d6c1dfe 208 void SERCOM4_Handler ( void );
mbed_official 15:a81a8d6c1dfe 209 void SERCOM5_Handler ( void );
mbed_official 15:a81a8d6c1dfe 210 void TCC0_Handler ( void );
mbed_official 15:a81a8d6c1dfe 211 void TCC1_Handler ( void );
mbed_official 15:a81a8d6c1dfe 212 void TCC2_Handler ( void );
mbed_official 15:a81a8d6c1dfe 213 void TC3_Handler ( void );
mbed_official 15:a81a8d6c1dfe 214 void TC4_Handler ( void );
mbed_official 15:a81a8d6c1dfe 215 void TC5_Handler ( void );
mbed_official 15:a81a8d6c1dfe 216 void ADC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 217 void AC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 218 void DAC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 219 void PTC_Handler ( void );
mbed_official 15:a81a8d6c1dfe 220 void I2S_Handler ( void );
mbed_official 15:a81a8d6c1dfe 221
mbed_official 15:a81a8d6c1dfe 222 /*
mbed_official 15:a81a8d6c1dfe 223 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
mbed_official 15:a81a8d6c1dfe 224 */
mbed_official 15:a81a8d6c1dfe 225
mbed_official 15:a81a8d6c1dfe 226 #define LITTLE_ENDIAN 1
mbed_official 15:a81a8d6c1dfe 227 #define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
mbed_official 15:a81a8d6c1dfe 228 #define __MPU_PRESENT 0 /*!< MPU present or not */
mbed_official 15:a81a8d6c1dfe 229 #define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */
mbed_official 15:a81a8d6c1dfe 230 #define __VTOR_PRESENT 1 /*!< VTOR present or not */
mbed_official 15:a81a8d6c1dfe 231 #define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
mbed_official 15:a81a8d6c1dfe 232
mbed_official 15:a81a8d6c1dfe 233 /**
mbed_official 15:a81a8d6c1dfe 234 * \brief CMSIS includes
mbed_official 15:a81a8d6c1dfe 235 */
mbed_official 15:a81a8d6c1dfe 236
mbed_official 15:a81a8d6c1dfe 237 #include <core_cm0plus.h>
mbed_official 15:a81a8d6c1dfe 238 #if !defined DONT_USE_CMSIS_INIT
mbed_official 15:a81a8d6c1dfe 239 #include "system_samd21.h"
mbed_official 15:a81a8d6c1dfe 240 #endif /* DONT_USE_CMSIS_INIT */
mbed_official 15:a81a8d6c1dfe 241
mbed_official 15:a81a8d6c1dfe 242 /*@}*/
mbed_official 15:a81a8d6c1dfe 243
mbed_official 15:a81a8d6c1dfe 244 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 245 /** SOFTWARE PERIPHERAL API DEFINITION FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 246 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 247 /** \defgroup SAMD21G17A_api Peripheral Software API */
mbed_official 15:a81a8d6c1dfe 248 /*@{*/
mbed_official 15:a81a8d6c1dfe 249
mbed_official 15:a81a8d6c1dfe 250 #include "comp_ac.h"
mbed_official 15:a81a8d6c1dfe 251 #include "comp_adc.h"
mbed_official 15:a81a8d6c1dfe 252 #include "comp_dac.h"
mbed_official 15:a81a8d6c1dfe 253 #include "comp_dmac.h"
mbed_official 15:a81a8d6c1dfe 254 #include "comp_dsu.h"
mbed_official 15:a81a8d6c1dfe 255 #include "comp_eic.h"
mbed_official 15:a81a8d6c1dfe 256 #include "comp_evsys.h"
mbed_official 15:a81a8d6c1dfe 257 #include "comp_gclk.h"
mbed_official 15:a81a8d6c1dfe 258 #include "comp_hmatrixb.h"
mbed_official 15:a81a8d6c1dfe 259 #include "comp_i2s.h"
mbed_official 15:a81a8d6c1dfe 260 #include "comp_mtb.h"
mbed_official 15:a81a8d6c1dfe 261 #include "comp_nvmctrl.h"
mbed_official 15:a81a8d6c1dfe 262 #include "comp_pac.h"
mbed_official 15:a81a8d6c1dfe 263 #include "comp_pm.h"
mbed_official 15:a81a8d6c1dfe 264 #include "comp_port.h"
mbed_official 15:a81a8d6c1dfe 265 #include "comp_rtc.h"
mbed_official 15:a81a8d6c1dfe 266 #include "comp_sercom.h"
mbed_official 15:a81a8d6c1dfe 267 #include "comp_sysctrl.h"
mbed_official 15:a81a8d6c1dfe 268 #include "comp_tc.h"
mbed_official 15:a81a8d6c1dfe 269 #include "comp_tcc.h"
mbed_official 15:a81a8d6c1dfe 270 #include "comp_usb.h"
mbed_official 15:a81a8d6c1dfe 271 #include "comp_wdt.h"
mbed_official 15:a81a8d6c1dfe 272 /*@}*/
mbed_official 15:a81a8d6c1dfe 273
mbed_official 15:a81a8d6c1dfe 274 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 275 /** REGISTERS ACCESS DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 276 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 277 /** \defgroup SAMD21G17A_reg Registers Access Definitions */
mbed_official 15:a81a8d6c1dfe 278 /*@{*/
mbed_official 15:a81a8d6c1dfe 279
mbed_official 15:a81a8d6c1dfe 280 #include "ins_ac.h"
mbed_official 15:a81a8d6c1dfe 281 #include "ins_adc.h"
mbed_official 15:a81a8d6c1dfe 282 #include "ins_dac.h"
mbed_official 15:a81a8d6c1dfe 283 #include "ins_dmac.h"
mbed_official 15:a81a8d6c1dfe 284 #include "ins_dsu.h"
mbed_official 15:a81a8d6c1dfe 285 #include "ins_eic.h"
mbed_official 15:a81a8d6c1dfe 286 #include "ins_evsys.h"
mbed_official 15:a81a8d6c1dfe 287 #include "ins_gclk.h"
mbed_official 15:a81a8d6c1dfe 288 #include "ins_sbmatrix.h"
mbed_official 15:a81a8d6c1dfe 289 #include "ins_i2s.h"
mbed_official 15:a81a8d6c1dfe 290 #include "ins_mtb.h"
mbed_official 15:a81a8d6c1dfe 291 #include "ins_nvmctrl.h"
mbed_official 15:a81a8d6c1dfe 292 #include "ins_pac0.h"
mbed_official 15:a81a8d6c1dfe 293 #include "ins_pac1.h"
mbed_official 15:a81a8d6c1dfe 294 #include "ins_pac2.h"
mbed_official 15:a81a8d6c1dfe 295 #include "ins_pm.h"
mbed_official 15:a81a8d6c1dfe 296 #include "ins_port.h"
mbed_official 15:a81a8d6c1dfe 297 #include "ins_rtc.h"
mbed_official 15:a81a8d6c1dfe 298 #include "ins_sercom0.h"
mbed_official 15:a81a8d6c1dfe 299 #include "ins_sercom1.h"
mbed_official 15:a81a8d6c1dfe 300 #include "ins_sercom2.h"
mbed_official 15:a81a8d6c1dfe 301 #include "ins_sercom3.h"
mbed_official 15:a81a8d6c1dfe 302 #include "ins_sercom4.h"
mbed_official 15:a81a8d6c1dfe 303 #include "ins_sercom5.h"
mbed_official 15:a81a8d6c1dfe 304 #include "ins_sysctrl.h"
mbed_official 15:a81a8d6c1dfe 305 #include "ins_tc3.h"
mbed_official 15:a81a8d6c1dfe 306 #include "ins_tc4.h"
mbed_official 15:a81a8d6c1dfe 307 #include "ins_tc5.h"
mbed_official 15:a81a8d6c1dfe 308 #include "ins_tcc0.h"
mbed_official 15:a81a8d6c1dfe 309 #include "ins_tcc1.h"
mbed_official 15:a81a8d6c1dfe 310 #include "ins_tcc2.h"
mbed_official 15:a81a8d6c1dfe 311 #include "ins_usb.h"
mbed_official 15:a81a8d6c1dfe 312 #include "ins_wdt.h"
mbed_official 15:a81a8d6c1dfe 313 /*@}*/
mbed_official 15:a81a8d6c1dfe 314
mbed_official 15:a81a8d6c1dfe 315 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 316 /** PERIPHERAL ID DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 317 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 318 /** \defgroup SAMD21G17A_id Peripheral Ids Definitions */
mbed_official 15:a81a8d6c1dfe 319 /*@{*/
mbed_official 15:a81a8d6c1dfe 320
mbed_official 15:a81a8d6c1dfe 321 // Peripheral instances on HPB0 bridge
mbed_official 15:a81a8d6c1dfe 322 #define ID_PAC0 0 /**< \brief Peripheral Access Controller 0 (PAC0) */
mbed_official 15:a81a8d6c1dfe 323 #define ID_PM 1 /**< \brief Power Manager (PM) */
mbed_official 15:a81a8d6c1dfe 324 #define ID_SYSCTRL 2 /**< \brief System Control (SYSCTRL) */
mbed_official 15:a81a8d6c1dfe 325 #define ID_GCLK 3 /**< \brief Generic Clock Generator (GCLK) */
mbed_official 15:a81a8d6c1dfe 326 #define ID_WDT 4 /**< \brief Watchdog Timer (WDT) */
mbed_official 15:a81a8d6c1dfe 327 #define ID_RTC 5 /**< \brief Real-Time Counter (RTC) */
mbed_official 15:a81a8d6c1dfe 328 #define ID_EIC 6 /**< \brief External Interrupt Controller (EIC) */
mbed_official 15:a81a8d6c1dfe 329
mbed_official 15:a81a8d6c1dfe 330 // Peripheral instances on HPB1 bridge
mbed_official 15:a81a8d6c1dfe 331 #define ID_PAC1 32 /**< \brief Peripheral Access Controller 1 (PAC1) */
mbed_official 15:a81a8d6c1dfe 332 #define ID_DSU 33 /**< \brief Device Service Unit (DSU) */
mbed_official 15:a81a8d6c1dfe 333 #define ID_NVMCTRL 34 /**< \brief Non-Volatile Memory Controller (NVMCTRL) */
mbed_official 15:a81a8d6c1dfe 334 #define ID_PORT 35 /**< \brief Port Module (PORT) */
mbed_official 15:a81a8d6c1dfe 335 #define ID_DMAC 36 /**< \brief Direct Memory Access Controller (DMAC) */
mbed_official 15:a81a8d6c1dfe 336 #define ID_USB 37 /**< \brief Universal Serial Bus (USB) */
mbed_official 15:a81a8d6c1dfe 337 #define ID_MTB 38 /**< \brief Cortex-M0+ Micro-Trace Buffer (MTB) */
mbed_official 15:a81a8d6c1dfe 338 #define ID_SBMATRIX 39 /**< \brief HSB Matrix (SBMATRIX) */
mbed_official 15:a81a8d6c1dfe 339
mbed_official 15:a81a8d6c1dfe 340 // Peripheral instances on HPB2 bridge
mbed_official 15:a81a8d6c1dfe 341 #define ID_PAC2 64 /**< \brief Peripheral Access Controller 2 (PAC2) */
mbed_official 15:a81a8d6c1dfe 342 #define ID_EVSYS 65 /**< \brief Event System Interface (EVSYS) */
mbed_official 15:a81a8d6c1dfe 343 #define ID_SERCOM0 66 /**< \brief Serial Communication Interface 0 (SERCOM0) */
mbed_official 15:a81a8d6c1dfe 344 #define ID_SERCOM1 67 /**< \brief Serial Communication Interface 1 (SERCOM1) */
mbed_official 15:a81a8d6c1dfe 345 #define ID_SERCOM2 68 /**< \brief Serial Communication Interface 2 (SERCOM2) */
mbed_official 15:a81a8d6c1dfe 346 #define ID_SERCOM3 69 /**< \brief Serial Communication Interface 3 (SERCOM3) */
mbed_official 15:a81a8d6c1dfe 347 #define ID_SERCOM4 70 /**< \brief Serial Communication Interface 4 (SERCOM4) */
mbed_official 15:a81a8d6c1dfe 348 #define ID_SERCOM5 71 /**< \brief Serial Communication Interface 5 (SERCOM5) */
mbed_official 15:a81a8d6c1dfe 349 #define ID_TCC0 72 /**< \brief Timer Counter Control 0 (TCC0) */
mbed_official 15:a81a8d6c1dfe 350 #define ID_TCC1 73 /**< \brief Timer Counter Control 1 (TCC1) */
mbed_official 15:a81a8d6c1dfe 351 #define ID_TCC2 74 /**< \brief Timer Counter Control 2 (TCC2) */
mbed_official 15:a81a8d6c1dfe 352 #define ID_TC3 75 /**< \brief Basic Timer Counter 3 (TC3) */
mbed_official 15:a81a8d6c1dfe 353 #define ID_TC4 76 /**< \brief Basic Timer Counter 4 (TC4) */
mbed_official 15:a81a8d6c1dfe 354 #define ID_TC5 77 /**< \brief Basic Timer Counter 5 (TC5) */
mbed_official 15:a81a8d6c1dfe 355 #define ID_ADC 80 /**< \brief Analog Digital Converter (ADC) */
mbed_official 15:a81a8d6c1dfe 356 #define ID_AC 81 /**< \brief Analog Comparators (AC) */
mbed_official 15:a81a8d6c1dfe 357 #define ID_DAC 82 /**< \brief Digital Analog Converter (DAC) */
mbed_official 15:a81a8d6c1dfe 358 #define ID_PTC 83 /**< \brief Peripheral Touch Controller (PTC) */
mbed_official 15:a81a8d6c1dfe 359 #define ID_I2S 84 /**< \brief Inter-IC Sound Interface (I2S) */
mbed_official 15:a81a8d6c1dfe 360
mbed_official 15:a81a8d6c1dfe 361 #define ID_PERIPH_COUNT 85 /**< \brief Number of peripheral IDs */
mbed_official 15:a81a8d6c1dfe 362 /*@}*/
mbed_official 15:a81a8d6c1dfe 363
mbed_official 15:a81a8d6c1dfe 364 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 365 /** BASE ADDRESS DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 366 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 367 /** \defgroup SAMD21G17A_base Peripheral Base Address Definitions */
mbed_official 15:a81a8d6c1dfe 368 /*@{*/
mbed_official 15:a81a8d6c1dfe 369
mbed_official 15:a81a8d6c1dfe 370 #if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
mbed_official 15:a81a8d6c1dfe 371 #define AC (0x42004400UL) /**< \brief (AC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 372 #define ADC (0x42004000UL) /**< \brief (ADC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 373 #define DAC (0x42004800UL) /**< \brief (DAC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 374 #define DMAC (0x41004800UL) /**< \brief (DMAC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 375 #define DSU (0x41002000UL) /**< \brief (DSU) APB Base Address */
mbed_official 15:a81a8d6c1dfe 376 #define EIC (0x40001800UL) /**< \brief (EIC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 377 #define EVSYS (0x42000400UL) /**< \brief (EVSYS) APB Base Address */
mbed_official 15:a81a8d6c1dfe 378 #define GCLK (0x40000C00UL) /**< \brief (GCLK) APB Base Address */
mbed_official 15:a81a8d6c1dfe 379 #define SBMATRIX (0x41007000UL) /**< \brief (SBMATRIX) APB Base Address */
mbed_official 15:a81a8d6c1dfe 380 #define I2S (0x42005000UL) /**< \brief (I2S) APB Base Address */
mbed_official 15:a81a8d6c1dfe 381 #define MTB (0x41006000UL) /**< \brief (MTB) APB Base Address */
mbed_official 15:a81a8d6c1dfe 382 #define NVMCTRL (0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
mbed_official 15:a81a8d6c1dfe 383 #define NVMCTRL_CAL (0x00800000UL) /**< \brief (NVMCTRL) CAL Base Address */
mbed_official 15:a81a8d6c1dfe 384 #define NVMCTRL_LOCKBIT (0x00802000UL) /**< \brief (NVMCTRL) LOCKBIT Base Address */
mbed_official 15:a81a8d6c1dfe 385 #define NVMCTRL_OTP1 (0x00806000UL) /**< \brief (NVMCTRL) OTP1 Base Address */
mbed_official 15:a81a8d6c1dfe 386 #define NVMCTRL_OTP2 (0x00806008UL) /**< \brief (NVMCTRL) OTP2 Base Address */
mbed_official 15:a81a8d6c1dfe 387 #define NVMCTRL_OTP4 (0x00806020UL) /**< \brief (NVMCTRL) OTP4 Base Address */
mbed_official 15:a81a8d6c1dfe 388 #define NVMCTRL_TEMP_LOG (0x00806030UL) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
mbed_official 15:a81a8d6c1dfe 389 #define NVMCTRL_USER (0x00804000UL) /**< \brief (NVMCTRL) USER Base Address */
mbed_official 15:a81a8d6c1dfe 390 #define PAC0 (0x40000000UL) /**< \brief (PAC0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 391 #define PAC1 (0x41000000UL) /**< \brief (PAC1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 392 #define PAC2 (0x42000000UL) /**< \brief (PAC2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 393 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */
mbed_official 15:a81a8d6c1dfe 394 #define PORT (0x41004400UL) /**< \brief (PORT) APB Base Address */
mbed_official 15:a81a8d6c1dfe 395 #define PORT_IOBUS (0x60000000UL) /**< \brief (PORT) IOBUS Base Address */
mbed_official 15:a81a8d6c1dfe 396 #define RTC (0x40001400UL) /**< \brief (RTC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 397 #define SERCOM0 (0x42000800UL) /**< \brief (SERCOM0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 398 #define SERCOM1 (0x42000C00UL) /**< \brief (SERCOM1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 399 #define SERCOM2 (0x42001000UL) /**< \brief (SERCOM2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 400 #define SERCOM3 (0x42001400UL) /**< \brief (SERCOM3) APB Base Address */
mbed_official 15:a81a8d6c1dfe 401 #define SERCOM4 (0x42001800UL) /**< \brief (SERCOM4) APB Base Address */
mbed_official 15:a81a8d6c1dfe 402 #define SERCOM5 (0x42001C00UL) /**< \brief (SERCOM5) APB Base Address */
mbed_official 15:a81a8d6c1dfe 403 #define SYSCTRL (0x40000800UL) /**< \brief (SYSCTRL) APB Base Address */
mbed_official 15:a81a8d6c1dfe 404 #define TC3 (0x42002C00UL) /**< \brief (TC3) APB Base Address */
mbed_official 15:a81a8d6c1dfe 405 #define TC4 (0x42003000UL) /**< \brief (TC4) APB Base Address */
mbed_official 15:a81a8d6c1dfe 406 #define TC5 (0x42003400UL) /**< \brief (TC5) APB Base Address */
mbed_official 15:a81a8d6c1dfe 407 #define TCC0 (0x42002000UL) /**< \brief (TCC0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 408 #define TCC1 (0x42002400UL) /**< \brief (TCC1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 409 #define TCC2 (0x42002800UL) /**< \brief (TCC2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 410 #define USB (0x41005000UL) /**< \brief (USB) APB Base Address */
mbed_official 15:a81a8d6c1dfe 411 #define WDT (0x40001000UL) /**< \brief (WDT) APB Base Address */
mbed_official 15:a81a8d6c1dfe 412 #else
mbed_official 15:a81a8d6c1dfe 413 #define AC ((Ac *)0x42004400UL) /**< \brief (AC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 414 #define AC_INST_NUM 1 /**< \brief (AC) Number of instances */
mbed_official 15:a81a8d6c1dfe 415 #define AC_INSTS { AC } /**< \brief (AC) Instances List */
mbed_official 15:a81a8d6c1dfe 416
mbed_official 15:a81a8d6c1dfe 417 #define ADC ((Adc *)0x42004000UL) /**< \brief (ADC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 418 #define ADC_INST_NUM 1 /**< \brief (ADC) Number of instances */
mbed_official 15:a81a8d6c1dfe 419 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
mbed_official 15:a81a8d6c1dfe 420
mbed_official 15:a81a8d6c1dfe 421 #define DAC ((Dac *)0x42004800UL) /**< \brief (DAC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 422 #define DAC_INST_NUM 1 /**< \brief (DAC) Number of instances */
mbed_official 15:a81a8d6c1dfe 423 #define DAC_INSTS { DAC } /**< \brief (DAC) Instances List */
mbed_official 15:a81a8d6c1dfe 424
mbed_official 15:a81a8d6c1dfe 425 #define DMAC ((Dmac *)0x41004800UL) /**< \brief (DMAC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 426 #define DMAC_INST_NUM 1 /**< \brief (DMAC) Number of instances */
mbed_official 15:a81a8d6c1dfe 427 #define DMAC_INSTS { DMAC } /**< \brief (DMAC) Instances List */
mbed_official 15:a81a8d6c1dfe 428
mbed_official 15:a81a8d6c1dfe 429 #define DSU ((Dsu *)0x41002000UL) /**< \brief (DSU) APB Base Address */
mbed_official 15:a81a8d6c1dfe 430 #define DSU_INST_NUM 1 /**< \brief (DSU) Number of instances */
mbed_official 15:a81a8d6c1dfe 431 #define DSU_INSTS { DSU } /**< \brief (DSU) Instances List */
mbed_official 15:a81a8d6c1dfe 432
mbed_official 15:a81a8d6c1dfe 433 #define EIC ((Eic *)0x40001800UL) /**< \brief (EIC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 434 #define EIC_INST_NUM 1 /**< \brief (EIC) Number of instances */
mbed_official 15:a81a8d6c1dfe 435 #define EIC_INSTS { EIC } /**< \brief (EIC) Instances List */
mbed_official 15:a81a8d6c1dfe 436
mbed_official 15:a81a8d6c1dfe 437 #define EVSYS ((Evsys *)0x42000400UL) /**< \brief (EVSYS) APB Base Address */
mbed_official 15:a81a8d6c1dfe 438 #define EVSYS_INST_NUM 1 /**< \brief (EVSYS) Number of instances */
mbed_official 15:a81a8d6c1dfe 439 #define EVSYS_INSTS { EVSYS } /**< \brief (EVSYS) Instances List */
mbed_official 15:a81a8d6c1dfe 440
mbed_official 15:a81a8d6c1dfe 441 #define GCLK ((Gclk *)0x40000C00UL) /**< \brief (GCLK) APB Base Address */
mbed_official 15:a81a8d6c1dfe 442 #define GCLK_INST_NUM 1 /**< \brief (GCLK) Number of instances */
mbed_official 15:a81a8d6c1dfe 443 #define GCLK_INSTS { GCLK } /**< \brief (GCLK) Instances List */
mbed_official 15:a81a8d6c1dfe 444
mbed_official 15:a81a8d6c1dfe 445 #define SBMATRIX ((Hmatrixb *)0x41007000UL) /**< \brief (SBMATRIX) APB Base Address */
mbed_official 15:a81a8d6c1dfe 446 #define HMATRIXB_INST_NUM 1 /**< \brief (HMATRIXB) Number of instances */
mbed_official 15:a81a8d6c1dfe 447 #define HMATRIXB_INSTS { SBMATRIX } /**< \brief (HMATRIXB) Instances List */
mbed_official 15:a81a8d6c1dfe 448
mbed_official 15:a81a8d6c1dfe 449 #define I2S ((I2s *)0x42005000UL) /**< \brief (I2S) APB Base Address */
mbed_official 15:a81a8d6c1dfe 450 #define I2S_INST_NUM 1 /**< \brief (I2S) Number of instances */
mbed_official 15:a81a8d6c1dfe 451 #define I2S_INSTS { I2S } /**< \brief (I2S) Instances List */
mbed_official 15:a81a8d6c1dfe 452
mbed_official 15:a81a8d6c1dfe 453 #define MTB ((Mtb *)0x41006000UL) /**< \brief (MTB) APB Base Address */
mbed_official 15:a81a8d6c1dfe 454 #define MTB_INST_NUM 1 /**< \brief (MTB) Number of instances */
mbed_official 15:a81a8d6c1dfe 455 #define MTB_INSTS { MTB } /**< \brief (MTB) Instances List */
mbed_official 15:a81a8d6c1dfe 456
mbed_official 15:a81a8d6c1dfe 457 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
mbed_official 15:a81a8d6c1dfe 458 #define NVMCTRL_CAL (0x00800000UL) /**< \brief (NVMCTRL) CAL Base Address */
mbed_official 15:a81a8d6c1dfe 459 #define NVMCTRL_LOCKBIT (0x00802000UL) /**< \brief (NVMCTRL) LOCKBIT Base Address */
mbed_official 15:a81a8d6c1dfe 460 #define NVMCTRL_OTP1 (0x00806000UL) /**< \brief (NVMCTRL) OTP1 Base Address */
mbed_official 15:a81a8d6c1dfe 461 #define NVMCTRL_OTP2 (0x00806008UL) /**< \brief (NVMCTRL) OTP2 Base Address */
mbed_official 15:a81a8d6c1dfe 462 #define NVMCTRL_OTP4 (0x00806020UL) /**< \brief (NVMCTRL) OTP4 Base Address */
mbed_official 15:a81a8d6c1dfe 463 #define NVMCTRL_TEMP_LOG (0x00806030UL) /**< \brief (NVMCTRL) TEMP_LOG Base Address */
mbed_official 15:a81a8d6c1dfe 464 #define NVMCTRL_USER (0x00804000UL) /**< \brief (NVMCTRL) USER Base Address */
mbed_official 15:a81a8d6c1dfe 465 #define NVMCTRL_INST_NUM 1 /**< \brief (NVMCTRL) Number of instances */
mbed_official 15:a81a8d6c1dfe 466 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
mbed_official 15:a81a8d6c1dfe 467
mbed_official 15:a81a8d6c1dfe 468 #define PAC0 ((Pac *)0x40000000UL) /**< \brief (PAC0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 469 #define PAC1 ((Pac *)0x41000000UL) /**< \brief (PAC1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 470 #define PAC2 ((Pac *)0x42000000UL) /**< \brief (PAC2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 471 #define PAC_INST_NUM 3 /**< \brief (PAC) Number of instances */
mbed_official 15:a81a8d6c1dfe 472 #define PAC_INSTS { PAC0, PAC1, PAC2 } /**< \brief (PAC) Instances List */
mbed_official 15:a81a8d6c1dfe 473
mbed_official 15:a81a8d6c1dfe 474 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */
mbed_official 15:a81a8d6c1dfe 475 #define PM_INST_NUM 1 /**< \brief (PM) Number of instances */
mbed_official 15:a81a8d6c1dfe 476 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
mbed_official 15:a81a8d6c1dfe 477
mbed_official 15:a81a8d6c1dfe 478 #define PORT ((Port *)0x41004400UL) /**< \brief (PORT) APB Base Address */
mbed_official 15:a81a8d6c1dfe 479 #define PORT_IOBUS ((Port *)0x60000000UL) /**< \brief (PORT) IOBUS Base Address */
mbed_official 15:a81a8d6c1dfe 480 #define PORT_INST_NUM 1 /**< \brief (PORT) Number of instances */
mbed_official 15:a81a8d6c1dfe 481 #define PORT_INSTS { PORT } /**< \brief (PORT) Instances List */
mbed_official 15:a81a8d6c1dfe 482
mbed_official 15:a81a8d6c1dfe 483 #define PTC_GCLK_ID 34
mbed_official 15:a81a8d6c1dfe 484 #define PTC_INST_NUM 1 /**< \brief (PTC) Number of instances */
mbed_official 15:a81a8d6c1dfe 485 #define PTC_INSTS { PTC } /**< \brief (PTC) Instances List */
mbed_official 15:a81a8d6c1dfe 486
mbed_official 15:a81a8d6c1dfe 487 #define RTC ((Rtc *)0x40001400UL) /**< \brief (RTC) APB Base Address */
mbed_official 15:a81a8d6c1dfe 488 #define RTC_INST_NUM 1 /**< \brief (RTC) Number of instances */
mbed_official 15:a81a8d6c1dfe 489 #define RTC_INSTS { RTC } /**< \brief (RTC) Instances List */
mbed_official 15:a81a8d6c1dfe 490
mbed_official 15:a81a8d6c1dfe 491 #define SERCOM0 ((Sercom *)0x42000800UL) /**< \brief (SERCOM0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 492 #define SERCOM1 ((Sercom *)0x42000C00UL) /**< \brief (SERCOM1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 493 #define SERCOM2 ((Sercom *)0x42001000UL) /**< \brief (SERCOM2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 494 #define SERCOM3 ((Sercom *)0x42001400UL) /**< \brief (SERCOM3) APB Base Address */
mbed_official 15:a81a8d6c1dfe 495 #define SERCOM4 ((Sercom *)0x42001800UL) /**< \brief (SERCOM4) APB Base Address */
mbed_official 15:a81a8d6c1dfe 496 #define SERCOM5 ((Sercom *)0x42001C00UL) /**< \brief (SERCOM5) APB Base Address */
mbed_official 15:a81a8d6c1dfe 497 #define SERCOM_INST_NUM 6 /**< \brief (SERCOM) Number of instances */
mbed_official 15:a81a8d6c1dfe 498 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SERCOM) Instances List */
mbed_official 15:a81a8d6c1dfe 499
mbed_official 15:a81a8d6c1dfe 500 #define SYSCTRL ((Sysctrl *)0x40000800UL) /**< \brief (SYSCTRL) APB Base Address */
mbed_official 15:a81a8d6c1dfe 501 #define SYSCTRL_INST_NUM 1 /**< \brief (SYSCTRL) Number of instances */
mbed_official 15:a81a8d6c1dfe 502 #define SYSCTRL_INSTS { SYSCTRL } /**< \brief (SYSCTRL) Instances List */
mbed_official 15:a81a8d6c1dfe 503
mbed_official 15:a81a8d6c1dfe 504 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
mbed_official 15:a81a8d6c1dfe 505 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
mbed_official 15:a81a8d6c1dfe 506 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
mbed_official 15:a81a8d6c1dfe 507 #define TC_INST_NUM 3 /**< \brief (TC) Number of instances */
mbed_official 15:a81a8d6c1dfe 508 #define TC_INSTS { TC3, TC4, TC5 } /**< \brief (TC) Instances List */
mbed_official 15:a81a8d6c1dfe 509
mbed_official 15:a81a8d6c1dfe 510 #define TCC0 ((Tcc *)0x42002000UL) /**< \brief (TCC0) APB Base Address */
mbed_official 15:a81a8d6c1dfe 511 #define TCC1 ((Tcc *)0x42002400UL) /**< \brief (TCC1) APB Base Address */
mbed_official 15:a81a8d6c1dfe 512 #define TCC2 ((Tcc *)0x42002800UL) /**< \brief (TCC2) APB Base Address */
mbed_official 15:a81a8d6c1dfe 513 #define TCC_INST_NUM 3 /**< \brief (TCC) Number of instances */
mbed_official 15:a81a8d6c1dfe 514 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
mbed_official 15:a81a8d6c1dfe 515
mbed_official 15:a81a8d6c1dfe 516 #define USB ((Usb *)0x41005000UL) /**< \brief (USB) APB Base Address */
mbed_official 15:a81a8d6c1dfe 517 #define USB_INST_NUM 1 /**< \brief (USB) Number of instances */
mbed_official 15:a81a8d6c1dfe 518 #define USB_INSTS { USB } /**< \brief (USB) Instances List */
mbed_official 15:a81a8d6c1dfe 519
mbed_official 15:a81a8d6c1dfe 520 #define WDT ((Wdt *)0x40001000UL) /**< \brief (WDT) APB Base Address */
mbed_official 15:a81a8d6c1dfe 521 #define WDT_INST_NUM 1 /**< \brief (WDT) Number of instances */
mbed_official 15:a81a8d6c1dfe 522 #define WDT_INSTS { WDT } /**< \brief (WDT) Instances List */
mbed_official 15:a81a8d6c1dfe 523
mbed_official 15:a81a8d6c1dfe 524 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 15:a81a8d6c1dfe 525 /*@}*/
mbed_official 15:a81a8d6c1dfe 526
mbed_official 15:a81a8d6c1dfe 527 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 528 /** PORT DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 529 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 530 /** \defgroup SAMD21G17A_port PORT Definitions */
mbed_official 15:a81a8d6c1dfe 531 /*@{*/
mbed_official 15:a81a8d6c1dfe 532
mbed_official 15:a81a8d6c1dfe 533 #include "pio_samd21g17a.h"
mbed_official 15:a81a8d6c1dfe 534 /*@}*/
mbed_official 15:a81a8d6c1dfe 535
mbed_official 15:a81a8d6c1dfe 536 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 537 /** MEMORY MAPPING DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 538 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 539
mbed_official 15:a81a8d6c1dfe 540 #define FLASH_SIZE 0x20000UL /* 128 kB */
mbed_official 15:a81a8d6c1dfe 541 #define FLASH_PAGE_SIZE 64
mbed_official 15:a81a8d6c1dfe 542 #define FLASH_NB_OF_PAGES 2048
mbed_official 15:a81a8d6c1dfe 543 #define FLASH_USER_PAGE_SIZE 64
mbed_official 15:a81a8d6c1dfe 544 #define HMCRAMC0_SIZE 0x4000UL /* 16 kB */
mbed_official 15:a81a8d6c1dfe 545 #define FLASH_ADDR (0x00000000UL) /**< FLASH base address */
mbed_official 15:a81a8d6c1dfe 546 #define FLASH_USER_PAGE_ADDR (0x00800000UL) /**< FLASH_USER_PAGE base address */
mbed_official 15:a81a8d6c1dfe 547 #define HMCRAMC0_ADDR (0x20000000UL) /**< HMCRAMC0 base address */
mbed_official 15:a81a8d6c1dfe 548
mbed_official 15:a81a8d6c1dfe 549 #define DSU_DID_RESETVALUE 0x10010006UL
mbed_official 15:a81a8d6c1dfe 550 #define EIC_EXTINT_NUM 16
mbed_official 15:a81a8d6c1dfe 551 #define PORT_GROUPS 2
mbed_official 15:a81a8d6c1dfe 552
mbed_official 15:a81a8d6c1dfe 553 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 554 /** ELECTRICAL DEFINITIONS FOR SAMD21G17A */
mbed_official 15:a81a8d6c1dfe 555 /* ************************************************************************** */
mbed_official 15:a81a8d6c1dfe 556
mbed_official 15:a81a8d6c1dfe 557
mbed_official 15:a81a8d6c1dfe 558 #ifdef __cplusplus
mbed_official 15:a81a8d6c1dfe 559 }
mbed_official 15:a81a8d6c1dfe 560 #endif
mbed_official 15:a81a8d6c1dfe 561
mbed_official 15:a81a8d6c1dfe 562 /*@}*/
mbed_official 15:a81a8d6c1dfe 563
mbed_official 15:a81a8d6c1dfe 564 #endif /* SAMD21G17A_H */