Diff: pdb.cpp

Revision:

48:29f14bc30ba6

Parent:

47:54fafe151669

Child:

49:4dcf4717a8bb

--- a/pdb.cpp	Sat Jan 31 16:44:40 2015 +0000
+++ b/pdb.cpp	Sat Jan 31 18:38:17 2015 +0000
@@ -14,23 +14,24 @@
     
     // Configure the Peripheral Delay Block (PDB):
     PDB0_IDLY = 0x01;   // need to trigger interrupt every counter reset which happens when modulus reached
-    PDB0_MOD = 0xffffffff;
-    PDB0_CH0DLY0 = 0xa0;
-    PDB0_CH0DLY1 = 0xa0;
-    PDB0_CH1DLY0 = 0x00;
-    PDB0_CH1DLY1 = 0x00;
-    PDB0_CH0C1 = PDB_C1_EN(0x01) | PDB_C1_TOS(0x01) | PDB_C1_EN(0x02) | PDB_C1_TOS(0x02) ; // channel 0 pretrigger 0 and 1 enabled and delayed
-    PDB0_CH1C1 = PDB_C1_EN(0x01) | PDB_C1_TOS(0x01) | PDB_C1_EN(0x02) | PDB_C1_TOS(0x02) ; // channel 1 pretrigger 0 and 1 enabled and delayed
+    PDB0_MOD = 0x0000ffff; // max
+    PDB0_CH0DLY0 = 0xff;
+    PDB0_CH0DLY1 = 0xf0;
+    PDB0_CH1DLY0 = 0xff;
+    PDB0_CH1DLY1 = 0xf0;
+    PDB0_CH0C1 = PDB_C1_EN(2) | PDB_C1_TOS(2); // channel 0 pretrigger 0 and 1 enabled and delayed
+    PDB0_CH1C1 = PDB_C1_EN(1) | PDB_C1_TOS(1); // channel 1 pretrigger 0 and 1 enabled and delayed
     
     // Setup Staus and Control Register
     PDB0_SC = 0; // clear register
-    PDB0_SC = PDB_SC_PRESCALER(0) // Slow down the period of the PDB for testing
-            | PDB_SC_TRGSEL(0xf)  // Trigger source is Software Trigger to be invoked in this file
-             | PDB_SC_PDBEN_MASK  // PDB enabled
-             | PDB_SC_PDBIE_MASK  // PDB Interrupt Enable
-             | PDB_SC_MULT(0)     // Multiplication factor 20 for the prescale divider for the counter clock
-             | PDB_SC_CONT_MASK   // Contintuous, rather than one-shot, mode
-             | PDB_SC_LDOK_MASK;  // Need to ok the loading or it will not load certain regsiters!
+    PDB0_SC = PDB_SC_DMAEN_MASK    // Enable DMA
+             | PDB_SC_PRESCALER(0) // Slow down the period of the PDB for testing
+             | PDB_SC_TRGSEL(0xf)  // Trigger source is Software Trigger to be invoked in this file
+             | PDB_SC_PDBEN_MASK   // PDB enabled
+             | PDB_SC_PDBIE_MASK   // PDB Interrupt Enable
+             | PDB_SC_MULT(0)      // Multiplication factor 20 for the prescale divider for the counter clock
+             | PDB_SC_CONT_MASK    // Contintuous, rather than one-shot, mode
+             | PDB_SC_LDOK_MASK;   // Need to ok the loading or it will not load certain regsiters!
     //PDB0_SC &= ~PDB_SC_CONT_MASK;  // enable one-shot mode for debugging.
     
     debug2.printf("PDB0_SC:       %08x\r\n",PDB0_SC);
@@ -71,5 +72,6 @@
 }
 
 void pdb_stop() {
+    //PDB0_SC &= ~PDB_SC_CONT_MASK; // change to one-shot mode, so pdb will stop after current count
     PDB0_SC &= ~PDB_SC_PDBEN_MASK;  // PDB disabled
 }
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