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Fork of Impedance_Fast_Circuitry by
quadrature.cpp@45:d591d138cdeb, 2015-01-31 (annotated)
- Committer:
- timmey9
- Date:
- Sat Jan 31 07:25:52 2015 +0000
- Revision:
- 45:d591d138cdeb
Quadrature decoder is working.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
timmey9 | 45:d591d138cdeb | 1 | #include "quadrature.h" |
timmey9 | 45:d591d138cdeb | 2 | |
timmey9 | 45:d591d138cdeb | 3 | void quad_init() { |
timmey9 | 45:d591d138cdeb | 4 | |
timmey9 | 45:d591d138cdeb | 5 | // Enable clock for FTM2 |
timmey9 | 45:d591d138cdeb | 6 | SIM_SCGC3 |= SIM_SCGC3_FTM2_MASK; // there are two of them for some reason |
timmey9 | 45:d591d138cdeb | 7 | SIM_SCGC6 |= SIM_SCGC6_FTM2_MASK; // |
timmey9 | 45:d591d138cdeb | 8 | |
timmey9 | 45:d591d138cdeb | 9 | // Enable clock for PortB |
timmey9 | 45:d591d138cdeb | 10 | SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK; |
timmey9 | 45:d591d138cdeb | 11 | |
timmey9 | 45:d591d138cdeb | 12 | //enable the counter |
timmey9 | 45:d591d138cdeb | 13 | FTM2_MODE |= FTM_MODE_WPDIS_MASK; // unlock write protection on certain FTM bits and registers |
timmey9 | 45:d591d138cdeb | 14 | FTM2_MODE |= FTM_MODE_FTMEN_MASK; |
timmey9 | 45:d591d138cdeb | 15 | |
timmey9 | 45:d591d138cdeb | 16 | //enable the counter to run in the BDM mode |
timmey9 | 45:d591d138cdeb | 17 | FTM2_CONF |= FTM_CONF_BDMMODE(3); |
timmey9 | 45:d591d138cdeb | 18 | |
timmey9 | 45:d591d138cdeb | 19 | //load the Modulo register and counter initial value |
timmey9 | 45:d591d138cdeb | 20 | FTM2_MOD = 4095; |
timmey9 | 45:d591d138cdeb | 21 | FTM2_CNTIN = 0; |
timmey9 | 45:d591d138cdeb | 22 | |
timmey9 | 45:d591d138cdeb | 23 | //configuring FTM for quadrature mode |
timmey9 | 45:d591d138cdeb | 24 | FTM2_QDCTRL |= FTM_QDCTRL_QUADEN_MASK; // enable Quadrature decoding |
timmey9 | 45:d591d138cdeb | 25 | FTM2_QDCTRL &= ~FTM_QDCTRL_QUADMODE_MASK; // select phase A and phase B decoding mode (this is what the angle encoder uses) |
timmey9 | 45:d591d138cdeb | 26 | |
timmey9 | 45:d591d138cdeb | 27 | // start the timer clock, source is the external clock |
timmey9 | 45:d591d138cdeb | 28 | FTM2_SC |= FTM_SC_CLKS(3); |
timmey9 | 45:d591d138cdeb | 29 | |
timmey9 | 45:d591d138cdeb | 30 | //configuring the input pins: |
timmey9 | 45:d591d138cdeb | 31 | PORTB_PCR18 = PORT_PCR_MUX(6); // FTM2_QD_PHA (PTB18) ALT6 |
timmey9 | 45:d591d138cdeb | 32 | PORTB_PCR19 = PORT_PCR_MUX(6); // FTM2_QD_PHB (PTB19) ALT6 |
timmey9 | 45:d591d138cdeb | 33 | |
timmey9 | 45:d591d138cdeb | 34 | // Enable write protection |
timmey9 | 45:d591d138cdeb | 35 | FTM2_MODE |= FTM_MODE_WPDIS_MASK; // Lock write protection on certain FTM bits and registers |
timmey9 | 45:d591d138cdeb | 36 | |
timmey9 | 45:d591d138cdeb | 37 | } |
timmey9 | 45:d591d138cdeb | 38 | |
timmey9 | 45:d591d138cdeb | 39 | int32_t quad_read() { |
timmey9 | 45:d591d138cdeb | 40 | //int32_t* temp = (int32_t*)0x4003a004; |
timmey9 | 45:d591d138cdeb | 41 | return FTM2_CNT; // this is the register with the counter in it. |
timmey9 | 45:d591d138cdeb | 42 | } |