Diff: nv_bitfield_map.h

Revision:

15:83bbc18cccbc

Parent:

14:062850afdf38

Child:

20:26e934452728

--- a/nv_bitfield_map.h	Thu Apr 22 11:35:17 2021 +0000
+++ b/nv_bitfield_map.h	Wed May 12 10:09:04 2021 +0000
@@ -43,30 +43,125 @@
 #define NV_CRC_MLX_TRIMMING_LENGTH 8
 #define NV_CRC_MLX_TRIMMING_MASK 0xFF00
 
-#define NV_MLX_TRIM_14_ADDRESS 0x09F4
-#define NV_MLX_TRIM_14_OFFSET 0
-#define NV_MLX_TRIM_14_LENGTH 16
-#define NV_MLX_TRIM_14_MASK 0xFFFF
+#define NV_DRVMOD_OSC_DIV4_EN_DRV_ADDRESS 0x09F4
+#define NV_DRVMOD_OSC_DIV4_EN_DRV_OFFSET 13
+#define NV_DRVMOD_OSC_DIV4_EN_DRV_LENGTH 1
+#define NV_DRVMOD_OSC_DIV4_EN_DRV_MASK 0x2000
+
+#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_ADDRESS 0x09F4
+#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_OFFSET 12
+#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_LENGTH 1
+#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_MASK 0x1000
+
+#define NV_HS_BOOST_PD_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_BOOST_PD_MODE_DRV_OFFSET 10
+#define NV_HS_BOOST_PD_MODE_DRV_LENGTH 2
+#define NV_HS_BOOST_PD_MODE_DRV_MASK 0x0C00
+
+#define NV_HS_BOOST_PU_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_BOOST_PU_MODE_DRV_OFFSET 8
+#define NV_HS_BOOST_PU_MODE_DRV_LENGTH 2
+#define NV_HS_BOOST_PU_MODE_DRV_MASK 0x0300
+
+#define NV_HS_HIGH_I_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_HIGH_I_MODE_DRV_OFFSET 6
+#define NV_HS_HIGH_I_MODE_DRV_LENGTH 2
+#define NV_HS_HIGH_I_MODE_DRV_MASK 0x00C0
+
+#define NV_HS_ONSW_DELAY_ENABLE_DRV_ADDRESS 0x09F4
+#define NV_HS_ONSW_DELAY_ENABLE_DRV_OFFSET 5
+#define NV_HS_ONSW_DELAY_ENABLE_DRV_LENGTH 1
+#define NV_HS_ONSW_DELAY_ENABLE_DRV_MASK 0x0020
 
-#define NV_MLX_TRIM_13_ADDRESS 0x09F2
-#define NV_MLX_TRIM_13_OFFSET 0
-#define NV_MLX_TRIM_13_LENGTH 16
-#define NV_MLX_TRIM_13_MASK 0xFFFF
+#define NV_LS_BOOST_MODE_DRV_ADDRESS 0x09F4
+#define NV_LS_BOOST_MODE_DRV_OFFSET 3
+#define NV_LS_BOOST_MODE_DRV_LENGTH 2
+#define NV_LS_BOOST_MODE_DRV_MASK 0x0018
+
+#define NV_LS_HIGH_I_MODE_DRV_ADDRESS 0x09F4
+#define NV_LS_HIGH_I_MODE_DRV_OFFSET 1
+#define NV_LS_HIGH_I_MODE_DRV_LENGTH 2
+#define NV_LS_HIGH_I_MODE_DRV_MASK 0x0006
+
+#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_ADDRESS 0x09F4
+#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_OFFSET 0
+#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_LENGTH 1
+#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_MASK 0x0001
+
+#define NV_DRV_MODE_SEL_DRV_ADDRESS 0x09F2
+#define NV_DRV_MODE_SEL_DRV_OFFSET 15
+#define NV_DRV_MODE_SEL_DRV_LENGTH 1
+#define NV_DRV_MODE_SEL_DRV_MASK 0x8000
+
+#define NV_OC_ADJ_DRV_ADDRESS 0x09F2
+#define NV_OC_ADJ_DRV_OFFSET 13
+#define NV_OC_ADJ_DRV_LENGTH 2
+#define NV_OC_ADJ_DRV_MASK 0x6000
+
+#define NV_OV_BLANK_OPTION_ADDRESS 0x09F2
+#define NV_OV_BLANK_OPTION_OFFSET 7
+#define NV_OV_BLANK_OPTION_LENGTH 2
+#define NV_OV_BLANK_OPTION_MASK 0x0180
 
-#define NV_MLX_TRIM_12_ADDRESS 0x09F0
-#define NV_MLX_TRIM_12_OFFSET 0
-#define NV_MLX_TRIM_12_LENGTH 16
-#define NV_MLX_TRIM_12_MASK 0xFFFF
+#define NV_OV_BLANK_TIMER_DIS_ADDRESS 0x09F2
+#define NV_OV_BLANK_TIMER_DIS_OFFSET 6
+#define NV_OV_BLANK_TIMER_DIS_LENGTH 1
+#define NV_OV_BLANK_TIMER_DIS_MASK 0x0040
+
+#define NV_OV_BLANK_DIS_ADDRESS 0x09F2
+#define NV_OV_BLANK_DIS_OFFSET 5
+#define NV_OV_BLANK_DIS_LENGTH 1
+#define NV_OV_BLANK_DIS_MASK 0x0020
+
+#define NV_OV_TIMEBASE_SELECT_ADDRESS 0x09F2
+#define NV_OV_TIMEBASE_SELECT_OFFSET 3
+#define NV_OV_TIMEBASE_SELECT_LENGTH 2
+#define NV_OV_TIMEBASE_SELECT_MASK 0x0018
+
+#define NV_VS_OVDET_SEL_SUP_ADDRESS 0x09F2
+#define NV_VS_OVDET_SEL_SUP_OFFSET 0
+#define NV_VS_OVDET_SEL_SUP_LENGTH 3
+#define NV_VS_OVDET_SEL_SUP_MASK 0x0007
+
+#define NV_OTP_VPP_SETUP_TIME_ADDRESS 0x09F0
+#define NV_OTP_VPP_SETUP_TIME_OFFSET 5
+#define NV_OTP_VPP_SETUP_TIME_LENGTH 5
+#define NV_OTP_VPP_SETUP_TIME_MASK 0x03E0
+
+#define NV_OTP_PROGRAM_WIDTH_ADDRESS 0x09F0
+#define NV_OTP_PROGRAM_WIDTH_OFFSET 0
+#define NV_OTP_PROGRAM_WIDTH_LENGTH 5
+#define NV_OTP_PROGRAM_WIDTH_MASK 0x001F
 
-#define NV_MLX_TRIM_11_ADDRESS 0x09EE
-#define NV_MLX_TRIM_11_OFFSET 0
-#define NV_MLX_TRIM_11_LENGTH 16
-#define NV_MLX_TRIM_11_MASK 0xFFFF
+#define NV_OTP_USETIMINGS_ADDRESS 0x09EE
+#define NV_OTP_USETIMINGS_OFFSET 15
+#define NV_OTP_USETIMINGS_LENGTH 1
+#define NV_OTP_USETIMINGS_MASK 0x8000
+
+#define NV_OTP_CEB_SETUP_WIDTH_ADDRESS 0x09EE
+#define NV_OTP_CEB_SETUP_WIDTH_OFFSET 10
+#define NV_OTP_CEB_SETUP_WIDTH_LENGTH 5
+#define NV_OTP_CEB_SETUP_WIDTH_MASK 0x7C00
+
+#define NV_OTP_WAIT_STATES_ADDRESS 0x09EE
+#define NV_OTP_WAIT_STATES_OFFSET 5
+#define NV_OTP_WAIT_STATES_LENGTH 5
+#define NV_OTP_WAIT_STATES_MASK 0x03E0
 
-#define NV_MLX_TRIM_10_ADDRESS 0x09EC
-#define NV_MLX_TRIM_10_OFFSET 0
-#define NV_MLX_TRIM_10_LENGTH 16
-#define NV_MLX_TRIM_10_MASK 0xFFFF
+#define NV_OTP_RESET_PULSE_WIDTH_ADDRESS 0x09EE
+#define NV_OTP_RESET_PULSE_WIDTH_OFFSET 0
+#define NV_OTP_RESET_PULSE_WIDTH_LENGTH 5
+#define NV_OTP_RESET_PULSE_WIDTH_MASK 0x001F
+
+#define NV_OC_FB_DIS_DRV_ADDRESS 0x09EC
+#define NV_OC_FB_DIS_DRV_OFFSET 1
+#define NV_OC_FB_DIS_DRV_LENGTH 1
+#define NV_OC_FB_DIS_DRV_MASK 0x0002
+
+#define NV_CL_FB_DIS_DRV_ADDRESS 0x09EC
+#define NV_CL_FB_DIS_DRV_OFFSET 0
+#define NV_CL_FB_DIS_DRV_LENGTH 1
+#define NV_CL_FB_DIS_DRV_MASK 0x0001
 
 #define NV_MLX_TRIM_9_ADDRESS 0x09EA
 #define NV_MLX_TRIM_9_OFFSET 0
@@ -93,30 +188,85 @@
 #define NV_MLX_TRIM_5_LENGTH 16
 #define NV_MLX_TRIM_5_MASK 0xFFFF
 
-#define NV_MLX_TRIM_4_ADDRESS 0x09E0
-#define NV_MLX_TRIM_4_OFFSET 0
-#define NV_MLX_TRIM_4_LENGTH 16
-#define NV_MLX_TRIM_4_MASK 0xFFFF
+#define TR_DRVSUP_DRV_ADDRESS 0x09E0
+#define TR_DRVSUP_DRV_OFFSET 12
+#define TR_DRVSUP_DRV_LENGTH 4
+#define TR_DRVSUP_DRV_MASK 0xF000
+
+#define TR_CPCLK_DRV_ADDRESS 0x09E0
+#define TR_CPCLK_DRV_OFFSET 0
+#define TR_CPCLK_DRV_LENGTH 10
+#define TR_CPCLK_DRV_MASK 0x03FF
+
+#define TR_OC_DRV_ADDRESS 0x09DE
+#define TR_OC_DRV_OFFSET 8
+#define TR_OC_DRV_LENGTH 5
+#define TR_OC_DRV_MASK 0x1F00
+
+#define TR_SLWRT_DRV_ADDRESS 0x09DE
+#define TR_SLWRT_DRV_OFFSET 4
+#define TR_SLWRT_DRV_LENGTH 4
+#define TR_SLWRT_DRV_MASK 0x00F0
 
-#define NV_MLX_TRIM_3_ADDRESS 0x09DE
-#define NV_MLX_TRIM_3_OFFSET 0
-#define NV_MLX_TRIM_3_LENGTH 16
-#define NV_MLX_TRIM_3_MASK 0xFFFF
+#define TR_VSMCLAMP_DRV_ADDRESS 0x09DE
+#define TR_VSMCLAMP_DRV_OFFSET 0
+#define TR_VSMCLAMP_DRV_LENGTH 4
+#define TR_VSMCLAMP_DRV_MASK 0x000F
+
+#define I2C_SDA_IN_FILT_ADDRESS 0x09DC
+#define I2C_SDA_IN_FILT_OFFSET 10
+#define I2C_SDA_IN_FILT_LENGTH 2
+#define I2C_SDA_IN_FILT_MASK 0x0C00
+
+#define I2C_SDA_OUT_FILT_ADDRESS 0x09DC
+#define I2C_SDA_OUT_FILT_OFFSET 8
+#define I2C_SDA_OUT_FILT_LENGTH 2
+#define I2C_SDA_OUT_FILT_MASK 0x0300
+
+#define TR_OTPVPP_SUP_ADDRESS 0x09DC
+#define TR_OTPVPP_SUP_OFFSET 6
+#define TR_OTPVPP_SUP_LENGTH 2
+#define TR_OTPVPP_SUP_MASK 0x00C0
 
-#define NV_MLX_TRIM_2_ADDRESS 0x09DC
-#define NV_MLX_TRIM_2_OFFSET 0
-#define NV_MLX_TRIM_2_LENGTH 16
-#define NV_MLX_TRIM_2_MASK 0xFFFF
+#define TR_FDA_GAIN_ISENSE_ADDRESS 0x09DC
+#define TR_FDA_GAIN_ISENSE_OFFSET 0
+#define TR_FDA_GAIN_ISENSE_LENGTH 6
+#define TR_FDA_GAIN_ISENSE_MASK 0x003F
+
+#define TR_OSC_ADDRESS 0x09DA
+#define TR_OSC_OFFSET 6
+#define TR_OSC_LENGTH 9
+#define TR_OSC_MASK 0x7FC0
+
+#define TR_HIGHSPEED_OSC_ADDRESS 0x09DA
+#define TR_HIGHSPEED_OSC_OFFSET 5
+#define TR_HIGHSPEED_OSC_LENGTH 1
+#define TR_HIGHSPEED_OSC_MASK 0x0020
+
+#define TR_IREF_SUP_ADDRESS 0x09DA
+#define TR_IREF_SUP_OFFSET 0
+#define TR_IREF_SUP_LENGTH 5
+#define TR_IREF_SUP_MASK 0x001F
 
-#define NV_MLX_TRIM_1_ADDRESS 0x09DA
-#define NV_MLX_TRIM_1_OFFSET 0
-#define NV_MLX_TRIM_1_LENGTH 16
-#define NV_MLX_TRIM_1_MASK 0xFFFF
+#define TR_BGTC_SUP_ADDRESS 0x09D8
+#define TR_BGTC_SUP_OFFSET 11
+#define TR_BGTC_SUP_LENGTH 5
+#define TR_BGTC_SUP_MASK 0xF800
+
+#define TR_BGDC_SUP_ADDRESS 0x09D8
+#define TR_BGDC_SUP_OFFSET 8
+#define TR_BGDC_SUP_LENGTH 3
+#define TR_BGDC_SUP_MASK 0x0700
 
-#define NV_MLX_TRIM_0_ADDRESS 0x09D8
-#define NV_MLX_TRIM_0_OFFSET 0
-#define NV_MLX_TRIM_0_LENGTH 16
-#define NV_MLX_TRIM_0_MASK 0xFFFF
+#define TR_VDDA_SUP_ADDRESS 0x09D8
+#define TR_VDDA_SUP_OFFSET 4
+#define TR_VDDA_SUP_LENGTH 4
+#define TR_VDDA_SUP_MASK 0x00F0
+
+#define TR_VDDD_SUP_ADDRESS 0x09D8
+#define TR_VDDD_SUP_OFFSET 0
+#define TR_VDDD_SUP_LENGTH 4
+#define TR_VDDD_SUP_MASK 0x000F
 
 #define NV_CRC_MLX_CALIBRATION_ADDRESS 0x09D6
 #define NV_CRC_MLX_CALIBRATION_OFFSET 8
@@ -228,10 +378,20 @@
 #define NV_MLX_CALIB_2_LENGTH 16
 #define NV_MLX_CALIB_2_MASK 0xFFFF
 
-#define NV_MLX_CALIB_1_ADDRESS 0x09AA
-#define NV_MLX_CALIB_1_OFFSET 0
-#define NV_MLX_CALIB_1_LENGTH 16
-#define NV_MLX_CALIB_1_MASK 0xFFFF
+#define NV_MAX_CLIM_USER_ADDRESS 0x09AA
+#define NV_MAX_CLIM_USER_OFFSET 0
+#define NV_MAX_CLIM_USER_LENGTH 8
+#define NV_MAX_CLIM_USER_MASK 0x00FF
+
+#define NV_CLIM_GAIN_ADDRESS 0x09A8
+#define NV_CLIM_GAIN_OFFSET 8
+#define NV_CLIM_GAIN_LENGTH 8
+#define NV_CLIM_GAIN_MASK 0xFF00
+
+#define NV_CLIM_OFFSET_ADDRESS 0x09A8
+#define NV_CLIM_OFFSET_OFFSET 0
+#define NV_CLIM_OFFSET_LENGTH 8
+#define NV_CLIM_OFFSET_MASK 0x00FF
 
 #define NV_FREE_89_ADDRESS 0x09A6
 #define NV_FREE_89_OFFSET 0
@@ -1153,6 +1313,11 @@
 #define NV_CUST_ID3_LENGTH 16
 #define NV_CUST_ID3_MASK 0xFFFF
 
+#define NV_FLAT_BLANK_ADDRESS 0x0840
+#define NV_FLAT_BLANK_OFFSET 8
+#define NV_FLAT_BLANK_LENGTH 8
+#define NV_FLAT_BLANK_MASK 0xFF00
+
 #define NV_INTEGRATOR_PRE_DIV_ADDRESS 0x0840
 #define NV_INTEGRATOR_PRE_DIV_OFFSET 5
 #define NV_INTEGRATOR_PRE_DIV_LENGTH 2
@@ -1198,504 +1363,484 @@
 #define NV_ZONE0_RES4_LENGTH 16
 #define NV_ZONE0_RES4_MASK 0xFFFF
 
-#define NV_FG_SLOPECTRL_ADDRESS 0x0834
-#define NV_FG_SLOPECTRL_OFFSET 14
-#define NV_FG_SLOPECTRL_LENGTH 2
-#define NV_FG_SLOPECTRL_MASK 0xC000
-
-#define NV_LVIO_SLOPECTRL_ADDRESS 0x0834
-#define NV_LVIO_SLOPECTRL_OFFSET 12
-#define NV_LVIO_SLOPECTRL_LENGTH 2
-#define NV_LVIO_SLOPECTRL_MASK 0x3000
-
-#define NV_HVIO_SLOPECTRL_ADDRESS 0x0834
-#define NV_HVIO_SLOPECTRL_OFFSET 10
-#define NV_HVIO_SLOPECTRL_LENGTH 2
-#define NV_HVIO_SLOPECTRL_MASK 0x0C00
+#define NV_TARGET_CLIM_USER_PULSES_ADDRESS 0x0836
+#define NV_TARGET_CLIM_USER_PULSES_OFFSET 0
+#define NV_TARGET_CLIM_USER_PULSES_LENGTH 8
+#define NV_TARGET_CLIM_USER_PULSES_MASK 0x00FF
 
-#define NV_I2C_SLAVE_ADDRESS_ADDRESS 0x0834
-#define NV_I2C_SLAVE_ADDRESS_OFFSET 0
-#define NV_I2C_SLAVE_ADDRESS_LENGTH 7
-#define NV_I2C_SLAVE_ADDRESS_MASK 0x007F
-
-#define NV_I2C_DEBUGGING_DISABLED_ADDRESS 0x0832
-#define NV_I2C_DEBUGGING_DISABLED_OFFSET 15
-#define NV_I2C_DEBUGGING_DISABLED_LENGTH 1
-#define NV_I2C_DEBUGGING_DISABLED_MASK 0x8000
-
-#define NV_I2C_TOGGLE_ENTRY_ADDRESS 0x0832
-#define NV_I2C_TOGGLE_ENTRY_OFFSET 14
-#define NV_I2C_TOGGLE_ENTRY_LENGTH 1
-#define NV_I2C_TOGGLE_ENTRY_MASK 0x4000
-
-#define NV_HVIO_PU_PD_CFG_ADDRESS 0x0832
-#define NV_HVIO_PU_PD_CFG_OFFSET 12
-#define NV_HVIO_PU_PD_CFG_LENGTH 2
-#define NV_HVIO_PU_PD_CFG_MASK 0x3000
+#define NV_TARGET_CLIM_USER_BRAKE_ADDRESS 0x0834
+#define NV_TARGET_CLIM_USER_BRAKE_OFFSET 8
+#define NV_TARGET_CLIM_USER_BRAKE_LENGTH 8
+#define NV_TARGET_CLIM_USER_BRAKE_MASK 0xFF00
 
-#define NV_LVIO_PU_PD_CFG_ADDRESS 0x0832
-#define NV_LVIO_PU_PD_CFG_OFFSET 10
-#define NV_LVIO_PU_PD_CFG_LENGTH 2
-#define NV_LVIO_PU_PD_CFG_MASK 0x0C00
-
-#define NV_PWM_PU_PD_CFG_ADDRESS 0x0832
-#define NV_PWM_PU_PD_CFG_OFFSET 8
-#define NV_PWM_PU_PD_CFG_LENGTH 2
-#define NV_PWM_PU_PD_CFG_MASK 0x0300
-
-#define NV_SLEEP_MODE_ENABLED_ADDRESS 0x0832
-#define NV_SLEEP_MODE_ENABLED_OFFSET 7
-#define NV_SLEEP_MODE_ENABLED_LENGTH 1
-#define NV_SLEEP_MODE_ENABLED_MASK 0x0080
+#define NV_TARGET_CLIM_USER_MOTOR_ADDRESS 0x0834
+#define NV_TARGET_CLIM_USER_MOTOR_OFFSET 0
+#define NV_TARGET_CLIM_USER_MOTOR_LENGTH 8
+#define NV_TARGET_CLIM_USER_MOTOR_MASK 0x00FF
 
-#define NV_SLEEP_MODE_POLARITY_ADDRESS 0x0832
-#define NV_SLEEP_MODE_POLARITY_OFFSET 6
-#define NV_SLEEP_MODE_POLARITY_LENGTH 1
-#define NV_SLEEP_MODE_POLARITY_MASK 0x0040
-
-#define NV_DIAG_MODE_CFG_ADDRESS 0x0832
-#define NV_DIAG_MODE_CFG_OFFSET 4
-#define NV_DIAG_MODE_CFG_LENGTH 2
-#define NV_DIAG_MODE_CFG_MASK 0x0030
-
-#define NV_FG_FILTERED_ADDRESS 0x0832
-#define NV_FG_FILTERED_OFFSET 3
-#define NV_FG_FILTERED_LENGTH 1
-#define NV_FG_FILTERED_MASK 0x0008
-
-#define NV_FG_SPEED_ADDRESS 0x0832
-#define NV_FG_SPEED_OFFSET 0
-#define NV_FG_SPEED_LENGTH 3
-#define NV_FG_SPEED_MASK 0x0007
+#define NV_CL_BLANK_SELECT_ADDRESS 0x0832
+#define NV_CL_BLANK_SELECT_OFFSET 8
+#define NV_CL_BLANK_SELECT_LENGTH 6
+#define NV_CL_BLANK_SELECT_MASK 0x3F00
 
-#define NV_FG_RD_ACTIVE_STATE_ADDRESS 0x0830
-#define NV_FG_RD_ACTIVE_STATE_OFFSET 13
-#define NV_FG_RD_ACTIVE_STATE_LENGTH 1
-#define NV_FG_RD_ACTIVE_STATE_MASK 0x2000
-
-#define NV_FG_RD_INIT_LOW_ADDRESS 0x0830
-#define NV_FG_RD_INIT_LOW_OFFSET 12
-#define NV_FG_RD_INIT_LOW_LENGTH 1
-#define NV_FG_RD_INIT_LOW_MASK 0x1000
-
-#define NV_SELECT_FG_RDB_ADDRESS 0x0830
-#define NV_SELECT_FG_RDB_OFFSET 11
-#define NV_SELECT_FG_RDB_LENGTH 1
-#define NV_SELECT_FG_RDB_MASK 0x0800
+#define NV_OC_BLANK_SELECT_ADDRESS 0x0832
+#define NV_OC_BLANK_SELECT_OFFSET 0
+#define NV_OC_BLANK_SELECT_LENGTH 6
+#define NV_OC_BLANK_SELECT_MASK 0x003F
 
-#define NV_HVIO_MODE_CFG_ADDRESS 0x0830
-#define NV_HVIO_MODE_CFG_OFFSET 8
-#define NV_HVIO_MODE_CFG_LENGTH 3
-#define NV_HVIO_MODE_CFG_MASK 0x0700
-
-#define NV_LVIO_MODE_CFG_ADDRESS 0x0830
-#define NV_LVIO_MODE_CFG_OFFSET 5
-#define NV_LVIO_MODE_CFG_LENGTH 3
-#define NV_LVIO_MODE_CFG_MASK 0x00E0
-
-#define NV_FG_MODE_CFG_ADDRESS 0x0830
-#define NV_FG_MODE_CFG_OFFSET 3
-#define NV_FG_MODE_CFG_LENGTH 2
-#define NV_FG_MODE_CFG_MASK 0x0018
-
-#define NV_INPUT_MODE_CFG_ADDRESS 0x0830
-#define NV_INPUT_MODE_CFG_OFFSET 0
-#define NV_INPUT_MODE_CFG_LENGTH 3
-#define NV_INPUT_MODE_CFG_MASK 0x0007
+#define NV_BEMF_HIGH_ADDRESS 0x0830
+#define NV_BEMF_HIGH_OFFSET 0
+#define NV_BEMF_HIGH_LENGTH 12
+#define NV_BEMF_HIGH_MASK 0x0FFF
 
-#define NV_ZONE0_RES9_ADDRESS 0x082E
-#define NV_ZONE0_RES9_OFFSET 0
-#define NV_ZONE0_RES9_LENGTH 16
-#define NV_ZONE0_RES9_MASK 0xFFFF
-
-#define NV_ZONE0_RES10_ADDRESS 0x082C
-#define NV_ZONE0_RES10_OFFSET 0
-#define NV_ZONE0_RES10_LENGTH 16
-#define NV_ZONE0_RES10_MASK 0xFFFF
-
-#define NV_ZONE0_RES11_ADDRESS 0x082A
-#define NV_ZONE0_RES11_OFFSET 0
-#define NV_ZONE0_RES11_LENGTH 16
-#define NV_ZONE0_RES11_MASK 0xFFFF
+#define NV_BEMF_LOW_ADDRESS 0x082E
+#define NV_BEMF_LOW_OFFSET 0
+#define NV_BEMF_LOW_LENGTH 12
+#define NV_BEMF_LOW_MASK 0x0FFF
 
-#define NV_ZONE0_RES12_ADDRESS 0x0828
-#define NV_ZONE0_RES12_OFFSET 0
-#define NV_ZONE0_RES12_LENGTH 16
-#define NV_ZONE0_RES12_MASK 0xFFFF
-
-#define NV_ZONE0_RES13_ADDRESS 0x0826
-#define NV_ZONE0_RES13_OFFSET 0
-#define NV_ZONE0_RES13_LENGTH 16
-#define NV_ZONE0_RES13_MASK 0xFFFF
+#define NV_I_ZC_TH_HIGH_ADDRESS 0x082C
+#define NV_I_ZC_TH_HIGH_OFFSET 0
+#define NV_I_ZC_TH_HIGH_LENGTH 12
+#define NV_I_ZC_TH_HIGH_MASK 0x0FFF
 
-#define NV_ZONE0_RES14_ADDRESS 0x0824
-#define NV_ZONE0_RES14_OFFSET 0
-#define NV_ZONE0_RES14_LENGTH 16
-#define NV_ZONE0_RES14_MASK 0xFFFF
+#define NV_I_ZC_TH_LOW_ADDRESS 0x082A
+#define NV_I_ZC_TH_LOW_OFFSET 0
+#define NV_I_ZC_TH_LOW_LENGTH 12
+#define NV_I_ZC_TH_LOW_MASK 0x0FFF
 
-#define NV_ZONE0_RES15_ADDRESS 0x0822
-#define NV_ZONE0_RES15_OFFSET 0
-#define NV_ZONE0_RES15_LENGTH 16
-#define NV_ZONE0_RES15_MASK 0xFFFF
-
-#define NV_RPM_F_ADDRESS 0x0820
+#define NV_RPM_F_ADDRESS 0x0828
 #define NV_RPM_F_OFFSET 7
 #define NV_RPM_F_LENGTH 9
 #define NV_RPM_F_MASK 0xFF80
 
-#define NV_SPD_F_ADDRESS 0x0820
+#define NV_SPD_F_ADDRESS 0x0828
 #define NV_SPD_F_OFFSET 0
 #define NV_SPD_F_LENGTH 7
 #define NV_SPD_F_MASK 0x007F
 
-#define NV_RPM_E_ADDRESS 0x081E
+#define NV_RPM_E_ADDRESS 0x0826
 #define NV_RPM_E_OFFSET 7
 #define NV_RPM_E_LENGTH 9
 #define NV_RPM_E_MASK 0xFF80
 
-#define NV_SPD_E_ADDRESS 0x081E
+#define NV_SPD_E_ADDRESS 0x0826
 #define NV_SPD_E_OFFSET 0
 #define NV_SPD_E_LENGTH 7
 #define NV_SPD_E_MASK 0x007F
 
-#define NV_RPM_D_ADDRESS 0x081C
+#define NV_RPM_D_ADDRESS 0x0824
 #define NV_RPM_D_OFFSET 7
 #define NV_RPM_D_LENGTH 9
 #define NV_RPM_D_MASK 0xFF80
 
-#define NV_SPD_D_ADDRESS 0x081C
+#define NV_SPD_D_ADDRESS 0x0824
 #define NV_SPD_D_OFFSET 0
 #define NV_SPD_D_LENGTH 7
 #define NV_SPD_D_MASK 0x007F
 
-#define NV_RPM_C_ADDRESS 0x081A
+#define NV_RPM_C_ADDRESS 0x0822
 #define NV_RPM_C_OFFSET 7
 #define NV_RPM_C_LENGTH 9
 #define NV_RPM_C_MASK 0xFF80
 
-#define NV_SPD_C_ADDRESS 0x081A
+#define NV_SPD_C_ADDRESS 0x0822
 #define NV_SPD_C_OFFSET 0
 #define NV_SPD_C_LENGTH 7
 #define NV_SPD_C_MASK 0x007F
 
-#define NV_RPM_B_ADDRESS 0x0818
+#define NV_RPM_B_ADDRESS 0x0820
 #define NV_RPM_B_OFFSET 7
 #define NV_RPM_B_LENGTH 9
 #define NV_RPM_B_MASK 0xFF80
 
-#define NV_SPD_B_ADDRESS 0x0818
+#define NV_SPD_B_ADDRESS 0x0820
 #define NV_SPD_B_OFFSET 0
 #define NV_SPD_B_LENGTH 7
 #define NV_SPD_B_MASK 0x007F
 
-#define NV_RPM_A_ADDRESS 0x0816
+#define NV_RPM_A_ADDRESS 0x081E
 #define NV_RPM_A_OFFSET 7
 #define NV_RPM_A_LENGTH 9
 #define NV_RPM_A_MASK 0xFF80
 
-#define NV_SPD_A_ADDRESS 0x0816
+#define NV_SPD_A_ADDRESS 0x081E
 #define NV_SPD_A_OFFSET 0
 #define NV_SPD_A_LENGTH 7
 #define NV_SPD_A_MASK 0x007F
 
-#define NV_RPM_MAX_ADDRESS 0x0814
+#define NV_RPM_MAX_ADDRESS 0x081C
 #define NV_RPM_MAX_OFFSET 7
 #define NV_RPM_MAX_LENGTH 9
 #define NV_RPM_MAX_MASK 0xFF80
 
-#define NV_SPD_MAX_ADDRESS 0x0814
+#define NV_SPD_MAX_ADDRESS 0x081C
 #define NV_SPD_MAX_OFFSET 0
 #define NV_SPD_MAX_LENGTH 7
 #define NV_SPD_MAX_MASK 0x007F
 
-#define NV_RPM_MIN_ADDRESS 0x0812
+#define NV_RPM_MIN_ADDRESS 0x081A
 #define NV_RPM_MIN_OFFSET 7
 #define NV_RPM_MIN_LENGTH 9
 #define NV_RPM_MIN_MASK 0xFF80
 
-#define NV_SPD_MIN_ADDRESS 0x0812
+#define NV_SPD_MIN_ADDRESS 0x081A
 #define NV_SPD_MIN_OFFSET 0
 #define NV_SPD_MIN_LENGTH 7
 #define NV_SPD_MIN_MASK 0x007F
 
-#define NV_DUTY_RAMPING_ADDRESS 0x0810
+#define NV_DUTY_RAMPING_ADDRESS 0x0818
 #define NV_DUTY_RAMPING_OFFSET 15
 #define NV_DUTY_RAMPING_LENGTH 1
 #define NV_DUTY_RAMPING_MASK 0x8000
 
-#define NV_ILIM_RAMPING_ADDRESS 0x0810
+#define NV_ILIM_RAMPING_ADDRESS 0x0818
 #define NV_ILIM_RAMPING_OFFSET 14
 #define NV_ILIM_RAMPING_LENGTH 1
 #define NV_ILIM_RAMPING_MASK 0x4000
 
-#define NV_DC_OPENLOOP_SR_ADDRESS 0x0810
+#define NV_DC_OPENLOOP_SR_ADDRESS 0x0818
 #define NV_DC_OPENLOOP_SR_OFFSET 12
 #define NV_DC_OPENLOOP_SR_LENGTH 2
 #define NV_DC_OPENLOOP_SR_MASK 0x3000
 
-#define NV_DC_OPENLOOP_INI_ADDRESS 0x0810
+#define NV_DC_OPENLOOP_INI_ADDRESS 0x0818
 #define NV_DC_OPENLOOP_INI_OFFSET 10
 #define NV_DC_OPENLOOP_INI_LENGTH 2
 #define NV_DC_OPENLOOP_INI_MASK 0x0C00
 
-#define NV_SPD_KI_ADDRESS 0x0810
+#define NV_SPD_KI_ADDRESS 0x0818
 #define NV_SPD_KI_OFFSET 7
 #define NV_SPD_KI_LENGTH 3
 #define NV_SPD_KI_MASK 0x0380
 
-#define NV_SPD_KP_ADDRESS 0x0810
+#define NV_SPD_KP_ADDRESS 0x0818
 #define NV_SPD_KP_OFFSET 4
 #define NV_SPD_KP_LENGTH 3
 #define NV_SPD_KP_MASK 0x0070
 
-#define NV_SPD_HC_HYST_ADDRESS 0x0810
+#define NV_SPD_HC_HYST_ADDRESS 0x0818
 #define NV_SPD_HC_HYST_OFFSET 2
 #define NV_SPD_HC_HYST_LENGTH 2
 #define NV_SPD_HC_HYST_MASK 0x000C
 
-#define NV_SPD_LC_HYST_ADDRESS 0x0810
+#define NV_SPD_LC_HYST_ADDRESS 0x0818
 #define NV_SPD_LC_HYST_OFFSET 0
 #define NV_SPD_LC_HYST_LENGTH 2
 #define NV_SPD_LC_HYST_MASK 0x0003
 
-#define NV_SPDIN_MODE_ADDRESS 0x080E
-#define NV_SPDIN_MODE_OFFSET 14
-#define NV_SPDIN_MODE_LENGTH 2
-#define NV_SPDIN_MODE_MASK 0xC000
-
-#define NV_SPD_BOOST_ADDRESS 0x080E
+#define NV_SPD_BOOST_ADDRESS 0x0816
 #define NV_SPD_BOOST_OFFSET 13
 #define NV_SPD_BOOST_LENGTH 1
 #define NV_SPD_BOOST_MASK 0x2000
 
-#define NV_SPD_BOOST_SS_ADDRESS 0x080E
+#define NV_SPD_BOOST_SS_ADDRESS 0x0816
 #define NV_SPD_BOOST_SS_OFFSET 12
 #define NV_SPD_BOOST_SS_LENGTH 1
 #define NV_SPD_BOOST_SS_MASK 0x1000
 
-#define NV_SPD_CTRL_1_RESERVED_ADDRESS 0x080E
+#define NV_SPD_CTRL_1_RESERVED_ADDRESS 0x0816
 #define NV_SPD_CTRL_1_RESERVED_OFFSET 11
 #define NV_SPD_CTRL_1_RESERVED_LENGTH 1
 #define NV_SPD_CTRL_1_RESERVED_MASK 0x0800
 
-#define NV_SPD_LOOP_MODE_ADDRESS 0x080E
+#define NV_SPD_LOOP_MODE_ADDRESS 0x0816
 #define NV_SPD_LOOP_MODE_OFFSET 10
 #define NV_SPD_LOOP_MODE_LENGTH 1
 #define NV_SPD_LOOP_MODE_MASK 0x0400
 
-#define NV_RPM_LC_ADDRESS 0x080E
+#define NV_RPM_LC_ADDRESS 0x0816
 #define NV_RPM_LC_OFFSET 9
 #define NV_RPM_LC_LENGTH 1
 #define NV_RPM_LC_MASK 0x0200
 
-#define NV_RPM_HC_ADDRESS 0x080E
+#define NV_RPM_HC_ADDRESS 0x0816
 #define NV_RPM_HC_OFFSET 8
 #define NV_RPM_HC_LENGTH 1
 #define NV_RPM_HC_MASK 0x0100
 
-#define NV_SPD_LC_VAL_ADDRESS 0x080E
+#define NV_SPD_LC_VAL_ADDRESS 0x0816
 #define NV_SPD_LC_VAL_OFFSET 6
 #define NV_SPD_LC_VAL_LENGTH 2
 #define NV_SPD_LC_VAL_MASK 0x00C0
 
-#define NV_SPD_HC_VAL_ADDRESS 0x080E
+#define NV_SPD_HC_VAL_ADDRESS 0x0816
 #define NV_SPD_HC_VAL_OFFSET 4
 #define NV_SPD_HC_VAL_LENGTH 2
 #define NV_SPD_HC_VAL_MASK 0x0030
 
-#define NV_CURVE_MODE_ADDRESS 0x080E
+#define NV_CURVE_MODE_ADDRESS 0x0816
 #define NV_CURVE_MODE_OFFSET 2
 #define NV_CURVE_MODE_LENGTH 2
 #define NV_CURVE_MODE_MASK 0x000C
 
-#define NV_SPD_TICK_ADDRESS 0x080E
+#define NV_SPD_TICK_ADDRESS 0x0816
 #define NV_SPD_TICK_OFFSET 0
 #define NV_SPD_TICK_LENGTH 2
 #define NV_SPD_TICK_MASK 0x0003
 
-#define NV_MIN_EHP_RESERVED_ADDRESS 0x080C
+#define NV_MIN_EHP_RESERVED_ADDRESS 0x0814
 #define NV_MIN_EHP_RESERVED_OFFSET 15
 #define NV_MIN_EHP_RESERVED_LENGTH 1
 #define NV_MIN_EHP_RESERVED_MASK 0x8000
 
-#define NV_EHP_TIMER_PRESCALER_ADDRESS 0x080C
+#define NV_EHP_TIMER_PRESCALER_ADDRESS 0x0814
 #define NV_EHP_TIMER_PRESCALER_OFFSET 13
 #define NV_EHP_TIMER_PRESCALER_LENGTH 2
 #define NV_EHP_TIMER_PRESCALER_MASK 0x6000
 
-#define NV_EHP_FULL_RANGE_ADDRESS 0x080C
+#define NV_EHP_FULL_RANGE_ADDRESS 0x0814
 #define NV_EHP_FULL_RANGE_OFFSET 0
 #define NV_EHP_FULL_RANGE_LENGTH 13
 #define NV_EHP_FULL_RANGE_MASK 0x1FFF
 
-#define NV_RESERVED2_ADDRESS 0x080A
-#define NV_RESERVED2_OFFSET 0
-#define NV_RESERVED2_LENGTH 16
-#define NV_RESERVED2_MASK 0xFFFF
-
-#define NV_I_ZC_TH_HIGH_ADDRESS 0x0808
-#define NV_I_ZC_TH_HIGH_OFFSET 12
-#define NV_I_ZC_TH_HIGH_LENGTH 4
-#define NV_I_ZC_TH_HIGH_MASK 0xF000
+#define NV_DI_TH_1ST_ADDRESS 0x0812
+#define NV_DI_TH_1ST_OFFSET 0
+#define NV_DI_TH_1ST_LENGTH 12
+#define NV_DI_TH_1ST_MASK 0x0FFF
 
-#define NV_I_ZC_TH_LOW_ADDRESS 0x0808
-#define NV_I_ZC_TH_LOW_OFFSET 8
-#define NV_I_ZC_TH_LOW_LENGTH 4
-#define NV_I_ZC_TH_LOW_MASK 0x0F00
+#define NV_DI_TH_2ND_ADDRESS 0x0810
+#define NV_DI_TH_2ND_OFFSET 0
+#define NV_DI_TH_2ND_LENGTH 12
+#define NV_DI_TH_2ND_MASK 0x0FFF
 
-#define NV_DI_TH_1ST_ADDRESS 0x0808
-#define NV_DI_TH_1ST_OFFSET 4
-#define NV_DI_TH_1ST_LENGTH 4
-#define NV_DI_TH_1ST_MASK 0x00F0
-
-#define NV_DI_TH_2ND_ADDRESS 0x0808
-#define NV_DI_TH_2ND_OFFSET 0
-#define NV_DI_TH_2ND_LENGTH 4
-#define NV_DI_TH_2ND_MASK 0x000F
-
-#define NV_QUICK_START_ADDRESS 0x0806
+#define NV_QUICK_START_ADDRESS 0x080E
 #define NV_QUICK_START_OFFSET 15
 #define NV_QUICK_START_LENGTH 1
 #define NV_QUICK_START_MASK 0x8000
 
-#define NV_WIND_START_ADDRESS 0x0806
+#define NV_WIND_START_ADDRESS 0x080E
 #define NV_WIND_START_OFFSET 14
 #define NV_WIND_START_LENGTH 1
 #define NV_WIND_START_MASK 0x4000
 
-#define NV_WIND_BRAKE_RESERVED_ADDRESS 0x0806
+#define NV_WIND_BRAKE_RESERVED_ADDRESS 0x080E
 #define NV_WIND_BRAKE_RESERVED_OFFSET 9
 #define NV_WIND_BRAKE_RESERVED_LENGTH 5
 #define NV_WIND_BRAKE_RESERVED_MASK 0x3E00
 
-#define NV_SOFT_NUM_STEP_ADDRESS 0x0806
+#define NV_SOFT_NUM_STEP_ADDRESS 0x080E
 #define NV_SOFT_NUM_STEP_OFFSET 6
 #define NV_SOFT_NUM_STEP_LENGTH 3
 #define NV_SOFT_NUM_STEP_MASK 0x01C0
 
-#define NV_WIND_WINDOW_ADDRESS 0x0806
+#define NV_WIND_WINDOW_ADDRESS 0x080E
 #define NV_WIND_WINDOW_OFFSET 3
 #define NV_WIND_WINDOW_LENGTH 3
 #define NV_WIND_WINDOW_MASK 0x0038
 
-#define NV_BRAKE_WINDOW_ADDRESS 0x0806
+#define NV_BRAKE_WINDOW_ADDRESS 0x080E
 #define NV_BRAKE_WINDOW_OFFSET 0
 #define NV_BRAKE_WINDOW_LENGTH 3
 #define NV_BRAKE_WINDOW_MASK 0x0007
 
-#define NV_SINGLE_PULSE_START_ADDRESS 0x0804
+#define NV_SINGLE_PULSE_START_ADDRESS 0x080C
 #define NV_SINGLE_PULSE_START_OFFSET 15
 #define NV_SINGLE_PULSE_START_LENGTH 1
 #define NV_SINGLE_PULSE_START_MASK 0x8000
 
-#define NV_LONG_START_ADDRESS 0x0804
+#define NV_LONG_START_ADDRESS 0x080C
 #define NV_LONG_START_OFFSET 14
 #define NV_LONG_START_LENGTH 1
 #define NV_LONG_START_MASK 0x4000
 
-#define NV_SOFT_START_ADDRESS 0x0804
+#define NV_SOFT_START_ADDRESS 0x080C
 #define NV_SOFT_START_OFFSET 13
 #define NV_SOFT_START_LENGTH 1
 #define NV_SOFT_START_MASK 0x2000
 
-#define NV_COMM_START_NUM_ADDRESS 0x0804
+#define NV_COMM_START_NUM_ADDRESS 0x080C
 #define NV_COMM_START_NUM_OFFSET 11
 #define NV_COMM_START_NUM_LENGTH 2
 #define NV_COMM_START_NUM_MASK 0x1800
 
-#define NV_START_DUTY_ADDRESS 0x0804
+#define NV_START_DUTY_ADDRESS 0x080C
 #define NV_START_DUTY_OFFSET 9
 #define NV_START_DUTY_LENGTH 2
 #define NV_START_DUTY_MASK 0x0600
 
-#define NV_SOFT_STEP_SIZE_ADDRESS 0x0804
+#define NV_SOFT_STEP_SIZE_ADDRESS 0x080C
 #define NV_SOFT_STEP_SIZE_OFFSET 6
 #define NV_SOFT_STEP_SIZE_LENGTH 3
 #define NV_SOFT_STEP_SIZE_MASK 0x01C0
 
-#define NV_START_UP_TIME_ADDRESS 0x0804
+#define NV_START_UP_TIME_ADDRESS 0x080C
 #define NV_START_UP_TIME_OFFSET 0
 #define NV_START_UP_TIME_LENGTH 6
 #define NV_START_UP_TIME_MASK 0x003F
 
-#define NV_POSITION_DUTY_ADDRESS 0x0802
+#define NV_POSITION_DUTY_ADDRESS 0x080A
 #define NV_POSITION_DUTY_OFFSET 14
 #define NV_POSITION_DUTY_LENGTH 2
 #define NV_POSITION_DUTY_MASK 0xC000
 
-#define NV_POSITION_PULSE_TIME_ADDRESS 0x0802
+#define NV_POSITION_PULSE_TIME_ADDRESS 0x080A
 #define NV_POSITION_PULSE_TIME_OFFSET 9
 #define NV_POSITION_PULSE_TIME_LENGTH 5
 #define NV_POSITION_PULSE_TIME_MASK 0x3E00
 
-#define NV_POSI_MAJO_VOTE_ADDRESS 0x0802
+#define NV_POSI_MAJO_VOTE_ADDRESS 0x080A
 #define NV_POSI_MAJO_VOTE_OFFSET 8
 #define NV_POSI_MAJO_VOTE_LENGTH 1
 #define NV_POSI_MAJO_VOTE_MASK 0x0100
 
-#define NV_ANTI_COG_ADDRESS 0x0802
+#define NV_ANTI_COG_ADDRESS 0x080A
 #define NV_ANTI_COG_OFFSET 7
 #define NV_ANTI_COG_LENGTH 1
 #define NV_ANTI_COG_MASK 0x0080
 
-#define NV_POSITION_RESERVED_ADDRESS 0x0802
+#define NV_POSITION_RESERVED_ADDRESS 0x080A
 #define NV_POSITION_RESERVED_OFFSET 6
 #define NV_POSITION_RESERVED_LENGTH 1
 #define NV_POSITION_RESERVED_MASK 0x0040
 
-#define NV_FIRST_NON_FLAT_TIME_ADDRESS 0x0802
+#define NV_FIRST_NON_FLAT_TIME_ADDRESS 0x080A
 #define NV_FIRST_NON_FLAT_TIME_OFFSET 0
 #define NV_FIRST_NON_FLAT_TIME_LENGTH 6
 #define NV_FIRST_NON_FLAT_TIME_MASK 0x003F
 
-#define NV_FG_FILTER_ADDRESS 0x0800
-#define NV_FG_FILTER_OFFSET 15
-#define NV_FG_FILTER_LENGTH 1
-#define NV_FG_FILTER_MASK 0x8000
+#define NV_ROUGH_REG_ADDRESS 0x0808
+#define NV_ROUGH_REG_OFFSET 14
+#define NV_ROUGH_REG_LENGTH 1
+#define NV_ROUGH_REG_MASK 0x4000
 
-#define NV_RD_ADDRESS 0x0800
-#define NV_RD_OFFSET 14
-#define NV_RD_LENGTH 1
-#define NV_RD_MASK 0x4000
-
-#define NV_ADC_FLAT_FILT_DEP_ADDRESS 0x0800
+#define NV_ADC_FLAT_FILT_DEP_ADDRESS 0x0808
 #define NV_ADC_FLAT_FILT_DEP_OFFSET 12
 #define NV_ADC_FLAT_FILT_DEP_LENGTH 2
 #define NV_ADC_FLAT_FILT_DEP_MASK 0x3000
 
-#define NV_EHP_REG_GAIN_ADDRESS 0x0800
+#define NV_EHP_REG_GAIN_ADDRESS 0x0808
 #define NV_EHP_REG_GAIN_OFFSET 10
 #define NV_EHP_REG_GAIN_LENGTH 2
 #define NV_EHP_REG_GAIN_MASK 0x0C00
 
-#define NV_ROUGH_GAIN_ADDRESS 0x0800
+#define NV_ROUGH_GAIN_ADDRESS 0x0808
 #define NV_ROUGH_GAIN_OFFSET 9
 #define NV_ROUGH_GAIN_LENGTH 1
 #define NV_ROUGH_GAIN_MASK 0x0200
 
-#define NV_PWM_MOD_ADDRESS 0x0800
+#define NV_PWM_MOD_ADDRESS 0x0808
 #define NV_PWM_MOD_OFFSET 8
 #define NV_PWM_MOD_LENGTH 1
 #define NV_PWM_MOD_MASK 0x0100
 
-#define NV_PWM_36K_ADDRESS 0x0800
-#define NV_PWM_36K_OFFSET 7
-#define NV_PWM_36K_LENGTH 1
-#define NV_PWM_36K_MASK 0x0080
+#define NV_PWM_50K_ADDRESS 0x0808
+#define NV_PWM_50K_OFFSET 7
+#define NV_PWM_50K_LENGTH 1
+#define NV_PWM_50K_MASK 0x0080
+
+#define NV_SS_RISE_MODE_ADDRESS 0x0808
+#define NV_SS_RISE_MODE_OFFSET 3
+#define NV_SS_RISE_MODE_LENGTH 3
+#define NV_SS_RISE_MODE_MASK 0x0038
+
+#define NV_SS_FALL_MODE_ADDRESS 0x0808
+#define NV_SS_FALL_MODE_OFFSET 0
+#define NV_SS_FALL_MODE_LENGTH 3
+#define NV_SS_FALL_MODE_MASK 0x0007
+
+#define NV_FG_SLOPECTRL_ADDRESS 0x0804
+#define NV_FG_SLOPECTRL_OFFSET 14
+#define NV_FG_SLOPECTRL_LENGTH 2
+#define NV_FG_SLOPECTRL_MASK 0xC000
+
+#define NV_LVIO_SLOPECTRL_ADDRESS 0x0804
+#define NV_LVIO_SLOPECTRL_OFFSET 12
+#define NV_LVIO_SLOPECTRL_LENGTH 2
+#define NV_LVIO_SLOPECTRL_MASK 0x3000
+
+#define NV_HVIO_SLOPECTRL_ADDRESS 0x0804
+#define NV_HVIO_SLOPECTRL_OFFSET 10
+#define NV_HVIO_SLOPECTRL_LENGTH 2
+#define NV_HVIO_SLOPECTRL_MASK 0x0C00
 
-#define NV_FG_DIV_MODE_ADDRESS 0x0800
-#define NV_FG_DIV_MODE_OFFSET 5
-#define NV_FG_DIV_MODE_LENGTH 2
-#define NV_FG_DIV_MODE_MASK 0x0060
+#define NV_I2C_SLAVE_ADDRESS_ADDRESS 0x0804
+#define NV_I2C_SLAVE_ADDRESS_OFFSET 0
+#define NV_I2C_SLAVE_ADDRESS_LENGTH 7
+#define NV_I2C_SLAVE_ADDRESS_MASK 0x007F
+
+#define NV_I2C_DEBUGGING_DISABLED_ADDRESS 0x0802
+#define NV_I2C_DEBUGGING_DISABLED_OFFSET 15
+#define NV_I2C_DEBUGGING_DISABLED_LENGTH 1
+#define NV_I2C_DEBUGGING_DISABLED_MASK 0x8000
+
+#define NV_I2C_TOGGLE_ENTRY_ADDRESS 0x0802
+#define NV_I2C_TOGGLE_ENTRY_OFFSET 14
+#define NV_I2C_TOGGLE_ENTRY_LENGTH 1
+#define NV_I2C_TOGGLE_ENTRY_MASK 0x4000
+
+#define NV_HVIO_PU_PD_CFG_ADDRESS 0x0802
+#define NV_HVIO_PU_PD_CFG_OFFSET 12
+#define NV_HVIO_PU_PD_CFG_LENGTH 2
+#define NV_HVIO_PU_PD_CFG_MASK 0x3000
+
+#define NV_LVIO_PU_PD_CFG_ADDRESS 0x0802
+#define NV_LVIO_PU_PD_CFG_OFFSET 10
+#define NV_LVIO_PU_PD_CFG_LENGTH 2
+#define NV_LVIO_PU_PD_CFG_MASK 0x0C00
+
+#define NV_PWM_PU_PD_CFG_ADDRESS 0x0802
+#define NV_PWM_PU_PD_CFG_OFFSET 8
+#define NV_PWM_PU_PD_CFG_LENGTH 2
+#define NV_PWM_PU_PD_CFG_MASK 0x0300
 
-#define NV_BEMF_ZC_HYST_ADDRESS 0x0800
-#define NV_BEMF_ZC_HYST_OFFSET 3
-#define NV_BEMF_ZC_HYST_LENGTH 2
-#define NV_BEMF_ZC_HYST_MASK 0x0018
+#define NV_SLEEP_MODE_ENABLED_ADDRESS 0x0802
+#define NV_SLEEP_MODE_ENABLED_OFFSET 7
+#define NV_SLEEP_MODE_ENABLED_LENGTH 1
+#define NV_SLEEP_MODE_ENABLED_MASK 0x0080
+
+#define NV_SLEEP_MODE_POLARITY_ADDRESS 0x0802
+#define NV_SLEEP_MODE_POLARITY_OFFSET 6
+#define NV_SLEEP_MODE_POLARITY_LENGTH 1
+#define NV_SLEEP_MODE_POLARITY_MASK 0x0040
+
+#define NV_DIAG_MODE_CFG_ADDRESS 0x0802
+#define NV_DIAG_MODE_CFG_OFFSET 4
+#define NV_DIAG_MODE_CFG_LENGTH 2
+#define NV_DIAG_MODE_CFG_MASK 0x0030
+
+#define NV_FG_FILTERED_ADDRESS 0x0802
+#define NV_FG_FILTERED_OFFSET 3
+#define NV_FG_FILTERED_LENGTH 1
+#define NV_FG_FILTERED_MASK 0x0008
+
+#define NV_FG_SPEED_ADDRESS 0x0802
+#define NV_FG_SPEED_OFFSET 0
+#define NV_FG_SPEED_LENGTH 3
+#define NV_FG_SPEED_MASK 0x0007
+
+#define NV_FG_RD_ACTIVE_STATE_ADDRESS 0x0800
+#define NV_FG_RD_ACTIVE_STATE_OFFSET 13
+#define NV_FG_RD_ACTIVE_STATE_LENGTH 1
+#define NV_FG_RD_ACTIVE_STATE_MASK 0x2000
 
-#define NV_FLAT_BANK_ADDRESS 0x0800
-#define NV_FLAT_BANK_OFFSET 0
-#define NV_FLAT_BANK_LENGTH 3
-#define NV_FLAT_BANK_MASK 0x0007
+#define NV_FG_RD_INIT_LOW_ADDRESS 0x0800
+#define NV_FG_RD_INIT_LOW_OFFSET 12
+#define NV_FG_RD_INIT_LOW_LENGTH 1
+#define NV_FG_RD_INIT_LOW_MASK 0x1000
+
+#define NV_SELECT_RD_FGB_ADDRESS 0x0800
+#define NV_SELECT_RD_FGB_OFFSET 11
+#define NV_SELECT_RD_FGB_LENGTH 1
+#define NV_SELECT_RD_FGB_MASK 0x0800
+
+#define NV_HVIO_MODE_CFG_ADDRESS 0x0800
+#define NV_HVIO_MODE_CFG_OFFSET 8
+#define NV_HVIO_MODE_CFG_LENGTH 3
+#define NV_HVIO_MODE_CFG_MASK 0x0700
+
+#define NV_LVIO_MODE_CFG_ADDRESS 0x0800
+#define NV_LVIO_MODE_CFG_OFFSET 5
+#define NV_LVIO_MODE_CFG_LENGTH 3
+#define NV_LVIO_MODE_CFG_MASK 0x00E0
+
+#define NV_FG_MODE_CFG_ADDRESS 0x0800
+#define NV_FG_MODE_CFG_OFFSET 3
+#define NV_FG_MODE_CFG_LENGTH 2
+#define NV_FG_MODE_CFG_MASK 0x0018
+
+#define NV_INPUT_MODE_CFG_ADDRESS 0x0800
+#define NV_INPUT_MODE_CFG_OFFSET 0
+#define NV_INPUT_MODE_CFG_LENGTH 3
+#define NV_INPUT_MODE_CFG_MASK 0x0007