Diff: nv_bitfield_map.h

Revision:

20:26e934452728

Parent:

15:83bbc18cccbc

--- a/nv_bitfield_map.h	Fri May 28 13:49:23 2021 +0000
+++ b/nv_bitfield_map.h	Fri Jun 04 08:21:10 2021 +0000
@@ -43,136 +43,156 @@
 #define NV_CRC_MLX_TRIMMING_LENGTH 8
 #define NV_CRC_MLX_TRIMMING_MASK 0xFF00
 
-#define NV_DRVMOD_OSC_DIV4_EN_DRV_ADDRESS 0x09F4
+#define NV_CLAMP_RES_HIGH_DELAY_DRV_ADDRESS 0x09F4
+#define NV_CLAMP_RES_HIGH_DELAY_DRV_OFFSET 15
+#define NV_CLAMP_RES_HIGH_DELAY_DRV_LENGTH 1
+#define NV_CLAMP_RES_HIGH_DELAY_DRV_MASK 0x8000
+
+#define NV_VS_UVDET_HYST_SUP_ADDRESS 0x09F4
+#define NV_VS_UVDET_HYST_SUP_OFFSET 14
+#define NV_VS_UVDET_HYST_SUP_LENGTH 1
+#define NV_VS_UVDET_HYST_SUP_MASK 0x4000
+
+#define NV_VS_UVDET_SEL_SUP_ADDRESS 0x09F4
+#define NV_VS_UVDET_SEL_SUP_OFFSET 11
+#define NV_VS_UVDET_SEL_SUP_LENGTH 3
+#define NV_VS_UVDET_SEL_SUP_MASK 0x3800
+
+#define NV_OC_ADJ_DRV_ADDRESS 0x09F4
+#define NV_OC_ADJ_DRV_OFFSET 10
+#define NV_OC_ADJ_DRV_LENGTH 1
+#define NV_OC_ADJ_DRV_MASK 0x0400
+
+#define NV_OC_ONDET_ENABLE_DRV_ADDRESS 0x09F4
+#define NV_OC_ONDET_ENABLE_DRV_OFFSET 9
+#define NV_OC_ONDET_ENABLE_DRV_LENGTH 1
+#define NV_OC_ONDET_ENABLE_DRV_MASK 0x0200
+
+#define NV_CL_ONDET_ENABLE_DRV_ADDRESS 0x09F4
+#define NV_CL_ONDET_ENABLE_DRV_OFFSET 8
+#define NV_CL_ONDET_ENABLE_DRV_LENGTH 1
+#define NV_CL_ONDET_ENABLE_DRV_MASK 0x0100
+
+#define NV_OV_BLANK_OPTION_ADDRESS 0x09F4
+#define NV_OV_BLANK_OPTION_OFFSET 6
+#define NV_OV_BLANK_OPTION_LENGTH 2
+#define NV_OV_BLANK_OPTION_MASK 0x00C0
+
+#define NV_OV_BLANK_TIMER_DIS_ADDRESS 0x09F4
+#define NV_OV_BLANK_TIMER_DIS_OFFSET 5
+#define NV_OV_BLANK_TIMER_DIS_LENGTH 1
+#define NV_OV_BLANK_TIMER_DIS_MASK 0x0020
+
+#define NV_OV_BLANK_DIS_ADDRESS 0x09F4
+#define NV_OV_BLANK_DIS_OFFSET 4
+#define NV_OV_BLANK_DIS_LENGTH 1
+#define NV_OV_BLANK_DIS_MASK 0x0010
+
+#define NV_OV_TIMEBASE_SELECT_ADDRESS 0x09F4
+#define NV_OV_TIMEBASE_SELECT_OFFSET 2
+#define NV_OV_TIMEBASE_SELECT_LENGTH 2
+#define NV_OV_TIMEBASE_SELECT_MASK 0x000C
+
+#define NV_VS_OVDET_SEL_SUP_ADDRESS 0x09F4
+#define NV_VS_OVDET_SEL_SUP_OFFSET 0
+#define NV_VS_OVDET_SEL_SUP_LENGTH 2
+#define NV_VS_OVDET_SEL_SUP_MASK 0x0003
+
+#define NV_DRV_MODE_SEL_DRV_ADDRESS 0x09F2
+#define NV_DRV_MODE_SEL_DRV_OFFSET 14
+#define NV_DRV_MODE_SEL_DRV_LENGTH 1
+#define NV_DRV_MODE_SEL_DRV_MASK 0x4000
+
+#define NV_DRVMOD_OSC_DIV4_EN_DRV_ADDRESS 0x09F2
 #define NV_DRVMOD_OSC_DIV4_EN_DRV_OFFSET 13
 #define NV_DRVMOD_OSC_DIV4_EN_DRV_LENGTH 1
 #define NV_DRVMOD_OSC_DIV4_EN_DRV_MASK 0x2000
 
-#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_ADDRESS 0x09F4
+#define NV_DRVMOD_OSC_DIV4_SETTING_DRV_ADDRESS 0x09F2
 #define NV_DRVMOD_OSC_DIV4_SETTING_DRV_OFFSET 12
 #define NV_DRVMOD_OSC_DIV4_SETTING_DRV_LENGTH 1
 #define NV_DRVMOD_OSC_DIV4_SETTING_DRV_MASK 0x1000
 
-#define NV_HS_BOOST_PD_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_BOOST_PD_MODE_DRV_ADDRESS 0x09F2
 #define NV_HS_BOOST_PD_MODE_DRV_OFFSET 10
 #define NV_HS_BOOST_PD_MODE_DRV_LENGTH 2
 #define NV_HS_BOOST_PD_MODE_DRV_MASK 0x0C00
 
-#define NV_HS_BOOST_PU_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_BOOST_PU_MODE_DRV_ADDRESS 0x09F2
 #define NV_HS_BOOST_PU_MODE_DRV_OFFSET 8
 #define NV_HS_BOOST_PU_MODE_DRV_LENGTH 2
 #define NV_HS_BOOST_PU_MODE_DRV_MASK 0x0300
 
-#define NV_HS_HIGH_I_MODE_DRV_ADDRESS 0x09F4
+#define NV_HS_HIGH_I_MODE_DRV_ADDRESS 0x09F2
 #define NV_HS_HIGH_I_MODE_DRV_OFFSET 6
 #define NV_HS_HIGH_I_MODE_DRV_LENGTH 2
 #define NV_HS_HIGH_I_MODE_DRV_MASK 0x00C0
 
-#define NV_HS_ONSW_DELAY_ENABLE_DRV_ADDRESS 0x09F4
+#define NV_HS_ONSW_DELAY_ENABLE_DRV_ADDRESS 0x09F2
 #define NV_HS_ONSW_DELAY_ENABLE_DRV_OFFSET 5
 #define NV_HS_ONSW_DELAY_ENABLE_DRV_LENGTH 1
 #define NV_HS_ONSW_DELAY_ENABLE_DRV_MASK 0x0020
 
-#define NV_LS_BOOST_MODE_DRV_ADDRESS 0x09F4
+#define NV_LS_BOOST_MODE_DRV_ADDRESS 0x09F2
 #define NV_LS_BOOST_MODE_DRV_OFFSET 3
 #define NV_LS_BOOST_MODE_DRV_LENGTH 2
 #define NV_LS_BOOST_MODE_DRV_MASK 0x0018
 
-#define NV_LS_HIGH_I_MODE_DRV_ADDRESS 0x09F4
+#define NV_LS_HIGH_I_MODE_DRV_ADDRESS 0x09F2
 #define NV_LS_HIGH_I_MODE_DRV_OFFSET 1
 #define NV_LS_HIGH_I_MODE_DRV_LENGTH 2
 #define NV_LS_HIGH_I_MODE_DRV_MASK 0x0006
 
-#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_ADDRESS 0x09F4
+#define NV_DISABLE_DRVSUP_STARTLOAD_DRV_ADDRESS 0x09F2
 #define NV_DISABLE_DRVSUP_STARTLOAD_DRV_OFFSET 0
 #define NV_DISABLE_DRVSUP_STARTLOAD_DRV_LENGTH 1
 #define NV_DISABLE_DRVSUP_STARTLOAD_DRV_MASK 0x0001
 
-#define NV_DRV_MODE_SEL_DRV_ADDRESS 0x09F2
-#define NV_DRV_MODE_SEL_DRV_OFFSET 15
-#define NV_DRV_MODE_SEL_DRV_LENGTH 1
-#define NV_DRV_MODE_SEL_DRV_MASK 0x8000
-
-#define NV_OC_ADJ_DRV_ADDRESS 0x09F2
-#define NV_OC_ADJ_DRV_OFFSET 13
-#define NV_OC_ADJ_DRV_LENGTH 2
-#define NV_OC_ADJ_DRV_MASK 0x6000
-
-#define NV_OV_BLANK_OPTION_ADDRESS 0x09F2
-#define NV_OV_BLANK_OPTION_OFFSET 7
-#define NV_OV_BLANK_OPTION_LENGTH 2
-#define NV_OV_BLANK_OPTION_MASK 0x0180
-
-#define NV_OV_BLANK_TIMER_DIS_ADDRESS 0x09F2
-#define NV_OV_BLANK_TIMER_DIS_OFFSET 6
-#define NV_OV_BLANK_TIMER_DIS_LENGTH 1
-#define NV_OV_BLANK_TIMER_DIS_MASK 0x0040
-
-#define NV_OV_BLANK_DIS_ADDRESS 0x09F2
-#define NV_OV_BLANK_DIS_OFFSET 5
-#define NV_OV_BLANK_DIS_LENGTH 1
-#define NV_OV_BLANK_DIS_MASK 0x0020
-
-#define NV_OV_TIMEBASE_SELECT_ADDRESS 0x09F2
-#define NV_OV_TIMEBASE_SELECT_OFFSET 3
-#define NV_OV_TIMEBASE_SELECT_LENGTH 2
-#define NV_OV_TIMEBASE_SELECT_MASK 0x0018
-
-#define NV_VS_OVDET_SEL_SUP_ADDRESS 0x09F2
-#define NV_VS_OVDET_SEL_SUP_OFFSET 0
-#define NV_VS_OVDET_SEL_SUP_LENGTH 3
-#define NV_VS_OVDET_SEL_SUP_MASK 0x0007
-
-#define NV_OTP_VPP_SETUP_TIME_ADDRESS 0x09F0
+#define NV_THR_SEL_OTD_MISC_ADDRESS 0x09F0
+#define NV_THR_SEL_OTD_MISC_OFFSET 0
+#define NV_THR_SEL_OTD_MISC_LENGTH 3
+#define NV_THR_SEL_OTD_MISC_MASK 0x0007
+
+#define NV_OTP_VPP_SETUP_TIME_ADDRESS 0x09EC
 #define NV_OTP_VPP_SETUP_TIME_OFFSET 5
 #define NV_OTP_VPP_SETUP_TIME_LENGTH 5
 #define NV_OTP_VPP_SETUP_TIME_MASK 0x03E0
 
-#define NV_OTP_PROGRAM_WIDTH_ADDRESS 0x09F0
+#define NV_OTP_PROGRAM_WIDTH_ADDRESS 0x09EC
 #define NV_OTP_PROGRAM_WIDTH_OFFSET 0
 #define NV_OTP_PROGRAM_WIDTH_LENGTH 5
 #define NV_OTP_PROGRAM_WIDTH_MASK 0x001F
 
-#define NV_OTP_USETIMINGS_ADDRESS 0x09EE
+#define NV_OTP_USETIMINGS_ADDRESS 0x09EA
 #define NV_OTP_USETIMINGS_OFFSET 15
 #define NV_OTP_USETIMINGS_LENGTH 1
 #define NV_OTP_USETIMINGS_MASK 0x8000
 
-#define NV_OTP_CEB_SETUP_WIDTH_ADDRESS 0x09EE
+#define NV_OTP_CEB_SETUP_WIDTH_ADDRESS 0x09EA
 #define NV_OTP_CEB_SETUP_WIDTH_OFFSET 10
 #define NV_OTP_CEB_SETUP_WIDTH_LENGTH 5
 #define NV_OTP_CEB_SETUP_WIDTH_MASK 0x7C00
 
-#define NV_OTP_WAIT_STATES_ADDRESS 0x09EE
+#define NV_OTP_WAIT_STATES_ADDRESS 0x09EA
 #define NV_OTP_WAIT_STATES_OFFSET 5
 #define NV_OTP_WAIT_STATES_LENGTH 5
 #define NV_OTP_WAIT_STATES_MASK 0x03E0
 
-#define NV_OTP_RESET_PULSE_WIDTH_ADDRESS 0x09EE
+#define NV_OTP_RESET_PULSE_WIDTH_ADDRESS 0x09EA
 #define NV_OTP_RESET_PULSE_WIDTH_OFFSET 0
 #define NV_OTP_RESET_PULSE_WIDTH_LENGTH 5
 #define NV_OTP_RESET_PULSE_WIDTH_MASK 0x001F
 
-#define NV_OC_FB_DIS_DRV_ADDRESS 0x09EC
+#define NV_OC_FB_DIS_DRV_ADDRESS 0x09E8
 #define NV_OC_FB_DIS_DRV_OFFSET 1
 #define NV_OC_FB_DIS_DRV_LENGTH 1
 #define NV_OC_FB_DIS_DRV_MASK 0x0002
 
-#define NV_CL_FB_DIS_DRV_ADDRESS 0x09EC
+#define NV_CL_FB_DIS_DRV_ADDRESS 0x09E8
 #define NV_CL_FB_DIS_DRV_OFFSET 0
 #define NV_CL_FB_DIS_DRV_LENGTH 1
 #define NV_CL_FB_DIS_DRV_MASK 0x0001
 
-#define NV_MLX_TRIM_9_ADDRESS 0x09EA
-#define NV_MLX_TRIM_9_OFFSET 0
-#define NV_MLX_TRIM_9_LENGTH 16
-#define NV_MLX_TRIM_9_MASK 0xFFFF
-
-#define NV_MLX_TRIM_8_ADDRESS 0x09E8
-#define NV_MLX_TRIM_8_OFFSET 0
-#define NV_MLX_TRIM_8_LENGTH 16
-#define NV_MLX_TRIM_8_MASK 0xFFFF
-
 #define NV_MLX_TRIM_7_ADDRESS 0x09E6
 #define NV_MLX_TRIM_7_OFFSET 0
 #define NV_MLX_TRIM_7_LENGTH 16
@@ -183,10 +203,10 @@
 #define NV_MLX_TRIM_6_LENGTH 16
 #define NV_MLX_TRIM_6_MASK 0xFFFF
 
-#define NV_MLX_TRIM_5_ADDRESS 0x09E2
-#define NV_MLX_TRIM_5_OFFSET 0
-#define NV_MLX_TRIM_5_LENGTH 16
-#define NV_MLX_TRIM_5_MASK 0xFFFF
+#define TR_RINT_TEMP_COM_MISC_ADDRESS 0x09E2
+#define TR_RINT_TEMP_COM_MISC_OFFSET 0
+#define TR_RINT_TEMP_COM_MISC_LENGTH 8
+#define TR_RINT_TEMP_COM_MISC_MASK 0x00FF
 
 #define TR_DRVSUP_DRV_ADDRESS 0x09E0
 #define TR_DRVSUP_DRV_OFFSET 12
@@ -233,6 +253,11 @@
 #define TR_FDA_GAIN_ISENSE_LENGTH 6
 #define TR_FDA_GAIN_ISENSE_MASK 0x003F
 
+#define TR_MSB_OSC_ADDRESS 0x09DA
+#define TR_MSB_OSC_OFFSET 15
+#define TR_MSB_OSC_LENGTH 1
+#define TR_MSB_OSC_MASK 0x8000
+
 #define TR_OSC_ADDRESS 0x09DA
 #define TR_OSC_OFFSET 6
 #define TR_OSC_LENGTH 9
@@ -260,13 +285,13 @@
 
 #define TR_VDDA_SUP_ADDRESS 0x09D8
 #define TR_VDDA_SUP_OFFSET 4
-#define TR_VDDA_SUP_LENGTH 4
-#define TR_VDDA_SUP_MASK 0x00F0
+#define TR_VDDA_SUP_LENGTH 3
+#define TR_VDDA_SUP_MASK 0x0070
 
 #define TR_VDDD_SUP_ADDRESS 0x09D8
 #define TR_VDDD_SUP_OFFSET 0
-#define TR_VDDD_SUP_LENGTH 4
-#define TR_VDDD_SUP_MASK 0x000F
+#define TR_VDDD_SUP_LENGTH 3
+#define TR_VDDD_SUP_MASK 0x0007
 
 #define NV_CRC_MLX_CALIBRATION_ADDRESS 0x09D6
 #define NV_CRC_MLX_CALIBRATION_OFFSET 8
@@ -1388,15 +1413,15 @@
 #define NV_OC_BLANK_SELECT_LENGTH 6
 #define NV_OC_BLANK_SELECT_MASK 0x003F
 
-#define NV_BEMF_HIGH_ADDRESS 0x0830
-#define NV_BEMF_HIGH_OFFSET 0
-#define NV_BEMF_HIGH_LENGTH 12
-#define NV_BEMF_HIGH_MASK 0x0FFF
-
-#define NV_BEMF_LOW_ADDRESS 0x082E
-#define NV_BEMF_LOW_OFFSET 0
-#define NV_BEMF_LOW_LENGTH 12
-#define NV_BEMF_LOW_MASK 0x0FFF
+#define NV_DI_TH_1ST_ADDRESS 0x0830
+#define NV_DI_TH_1ST_OFFSET 0
+#define NV_DI_TH_1ST_LENGTH 12
+#define NV_DI_TH_1ST_MASK 0x0FFF
+
+#define NV_DI_TH_2ND_ADDRESS 0x082E
+#define NV_DI_TH_2ND_OFFSET 0
+#define NV_DI_TH_2ND_LENGTH 12
+#define NV_DI_TH_2ND_MASK 0x0FFF
 
 #define NV_I_ZC_TH_HIGH_ADDRESS 0x082C
 #define NV_I_ZC_TH_HIGH_OFFSET 0
@@ -1593,15 +1618,20 @@
 #define NV_EHP_FULL_RANGE_LENGTH 13
 #define NV_EHP_FULL_RANGE_MASK 0x1FFF
 
-#define NV_DI_TH_1ST_ADDRESS 0x0812
-#define NV_DI_TH_1ST_OFFSET 0
-#define NV_DI_TH_1ST_LENGTH 12
-#define NV_DI_TH_1ST_MASK 0x0FFF
-
-#define NV_DI_TH_2ND_ADDRESS 0x0810
-#define NV_DI_TH_2ND_OFFSET 0
-#define NV_DI_TH_2ND_LENGTH 12
-#define NV_DI_TH_2ND_MASK 0x0FFF
+#define NV_POSITION_FLAT_TIME_ADDRESS 0x0812
+#define NV_POSITION_FLAT_TIME_OFFSET 6
+#define NV_POSITION_FLAT_TIME_LENGTH 5
+#define NV_POSITION_FLAT_TIME_MASK 0x07C0
+
+#define NV_START_UP_FLAT_TIME_ADDRESS 0x0812
+#define NV_START_UP_FLAT_TIME_OFFSET 0
+#define NV_START_UP_FLAT_TIME_LENGTH 6
+#define NV_START_UP_FLAT_TIME_MASK 0x003F
+
+#define NV_BEMF_SMALL_THRES_ADDRESS 0x0810
+#define NV_BEMF_SMALL_THRES_OFFSET 0
+#define NV_BEMF_SMALL_THRES_LENGTH 4
+#define NV_BEMF_SMALL_THRES_MASK 0x000F
 
 #define NV_QUICK_START_ADDRESS 0x080E
 #define NV_QUICK_START_OFFSET 15
@@ -1613,25 +1643,20 @@
 #define NV_WIND_START_LENGTH 1
 #define NV_WIND_START_MASK 0x4000
 
-#define NV_WIND_BRAKE_RESERVED_ADDRESS 0x080E
-#define NV_WIND_BRAKE_RESERVED_OFFSET 9
-#define NV_WIND_BRAKE_RESERVED_LENGTH 5
-#define NV_WIND_BRAKE_RESERVED_MASK 0x3E00
-
 #define NV_SOFT_NUM_STEP_ADDRESS 0x080E
-#define NV_SOFT_NUM_STEP_OFFSET 6
+#define NV_SOFT_NUM_STEP_OFFSET 8
 #define NV_SOFT_NUM_STEP_LENGTH 3
-#define NV_SOFT_NUM_STEP_MASK 0x01C0
+#define NV_SOFT_NUM_STEP_MASK 0x0700
 
 #define NV_WIND_WINDOW_ADDRESS 0x080E
-#define NV_WIND_WINDOW_OFFSET 3
-#define NV_WIND_WINDOW_LENGTH 3
-#define NV_WIND_WINDOW_MASK 0x0038
+#define NV_WIND_WINDOW_OFFSET 4
+#define NV_WIND_WINDOW_LENGTH 4
+#define NV_WIND_WINDOW_MASK 0x00F0
 
 #define NV_BRAKE_WINDOW_ADDRESS 0x080E
 #define NV_BRAKE_WINDOW_OFFSET 0
-#define NV_BRAKE_WINDOW_LENGTH 3
-#define NV_BRAKE_WINDOW_MASK 0x0007
+#define NV_BRAKE_WINDOW_LENGTH 4
+#define NV_BRAKE_WINDOW_MASK 0x000F
 
 #define NV_SINGLE_PULSE_START_ADDRESS 0x080C
 #define NV_SINGLE_PULSE_START_OFFSET 15
@@ -1843,4 +1868,819 @@
 #define NV_INPUT_MODE_CFG_LENGTH 3
 #define NV_INPUT_MODE_CFG_MASK 0x0007
 
-
+#define RAM_PATCH_TRIM_0_ADDRESS 0x11E0
+#define RAM_PATCH_TRIM_0_OFFSET 0
+#define RAM_PATCH_TRIM_0_LENGTH 16
+#define RAM_PATCH_TRIM_0_MASK 0xFFFF
+
+#define CRC_PATCH_3_ADDRESS 0x1096
+#define CRC_PATCH_3_OFFSET 8
+#define CRC_PATCH_3_LENGTH 8
+#define CRC_PATCH_3_MASK 0xFF00
+
+#define CRC_PATCH_2_ADDRESS 0x1096
+#define CRC_PATCH_2_OFFSET 0
+#define CRC_PATCH_2_LENGTH 8
+#define CRC_PATCH_2_MASK 0x00FF
+
+#define CRC_PATCH_1_ADDRESS 0x1094
+#define CRC_PATCH_1_OFFSET 8
+#define CRC_PATCH_1_LENGTH 8
+#define CRC_PATCH_1_MASK 0xFF00
+
+#define CRC_PATCH_0_ADDRESS 0x1094
+#define CRC_PATCH_0_OFFSET 0
+#define CRC_PATCH_0_LENGTH 8
+#define CRC_PATCH_0_MASK 0x00FF
+
+#define CRC_MLX_CALIBRATION_ADDRESS 0x1092
+#define CRC_MLX_CALIBRATION_OFFSET 8
+#define CRC_MLX_CALIBRATION_LENGTH 8
+#define CRC_MLX_CALIBRATION_MASK 0xFF00
+
+#define MLX_CALIB_22_ADDRESS 0x1090
+#define MLX_CALIB_22_OFFSET 0
+#define MLX_CALIB_22_LENGTH 16
+#define MLX_CALIB_22_MASK 0xFFFF
+
+#define MLX_CALIB_21_ADDRESS 0x108E
+#define MLX_CALIB_21_OFFSET 0
+#define MLX_CALIB_21_LENGTH 16
+#define MLX_CALIB_21_MASK 0xFFFF
+
+#define MLX_CALIB_20_ADDRESS 0x108C
+#define MLX_CALIB_20_OFFSET 0
+#define MLX_CALIB_20_LENGTH 16
+#define MLX_CALIB_20_MASK 0xFFFF
+
+#define MLX_CALIB_19_ADDRESS 0x108A
+#define MLX_CALIB_19_OFFSET 0
+#define MLX_CALIB_19_LENGTH 16
+#define MLX_CALIB_19_MASK 0xFFFF
+
+#define MLX_CALIB_18_ADDRESS 0x1088
+#define MLX_CALIB_18_OFFSET 0
+#define MLX_CALIB_18_LENGTH 16
+#define MLX_CALIB_18_MASK 0xFFFF
+
+#define MLX_CALIB_17_ADDRESS 0x1086
+#define MLX_CALIB_17_OFFSET 0
+#define MLX_CALIB_17_LENGTH 16
+#define MLX_CALIB_17_MASK 0xFFFF
+
+#define MLX_CALIB_16_ADDRESS 0x1084
+#define MLX_CALIB_16_OFFSET 0
+#define MLX_CALIB_16_LENGTH 16
+#define MLX_CALIB_16_MASK 0xFFFF
+
+#define MLX_CALIB_15_ADDRESS 0x1082
+#define MLX_CALIB_15_OFFSET 0
+#define MLX_CALIB_15_LENGTH 16
+#define MLX_CALIB_15_MASK 0xFFFF
+
+#define MLX_CALIB_14_ADDRESS 0x1080
+#define MLX_CALIB_14_OFFSET 0
+#define MLX_CALIB_14_LENGTH 16
+#define MLX_CALIB_14_MASK 0xFFFF
+
+#define MLX_CALIB_13_ADDRESS 0x107E
+#define MLX_CALIB_13_OFFSET 0
+#define MLX_CALIB_13_LENGTH 16
+#define MLX_CALIB_13_MASK 0xFFFF
+
+#define MLX_CALIB_12_ADDRESS 0x107C
+#define MLX_CALIB_12_OFFSET 0
+#define MLX_CALIB_12_LENGTH 16
+#define MLX_CALIB_12_MASK 0xFFFF
+
+#define MLX_CALIB_11_ADDRESS 0x107A
+#define MLX_CALIB_11_OFFSET 0
+#define MLX_CALIB_11_LENGTH 16
+#define MLX_CALIB_11_MASK 0xFFFF
+
+#define MLX_CALIB_10_ADDRESS 0x1078
+#define MLX_CALIB_10_OFFSET 0
+#define MLX_CALIB_10_LENGTH 16
+#define MLX_CALIB_10_MASK 0xFFFF
+
+#define MLX_CALIB_9_ADDRESS 0x1076
+#define MLX_CALIB_9_OFFSET 0
+#define MLX_CALIB_9_LENGTH 16
+#define MLX_CALIB_9_MASK 0xFFFF
+
+#define MLX_CALIB_8_ADDRESS 0x1074
+#define MLX_CALIB_8_OFFSET 0
+#define MLX_CALIB_8_LENGTH 16
+#define MLX_CALIB_8_MASK 0xFFFF
+
+#define MLX_CALIB_7_ADDRESS 0x1072
+#define MLX_CALIB_7_OFFSET 0
+#define MLX_CALIB_7_LENGTH 16
+#define MLX_CALIB_7_MASK 0xFFFF
+
+#define MLX_CALIB_6_ADDRESS 0x1070
+#define MLX_CALIB_6_OFFSET 0
+#define MLX_CALIB_6_LENGTH 16
+#define MLX_CALIB_6_MASK 0xFFFF
+
+#define MLX_CALIB_5_ADDRESS 0x106E
+#define MLX_CALIB_5_OFFSET 0
+#define MLX_CALIB_5_LENGTH 16
+#define MLX_CALIB_5_MASK 0xFFFF
+
+#define MLX_CALIB_4_ADDRESS 0x106C
+#define MLX_CALIB_4_OFFSET 0
+#define MLX_CALIB_4_LENGTH 16
+#define MLX_CALIB_4_MASK 0xFFFF
+
+#define MLX_CALIB_3_ADDRESS 0x106A
+#define MLX_CALIB_3_OFFSET 0
+#define MLX_CALIB_3_LENGTH 16
+#define MLX_CALIB_3_MASK 0xFFFF
+
+#define MLX_CALIB_2_ADDRESS 0x1068
+#define MLX_CALIB_2_OFFSET 0
+#define MLX_CALIB_2_LENGTH 16
+#define MLX_CALIB_2_MASK 0xFFFF
+
+#define MAX_CLIM_USER_ADDRESS 0x1066
+#define MAX_CLIM_USER_OFFSET 0
+#define MAX_CLIM_USER_LENGTH 8
+#define MAX_CLIM_USER_MASK 0x00FF
+
+#define CLIM_GAIN_ADDRESS 0x1064
+#define CLIM_GAIN_OFFSET 8
+#define CLIM_GAIN_LENGTH 8
+#define CLIM_GAIN_MASK 0xFF00
+
+#define CLIM_OFFSET_ADDRESS 0x1064
+#define CLIM_OFFSET_OFFSET 0
+#define CLIM_OFFSET_LENGTH 8
+#define CLIM_OFFSET_MASK 0x00FF
+
+#define CMD_INTERPRETER_DATA_ADDRESS 0x1062
+#define CMD_INTERPRETER_DATA_OFFSET 0
+#define CMD_INTERPRETER_DATA_LENGTH 16
+#define CMD_INTERPRETER_DATA_MASK 0xFFFF
+
+#define CMD_INTERPRETER_ADDRESS_ADDRESS 0x1060
+#define CMD_INTERPRETER_ADDRESS_OFFSET 0
+#define CMD_INTERPRETER_ADDRESS_LENGTH 16
+#define CMD_INTERPRETER_ADDRESS_MASK 0xFFFF
+
+#define MLX_CALIB_RECALL_ADDRESS 0x105E
+#define MLX_CALIB_RECALL_OFFSET 0
+#define MLX_CALIB_RECALL_LENGTH 4
+#define MLX_CALIB_RECALL_MASK 0x000F
+
+#define PATCH_EXT_RECALL_ADDRESS 0x105C
+#define PATCH_EXT_RECALL_OFFSET 12
+#define PATCH_EXT_RECALL_LENGTH 4
+#define PATCH_EXT_RECALL_MASK 0xF000
+
+#define APP_TRIM_RECALL_ADDRESS 0x105C
+#define APP_TRIM_RECALL_OFFSET 8
+#define APP_TRIM_RECALL_LENGTH 4
+#define APP_TRIM_RECALL_MASK 0x0F00
+
+#define TRIM_SOURCE_ADDRESS 0x105C
+#define TRIM_SOURCE_OFFSET 4
+#define TRIM_SOURCE_LENGTH 4
+#define TRIM_SOURCE_MASK 0x00F0
+
+#define PATCH_SOURCE_ADDRESS 0x105C
+#define PATCH_SOURCE_OFFSET 0
+#define PATCH_SOURCE_LENGTH 4
+#define PATCH_SOURCE_MASK 0x000F
+
+#define MTP_USE_ZONE_0_ADDRESS 0x105A
+#define MTP_USE_ZONE_0_OFFSET 8
+#define MTP_USE_ZONE_0_LENGTH 8
+#define MTP_USE_ZONE_0_MASK 0xFF00
+
+#define CRC_MTP_ZONE_0_ADDRESS 0x105A
+#define CRC_MTP_ZONE_0_OFFSET 0
+#define CRC_MTP_ZONE_0_LENGTH 8
+#define CRC_MTP_ZONE_0_MASK 0x00FF
+
+#define CUST_ID0_ADDRESS 0x1058
+#define CUST_ID0_OFFSET 0
+#define CUST_ID0_LENGTH 16
+#define CUST_ID0_MASK 0xFFFF
+
+#define CUST_ID1_ADDRESS 0x1056
+#define CUST_ID1_OFFSET 0
+#define CUST_ID1_LENGTH 16
+#define CUST_ID1_MASK 0xFFFF
+
+#define CUST_ID2_ADDRESS 0x1054
+#define CUST_ID2_OFFSET 0
+#define CUST_ID2_LENGTH 16
+#define CUST_ID2_MASK 0xFFFF
+
+#define CUST_ID3_ADDRESS 0x1052
+#define CUST_ID3_OFFSET 0
+#define CUST_ID3_LENGTH 16
+#define CUST_ID3_MASK 0xFFFF
+
+#define FLAT_BLANK_ADDRESS 0x1050
+#define FLAT_BLANK_OFFSET 8
+#define FLAT_BLANK_LENGTH 8
+#define FLAT_BLANK_MASK 0xFF00
+
+#define INTEGRATOR_PRE_DIV_ADDRESS 0x1050
+#define INTEGRATOR_PRE_DIV_OFFSET 5
+#define INTEGRATOR_PRE_DIV_LENGTH 2
+#define INTEGRATOR_PRE_DIV_MASK 0x0060
+
+#define INTEGRATOR_TIME_ADDRESS 0x1050
+#define INTEGRATOR_TIME_OFFSET 3
+#define INTEGRATOR_TIME_LENGTH 2
+#define INTEGRATOR_TIME_MASK 0x0018
+
+#define INTEGRATOR_START_OPTION_ADDRESS 0x1050
+#define INTEGRATOR_START_OPTION_OFFSET 2
+#define INTEGRATOR_START_OPTION_LENGTH 1
+#define INTEGRATOR_START_OPTION_MASK 0x0004
+
+#define INTEGRATOR_RESYNC_OPTION_ADDRESS 0x1050
+#define INTEGRATOR_RESYNC_OPTION_OFFSET 1
+#define INTEGRATOR_RESYNC_OPTION_LENGTH 1
+#define INTEGRATOR_RESYNC_OPTION_MASK 0x0002
+
+#define INTEGRATOR_EDGE_INV_ADDRESS 0x1050
+#define INTEGRATOR_EDGE_INV_OFFSET 0
+#define INTEGRATOR_EDGE_INV_LENGTH 1
+#define INTEGRATOR_EDGE_INV_MASK 0x0001
+
+#define ZONE0_RES1_ADDRESS 0x104E
+#define ZONE0_RES1_OFFSET 0
+#define ZONE0_RES1_LENGTH 16
+#define ZONE0_RES1_MASK 0xFFFF
+
+#define ZONE0_RES2_ADDRESS 0x104C
+#define ZONE0_RES2_OFFSET 0
+#define ZONE0_RES2_LENGTH 16
+#define ZONE0_RES2_MASK 0xFFFF
+
+#define ZONE0_RES3_ADDRESS 0x104A
+#define ZONE0_RES3_OFFSET 0
+#define ZONE0_RES3_LENGTH 16
+#define ZONE0_RES3_MASK 0xFFFF
+
+#define ZONE0_RES4_ADDRESS 0x1048
+#define ZONE0_RES4_OFFSET 0
+#define ZONE0_RES4_LENGTH 16
+#define ZONE0_RES4_MASK 0xFFFF
+
+#define TARGET_CLIM_USER_PULSES_ADDRESS 0x1046
+#define TARGET_CLIM_USER_PULSES_OFFSET 0
+#define TARGET_CLIM_USER_PULSES_LENGTH 8
+#define TARGET_CLIM_USER_PULSES_MASK 0x00FF
+
+#define TARGET_CLIM_USER_BRAKE_ADDRESS 0x1044
+#define TARGET_CLIM_USER_BRAKE_OFFSET 8
+#define TARGET_CLIM_USER_BRAKE_LENGTH 8
+#define TARGET_CLIM_USER_BRAKE_MASK 0xFF00
+
+#define TARGET_CLIM_USER_MOTOR_ADDRESS 0x1044
+#define TARGET_CLIM_USER_MOTOR_OFFSET 0
+#define TARGET_CLIM_USER_MOTOR_LENGTH 8
+#define TARGET_CLIM_USER_MOTOR_MASK 0x00FF
+
+#define CL_BLANK_SELECT_ADDRESS 0x1042
+#define CL_BLANK_SELECT_OFFSET 8
+#define CL_BLANK_SELECT_LENGTH 6
+#define CL_BLANK_SELECT_MASK 0x3F00
+
+#define OC_BLANK_SELECT_ADDRESS 0x1042
+#define OC_BLANK_SELECT_OFFSET 0
+#define OC_BLANK_SELECT_LENGTH 6
+#define OC_BLANK_SELECT_MASK 0x003F
+
+#define DI_TH_1ST_ADDRESS 0x1040
+#define DI_TH_1ST_OFFSET 0
+#define DI_TH_1ST_LENGTH 12
+#define DI_TH_1ST_MASK 0x0FFF
+
+#define DI_TH_2ND_ADDRESS 0x103E
+#define DI_TH_2ND_OFFSET 0
+#define DI_TH_2ND_LENGTH 12
+#define DI_TH_2ND_MASK 0x0FFF
+
+#define I_ZC_TH_HIGH_ADDRESS 0x103C
+#define I_ZC_TH_HIGH_OFFSET 0
+#define I_ZC_TH_HIGH_LENGTH 12
+#define I_ZC_TH_HIGH_MASK 0x0FFF
+
+#define I_ZC_TH_LOW_ADDRESS 0x103A
+#define I_ZC_TH_LOW_OFFSET 0
+#define I_ZC_TH_LOW_LENGTH 12
+#define I_ZC_TH_LOW_MASK 0x0FFF
+
+#define RPM_F_ADDRESS 0x1038
+#define RPM_F_OFFSET 7
+#define RPM_F_LENGTH 9
+#define RPM_F_MASK 0xFF80
+
+#define SPD_F_ADDRESS 0x1038
+#define SPD_F_OFFSET 0
+#define SPD_F_LENGTH 7
+#define SPD_F_MASK 0x007F
+
+#define RPM_E_ADDRESS 0x1036
+#define RPM_E_OFFSET 7
+#define RPM_E_LENGTH 9
+#define RPM_E_MASK 0xFF80
+
+#define SPD_E_ADDRESS 0x1036
+#define SPD_E_OFFSET 0
+#define SPD_E_LENGTH 7
+#define SPD_E_MASK 0x007F
+
+#define RPM_D_ADDRESS 0x1034
+#define RPM_D_OFFSET 7
+#define RPM_D_LENGTH 9
+#define RPM_D_MASK 0xFF80
+
+#define SPD_D_ADDRESS 0x1034
+#define SPD_D_OFFSET 0
+#define SPD_D_LENGTH 7
+#define SPD_D_MASK 0x007F
+
+#define RPM_C_ADDRESS 0x1032
+#define RPM_C_OFFSET 7
+#define RPM_C_LENGTH 9
+#define RPM_C_MASK 0xFF80
+
+#define SPD_C_ADDRESS 0x1032
+#define SPD_C_OFFSET 0
+#define SPD_C_LENGTH 7
+#define SPD_C_MASK 0x007F
+
+#define RPM_B_ADDRESS 0x1030
+#define RPM_B_OFFSET 7
+#define RPM_B_LENGTH 9
+#define RPM_B_MASK 0xFF80
+
+#define SPD_B_ADDRESS 0x1030
+#define SPD_B_OFFSET 0
+#define SPD_B_LENGTH 7
+#define SPD_B_MASK 0x007F
+
+#define RPM_A_ADDRESS 0x102E
+#define RPM_A_OFFSET 7
+#define RPM_A_LENGTH 9
+#define RPM_A_MASK 0xFF80
+
+#define SPD_A_ADDRESS 0x102E
+#define SPD_A_OFFSET 0
+#define SPD_A_LENGTH 7
+#define SPD_A_MASK 0x007F
+
+#define RPM_MAX_ADDRESS 0x102C
+#define RPM_MAX_OFFSET 7
+#define RPM_MAX_LENGTH 9
+#define RPM_MAX_MASK 0xFF80
+
+#define SPD_MAX_ADDRESS 0x102C
+#define SPD_MAX_OFFSET 0
+#define SPD_MAX_LENGTH 7
+#define SPD_MAX_MASK 0x007F
+
+#define RPM_MIN_ADDRESS 0x102A
+#define RPM_MIN_OFFSET 7
+#define RPM_MIN_LENGTH 9
+#define RPM_MIN_MASK 0xFF80
+
+#define SPD_MIN_ADDRESS 0x102A
+#define SPD_MIN_OFFSET 0
+#define SPD_MIN_LENGTH 7
+#define SPD_MIN_MASK 0x007F
+
+#define DUTY_RAMPING_ADDRESS 0x1028
+#define DUTY_RAMPING_OFFSET 15
+#define DUTY_RAMPING_LENGTH 1
+#define DUTY_RAMPING_MASK 0x8000
+
+#define ILIM_RAMPING_ADDRESS 0x1028
+#define ILIM_RAMPING_OFFSET 14
+#define ILIM_RAMPING_LENGTH 1
+#define ILIM_RAMPING_MASK 0x4000
+
+#define DC_OPENLOOP_SR_ADDRESS 0x1028
+#define DC_OPENLOOP_SR_OFFSET 12
+#define DC_OPENLOOP_SR_LENGTH 2
+#define DC_OPENLOOP_SR_MASK 0x3000
+
+#define DC_OPENLOOP_INI_ADDRESS 0x1028
+#define DC_OPENLOOP_INI_OFFSET 10
+#define DC_OPENLOOP_INI_LENGTH 2
+#define DC_OPENLOOP_INI_MASK 0x0C00
+
+#define SPD_KI_ADDRESS 0x1028
+#define SPD_KI_OFFSET 7
+#define SPD_KI_LENGTH 3
+#define SPD_KI_MASK 0x0380
+
+#define SPD_KP_ADDRESS 0x1028
+#define SPD_KP_OFFSET 4
+#define SPD_KP_LENGTH 3
+#define SPD_KP_MASK 0x0070
+
+#define SPD_HC_HYST_ADDRESS 0x1028
+#define SPD_HC_HYST_OFFSET 2
+#define SPD_HC_HYST_LENGTH 2
+#define SPD_HC_HYST_MASK 0x000C
+
+#define SPD_LC_HYST_ADDRESS 0x1028
+#define SPD_LC_HYST_OFFSET 0
+#define SPD_LC_HYST_LENGTH 2
+#define SPD_LC_HYST_MASK 0x0003
+
+#define SPD_BOOST_ADDRESS 0x1026
+#define SPD_BOOST_OFFSET 13
+#define SPD_BOOST_LENGTH 1
+#define SPD_BOOST_MASK 0x2000
+
+#define SPD_BOOST_SS_ADDRESS 0x1026
+#define SPD_BOOST_SS_OFFSET 12
+#define SPD_BOOST_SS_LENGTH 1
+#define SPD_BOOST_SS_MASK 0x1000
+
+#define SPD_CTRL_1_RESERVED_ADDRESS 0x1026
+#define SPD_CTRL_1_RESERVED_OFFSET 11
+#define SPD_CTRL_1_RESERVED_LENGTH 1
+#define SPD_CTRL_1_RESERVED_MASK 0x0800
+
+#define SPD_LOOP_MODE_ADDRESS 0x1026
+#define SPD_LOOP_MODE_OFFSET 10
+#define SPD_LOOP_MODE_LENGTH 1
+#define SPD_LOOP_MODE_MASK 0x0400
+
+#define RPM_LC_ADDRESS 0x1026
+#define RPM_LC_OFFSET 9
+#define RPM_LC_LENGTH 1
+#define RPM_LC_MASK 0x0200
+
+#define RPM_HC_ADDRESS 0x1026
+#define RPM_HC_OFFSET 8
+#define RPM_HC_LENGTH 1
+#define RPM_HC_MASK 0x0100
+
+#define SPD_LC_VAL_ADDRESS 0x1026
+#define SPD_LC_VAL_OFFSET 6
+#define SPD_LC_VAL_LENGTH 2
+#define SPD_LC_VAL_MASK 0x00C0
+
+#define SPD_HC_VAL_ADDRESS 0x1026
+#define SPD_HC_VAL_OFFSET 4
+#define SPD_HC_VAL_LENGTH 2
+#define SPD_HC_VAL_MASK 0x0030
+
+#define CURVE_MODE_ADDRESS 0x1026
+#define CURVE_MODE_OFFSET 2
+#define CURVE_MODE_LENGTH 2
+#define CURVE_MODE_MASK 0x000C
+
+#define SPD_TICK_ADDRESS 0x1026
+#define SPD_TICK_OFFSET 0
+#define SPD_TICK_LENGTH 2
+#define SPD_TICK_MASK 0x0003
+
+#define MIN_EHP_RESERVED_ADDRESS 0x1024
+#define MIN_EHP_RESERVED_OFFSET 15
+#define MIN_EHP_RESERVED_LENGTH 1
+#define MIN_EHP_RESERVED_MASK 0x8000
+
+#define EHP_TIMER_PRESCALER_ADDRESS 0x1024
+#define EHP_TIMER_PRESCALER_OFFSET 13
+#define EHP_TIMER_PRESCALER_LENGTH 2
+#define EHP_TIMER_PRESCALER_MASK 0x6000
+
+#define EHP_FULL_RANGE_ADDRESS 0x1024
+#define EHP_FULL_RANGE_OFFSET 0
+#define EHP_FULL_RANGE_LENGTH 13
+#define EHP_FULL_RANGE_MASK 0x1FFF
+
+#define POSITION_FLAT_TIME_ADDRESS 0x1022
+#define POSITION_FLAT_TIME_OFFSET 6
+#define POSITION_FLAT_TIME_LENGTH 5
+#define POSITION_FLAT_TIME_MASK 0x07C0
+
+#define START_UP_FLAT_TIME_ADDRESS 0x1022
+#define START_UP_FLAT_TIME_OFFSET 0
+#define START_UP_FLAT_TIME_LENGTH 6
+#define START_UP_FLAT_TIME_MASK 0x003F
+
+#define BEMF_SMALL_THRES_ADDRESS 0x1020
+#define BEMF_SMALL_THRES_OFFSET 0
+#define BEMF_SMALL_THRES_LENGTH 4
+#define BEMF_SMALL_THRES_MASK 0x000F
+
+#define QUICK_START_ADDRESS 0x101E
+#define QUICK_START_OFFSET 15
+#define QUICK_START_LENGTH 1
+#define QUICK_START_MASK 0x8000
+
+#define WIND_START_ADDRESS 0x101E
+#define WIND_START_OFFSET 14
+#define WIND_START_LENGTH 1
+#define WIND_START_MASK 0x4000
+
+#define SOFT_NUM_STEP_ADDRESS 0x101E
+#define SOFT_NUM_STEP_OFFSET 8
+#define SOFT_NUM_STEP_LENGTH 3
+#define SOFT_NUM_STEP_MASK 0x0700
+
+#define WIND_WINDOW_ADDRESS 0x101E
+#define WIND_WINDOW_OFFSET 4
+#define WIND_WINDOW_LENGTH 4
+#define WIND_WINDOW_MASK 0x00F0
+
+#define BRAKE_WINDOW_ADDRESS 0x101E
+#define BRAKE_WINDOW_OFFSET 0
+#define BRAKE_WINDOW_LENGTH 4
+#define BRAKE_WINDOW_MASK 0x000F
+
+#define SINGLE_PULSE_START_ADDRESS 0x101C
+#define SINGLE_PULSE_START_OFFSET 15
+#define SINGLE_PULSE_START_LENGTH 1
+#define SINGLE_PULSE_START_MASK 0x8000
+
+#define LONG_START_ADDRESS 0x101C
+#define LONG_START_OFFSET 14
+#define LONG_START_LENGTH 1
+#define LONG_START_MASK 0x4000
+
+#define SOFT_START_ADDRESS 0x101C
+#define SOFT_START_OFFSET 13
+#define SOFT_START_LENGTH 1
+#define SOFT_START_MASK 0x2000
+
+#define COMM_START_NUM_ADDRESS 0x101C
+#define COMM_START_NUM_OFFSET 11
+#define COMM_START_NUM_LENGTH 2
+#define COMM_START_NUM_MASK 0x1800
+
+#define START_DUTY_ADDRESS 0x101C
+#define START_DUTY_OFFSET 9
+#define START_DUTY_LENGTH 2
+#define START_DUTY_MASK 0x0600
+
+#define SOFT_STEP_SIZE_ADDRESS 0x101C
+#define SOFT_STEP_SIZE_OFFSET 6
+#define SOFT_STEP_SIZE_LENGTH 3
+#define SOFT_STEP_SIZE_MASK 0x01C0
+
+#define START_UP_TIME_ADDRESS 0x101C
+#define START_UP_TIME_OFFSET 0
+#define START_UP_TIME_LENGTH 6
+#define START_UP_TIME_MASK 0x003F
+
+#define POSITION_DUTY_ADDRESS 0x101A
+#define POSITION_DUTY_OFFSET 14
+#define POSITION_DUTY_LENGTH 2
+#define POSITION_DUTY_MASK 0xC000
+
+#define POSITION_PULSE_TIME_ADDRESS 0x101A
+#define POSITION_PULSE_TIME_OFFSET 9
+#define POSITION_PULSE_TIME_LENGTH 5
+#define POSITION_PULSE_TIME_MASK 0x3E00
+
+#define POSI_MAJO_VOTE_ADDRESS 0x101A
+#define POSI_MAJO_VOTE_OFFSET 8
+#define POSI_MAJO_VOTE_LENGTH 1
+#define POSI_MAJO_VOTE_MASK 0x0100
+
+#define ANTI_COG_ADDRESS 0x101A
+#define ANTI_COG_OFFSET 7
+#define ANTI_COG_LENGTH 1
+#define ANTI_COG_MASK 0x0080
+
+#define POSITION_RESERVED_ADDRESS 0x101A
+#define POSITION_RESERVED_OFFSET 6
+#define POSITION_RESERVED_LENGTH 1
+#define POSITION_RESERVED_MASK 0x0040
+
+#define FIRST_NON_FLAT_TIME_ADDRESS 0x101A
+#define FIRST_NON_FLAT_TIME_OFFSET 0
+#define FIRST_NON_FLAT_TIME_LENGTH 6
+#define FIRST_NON_FLAT_TIME_MASK 0x003F
+
+#define ROUGH_REG_ADDRESS 0x1018
+#define ROUGH_REG_OFFSET 14
+#define ROUGH_REG_LENGTH 1
+#define ROUGH_REG_MASK 0x4000
+
+#define ADC_FLAT_FILT_DEP_ADDRESS 0x1018
+#define ADC_FLAT_FILT_DEP_OFFSET 12
+#define ADC_FLAT_FILT_DEP_LENGTH 2
+#define ADC_FLAT_FILT_DEP_MASK 0x3000
+
+#define EHP_REG_GAIN_ADDRESS 0x1018
+#define EHP_REG_GAIN_OFFSET 10
+#define EHP_REG_GAIN_LENGTH 2
+#define EHP_REG_GAIN_MASK 0x0C00
+
+#define ROUGH_GAIN_ADDRESS 0x1018
+#define ROUGH_GAIN_OFFSET 9
+#define ROUGH_GAIN_LENGTH 1
+#define ROUGH_GAIN_MASK 0x0200
+
+#define PWM_MOD_ADDRESS 0x1018
+#define PWM_MOD_OFFSET 8
+#define PWM_MOD_LENGTH 1
+#define PWM_MOD_MASK 0x0100
+
+#define PWM_50K_ADDRESS 0x1018
+#define PWM_50K_OFFSET 7
+#define PWM_50K_LENGTH 1
+#define PWM_50K_MASK 0x0080
+
+#define SS_RISE_MODE_ADDRESS 0x1018
+#define SS_RISE_MODE_OFFSET 3
+#define SS_RISE_MODE_LENGTH 3
+#define SS_RISE_MODE_MASK 0x0038
+
+#define SS_FALL_MODE_ADDRESS 0x1018
+#define SS_FALL_MODE_OFFSET 0
+#define SS_FALL_MODE_LENGTH 3
+#define SS_FALL_MODE_MASK 0x0007
+
+#define FG_SLOPECTRL_ADDRESS 0x1014
+#define FG_SLOPECTRL_OFFSET 14
+#define FG_SLOPECTRL_LENGTH 2
+#define FG_SLOPECTRL_MASK 0xC000
+
+#define LVIO_SLOPECTRL_ADDRESS 0x1014
+#define LVIO_SLOPECTRL_OFFSET 12
+#define LVIO_SLOPECTRL_LENGTH 2
+#define LVIO_SLOPECTRL_MASK 0x3000
+
+#define HVIO_SLOPECTRL_ADDRESS 0x1014
+#define HVIO_SLOPECTRL_OFFSET 10
+#define HVIO_SLOPECTRL_LENGTH 2
+#define HVIO_SLOPECTRL_MASK 0x0C00
+
+#define I2C_SLAVE_ADDRESS_ADDRESS 0x1014
+#define I2C_SLAVE_ADDRESS_OFFSET 0
+#define I2C_SLAVE_ADDRESS_LENGTH 7
+#define I2C_SLAVE_ADDRESS_MASK 0x007F
+
+#define I2C_DEBUGGING_DISABLED_ADDRESS 0x1012
+#define I2C_DEBUGGING_DISABLED_OFFSET 15
+#define I2C_DEBUGGING_DISABLED_LENGTH 1
+#define I2C_DEBUGGING_DISABLED_MASK 0x8000
+
+#define I2C_TOGGLE_ENTRY_ADDRESS 0x1012
+#define I2C_TOGGLE_ENTRY_OFFSET 14
+#define I2C_TOGGLE_ENTRY_LENGTH 1
+#define I2C_TOGGLE_ENTRY_MASK 0x4000
+
+#define HVIO_PU_PD_CFG_ADDRESS 0x1012
+#define HVIO_PU_PD_CFG_OFFSET 12
+#define HVIO_PU_PD_CFG_LENGTH 2
+#define HVIO_PU_PD_CFG_MASK 0x3000
+
+#define LVIO_PU_PD_CFG_ADDRESS 0x1012
+#define LVIO_PU_PD_CFG_OFFSET 10
+#define LVIO_PU_PD_CFG_LENGTH 2
+#define LVIO_PU_PD_CFG_MASK 0x0C00
+
+#define PWM_PU_PD_CFG_ADDRESS 0x1012
+#define PWM_PU_PD_CFG_OFFSET 8
+#define PWM_PU_PD_CFG_LENGTH 2
+#define PWM_PU_PD_CFG_MASK 0x0300
+
+#define SLEEP_MODE_ENABLED_ADDRESS 0x1012
+#define SLEEP_MODE_ENABLED_OFFSET 7
+#define SLEEP_MODE_ENABLED_LENGTH 1
+#define SLEEP_MODE_ENABLED_MASK 0x0080
+
+#define SLEEP_MODE_POLARITY_ADDRESS 0x1012
+#define SLEEP_MODE_POLARITY_OFFSET 6
+#define SLEEP_MODE_POLARITY_LENGTH 1
+#define SLEEP_MODE_POLARITY_MASK 0x0040
+
+#define DIAG_MODE_CFG_ADDRESS 0x1012
+#define DIAG_MODE_CFG_OFFSET 4
+#define DIAG_MODE_CFG_LENGTH 2
+#define DIAG_MODE_CFG_MASK 0x0030
+
+#define FG_FILTERED_ADDRESS 0x1012
+#define FG_FILTERED_OFFSET 3
+#define FG_FILTERED_LENGTH 1
+#define FG_FILTERED_MASK 0x0008
+
+#define FG_SPEED_ADDRESS 0x1012
+#define FG_SPEED_OFFSET 0
+#define FG_SPEED_LENGTH 3
+#define FG_SPEED_MASK 0x0007
+
+#define FG_RD_ACTIVE_STATE_ADDRESS 0x1010
+#define FG_RD_ACTIVE_STATE_OFFSET 13
+#define FG_RD_ACTIVE_STATE_LENGTH 1
+#define FG_RD_ACTIVE_STATE_MASK 0x2000
+
+#define FG_RD_INIT_LOW_ADDRESS 0x1010
+#define FG_RD_INIT_LOW_OFFSET 12
+#define FG_RD_INIT_LOW_LENGTH 1
+#define FG_RD_INIT_LOW_MASK 0x1000
+
+#define SELECT_RD_FGB_ADDRESS 0x1010
+#define SELECT_RD_FGB_OFFSET 11
+#define SELECT_RD_FGB_LENGTH 1
+#define SELECT_RD_FGB_MASK 0x0800
+
+#define HVIO_MODE_CFG_ADDRESS 0x1010
+#define HVIO_MODE_CFG_OFFSET 8
+#define HVIO_MODE_CFG_LENGTH 3
+#define HVIO_MODE_CFG_MASK 0x0700
+
+#define LVIO_MODE_CFG_ADDRESS 0x1010
+#define LVIO_MODE_CFG_OFFSET 5
+#define LVIO_MODE_CFG_LENGTH 3
+#define LVIO_MODE_CFG_MASK 0x00E0
+
+#define FG_MODE_CFG_ADDRESS 0x1010
+#define FG_MODE_CFG_OFFSET 3
+#define FG_MODE_CFG_LENGTH 2
+#define FG_MODE_CFG_MASK 0x0018
+
+#define INPUT_MODE_CFG_ADDRESS 0x1010
+#define INPUT_MODE_CFG_OFFSET 0
+#define INPUT_MODE_CFG_LENGTH 3
+#define INPUT_MODE_CFG_MASK 0x0007
+
+#define MOTOR_STATE_ADDRESS 0x100E
+#define MOTOR_STATE_OFFSET 8
+#define MOTOR_STATE_LENGTH 8
+#define MOTOR_STATE_MASK 0xFF00
+
+#define COMM_STATE_ADDRESS 0x100E
+#define COMM_STATE_OFFSET 0
+#define COMM_STATE_LENGTH 8
+#define COMM_STATE_MASK 0x00FF
+
+#define I2C_RESERVED_2_ADDRESS 0x100C
+#define I2C_RESERVED_2_OFFSET 0
+#define I2C_RESERVED_2_LENGTH 16
+#define I2C_RESERVED_2_MASK 0xFFFF
+
+#define TEMPERATURE_COUNTER_ADDRESS 0x100A
+#define TEMPERATURE_COUNTER_OFFSET 12
+#define TEMPERATURE_COUNTER_LENGTH 4
+#define TEMPERATURE_COUNTER_MASK 0xF000
+
+#define TEMPERATURE_VALUE_ADDRESS 0x100A
+#define TEMPERATURE_VALUE_OFFSET 0
+#define TEMPERATURE_VALUE_LENGTH 12
+#define TEMPERATURE_VALUE_MASK 0x0FFF
+
+#define MOTOR_RUNNING_ADDRESS 0x1008
+#define MOTOR_RUNNING_OFFSET 15
+#define MOTOR_RUNNING_LENGTH 1
+#define MOTOR_RUNNING_MASK 0x8000
+
+#define COMMAND_BUSY_ADDRESS 0x1008
+#define COMMAND_BUSY_OFFSET 4
+#define COMMAND_BUSY_LENGTH 1
+#define COMMAND_BUSY_MASK 0x0010
+
+#define OTP_FREEZONES_ADDRESS 0x1008
+#define OTP_FREEZONES_OFFSET 2
+#define OTP_FREEZONES_LENGTH 2
+#define OTP_FREEZONES_MASK 0x000C
+
+#define MOTOR_STUCK_ADDRESS 0x1008
+#define MOTOR_STUCK_OFFSET 1
+#define MOTOR_STUCK_LENGTH 1
+#define MOTOR_STUCK_MASK 0x0002
+
+#define OVERVOLTAGE_ADDRESS 0x1008
+#define OVERVOLTAGE_OFFSET 0
+#define OVERVOLTAGE_LENGTH 1
+#define OVERVOLTAGE_MASK 0x0001
+
+#define FEEDBACK_ADDRESS 0x1006
+#define FEEDBACK_OFFSET 0
+#define FEEDBACK_LENGTH 16
+#define FEEDBACK_MASK 0xFFFF
+
+#define COMMAND_KEY_ADDRESS 0x1004
+#define COMMAND_KEY_OFFSET 0
+#define COMMAND_KEY_LENGTH 16
+#define COMMAND_KEY_MASK 0xFFFF
+
+#define COMMAND_CONTROL_ADDRESS 0x1002
+#define COMMAND_CONTROL_OFFSET 0
+#define COMMAND_CONTROL_LENGTH 16
+#define COMMAND_CONTROL_MASK 0xFFFF
+
+#define SPEED_DUTY_ADDRESS 0x1000
+#define SPEED_DUTY_OFFSET 0
+#define SPEED_DUTY_LENGTH 16
+#define SPEED_DUTY_MASK 0xFFFF
+
+