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mbed/SPISlave.h@3:78f223d34f36, 2019-03-05 (annotated)

Committer:
ethaderu
Date:
Tue Mar 05 02:34:44 2019 +0000
Revision:
3:78f223d34f36
Publish 1

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ethaderu 3:78f223d34f36 1 /* mbed Microcontroller Library
ethaderu 3:78f223d34f36 2 * Copyright (c) 2006-2013 ARM Limited
ethaderu 3:78f223d34f36 3 *
ethaderu 3:78f223d34f36 4 * Licensed under the Apache License, Version 2.0 (the "License");
ethaderu 3:78f223d34f36 5 * you may not use this file except in compliance with the License.
ethaderu 3:78f223d34f36 6 * You may obtain a copy of the License at
ethaderu 3:78f223d34f36 7 *
ethaderu 3:78f223d34f36 8 * http://www.apache.org/licenses/LICENSE-2.0
ethaderu 3:78f223d34f36 9 *
ethaderu 3:78f223d34f36 10 * Unless required by applicable law or agreed to in writing, software
ethaderu 3:78f223d34f36 11 * distributed under the License is distributed on an "AS IS" BASIS,
ethaderu 3:78f223d34f36 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ethaderu 3:78f223d34f36 13 * See the License for the specific language governing permissions and
ethaderu 3:78f223d34f36 14 * limitations under the License.
ethaderu 3:78f223d34f36 15 */
ethaderu 3:78f223d34f36 16 #ifndef MBED_SPISLAVE_H
ethaderu 3:78f223d34f36 17 #define MBED_SPISLAVE_H
ethaderu 3:78f223d34f36 18
ethaderu 3:78f223d34f36 19 #include "platform.h"
ethaderu 3:78f223d34f36 20
ethaderu 3:78f223d34f36 21 #if DEVICE_SPISLAVE
ethaderu 3:78f223d34f36 22
ethaderu 3:78f223d34f36 23 #include "spi_api.h"
ethaderu 3:78f223d34f36 24
ethaderu 3:78f223d34f36 25 namespace mbed {
ethaderu 3:78f223d34f36 26
ethaderu 3:78f223d34f36 27 /** A SPI slave, used for communicating with a SPI Master device
ethaderu 3:78f223d34f36 28 *
ethaderu 3:78f223d34f36 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
ethaderu 3:78f223d34f36 30 *
ethaderu 3:78f223d34f36 31 * Example:
ethaderu 3:78f223d34f36 32 * @code
ethaderu 3:78f223d34f36 33 * // Reply to a SPI master as slave
ethaderu 3:78f223d34f36 34 *
ethaderu 3:78f223d34f36 35 * #include "mbed.h"
ethaderu 3:78f223d34f36 36 *
ethaderu 3:78f223d34f36 37 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
ethaderu 3:78f223d34f36 38 *
ethaderu 3:78f223d34f36 39 * int main() {
ethaderu 3:78f223d34f36 40 * device.reply(0x00); // Prime SPI with first reply
ethaderu 3:78f223d34f36 41 * while(1) {
ethaderu 3:78f223d34f36 42 * if(device.receive()) {
ethaderu 3:78f223d34f36 43 * int v = device.read(); // Read byte from master
ethaderu 3:78f223d34f36 44 * v = (v + 1) % 0x100; // Add one to it, modulo 256
ethaderu 3:78f223d34f36 45 * device.reply(v); // Make this the next reply
ethaderu 3:78f223d34f36 46 * }
ethaderu 3:78f223d34f36 47 * }
ethaderu 3:78f223d34f36 48 * }
ethaderu 3:78f223d34f36 49 * @endcode
ethaderu 3:78f223d34f36 50 */
ethaderu 3:78f223d34f36 51 class SPISlave {
ethaderu 3:78f223d34f36 52
ethaderu 3:78f223d34f36 53 public:
ethaderu 3:78f223d34f36 54
ethaderu 3:78f223d34f36 55 /** Create a SPI slave connected to the specified pins
ethaderu 3:78f223d34f36 56 *
ethaderu 3:78f223d34f36 57 * mosi or miso can be specfied as NC if not used
ethaderu 3:78f223d34f36 58 *
ethaderu 3:78f223d34f36 59 * @param mosi SPI Master Out, Slave In pin
ethaderu 3:78f223d34f36 60 * @param miso SPI Master In, Slave Out pin
ethaderu 3:78f223d34f36 61 * @param sclk SPI Clock pin
ethaderu 3:78f223d34f36 62 * @param ssel SPI chip select pin
ethaderu 3:78f223d34f36 63 */
ethaderu 3:78f223d34f36 64 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
ethaderu 3:78f223d34f36 65
ethaderu 3:78f223d34f36 66 /** Configure the data transmission format
ethaderu 3:78f223d34f36 67 *
ethaderu 3:78f223d34f36 68 * @param bits Number of bits per SPI frame (4 - 16)
ethaderu 3:78f223d34f36 69 * @param mode Clock polarity and phase mode (0 - 3)
ethaderu 3:78f223d34f36 70 *
ethaderu 3:78f223d34f36 71 * @code
ethaderu 3:78f223d34f36 72 * mode | POL PHA
ethaderu 3:78f223d34f36 73 * -----+--------
ethaderu 3:78f223d34f36 74 * 0 | 0 0
ethaderu 3:78f223d34f36 75 * 1 | 0 1
ethaderu 3:78f223d34f36 76 * 2 | 1 0
ethaderu 3:78f223d34f36 77 * 3 | 1 1
ethaderu 3:78f223d34f36 78 * @endcode
ethaderu 3:78f223d34f36 79 */
ethaderu 3:78f223d34f36 80 void format(int bits, int mode = 0);
ethaderu 3:78f223d34f36 81
ethaderu 3:78f223d34f36 82 /** Set the spi bus clock frequency
ethaderu 3:78f223d34f36 83 *
ethaderu 3:78f223d34f36 84 * @param hz SCLK frequency in hz (default = 1MHz)
ethaderu 3:78f223d34f36 85 */
ethaderu 3:78f223d34f36 86 void frequency(int hz = 1000000);
ethaderu 3:78f223d34f36 87
ethaderu 3:78f223d34f36 88 /** Polls the SPI to see if data has been received
ethaderu 3:78f223d34f36 89 *
ethaderu 3:78f223d34f36 90 * @returns
ethaderu 3:78f223d34f36 91 * 0 if no data,
ethaderu 3:78f223d34f36 92 * 1 otherwise
ethaderu 3:78f223d34f36 93 */
ethaderu 3:78f223d34f36 94 int receive(void);
ethaderu 3:78f223d34f36 95
ethaderu 3:78f223d34f36 96 /** Retrieve data from receive buffer as slave
ethaderu 3:78f223d34f36 97 *
ethaderu 3:78f223d34f36 98 * @returns
ethaderu 3:78f223d34f36 99 * the data in the receive buffer
ethaderu 3:78f223d34f36 100 */
ethaderu 3:78f223d34f36 101 int read(void);
ethaderu 3:78f223d34f36 102
ethaderu 3:78f223d34f36 103 /** Fill the transmission buffer with the value to be written out
ethaderu 3:78f223d34f36 104 * as slave on the next received message from the master.
ethaderu 3:78f223d34f36 105 *
ethaderu 3:78f223d34f36 106 * @param value the data to be transmitted next
ethaderu 3:78f223d34f36 107 */
ethaderu 3:78f223d34f36 108 void reply(int value);
ethaderu 3:78f223d34f36 109
ethaderu 3:78f223d34f36 110 protected:
ethaderu 3:78f223d34f36 111 spi_t _spi;
ethaderu 3:78f223d34f36 112
ethaderu 3:78f223d34f36 113 int _bits;
ethaderu 3:78f223d34f36 114 int _mode;
ethaderu 3:78f223d34f36 115 int _hz;
ethaderu 3:78f223d34f36 116 };
ethaderu 3:78f223d34f36 117
ethaderu 3:78f223d34f36 118 } // namespace mbed
ethaderu 3:78f223d34f36 119
ethaderu 3:78f223d34f36 120 #endif
ethaderu 3:78f223d34f36 121
ethaderu 3:78f223d34f36 122 #endif