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mbed/SPI.h@3:78f223d34f36, 2019-03-05 (annotated)

Committer:
ethaderu
Date:
Tue Mar 05 02:34:44 2019 +0000
Revision:
3:78f223d34f36
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ethaderu 3:78f223d34f36 1 /* mbed Microcontroller Library
ethaderu 3:78f223d34f36 2 * Copyright (c) 2006-2015 ARM Limited
ethaderu 3:78f223d34f36 3 *
ethaderu 3:78f223d34f36 4 * Licensed under the Apache License, Version 2.0 (the "License");
ethaderu 3:78f223d34f36 5 * you may not use this file except in compliance with the License.
ethaderu 3:78f223d34f36 6 * You may obtain a copy of the License at
ethaderu 3:78f223d34f36 7 *
ethaderu 3:78f223d34f36 8 * http://www.apache.org/licenses/LICENSE-2.0
ethaderu 3:78f223d34f36 9 *
ethaderu 3:78f223d34f36 10 * Unless required by applicable law or agreed to in writing, software
ethaderu 3:78f223d34f36 11 * distributed under the License is distributed on an "AS IS" BASIS,
ethaderu 3:78f223d34f36 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ethaderu 3:78f223d34f36 13 * See the License for the specific language governing permissions and
ethaderu 3:78f223d34f36 14 * limitations under the License.
ethaderu 3:78f223d34f36 15 */
ethaderu 3:78f223d34f36 16 #ifndef MBED_SPI_H
ethaderu 3:78f223d34f36 17 #define MBED_SPI_H
ethaderu 3:78f223d34f36 18
ethaderu 3:78f223d34f36 19 #include "platform.h"
ethaderu 3:78f223d34f36 20
ethaderu 3:78f223d34f36 21 #if DEVICE_SPI
ethaderu 3:78f223d34f36 22
ethaderu 3:78f223d34f36 23 #include "spi_api.h"
ethaderu 3:78f223d34f36 24
ethaderu 3:78f223d34f36 25 #if DEVICE_SPI_ASYNCH
ethaderu 3:78f223d34f36 26 #include "CThunk.h"
ethaderu 3:78f223d34f36 27 #include "dma_api.h"
ethaderu 3:78f223d34f36 28 #include "CircularBuffer.h"
ethaderu 3:78f223d34f36 29 #include "FunctionPointer.h"
ethaderu 3:78f223d34f36 30 #include "Transaction.h"
ethaderu 3:78f223d34f36 31 #endif
ethaderu 3:78f223d34f36 32
ethaderu 3:78f223d34f36 33 namespace mbed {
ethaderu 3:78f223d34f36 34
ethaderu 3:78f223d34f36 35 /** A SPI Master, used for communicating with SPI slave devices
ethaderu 3:78f223d34f36 36 *
ethaderu 3:78f223d34f36 37 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
ethaderu 3:78f223d34f36 38 *
ethaderu 3:78f223d34f36 39 * Most SPI devices will also require Chip Select and Reset signals. These
ethaderu 3:78f223d34f36 40 * can be controlled using <DigitalOut> pins
ethaderu 3:78f223d34f36 41 *
ethaderu 3:78f223d34f36 42 * Example:
ethaderu 3:78f223d34f36 43 * @code
ethaderu 3:78f223d34f36 44 * // Send a byte to a SPI slave, and record the response
ethaderu 3:78f223d34f36 45 *
ethaderu 3:78f223d34f36 46 * #include "mbed.h"
ethaderu 3:78f223d34f36 47 *
ethaderu 3:78f223d34f36 48 * // hardware ssel (where applicable)
ethaderu 3:78f223d34f36 49 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
ethaderu 3:78f223d34f36 50 *
ethaderu 3:78f223d34f36 51 * // software ssel
ethaderu 3:78f223d34f36 52 * SPI device(p5, p6, p7); // mosi, miso, sclk
ethaderu 3:78f223d34f36 53 * DigitalOut cs(p8); // ssel
ethaderu 3:78f223d34f36 54 *
ethaderu 3:78f223d34f36 55 * int main() {
ethaderu 3:78f223d34f36 56 * // hardware ssel (where applicable)
ethaderu 3:78f223d34f36 57 * //int response = device.write(0xFF);
ethaderu 3:78f223d34f36 58 *
ethaderu 3:78f223d34f36 59 * // software ssel
ethaderu 3:78f223d34f36 60 * cs = 0;
ethaderu 3:78f223d34f36 61 * int response = device.write(0xFF);
ethaderu 3:78f223d34f36 62 * cs = 1;
ethaderu 3:78f223d34f36 63 * }
ethaderu 3:78f223d34f36 64 * @endcode
ethaderu 3:78f223d34f36 65 */
ethaderu 3:78f223d34f36 66 class SPI {
ethaderu 3:78f223d34f36 67
ethaderu 3:78f223d34f36 68 public:
ethaderu 3:78f223d34f36 69
ethaderu 3:78f223d34f36 70 /** Create a SPI master connected to the specified pins
ethaderu 3:78f223d34f36 71 *
ethaderu 3:78f223d34f36 72 * mosi or miso can be specfied as NC if not used
ethaderu 3:78f223d34f36 73 *
ethaderu 3:78f223d34f36 74 * @param mosi SPI Master Out, Slave In pin
ethaderu 3:78f223d34f36 75 * @param miso SPI Master In, Slave Out pin
ethaderu 3:78f223d34f36 76 * @param sclk SPI Clock pin
ethaderu 3:78f223d34f36 77 * @param ssel SPI chip select pin
ethaderu 3:78f223d34f36 78 */
ethaderu 3:78f223d34f36 79 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
ethaderu 3:78f223d34f36 80
ethaderu 3:78f223d34f36 81 /** Configure the data transmission format
ethaderu 3:78f223d34f36 82 *
ethaderu 3:78f223d34f36 83 * @param bits Number of bits per SPI frame (4 - 16)
ethaderu 3:78f223d34f36 84 * @param mode Clock polarity and phase mode (0 - 3)
ethaderu 3:78f223d34f36 85 *
ethaderu 3:78f223d34f36 86 * @code
ethaderu 3:78f223d34f36 87 * mode | POL PHA
ethaderu 3:78f223d34f36 88 * -----+--------
ethaderu 3:78f223d34f36 89 * 0 | 0 0
ethaderu 3:78f223d34f36 90 * 1 | 0 1
ethaderu 3:78f223d34f36 91 * 2 | 1 0
ethaderu 3:78f223d34f36 92 * 3 | 1 1
ethaderu 3:78f223d34f36 93 * @endcode
ethaderu 3:78f223d34f36 94 */
ethaderu 3:78f223d34f36 95 void format(int bits, int mode = 0);
ethaderu 3:78f223d34f36 96
ethaderu 3:78f223d34f36 97 /** Set the spi bus clock frequency
ethaderu 3:78f223d34f36 98 *
ethaderu 3:78f223d34f36 99 * @param hz SCLK frequency in hz (default = 1MHz)
ethaderu 3:78f223d34f36 100 */
ethaderu 3:78f223d34f36 101 void frequency(int hz = 1000000);
ethaderu 3:78f223d34f36 102
ethaderu 3:78f223d34f36 103 /** Write to the SPI Slave and return the response
ethaderu 3:78f223d34f36 104 *
ethaderu 3:78f223d34f36 105 * @param value Data to be sent to the SPI slave
ethaderu 3:78f223d34f36 106 *
ethaderu 3:78f223d34f36 107 * @returns
ethaderu 3:78f223d34f36 108 * Response from the SPI slave
ethaderu 3:78f223d34f36 109 */
ethaderu 3:78f223d34f36 110 virtual int write(int value);
ethaderu 3:78f223d34f36 111
ethaderu 3:78f223d34f36 112 #if DEVICE_SPI_ASYNCH
ethaderu 3:78f223d34f36 113
ethaderu 3:78f223d34f36 114 /** Start non-blocking SPI transfer using 8bit buffers.
ethaderu 3:78f223d34f36 115 *
ethaderu 3:78f223d34f36 116 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
ethaderu 3:78f223d34f36 117 * the default SPI value is sent
ethaderu 3:78f223d34f36 118 * @param tx_length The length of TX buffer in bytes
ethaderu 3:78f223d34f36 119 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ethaderu 3:78f223d34f36 120 * received data are ignored
ethaderu 3:78f223d34f36 121 * @param rx_length The length of RX buffer in bytes
ethaderu 3:78f223d34f36 122 * @param callback The event callback function
ethaderu 3:78f223d34f36 123 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
ethaderu 3:78f223d34f36 124 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
ethaderu 3:78f223d34f36 125 */
ethaderu 3:78f223d34f36 126 template<typename Type>
ethaderu 3:78f223d34f36 127 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
ethaderu 3:78f223d34f36 128 if (spi_active(&_spi)) {
ethaderu 3:78f223d34f36 129 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
ethaderu 3:78f223d34f36 130 }
ethaderu 3:78f223d34f36 131 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
ethaderu 3:78f223d34f36 132 return 0;
ethaderu 3:78f223d34f36 133 }
ethaderu 3:78f223d34f36 134
ethaderu 3:78f223d34f36 135 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
ethaderu 3:78f223d34f36 136 */
ethaderu 3:78f223d34f36 137 void abort_transfer();
ethaderu 3:78f223d34f36 138
ethaderu 3:78f223d34f36 139 /** Clear the transaction buffer
ethaderu 3:78f223d34f36 140 */
ethaderu 3:78f223d34f36 141 void clear_transfer_buffer();
ethaderu 3:78f223d34f36 142
ethaderu 3:78f223d34f36 143 /** Clear the transaction buffer and abort on-going transfer.
ethaderu 3:78f223d34f36 144 */
ethaderu 3:78f223d34f36 145 void abort_all_transfers();
ethaderu 3:78f223d34f36 146
ethaderu 3:78f223d34f36 147 /** Configure DMA usage suggestion for non-blocking transfers
ethaderu 3:78f223d34f36 148 *
ethaderu 3:78f223d34f36 149 * @param usage The usage DMA hint for peripheral
ethaderu 3:78f223d34f36 150 * @return Zero if the usage was set, -1 if a transaction is on-going
ethaderu 3:78f223d34f36 151 */
ethaderu 3:78f223d34f36 152 int set_dma_usage(DMAUsage usage);
ethaderu 3:78f223d34f36 153
ethaderu 3:78f223d34f36 154 protected:
ethaderu 3:78f223d34f36 155 /** SPI IRQ handler
ethaderu 3:78f223d34f36 156 *
ethaderu 3:78f223d34f36 157 */
ethaderu 3:78f223d34f36 158 void irq_handler_asynch(void);
ethaderu 3:78f223d34f36 159
ethaderu 3:78f223d34f36 160 /** Common transfer method
ethaderu 3:78f223d34f36 161 *
ethaderu 3:78f223d34f36 162 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
ethaderu 3:78f223d34f36 163 * the default SPI value is sent
ethaderu 3:78f223d34f36 164 * @param tx_length The length of TX buffer in bytes
ethaderu 3:78f223d34f36 165 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ethaderu 3:78f223d34f36 166 * received data are ignored
ethaderu 3:78f223d34f36 167 * @param rx_length The length of RX buffer in bytes
ethaderu 3:78f223d34f36 168 * @param bit_width The buffers element width
ethaderu 3:78f223d34f36 169 * @param callback The event callback function
ethaderu 3:78f223d34f36 170 * @param event The logical OR of events to modify
ethaderu 3:78f223d34f36 171 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
ethaderu 3:78f223d34f36 172 */
ethaderu 3:78f223d34f36 173 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
ethaderu 3:78f223d34f36 174
ethaderu 3:78f223d34f36 175 /**
ethaderu 3:78f223d34f36 176 *
ethaderu 3:78f223d34f36 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
ethaderu 3:78f223d34f36 178 * the default SPI value is sent
ethaderu 3:78f223d34f36 179 * @param tx_length The length of TX buffer in bytes
ethaderu 3:78f223d34f36 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ethaderu 3:78f223d34f36 181 * received data are ignored
ethaderu 3:78f223d34f36 182 * @param rx_length The length of RX buffer in bytes
ethaderu 3:78f223d34f36 183 * @param bit_width The buffers element width
ethaderu 3:78f223d34f36 184 * @param callback The event callback function
ethaderu 3:78f223d34f36 185 * @param event The logical OR of events to modify
ethaderu 3:78f223d34f36 186 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
ethaderu 3:78f223d34f36 187 */
ethaderu 3:78f223d34f36 188 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
ethaderu 3:78f223d34f36 189
ethaderu 3:78f223d34f36 190 /** Configures a callback, spi peripheral and initiate a new transfer
ethaderu 3:78f223d34f36 191 *
ethaderu 3:78f223d34f36 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
ethaderu 3:78f223d34f36 193 * the default SPI value is sent
ethaderu 3:78f223d34f36 194 * @param tx_length The length of TX buffer in bytes
ethaderu 3:78f223d34f36 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ethaderu 3:78f223d34f36 196 * received data are ignored
ethaderu 3:78f223d34f36 197 * @param rx_length The length of RX buffer in bytes
ethaderu 3:78f223d34f36 198 * @param bit_width The buffers element width
ethaderu 3:78f223d34f36 199 * @param callback The event callback function
ethaderu 3:78f223d34f36 200 * @param event The logical OR of events to modify
ethaderu 3:78f223d34f36 201 */
ethaderu 3:78f223d34f36 202 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
ethaderu 3:78f223d34f36 203
ethaderu 3:78f223d34f36 204 #if TRANSACTION_QUEUE_SIZE_SPI
ethaderu 3:78f223d34f36 205
ethaderu 3:78f223d34f36 206 /** Start a new transaction
ethaderu 3:78f223d34f36 207 *
ethaderu 3:78f223d34f36 208 * @param data Transaction data
ethaderu 3:78f223d34f36 209 */
ethaderu 3:78f223d34f36 210 void start_transaction(transaction_t *data);
ethaderu 3:78f223d34f36 211
ethaderu 3:78f223d34f36 212 /** Dequeue a transaction
ethaderu 3:78f223d34f36 213 *
ethaderu 3:78f223d34f36 214 */
ethaderu 3:78f223d34f36 215 void dequeue_transaction();
ethaderu 3:78f223d34f36 216 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
ethaderu 3:78f223d34f36 217 #endif
ethaderu 3:78f223d34f36 218
ethaderu 3:78f223d34f36 219 #endif
ethaderu 3:78f223d34f36 220
ethaderu 3:78f223d34f36 221 public:
ethaderu 3:78f223d34f36 222 virtual ~SPI() {
ethaderu 3:78f223d34f36 223 }
ethaderu 3:78f223d34f36 224
ethaderu 3:78f223d34f36 225 protected:
ethaderu 3:78f223d34f36 226 spi_t _spi;
ethaderu 3:78f223d34f36 227
ethaderu 3:78f223d34f36 228 #if DEVICE_SPI_ASYNCH
ethaderu 3:78f223d34f36 229 CThunk<SPI> _irq;
ethaderu 3:78f223d34f36 230 event_callback_t _callback;
ethaderu 3:78f223d34f36 231 DMAUsage _usage;
ethaderu 3:78f223d34f36 232 #endif
ethaderu 3:78f223d34f36 233
ethaderu 3:78f223d34f36 234 void aquire(void);
ethaderu 3:78f223d34f36 235 static SPI *_owner;
ethaderu 3:78f223d34f36 236 int _bits;
ethaderu 3:78f223d34f36 237 int _mode;
ethaderu 3:78f223d34f36 238 int _hz;
ethaderu 3:78f223d34f36 239 };
ethaderu 3:78f223d34f36 240
ethaderu 3:78f223d34f36 241 } // namespace mbed
ethaderu 3:78f223d34f36 242
ethaderu 3:78f223d34f36 243 #endif
ethaderu 3:78f223d34f36 244
ethaderu 3:78f223d34f36 245 #endif