Abdulaziz alsalloum / Project1HomeAlertSystem

Home Alert System

Dependencies:   PWM_Tone_Library DHT

mbed/i2c_api.h@5:569a4894abc1, 2019-03-08 (annotated)

Committer:
aziz111
Date:
Fri Mar 08 17:15:02 2019 +0000
Revision:
5:569a4894abc1
Parent:
3:78f223d34f36 
Final

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ethaderu 3:78f223d34f36 1 /* mbed Microcontroller Library
ethaderu 3:78f223d34f36 2 * Copyright (c) 2006-2015 ARM Limited
ethaderu 3:78f223d34f36 3 *
ethaderu 3:78f223d34f36 4 * Licensed under the Apache License, Version 2.0 (the "License");
ethaderu 3:78f223d34f36 5 * you may not use this file except in compliance with the License.
ethaderu 3:78f223d34f36 6 * You may obtain a copy of the License at
ethaderu 3:78f223d34f36 7 *
ethaderu 3:78f223d34f36 8 * http://www.apache.org/licenses/LICENSE-2.0
ethaderu 3:78f223d34f36 9 *
ethaderu 3:78f223d34f36 10 * Unless required by applicable law or agreed to in writing, software
ethaderu 3:78f223d34f36 11 * distributed under the License is distributed on an "AS IS" BASIS,
ethaderu 3:78f223d34f36 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ethaderu 3:78f223d34f36 13 * See the License for the specific language governing permissions and
ethaderu 3:78f223d34f36 14 * limitations under the License.
ethaderu 3:78f223d34f36 15 */
ethaderu 3:78f223d34f36 16 #ifndef MBED_I2C_API_H
ethaderu 3:78f223d34f36 17 #define MBED_I2C_API_H
ethaderu 3:78f223d34f36 18
ethaderu 3:78f223d34f36 19 #include "device.h"
ethaderu 3:78f223d34f36 20 #include "buffer.h"
ethaderu 3:78f223d34f36 21
ethaderu 3:78f223d34f36 22 #if DEVICE_I2C
ethaderu 3:78f223d34f36 23
ethaderu 3:78f223d34f36 24 /**
ethaderu 3:78f223d34f36 25 * @defgroup I2CEvents I2C Events Macros
ethaderu 3:78f223d34f36 26 *
ethaderu 3:78f223d34f36 27 * @{
ethaderu 3:78f223d34f36 28 */
ethaderu 3:78f223d34f36 29 #define I2C_EVENT_ERROR (1 << 1)
ethaderu 3:78f223d34f36 30 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
ethaderu 3:78f223d34f36 31 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
ethaderu 3:78f223d34f36 32 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
ethaderu 3:78f223d34f36 33 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
ethaderu 3:78f223d34f36 34
ethaderu 3:78f223d34f36 35 /**@}*/
ethaderu 3:78f223d34f36 36
ethaderu 3:78f223d34f36 37 #if DEVICE_I2C_ASYNCH
ethaderu 3:78f223d34f36 38 /** Asynch i2c hal structure
ethaderu 3:78f223d34f36 39 */
ethaderu 3:78f223d34f36 40 typedef struct {
ethaderu 3:78f223d34f36 41 struct i2c_s i2c; /**< Target specific i2c structure */
ethaderu 3:78f223d34f36 42 struct buffer_s tx_buff; /**< Tx buffer */
ethaderu 3:78f223d34f36 43 struct buffer_s rx_buff; /**< Rx buffer */
ethaderu 3:78f223d34f36 44 } i2c_t;
ethaderu 3:78f223d34f36 45
ethaderu 3:78f223d34f36 46 #else
ethaderu 3:78f223d34f36 47 /** Non-asynch i2c hal structure
ethaderu 3:78f223d34f36 48 */
ethaderu 3:78f223d34f36 49 typedef struct i2c_s i2c_t;
ethaderu 3:78f223d34f36 50
ethaderu 3:78f223d34f36 51 #endif
ethaderu 3:78f223d34f36 52
ethaderu 3:78f223d34f36 53 enum {
ethaderu 3:78f223d34f36 54 I2C_ERROR_NO_SLAVE = -1,
ethaderu 3:78f223d34f36 55 I2C_ERROR_BUS_BUSY = -2
ethaderu 3:78f223d34f36 56 };
ethaderu 3:78f223d34f36 57
ethaderu 3:78f223d34f36 58 #ifdef __cplusplus
ethaderu 3:78f223d34f36 59 extern "C" {
ethaderu 3:78f223d34f36 60 #endif
ethaderu 3:78f223d34f36 61
ethaderu 3:78f223d34f36 62 /**
ethaderu 3:78f223d34f36 63 * \defgroup GeneralI2C I2C Configuration Functions
ethaderu 3:78f223d34f36 64 * @{
ethaderu 3:78f223d34f36 65 */
ethaderu 3:78f223d34f36 66
ethaderu 3:78f223d34f36 67 /** Initialize the I2C peripheral. It sets the default parameters for I2C
ethaderu 3:78f223d34f36 68 * peripheral, and configure its specifieds pins.
ethaderu 3:78f223d34f36 69 * @param obj The i2c object
ethaderu 3:78f223d34f36 70 * @param sda The sda pin
ethaderu 3:78f223d34f36 71 * @param scl The scl pin
ethaderu 3:78f223d34f36 72 */
ethaderu 3:78f223d34f36 73 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
ethaderu 3:78f223d34f36 74
ethaderu 3:78f223d34f36 75 /** Configure the I2C frequency.
ethaderu 3:78f223d34f36 76 * @param obj The i2c object
ethaderu 3:78f223d34f36 77 * @param hz Frequency in Hz
ethaderu 3:78f223d34f36 78 */
ethaderu 3:78f223d34f36 79 void i2c_frequency(i2c_t *obj, int hz);
ethaderu 3:78f223d34f36 80
ethaderu 3:78f223d34f36 81 /** Send START command.
ethaderu 3:78f223d34f36 82 * @param obj The i2c object
ethaderu 3:78f223d34f36 83 */
ethaderu 3:78f223d34f36 84 int i2c_start(i2c_t *obj);
ethaderu 3:78f223d34f36 85
ethaderu 3:78f223d34f36 86 /** Send STOP command.
ethaderu 3:78f223d34f36 87 * @param obj The i2c object
ethaderu 3:78f223d34f36 88 */
ethaderu 3:78f223d34f36 89 int i2c_stop(i2c_t *obj);
ethaderu 3:78f223d34f36 90
ethaderu 3:78f223d34f36 91 /** Blocking reading data.
ethaderu 3:78f223d34f36 92 * @param obj The i2c object
ethaderu 3:78f223d34f36 93 * @param address 7-bit address (last bit is 1)
ethaderu 3:78f223d34f36 94 * @param data The buffer for receiving
ethaderu 3:78f223d34f36 95 * @param length Number of bytes to read
ethaderu 3:78f223d34f36 96 * @param stop Stop to be generated after the transfer is done
ethaderu 3:78f223d34f36 97 * @return Number of read bytes
ethaderu 3:78f223d34f36 98 */
ethaderu 3:78f223d34f36 99 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
ethaderu 3:78f223d34f36 100
ethaderu 3:78f223d34f36 101 /** Blocking sending data.
ethaderu 3:78f223d34f36 102 * @param obj The i2c object
ethaderu 3:78f223d34f36 103 * @param address 7-bit address (last bit is 0)
ethaderu 3:78f223d34f36 104 * @param data The buffer for sending
ethaderu 3:78f223d34f36 105 * @param length Number of bytes to wrte
ethaderu 3:78f223d34f36 106 * @param stop Stop to be generated after the transfer is done
ethaderu 3:78f223d34f36 107 * @return Number of written bytes
ethaderu 3:78f223d34f36 108 */
ethaderu 3:78f223d34f36 109 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
ethaderu 3:78f223d34f36 110
ethaderu 3:78f223d34f36 111 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop().
ethaderu 3:78f223d34f36 112 * @param obj The i2c object
ethaderu 3:78f223d34f36 113 */
ethaderu 3:78f223d34f36 114 void i2c_reset(i2c_t *obj);
ethaderu 3:78f223d34f36 115
ethaderu 3:78f223d34f36 116 /** Read one byte.
ethaderu 3:78f223d34f36 117 * @param obj The i2c object
ethaderu 3:78f223d34f36 118 * @param last Acknoledge
ethaderu 3:78f223d34f36 119 * @return The read byte
ethaderu 3:78f223d34f36 120 */
ethaderu 3:78f223d34f36 121 int i2c_byte_read(i2c_t *obj, int last);
ethaderu 3:78f223d34f36 122
ethaderu 3:78f223d34f36 123 /** Write one byte.
ethaderu 3:78f223d34f36 124 * @param obj The i2c object
ethaderu 3:78f223d34f36 125 * @param data Byte to be written
ethaderu 3:78f223d34f36 126 * @return 1 if NAK was received, 0 if ACK was received, 2 for timeout.
ethaderu 3:78f223d34f36 127 */
ethaderu 3:78f223d34f36 128 int i2c_byte_write(i2c_t *obj, int data);
ethaderu 3:78f223d34f36 129
ethaderu 3:78f223d34f36 130 /**@}*/
ethaderu 3:78f223d34f36 131
ethaderu 3:78f223d34f36 132 #if DEVICE_I2CSLAVE
ethaderu 3:78f223d34f36 133
ethaderu 3:78f223d34f36 134 /**
ethaderu 3:78f223d34f36 135 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
ethaderu 3:78f223d34f36 136 * @{
ethaderu 3:78f223d34f36 137 */
ethaderu 3:78f223d34f36 138
ethaderu 3:78f223d34f36 139 /** Configure I2C as slave or master.
ethaderu 3:78f223d34f36 140 * @param obj The I2C object
ethaderu 3:78f223d34f36 141 * @return non-zero if a value is available
ethaderu 3:78f223d34f36 142 */
ethaderu 3:78f223d34f36 143 void i2c_slave_mode(i2c_t *obj, int enable_slave);
ethaderu 3:78f223d34f36 144
ethaderu 3:78f223d34f36 145 /** Check to see if the I2C slave has been addressed.
ethaderu 3:78f223d34f36 146 * @param obj The I2C object
ethaderu 3:78f223d34f36 147 * @return The status - 1 - read addresses, 2 - write to all slaves,
ethaderu 3:78f223d34f36 148 * 3 write addressed, 0 - the slave has not been addressed
ethaderu 3:78f223d34f36 149 */
ethaderu 3:78f223d34f36 150 int i2c_slave_receive(i2c_t *obj);
ethaderu 3:78f223d34f36 151
ethaderu 3:78f223d34f36 152 /** Configure I2C as slave or master.
ethaderu 3:78f223d34f36 153 * @param obj The I2C object
ethaderu 3:78f223d34f36 154 * @return non-zero if a value is available
ethaderu 3:78f223d34f36 155 */
ethaderu 3:78f223d34f36 156 int i2c_slave_read(i2c_t *obj, char *data, int length);
ethaderu 3:78f223d34f36 157
ethaderu 3:78f223d34f36 158 /** Configure I2C as slave or master.
ethaderu 3:78f223d34f36 159 * @param obj The I2C object
ethaderu 3:78f223d34f36 160 * @return non-zero if a value is available
ethaderu 3:78f223d34f36 161 */
ethaderu 3:78f223d34f36 162 int i2c_slave_write(i2c_t *obj, const char *data, int length);
ethaderu 3:78f223d34f36 163
ethaderu 3:78f223d34f36 164 /** Configure I2C address.
ethaderu 3:78f223d34f36 165 * @param obj The I2C object
ethaderu 3:78f223d34f36 166 * @param idx Currently not used
ethaderu 3:78f223d34f36 167 * @param address The address to be set
ethaderu 3:78f223d34f36 168 * @param mask Currently not used
ethaderu 3:78f223d34f36 169 */
ethaderu 3:78f223d34f36 170 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
ethaderu 3:78f223d34f36 171
ethaderu 3:78f223d34f36 172 #endif
ethaderu 3:78f223d34f36 173
ethaderu 3:78f223d34f36 174 /**@}*/
ethaderu 3:78f223d34f36 175
ethaderu 3:78f223d34f36 176 #if DEVICE_I2C_ASYNCH
ethaderu 3:78f223d34f36 177
ethaderu 3:78f223d34f36 178 /**
ethaderu 3:78f223d34f36 179 * \defgroup AsynchI2C Asynchronous I2C Hardware Abstraction Layer
ethaderu 3:78f223d34f36 180 * @{
ethaderu 3:78f223d34f36 181 */
ethaderu 3:78f223d34f36 182
ethaderu 3:78f223d34f36 183 /** Start i2c asynchronous transfer.
ethaderu 3:78f223d34f36 184 * @param obj The I2C object
ethaderu 3:78f223d34f36 185 * @param tx The buffer to send
ethaderu 3:78f223d34f36 186 * @param tx_length The number of words to transmit
ethaderu 3:78f223d34f36 187 * @param rx The buffer to receive
ethaderu 3:78f223d34f36 188 * @param rx_length The number of words to receive
ethaderu 3:78f223d34f36 189 * @param address The address to be set - 7bit or 9 bit
ethaderu 3:78f223d34f36 190 * @param stop If true, stop will be generated after the transfer is done
ethaderu 3:78f223d34f36 191 * @param handler The I2C IRQ handler to be set
ethaderu 3:78f223d34f36 192 * @param hint DMA hint usage
ethaderu 3:78f223d34f36 193 */
ethaderu 3:78f223d34f36 194 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
ethaderu 3:78f223d34f36 195
ethaderu 3:78f223d34f36 196 /** The asynchronous IRQ handler
ethaderu 3:78f223d34f36 197 * @param obj The I2C object which holds the transfer information
ethaderu 3:78f223d34f36 198 * @return event flags if a transfer termination condition was met or 0 otherwise.
ethaderu 3:78f223d34f36 199 */
ethaderu 3:78f223d34f36 200 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
ethaderu 3:78f223d34f36 201
ethaderu 3:78f223d34f36 202 /** Attempts to determine if I2C peripheral is already in use.
ethaderu 3:78f223d34f36 203 * @param obj The I2C object
ethaderu 3:78f223d34f36 204 * @return non-zero if the I2C module is active or zero if it is not
ethaderu 3:78f223d34f36 205 */
ethaderu 3:78f223d34f36 206 uint8_t i2c_active(i2c_t *obj);
ethaderu 3:78f223d34f36 207
ethaderu 3:78f223d34f36 208 /** Abort ongoing asynchronous transaction.
ethaderu 3:78f223d34f36 209 * @param obj The I2C object
ethaderu 3:78f223d34f36 210 */
ethaderu 3:78f223d34f36 211 void i2c_abort_asynch(i2c_t *obj);
ethaderu 3:78f223d34f36 212
ethaderu 3:78f223d34f36 213 #endif
ethaderu 3:78f223d34f36 214
ethaderu 3:78f223d34f36 215 /**@}*/
ethaderu 3:78f223d34f36 216
ethaderu 3:78f223d34f36 217 #ifdef __cplusplus
ethaderu 3:78f223d34f36 218 }
ethaderu 3:78f223d34f36 219 #endif
ethaderu 3:78f223d34f36 220
ethaderu 3:78f223d34f36 221 #endif
ethaderu 3:78f223d34f36 222
ethaderu 3:78f223d34f36 223 #endif