avnish aggarwal / Mbed 2 deprecated Bootcamp-SavePower

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Dependencies:   mbed

PowerControl.h@0:ca2e1d0254a6, 2013-09-11 (annotated)

Committer:
avnisha
Date:
Wed Sep 11 17:14:35 2013 +0000
Revision:
0:ca2e1d0254a6
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avnisha 0:ca2e1d0254a6 1 /* mbed PowerControl Library
avnisha 0:ca2e1d0254a6 2 * Copyright (c) 2010 Michael Wei
avnisha 0:ca2e1d0254a6 3 */
avnisha 0:ca2e1d0254a6 4
avnisha 0:ca2e1d0254a6 5 #ifndef MBED_POWERCONTROL_H
avnisha 0:ca2e1d0254a6 6 #define MBED_POWERCONTROL_H
avnisha 0:ca2e1d0254a6 7
avnisha 0:ca2e1d0254a6 8 //shouldn't have to include, but fixes weird problems with defines
avnisha 0:ca2e1d0254a6 9 //#include "LPC1768/LPC17xx.h"
avnisha 0:ca2e1d0254a6 10
avnisha 0:ca2e1d0254a6 11 //System Control Register
avnisha 0:ca2e1d0254a6 12 // bit 0: Reserved
avnisha 0:ca2e1d0254a6 13 // bit 1: Sleep on Exit
avnisha 0:ca2e1d0254a6 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
avnisha 0:ca2e1d0254a6 15 // bit 2: Deep Sleep
avnisha 0:ca2e1d0254a6 16 #define LPC1768_SCR_SLEEPDEEP 0x4
avnisha 0:ca2e1d0254a6 17 // bit 3: Resereved
avnisha 0:ca2e1d0254a6 18 // bit 4: Send on Pending
avnisha 0:ca2e1d0254a6 19 #define LPC1768_SCR_SEVONPEND 0x10
avnisha 0:ca2e1d0254a6 20 // bit 5-31: Reserved
avnisha 0:ca2e1d0254a6 21
avnisha 0:ca2e1d0254a6 22 //Power Control Register
avnisha 0:ca2e1d0254a6 23 // bit 0: Power mode control bit 0 (power-down mode)
avnisha 0:ca2e1d0254a6 24 #define LPC1768_PCON_PM0 0x1
avnisha 0:ca2e1d0254a6 25 // bit 1: Power mode control bit 1 (deep power-down mode)
avnisha 0:ca2e1d0254a6 26 #define LPC1768_PCON_PM1 0x2
avnisha 0:ca2e1d0254a6 27 // bit 2: Brown-out reduced power mode
avnisha 0:ca2e1d0254a6 28 #define LPC1768_PCON_BODRPM 0x4
avnisha 0:ca2e1d0254a6 29 // bit 3: Brown-out global disable
avnisha 0:ca2e1d0254a6 30 #define LPC1768_PCON_BOGD 0x8
avnisha 0:ca2e1d0254a6 31 // bit 4: Brown-out reset disable
avnisha 0:ca2e1d0254a6 32 #define LPC1768_PCON_BORD 0x10
avnisha 0:ca2e1d0254a6 33 // bit 5-7 : Reserved
avnisha 0:ca2e1d0254a6 34 // bit 8: Sleep Mode Entry Flag
avnisha 0:ca2e1d0254a6 35 #define LPC1768_PCON_SMFLAG 0x100
avnisha 0:ca2e1d0254a6 36 // bit 9: Deep Sleep Entry Flag
avnisha 0:ca2e1d0254a6 37 #define LPC1768_PCON_DSFLAG 0x200
avnisha 0:ca2e1d0254a6 38 // bit 10: Power Down Entry Flag
avnisha 0:ca2e1d0254a6 39 #define LPC1768_PCON_PDFLAG 0x400
avnisha 0:ca2e1d0254a6 40 // bit 11: Deep Power Down Entry Flag
avnisha 0:ca2e1d0254a6 41 #define LPC1768_PCON_DPDFLAG 0x800
avnisha 0:ca2e1d0254a6 42 // bit 12-31: Reserved
avnisha 0:ca2e1d0254a6 43
avnisha 0:ca2e1d0254a6 44 //"Sleep Mode" (WFI).
avnisha 0:ca2e1d0254a6 45 inline void Sleep(void)
avnisha 0:ca2e1d0254a6 46 {
avnisha 0:ca2e1d0254a6 47 __WFI();
avnisha 0:ca2e1d0254a6 48 }
avnisha 0:ca2e1d0254a6 49
avnisha 0:ca2e1d0254a6 50 //"Deep Sleep" Mode
avnisha 0:ca2e1d0254a6 51 inline void DeepSleep(void)
avnisha 0:ca2e1d0254a6 52 {
avnisha 0:ca2e1d0254a6 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
avnisha 0:ca2e1d0254a6 54 __WFI();
avnisha 0:ca2e1d0254a6 55 }
avnisha 0:ca2e1d0254a6 56
avnisha 0:ca2e1d0254a6 57 //"Power-Down" Mode
avnisha 0:ca2e1d0254a6 58 inline void PowerDown(void)
avnisha 0:ca2e1d0254a6 59 {
avnisha 0:ca2e1d0254a6 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
avnisha 0:ca2e1d0254a6 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
avnisha 0:ca2e1d0254a6 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
avnisha 0:ca2e1d0254a6 63 __WFI();
avnisha 0:ca2e1d0254a6 64 //reset back to normal
avnisha 0:ca2e1d0254a6 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
avnisha 0:ca2e1d0254a6 66 }
avnisha 0:ca2e1d0254a6 67
avnisha 0:ca2e1d0254a6 68 //"Deep Power-Down" Mode
avnisha 0:ca2e1d0254a6 69 inline void DeepPowerDown(void)
avnisha 0:ca2e1d0254a6 70 {
avnisha 0:ca2e1d0254a6 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
avnisha 0:ca2e1d0254a6 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
avnisha 0:ca2e1d0254a6 73 __WFI();
avnisha 0:ca2e1d0254a6 74 //reset back to normal
avnisha 0:ca2e1d0254a6 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
avnisha 0:ca2e1d0254a6 76 }
avnisha 0:ca2e1d0254a6 77
avnisha 0:ca2e1d0254a6 78 //shut down BOD during power-down/deep sleep
avnisha 0:ca2e1d0254a6 79 inline void BrownOut_ReducedPowerMode_Enable(void)
avnisha 0:ca2e1d0254a6 80 {
avnisha 0:ca2e1d0254a6 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
avnisha 0:ca2e1d0254a6 82 }
avnisha 0:ca2e1d0254a6 83
avnisha 0:ca2e1d0254a6 84 //turn on BOD during power-down/deep sleep
avnisha 0:ca2e1d0254a6 85 inline void BrownOut_ReducedPowerMode_Disable(void)
avnisha 0:ca2e1d0254a6 86 {
avnisha 0:ca2e1d0254a6 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
avnisha 0:ca2e1d0254a6 88 }
avnisha 0:ca2e1d0254a6 89
avnisha 0:ca2e1d0254a6 90 //turn off brown out circutry
avnisha 0:ca2e1d0254a6 91 inline void BrownOut_Global_Disable(void)
avnisha 0:ca2e1d0254a6 92 {
avnisha 0:ca2e1d0254a6 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
avnisha 0:ca2e1d0254a6 94 }
avnisha 0:ca2e1d0254a6 95
avnisha 0:ca2e1d0254a6 96 //turn on brown out circutry
avnisha 0:ca2e1d0254a6 97 inline void BrownOut_Global_Enable(void)
avnisha 0:ca2e1d0254a6 98 {
avnisha 0:ca2e1d0254a6 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
avnisha 0:ca2e1d0254a6 100 }
avnisha 0:ca2e1d0254a6 101
avnisha 0:ca2e1d0254a6 102 //turn off brown out reset circutry
avnisha 0:ca2e1d0254a6 103 inline void BrownOut_Reset_Disable(void)
avnisha 0:ca2e1d0254a6 104 {
avnisha 0:ca2e1d0254a6 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
avnisha 0:ca2e1d0254a6 106 }
avnisha 0:ca2e1d0254a6 107
avnisha 0:ca2e1d0254a6 108 //turn on brown outreset circutry
avnisha 0:ca2e1d0254a6 109 inline void BrownOut_Reset_Enable(void)
avnisha 0:ca2e1d0254a6 110 {
avnisha 0:ca2e1d0254a6 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
avnisha 0:ca2e1d0254a6 112 }
avnisha 0:ca2e1d0254a6 113 //Peripheral Control Register
avnisha 0:ca2e1d0254a6 114 // bit 0: Reserved
avnisha 0:ca2e1d0254a6 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
avnisha 0:ca2e1d0254a6 116 #define LPC1768_PCONP_PCTIM0 0x2
avnisha 0:ca2e1d0254a6 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
avnisha 0:ca2e1d0254a6 118 #define LPC1768_PCONP_PCTIM1 0x4
avnisha 0:ca2e1d0254a6 119 // bit 3: PCUART0: UART 0 power/clock enable
avnisha 0:ca2e1d0254a6 120 #define LPC1768_PCONP_PCUART0 0x8
avnisha 0:ca2e1d0254a6 121 // bit 4: PCUART1: UART 1 power/clock enable
avnisha 0:ca2e1d0254a6 122 #define LPC1768_PCONP_PCUART1 0x10
avnisha 0:ca2e1d0254a6 123 // bit 5: Reserved
avnisha 0:ca2e1d0254a6 124 // bit 6: PCPWM1: PWM 1 power/clock enable
avnisha 0:ca2e1d0254a6 125 #define LPC1768_PCONP_PCPWM1 0x40
avnisha 0:ca2e1d0254a6 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
avnisha 0:ca2e1d0254a6 127 #define LPC1768_PCONP_PCI2C0 0x80
avnisha 0:ca2e1d0254a6 128 // bit 8: PCSPI: SPI interface power/clock enable
avnisha 0:ca2e1d0254a6 129 #define LPC1768_PCONP_PCSPI 0x100
avnisha 0:ca2e1d0254a6 130 // bit 9: PCRTC: RTC power/clock enable
avnisha 0:ca2e1d0254a6 131 #define LPC1768_PCONP_PCRTC 0x200
avnisha 0:ca2e1d0254a6 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
avnisha 0:ca2e1d0254a6 133 #define LPC1768_PCONP_PCSSP1 0x400
avnisha 0:ca2e1d0254a6 134 // bit 11: Reserved
avnisha 0:ca2e1d0254a6 135 // bit 12: PCADC: A/D converter power/clock enable
avnisha 0:ca2e1d0254a6 136 #define LPC1768_PCONP_PCADC 0x1000
avnisha 0:ca2e1d0254a6 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
avnisha 0:ca2e1d0254a6 138 #define LPC1768_PCONP_PCCAN1 0x2000
avnisha 0:ca2e1d0254a6 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
avnisha 0:ca2e1d0254a6 140 #define LPC1768_PCONP_PCCAN2 0x4000
avnisha 0:ca2e1d0254a6 141 // bit 15: PCGPIO: GPIOs power/clock enable
avnisha 0:ca2e1d0254a6 142 #define LPC1768_PCONP_PCGPIO 0x8000
avnisha 0:ca2e1d0254a6 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
avnisha 0:ca2e1d0254a6 144 #define LPC1768_PCONP_PCRIT 0x10000
avnisha 0:ca2e1d0254a6 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
avnisha 0:ca2e1d0254a6 146 #define LPC1768_PCONP_PCMCPWM 0x20000
avnisha 0:ca2e1d0254a6 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
avnisha 0:ca2e1d0254a6 148 #define LPC1768_PCONP_PCQEI 0x40000
avnisha 0:ca2e1d0254a6 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
avnisha 0:ca2e1d0254a6 150 #define LPC1768_PCONP_PCI2C1 0x80000
avnisha 0:ca2e1d0254a6 151 // bit 20: Reserved
avnisha 0:ca2e1d0254a6 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
avnisha 0:ca2e1d0254a6 153 #define LPC1768_PCONP_PCSSP0 0x200000
avnisha 0:ca2e1d0254a6 154 // bit 22: PCTIM2: Timer 2 power/clock enable
avnisha 0:ca2e1d0254a6 155 #define LPC1768_PCONP_PCTIM2 0x400000
avnisha 0:ca2e1d0254a6 156 // bit 23: PCTIM3: Timer 3 power/clock enable
avnisha 0:ca2e1d0254a6 157 #define LPC1768_PCONP_PCQTIM3 0x800000
avnisha 0:ca2e1d0254a6 158 // bit 24: PCUART2: UART 2 power/clock enable
avnisha 0:ca2e1d0254a6 159 #define LPC1768_PCONP_PCUART2 0x1000000
avnisha 0:ca2e1d0254a6 160 // bit 25: PCUART3: UART 3 power/clock enable
avnisha 0:ca2e1d0254a6 161 #define LPC1768_PCONP_PCUART3 0x2000000
avnisha 0:ca2e1d0254a6 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
avnisha 0:ca2e1d0254a6 163 #define LPC1768_PCONP_PCI2C2 0x4000000
avnisha 0:ca2e1d0254a6 164 // bit 27: PCI2S: I2S interface power/clock enable
avnisha 0:ca2e1d0254a6 165 #define LPC1768_PCONP_PCI2S 0x8000000
avnisha 0:ca2e1d0254a6 166 // bit 28: Reserved
avnisha 0:ca2e1d0254a6 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
avnisha 0:ca2e1d0254a6 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
avnisha 0:ca2e1d0254a6 169 // bit 30: PCENET: Ethernet block power/clock enable
avnisha 0:ca2e1d0254a6 170 #define LPC1768_PCONP_PCENET 0x40000000
avnisha 0:ca2e1d0254a6 171 // bit 31: PCUSB: USB interface power/clock enable
avnisha 0:ca2e1d0254a6 172 #define LPC1768_PCONP_PCUSB 0x80000000
avnisha 0:ca2e1d0254a6 173
avnisha 0:ca2e1d0254a6 174 //Powers Up specified Peripheral(s)
avnisha 0:ca2e1d0254a6 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
avnisha 0:ca2e1d0254a6 176 {
avnisha 0:ca2e1d0254a6 177 return LPC_SC->PCONP |= bitMask;
avnisha 0:ca2e1d0254a6 178 }
avnisha 0:ca2e1d0254a6 179
avnisha 0:ca2e1d0254a6 180 //Powers Down specified Peripheral(s)
avnisha 0:ca2e1d0254a6 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
avnisha 0:ca2e1d0254a6 182 {
avnisha 0:ca2e1d0254a6 183 return LPC_SC->PCONP &= ~bitMask;
avnisha 0:ca2e1d0254a6 184 }
avnisha 0:ca2e1d0254a6 185
avnisha 0:ca2e1d0254a6 186 //returns if the peripheral is on or off
avnisha 0:ca2e1d0254a6 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
avnisha 0:ca2e1d0254a6 188 {
avnisha 0:ca2e1d0254a6 189 return (LPC_SC->PCONP & peripheral) ? true : false;
avnisha 0:ca2e1d0254a6 190 }
avnisha 0:ca2e1d0254a6 191
avnisha 0:ca2e1d0254a6 192 #endif