Ankit Patel / Mbed 2 deprecated Robot_Control_UDP_Ethernet

Control a robot over the internet using UDP and a Ethernet interface.

Dependencies:   EthernetInterface Motor TextLCD mbed-rtos mbed Socket lwip-eth lwip-sys lwip

mbed-rtos/rtx/HAL_CM.c@0:1496281373a5, 2013-10-17 (annotated)

Committer:
apatel336
Date:
Thu Oct 17 13:26:38 2013 +0000
Revision:
0:1496281373a5
Initial Release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
apatel336 0:1496281373a5 1 /*----------------------------------------------------------------------------
apatel336 0:1496281373a5 2 * RL-ARM - RTX
apatel336 0:1496281373a5 3 *----------------------------------------------------------------------------
apatel336 0:1496281373a5 4 * Name: HAL_CM.C
apatel336 0:1496281373a5 5 * Purpose: Hardware Abstraction Layer for Cortex-M
apatel336 0:1496281373a5 6 * Rev.: V4.60
apatel336 0:1496281373a5 7 *----------------------------------------------------------------------------
apatel336 0:1496281373a5 8 *
apatel336 0:1496281373a5 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
apatel336 0:1496281373a5 10 * All rights reserved.
apatel336 0:1496281373a5 11 * Redistribution and use in source and binary forms, with or without
apatel336 0:1496281373a5 12 * modification, are permitted provided that the following conditions are met:
apatel336 0:1496281373a5 13 * - Redistributions of source code must retain the above copyright
apatel336 0:1496281373a5 14 * notice, this list of conditions and the following disclaimer.
apatel336 0:1496281373a5 15 * - Redistributions in binary form must reproduce the above copyright
apatel336 0:1496281373a5 16 * notice, this list of conditions and the following disclaimer in the
apatel336 0:1496281373a5 17 * documentation and/or other materials provided with the distribution.
apatel336 0:1496281373a5 18 * - Neither the name of ARM nor the names of its contributors may be used
apatel336 0:1496281373a5 19 * to endorse or promote products derived from this software without
apatel336 0:1496281373a5 20 * specific prior written permission.
apatel336 0:1496281373a5 21 *
apatel336 0:1496281373a5 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
apatel336 0:1496281373a5 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
apatel336 0:1496281373a5 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
apatel336 0:1496281373a5 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
apatel336 0:1496281373a5 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
apatel336 0:1496281373a5 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
apatel336 0:1496281373a5 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
apatel336 0:1496281373a5 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
apatel336 0:1496281373a5 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
apatel336 0:1496281373a5 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
apatel336 0:1496281373a5 32 * POSSIBILITY OF SUCH DAMAGE.
apatel336 0:1496281373a5 33 *---------------------------------------------------------------------------*/
apatel336 0:1496281373a5 34
apatel336 0:1496281373a5 35 #include "rt_TypeDef.h"
apatel336 0:1496281373a5 36 #include "RTX_Conf.h"
apatel336 0:1496281373a5 37 #include "rt_HAL_CM.h"
apatel336 0:1496281373a5 38
apatel336 0:1496281373a5 39
apatel336 0:1496281373a5 40 /*----------------------------------------------------------------------------
apatel336 0:1496281373a5 41 * Global Variables
apatel336 0:1496281373a5 42 *---------------------------------------------------------------------------*/
apatel336 0:1496281373a5 43
apatel336 0:1496281373a5 44 #ifdef DBG_MSG
apatel336 0:1496281373a5 45 BIT dbg_msg;
apatel336 0:1496281373a5 46 #endif
apatel336 0:1496281373a5 47
apatel336 0:1496281373a5 48 /*----------------------------------------------------------------------------
apatel336 0:1496281373a5 49 * Functions
apatel336 0:1496281373a5 50 *---------------------------------------------------------------------------*/
apatel336 0:1496281373a5 51
apatel336 0:1496281373a5 52
apatel336 0:1496281373a5 53 /*--------------------------- rt_init_stack ---------------------------------*/
apatel336 0:1496281373a5 54
apatel336 0:1496281373a5 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
apatel336 0:1496281373a5 56 /* Prepare TCB and saved context for a first time start of a task. */
apatel336 0:1496281373a5 57 U32 *stk,i,size;
apatel336 0:1496281373a5 58
apatel336 0:1496281373a5 59 /* Prepare a complete interrupt frame for first task start */
apatel336 0:1496281373a5 60 size = p_TCB->priv_stack >> 2;
apatel336 0:1496281373a5 61
apatel336 0:1496281373a5 62 /* Write to the top of stack. */
apatel336 0:1496281373a5 63 stk = &p_TCB->stack[size];
apatel336 0:1496281373a5 64
apatel336 0:1496281373a5 65 /* Auto correct to 8-byte ARM stack alignment. */
apatel336 0:1496281373a5 66 if ((U32)stk & 0x04) {
apatel336 0:1496281373a5 67 stk--;
apatel336 0:1496281373a5 68 }
apatel336 0:1496281373a5 69
apatel336 0:1496281373a5 70 stk -= 16;
apatel336 0:1496281373a5 71
apatel336 0:1496281373a5 72 /* Default xPSR and initial PC */
apatel336 0:1496281373a5 73 stk[15] = INITIAL_xPSR;
apatel336 0:1496281373a5 74 stk[14] = (U32)task_body;
apatel336 0:1496281373a5 75
apatel336 0:1496281373a5 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
apatel336 0:1496281373a5 77 for (i = 0; i < 14; i++) {
apatel336 0:1496281373a5 78 stk[i] = 0;
apatel336 0:1496281373a5 79 }
apatel336 0:1496281373a5 80
apatel336 0:1496281373a5 81 /* Assign a void pointer to R0. */
apatel336 0:1496281373a5 82 stk[8] = (U32)p_TCB->msg;
apatel336 0:1496281373a5 83
apatel336 0:1496281373a5 84 /* Initial Task stack pointer. */
apatel336 0:1496281373a5 85 p_TCB->tsk_stack = (U32)stk;
apatel336 0:1496281373a5 86
apatel336 0:1496281373a5 87 /* Task entry point. */
apatel336 0:1496281373a5 88 p_TCB->ptask = task_body;
apatel336 0:1496281373a5 89
apatel336 0:1496281373a5 90 /* Set a magic word for checking of stack overflow.
apatel336 0:1496281373a5 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
apatel336 0:1496281373a5 92 heap, therefore the last word of the stack is a moving target.
apatel336 0:1496281373a5 93 We want to do stack/heap collision detection instead.
apatel336 0:1496281373a5 94 */
apatel336 0:1496281373a5 95 if (p_TCB->task_id != 0x01)
apatel336 0:1496281373a5 96 p_TCB->stack[0] = MAGIC_WORD;
apatel336 0:1496281373a5 97 }
apatel336 0:1496281373a5 98
apatel336 0:1496281373a5 99
apatel336 0:1496281373a5 100 /*--------------------------- rt_ret_val ----------------------------------*/
apatel336 0:1496281373a5 101
apatel336 0:1496281373a5 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
apatel336 0:1496281373a5 103 /* Get pointer to task return value registers (R0..R3) in Stack */
apatel336 0:1496281373a5 104 #if (__TARGET_FPU_VFP)
apatel336 0:1496281373a5 105 if (p_TCB->stack_frame) {
apatel336 0:1496281373a5 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
apatel336 0:1496281373a5 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
apatel336 0:1496281373a5 108 } else {
apatel336 0:1496281373a5 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
apatel336 0:1496281373a5 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
apatel336 0:1496281373a5 111 }
apatel336 0:1496281373a5 112 #else
apatel336 0:1496281373a5 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
apatel336 0:1496281373a5 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
apatel336 0:1496281373a5 115 #endif
apatel336 0:1496281373a5 116 }
apatel336 0:1496281373a5 117
apatel336 0:1496281373a5 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
apatel336 0:1496281373a5 119 U32 *ret;
apatel336 0:1496281373a5 120
apatel336 0:1496281373a5 121 ret = rt_ret_regs(p_TCB);
apatel336 0:1496281373a5 122 ret[0] = v0;
apatel336 0:1496281373a5 123 }
apatel336 0:1496281373a5 124
apatel336 0:1496281373a5 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
apatel336 0:1496281373a5 126 U32 *ret;
apatel336 0:1496281373a5 127
apatel336 0:1496281373a5 128 ret = rt_ret_regs(p_TCB);
apatel336 0:1496281373a5 129 ret[0] = v0;
apatel336 0:1496281373a5 130 ret[1] = v1;
apatel336 0:1496281373a5 131 }
apatel336 0:1496281373a5 132
apatel336 0:1496281373a5 133
apatel336 0:1496281373a5 134 /*--------------------------- dbg_init --------------------------------------*/
apatel336 0:1496281373a5 135
apatel336 0:1496281373a5 136 #ifdef DBG_MSG
apatel336 0:1496281373a5 137 void dbg_init (void) {
apatel336 0:1496281373a5 138 if ((DEMCR & DEMCR_TRCENA) &&
apatel336 0:1496281373a5 139 (ITM_CONTROL & ITM_ITMENA) &&
apatel336 0:1496281373a5 140 (ITM_ENABLE & (1UL << 31))) {
apatel336 0:1496281373a5 141 dbg_msg = __TRUE;
apatel336 0:1496281373a5 142 }
apatel336 0:1496281373a5 143 }
apatel336 0:1496281373a5 144 #endif
apatel336 0:1496281373a5 145
apatel336 0:1496281373a5 146 /*--------------------------- dbg_task_notify -------------------------------*/
apatel336 0:1496281373a5 147
apatel336 0:1496281373a5 148 #ifdef DBG_MSG
apatel336 0:1496281373a5 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
apatel336 0:1496281373a5 150 while (ITM_PORT31_U32 == 0);
apatel336 0:1496281373a5 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
apatel336 0:1496281373a5 152 while (ITM_PORT31_U32 == 0);
apatel336 0:1496281373a5 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
apatel336 0:1496281373a5 154 }
apatel336 0:1496281373a5 155 #endif
apatel336 0:1496281373a5 156
apatel336 0:1496281373a5 157 /*--------------------------- dbg_task_switch -------------------------------*/
apatel336 0:1496281373a5 158
apatel336 0:1496281373a5 159 #ifdef DBG_MSG
apatel336 0:1496281373a5 160 void dbg_task_switch (U32 task_id) {
apatel336 0:1496281373a5 161 while (ITM_PORT31_U32 == 0);
apatel336 0:1496281373a5 162 ITM_PORT31_U8 = task_id;
apatel336 0:1496281373a5 163 }
apatel336 0:1496281373a5 164 #endif
apatel336 0:1496281373a5 165
apatel336 0:1496281373a5 166
apatel336 0:1496281373a5 167 /*----------------------------------------------------------------------------
apatel336 0:1496281373a5 168 * end of file
apatel336 0:1496281373a5 169 *---------------------------------------------------------------------------*/
apatel336 0:1496281373a5 170