Doug Anson / mbedEndpointNetwork_6LowPAN

6LowPAN mesh-based network support for mbedConnectorInterface. The Atmel-based mbed 6LowPAN shield is the assumed network hardware.

Dependencies:   libnsdl Nanostack_lib

mesh_nework/AtmelRFDriverLib/driverRFPhy.h@13:17948fd0fe32, 2015-11-03 (annotated)

Committer:
ansond
Date:
Tue Nov 03 17:07:01 2015 +0000
Revision:
13:17948fd0fe32
Parent:
0:2a5a48a8b4d4 
updated buffer sizes, updated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ansond 0:2a5a48a8b4d4 1 /*
ansond 0:2a5a48a8b4d4 2 * driverRFPhy.h
ansond 0:2a5a48a8b4d4 3 *
ansond 0:2a5a48a8b4d4 4 * Created on: 14 July 2014
ansond 0:2a5a48a8b4d4 5 * Author: mBed Team
ansond 0:2a5a48a8b4d4 6 */
ansond 0:2a5a48a8b4d4 7
ansond 0:2a5a48a8b4d4 8 #ifndef DRIVERRFPHY_H_
ansond 0:2a5a48a8b4d4 9 #define DRIVERRFPHY_H_
ansond 0:2a5a48a8b4d4 10
ansond 0:2a5a48a8b4d4 11 #include "arm_hal_phy.h"
ansond 0:2a5a48a8b4d4 12
ansond 0:2a5a48a8b4d4 13 #ifdef __cplusplus
ansond 0:2a5a48a8b4d4 14 extern "C" {
ansond 0:2a5a48a8b4d4 15 #endif
ansond 0:2a5a48a8b4d4 16
ansond 0:2a5a48a8b4d4 17 /*Run calibration every 5 minutes*/
ansond 0:2a5a48a8b4d4 18 #define RF_CALIBRATION_INTERVAL 6000000
ansond 0:2a5a48a8b4d4 19 /*Wait ACK for 2.5ms*/
ansond 0:2a5a48a8b4d4 20 #define RF_ACK_WAIT_TIMEOUT 50
ansond 0:2a5a48a8b4d4 21
ansond 0:2a5a48a8b4d4 22 #define RF_BUFFER_SIZE 128
ansond 0:2a5a48a8b4d4 23 #define RF_DEFAULT_CHANNEL 11
ansond 0:2a5a48a8b4d4 24
ansond 0:2a5a48a8b4d4 25 /*Radio RX and TX state definitions*/
ansond 0:2a5a48a8b4d4 26 #define RFF_ON 0x01
ansond 0:2a5a48a8b4d4 27 #define RFF_RX 0x02
ansond 0:2a5a48a8b4d4 28 #define RFF_TX 0x04
ansond 0:2a5a48a8b4d4 29 #define RFF_CCA 0x08
ansond 0:2a5a48a8b4d4 30
ansond 0:2a5a48a8b4d4 31 /*Atmel RF states*/
ansond 0:2a5a48a8b4d4 32 typedef enum
ansond 0:2a5a48a8b4d4 33 {
ansond 0:2a5a48a8b4d4 34 NOP = 0x00,
ansond 0:2a5a48a8b4d4 35 BUSY_RX = 0x01,
ansond 0:2a5a48a8b4d4 36 RF_TX_START = 0x02,
ansond 0:2a5a48a8b4d4 37 FORCE_TRX_OFF = 0x03,
ansond 0:2a5a48a8b4d4 38 FORCE_PLL_ON = 0x04,
ansond 0:2a5a48a8b4d4 39 RX_ON = 0x06,
ansond 0:2a5a48a8b4d4 40 TRX_OFF = 0x08,
ansond 0:2a5a48a8b4d4 41 PLL_ON = 0x09,
ansond 0:2a5a48a8b4d4 42 BUSY_RX_AACK = 0x11,
ansond 0:2a5a48a8b4d4 43 SLEEP = 0x0F,
ansond 0:2a5a48a8b4d4 44 RX_AACK_ON = 0x16,
ansond 0:2a5a48a8b4d4 45 TX_ARET_ON = 0x19
ansond 0:2a5a48a8b4d4 46 }rf_trx_states_t;
ansond 0:2a5a48a8b4d4 47
ansond 0:2a5a48a8b4d4 48 extern void rf_ack_wait_timer_start(uint16_t slots);
ansond 0:2a5a48a8b4d4 49 extern void rf_ack_wait_timer_stop(void);
ansond 0:2a5a48a8b4d4 50 extern void rf_handle_cca_ed_done(void);
ansond 0:2a5a48a8b4d4 51 extern void rf_handle_tx_end(void);
ansond 0:2a5a48a8b4d4 52 extern void rf_handle_rx_end(void);
ansond 0:2a5a48a8b4d4 53 extern void rf_on(void);
ansond 0:2a5a48a8b4d4 54 extern void rf_receive(void);
ansond 0:2a5a48a8b4d4 55 extern void rf_poll_trx_state_change(rf_trx_states_t trx_state);
ansond 0:2a5a48a8b4d4 56 extern void rf_init(void);
ansond 0:2a5a48a8b4d4 57 extern void rf_set_mac_address(const uint8_t *ptr);
ansond 0:2a5a48a8b4d4 58 extern int8_t rf_device_register(void);
ansond 0:2a5a48a8b4d4 59 extern int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
ansond 0:2a5a48a8b4d4 60 extern void rf_cca_abort(void);
ansond 0:2a5a48a8b4d4 61 extern void rf_read_mac_address(uint8_t *ptr);
ansond 0:2a5a48a8b4d4 62 extern int8_t rf_read_random(void);
ansond 0:2a5a48a8b4d4 63 extern void rf_calibration_cb(void);
ansond 0:2a5a48a8b4d4 64 extern uint8_t rf_init_phy_mode(void);
ansond 0:2a5a48a8b4d4 65 extern void rf_ack_wait_timer_interrupt(void);
ansond 0:2a5a48a8b4d4 66 extern void rf_calibration_timer_interrupt(void);
ansond 0:2a5a48a8b4d4 67 extern void rf_calibration_timer_start(uint32_t slots);
ansond 0:2a5a48a8b4d4 68 extern void rf_front_end_rx_lna(void);
ansond 0:2a5a48a8b4d4 69 extern void rf_front_end_sleep(void);
ansond 0:2a5a48a8b4d4 70 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
ansond 0:2a5a48a8b4d4 71 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
ansond 0:2a5a48a8b4d4 72 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
ansond 0:2a5a48a8b4d4 73
ansond 0:2a5a48a8b4d4 74 #ifdef __cplusplus
ansond 0:2a5a48a8b4d4 75 }
ansond 0:2a5a48a8b4d4 76 #endif
ansond 0:2a5a48a8b4d4 77 #endif /* DRIVERRFPHY_H_ */