Doug Anson / lwip-eth-ansond-patched

patched lwip-eth with https://github.com/mbedmicro/mbed/commit/8222bde1af2e328e4c58d0f438827f3091e5e0eb

Dependents:   EthernetInterface

Fork of lwip-eth by mbed official

arch/lpc_phy_dp83848.c@1:0c9d93e2f51c, 2012-06-22 (annotated)

Committer:
emilmont
Date:
Fri Jun 22 11:17:21 2012 +0000
Revision:
1:0c9d93e2f51c
Parent:
0:f4db29eb9e47
Child:
3:dd8b8f5b449a
Adapt NXP lwip Ethernet driver to CMSIS-RTOS and LPC1768

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 0:f4db29eb9e47 1 /**********************************************************************
mbed_official 0:f4db29eb9e47 2 * $Id$ lpc_phy_dp83848.c 2011-11-20
mbed_official 0:f4db29eb9e47 3 *//**
mbed_official 0:f4db29eb9e47 4 * @file lpc_phy_dp83848.c
mbed_official 0:f4db29eb9e47 5 * @brief DP83848C PHY status and control.
mbed_official 0:f4db29eb9e47 6 * @version 1.0
mbed_official 0:f4db29eb9e47 7 * @date 20 Nov. 2011
mbed_official 0:f4db29eb9e47 8 * @author NXP MCU SW Application Team
mbed_official 0:f4db29eb9e47 9 *
mbed_official 0:f4db29eb9e47 10 * Copyright(C) 2011, NXP Semiconductor
mbed_official 0:f4db29eb9e47 11 * All rights reserved.
mbed_official 0:f4db29eb9e47 12 *
mbed_official 0:f4db29eb9e47 13 ***********************************************************************
mbed_official 0:f4db29eb9e47 14 * Software that is described herein is for illustrative purposes only
mbed_official 0:f4db29eb9e47 15 * which provides customers with programming information regarding the
mbed_official 0:f4db29eb9e47 16 * products. This software is supplied "AS IS" without any warranties.
mbed_official 0:f4db29eb9e47 17 * NXP Semiconductors assumes no responsibility or liability for the
mbed_official 0:f4db29eb9e47 18 * use of the software, conveys no license or title under any patent,
mbed_official 0:f4db29eb9e47 19 * copyright, or mask work right to the product. NXP Semiconductors
mbed_official 0:f4db29eb9e47 20 * reserves the right to make changes in the software without
mbed_official 0:f4db29eb9e47 21 * notification. NXP Semiconductors also make no representation or
mbed_official 0:f4db29eb9e47 22 * warranty that such application will be suitable for the specified
mbed_official 0:f4db29eb9e47 23 * use without further testing or modification.
mbed_official 0:f4db29eb9e47 24 **********************************************************************/
mbed_official 0:f4db29eb9e47 25
mbed_official 0:f4db29eb9e47 26 #include "lwip/opt.h"
mbed_official 0:f4db29eb9e47 27 #include "lwip/err.h"
mbed_official 0:f4db29eb9e47 28 #include "lwip/tcpip.h"
mbed_official 0:f4db29eb9e47 29 #include "lwip/snmp.h"
mbed_official 0:f4db29eb9e47 30 #include "lpc_emac_config.h"
mbed_official 0:f4db29eb9e47 31 #include "lpc_phy.h"
mbed_official 0:f4db29eb9e47 32
mbed_official 0:f4db29eb9e47 33 /** @defgroup dp83848_phy PHY status and control for the DP83848.
mbed_official 0:f4db29eb9e47 34 * @ingroup lwip_phy
mbed_official 0:f4db29eb9e47 35 *
mbed_official 0:f4db29eb9e47 36 * Various functions for controlling and monitoring the status of the
mbed_official 0:f4db29eb9e47 37 * DP83848 PHY. In polled (standalone) systems, the PHY state must be
mbed_official 0:f4db29eb9e47 38 * monitored as part of the application. In a threaded (RTOS) system,
mbed_official 0:f4db29eb9e47 39 * the PHY state is monitored by the PHY handler thread. The MAC
mbed_official 0:f4db29eb9e47 40 * driver will not transmit unless the PHY link is active.
mbed_official 0:f4db29eb9e47 41 * @{
mbed_official 0:f4db29eb9e47 42 */
mbed_official 0:f4db29eb9e47 43
mbed_official 0:f4db29eb9e47 44 /** \brief DP83848 PHY register offsets */
mbed_official 0:f4db29eb9e47 45 #define DP8_BMCR_REG 0x0 /**< Basic Mode Control Register */
mbed_official 0:f4db29eb9e47 46 #define DP8_BMSR_REG 0x1 /**< Basic Mode Status Reg */
mbed_official 0:f4db29eb9e47 47 #define DP8_ANADV_REG 0x4 /**< Auto_Neg Advt Reg */
mbed_official 0:f4db29eb9e47 48 #define DP8_ANLPA_REG 0x5 /**< Auto_neg Link Partner Ability Reg */
mbed_official 0:f4db29eb9e47 49 #define DP8_ANEEXP_REG 0x6 /**< Auto-neg Expansion Reg */
mbed_official 0:f4db29eb9e47 50 #define DP8_PHY_STAT_REG 0x10 /**< PHY Status Register */
mbed_official 0:f4db29eb9e47 51 #define DP8_PHY_INT_CTL_REG 0x11 /**< PHY Interrupt Control Register */
mbed_official 0:f4db29eb9e47 52 #define DP8_PHY_RBR_REG 0x17 /**< PHY RMII and Bypass Register */
mbed_official 0:f4db29eb9e47 53 #define DP8_PHY_STS_REG 0x19 /**< PHY Status Register */
mbed_official 0:f4db29eb9e47 54
mbed_official 0:f4db29eb9e47 55 /** \brief DP83848 Control register definitions */
mbed_official 0:f4db29eb9e47 56 #define DP8_RESET (1 << 15) /**< 1= S/W Reset */
mbed_official 0:f4db29eb9e47 57 #define DP8_LOOPBACK (1 << 14) /**< 1=loopback Enabled */
mbed_official 0:f4db29eb9e47 58 #define DP8_SPEED_SELECT (1 << 13) /**< 1=Select 100MBps */
mbed_official 0:f4db29eb9e47 59 #define DP8_AUTONEG (1 << 12) /**< 1=Enable auto-negotiation */
mbed_official 0:f4db29eb9e47 60 #define DP8_POWER_DOWN (1 << 11) /**< 1=Power down PHY */
mbed_official 0:f4db29eb9e47 61 #define DP8_ISOLATE (1 << 10) /**< 1=Isolate PHY */
mbed_official 0:f4db29eb9e47 62 #define DP8_RESTART_AUTONEG (1 << 9) /**< 1=Restart auto-negoatiation */
mbed_official 0:f4db29eb9e47 63 #define DP8_DUPLEX_MODE (1 << 8) /**< 1=Full duplex mode */
mbed_official 0:f4db29eb9e47 64 #define DP8_COLLISION_TEST (1 << 7) /**< 1=Perform collsion test */
mbed_official 0:f4db29eb9e47 65
mbed_official 0:f4db29eb9e47 66 /** \brief DP83848 Status register definitions */
mbed_official 0:f4db29eb9e47 67 #define DP8_100BASE_T4 (1 << 15) /**< T4 mode */
mbed_official 0:f4db29eb9e47 68 #define DP8_100BASE_TX_FD (1 << 14) /**< 100MBps full duplex */
mbed_official 0:f4db29eb9e47 69 #define DP8_100BASE_TX_HD (1 << 13) /**< 100MBps half duplex */
mbed_official 0:f4db29eb9e47 70 #define DP8_10BASE_T_FD (1 << 12) /**< 100Bps full duplex */
mbed_official 0:f4db29eb9e47 71 #define DP8_10BASE_T_HD (1 << 11) /**< 10MBps half duplex */
mbed_official 0:f4db29eb9e47 72 #define DP8_MF_PREAMB_SUPPR (1 << 6) /**< Preamble suppress */
mbed_official 0:f4db29eb9e47 73 #define DP8_AUTONEG_COMP (1 << 5) /**< Auto-negotation complete */
mbed_official 0:f4db29eb9e47 74 #define DP8_RMT_FAULT (1 << 4) /**< Fault */
mbed_official 0:f4db29eb9e47 75 #define DP8_AUTONEG_ABILITY (1 << 3) /**< Auto-negotation supported */
mbed_official 0:f4db29eb9e47 76 #define DP8_LINK_STATUS (1 << 2) /**< 1=Link active */
mbed_official 0:f4db29eb9e47 77 #define DP8_JABBER_DETECT (1 << 1) /**< Jabber detect */
mbed_official 0:f4db29eb9e47 78 #define DP8_EXTEND_CAPAB (1 << 0) /**< Supports extended capabilities */
mbed_official 0:f4db29eb9e47 79
mbed_official 0:f4db29eb9e47 80 /** \brief DP83848 PHY RBR MII dode definitions */
mbed_official 0:f4db29eb9e47 81 #define DP8_RBR_RMII_MODE (1 << 5) /**< Use RMII mode */
mbed_official 0:f4db29eb9e47 82
mbed_official 0:f4db29eb9e47 83 /** \brief DP83848 PHY status definitions */
mbed_official 0:f4db29eb9e47 84 #define DP8_REMOTEFAULT (1 << 6) /**< Remote fault */
mbed_official 0:f4db29eb9e47 85 #define DP8_FULLDUPLEX (1 << 2) /**< 1=full duplex */
mbed_official 0:f4db29eb9e47 86 #define DP8_SPEED10MBPS (1 << 1) /**< 1=10MBps speed */
mbed_official 0:f4db29eb9e47 87 #define DP8_VALID_LINK (1 << 0) /**< 1=Link active */
mbed_official 0:f4db29eb9e47 88
mbed_official 0:f4db29eb9e47 89 /** \brief DP83848 PHY ID register definitions */
mbed_official 0:f4db29eb9e47 90 #define DP8_PHYID1_OUI 0x2000 /**< Expected PHY ID1 */
mbed_official 0:f4db29eb9e47 91 #define DP8_PHYID2_OUI 0x5c90 /**< Expected PHY ID2 */
mbed_official 0:f4db29eb9e47 92
emilmont 1:0c9d93e2f51c 93 /** \brief PHY status structure used to indicate current status of PHY.
emilmont 1:0c9d93e2f51c 94 */
mbed_official 0:f4db29eb9e47 95 typedef struct {
mbed_official 0:f4db29eb9e47 96 u32_t phy_speed_100mbs:1; /**< 10/100 MBS connection speed flag. */
mbed_official 0:f4db29eb9e47 97 u32_t phy_full_duplex:1; /**< Half/full duplex connection speed flag. */
mbed_official 0:f4db29eb9e47 98 u32_t phy_link_active:1; /**< Phy link active flag. */
mbed_official 0:f4db29eb9e47 99 } PHY_STATUS_TYPE;
mbed_official 0:f4db29eb9e47 100
mbed_official 0:f4db29eb9e47 101 /** \brief PHY update flags */
mbed_official 0:f4db29eb9e47 102 static PHY_STATUS_TYPE physts;
mbed_official 0:f4db29eb9e47 103
mbed_official 0:f4db29eb9e47 104 /** \brief Last PHY update flags, used for determing if something has changed */
mbed_official 0:f4db29eb9e47 105 static PHY_STATUS_TYPE olddphysts;
mbed_official 0:f4db29eb9e47 106
mbed_official 0:f4db29eb9e47 107 /** \brief PHY update counter for state machine */
mbed_official 0:f4db29eb9e47 108 static s32_t phyustate;
mbed_official 0:f4db29eb9e47 109
mbed_official 0:f4db29eb9e47 110 /** \brief Update PHY status from passed value
mbed_official 0:f4db29eb9e47 111 *
mbed_official 0:f4db29eb9e47 112 * This function updates the current PHY status based on the
mbed_official 0:f4db29eb9e47 113 * passed PHY status word. The PHY status indicate if the link
mbed_official 0:f4db29eb9e47 114 * is active, the connection speed, and duplex.
mbed_official 0:f4db29eb9e47 115 *
mbed_official 0:f4db29eb9e47 116 * \param[in] netif NETIF structure
mbed_official 0:f4db29eb9e47 117 * \param[in] linksts Status word from PHY
mbed_official 0:f4db29eb9e47 118 * \return 1 if the status has changed, otherwise 0
mbed_official 0:f4db29eb9e47 119 */
mbed_official 0:f4db29eb9e47 120 static s32_t lpc_update_phy_sts(struct netif *netif, u32_t linksts)
mbed_official 0:f4db29eb9e47 121 {
mbed_official 0:f4db29eb9e47 122 s32_t changed = 0;
mbed_official 0:f4db29eb9e47 123
mbed_official 0:f4db29eb9e47 124 /* Update link active status */
mbed_official 0:f4db29eb9e47 125 if (linksts & DP8_VALID_LINK)
mbed_official 0:f4db29eb9e47 126 physts.phy_link_active = 1;
mbed_official 0:f4db29eb9e47 127 else
mbed_official 0:f4db29eb9e47 128 physts.phy_link_active = 0;
mbed_official 0:f4db29eb9e47 129
mbed_official 0:f4db29eb9e47 130 /* Full or half duplex */
mbed_official 0:f4db29eb9e47 131 if (linksts & DP8_FULLDUPLEX)
emilmont 1:0c9d93e2f51c 132 physts.phy_full_duplex = 1;
mbed_official 0:f4db29eb9e47 133 else
mbed_official 0:f4db29eb9e47 134 physts.phy_full_duplex = 0;
emilmont 1:0c9d93e2f51c 135
emilmont 1:0c9d93e2f51c 136 /* Configure 100MBit/10MBit mode. */
mbed_official 0:f4db29eb9e47 137 if (linksts & DP8_SPEED10MBPS)
mbed_official 0:f4db29eb9e47 138 physts.phy_speed_100mbs = 0;
emilmont 1:0c9d93e2f51c 139 else
mbed_official 0:f4db29eb9e47 140 physts.phy_speed_100mbs = 1;
mbed_official 0:f4db29eb9e47 141
mbed_official 0:f4db29eb9e47 142 if (physts.phy_speed_100mbs != olddphysts.phy_speed_100mbs) {
mbed_official 0:f4db29eb9e47 143 changed = 1;
mbed_official 0:f4db29eb9e47 144 if (physts.phy_speed_100mbs) {
emilmont 1:0c9d93e2f51c 145 /* 100MBit mode. */
mbed_official 0:f4db29eb9e47 146 lpc_emac_set_speed(1);
mbed_official 0:f4db29eb9e47 147
mbed_official 0:f4db29eb9e47 148 NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, 100000000);
mbed_official 0:f4db29eb9e47 149 }
mbed_official 0:f4db29eb9e47 150 else {
emilmont 1:0c9d93e2f51c 151 /* 10MBit mode. */
mbed_official 0:f4db29eb9e47 152 lpc_emac_set_speed(0);
emilmont 1:0c9d93e2f51c 153
mbed_official 0:f4db29eb9e47 154 NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, 10000000);
mbed_official 0:f4db29eb9e47 155 }
mbed_official 0:f4db29eb9e47 156
mbed_official 0:f4db29eb9e47 157 olddphysts.phy_speed_100mbs = physts.phy_speed_100mbs;
mbed_official 0:f4db29eb9e47 158 }
mbed_official 0:f4db29eb9e47 159
mbed_official 0:f4db29eb9e47 160 if (physts.phy_full_duplex != olddphysts.phy_full_duplex) {
mbed_official 0:f4db29eb9e47 161 changed = 1;
mbed_official 0:f4db29eb9e47 162 if (physts.phy_full_duplex)
mbed_official 0:f4db29eb9e47 163 lpc_emac_set_duplex(1);
mbed_official 0:f4db29eb9e47 164 else
mbed_official 0:f4db29eb9e47 165 lpc_emac_set_duplex(0);
mbed_official 0:f4db29eb9e47 166
mbed_official 0:f4db29eb9e47 167 olddphysts.phy_full_duplex = physts.phy_full_duplex;
mbed_official 0:f4db29eb9e47 168 }
mbed_official 0:f4db29eb9e47 169
mbed_official 0:f4db29eb9e47 170 if (physts.phy_link_active != olddphysts.phy_link_active) {
mbed_official 0:f4db29eb9e47 171 changed = 1;
mbed_official 0:f4db29eb9e47 172 #if NO_SYS == 1
mbed_official 0:f4db29eb9e47 173 if (physts.phy_link_active)
mbed_official 0:f4db29eb9e47 174 netif_set_link_up(netif);
mbed_official 0:f4db29eb9e47 175 else
mbed_official 0:f4db29eb9e47 176 netif_set_link_down(netif);
mbed_official 0:f4db29eb9e47 177 #else
mbed_official 0:f4db29eb9e47 178 if (physts.phy_link_active)
mbed_official 0:f4db29eb9e47 179 tcpip_callback_with_block((tcpip_callback_fn) netif_set_link_up,
mbed_official 0:f4db29eb9e47 180 (void*) netif, 1);
mbed_official 0:f4db29eb9e47 181 else
mbed_official 0:f4db29eb9e47 182 tcpip_callback_with_block((tcpip_callback_fn) netif_set_link_down,
mbed_official 0:f4db29eb9e47 183 (void*) netif, 1);
mbed_official 0:f4db29eb9e47 184 #endif
mbed_official 0:f4db29eb9e47 185
mbed_official 0:f4db29eb9e47 186 olddphysts.phy_link_active = physts.phy_link_active;
mbed_official 0:f4db29eb9e47 187 }
mbed_official 0:f4db29eb9e47 188
mbed_official 0:f4db29eb9e47 189 return changed;
mbed_official 0:f4db29eb9e47 190 }
mbed_official 0:f4db29eb9e47 191
mbed_official 0:f4db29eb9e47 192 /** \brief Initialize the DP83848 PHY.
mbed_official 0:f4db29eb9e47 193 *
mbed_official 0:f4db29eb9e47 194 * This function initializes the DP83848 PHY. It will block until
mbed_official 0:f4db29eb9e47 195 * complete. This function is called as part of the EMAC driver
mbed_official 0:f4db29eb9e47 196 * initialization. Configuration of the PHY at startup is
mbed_official 0:f4db29eb9e47 197 * controlled by setting up configuration defines in lpc_phy.h.
mbed_official 0:f4db29eb9e47 198 *
mbed_official 0:f4db29eb9e47 199 * \param[in] netif NETIF structure
emilmont 1:0c9d93e2f51c 200 * \param[in] rmii If set, configures the PHY for RMII mode
mbed_official 0:f4db29eb9e47 201 * \return ERR_OK if the setup was successful, otherwise ERR_TIMEOUT
mbed_official 0:f4db29eb9e47 202 */
mbed_official 0:f4db29eb9e47 203 err_t lpc_phy_init(struct netif *netif, int rmii)
mbed_official 0:f4db29eb9e47 204 {
mbed_official 0:f4db29eb9e47 205 u32_t tmp;
mbed_official 0:f4db29eb9e47 206 s32_t i;
mbed_official 0:f4db29eb9e47 207
mbed_official 0:f4db29eb9e47 208 physts.phy_speed_100mbs = olddphysts.phy_speed_100mbs = 2;
mbed_official 0:f4db29eb9e47 209 physts.phy_full_duplex = olddphysts.phy_full_duplex = 2;
mbed_official 0:f4db29eb9e47 210 physts.phy_link_active = olddphysts.phy_link_active = 2;
mbed_official 0:f4db29eb9e47 211 phyustate = 0;
mbed_official 0:f4db29eb9e47 212
mbed_official 0:f4db29eb9e47 213 /* Only first read and write are checked for failure */
emilmont 1:0c9d93e2f51c 214 /* Put the DP83848C in reset mode and wait for completion */
mbed_official 0:f4db29eb9e47 215 if (lpc_mii_write(DP8_BMCR_REG, DP8_RESET) != 0)
emilmont 1:0c9d93e2f51c 216 return ERR_TIMEOUT;
mbed_official 0:f4db29eb9e47 217 i = 400;
mbed_official 0:f4db29eb9e47 218 while (i > 0) {
emilmont 1:0c9d93e2f51c 219 osDelay(1); /* 1 ms */
mbed_official 0:f4db29eb9e47 220 if (lpc_mii_read(DP8_BMCR_REG, &tmp) != 0)
mbed_official 0:f4db29eb9e47 221 return ERR_TIMEOUT;
emilmont 1:0c9d93e2f51c 222
emilmont 1:0c9d93e2f51c 223 if (!(tmp & (DP8_RESET | DP8_POWER_DOWN)))
mbed_official 0:f4db29eb9e47 224 i = -1;
mbed_official 0:f4db29eb9e47 225 else
emilmont 1:0c9d93e2f51c 226 i--;
mbed_official 0:f4db29eb9e47 227 }
mbed_official 0:f4db29eb9e47 228 /* Timeout? */
mbed_official 0:f4db29eb9e47 229 if (i == 0)
mbed_official 0:f4db29eb9e47 230 return ERR_TIMEOUT;
mbed_official 0:f4db29eb9e47 231
mbed_official 0:f4db29eb9e47 232 /* Setup link based on configuration options */
mbed_official 0:f4db29eb9e47 233 #if PHY_USE_AUTONEG==1
mbed_official 0:f4db29eb9e47 234 tmp = DP8_AUTONEG;
mbed_official 0:f4db29eb9e47 235 #else
mbed_official 0:f4db29eb9e47 236 tmp = 0;
mbed_official 0:f4db29eb9e47 237 #endif
mbed_official 0:f4db29eb9e47 238 #if PHY_USE_100MBS==1
mbed_official 0:f4db29eb9e47 239 tmp |= DP8_SPEED_SELECT;
mbed_official 0:f4db29eb9e47 240 #endif
mbed_official 0:f4db29eb9e47 241 #if PHY_USE_FULL_DUPLEX==1
mbed_official 0:f4db29eb9e47 242 tmp |= DP8_DUPLEX_MODE;
mbed_official 0:f4db29eb9e47 243 #endif
mbed_official 0:f4db29eb9e47 244
mbed_official 0:f4db29eb9e47 245 lpc_mii_write(DP8_BMCR_REG, tmp);
mbed_official 0:f4db29eb9e47 246
mbed_official 0:f4db29eb9e47 247 /* Enable RMII mode for PHY */
mbed_official 0:f4db29eb9e47 248 if (rmii)
mbed_official 0:f4db29eb9e47 249 lpc_mii_write(DP8_PHY_RBR_REG, DP8_RBR_RMII_MODE);
mbed_official 0:f4db29eb9e47 250
mbed_official 0:f4db29eb9e47 251 /* The link is not set active at this point, but will be detected
mbed_official 0:f4db29eb9e47 252 later */
mbed_official 0:f4db29eb9e47 253
mbed_official 0:f4db29eb9e47 254 return ERR_OK;
mbed_official 0:f4db29eb9e47 255 }
mbed_official 0:f4db29eb9e47 256
mbed_official 0:f4db29eb9e47 257 /* Phy status update state machine */
mbed_official 0:f4db29eb9e47 258 s32_t lpc_phy_sts_sm(struct netif *netif)
mbed_official 0:f4db29eb9e47 259 {
mbed_official 0:f4db29eb9e47 260 s32_t changed = 0;
mbed_official 0:f4db29eb9e47 261
mbed_official 0:f4db29eb9e47 262 switch (phyustate) {
mbed_official 0:f4db29eb9e47 263 default:
mbed_official 0:f4db29eb9e47 264 case 0:
mbed_official 0:f4db29eb9e47 265 /* Read BMSR to clear faults */
mbed_official 0:f4db29eb9e47 266 lpc_mii_read_noblock(DP8_PHY_STAT_REG);
mbed_official 0:f4db29eb9e47 267 phyustate = 1;
mbed_official 0:f4db29eb9e47 268 break;
mbed_official 0:f4db29eb9e47 269
mbed_official 0:f4db29eb9e47 270 case 1:
mbed_official 0:f4db29eb9e47 271 /* Wait for read status state */
mbed_official 0:f4db29eb9e47 272 if (!lpc_mii_is_busy()) {
mbed_official 0:f4db29eb9e47 273 /* Update PHY status */
mbed_official 0:f4db29eb9e47 274 changed = lpc_update_phy_sts(netif, lpc_mii_read_data());
mbed_official 0:f4db29eb9e47 275 phyustate = 0;
mbed_official 0:f4db29eb9e47 276 }
mbed_official 0:f4db29eb9e47 277 break;
mbed_official 0:f4db29eb9e47 278 }
mbed_official 0:f4db29eb9e47 279
mbed_official 0:f4db29eb9e47 280 return changed;
mbed_official 0:f4db29eb9e47 281 }
mbed_official 0:f4db29eb9e47 282
emilmont 1:0c9d93e2f51c 283 /**
emilmont 1:0c9d93e2f51c 284 * @}
mbed_official 0:f4db29eb9e47 285 */
mbed_official 0:f4db29eb9e47 286
mbed_official 0:f4db29eb9e47 287 /* --------------------------------- End Of File ------------------------------ */