nhan pham an / Hobbyking_Cheetah_Compact_DRV8323_StepDir

Fork and fix for mwork

Dependencies:   mbed-dev-f303 FastPWM3 millis

DRV8323/DRV.h@46:2d4b1dafcfe3, 2018-07-12 (annotated)

Committer:
benkatz
Date:
Thu Jul 12 02:50:34 2018 +0000
Revision:
46:2d4b1dafcfe3
Parent:
45:26801179208e 
calibration frees up memory when done;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
benkatz 44:8040fa2fcb0d 1 #ifndef DRV_H
benkatz 44:8040fa2fcb0d 2 #define DRV_H
benkatz 44:8040fa2fcb0d 3
benkatz 44:8040fa2fcb0d 4 /// Registers ///
benkatz 46:2d4b1dafcfe3 5 #define FSR1 0x0 /// Fault Status Register 1
benkatz 46:2d4b1dafcfe3 6 #define FSR2 0x1 /// Fault Status Register 2
benkatz 46:2d4b1dafcfe3 7 #define DCR 0x2 /// Drive Control Register
benkatz 46:2d4b1dafcfe3 8 #define HSR 0x3 /// Gate Drive HS Register
benkatz 46:2d4b1dafcfe3 9 #define LSR 0x4 /// Gate Drive LS Register
benkatz 46:2d4b1dafcfe3 10 #define OCPCR 0x5 /// OCP Control Register
benkatz 46:2d4b1dafcfe3 11 #define CSACR 0x6 /// CSA Control Register
benkatz 46:2d4b1dafcfe3 12
benkatz 46:2d4b1dafcfe3 13 /// Drive Control Fields ///
benkatz 46:2d4b1dafcfe3 14 #define DIS_CPUV_EN 0x0 /// Charge pump UVLO fault
benkatz 46:2d4b1dafcfe3 15 #define DIS_CPUV_DIS 0x1
benkatz 46:2d4b1dafcfe3 16 #define DIS_GDF_EN 0x0 /// Gate drive fauilt
benkatz 46:2d4b1dafcfe3 17 #define DIS_GDF_DIS 0x1
benkatz 46:2d4b1dafcfe3 18 #define OTW_REP_EN 0x1 /// Over temp warning reported on nFAULT/FAULT bit
benkatz 46:2d4b1dafcfe3 19 #define OTW_REP_DIS 0x0
benkatz 46:2d4b1dafcfe3 20 #define PWM_MODE_6X 0x0 /// PWM Input Modes
benkatz 46:2d4b1dafcfe3 21 #define PWM_MODE_3X 0x1
benkatz 46:2d4b1dafcfe3 22 #define PWM_MODE_1X 0x2
benkatz 46:2d4b1dafcfe3 23 #define PWM_MODE_IND 0x3
benkatz 46:2d4b1dafcfe3 24 #define PWM_1X_COM_SYNC 0x0 /// 1x PWM Mode synchronou rectification
benkatz 46:2d4b1dafcfe3 25 #define PWM_1X_COM_ASYNC 0x1
benkatz 46:2d4b1dafcfe3 26 #define PWM_1X_DIR_0 0x0 /// In 1x PWM mode this bit is ORed with the INHC (DIR) input
benkatz 46:2d4b1dafcfe3 27 #define PWM_1X_DIR_1 0x1
benkatz 46:2d4b1dafcfe3 28
benkatz 46:2d4b1dafcfe3 29 /// Gate Drive HS Fields ///
benkatz 46:2d4b1dafcfe3 30 #define LOCK_ON 0x6
benkatz 46:2d4b1dafcfe3 31 #define LOCK_OFF 0x3
benkatz 46:2d4b1dafcfe3 32 #define IDRIVEP_HS_10MA 0x0 /// Gate drive high side turn on current
benkatz 46:2d4b1dafcfe3 33 #define IDRIVEP_HS_30MA 0x1
benkatz 46:2d4b1dafcfe3 34 #define IDRIVEP_HS_60MA 0x2
benkatz 46:2d4b1dafcfe3 35 #define IDRIVEP_HS_80MA 0x3
benkatz 46:2d4b1dafcfe3 36 #define IDRIVEP_HS_120MA 0x4
benkatz 46:2d4b1dafcfe3 37 #define IDRIVEP_HS_140MA 0x5
benkatz 46:2d4b1dafcfe3 38 #define IDRIVEP_HS_170MA 0x6
benkatz 46:2d4b1dafcfe3 39 #define IDRIVEP_HS_190MA 0x7
benkatz 46:2d4b1dafcfe3 40 #define IDRIVEP_HS_260MA 0x8
benkatz 46:2d4b1dafcfe3 41 #define IDRIVEP_HS_330MA 0x9
benkatz 46:2d4b1dafcfe3 42 #define IDRIVEP_HS_370MA 0xA
benkatz 46:2d4b1dafcfe3 43 #define IDRIVEP_HS_440MA 0xB
benkatz 46:2d4b1dafcfe3 44 #define IDRIVEP_HS_570MA 0xC
benkatz 46:2d4b1dafcfe3 45 #define IDRIVEP_HS_680MA 0xD
benkatz 46:2d4b1dafcfe3 46 #define IDRIVEP_HS_820MA 0xE
benkatz 46:2d4b1dafcfe3 47 #define IDRIVEP_HS_1000MA 0xF
benkatz 46:2d4b1dafcfe3 48 #define IDRIVEN_HS_20MA 0x0 /// High side turn off current
benkatz 46:2d4b1dafcfe3 49 #define IDRIVEN_HS_60MA 0x1
benkatz 46:2d4b1dafcfe3 50 #define IDRIVEN_HS_120MA 0x2
benkatz 46:2d4b1dafcfe3 51 #define IDRIVEN_HS_160MA 0x3
benkatz 46:2d4b1dafcfe3 52 #define IDRIVEN_HS_240MA 0x4
benkatz 46:2d4b1dafcfe3 53 #define IDRIVEN_HS_280MA 0x5
benkatz 46:2d4b1dafcfe3 54 #define IDRIVEN_HS_340MA 0x6
benkatz 46:2d4b1dafcfe3 55 #define IDRIVEN_HS_380MA 0x7
benkatz 46:2d4b1dafcfe3 56 #define IDRIVEN_HS_520MA 0x8
benkatz 46:2d4b1dafcfe3 57 #define IDRIVEN_HS_660MA 0x9
benkatz 46:2d4b1dafcfe3 58 #define IDRIVEN_HS_740MA 0xA
benkatz 46:2d4b1dafcfe3 59 #define IDRIVEN_HS_880MA 0xB
benkatz 46:2d4b1dafcfe3 60 #define IDRIVEN_HS_1140MA 0xC
benkatz 46:2d4b1dafcfe3 61 #define IDRIVEN_HS_1360MA 0xD
benkatz 46:2d4b1dafcfe3 62 #define IDRIVEN_HS_1640MA 0xE
benkatz 46:2d4b1dafcfe3 63 #define IDRIVEN_HS_2000MA 0xF
benkatz 44:8040fa2fcb0d 64
benkatz 46:2d4b1dafcfe3 65 /// Gate Drive LS Fields ///
benkatz 46:2d4b1dafcfe3 66 #define TDRIVE_500NS 0x0 /// Peak gate-current drive time
benkatz 46:2d4b1dafcfe3 67 #define TDRIVE_1000NS 0x1
benkatz 46:2d4b1dafcfe3 68 #define TDRIVE_2000NS 0x2
benkatz 46:2d4b1dafcfe3 69 #define TDRIVE_4000NS 0x3
benkatz 46:2d4b1dafcfe3 70 #define IDRIVEP_LS_10MA 0x0 /// Gate drive high side turn on current
benkatz 46:2d4b1dafcfe3 71 #define IDRIVEP_LS_30MA 0x1
benkatz 46:2d4b1dafcfe3 72 #define IDRIVEP_LS_60MA 0x2
benkatz 46:2d4b1dafcfe3 73 #define IDRIVEP_LS_80MA 0x3
benkatz 46:2d4b1dafcfe3 74 #define IDRIVEP_LS_120MA 0x4
benkatz 46:2d4b1dafcfe3 75 #define IDRIVEP_LS_140MA 0x5
benkatz 46:2d4b1dafcfe3 76 #define IDRIVEP_LS_170MA 0x6
benkatz 46:2d4b1dafcfe3 77 #define IDRIVEP_LS_190MA 0x7
benkatz 46:2d4b1dafcfe3 78 #define IDRIVEP_LS_260MA 0x8
benkatz 46:2d4b1dafcfe3 79 #define IDRIVEP_LS_330MA 0x9
benkatz 46:2d4b1dafcfe3 80 #define IDRIVEP_LS_370MA 0xA
benkatz 46:2d4b1dafcfe3 81 #define IDRIVEP_LS_440MA 0xB
benkatz 46:2d4b1dafcfe3 82 #define IDRIVEP_LS_570MA 0xC
benkatz 46:2d4b1dafcfe3 83 #define IDRIVEP_LS_680MA 0xD
benkatz 46:2d4b1dafcfe3 84 #define IDRIVEP_LS_820MA 0xE
benkatz 46:2d4b1dafcfe3 85 #define IDRIVEP_LS_1000MA 0xF
benkatz 46:2d4b1dafcfe3 86 #define IDRIVEN_LS_20MA 0x0 /// High side turn off current
benkatz 46:2d4b1dafcfe3 87 #define IDRIVEN_LS_60MA 0x1
benkatz 46:2d4b1dafcfe3 88 #define IDRIVEN_LS_120MA 0x2
benkatz 46:2d4b1dafcfe3 89 #define IDRIVEN_LS_160MA 0x3
benkatz 46:2d4b1dafcfe3 90 #define IDRIVEN_LS_240MA 0x4
benkatz 46:2d4b1dafcfe3 91 #define IDRIVEN_LS_280MA 0x5
benkatz 46:2d4b1dafcfe3 92 #define IDRIVEN_LS_340MA 0x6
benkatz 46:2d4b1dafcfe3 93 #define IDRIVEN_LS_380MA 0x7
benkatz 46:2d4b1dafcfe3 94 #define IDRIVEN_LS_520MA 0x8
benkatz 46:2d4b1dafcfe3 95 #define IDRIVEN_LS_660MA 0x9
benkatz 46:2d4b1dafcfe3 96 #define IDRIVEN_LS_740MA 0xA
benkatz 46:2d4b1dafcfe3 97 #define IDRIVEN_LS_880MA 0xB
benkatz 46:2d4b1dafcfe3 98 #define IDRIVEN_LS_1140MA 0xC
benkatz 46:2d4b1dafcfe3 99 #define IDRIVEN_LS_1360MA 0xD
benkatz 46:2d4b1dafcfe3 100 #define IDRIVEN_LS_1640MA 0xE
benkatz 46:2d4b1dafcfe3 101 #define IDRIVEN_LS_2000MA 0xF
benkatz 46:2d4b1dafcfe3 102
benkatz 46:2d4b1dafcfe3 103 /// OCP Control Fields ///
benkatz 46:2d4b1dafcfe3 104 #define TRETRY_4MS 0x0 /// VDS OCP and SEN OCP retry time
benkatz 46:2d4b1dafcfe3 105 #define TRETRY_50US 0x1
benkatz 46:2d4b1dafcfe3 106 #define DEADTIME_50NS 0x0 /// Deadtime
benkatz 46:2d4b1dafcfe3 107 #define DEADTIME_100NS 0x1
benkatz 46:2d4b1dafcfe3 108 #define DEADTIME_200NS 0x2
benkatz 46:2d4b1dafcfe3 109 #define DEADTIME_400NS 0x3
benkatz 46:2d4b1dafcfe3 110 #define OCP_LATCH 0x0 /// OCP Mode
benkatz 46:2d4b1dafcfe3 111 #define OCP_RETRY 0x1
benkatz 46:2d4b1dafcfe3 112 #define OCP_REPORT 0x2
benkatz 46:2d4b1dafcfe3 113 #define OCP_NONE 0x3
benkatz 46:2d4b1dafcfe3 114 #define OCP_DEG_2US 0x0 /// OCP Deglitch Time
benkatz 46:2d4b1dafcfe3 115 #define OCP_DEG_4US 0x1
benkatz 46:2d4b1dafcfe3 116 #define OCP_DEG_6US 0x2
benkatz 46:2d4b1dafcfe3 117 #define OCP_DEG_8US 0x3
benkatz 46:2d4b1dafcfe3 118 #define VDS_LVL_0_06 0x0
benkatz 46:2d4b1dafcfe3 119 #define VDS_LVL_0_13 0x1
benkatz 46:2d4b1dafcfe3 120 #define VDS_LVL_0_2 0x2
benkatz 46:2d4b1dafcfe3 121 #define VDS_LVL_0_26 0x3
benkatz 46:2d4b1dafcfe3 122 #define VDS_LVL_0_31 0x4
benkatz 46:2d4b1dafcfe3 123 #define VDS_LVL_0_45 0x5
benkatz 46:2d4b1dafcfe3 124 #define VDS_LVL_0_53 0x6
benkatz 46:2d4b1dafcfe3 125 #define VDS_LVL_0_6 0x7
benkatz 46:2d4b1dafcfe3 126 #define VDS_LVL_0_68 0x8
benkatz 46:2d4b1dafcfe3 127 #define VDS_LVL_0_75 0x9
benkatz 46:2d4b1dafcfe3 128 #define VDS_LVL_0_94 0xA
benkatz 46:2d4b1dafcfe3 129 #define VDS_LVL_1_13 0xB
benkatz 46:2d4b1dafcfe3 130 #define VDS_LVL_1_3 0xC
benkatz 46:2d4b1dafcfe3 131 #define VDS_LVL_1_5 0xD
benkatz 46:2d4b1dafcfe3 132 #define VDS_LVL_1_7 0xE
benkatz 46:2d4b1dafcfe3 133 #define VDS_LVL_1_88 0xF
benkatz 46:2d4b1dafcfe3 134
benkatz 46:2d4b1dafcfe3 135 /// CSA Control Fields ///
benkatz 46:2d4b1dafcfe3 136 #define CSA_FET_SP 0x0 /// Current sense amplifier positive input
benkatz 46:2d4b1dafcfe3 137 #define CSA_FET_SH 0x1
benkatz 46:2d4b1dafcfe3 138 #define VREF_DIV_1 0x0 /// Amplifier reference voltage is VREV/1
benkatz 46:2d4b1dafcfe3 139 #define VREF_DIV_2 0x1 /// Amplifier reference voltage is VREV/2
benkatz 46:2d4b1dafcfe3 140 #define CSA_GAIN_5 0x0 /// Current sensor gain
benkatz 46:2d4b1dafcfe3 141 #define CSA_GAIN_10 0x1
benkatz 46:2d4b1dafcfe3 142 #define CSA_GAIN_20 0x2
benkatz 46:2d4b1dafcfe3 143 #define CSA_GAIN_40 0x3
benkatz 46:2d4b1dafcfe3 144 #define DIS_SEN_EN 0x0 /// Overcurrent Fault
benkatz 46:2d4b1dafcfe3 145 #define DIS_SEN_DIS 0x1
benkatz 46:2d4b1dafcfe3 146 #define SEN_LVL_0_25 0x0 /// Sense OCP voltage level
benkatz 46:2d4b1dafcfe3 147 #define SEN_LVL_0_5 0x1
benkatz 46:2d4b1dafcfe3 148 #define SEN_LVL_0_75 0x2
benkatz 46:2d4b1dafcfe3 149 #define SEN_LVL_1_0 0x3
benkatz 44:8040fa2fcb0d 150
benkatz 44:8040fa2fcb0d 151 class DRV832x {
benkatz 44:8040fa2fcb0d 152 public:
benkatz 44:8040fa2fcb0d 153 DRV832x(SPI *spi, DigitalOut *cs);
benkatz 44:8040fa2fcb0d 154 int read_FSR1();
benkatz 44:8040fa2fcb0d 155 int read_FSR2();
benkatz 44:8040fa2fcb0d 156 int read_register(int reg);
benkatz 44:8040fa2fcb0d 157 void write_register(int reg, int val);
benkatz 44:8040fa2fcb0d 158 void write_DCR(int DIS_CPUV, int DIS_GDF, int OTW_REP, int PWM_MODE, int PWM_COM, int PWM_DIR, int COAST, int BRAKE, int CLR_FLT);
benkatz 44:8040fa2fcb0d 159 void write_HSR(int LOCK, int IDRIVEP_HS, int IDRIVEN_HS);
benkatz 44:8040fa2fcb0d 160 void write_LSR(int CBC, int TDRIVE, int IDRIVEP_LS, int IDRIVEN_LS);
benkatz 44:8040fa2fcb0d 161 void write_OCPCR(int TRETRY, int DEAD_TIME, int OCP_MODE, int OCP_DEG, int VDS_LVL);
benkatz 44:8040fa2fcb0d 162 void write_CSACR(int CSA_FET, int VREF_DIV, int LS_REF, int CSA_GAIN, int DIS_SEN, int CSA_CAL_A, int CSA_CAL_B, int CSA_CAL_C, int SEN_LVL);
benkatz 44:8040fa2fcb0d 163 void enable_gd(void);
benkatz 44:8040fa2fcb0d 164 void disable_gd(void);
benkatz 45:26801179208e 165 void calibrate(void);
benkatz 44:8040fa2fcb0d 166 void print_faults();
benkatz 44:8040fa2fcb0d 167
benkatz 44:8040fa2fcb0d 168 private:
benkatz 44:8040fa2fcb0d 169 SPI *_spi;
benkatz 44:8040fa2fcb0d 170 DigitalOut *_cs;
benkatz 44:8040fa2fcb0d 171 uint16_t spi_write(uint16_t val);
benkatz 44:8040fa2fcb0d 172 };
benkatz 44:8040fa2fcb0d 173
benkatz 44:8040fa2fcb0d 174 #endif