Andriy Ribalko / TextLCD

add UTF-8 recode support, Cyrilic rus/ukr tables

Dependents:   Current_load1

Fork of TextLCD by Wim Huiskamp

TextLCD Library UTF-8 recode support, Cyrilic rus/ukr tables

TextLCD.cpp@38:cbe275b0b647, 2015-04-18 (annotated)

Committer:
wim
Date:
Sat Apr 18 11:33:02 2015 +0000
Revision:
38:cbe275b0b647
Parent:
37:ce348c002929
Child:
39:e9c2319de9c5
Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight control

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim 38:cbe275b0b647 21 * 2015, v18: WH, Performance improvement I2C portexpander
wim 38:cbe275b0b647 22 * 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
simon 1:ac48b187213c 23 *
simon 1:ac48b187213c 24 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 25 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 26 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 28 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 29 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 30 *
simon 1:ac48b187213c 31 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 32 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 33 *
simon 1:ac48b187213c 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 37 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 40 * THE SOFTWARE.
simon 1:ac48b187213c 41 */
wim 34:e5a0dcb43ecc 42 #include "mbed.h"
simon 1:ac48b187213c 43 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 44 #include "TextLCD_UDC.inc"
wim 34:e5a0dcb43ecc 45
wim 21:9eb628d9e164 46 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 47 *
wim 21:9eb628d9e164 48 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 49 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 50 */
wim 21:9eb628d9e164 51 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 52
wim 30:033048611c01 53 // Extract LCDType data
wim 30:033048611c01 54
wim 30:033048611c01 55 // Columns encoded in b7..b0
wim 30:033048611c01 56 _nr_cols = (_type & 0xFF);
wim 30:033048611c01 57
wim 30:033048611c01 58 // Rows encoded in b15..b8
wim 30:033048611c01 59 _nr_rows = ((_type >> 8) & 0xFF);
wim 30:033048611c01 60
wim 30:033048611c01 61 // Addressing mode encoded in b19..b16
wim 30:033048611c01 62 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 63
wim 37:ce348c002929 64 // Font table, encoded in LCDCtrl
wim 37:ce348c002929 65 _font = _type & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 66 }
wim 14:0c32b66b14b8 67
wim 21:9eb628d9e164 68 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 69 * Clear display
wim 36:9f5f86dfd44a 70 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 71 * @return none
wim 21:9eb628d9e164 72 */
wim 36:9f5f86dfd44a 73 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 38:cbe275b0b647 74
wim 38:cbe275b0b647 75 wait_ms(100); // Wait 100ms to ensure powered up
wim 15:b70ebfffb258 76
wim 15:b70ebfffb258 77 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 78 if(_type==LCD40x4) {
wim 30:033048611c01 79 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 80 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 81 }
wim 15:b70ebfffb258 82
wim 15:b70ebfffb258 83 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 84 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 85 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 86
wim 32:59c4b8f648d4 87 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 88 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 89 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 90 cls();
wim 15:b70ebfffb258 91 }
wim 15:b70ebfffb258 92
wim 21:9eb628d9e164 93 /** Init the LCD controller
wim 36:9f5f86dfd44a 94 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 95 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 96 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 97 *
wim 36:9f5f86dfd44a 98 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes.
wim 36:9f5f86dfd44a 99 * @return none
wim 30:033048611c01 100 *
wim 30:033048611c01 101 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 102 */
wim 36:9f5f86dfd44a 103 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 104 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 105 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 106
wim 26:bd897a001012 107 this->_setRS(false); // command mode
simon 1:ac48b187213c 108
wim 37:ce348c002929 109 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 110 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 111 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 112 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 113 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 114 //
wim 38:cbe275b0b647 115 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 116 //-------------------------------------------------------------------------------------------------
wim 38:cbe275b0b647 117 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 38:cbe275b0b647 118 // remains in 8 bit mode | remains in 4 bit mode | remains in 4 bit mode
wim 37:ce348c002929 119 wait_ms(15); //
wim 37:ce348c002929 120
wim 38:cbe275b0b647 121 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set dummy LSN, | set 8bit mode (MSN),
wim 38:cbe275b0b647 122 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 123 wait_ms(15); //
wim 33:900a94bc7585 124
wim 38:cbe275b0b647 125 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN) and dummy LSN, | set dummy LSN,
wim 38:cbe275b0b647 126 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 127 wait_ms(15); //
wim 37:ce348c002929 128
wim 37:ce348c002929 129 // Controller is now in 8 bit mode
wim 37:ce348c002929 130
wim 37:ce348c002929 131 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 132 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 133
wim 37:ce348c002929 134 // Controller is now in 4-bit mode
wim 37:ce348c002929 135 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 136 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 38:cbe275b0b647 137 }
wim 38:cbe275b0b647 138 else {
wim 38:cbe275b0b647 139 // Reset in 8 bit mode, final Function set will follow
wim 38:cbe275b0b647 140 _writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
wim 37:ce348c002929 141 }
wim 25:6162b31128c9 142
wim 29:a3663151aa65 143 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 144 switch (_ctrl) {
wim 32:59c4b8f648d4 145
wim 36:9f5f86dfd44a 146 case KS0073:
wim 36:9f5f86dfd44a 147 // Initialise Display configuration
wim 36:9f5f86dfd44a 148 switch (_type) {
wim 36:9f5f86dfd44a 149 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 150 case LCD12x1:
wim 36:9f5f86dfd44a 151 case LCD16x1:
wim 36:9f5f86dfd44a 152 case LCD20x1:
wim 36:9f5f86dfd44a 153 case LCD24x1:
wim 36:9f5f86dfd44a 154 // case LCD32x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 155 // case LCD40x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 156 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 157 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 158 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 159 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 160 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 161 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 162
wim 36:9f5f86dfd44a 163 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 164 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 165 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 166 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 167 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 168 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 169
wim 36:9f5f86dfd44a 170 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 171 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 172 break;
wim 36:9f5f86dfd44a 173
wim 36:9f5f86dfd44a 174 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 175 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 176 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 177 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 178 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 179 case LCD20x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 180 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 181 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 182 // N=0 (dont care for 4 line mode)
wim 36:9f5f86dfd44a 183 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 184 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 185 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 186
wim 36:9f5f86dfd44a 187 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 188 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 189 // N=0 (1-line mode), N=1 (2-line mode)
wim 36:9f5f86dfd44a 190 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 191 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 192 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 193
wim 36:9f5f86dfd44a 194 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 195 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 196 break;
wim 36:9f5f86dfd44a 197
wim 36:9f5f86dfd44a 198
wim 36:9f5f86dfd44a 199 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 200 // case LCD24x3D: // Special mode for KS0078
wim 36:9f5f86dfd44a 201 // case LCD24x3D1: // Special mode for KS0078
wim 36:9f5f86dfd44a 202 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 203 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 204 break;
wim 36:9f5f86dfd44a 205
wim 36:9f5f86dfd44a 206 default:
wim 36:9f5f86dfd44a 207 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 208 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 209 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 210 // N=1 (2-line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 211 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 212 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 213 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 214
wim 36:9f5f86dfd44a 215 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 216 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 217 // N=1 (2 line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 218 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 219 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 220 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 221
wim 36:9f5f86dfd44a 222 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 223 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 224 break;
wim 36:9f5f86dfd44a 225 } // switch type
wim 36:9f5f86dfd44a 226
wim 36:9f5f86dfd44a 227 // init special features
wim 36:9f5f86dfd44a 228 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 229 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 230 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 231 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 232 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 233 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 234
wim 36:9f5f86dfd44a 235 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 236 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 237 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 238 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 239
wim 36:9f5f86dfd44a 240 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 241 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 242
wim 36:9f5f86dfd44a 243 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 244 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 245
wim 36:9f5f86dfd44a 246 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 247 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 248 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 249 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 250 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 251 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 252 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 253
wim 36:9f5f86dfd44a 254
wim 29:a3663151aa65 255 case KS0078:
wim 29:a3663151aa65 256 // Initialise Display configuration
wim 29:a3663151aa65 257 switch (_type) {
wim 29:a3663151aa65 258 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 259 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 260 // case LCD12x1:
wim 29:a3663151aa65 261 case LCD16x1:
wim 30:033048611c01 262 // case LCD20x1:
wim 29:a3663151aa65 263 case LCD24x1:
wim 32:59c4b8f648d4 264 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 265 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 266 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 267 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 268 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 269 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 270
wim 33:900a94bc7585 271 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 272 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 273 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 274 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 275 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 276 // 0
wim 30:033048611c01 277
wim 32:59c4b8f648d4 278 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 279 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 280 break;
wim 29:a3663151aa65 281
wim 36:9f5f86dfd44a 282 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 283 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 284 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 285 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 286 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 287 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 288 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 289 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 290 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 291 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 292 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 293 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 294 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 295 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 296 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 297
wim 33:900a94bc7585 298 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 299 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 300 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 301 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 302 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 303 // 0
wim 29:a3663151aa65 304
wim 32:59c4b8f648d4 305 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 306 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 307 break;
wim 33:900a94bc7585 308
wim 33:900a94bc7585 309 case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 310 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 311 break;
wim 30:033048611c01 312
wim 29:a3663151aa65 313 default:
wim 30:033048611c01 314 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 315 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 316 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 317 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 318 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 319 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 320 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 321
wim 33:900a94bc7585 322 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 323 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 324 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 325 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 326 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 327 // 0
wim 30:033048611c01 328
wim 32:59c4b8f648d4 329 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 330 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 331 break;
wim 29:a3663151aa65 332 } // switch type
wim 29:a3663151aa65 333
wim 32:59c4b8f648d4 334 // init special features
wim 32:59c4b8f648d4 335 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 336 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 337 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 338 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 339 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 340 // 0
wim 32:59c4b8f648d4 341
wim 32:59c4b8f648d4 342 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 343 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 344 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 345 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 346
wim 32:59c4b8f648d4 347 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 348 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 349
wim 32:59c4b8f648d4 350 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 351 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 352
wim 32:59c4b8f648d4 353 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 354 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 355 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 356 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 357 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 358 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 359 break; // case KS0078 Controller
wim 29:a3663151aa65 360
wim 26:bd897a001012 361 case ST7032_3V3:
wim 26:bd897a001012 362 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 26:bd897a001012 363 case ST7032_5V:
wim 32:59c4b8f648d4 364 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 29:a3663151aa65 365
wim 29:a3663151aa65 366 // Initialise Display configuration
wim 29:a3663151aa65 367 switch (_type) {
wim 29:a3663151aa65 368 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 369 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 370 // case LCD12x1:
wim 29:a3663151aa65 371 case LCD16x1:
wim 30:033048611c01 372 // case LCD20x1:
wim 32:59c4b8f648d4 373 case LCD24x1:
wim 32:59c4b8f648d4 374 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 375 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 376 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 377 break;
wim 28:30fa94f7341c 378
wim 32:59c4b8f648d4 379 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 380 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 381 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 382 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 383 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 384 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 385 break;
wim 29:a3663151aa65 386
wim 32:59c4b8f648d4 387 default:
wim 32:59c4b8f648d4 388 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 389 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 390 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 391 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 392 break;
wim 32:59c4b8f648d4 393 } // switch type
wim 32:59c4b8f648d4 394
wim 32:59c4b8f648d4 395 // init special features
wim 33:900a94bc7585 396 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 397
wim 33:900a94bc7585 398 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 32:59c4b8f648d4 399
wim 32:59c4b8f648d4 400 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 401 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 402
wim 32:59c4b8f648d4 403
wim 32:59c4b8f648d4 404 if (_ctrl == ST7032_3V3) {
wim 36:9f5f86dfd44a 405 // _icon_power = 0x04; // Icon display off, Booster circuit is turned on (IS=1)
wim 36:9f5f86dfd44a 406 _icon_power = 0x0C; // Icon display on, Booster circuit is turned on (IS=1)
wim 32:59c4b8f648d4 407 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 408 }
wim 32:59c4b8f648d4 409 else {
wim 36:9f5f86dfd44a 410 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 411 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 412 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 413 }
wim 32:59c4b8f648d4 414 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 415 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 416
wim 32:59c4b8f648d4 417 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 418 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 419
wim 32:59c4b8f648d4 420 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 421
wim 32:59c4b8f648d4 422 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 423 // case ST7032_5V Controller
wim 32:59c4b8f648d4 424
wim 32:59c4b8f648d4 425 case ST7036_3V3:
wim 32:59c4b8f648d4 426 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 427 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 428 case ST7036_5V:
wim 32:59c4b8f648d4 429 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 430 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 431
wim 32:59c4b8f648d4 432 // Initialise Display configuration
wim 32:59c4b8f648d4 433 switch (_type) {
wim 32:59c4b8f648d4 434 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 435 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 436 // case LCD12x1:
wim 32:59c4b8f648d4 437 case LCD16x1:
wim 32:59c4b8f648d4 438 case LCD24x1:
wim 32:59c4b8f648d4 439 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 440 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 441 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 442
wim 32:59c4b8f648d4 443 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 444 break;
wim 32:59c4b8f648d4 445
wim 32:59c4b8f648d4 446 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 447 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 448 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 449 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 450 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 451
wim 32:59c4b8f648d4 452 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 453 break;
wim 32:59c4b8f648d4 454
wim 32:59c4b8f648d4 455 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 456 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 457 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 458 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 459 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 460 break;
wim 28:30fa94f7341c 461
wim 29:a3663151aa65 462 default:
wim 32:59c4b8f648d4 463 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 464 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 465 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 466 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 467
wim 32:59c4b8f648d4 468 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 469 break;
wim 32:59c4b8f648d4 470 } // switch type
wim 32:59c4b8f648d4 471
wim 29:a3663151aa65 472
wim 32:59c4b8f648d4 473 // init special features
wim 33:900a94bc7585 474 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 475 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 476
wim 32:59c4b8f648d4 477 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 478 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 479
wim 32:59c4b8f648d4 480 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 481 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 482 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 483 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 484 }
wim 32:59c4b8f648d4 485 else {
wim 36:9f5f86dfd44a 486 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 487 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 488 }
wim 29:a3663151aa65 489
wim 32:59c4b8f648d4 490 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 491 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 492
wim 32:59c4b8f648d4 493 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 494 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 495
wim 32:59c4b8f648d4 496 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 497
wim 32:59c4b8f648d4 498 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 499 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 500
wim 36:9f5f86dfd44a 501 case ST7070:
wim 36:9f5f86dfd44a 502 // Initialise Display configuration
wim 36:9f5f86dfd44a 503 switch (_type) {
wim 36:9f5f86dfd44a 504 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 505 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 506 // case LCD12x1:
wim 36:9f5f86dfd44a 507 case LCD16x1:
wim 36:9f5f86dfd44a 508 case LCD24x1:
wim 36:9f5f86dfd44a 509 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 510 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 511 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 512 break;
wim 36:9f5f86dfd44a 513
wim 36:9f5f86dfd44a 514 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 515 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 516 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 517 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 518 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 519 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 520 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 521 break;
wim 36:9f5f86dfd44a 522
wim 36:9f5f86dfd44a 523 default:
wim 36:9f5f86dfd44a 524 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 525 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 526 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 527 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 528 break;
wim 36:9f5f86dfd44a 529 } // switch type
wim 36:9f5f86dfd44a 530
wim 36:9f5f86dfd44a 531 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 532
wim 36:9f5f86dfd44a 533 // init special features
wim 36:9f5f86dfd44a 534 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 535
wim 36:9f5f86dfd44a 536 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 537
wim 36:9f5f86dfd44a 538 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 539 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 540 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 541
wim 36:9f5f86dfd44a 542 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 543
wim 36:9f5f86dfd44a 544 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 545
wim 32:59c4b8f648d4 546 case SSD1803_3V3:
wim 32:59c4b8f648d4 547 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 548 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 549 // case SSD1803_5V:
wim 32:59c4b8f648d4 550 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 551
wim 29:a3663151aa65 552 // Initialise Display configuration
wim 29:a3663151aa65 553 switch (_type) {
wim 29:a3663151aa65 554 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 555 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 556 // case LCD12x1:
wim 29:a3663151aa65 557 case LCD16x1:
wim 29:a3663151aa65 558 case LCD24x1:
wim 32:59c4b8f648d4 559 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 560 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 561 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 562 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 563 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 564 // DH=0 Double Height disable
wim 32:59c4b8f648d4 565 // IS=0
wim 32:59c4b8f648d4 566
wim 33:900a94bc7585 567 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 568 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 569 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 570 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 571 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 572 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 573 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 574
wim 32:59c4b8f648d4 575 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 576 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 577 break;
wim 32:59c4b8f648d4 578
wim 33:900a94bc7585 579 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 580 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 581 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 582 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 583 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 584 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 585 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 586 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 587 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 588 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 589 // DH=0 Double Height disable
wim 32:59c4b8f648d4 590 // IS=0
wim 32:59c4b8f648d4 591
wim 33:900a94bc7585 592 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 593 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 594 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 595 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 596 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 597 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 598 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 599
wim 32:59c4b8f648d4 600 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 601 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 602 break;
wim 30:033048611c01 603
wim 32:59c4b8f648d4 604 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 605 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 606 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 607 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 608 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 609 // N=1 4 Line
wim 32:59c4b8f648d4 610 // DH=0 Double Height disable
wim 32:59c4b8f648d4 611 // IS=0
wim 32:59c4b8f648d4 612
wim 33:900a94bc7585 613 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 614 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 615 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 616 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 617 // N=1 4 Line
wim 32:59c4b8f648d4 618 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 619 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 620
wim 32:59c4b8f648d4 621 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 622 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 623 break;
wim 32:59c4b8f648d4 624
wim 33:900a94bc7585 625 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 626 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 627 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 628 break;
wim 30:033048611c01 629
wim 29:a3663151aa65 630 default:
wim 30:033048611c01 631 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 632 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 633 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 634 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 635 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 636 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 637 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 638 // RE=0
wim 32:59c4b8f648d4 639 // IS=0
wim 29:a3663151aa65 640
wim 33:900a94bc7585 641 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 642 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 643 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 644 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 645 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 646 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 647 // RE=1
wim 32:59c4b8f648d4 648 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 649
wim 32:59c4b8f648d4 650 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 651 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 652 break;
wim 32:59c4b8f648d4 653 } // switch type
wim 32:59c4b8f648d4 654
wim 32:59c4b8f648d4 655
wim 32:59c4b8f648d4 656 // init special features
wim 33:900a94bc7585 657 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 658 // Select Extended Instruction Set
wim 33:900a94bc7585 659
wim 33:900a94bc7585 660 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 661 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 662 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 663
wim 33:900a94bc7585 664 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 665
wim 32:59c4b8f648d4 666 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 667
wim 32:59c4b8f648d4 668 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 669 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 670
wim 32:59c4b8f648d4 671 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 672 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 673
wim 32:59c4b8f648d4 674 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 675 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 676
wim 36:9f5f86dfd44a 677 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 678 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 679 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 680 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 681 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 682
wim 32:59c4b8f648d4 683 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 684 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 685
wim 33:900a94bc7585 686 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 687 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 688 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 689
wim 32:59c4b8f648d4 690
wim 32:59c4b8f648d4 691 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 692 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 693
wim 32:59c4b8f648d4 694 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 695
wim 29:a3663151aa65 696
wim 32:59c4b8f648d4 697 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 698 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 699 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 700 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 701 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 702 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 703 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 704 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 705 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 706 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 707 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 708 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 709
wim 34:e5a0dcb43ecc 710 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 711 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 712 // Initialise Display configuration
wim 34:e5a0dcb43ecc 713 switch (_type) {
wim 34:e5a0dcb43ecc 714 case LCD24x1:
wim 34:e5a0dcb43ecc 715 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 716 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 717 break;
wim 34:e5a0dcb43ecc 718
wim 34:e5a0dcb43ecc 719 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 720 case LCD12x2:
wim 34:e5a0dcb43ecc 721 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 722 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 723 break;
wim 34:e5a0dcb43ecc 724
wim 34:e5a0dcb43ecc 725 default:
wim 34:e5a0dcb43ecc 726 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 727 break;
wim 34:e5a0dcb43ecc 728
wim 34:e5a0dcb43ecc 729 } // switch type
wim 34:e5a0dcb43ecc 730
wim 34:e5a0dcb43ecc 731 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 732 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 733
wim 34:e5a0dcb43ecc 734 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 735 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 736
wim 34:e5a0dcb43ecc 737 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 738 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 739
wim 34:e5a0dcb43ecc 740 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 741
wim 36:9f5f86dfd44a 742 #if(0)
wim 34:e5a0dcb43ecc 743 // Select CG RAM
wim 34:e5a0dcb43ecc 744 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 745 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 746 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 747 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 748 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 749 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 750 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 751 }
wim 36:9f5f86dfd44a 752 #endif
wim 34:e5a0dcb43ecc 753 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 754
wim 30:033048611c01 755 case PCF2113_3V3:
wim 32:59c4b8f648d4 756 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 757 // Initialise Display configuration
wim 29:a3663151aa65 758 switch (_type) {
wim 29:a3663151aa65 759 // case LCD12x1:
wim 33:900a94bc7585 760 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 761 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 762 case LCD24x1:
wim 33:900a94bc7585 763 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 764 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 765 break;
wim 30:033048611c01 766
wim 30:033048611c01 767 case LCD12x2:
wim 33:900a94bc7585 768 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 769 break;
wim 30:033048611c01 770
wim 30:033048611c01 771 default:
wim 30:033048611c01 772 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 773 break;
wim 30:033048611c01 774
wim 30:033048611c01 775 } // switch type
wim 30:033048611c01 776
wim 32:59c4b8f648d4 777 // Init special features
wim 33:900a94bc7585 778 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 779
wim 33:900a94bc7585 780 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 781 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 782 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 783 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 784
wim 32:59c4b8f648d4 785 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 786 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 787 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 788 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 789
wim 33:900a94bc7585 790 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 791 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 792
wim 33:900a94bc7585 793 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 794
wim 30:033048611c01 795 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 796
wim 30:033048611c01 797
wim 32:59c4b8f648d4 798 // case PCF2113_5V:
wim 32:59c4b8f648d4 799 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 800 //@TODO
wim 32:59c4b8f648d4 801
wim 30:033048611c01 802
wim 30:033048611c01 803 case PCF2116_3V3:
wim 32:59c4b8f648d4 804 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 805 // Initialise Display configuration
wim 30:033048611c01 806 switch (_type) {
wim 30:033048611c01 807 // case LCD12x1:
wim 30:033048611c01 808 // case LCD12x2:
wim 30:033048611c01 809 case LCD24x1:
wim 34:e5a0dcb43ecc 810 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 811 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 812 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 813 break;
wim 29:a3663151aa65 814
wim 32:59c4b8f648d4 815 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 816 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 817 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 818 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 819 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 820 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 821 break;
wim 30:033048611c01 822
wim 30:033048611c01 823 case LCD24x2:
wim 34:e5a0dcb43ecc 824 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 825 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 826 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 827 break;
wim 32:59c4b8f648d4 828
wim 30:033048611c01 829 default:
wim 30:033048611c01 830 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 831 break;
wim 30:033048611c01 832
wim 29:a3663151aa65 833 } // switch type
wim 29:a3663151aa65 834
wim 30:033048611c01 835 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 836
wim 32:59c4b8f648d4 837
wim 32:59c4b8f648d4 838 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 839 //@TODO
wim 32:59c4b8f648d4 840 case PCF2116_5V:
wim 32:59c4b8f648d4 841 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 842 // Initialise Display configuration
wim 32:59c4b8f648d4 843 switch (_type) {
wim 32:59c4b8f648d4 844 // case LCD12x1:
wim 32:59c4b8f648d4 845 // case LCD12x2:
wim 32:59c4b8f648d4 846 // case LCD24x1:
wim 34:e5a0dcb43ecc 847 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 848 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 849 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 850 // break;
wim 32:59c4b8f648d4 851
wim 32:59c4b8f648d4 852 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 853 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 854 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 855 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 856 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 857 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 858 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 859 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 860 break;
wim 32:59c4b8f648d4 861
wim 32:59c4b8f648d4 862 // case LCD24x2:
wim 32:59c4b8f648d4 863 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 864 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 865 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 866 // break;
wim 32:59c4b8f648d4 867
wim 32:59c4b8f648d4 868 default:
wim 32:59c4b8f648d4 869 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 870 break;
wim 32:59c4b8f648d4 871
wim 32:59c4b8f648d4 872 } // switch type
wim 32:59c4b8f648d4 873
wim 32:59c4b8f648d4 874 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 875
wim 32:59c4b8f648d4 876 case PCF2119_3V3:
wim 32:59c4b8f648d4 877 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 878 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 879 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 880
wim 32:59c4b8f648d4 881 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 882 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 883
wim 32:59c4b8f648d4 884 // Initialise Display configuration
wim 32:59c4b8f648d4 885 switch (_type) {
wim 32:59c4b8f648d4 886 case LCD8x1:
wim 32:59c4b8f648d4 887 // case LCD12x1:
wim 32:59c4b8f648d4 888 case LCD16x1:
wim 34:e5a0dcb43ecc 889 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 890 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 891 break;
wim 32:59c4b8f648d4 892
wim 32:59c4b8f648d4 893 case LCD24x1:
wim 32:59c4b8f648d4 894 // case LCD32x1:
wim 34:e5a0dcb43ecc 895 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 896 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 897 break;
wim 32:59c4b8f648d4 898
wim 32:59c4b8f648d4 899 case LCD8x2:
wim 32:59c4b8f648d4 900 // case LCD12x2:
wim 32:59c4b8f648d4 901 case LCD16x2:
wim 34:e5a0dcb43ecc 902 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 903 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 904 break;
wim 32:59c4b8f648d4 905
wim 32:59c4b8f648d4 906 default:
wim 32:59c4b8f648d4 907 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 908 break;
wim 32:59c4b8f648d4 909
wim 32:59c4b8f648d4 910 } // switch type
wim 32:59c4b8f648d4 911
wim 32:59c4b8f648d4 912 // Init special features
wim 32:59c4b8f648d4 913 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 914
wim 32:59c4b8f648d4 915 _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0
wim 32:59c4b8f648d4 916 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 917 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 918 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 919
wim 32:59c4b8f648d4 920 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 921 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 922 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 923 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 924
wim 32:59c4b8f648d4 925 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 926 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 927
wim 32:59c4b8f648d4 928 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 929
wim 32:59c4b8f648d4 930 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 931
wim 32:59c4b8f648d4 932 // case PCF2119_5V:
wim 32:59c4b8f648d4 933 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 934 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 935 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 936 //@TODO
wim 29:a3663151aa65 937
wim 19:c747b9e2e7b8 938 case WS0010:
wim 19:c747b9e2e7b8 939 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 940 // Note1: Identical to RS0010
wim 30:033048611c01 941 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 942 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 943 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 944 //
wim 30:033048611c01 945 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 946 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 947 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 948
wim 30:033048611c01 949 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 950 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 951 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 952 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 953 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 954
wim 29:a3663151aa65 955 // Initialise Display configuration
wim 29:a3663151aa65 956 switch (_type) {
wim 29:a3663151aa65 957 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 958 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 959 // case LCD12x1:
wim 29:a3663151aa65 960 case LCD16x1:
wim 30:033048611c01 961 case LCD24x1:
wim 30:033048611c01 962 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 963 // DL=0 (4 bits bus)
wim 30:033048611c01 964 // N=0 (1 line)
wim 30:033048611c01 965 // F=0 (5x7 dots font)
wim 30:033048611c01 966 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 967 break;
wim 30:033048611c01 968
wim 32:59c4b8f648d4 969 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 970 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 971 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 972 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 973 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 974 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 975 break;
wim 29:a3663151aa65 976
wim 29:a3663151aa65 977 default:
wim 30:033048611c01 978 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 979 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 980 // DL=0 (4 bits bus)
wim 30:033048611c01 981 // N=1 (2 lines)
wim 30:033048611c01 982 // F=0 (5x7 dots font)
wim 30:033048611c01 983 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 984
wim 29:a3663151aa65 985 break;
wim 29:a3663151aa65 986 } // switch type
wim 29:a3663151aa65 987
wim 32:59c4b8f648d4 988 break; // case WS0010 Controller
wim 33:900a94bc7585 989
wim 33:900a94bc7585 990
wim 33:900a94bc7585 991 case US2066_3V3:
wim 33:900a94bc7585 992 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 993 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 994 // case USS2066_5V:
wim 33:900a94bc7585 995 // US2066 controller, VDD=5V
wim 33:900a94bc7585 996
wim 33:900a94bc7585 997 // Initialise Display configuration
wim 33:900a94bc7585 998 switch (_type) {
wim 33:900a94bc7585 999 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 1000 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 1001 // case LCD12x1:
wim 33:900a94bc7585 1002 case LCD16x1:
wim 33:900a94bc7585 1003 // case LCD20x1:
wim 33:900a94bc7585 1004 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1005 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1006 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1007 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1008 // DH=0 Double Height disable
wim 33:900a94bc7585 1009 // IS=0
wim 33:900a94bc7585 1010
wim 33:900a94bc7585 1011 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1012 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1013 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1014 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1015 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1016 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1017
wim 33:900a94bc7585 1018 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1019 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1020 break;
wim 33:900a94bc7585 1021
wim 33:900a94bc7585 1022 case LCD16x1C:
wim 33:900a94bc7585 1023 case LCD8x2:
wim 33:900a94bc7585 1024 case LCD16x2:
wim 33:900a94bc7585 1025 case LCD20x2:
wim 33:900a94bc7585 1026 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1027 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1028 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1029 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1030 // DH=0 Double Height disable
wim 33:900a94bc7585 1031 // IS=0
wim 33:900a94bc7585 1032
wim 33:900a94bc7585 1033 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1034 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1035 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1036 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1037 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1038 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1039
wim 33:900a94bc7585 1040 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1041 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1042 break;
wim 33:900a94bc7585 1043
wim 33:900a94bc7585 1044 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1045 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1046 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1047 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1048 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1049 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1050 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1051 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1052 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1053 // DH=0 Double Height disable
wim 33:900a94bc7585 1054 // IS=0
wim 33:900a94bc7585 1055
wim 33:900a94bc7585 1056 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1057 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1058 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1059 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1060 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1061 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1062
wim 33:900a94bc7585 1063 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1064 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1065 break;
wim 33:900a94bc7585 1066
wim 33:900a94bc7585 1067 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1068 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1069 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1070 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1071 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1072 // DH=0 Double Height disable
wim 33:900a94bc7585 1073 // IS=0
wim 33:900a94bc7585 1074
wim 33:900a94bc7585 1075 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1076 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1077 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1078 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1079 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1080 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1081
wim 33:900a94bc7585 1082 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1083 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1084 break;
wim 33:900a94bc7585 1085
wim 33:900a94bc7585 1086 // case LCD24x1:
wim 33:900a94bc7585 1087 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1088 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1089 default:
wim 33:900a94bc7585 1090 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1091 break;
wim 33:900a94bc7585 1092
wim 33:900a94bc7585 1093 } // switch type
wim 33:900a94bc7585 1094
wim 34:e5a0dcb43ecc 1095 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1096
wim 33:900a94bc7585 1097 // init special features
wim 33:900a94bc7585 1098 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1099 // Select Extended Instruction Set
wim 33:900a94bc7585 1100
wim 33:900a94bc7585 1101 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1102 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1103
wim 33:900a94bc7585 1104 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1105
wim 33:900a94bc7585 1106 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1107 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1108
wim 33:900a94bc7585 1109 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1110
wim 33:900a94bc7585 1111 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1112 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1113
wim 33:900a94bc7585 1114 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1115
wim 34:e5a0dcb43ecc 1116 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1117 // // Default
wim 33:900a94bc7585 1118
wim 33:900a94bc7585 1119 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1120 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1121
wim 33:900a94bc7585 1122 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1123
wim 33:900a94bc7585 1124 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1125 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1126
wim 33:900a94bc7585 1127 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1128 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1129 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1130
wim 33:900a94bc7585 1131 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1132 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1133 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1134
wim 33:900a94bc7585 1135 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1136 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1137
wim 33:900a94bc7585 1138 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1139 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1140
wim 33:900a94bc7585 1141 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1142
wim 33:900a94bc7585 1143 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1144 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1145 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1146 //End Test Blinking
wim 33:900a94bc7585 1147
wim 33:900a94bc7585 1148 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1149
wim 33:900a94bc7585 1150 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1151 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1152
wim 33:900a94bc7585 1153 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1154 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1155 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1156
wim 33:900a94bc7585 1157 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1158 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1159 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1160
wim 34:e5a0dcb43ecc 1161 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1162 case PT6314 :
wim 34:e5a0dcb43ecc 1163 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1164 switch (_type) {
wim 34:e5a0dcb43ecc 1165 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1166 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1167 // case LCD12x1:
wim 34:e5a0dcb43ecc 1168 case LCD16x1:
wim 34:e5a0dcb43ecc 1169 case LCD20x1:
wim 34:e5a0dcb43ecc 1170 case LCD24x1:
wim 34:e5a0dcb43ecc 1171 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1172 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1173 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1174 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1175 // X
wim 34:e5a0dcb43ecc 1176 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1177 // BR0=0
wim 34:e5a0dcb43ecc 1178 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1179 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1180 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1181 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1182
wim 34:e5a0dcb43ecc 1183 break;
wim 34:e5a0dcb43ecc 1184
wim 34:e5a0dcb43ecc 1185 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1186 case LCD8x2:
wim 34:e5a0dcb43ecc 1187 case LCD16x2:
wim 34:e5a0dcb43ecc 1188 case LCD20x2:
wim 34:e5a0dcb43ecc 1189 case LCD24x2:
wim 34:e5a0dcb43ecc 1190 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1191 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1192 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1193 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1194 // X
wim 34:e5a0dcb43ecc 1195 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1196 // BR0=0
wim 34:e5a0dcb43ecc 1197 break;
wim 34:e5a0dcb43ecc 1198
wim 34:e5a0dcb43ecc 1199 default:
wim 34:e5a0dcb43ecc 1200 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1201 break;
wim 34:e5a0dcb43ecc 1202 } // switch type
wim 34:e5a0dcb43ecc 1203
wim 34:e5a0dcb43ecc 1204 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1205 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1206 break; // case PT6314 Controller (VFD)
wim 29:a3663151aa65 1207
wim 37:ce348c002929 1208 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1209 default:
wim 32:59c4b8f648d4 1210 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1211
wim 29:a3663151aa65 1212 // Initialise Display configuration
wim 29:a3663151aa65 1213 switch (_type) {
wim 29:a3663151aa65 1214 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1215 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1216 // case LCD12x1:
wim 29:a3663151aa65 1217 case LCD16x1:
wim 30:033048611c01 1218 // case LCD20x1:
wim 29:a3663151aa65 1219 case LCD24x1:
wim 30:033048611c01 1220 // case LCD40x1:
wim 32:59c4b8f648d4 1221 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1222 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1223 // N=0 (1 line)
wim 29:a3663151aa65 1224 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1225 break;
wim 29:a3663151aa65 1226
wim 32:59c4b8f648d4 1227 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1228 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1229 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1230 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1231 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1232 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1233 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1234 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1235 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1236 break;
wim 30:033048611c01 1237
wim 30:033048611c01 1238 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1239 default:
wim 32:59c4b8f648d4 1240 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1241 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1242 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1243 // N=1 (2 lines)
wim 29:a3663151aa65 1244 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1245 // - (Don't care)
wim 29:a3663151aa65 1246 break;
wim 29:a3663151aa65 1247 } // switch type
wim 10:dd9b3a696acd 1248
wim 34:e5a0dcb43ecc 1249 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1250 break; // case default Controller
wim 29:a3663151aa65 1251
wim 34:e5a0dcb43ecc 1252 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1253
wim 30:033048611c01 1254 // Controller general initialisations
wim 32:59c4b8f648d4 1255 // _writeCommand(0x01); // cls, and set cursor to 0
wim 32:59c4b8f648d4 1256 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1257 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1258
wim 28:30fa94f7341c 1259 _writeCommand(0x02); // Return Home
wim 28:30fa94f7341c 1260 // Cursor Home, DDRAM Address to Origin
wim 28:30fa94f7341c 1261
wim 28:30fa94f7341c 1262 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1263 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1264 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1265 // S=0 (No display shift)
wim 10:dd9b3a696acd 1266
wim 29:a3663151aa65 1267 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1268 // S/C=0 Cursor moves
wim 29:a3663151aa65 1269 // R/L=1 Right
wim 29:a3663151aa65 1270 //
wim 29:a3663151aa65 1271
wim 13:24506ba22480 1272 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1273 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1274
wim 21:9eb628d9e164 1275 setCursor(CurOff_BlkOff);
wim 21:9eb628d9e164 1276 setMode(DispOn);
simon 1:ac48b187213c 1277 }
simon 1:ac48b187213c 1278
wim 8:03116f75b66e 1279
wim 21:9eb628d9e164 1280 /** Clear the screen, Cursor home.
wim 21:9eb628d9e164 1281 */
wim 21:9eb628d9e164 1282 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1283
wim 15:b70ebfffb258 1284 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1285 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1286 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1287
wim 15:b70ebfffb258 1288 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1289 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1290
wim 15:b70ebfffb258 1291 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1292 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1293 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1294 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1295
wim 21:9eb628d9e164 1296 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1297 }
wim 15:b70ebfffb258 1298
wim 15:b70ebfffb258 1299 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1300 _writeCommand(0x01); // cls, and set cursor to 0
wim 29:a3663151aa65 1301 wait_ms(10); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1302 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1303
wim 15:b70ebfffb258 1304 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1305 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1306 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1307 }
wim 15:b70ebfffb258 1308
wim 29:a3663151aa65 1309 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1310 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1311 }
simon 1:ac48b187213c 1312
wim 29:a3663151aa65 1313 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1314 *
wim 29:a3663151aa65 1315 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1316 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1317 */
wim 21:9eb628d9e164 1318 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1319
wim 15:b70ebfffb258 1320 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1321 // check column and row sanity,
wim 15:b70ebfffb258 1322 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1323 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1324 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1325 setAddress(column, row);
wim 15:b70ebfffb258 1326 }
wim 30:033048611c01 1327
wim 15:b70ebfffb258 1328
wim 21:9eb628d9e164 1329 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1330 */
wim 21:9eb628d9e164 1331 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1332 int addr;
wim 15:b70ebfffb258 1333
wim 15:b70ebfffb258 1334 if (value == '\n') {
wim 15:b70ebfffb258 1335 //No character to write
wim 15:b70ebfffb258 1336
wim 15:b70ebfffb258 1337 //Update Cursor
wim 15:b70ebfffb258 1338 _column = 0;
wim 15:b70ebfffb258 1339 _row++;
wim 15:b70ebfffb258 1340 if (_row >= rows()) {
wim 15:b70ebfffb258 1341 _row = 0;
wim 15:b70ebfffb258 1342 }
wim 15:b70ebfffb258 1343 }
wim 15:b70ebfffb258 1344 else {
wim 37:ce348c002929 1345 //Character to write
wim 37:ce348c002929 1346 #if (LCD_DEFAULT_FONT == 1)
wim 37:ce348c002929 1347 _writeData(value);
wim 37:ce348c002929 1348 #else
wim 37:ce348c002929 1349 _writeData(ASCII_2_LCD(value));
wim 37:ce348c002929 1350 #endif
wim 15:b70ebfffb258 1351 //Update Cursor
wim 15:b70ebfffb258 1352 _column++;
wim 15:b70ebfffb258 1353 if (_column >= columns()) {
wim 15:b70ebfffb258 1354 _column = 0;
wim 15:b70ebfffb258 1355 _row++;
wim 15:b70ebfffb258 1356 if (_row >= rows()) {
wim 15:b70ebfffb258 1357 _row = 0;
wim 15:b70ebfffb258 1358 }
wim 15:b70ebfffb258 1359 }
wim 15:b70ebfffb258 1360 } //else
wim 15:b70ebfffb258 1361
wim 15:b70ebfffb258 1362 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1363 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1364 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1365
wim 15:b70ebfffb258 1366 return value;
wim 15:b70ebfffb258 1367 }
wim 15:b70ebfffb258 1368
wim 15:b70ebfffb258 1369
wim 16:c276b75e6585 1370 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1371 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1372 return -1;
simon 1:ac48b187213c 1373 }
simon 1:ac48b187213c 1374
wim 37:ce348c002929 1375 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1376 *
wim 37:ce348c002929 1377 * @param c The character to write to the display
wim 37:ce348c002929 1378 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1379 */
wim 37:ce348c002929 1380 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1381
wim 37:ce348c002929 1382 //LCD_C_FT0 is default for HD44780 and compatible series
wim 37:ce348c002929 1383 if (_font == LCD_C_FT0) return c;
wim 37:ce348c002929 1384
wim 37:ce348c002929 1385 //LCD_C_FT1 for PCF21XXC series
wim 37:ce348c002929 1386 //Used code from Suga koubou library for PCF2119
wim 37:ce348c002929 1387 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1388 c |= 0x80;
wim 37:ce348c002929 1389 } else if (c >= 0xf0 && c <= 0xff) {
wim 37:ce348c002929 1390 c &= 0x0f;
wim 37:ce348c002929 1391 }
wim 37:ce348c002929 1392 return c;
wim 37:ce348c002929 1393
wim 37:ce348c002929 1394 //LCD_C_FT2 ...
wim 37:ce348c002929 1395 //@TODO add more, eg cyrillic
wim 37:ce348c002929 1396 //@TODO add method to switch between fonts for controllers that support this
wim 37:ce348c002929 1397 }
wim 37:ce348c002929 1398
wim 14:0c32b66b14b8 1399
wim 34:e5a0dcb43ecc 1400 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1401 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1402 *
wim 34:e5a0dcb43ecc 1403 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1404 */
wim 34:e5a0dcb43ecc 1405 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1406 return _putc(c);
wim 34:e5a0dcb43ecc 1407 }
wim 34:e5a0dcb43ecc 1408
wim 34:e5a0dcb43ecc 1409
wim 34:e5a0dcb43ecc 1410 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1411 *
wim 34:e5a0dcb43ecc 1412 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1413 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1414 */
wim 34:e5a0dcb43ecc 1415 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1416
wim 34:e5a0dcb43ecc 1417 while (*text !=0) {
wim 34:e5a0dcb43ecc 1418 _putc(*text);
wim 34:e5a0dcb43ecc 1419 text++;
wim 34:e5a0dcb43ecc 1420 }
wim 34:e5a0dcb43ecc 1421 return 0;
wim 34:e5a0dcb43ecc 1422 }
wim 34:e5a0dcb43ecc 1423 #endif
wim 34:e5a0dcb43ecc 1424
wim 34:e5a0dcb43ecc 1425
wim 17:652ab113bc2e 1426 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1427 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1428
wim 17:652ab113bc2e 1429 // Enable is Low
wim 21:9eb628d9e164 1430 this->_setEnable(true);
wim 38:cbe275b0b647 1431 this->_setData(value); // Low nibble of value on D4..D7
wim 17:652ab113bc2e 1432 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1433 this->_setEnable(false);
wim 17:652ab113bc2e 1434 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1435 // Enable is Low
wim 17:652ab113bc2e 1436 }
wim 17:652ab113bc2e 1437
wim 16:c276b75e6585 1438 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1439 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1440
wim 15:b70ebfffb258 1441 // Enable is Low
wim 21:9eb628d9e164 1442 this->_setEnable(true);
wim 21:9eb628d9e164 1443 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1444 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1445 this->_setEnable(false);
wim 15:b70ebfffb258 1446 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1447
wim 21:9eb628d9e164 1448 this->_setEnable(true);
wim 37:ce348c002929 1449 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1450 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1451 this->_setEnable(false);
wim 15:b70ebfffb258 1452 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1453
wim 15:b70ebfffb258 1454 // Enable is Low
simon 1:ac48b187213c 1455 }
simon 1:ac48b187213c 1456
wim 21:9eb628d9e164 1457 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1458 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1459
wim 21:9eb628d9e164 1460 this->_setRS(false);
wim 16:c276b75e6585 1461 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1462
wim 21:9eb628d9e164 1463 this->_writeByte(command);
wim 15:b70ebfffb258 1464 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1465 }
simon 1:ac48b187213c 1466
wim 21:9eb628d9e164 1467 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1468 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1469
wim 21:9eb628d9e164 1470 this->_setRS(true);
wim 16:c276b75e6585 1471 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1472
wim 21:9eb628d9e164 1473 this->_writeByte(data);
wim 15:b70ebfffb258 1474 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1475 }
simon 1:ac48b187213c 1476
wim 8:03116f75b66e 1477
wim 32:59c4b8f648d4 1478 // This replaces the original _address() method.
wim 8:03116f75b66e 1479 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1480 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1481 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1482 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1483 }
wim 8:03116f75b66e 1484
wim 30:033048611c01 1485
wim 30:033048611c01 1486 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1487 //
wim 30:033048611c01 1488 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1489 *
wim 30:033048611c01 1490 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1491 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1492 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1493 *
wim 30:033048611c01 1494 */
wim 30:033048611c01 1495 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1496
wim 30:033048611c01 1497 switch (_addr_mode) {
wim 30:033048611c01 1498
wim 30:033048611c01 1499 case LCD_T_A:
wim 30:033048611c01 1500 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1501 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1502 //Displays top rows when less than four are used.
wim 30:033048611c01 1503 switch (row) {
wim 30:033048611c01 1504 case 0:
wim 30:033048611c01 1505 return 0x00 + column;
wim 30:033048611c01 1506 case 1:
wim 30:033048611c01 1507 return 0x40 + column;
wim 30:033048611c01 1508 case 2:
wim 30:033048611c01 1509 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1510 case 3:
wim 30:033048611c01 1511 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1512 // Should never get here.
wim 30:033048611c01 1513 default:
wim 30:033048611c01 1514 return 0x00;
wim 30:033048611c01 1515 }
wim 30:033048611c01 1516
wim 30:033048611c01 1517 case LCD_T_B:
wim 30:033048611c01 1518 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1519 if (row==0)
wim 30:033048611c01 1520 return 0x00 + column;
wim 30:033048611c01 1521 else
wim 30:033048611c01 1522 // return _nr_cols + column;
wim 30:033048611c01 1523 return 0x08 + column;
wim 30:033048611c01 1524
wim 30:033048611c01 1525 case LCD_T_C:
wim 30:033048611c01 1526 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1527 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1528 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1529 #if(0)
wim 32:59c4b8f648d4 1530 if (column < 8)
wim 30:033048611c01 1531 return 0x00 + column;
wim 30:033048611c01 1532 else
wim 30:033048611c01 1533 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1534 #else
wim 32:59c4b8f648d4 1535 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1536 return 0x00 + column;
wim 32:59c4b8f648d4 1537 else
wim 32:59c4b8f648d4 1538 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1539 #endif
wim 30:033048611c01 1540
wim 30:033048611c01 1541 // Not sure about this one, seems wrong.
wim 30:033048611c01 1542 // Left in for compatibility with original library
wim 30:033048611c01 1543 // case LCD16x2B:
wim 30:033048611c01 1544 // return 0x00 + (row * 40) + column;
wim 30:033048611c01 1545
wim 30:033048611c01 1546 case LCD_T_D:
wim 36:9f5f86dfd44a 1547 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1548 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1549 //Displays top rows when less than four are used.
wim 30:033048611c01 1550 switch (row) {
wim 30:033048611c01 1551 case 0:
wim 30:033048611c01 1552 return 0x00 + column;
wim 30:033048611c01 1553 case 1:
wim 30:033048611c01 1554 return 0x20 + column;
wim 30:033048611c01 1555 case 2:
wim 30:033048611c01 1556 return 0x40 + column;
wim 30:033048611c01 1557 case 3:
wim 30:033048611c01 1558 return 0x60 + column;
wim 30:033048611c01 1559 // Should never get here.
wim 30:033048611c01 1560 default:
wim 30:033048611c01 1561 return 0x00;
wim 30:033048611c01 1562 }
wim 30:033048611c01 1563
wim 30:033048611c01 1564 case LCD_T_D1:
wim 36:9f5f86dfd44a 1565 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1566 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1567 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1568 switch (row) {
wim 30:033048611c01 1569 case 0:
wim 30:033048611c01 1570 return 0x20 + column;
wim 30:033048611c01 1571 case 1:
wim 30:033048611c01 1572 return 0x40 + column;
wim 30:033048611c01 1573 case 2:
wim 30:033048611c01 1574 return 0x60 + column;
wim 30:033048611c01 1575 // Should never get here.
wim 30:033048611c01 1576 default:
wim 30:033048611c01 1577 return 0x00;
wim 30:033048611c01 1578 }
wim 30:033048611c01 1579
wim 30:033048611c01 1580 case LCD_T_E:
wim 30:033048611c01 1581 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1582 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1583 if (row<2) {
wim 30:033048611c01 1584 // Test to see if we need to switch between controllers
wim 30:033048611c01 1585 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1586
wim 30:033048611c01 1587 // Second LCD controller Cursor Off
wim 30:033048611c01 1588 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1589
wim 30:033048611c01 1590 // Select primary controller
wim 30:033048611c01 1591 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1592
wim 30:033048611c01 1593 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1594 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1595 }
wim 30:033048611c01 1596
wim 30:033048611c01 1597 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1598 }
wim 30:033048611c01 1599 else {
wim 30:033048611c01 1600
wim 30:033048611c01 1601 // Test to see if we need to switch between controllers
wim 30:033048611c01 1602 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1603 // Primary LCD controller Cursor Off
wim 30:033048611c01 1604 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1605
wim 30:033048611c01 1606 // Select secondary controller
wim 30:033048611c01 1607 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1608
wim 30:033048611c01 1609 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1610 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1611 }
wim 30:033048611c01 1612
wim 30:033048611c01 1613 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1614 }
wim 30:033048611c01 1615
wim 32:59c4b8f648d4 1616 case LCD_T_F:
wim 32:59c4b8f648d4 1617 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1618 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1619 switch (row) {
wim 32:59c4b8f648d4 1620 case 0:
wim 32:59c4b8f648d4 1621 return 0x00 + column;
wim 32:59c4b8f648d4 1622 case 1:
wim 32:59c4b8f648d4 1623 return 0x40 + column;
wim 32:59c4b8f648d4 1624 case 2:
wim 32:59c4b8f648d4 1625 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1626 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1627 else
wim 32:59c4b8f648d4 1628 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1629 // Should never get here.
wim 32:59c4b8f648d4 1630 default:
wim 32:59c4b8f648d4 1631 return 0x00;
wim 32:59c4b8f648d4 1632 }
wim 32:59c4b8f648d4 1633
wim 32:59c4b8f648d4 1634 case LCD_T_G:
wim 32:59c4b8f648d4 1635 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1636 switch (row) {
wim 32:59c4b8f648d4 1637 case 0:
wim 32:59c4b8f648d4 1638 return 0x00 + column;
wim 32:59c4b8f648d4 1639 case 1:
wim 32:59c4b8f648d4 1640 return 0x10 + column;
wim 32:59c4b8f648d4 1641 case 2:
wim 32:59c4b8f648d4 1642 return 0x20 + column;
wim 32:59c4b8f648d4 1643 // Should never get here.
wim 32:59c4b8f648d4 1644 default:
wim 32:59c4b8f648d4 1645 return 0x00;
wim 32:59c4b8f648d4 1646 }
wim 32:59c4b8f648d4 1647
wim 30:033048611c01 1648 // Should never get here.
wim 30:033048611c01 1649 default:
wim 30:033048611c01 1650 return 0x00;
wim 32:59c4b8f648d4 1651
wim 32:59c4b8f648d4 1652 } // switch _addr_mode
wim 30:033048611c01 1653 }
wim 30:033048611c01 1654
wim 30:033048611c01 1655
wim 29:a3663151aa65 1656 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1657 *
wim 29:a3663151aa65 1658 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1659 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1660 */
wim 21:9eb628d9e164 1661 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1662
wim 15:b70ebfffb258 1663 // Sanity Check column
wim 15:b70ebfffb258 1664 if (column < 0) {
wim 15:b70ebfffb258 1665 _column = 0;
wim 15:b70ebfffb258 1666 }
wim 36:9f5f86dfd44a 1667 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1668 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1669 } else _column = column;
wim 8:03116f75b66e 1670
wim 15:b70ebfffb258 1671 // Sanity Check row
wim 15:b70ebfffb258 1672 if (row < 0) {
wim 15:b70ebfffb258 1673 _row = 0;
wim 15:b70ebfffb258 1674 }
wim 36:9f5f86dfd44a 1675 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1676 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1677 } else _row = row;
wim 15:b70ebfffb258 1678
wim 15:b70ebfffb258 1679
wim 15:b70ebfffb258 1680 // Compute the memory address
wim 15:b70ebfffb258 1681 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1682 // switch cursor if needed
wim 15:b70ebfffb258 1683 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1684
wim 13:24506ba22480 1685 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1686 }
simon 1:ac48b187213c 1687
wim 29:a3663151aa65 1688
wim 29:a3663151aa65 1689 /** Return the number of columns
wim 29:a3663151aa65 1690 *
wim 36:9f5f86dfd44a 1691 * @return The number of columns
wim 30:033048611c01 1692 *
wim 30:033048611c01 1693 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1694 */
wim 21:9eb628d9e164 1695 int TextLCD_Base::columns() {
wim 30:033048611c01 1696
wim 30:033048611c01 1697 // Columns encoded in b7..b0
wim 30:033048611c01 1698 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1699 return _nr_cols;
simon 1:ac48b187213c 1700 }
simon 1:ac48b187213c 1701
wim 29:a3663151aa65 1702 /** Return the number of rows
wim 29:a3663151aa65 1703 *
wim 36:9f5f86dfd44a 1704 * @return The number of rows
wim 30:033048611c01 1705 *
wim 30:033048611c01 1706 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1707 */
wim 21:9eb628d9e164 1708 int TextLCD_Base::rows() {
wim 30:033048611c01 1709
wim 30:033048611c01 1710 // Rows encoded in b15..b8
wim 30:033048611c01 1711 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 1712 return _nr_rows;
simon 1:ac48b187213c 1713 }
wim 10:dd9b3a696acd 1714
wim 29:a3663151aa65 1715 /** Set the Cursormode
wim 29:a3663151aa65 1716 *
wim 29:a3663151aa65 1717 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 1718 */
wim 21:9eb628d9e164 1719 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 1720
wim 17:652ab113bc2e 1721 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 1722 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 1723
wim 17:652ab113bc2e 1724 // Configure only current LCD controller
wim 31:ef31cd8a00d1 1725 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 1726 }
wim 15:b70ebfffb258 1727
wim 29:a3663151aa65 1728 /** Set the Displaymode
wim 29:a3663151aa65 1729 *
wim 29:a3663151aa65 1730 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 1731 */
wim 21:9eb628d9e164 1732 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 1733
wim 17:652ab113bc2e 1734 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 1735 _currentMode = displayMode;
wim 15:b70ebfffb258 1736
wim 17:652ab113bc2e 1737 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 1738 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1739 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 1740 // Configure primary LCD controller
wim 17:652ab113bc2e 1741 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 1742
wim 17:652ab113bc2e 1743 // Select 2nd controller
wim 21:9eb628d9e164 1744 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 1745
wim 17:652ab113bc2e 1746 // Configure secondary LCD controller
wim 21:9eb628d9e164 1747 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 1748
wim 17:652ab113bc2e 1749 // Restore current controller
wim 21:9eb628d9e164 1750 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1751 }
wim 17:652ab113bc2e 1752 else {
wim 17:652ab113bc2e 1753 // Select primary controller
wim 21:9eb628d9e164 1754 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1755
wim 17:652ab113bc2e 1756 // Configure primary LCD controller
wim 21:9eb628d9e164 1757 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 1758
wim 17:652ab113bc2e 1759 // Restore current controller
wim 21:9eb628d9e164 1760 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 1761
wim 17:652ab113bc2e 1762 // Configure secondary LCD controller
wim 17:652ab113bc2e 1763 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 1764 }
wim 17:652ab113bc2e 1765 }
wim 17:652ab113bc2e 1766 else {
wim 17:652ab113bc2e 1767 // Configure primary LCD controller
wim 17:652ab113bc2e 1768 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1769 }
wim 17:652ab113bc2e 1770 }
wim 17:652ab113bc2e 1771
wim 29:a3663151aa65 1772 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 1773 */
wim 36:9f5f86dfd44a 1774 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 1775
wim 36:9f5f86dfd44a 1776 // Configure current LCD controller
wim 36:9f5f86dfd44a 1777 switch (_ctrl) {
wim 36:9f5f86dfd44a 1778 case ST7070:
wim 36:9f5f86dfd44a 1779 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 1780 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 1781 break;
wim 36:9f5f86dfd44a 1782 default:
wim 36:9f5f86dfd44a 1783 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 1784 break;
wim 36:9f5f86dfd44a 1785 } //switch
wim 10:dd9b3a696acd 1786 }
wim 10:dd9b3a696acd 1787
wim 29:a3663151aa65 1788 /** Set the Backlight mode
wim 29:a3663151aa65 1789 *
wim 29:a3663151aa65 1790 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 1791 */
wim 21:9eb628d9e164 1792 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 1793
wim 35:311be6444a39 1794 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 1795 // Positive Backlight control pin logic
wim 20:e0da005a777f 1796 if (backlightMode == LightOn) {
wim 35:311be6444a39 1797 this->_setBL(true);
wim 20:e0da005a777f 1798 }
wim 20:e0da005a777f 1799 else {
wim 21:9eb628d9e164 1800 this->_setBL(false);
wim 20:e0da005a777f 1801 }
wim 35:311be6444a39 1802 #else
wim 35:311be6444a39 1803 // Inverted Backlight control pin logic
wim 35:311be6444a39 1804 if (backlightMode == LightOn) {
wim 35:311be6444a39 1805 this->_setBL(false);
wim 35:311be6444a39 1806 }
wim 35:311be6444a39 1807 else {
wim 35:311be6444a39 1808 this->_setBL(true);
wim 35:311be6444a39 1809 }
wim 35:311be6444a39 1810 #endif
wim 20:e0da005a777f 1811 }
wim 20:e0da005a777f 1812
wim 29:a3663151aa65 1813 /** Set User Defined Characters
wim 29:a3663151aa65 1814 *
wim 34:e5a0dcb43ecc 1815 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1816 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 1817 */
wim 21:9eb628d9e164 1818 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 15:b70ebfffb258 1819
wim 15:b70ebfffb258 1820 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1821 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 1822 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 1823
wim 15:b70ebfffb258 1824 // Select primary controller
wim 21:9eb628d9e164 1825 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 1826
wim 15:b70ebfffb258 1827 // Configure primary LCD controller
wim 15:b70ebfffb258 1828 _setUDC(c, udc_data);
wim 15:b70ebfffb258 1829
wim 15:b70ebfffb258 1830 // Select 2nd controller
wim 21:9eb628d9e164 1831 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 1832
wim 15:b70ebfffb258 1833 // Configure secondary LCD controller
wim 15:b70ebfffb258 1834 _setUDC(c, udc_data);
wim 11:9ec02df863a1 1835
wim 15:b70ebfffb258 1836 // Restore current controller
wim 19:c747b9e2e7b8 1837 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 1838 }
wim 15:b70ebfffb258 1839 else {
wim 15:b70ebfffb258 1840 // Configure primary LCD controller
wim 15:b70ebfffb258 1841 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 1842 }
wim 15:b70ebfffb258 1843 }
wim 15:b70ebfffb258 1844
wim 34:e5a0dcb43ecc 1845 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 1846 *
wim 34:e5a0dcb43ecc 1847 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1848 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 1849 */
wim 34:e5a0dcb43ecc 1850 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 1851
wim 34:e5a0dcb43ecc 1852 switch (_ctrl) {
wim 34:e5a0dcb43ecc 1853 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1854 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1855 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 1856 case PCF2116_5V :
wim 34:e5a0dcb43ecc 1857 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1858 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 1859 break;
wim 34:e5a0dcb43ecc 1860
wim 34:e5a0dcb43ecc 1861 default:
wim 34:e5a0dcb43ecc 1862 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 1863 break;
wim 34:e5a0dcb43ecc 1864 } //switch _ctrl
wim 34:e5a0dcb43ecc 1865
wim 34:e5a0dcb43ecc 1866 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 1867 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 1868 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 1869
wim 34:e5a0dcb43ecc 1870 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 1871 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 1872 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 1873 // Store UDC pattern
wim 34:e5a0dcb43ecc 1874 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 1875 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 1876 }
wim 34:e5a0dcb43ecc 1877
wim 34:e5a0dcb43ecc 1878 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 1879 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 1880 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 1881 }
wim 32:59c4b8f648d4 1882
wim 36:9f5f86dfd44a 1883 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 1884 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 1885 *
wim 33:900a94bc7585 1886 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 1887 */
wim 33:900a94bc7585 1888 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 1889 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 1890 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 1891 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 1892 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 1893 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 1894 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1895 // .............
wim 33:900a94bc7585 1896 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 1897 //
wim 33:900a94bc7585 1898 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 1899 // B1 B0 Mode
wim 33:900a94bc7585 1900 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 1901 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 1902 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 1903 //
wim 36:9f5f86dfd44a 1904 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 1905 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 1906 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 1907 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 1908 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 1909 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 1910 switch (blinkMode) {
wim 33:900a94bc7585 1911 case BlinkOn:
wim 36:9f5f86dfd44a 1912 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 1913 switch (_ctrl) {
wim 36:9f5f86dfd44a 1914 case KS0073 :
wim 33:900a94bc7585 1915 case KS0078 :
wim 36:9f5f86dfd44a 1916 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 1917 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1918
wim 33:900a94bc7585 1919 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1920 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1921
wim 33:900a94bc7585 1922 case US2066_3V3 :
wim 33:900a94bc7585 1923 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1924 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 1925 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1926 // Select Ext Instr Set
wim 33:900a94bc7585 1927
wim 33:900a94bc7585 1928 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1929 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1930 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1931
wim 36:9f5f86dfd44a 1932 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1933 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1934 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1935 // Enable Icon Blink
wim 36:9f5f86dfd44a 1936 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1937 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1938 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1939
wim 36:9f5f86dfd44a 1940 break;
wim 33:900a94bc7585 1941
wim 33:900a94bc7585 1942 default:
wim 33:900a94bc7585 1943 //Unsupported feature for other controllers
wim 33:900a94bc7585 1944 break;
wim 33:900a94bc7585 1945 } //switch _ctrl
wim 33:900a94bc7585 1946
wim 36:9f5f86dfd44a 1947 break; // BlinkOn
wim 33:900a94bc7585 1948
wim 33:900a94bc7585 1949 case BlinkOff:
wim 33:900a94bc7585 1950 // Controllers that support UDC Blink
wim 33:900a94bc7585 1951 switch (_ctrl) {
wim 36:9f5f86dfd44a 1952 case KS0073 :
wim 33:900a94bc7585 1953 case KS0078 :
wim 36:9f5f86dfd44a 1954 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 1955 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 1956
wim 33:900a94bc7585 1957 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 1958 break; // case KS0073, KS0078 Controller
wim 33:900a94bc7585 1959
wim 33:900a94bc7585 1960 case US2066_3V3 :
wim 33:900a94bc7585 1961 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 1962 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 1963 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1964 // Select Ext Instr Set
wim 33:900a94bc7585 1965
wim 33:900a94bc7585 1966 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 1967 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1968 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 1969
wim 36:9f5f86dfd44a 1970 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 1971 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 1972 case PCF2119_3V3 :
wim 36:9f5f86dfd44a 1973 // Disable Icon Blink
wim 36:9f5f86dfd44a 1974 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 1975 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 1976 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 1977
wim 36:9f5f86dfd44a 1978 break;
wim 33:900a94bc7585 1979
wim 33:900a94bc7585 1980 default:
wim 33:900a94bc7585 1981 //Unsupported feature for other controllers
wim 33:900a94bc7585 1982 break;
wim 33:900a94bc7585 1983 } //switch _ctrl
wim 33:900a94bc7585 1984
wim 36:9f5f86dfd44a 1985 break; //BlinkOff
wim 33:900a94bc7585 1986
wim 33:900a94bc7585 1987 default:
wim 33:900a94bc7585 1988 break;
wim 33:900a94bc7585 1989 } // blinkMode
wim 33:900a94bc7585 1990
wim 33:900a94bc7585 1991 } // setUDCBlink()
wim 33:900a94bc7585 1992
wim 33:900a94bc7585 1993
wim 32:59c4b8f648d4 1994 /** Set Contrast
wim 32:59c4b8f648d4 1995 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 1996 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 1997 *
wim 32:59c4b8f648d4 1998 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 1999 * @return none
wim 32:59c4b8f648d4 2000 */
wim 32:59c4b8f648d4 2001 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2002 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 2003
wim 32:59c4b8f648d4 2004 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 2005 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2006
wim 32:59c4b8f648d4 2007 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2008
wim 33:900a94bc7585 2009 switch (_ctrl) {
wim 32:59c4b8f648d4 2010 case PCF2113_3V3 :
wim 32:59c4b8f648d4 2011 case PCF2119_3V3 :
wim 32:59c4b8f648d4 2012 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2013 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2014
wim 32:59c4b8f648d4 2015 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2016 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2017 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2018 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2019 break;
wim 32:59c4b8f648d4 2020
wim 32:59c4b8f648d4 2021 case ST7032_3V3 :
wim 32:59c4b8f648d4 2022 case ST7032_5V :
wim 32:59c4b8f648d4 2023 case ST7036_3V3 :
wim 32:59c4b8f648d4 2024 // case ST7036_5V :
wim 32:59c4b8f648d4 2025 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2026 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2027 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2028 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2029 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2030 break;
wim 32:59c4b8f648d4 2031
wim 33:900a94bc7585 2032 case US2066_3V3 :
wim 33:900a94bc7585 2033 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2034 // Select Extended Instruction Set
wim 33:900a94bc7585 2035
wim 33:900a94bc7585 2036 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2037
wim 33:900a94bc7585 2038 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2039 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2040
wim 33:900a94bc7585 2041 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2042
wim 33:900a94bc7585 2043 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2044 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2045 break;
wim 33:900a94bc7585 2046
wim 34:e5a0dcb43ecc 2047 //not yet tested on hardware
wim 32:59c4b8f648d4 2048 case PT6314 :
wim 32:59c4b8f648d4 2049 // Only 2 significant bits
wim 32:59c4b8f648d4 2050 // 0x00 = 100%
wim 32:59c4b8f648d4 2051 // 0x01 = 75%
wim 32:59c4b8f648d4 2052 // 0x02 = 50%
wim 32:59c4b8f648d4 2053 // 0x03 = 25%
wim 32:59c4b8f648d4 2054 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2055 break;
wim 32:59c4b8f648d4 2056
wim 32:59c4b8f648d4 2057 default:
wim 32:59c4b8f648d4 2058 //Unsupported feature for other controllers
wim 33:900a94bc7585 2059 break;
wim 33:900a94bc7585 2060 } // end switch
wim 33:900a94bc7585 2061 } // end setContrast()
wim 32:59c4b8f648d4 2062
wim 32:59c4b8f648d4 2063
wim 32:59c4b8f648d4 2064 /** Set Power
wim 32:59c4b8f648d4 2065 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2066 *
wim 32:59c4b8f648d4 2067 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2068 * @return none
wim 32:59c4b8f648d4 2069 */
wim 32:59c4b8f648d4 2070 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2071 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2072
wim 32:59c4b8f648d4 2073 if (powerOn) {
wim 32:59c4b8f648d4 2074 // Switch on
wim 32:59c4b8f648d4 2075 setMode(DispOn);
wim 32:59c4b8f648d4 2076
wim 32:59c4b8f648d4 2077 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2078 switch (_ctrl) {
wim 32:59c4b8f648d4 2079
wim 32:59c4b8f648d4 2080 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2081 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2082 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2083 //@todo
wim 33:900a94bc7585 2084 // enable Booster Bon
wim 33:900a94bc7585 2085
wim 33:900a94bc7585 2086 case WS0010:
wim 33:900a94bc7585 2087 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2088 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2089 break;
wim 33:900a94bc7585 2090
wim 36:9f5f86dfd44a 2091 case KS0073:
wim 33:900a94bc7585 2092 case KS0078:
wim 32:59c4b8f648d4 2093 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2094 // case SSD1803_5V :
wim 33:900a94bc7585 2095 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2096 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2097 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2098 break;
wim 32:59c4b8f648d4 2099
wim 32:59c4b8f648d4 2100 default:
wim 32:59c4b8f648d4 2101 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2102 break;
wim 32:59c4b8f648d4 2103 } // end switch
wim 32:59c4b8f648d4 2104 }
wim 32:59c4b8f648d4 2105 else {
wim 32:59c4b8f648d4 2106 // Switch off
wim 32:59c4b8f648d4 2107 setMode(DispOff);
wim 32:59c4b8f648d4 2108
wim 32:59c4b8f648d4 2109 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2110 switch (_ctrl) {
wim 32:59c4b8f648d4 2111
wim 32:59c4b8f648d4 2112 // case PCF2113_3V3 :
wim 32:59c4b8f648d4 2113 // case PCF2119_3V3 :
wim 32:59c4b8f648d4 2114 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2115 //@todo
wim 33:900a94bc7585 2116 // disable Booster Bon
wim 33:900a94bc7585 2117
wim 33:900a94bc7585 2118 case WS0010:
wim 33:900a94bc7585 2119 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2120 break;
wim 33:900a94bc7585 2121
wim 36:9f5f86dfd44a 2122 case KS0073:
wim 33:900a94bc7585 2123 case KS0078:
wim 32:59c4b8f648d4 2124 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2125 // case SSD1803_5V :
wim 33:900a94bc7585 2126 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2127 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2128 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2129 break;
wim 32:59c4b8f648d4 2130
wim 32:59c4b8f648d4 2131 default:
wim 32:59c4b8f648d4 2132 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2133 break;
wim 32:59c4b8f648d4 2134 } // end switch
wim 32:59c4b8f648d4 2135 }
wim 33:900a94bc7585 2136 } // end setPower()
wim 33:900a94bc7585 2137
wim 33:900a94bc7585 2138
wim 33:900a94bc7585 2139 /** Set Orient
wim 33:900a94bc7585 2140 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2141 *
wim 33:900a94bc7585 2142 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2143 * @return none
wim 33:900a94bc7585 2144 */
wim 33:900a94bc7585 2145 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2146
wim 33:900a94bc7585 2147 switch (orient) {
wim 33:900a94bc7585 2148
wim 33:900a94bc7585 2149 case Top:
wim 33:900a94bc7585 2150 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2151 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2152 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2153 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2154 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2155 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2156 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2157 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2158 break;
wim 34:e5a0dcb43ecc 2159
wim 33:900a94bc7585 2160 case SSD1803_3V3 :
wim 33:900a94bc7585 2161 // case SSD1803_5V :
wim 33:900a94bc7585 2162 case US2066_3V3 :
wim 33:900a94bc7585 2163 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2164 // Select Extended Instruction Set
wim 33:900a94bc7585 2165 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2166 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2167
wim 33:900a94bc7585 2168 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2169 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2170 break;
wim 36:9f5f86dfd44a 2171
wim 36:9f5f86dfd44a 2172 case ST7070:
wim 36:9f5f86dfd44a 2173 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2174
wim 36:9f5f86dfd44a 2175 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2176 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2177 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2178 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2179
wim 36:9f5f86dfd44a 2180 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2181
wim 36:9f5f86dfd44a 2182 break; // case ST7070 Controller
wim 33:900a94bc7585 2183
wim 33:900a94bc7585 2184 default:
wim 33:900a94bc7585 2185 //Unsupported feature for other controllers
wim 33:900a94bc7585 2186 break;
wim 33:900a94bc7585 2187
wim 33:900a94bc7585 2188 } // end switch _ctrl
wim 33:900a94bc7585 2189 break; // end Top
wim 33:900a94bc7585 2190
wim 33:900a94bc7585 2191 case Bottom:
wim 33:900a94bc7585 2192 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2193 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2194 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2195 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2196 case PCF2119_3V3:
wim 34:e5a0dcb43ecc 2197 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2198 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2199 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2200 break;
wim 34:e5a0dcb43ecc 2201
wim 33:900a94bc7585 2202 case SSD1803_3V3 :
wim 33:900a94bc7585 2203 // case SSD1803_5V :
wim 33:900a94bc7585 2204 case US2066_3V3 :
wim 33:900a94bc7585 2205 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2206 // Select Extended Instruction Set
wim 33:900a94bc7585 2207 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2208 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2209
wim 33:900a94bc7585 2210 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2211 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2212 break;
wim 36:9f5f86dfd44a 2213
wim 36:9f5f86dfd44a 2214 case ST7070:
wim 36:9f5f86dfd44a 2215 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2216 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2217 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2218 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2219 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2220 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2221
wim 36:9f5f86dfd44a 2222 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2223 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2224 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2225 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2226
wim 36:9f5f86dfd44a 2227 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2228
wim 36:9f5f86dfd44a 2229 break; // case ST7070 Controller
wim 33:900a94bc7585 2230
wim 33:900a94bc7585 2231 default:
wim 33:900a94bc7585 2232 //Unsupported feature for other controllers
wim 33:900a94bc7585 2233 break;
wim 33:900a94bc7585 2234
wim 33:900a94bc7585 2235 } // end switch _ctrl
wim 33:900a94bc7585 2236
wim 33:900a94bc7585 2237 break; // end Bottom
wim 33:900a94bc7585 2238 } // end switch orient
wim 33:900a94bc7585 2239 } // end setOrient()
wim 33:900a94bc7585 2240
wim 34:e5a0dcb43ecc 2241 /** Set Big Font
wim 34:e5a0dcb43ecc 2242 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2243 *
wim 34:e5a0dcb43ecc 2244 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2245 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2246 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2247 */
wim 34:e5a0dcb43ecc 2248 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2249
wim 34:e5a0dcb43ecc 2250 switch (lines) {
wim 34:e5a0dcb43ecc 2251 case None:
wim 34:e5a0dcb43ecc 2252 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2253 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2254 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2255 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2256 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2257 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2258 // Default
wim 34:e5a0dcb43ecc 2259 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2260 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2261 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2262 break; // end US2066
wim 34:e5a0dcb43ecc 2263
wim 34:e5a0dcb43ecc 2264 default:
wim 34:e5a0dcb43ecc 2265 break; // end default
wim 34:e5a0dcb43ecc 2266 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2267 break; // end None
wim 34:e5a0dcb43ecc 2268
wim 34:e5a0dcb43ecc 2269 case TopLine:
wim 34:e5a0dcb43ecc 2270 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2271
wim 34:e5a0dcb43ecc 2272 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2273 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2274 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2275 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2276 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2277 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2278 // Default
wim 34:e5a0dcb43ecc 2279 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2280 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2281 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2282 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2283
wim 34:e5a0dcb43ecc 2284 default:
wim 34:e5a0dcb43ecc 2285 break; // end default
wim 34:e5a0dcb43ecc 2286 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2287 break; // end TopLine
wim 34:e5a0dcb43ecc 2288
wim 34:e5a0dcb43ecc 2289 case CenterLine:
wim 34:e5a0dcb43ecc 2290 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2291
wim 34:e5a0dcb43ecc 2292 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2293 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2294 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2295 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2296 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2297 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2298 // Default
wim 34:e5a0dcb43ecc 2299 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2300 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2301 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2302 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2303
wim 34:e5a0dcb43ecc 2304 default:
wim 34:e5a0dcb43ecc 2305 break; // end default
wim 34:e5a0dcb43ecc 2306 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2307 break; // end CenterLine
wim 34:e5a0dcb43ecc 2308
wim 34:e5a0dcb43ecc 2309 case BottomLine:
wim 34:e5a0dcb43ecc 2310 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2311
wim 34:e5a0dcb43ecc 2312 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2313 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2314 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2315 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2316 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2317 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2318 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2319 }
wim 34:e5a0dcb43ecc 2320 else {
wim 34:e5a0dcb43ecc 2321 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2322 }
wim 34:e5a0dcb43ecc 2323 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2324 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2325 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2326 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2327
wim 34:e5a0dcb43ecc 2328 default:
wim 34:e5a0dcb43ecc 2329 break; // end default
wim 34:e5a0dcb43ecc 2330 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2331 break; // end BottomLine
wim 34:e5a0dcb43ecc 2332
wim 34:e5a0dcb43ecc 2333 case TopBottomLine:
wim 34:e5a0dcb43ecc 2334 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2335
wim 34:e5a0dcb43ecc 2336 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2337 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2338 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2339 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2340 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2341 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2342 // Default
wim 34:e5a0dcb43ecc 2343 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2344 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2345 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2346 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2347
wim 34:e5a0dcb43ecc 2348 default:
wim 34:e5a0dcb43ecc 2349 break; // end default
wim 34:e5a0dcb43ecc 2350 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2351 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2352
wim 34:e5a0dcb43ecc 2353 } // end switch lines
wim 34:e5a0dcb43ecc 2354
wim 34:e5a0dcb43ecc 2355 } // end setBigFont()
wim 32:59c4b8f648d4 2356
wim 36:9f5f86dfd44a 2357
wim 36:9f5f86dfd44a 2358 /** Set Icons
wim 36:9f5f86dfd44a 2359 *
wim 36:9f5f86dfd44a 2360 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2361 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2362 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2363 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2364 */
wim 36:9f5f86dfd44a 2365 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2366 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2367 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2368 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2369 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2370 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2371 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2372 // .............
wim 36:9f5f86dfd44a 2373 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2374 //
wim 36:9f5f86dfd44a 2375 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2376 // B1 B0 Mode
wim 36:9f5f86dfd44a 2377 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2378 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2379 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2380 //
wim 36:9f5f86dfd44a 2381 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2382 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2383 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2384 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2385 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2386 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2387
wim 36:9f5f86dfd44a 2388 switch (_ctrl) {
wim 36:9f5f86dfd44a 2389 case KS0073:
wim 36:9f5f86dfd44a 2390 case KS0078:
wim 36:9f5f86dfd44a 2391 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2392 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2393 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2394
wim 36:9f5f86dfd44a 2395 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2396
wim 36:9f5f86dfd44a 2397 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2398 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2399 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2400
wim 36:9f5f86dfd44a 2401 case ST7032_3V3:
wim 36:9f5f86dfd44a 2402 case ST7032_5V:
wim 36:9f5f86dfd44a 2403 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2404 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2405
wim 36:9f5f86dfd44a 2406 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2407
wim 36:9f5f86dfd44a 2408 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2409 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2410 break; // end ST7032
wim 36:9f5f86dfd44a 2411
wim 36:9f5f86dfd44a 2412 case ST7036_3V3:
wim 36:9f5f86dfd44a 2413 case ST7036_5V:
wim 36:9f5f86dfd44a 2414 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2415 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2416
wim 36:9f5f86dfd44a 2417 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2418
wim 36:9f5f86dfd44a 2419 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2420 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2421 break; // end ST7036
wim 36:9f5f86dfd44a 2422
wim 36:9f5f86dfd44a 2423 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2424 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2425 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2426 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2427 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2428 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2429
wim 36:9f5f86dfd44a 2430 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2431 // Select IS=0
wim 36:9f5f86dfd44a 2432 break; // end SSD1803
wim 36:9f5f86dfd44a 2433
wim 36:9f5f86dfd44a 2434 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2435 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2436 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2437 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2438 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2439 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2440 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2441 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2442 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2443 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2444 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2445 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2446
wim 36:9f5f86dfd44a 2447 default:
wim 36:9f5f86dfd44a 2448 break; // end default
wim 36:9f5f86dfd44a 2449 } // end switch _ctrl
wim 36:9f5f86dfd44a 2450
wim 36:9f5f86dfd44a 2451 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2452 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2453 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2454
wim 36:9f5f86dfd44a 2455 } // end setIcon()
wim 36:9f5f86dfd44a 2456
wim 36:9f5f86dfd44a 2457 /** Clear Icons
wim 36:9f5f86dfd44a 2458 *
wim 36:9f5f86dfd44a 2459 * @param none
wim 36:9f5f86dfd44a 2460 * @return none
wim 36:9f5f86dfd44a 2461 */
wim 36:9f5f86dfd44a 2462 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2463 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2464 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2465 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2466 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2467 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2468 // .............
wim 36:9f5f86dfd44a 2469 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2470 //
wim 36:9f5f86dfd44a 2471 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2472 // B1 B0 Mode
wim 36:9f5f86dfd44a 2473 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2474 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2475 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2476 //
wim 36:9f5f86dfd44a 2477 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2478 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2479 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2480 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2481 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2482 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2483 int idx;
wim 36:9f5f86dfd44a 2484
wim 36:9f5f86dfd44a 2485 switch (_ctrl) {
wim 36:9f5f86dfd44a 2486 case KS0073:
wim 36:9f5f86dfd44a 2487 case KS0078:
wim 36:9f5f86dfd44a 2488 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2489 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2490 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2491 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2492 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2493 }
wim 36:9f5f86dfd44a 2494 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2495 // Select Std Instr set
wim 36:9f5f86dfd44a 2496 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2497
wim 36:9f5f86dfd44a 2498 case ST7032_3V3:
wim 36:9f5f86dfd44a 2499 case ST7032_5V:
wim 36:9f5f86dfd44a 2500 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2501
wim 36:9f5f86dfd44a 2502 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2503 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2504 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2505 }
wim 36:9f5f86dfd44a 2506
wim 36:9f5f86dfd44a 2507 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2508 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2509 break; // end ST7032
wim 36:9f5f86dfd44a 2510
wim 36:9f5f86dfd44a 2511 case ST7036_3V3:
wim 36:9f5f86dfd44a 2512 case ST7036_5V:
wim 36:9f5f86dfd44a 2513 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2514
wim 36:9f5f86dfd44a 2515 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2516 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2517 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2518 }
wim 36:9f5f86dfd44a 2519
wim 36:9f5f86dfd44a 2520 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2521 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2522 break; // end ST7036
wim 36:9f5f86dfd44a 2523
wim 36:9f5f86dfd44a 2524 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2525 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2526 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2527 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2528 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2529 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2530 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2531 }
wim 36:9f5f86dfd44a 2532 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2533 // Select IS=0
wim 36:9f5f86dfd44a 2534 break; // end SSD1803
wim 36:9f5f86dfd44a 2535
wim 36:9f5f86dfd44a 2536 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2537 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2538 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2539 // Select CG RAM
wim 36:9f5f86dfd44a 2540
wim 36:9f5f86dfd44a 2541 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2542 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2543 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2544 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2545 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2546 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2547 }
wim 36:9f5f86dfd44a 2548
wim 36:9f5f86dfd44a 2549 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2550 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2551 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2552 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2553 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2554 }
wim 36:9f5f86dfd44a 2555 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2556
wim 36:9f5f86dfd44a 2557 case PCF2119_3V3:
wim 36:9f5f86dfd44a 2558 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2559 // Select CG RAM
wim 36:9f5f86dfd44a 2560
wim 36:9f5f86dfd44a 2561 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2562 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2563 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2564 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2565 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2566 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2567 }
wim 36:9f5f86dfd44a 2568
wim 36:9f5f86dfd44a 2569 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2570 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2571 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2572 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2573 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2574 }
wim 36:9f5f86dfd44a 2575 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 2576
wim 36:9f5f86dfd44a 2577 default:
wim 36:9f5f86dfd44a 2578 break; // end default
wim 36:9f5f86dfd44a 2579 } // end switch _ctrl
wim 36:9f5f86dfd44a 2580
wim 36:9f5f86dfd44a 2581 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2582 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2583 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2584 } //end clrIcon()
wim 36:9f5f86dfd44a 2585
wim 36:9f5f86dfd44a 2586
wim 36:9f5f86dfd44a 2587 /** Set Invert
wim 36:9f5f86dfd44a 2588 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 2589 *
wim 36:9f5f86dfd44a 2590 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 2591 * @return none
wim 36:9f5f86dfd44a 2592 */
wim 36:9f5f86dfd44a 2593 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2594 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 2595
wim 36:9f5f86dfd44a 2596 if (invertOn) {
wim 36:9f5f86dfd44a 2597 // Controllers that support Invert
wim 36:9f5f86dfd44a 2598 switch (_ctrl) {
wim 36:9f5f86dfd44a 2599 case KS0073:
wim 36:9f5f86dfd44a 2600 case KS0078:
wim 36:9f5f86dfd44a 2601 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2602 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2603 break;
wim 36:9f5f86dfd44a 2604 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2605 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2606 case US2066_3V3:
wim 36:9f5f86dfd44a 2607 // case USS2066_5V:
wim 36:9f5f86dfd44a 2608 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2609 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2610 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2611 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2612 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2613 break;
wim 36:9f5f86dfd44a 2614 default:
wim 36:9f5f86dfd44a 2615 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2616 break;
wim 36:9f5f86dfd44a 2617 } // end switch
wim 36:9f5f86dfd44a 2618 }
wim 36:9f5f86dfd44a 2619 else {
wim 36:9f5f86dfd44a 2620 // Controllers that support Invert
wim 36:9f5f86dfd44a 2621 switch (_ctrl) {
wim 36:9f5f86dfd44a 2622 case KS0073:
wim 36:9f5f86dfd44a 2623 case KS0078:
wim 36:9f5f86dfd44a 2624 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2625 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2626 break;
wim 36:9f5f86dfd44a 2627 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2628 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2629 case US2066_3V3:
wim 36:9f5f86dfd44a 2630 // case USS2066_5V:
wim 36:9f5f86dfd44a 2631 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2632 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2633 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2634 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2635 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2636 break;
wim 36:9f5f86dfd44a 2637
wim 36:9f5f86dfd44a 2638 default:
wim 36:9f5f86dfd44a 2639 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2640 break;
wim 36:9f5f86dfd44a 2641 } // end switch
wim 36:9f5f86dfd44a 2642 }
wim 36:9f5f86dfd44a 2643 } // end setInvert()
wim 36:9f5f86dfd44a 2644
wim 23:d47f226efb24 2645 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 2646
wim 22:35742ec80c24 2647
wim 23:d47f226efb24 2648 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 2649
wim 21:9eb628d9e164 2650 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 2651 *
wim 21:9eb628d9e164 2652 * @param rs Instruction/data control line
wim 21:9eb628d9e164 2653 * @param e Enable line (clock)
wim 21:9eb628d9e164 2654 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 2655 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 2656 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 2657 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 2658 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 2659 */
wim 21:9eb628d9e164 2660 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 2661 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 2662 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2663 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 2664 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 2665
wim 22:35742ec80c24 2666 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2667 if (bl != NC) {
wim 22:35742ec80c24 2668 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 2669 _bl->write(0); //Deactivate
wim 22:35742ec80c24 2670 }
wim 22:35742ec80c24 2671 else {
wim 22:35742ec80c24 2672 // No Hardware Backlight pin
wim 22:35742ec80c24 2673 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 2674 }
wim 22:35742ec80c24 2675
wim 22:35742ec80c24 2676 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2677 if (e2 != NC) {
wim 22:35742ec80c24 2678 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 2679 _e2->write(0); //Deactivate
wim 22:35742ec80c24 2680 }
wim 22:35742ec80c24 2681 else {
wim 22:35742ec80c24 2682 // No Hardware Enable pin
wim 22:35742ec80c24 2683 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 2684 }
wim 38:cbe275b0b647 2685
wim 38:cbe275b0b647 2686 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 2687 }
wim 21:9eb628d9e164 2688
wim 29:a3663151aa65 2689 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 2690 *
wim 29:a3663151aa65 2691 * @param none
wim 29:a3663151aa65 2692 * @return none
wim 29:a3663151aa65 2693 */
wim 29:a3663151aa65 2694 TextLCD::~TextLCD() {
wim 29:a3663151aa65 2695 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 2696 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 2697 }
wim 29:a3663151aa65 2698
wim 22:35742ec80c24 2699 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 2700 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2701 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2702 * @param value true or false
wim 22:35742ec80c24 2703 * @return none
wim 22:35742ec80c24 2704 */
wim 21:9eb628d9e164 2705 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 2706
wim 22:35742ec80c24 2707 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 2708 if (value) {
wim 22:35742ec80c24 2709 _e = 1; // Set E bit
wim 22:35742ec80c24 2710 }
wim 22:35742ec80c24 2711 else {
wim 22:35742ec80c24 2712 _e = 0; // Reset E bit
wim 22:35742ec80c24 2713 }
wim 22:35742ec80c24 2714 }
wim 22:35742ec80c24 2715 else {
wim 22:35742ec80c24 2716 if (value) {
wim 22:35742ec80c24 2717 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 2718 }
wim 22:35742ec80c24 2719 else {
wim 22:35742ec80c24 2720 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 2721 }
wim 22:35742ec80c24 2722 }
wim 21:9eb628d9e164 2723 }
wim 21:9eb628d9e164 2724
wim 21:9eb628d9e164 2725 // Set RS pin
wim 21:9eb628d9e164 2726 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2727 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 2728
wim 22:35742ec80c24 2729 if (value) {
wim 21:9eb628d9e164 2730 _rs = 1; // Set RS bit
wim 22:35742ec80c24 2731 }
wim 22:35742ec80c24 2732 else {
wim 21:9eb628d9e164 2733 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 2734 }
wim 21:9eb628d9e164 2735 }
wim 21:9eb628d9e164 2736
wim 22:35742ec80c24 2737 /** Set BL pin
wim 22:35742ec80c24 2738 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2739 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2740 * @param value true or false
wim 22:35742ec80c24 2741 * @return none
wim 22:35742ec80c24 2742 */
wim 21:9eb628d9e164 2743 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 2744
wim 22:35742ec80c24 2745 if (value) {
wim 22:35742ec80c24 2746 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 2747 }
wim 22:35742ec80c24 2748 else {
wim 22:35742ec80c24 2749 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 2750 }
wim 21:9eb628d9e164 2751 }
wim 21:9eb628d9e164 2752
wim 21:9eb628d9e164 2753 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2754 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2755 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 2756 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 2757 }
wim 34:e5a0dcb43ecc 2758
wim 23:d47f226efb24 2759 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 2760
wim 21:9eb628d9e164 2761
wim 23:d47f226efb24 2762 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 2763 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 2764 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 2765 *
wim 22:35742ec80c24 2766 * @param i2c I2C Bus
wim 26:bd897a001012 2767 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 2768 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 2769 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 2770 */
wim 21:9eb628d9e164 2771 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2772 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 2773 _i2c(i2c){
wim 21:9eb628d9e164 2774
wim 22:35742ec80c24 2775 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2776
wim 28:30fa94f7341c 2777 // Setup the I2C bus
wim 28:30fa94f7341c 2778 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 2779 _i2c->frequency(100000);
wim 21:9eb628d9e164 2780
wim 26:bd897a001012 2781 #if (MCP23008==1)
wim 26:bd897a001012 2782 // MCP23008 portexpander Init
wim 37:ce348c002929 2783 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 2784 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 2785 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 2786 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 2787 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 2788 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 2789 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 2790 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 2791 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 2792 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 2793 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 2794 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 2795 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 2796 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 2797 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 2798
wim 21:9eb628d9e164 2799 // Init the portexpander bus
wim 38:cbe275b0b647 2800 _lcd_bus = LCD_BUS_I2C_DEF;
wim 21:9eb628d9e164 2801
wim 21:9eb628d9e164 2802 // write the new data to the portexpander
wim 37:ce348c002929 2803 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2804 #else
wim 26:bd897a001012 2805 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2806
wim 26:bd897a001012 2807 // Init the portexpander bus
wim 38:cbe275b0b647 2808 _lcd_bus = LCD_BUS_I2C_DEF;
wim 26:bd897a001012 2809
wim 26:bd897a001012 2810 // write the new data to the portexpander
wim 21:9eb628d9e164 2811 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2812 #endif
wim 21:9eb628d9e164 2813
wim 37:ce348c002929 2814 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 2815 }
wim 21:9eb628d9e164 2816
wim 37:ce348c002929 2817 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 2818 // Used for mbed I2C bus expander
wim 37:ce348c002929 2819 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 2820
wim 22:35742ec80c24 2821 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 2822 if (value) {
wim 38:cbe275b0b647 2823 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 26:bd897a001012 2824 }
wim 26:bd897a001012 2825 else {
wim 38:cbe275b0b647 2826 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 26:bd897a001012 2827 }
wim 22:35742ec80c24 2828 }
wim 22:35742ec80c24 2829 else {
wim 26:bd897a001012 2830 if (value) {
wim 38:cbe275b0b647 2831 _lcd_bus |= LCD_BUS_I2C_E2; // Set E2 bit
wim 26:bd897a001012 2832 }
wim 26:bd897a001012 2833 else {
wim 38:cbe275b0b647 2834 _lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim 26:bd897a001012 2835 }
wim 26:bd897a001012 2836 }
wim 37:ce348c002929 2837 }
wim 37:ce348c002929 2838
wim 37:ce348c002929 2839 // Set E pin (or E2 pin)
wim 37:ce348c002929 2840 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 2841 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 2842
wim 37:ce348c002929 2843 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 2844 _setEnableBit(value);
wim 26:bd897a001012 2845
wim 26:bd897a001012 2846 #if (MCP23008==1)
wim 26:bd897a001012 2847 // MCP23008 portexpander
wim 26:bd897a001012 2848
wim 26:bd897a001012 2849 // write the new data to the portexpander
wim 37:ce348c002929 2850 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2851 #else
wim 26:bd897a001012 2852 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2853
wim 22:35742ec80c24 2854 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2855 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2856 #endif
wim 21:9eb628d9e164 2857 }
wim 21:9eb628d9e164 2858
wim 37:ce348c002929 2859
wim 21:9eb628d9e164 2860 // Set RS pin
wim 21:9eb628d9e164 2861 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2862 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 2863
wim 26:bd897a001012 2864 if (value) {
wim 38:cbe275b0b647 2865 _lcd_bus |= LCD_BUS_I2C_RS; // Set RS bit
wim 26:bd897a001012 2866 }
wim 26:bd897a001012 2867 else {
wim 38:cbe275b0b647 2868 _lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim 26:bd897a001012 2869 }
wim 26:bd897a001012 2870
wim 26:bd897a001012 2871 #if (MCP23008==1)
wim 26:bd897a001012 2872 // MCP23008 portexpander
wim 26:bd897a001012 2873
wim 26:bd897a001012 2874 // write the new data to the portexpander
wim 37:ce348c002929 2875 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2876 #else
wim 26:bd897a001012 2877 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2878
wim 22:35742ec80c24 2879 // write the new data to the I2C portexpander
wim 22:35742ec80c24 2880 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2881 #endif
wim 21:9eb628d9e164 2882 }
wim 21:9eb628d9e164 2883
wim 21:9eb628d9e164 2884 // Set BL pin
wim 21:9eb628d9e164 2885 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2886 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 2887
wim 26:bd897a001012 2888 if (value) {
wim 38:cbe275b0b647 2889 _lcd_bus |= LCD_BUS_I2C_BL; // Set BL bit
wim 26:bd897a001012 2890 }
wim 26:bd897a001012 2891 else {
wim 38:cbe275b0b647 2892 _lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim 26:bd897a001012 2893 }
wim 26:bd897a001012 2894
wim 26:bd897a001012 2895 #if (MCP23008==1)
wim 26:bd897a001012 2896 // MCP23008 portexpander
wim 26:bd897a001012 2897
wim 26:bd897a001012 2898 // write the new data to the portexpander
wim 37:ce348c002929 2899 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 2900 #else
wim 37:ce348c002929 2901 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 2902
wim 37:ce348c002929 2903 // write the new data to the I2C portexpander
wim 37:ce348c002929 2904 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 2905 #endif
wim 37:ce348c002929 2906 }
wim 37:ce348c002929 2907
wim 38:cbe275b0b647 2908 #if(0)
wim 38:cbe275b0b647 2909 // New optimized v018
wim 38:cbe275b0b647 2910 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim 38:cbe275b0b647 2911 // Place the 4bit data in the databus shadowvalue
wim 38:cbe275b0b647 2912 // Used for mbed I2C bus expander
wim 38:cbe275b0b647 2913 const char _LCD_DATA_BITS[16] = {
wim 38:cbe275b0b647 2914 0x00,
wim 38:cbe275b0b647 2915 ( LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2916 ( LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 2917 ( LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2918 ( LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 2919 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2920 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 2921 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2922 (LCD_BUS_I2C_D7 ),
wim 38:cbe275b0b647 2923 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2924 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 2925 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2926 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 2927 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 2928 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 2929 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4)
wim 38:cbe275b0b647 2930 };
wim 38:cbe275b0b647 2931 void TextLCD_I2C::_setDataBits(int value) {
wim 38:cbe275b0b647 2932
wim 38:cbe275b0b647 2933 //Clear all databits
wim 38:cbe275b0b647 2934 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 38:cbe275b0b647 2935
wim 38:cbe275b0b647 2936 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 38:cbe275b0b647 2937 _lcd_bus |= _LCD_DATA_BITS[value & 0x0F];
wim 38:cbe275b0b647 2938 }
wim 38:cbe275b0b647 2939
wim 38:cbe275b0b647 2940 #else
wim 38:cbe275b0b647 2941 //orig v017
wim 38:cbe275b0b647 2942 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 2943 // Place the 4bit data in the databus shadowvalue
wim 37:ce348c002929 2944 // Used for mbed I2C bus expander
wim 37:ce348c002929 2945 void TextLCD_I2C::_setDataBits(int value) {
wim 37:ce348c002929 2946
wim 37:ce348c002929 2947 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 2948 if (value & 0x01){
wim 38:cbe275b0b647 2949 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 37:ce348c002929 2950 }
wim 37:ce348c002929 2951 else {
wim 38:cbe275b0b647 2952 _lcd_bus &= ~LCD_BUS_I2C_D4; // Reset Databit
wim 37:ce348c002929 2953 }
wim 37:ce348c002929 2954
wim 37:ce348c002929 2955 if (value & 0x02){
wim 38:cbe275b0b647 2956 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 37:ce348c002929 2957 }
wim 37:ce348c002929 2958 else {
wim 38:cbe275b0b647 2959 _lcd_bus &= ~LCD_BUS_I2C_D5; // Reset Databit
wim 37:ce348c002929 2960 }
wim 37:ce348c002929 2961
wim 37:ce348c002929 2962 if (value & 0x04) {
wim 38:cbe275b0b647 2963 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 37:ce348c002929 2964 }
wim 37:ce348c002929 2965 else {
wim 38:cbe275b0b647 2966 _lcd_bus &= ~LCD_BUS_I2C_D6; // Reset Databit
wim 37:ce348c002929 2967 }
wim 37:ce348c002929 2968
wim 37:ce348c002929 2969 if (value & 0x08) {
wim 38:cbe275b0b647 2970 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 37:ce348c002929 2971 }
wim 37:ce348c002929 2972 else {
wim 38:cbe275b0b647 2973 _lcd_bus &= ~LCD_BUS_I2C_D7; // Reset Databit
wim 37:ce348c002929 2974 }
wim 37:ce348c002929 2975 }
wim 38:cbe275b0b647 2976 #endif
wim 38:cbe275b0b647 2977
wim 37:ce348c002929 2978
wim 37:ce348c002929 2979 // Place the 4bit data on the databus
wim 37:ce348c002929 2980 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 2981 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 2982
wim 37:ce348c002929 2983 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 2984 _setDataBits(value);
wim 37:ce348c002929 2985
wim 37:ce348c002929 2986 // Place the 4bit data on the databus
wim 37:ce348c002929 2987 #if (MCP23008==1)
wim 37:ce348c002929 2988 // MCP23008 portexpander
wim 37:ce348c002929 2989
wim 37:ce348c002929 2990 // write the new data to the portexpander
wim 37:ce348c002929 2991 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2992 #else
wim 26:bd897a001012 2993 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 2994
wim 21:9eb628d9e164 2995 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 2996 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 2997 #endif
wim 21:9eb628d9e164 2998 }
wim 21:9eb628d9e164 2999
wim 37:ce348c002929 3000 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 3001 // Used for mbed I2C bus expander
wim 37:ce348c002929 3002 void TextLCD_I2C::_writeRegister (int reg, int value) {
wim 37:ce348c002929 3003 char data[] = {reg, value};
wim 37:ce348c002929 3004
wim 37:ce348c002929 3005 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 3006 }
wim 37:ce348c002929 3007
wim 37:ce348c002929 3008 //New optimized
wim 37:ce348c002929 3009 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3010 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 3011
wim 37:ce348c002929 3012 // Write a byte using I2C
wim 37:ce348c002929 3013 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 3014 char data[6];
wim 37:ce348c002929 3015
wim 37:ce348c002929 3016 #if (MCP23008==1)
wim 37:ce348c002929 3017 // MCP23008 portexpander
wim 37:ce348c002929 3018
wim 37:ce348c002929 3019 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 3020 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 3021
wim 37:ce348c002929 3022 _setEnableBit(true); // set E
wim 37:ce348c002929 3023 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3024 data[1] = _lcd_bus;
wim 37:ce348c002929 3025
wim 37:ce348c002929 3026 _setEnableBit(false); // clear E
wim 37:ce348c002929 3027 data[2] = _lcd_bus;
wim 37:ce348c002929 3028
wim 37:ce348c002929 3029 _setEnableBit(true); // set E
wim 37:ce348c002929 3030 _setDataBits(value); // set data low
wim 37:ce348c002929 3031 data[3] = _lcd_bus;
wim 37:ce348c002929 3032
wim 37:ce348c002929 3033 _setEnableBit(false); // clear E
wim 37:ce348c002929 3034 data[4] = _lcd_bus;
wim 37:ce348c002929 3035
wim 37:ce348c002929 3036 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3037 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 3038 #else
wim 37:ce348c002929 3039 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3040
wim 37:ce348c002929 3041 _setEnableBit(true); // set E
wim 37:ce348c002929 3042 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3043 data[0] = _lcd_bus;
wim 37:ce348c002929 3044
wim 37:ce348c002929 3045 _setEnableBit(false); // clear E
wim 37:ce348c002929 3046 data[1] = _lcd_bus;
wim 37:ce348c002929 3047
wim 37:ce348c002929 3048 _setEnableBit(true); // set E
wim 37:ce348c002929 3049 _setDataBits(value); // set data low
wim 37:ce348c002929 3050 data[2] = _lcd_bus;
wim 37:ce348c002929 3051
wim 37:ce348c002929 3052 _setEnableBit(false); // clear E
wim 37:ce348c002929 3053 data[3] = _lcd_bus;
wim 37:ce348c002929 3054
wim 37:ce348c002929 3055 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3056 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3057 #endif
wim 37:ce348c002929 3058 }
wim 37:ce348c002929 3059
wim 37:ce348c002929 3060 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3061 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3062
wim 37:ce348c002929 3063
wim 37:ce348c002929 3064 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3065 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3066
wim 37:ce348c002929 3067 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3068 *
wim 37:ce348c002929 3069 * @param spi SPI Bus
wim 37:ce348c002929 3070 * @param cs chip select pin (active low)
wim 37:ce348c002929 3071 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3072 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3073 */
wim 37:ce348c002929 3074 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3075 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3076 _spi(spi),
wim 38:cbe275b0b647 3077 _cs(cs) {
wim 37:ce348c002929 3078 // Init cs
wim 37:ce348c002929 3079 _cs = 1;
wim 37:ce348c002929 3080
wim 37:ce348c002929 3081 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3082 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3083 _spi->format(8,0);
wim 37:ce348c002929 3084 _spi->frequency(500000);
wim 37:ce348c002929 3085 //_spi.frequency(1000000);
wim 37:ce348c002929 3086
wim 38:cbe275b0b647 3087 wait_ms(100); // Wait 100ms to ensure LCD powered up
wim 38:cbe275b0b647 3088
wim 37:ce348c002929 3089 // Init the portexpander bus
wim 38:cbe275b0b647 3090 _lcd_bus = LCD_BUS_SPI_DEF;
wim 37:ce348c002929 3091
wim 37:ce348c002929 3092 // write the new data to the portexpander
wim 37:ce348c002929 3093 _cs = 0;
wim 37:ce348c002929 3094 _spi->write(_lcd_bus);
wim 37:ce348c002929 3095 _cs = 1;
wim 37:ce348c002929 3096
wim 37:ce348c002929 3097 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3098 }
wim 37:ce348c002929 3099
wim 37:ce348c002929 3100 // Set E pin (or E2 pin)
wim 37:ce348c002929 3101 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3102 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3103
wim 37:ce348c002929 3104 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3105 if (value) {
wim 38:cbe275b0b647 3106 _lcd_bus |= LCD_BUS_SPI_E; // Set E bit
wim 37:ce348c002929 3107 }
wim 37:ce348c002929 3108 else {
wim 38:cbe275b0b647 3109 _lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim 37:ce348c002929 3110 }
wim 37:ce348c002929 3111 }
wim 37:ce348c002929 3112 else {
wim 37:ce348c002929 3113 if (value) {
wim 38:cbe275b0b647 3114 _lcd_bus |= LCD_BUS_SPI_E2; // Set E2 bit
wim 37:ce348c002929 3115 }
wim 37:ce348c002929 3116 else {
wim 38:cbe275b0b647 3117 _lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim 37:ce348c002929 3118 }
wim 37:ce348c002929 3119 }
wim 37:ce348c002929 3120
wim 37:ce348c002929 3121 // write the new data to the SPI portexpander
wim 37:ce348c002929 3122 _cs = 0;
wim 37:ce348c002929 3123 _spi->write(_lcd_bus);
wim 37:ce348c002929 3124 _cs = 1;
wim 37:ce348c002929 3125 }
wim 37:ce348c002929 3126
wim 37:ce348c002929 3127 // Set RS pin
wim 37:ce348c002929 3128 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3129 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3130
wim 37:ce348c002929 3131 if (value) {
wim 38:cbe275b0b647 3132 _lcd_bus |= LCD_BUS_SPI_RS; // Set RS bit
wim 37:ce348c002929 3133 }
wim 37:ce348c002929 3134 else {
wim 38:cbe275b0b647 3135 _lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim 37:ce348c002929 3136 }
wim 37:ce348c002929 3137
wim 37:ce348c002929 3138 // write the new data to the SPI portexpander
wim 37:ce348c002929 3139 _cs = 0;
wim 37:ce348c002929 3140 _spi->write(_lcd_bus);
wim 37:ce348c002929 3141 _cs = 1;
wim 37:ce348c002929 3142 }
wim 37:ce348c002929 3143
wim 37:ce348c002929 3144 // Set BL pin
wim 37:ce348c002929 3145 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3146 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3147
wim 37:ce348c002929 3148 if (value) {
wim 38:cbe275b0b647 3149 _lcd_bus |= LCD_BUS_SPI_BL; // Set BL bit
wim 37:ce348c002929 3150 }
wim 37:ce348c002929 3151 else {
wim 38:cbe275b0b647 3152 _lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim 37:ce348c002929 3153 }
wim 37:ce348c002929 3154
wim 37:ce348c002929 3155 // write the new data to the SPI portexpander
wim 37:ce348c002929 3156 _cs = 0;
wim 37:ce348c002929 3157 _spi->write(_lcd_bus);
wim 37:ce348c002929 3158 _cs = 1;
wim 37:ce348c002929 3159 }
wim 21:9eb628d9e164 3160
wim 21:9eb628d9e164 3161 // Place the 4bit data on the databus
wim 37:ce348c002929 3162 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3163 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3164
wim 22:35742ec80c24 3165 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3166 if (value & 0x01) {
wim 38:cbe275b0b647 3167 _lcd_bus |= LCD_BUS_SPI_D4; // Set Databit
wim 26:bd897a001012 3168 }
wim 37:ce348c002929 3169 else {
wim 38:cbe275b0b647 3170 _lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim 37:ce348c002929 3171 }
wim 37:ce348c002929 3172
wim 37:ce348c002929 3173 if (value & 0x02) {
wim 38:cbe275b0b647 3174 _lcd_bus |= LCD_BUS_SPI_D5; // Set Databit
wim 26:bd897a001012 3175 }
wim 26:bd897a001012 3176 else {
wim 38:cbe275b0b647 3177 _lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim 37:ce348c002929 3178 }
wim 37:ce348c002929 3179
wim 37:ce348c002929 3180 if (value & 0x04) {
wim 38:cbe275b0b647 3181 _lcd_bus |= LCD_BUS_SPI_D6; // Set Databit
wim 26:bd897a001012 3182 }
wim 37:ce348c002929 3183 else {
wim 38:cbe275b0b647 3184 _lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim 37:ce348c002929 3185 }
wim 37:ce348c002929 3186
wim 37:ce348c002929 3187 if (value & 0x08) {
wim 38:cbe275b0b647 3188 _lcd_bus |= LCD_BUS_SPI_D7; // Set Databit
wim 26:bd897a001012 3189 }
wim 26:bd897a001012 3190 else {
wim 38:cbe275b0b647 3191 _lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim 26:bd897a001012 3192 }
wim 21:9eb628d9e164 3193
wim 37:ce348c002929 3194 // write the new data to the SPI portexpander
wim 37:ce348c002929 3195 _cs = 0;
wim 37:ce348c002929 3196 _spi->write(_lcd_bus);
wim 37:ce348c002929 3197 _cs = 1;
wim 22:35742ec80c24 3198 }
wim 21:9eb628d9e164 3199
wim 37:ce348c002929 3200 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3201 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3202
wim 21:9eb628d9e164 3203
wim 28:30fa94f7341c 3204 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3205 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3206
wim 28:30fa94f7341c 3207 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3208 *
wim 28:30fa94f7341c 3209 * @param i2c I2C Bus
wim 28:30fa94f7341c 3210 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3211 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3212 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3213 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3214 */
wim 28:30fa94f7341c 3215 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3216 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3217
wim 33:900a94bc7585 3218 _i2c(i2c){
wim 30:033048611c01 3219
wim 28:30fa94f7341c 3220 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3221
wim 28:30fa94f7341c 3222 // Setup the I2C bus
wim 29:a3663151aa65 3223 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3224 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3225
wim 30:033048611c01 3226
wim 28:30fa94f7341c 3227 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3228 if (bl != NC) {
wim 28:30fa94f7341c 3229 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3230 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3231 }
wim 28:30fa94f7341c 3232 else {
wim 28:30fa94f7341c 3233 // No Hardware Backlight pin
wim 28:30fa94f7341c 3234 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3235 }
wim 28:30fa94f7341c 3236
wim 30:033048611c01 3237 //Sanity check
wim 30:033048611c01 3238 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3239 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3240 }
wim 30:033048611c01 3241 else {
wim 30:033048611c01 3242 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3243 }
wim 28:30fa94f7341c 3244 }
wim 28:30fa94f7341c 3245
wim 28:30fa94f7341c 3246 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3247 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3248 }
wim 28:30fa94f7341c 3249
wim 28:30fa94f7341c 3250 // Not used in this mode
wim 28:30fa94f7341c 3251 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3252 }
wim 28:30fa94f7341c 3253
wim 28:30fa94f7341c 3254 // Set RS pin
wim 28:30fa94f7341c 3255 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3256 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3257 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3258 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3259 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3260 //
wim 30:033048611c01 3261 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3262 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3263 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3264 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3265 //
wim 30:033048611c01 3266
wim 28:30fa94f7341c 3267 if (value) {
wim 28:30fa94f7341c 3268 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3269 }
wim 28:30fa94f7341c 3270 else {
wim 28:30fa94f7341c 3271 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3272 }
wim 28:30fa94f7341c 3273 }
wim 28:30fa94f7341c 3274
wim 28:30fa94f7341c 3275 // Set BL pin
wim 28:30fa94f7341c 3276 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3277 if (_bl) {
wim 28:30fa94f7341c 3278 _bl->write(value);
wim 28:30fa94f7341c 3279 }
wim 28:30fa94f7341c 3280 }
wim 29:a3663151aa65 3281
wim 29:a3663151aa65 3282 // Not used in this mode
wim 29:a3663151aa65 3283 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3284 }
wim 29:a3663151aa65 3285
wim 28:30fa94f7341c 3286 // Write a byte using I2C
wim 28:30fa94f7341c 3287 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3288 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3289 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3290 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3291 //
wim 30:033048611c01 3292 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3293 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3294 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3295 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3296 //
wim 28:30fa94f7341c 3297 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3298
wim 32:59c4b8f648d4 3299 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3300 //Controllers that support ACK
wim 30:033048611c01 3301 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3302 #else
wim 32:59c4b8f648d4 3303 //Controllers that dont support ACK
wim 37:ce348c002929 3304 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3305 _i2c->start();
wim 32:59c4b8f648d4 3306 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3307 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3308 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3309 _i2c->stop();
wim 32:59c4b8f648d4 3310 #endif
wim 28:30fa94f7341c 3311 }
wim 34:e5a0dcb43ecc 3312 #endif /* Native I2C */
wim 28:30fa94f7341c 3313 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3314
wim 28:30fa94f7341c 3315
wim 25:6162b31128c9 3316 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3317 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3318 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3319 *
Sissors 24:fb3399713710 3320 * @param spi SPI Bus
Sissors 24:fb3399713710 3321 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3322 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3323 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3324 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3325 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3326 */
wim 25:6162b31128c9 3327 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3328 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3329 _spi(spi),
wim 25:6162b31128c9 3330 _cs(cs),
wim 25:6162b31128c9 3331 _rs(rs) {
Sissors 24:fb3399713710 3332
wim 32:59c4b8f648d4 3333 // Init CS
wim 32:59c4b8f648d4 3334 _cs = 1;
wim 32:59c4b8f648d4 3335
wim 36:9f5f86dfd44a 3336 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3337 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3338 // _spi->format(8,3);
wim 37:ce348c002929 3339 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3340 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3341
Sissors 24:fb3399713710 3342 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3343 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3344 _spi->format(8,0);
wim 36:9f5f86dfd44a 3345 // _spi->frequency(500000);
Sissors 24:fb3399713710 3346 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3347
Sissors 24:fb3399713710 3348 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3349 if (bl != NC) {
Sissors 24:fb3399713710 3350 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3351 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3352 }
Sissors 24:fb3399713710 3353 else {
Sissors 24:fb3399713710 3354 // No Hardware Backlight pin
Sissors 24:fb3399713710 3355 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3356 }
wim 30:033048611c01 3357
wim 30:033048611c01 3358 //Sanity check
wim 30:033048611c01 3359 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3360 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3361 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3362 }
wim 30:033048611c01 3363 else {
wim 30:033048611c01 3364 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3365 }
Sissors 24:fb3399713710 3366 }
Sissors 24:fb3399713710 3367
wim 25:6162b31128c9 3368 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3369 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3370 }
Sissors 24:fb3399713710 3371
Sissors 24:fb3399713710 3372 // Not used in this mode
wim 25:6162b31128c9 3373 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3374 }
Sissors 24:fb3399713710 3375
Sissors 24:fb3399713710 3376 // Set RS pin
wim 36:9f5f86dfd44a 3377 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3378 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3379 _rs = value;
Sissors 24:fb3399713710 3380 }
Sissors 24:fb3399713710 3381
Sissors 24:fb3399713710 3382 // Set BL pin
wim 25:6162b31128c9 3383 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3384 if (_bl) {
Sissors 24:fb3399713710 3385 _bl->write(value);
wim 26:bd897a001012 3386 }
Sissors 24:fb3399713710 3387 }
Sissors 24:fb3399713710 3388
wim 29:a3663151aa65 3389 // Not used in this mode
wim 29:a3663151aa65 3390 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3391 }
wim 29:a3663151aa65 3392
Sissors 24:fb3399713710 3393 // Write a byte using SPI
wim 25:6162b31128c9 3394 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3395 _cs = 0;
Sissors 24:fb3399713710 3396 wait_us(1);
Sissors 24:fb3399713710 3397 _spi->write(value);
Sissors 24:fb3399713710 3398 wait_us(1);
Sissors 24:fb3399713710 3399 _cs = 1;
Sissors 24:fb3399713710 3400 }
wim 34:e5a0dcb43ecc 3401 #endif /* Native SPI bus */
wim 25:6162b31128c9 3402 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3403
wim 21:9eb628d9e164 3404
wim 36:9f5f86dfd44a 3405 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3406 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3407
wim 36:9f5f86dfd44a 3408 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3409 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3410 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3411 *
wim 36:9f5f86dfd44a 3412 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3413 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3414 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3415 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3416 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3417 */
wim 36:9f5f86dfd44a 3418 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3419 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3420 _spi(spi),
wim 36:9f5f86dfd44a 3421 _cs(cs) {
wim 36:9f5f86dfd44a 3422
wim 36:9f5f86dfd44a 3423 // Init CS
wim 36:9f5f86dfd44a 3424 _cs = 1;
wim 36:9f5f86dfd44a 3425
wim 36:9f5f86dfd44a 3426 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3427 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3428 // _spi->format(8,3);
wim 37:ce348c002929 3429 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3430 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3431
wim 36:9f5f86dfd44a 3432 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3433 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3434 _spi->format(8,0);
wim 36:9f5f86dfd44a 3435 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3436 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3437
wim 36:9f5f86dfd44a 3438
wim 36:9f5f86dfd44a 3439 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3440 if (bl != NC) {
wim 36:9f5f86dfd44a 3441 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3442 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3443 }
wim 36:9f5f86dfd44a 3444 else {
wim 36:9f5f86dfd44a 3445 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3446 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3447 }
wim 36:9f5f86dfd44a 3448
wim 36:9f5f86dfd44a 3449 //Sanity check
wim 36:9f5f86dfd44a 3450 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3451 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3452 }
wim 36:9f5f86dfd44a 3453 else {
wim 36:9f5f86dfd44a 3454 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3455 }
wim 36:9f5f86dfd44a 3456 }
wim 36:9f5f86dfd44a 3457
wim 36:9f5f86dfd44a 3458 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3459 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3460 }
wim 36:9f5f86dfd44a 3461
wim 36:9f5f86dfd44a 3462 // Not used in this mode
wim 36:9f5f86dfd44a 3463 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3464 }
wim 36:9f5f86dfd44a 3465
wim 36:9f5f86dfd44a 3466 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3467 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3468 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3469
wim 36:9f5f86dfd44a 3470 if (value) {
wim 36:9f5f86dfd44a 3471 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3472 }
wim 36:9f5f86dfd44a 3473 else {
wim 36:9f5f86dfd44a 3474 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3475 }
wim 36:9f5f86dfd44a 3476 }
wim 36:9f5f86dfd44a 3477
wim 36:9f5f86dfd44a 3478 // Set BL pin
wim 36:9f5f86dfd44a 3479 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3480 if (_bl) {
wim 36:9f5f86dfd44a 3481 _bl->write(value);
wim 36:9f5f86dfd44a 3482 }
wim 36:9f5f86dfd44a 3483 }
wim 36:9f5f86dfd44a 3484
wim 36:9f5f86dfd44a 3485 // Not used in this mode
wim 36:9f5f86dfd44a 3486 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3487 }
wim 36:9f5f86dfd44a 3488
wim 36:9f5f86dfd44a 3489 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3490 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3491
wim 36:9f5f86dfd44a 3492 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3493 _cs = 0;
wim 36:9f5f86dfd44a 3494 wait_us(1);
wim 36:9f5f86dfd44a 3495 _spi->write(value);
wim 36:9f5f86dfd44a 3496 wait_us(1);
wim 36:9f5f86dfd44a 3497 _cs = 1;
wim 36:9f5f86dfd44a 3498 }
wim 36:9f5f86dfd44a 3499 else { // Byte is data
wim 36:9f5f86dfd44a 3500 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3501 _cs = 0;
wim 36:9f5f86dfd44a 3502 wait_us(1);
wim 36:9f5f86dfd44a 3503 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3504 wait_us(1);
wim 36:9f5f86dfd44a 3505 _cs = 1;
wim 36:9f5f86dfd44a 3506
wim 36:9f5f86dfd44a 3507 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3508
wim 36:9f5f86dfd44a 3509 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3510 _cs = 0;
wim 36:9f5f86dfd44a 3511 wait_us(1);
wim 36:9f5f86dfd44a 3512 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3513 wait_us(1);
wim 36:9f5f86dfd44a 3514 _cs = 1;
wim 36:9f5f86dfd44a 3515
wim 36:9f5f86dfd44a 3516 wait_us(40);
wim 36:9f5f86dfd44a 3517
wim 36:9f5f86dfd44a 3518 // Write 1 databyte
wim 36:9f5f86dfd44a 3519 _cs = 0;
wim 36:9f5f86dfd44a 3520 wait_us(1);
wim 36:9f5f86dfd44a 3521 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3522 wait_us(1);
wim 36:9f5f86dfd44a 3523 _cs = 1;
wim 36:9f5f86dfd44a 3524
wim 36:9f5f86dfd44a 3525 wait_us(40);
wim 36:9f5f86dfd44a 3526
wim 36:9f5f86dfd44a 3527 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3528 _cs = 0;
wim 36:9f5f86dfd44a 3529 wait_us(1);
wim 36:9f5f86dfd44a 3530 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3531 wait_us(1);
wim 36:9f5f86dfd44a 3532 _cs = 1;
wim 36:9f5f86dfd44a 3533 }
wim 36:9f5f86dfd44a 3534 }
wim 36:9f5f86dfd44a 3535 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3536 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3537
wim 36:9f5f86dfd44a 3538
wim 30:033048611c01 3539 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3540 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3541 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3542
wim 30:033048611c01 3543 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3544 *
wim 30:033048611c01 3545 * @param spi SPI Bus
wim 30:033048611c01 3546 * @param cs chip select pin (active low)
wim 30:033048611c01 3547 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3548 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3549 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3550 */
wim 30:033048611c01 3551 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3552 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3553 _spi(spi),
wim 33:900a94bc7585 3554 _cs(cs) {
wim 32:59c4b8f648d4 3555
wim 32:59c4b8f648d4 3556 // Init CS
wim 32:59c4b8f648d4 3557 _cs = 1;
wim 32:59c4b8f648d4 3558
wim 34:e5a0dcb43ecc 3559 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 3560 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3561 _spi->format(9,3);
wim 30:033048611c01 3562 _spi->frequency(1000000);
wim 30:033048611c01 3563
wim 30:033048611c01 3564 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3565 if (bl != NC) {
wim 30:033048611c01 3566 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3567 _bl->write(0); //Deactivate
wim 30:033048611c01 3568 }
wim 30:033048611c01 3569 else {
wim 30:033048611c01 3570 // No Hardware Backlight pin
wim 30:033048611c01 3571 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3572 }
wim 30:033048611c01 3573
wim 30:033048611c01 3574 //Sanity check
wim 36:9f5f86dfd44a 3575 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 3576 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3577 }
wim 30:033048611c01 3578 else {
wim 30:033048611c01 3579 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 3580 }
wim 30:033048611c01 3581 }
wim 30:033048611c01 3582
wim 30:033048611c01 3583 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 3584 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3585 }
wim 30:033048611c01 3586
wim 30:033048611c01 3587 // Not used in this mode
wim 30:033048611c01 3588 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 3589 }
wim 30:033048611c01 3590
wim 30:033048611c01 3591 // Set RS pin
wim 30:033048611c01 3592 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3593 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 3594 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3595 // b8 b7...........b0
wim 30:033048611c01 3596 // RS command or data
wim 30:033048611c01 3597 //
wim 30:033048611c01 3598 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3599 //
wim 30:033048611c01 3600
wim 30:033048611c01 3601 if (value) {
wim 30:033048611c01 3602 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 3603 }
wim 30:033048611c01 3604 else {
wim 30:033048611c01 3605 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3606 }
wim 30:033048611c01 3607 }
wim 30:033048611c01 3608
wim 30:033048611c01 3609 // Set BL pin
wim 30:033048611c01 3610 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 3611 if (_bl) {
wim 30:033048611c01 3612 _bl->write(value);
wim 30:033048611c01 3613 }
wim 30:033048611c01 3614 }
wim 30:033048611c01 3615
wim 30:033048611c01 3616 // Not used in this mode
wim 30:033048611c01 3617 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 3618 }
wim 30:033048611c01 3619
wim 30:033048611c01 3620 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 3621 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 3622 _cs = 0;
wim 30:033048611c01 3623 wait_us(1);
wim 30:033048611c01 3624 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3625 wait_us(1);
wim 30:033048611c01 3626 _cs = 1;
wim 30:033048611c01 3627 }
wim 34:e5a0dcb43ecc 3628 #endif /* Native SPI bus */
wim 30:033048611c01 3629 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 3630
wim 34:e5a0dcb43ecc 3631
wim 30:033048611c01 3632 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 3633 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 3634
wim 30:033048611c01 3635 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 3636 *
wim 30:033048611c01 3637 * @param spi SPI Bus
wim 30:033048611c01 3638 * @param cs chip select pin (active low)
wim 30:033048611c01 3639 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3640 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3641 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3642 */
wim 30:033048611c01 3643 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3644 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3645 _spi(spi),
wim 30:033048611c01 3646 _cs(cs) {
wim 30:033048611c01 3647
wim 32:59c4b8f648d4 3648 // Init CS
wim 32:59c4b8f648d4 3649 _cs = 1;
wim 32:59c4b8f648d4 3650
wim 30:033048611c01 3651 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 3652 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 3653 _spi->format(10,0);
wim 30:033048611c01 3654 _spi->frequency(1000000);
wim 30:033048611c01 3655
wim 30:033048611c01 3656 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3657 if (bl != NC) {
wim 30:033048611c01 3658 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3659 _bl->write(0); //Deactivate
wim 30:033048611c01 3660 }
wim 30:033048611c01 3661 else {
wim 30:033048611c01 3662 // No Hardware Backlight pin
wim 30:033048611c01 3663 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3664 }
wim 30:033048611c01 3665
wim 30:033048611c01 3666 //Sanity check
wim 30:033048611c01 3667 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 3668 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3669 }
wim 30:033048611c01 3670 else {
wim 30:033048611c01 3671 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 3672 }
wim 30:033048611c01 3673 }
wim 30:033048611c01 3674
wim 30:033048611c01 3675 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 3676 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3677 }
wim 30:033048611c01 3678
wim 30:033048611c01 3679 // Not used in this mode
wim 30:033048611c01 3680 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 3681 }
wim 30:033048611c01 3682
wim 30:033048611c01 3683 // Set RS pin
wim 30:033048611c01 3684 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3685 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 3686 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3687 // b9 b8 b7...........b0
wim 30:033048611c01 3688 // RS RW command or data
wim 30:033048611c01 3689 //
wim 30:033048611c01 3690 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3691 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 3692 //
wim 30:033048611c01 3693
wim 30:033048611c01 3694 if (value) {
wim 30:033048611c01 3695 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 3696 }
wim 30:033048611c01 3697 else {
wim 30:033048611c01 3698 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3699 }
wim 30:033048611c01 3700 }
wim 30:033048611c01 3701
wim 30:033048611c01 3702 // Set BL pin
wim 30:033048611c01 3703 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 3704 if (_bl) {
wim 30:033048611c01 3705 _bl->write(value);
wim 30:033048611c01 3706 }
wim 30:033048611c01 3707 }
wim 30:033048611c01 3708
wim 30:033048611c01 3709 // Not used in this mode
wim 30:033048611c01 3710 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 3711 }
wim 30:033048611c01 3712
wim 30:033048611c01 3713 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 3714 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 3715 _cs = 0;
wim 30:033048611c01 3716 wait_us(1);
wim 30:033048611c01 3717 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3718 wait_us(1);
wim 30:033048611c01 3719 _cs = 1;
wim 30:033048611c01 3720 }
wim 34:e5a0dcb43ecc 3721 #endif /* Native SPI bus */
wim 30:033048611c01 3722 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 3723
wim 32:59c4b8f648d4 3724
wim 32:59c4b8f648d4 3725 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 3726 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3727
wim 32:59c4b8f648d4 3728 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 3729 *
wim 32:59c4b8f648d4 3730 * @param spi SPI Bus
wim 32:59c4b8f648d4 3731 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3732 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3733 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3734 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 3735 */
wim 32:59c4b8f648d4 3736 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3737 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3738 _spi(spi),
wim 32:59c4b8f648d4 3739 _cs(cs) {
wim 32:59c4b8f648d4 3740
wim 32:59c4b8f648d4 3741 // Init CS
wim 32:59c4b8f648d4 3742 _cs = 1;
wim 32:59c4b8f648d4 3743
wim 32:59c4b8f648d4 3744 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 3745 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3746 _spi->format(8,0);
wim 32:59c4b8f648d4 3747 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3748
wim 32:59c4b8f648d4 3749 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3750 if (bl != NC) {
wim 32:59c4b8f648d4 3751 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3752 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3753 }
wim 32:59c4b8f648d4 3754 else {
wim 32:59c4b8f648d4 3755 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3756 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3757 }
wim 32:59c4b8f648d4 3758
wim 32:59c4b8f648d4 3759 //Sanity check
wim 32:59c4b8f648d4 3760 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 3761 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3762 }
wim 32:59c4b8f648d4 3763 else {
wim 32:59c4b8f648d4 3764 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 3765 }
wim 32:59c4b8f648d4 3766 }
wim 32:59c4b8f648d4 3767
wim 32:59c4b8f648d4 3768 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 3769 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3770 }
wim 32:59c4b8f648d4 3771
wim 32:59c4b8f648d4 3772 // Not used in this mode
wim 32:59c4b8f648d4 3773 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 3774 }
wim 32:59c4b8f648d4 3775
wim 32:59c4b8f648d4 3776 // Set RS pin
wim 32:59c4b8f648d4 3777 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3778 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 3779 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 3780 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3781 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3782 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 3783 //
wim 32:59c4b8f648d4 3784 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3785 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3786 //
wim 32:59c4b8f648d4 3787
wim 32:59c4b8f648d4 3788 if (value) {
wim 32:59c4b8f648d4 3789 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3790 }
wim 32:59c4b8f648d4 3791 else {
wim 32:59c4b8f648d4 3792 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 3793 }
wim 32:59c4b8f648d4 3794 }
wim 32:59c4b8f648d4 3795
wim 32:59c4b8f648d4 3796 // Set BL pin
wim 32:59c4b8f648d4 3797 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 3798 if (_bl) {
wim 32:59c4b8f648d4 3799 _bl->write(value);
wim 32:59c4b8f648d4 3800 }
wim 32:59c4b8f648d4 3801 }
wim 32:59c4b8f648d4 3802
wim 32:59c4b8f648d4 3803 // Not used in this mode
wim 32:59c4b8f648d4 3804 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 3805 }
wim 34:e5a0dcb43ecc 3806
wim 32:59c4b8f648d4 3807 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 3808 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 3809 _cs = 0;
wim 32:59c4b8f648d4 3810 wait_us(1);
wim 32:59c4b8f648d4 3811
wim 32:59c4b8f648d4 3812 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3813
wim 32:59c4b8f648d4 3814 _spi->write(value);
wim 32:59c4b8f648d4 3815
wim 32:59c4b8f648d4 3816 wait_us(1);
wim 32:59c4b8f648d4 3817 _cs = 1;
wim 32:59c4b8f648d4 3818 }
wim 34:e5a0dcb43ecc 3819 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3820 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 3821
wim 34:e5a0dcb43ecc 3822
wim 32:59c4b8f648d4 3823 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 3824 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3825
wim 32:59c4b8f648d4 3826 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 3827 *
wim 32:59c4b8f648d4 3828 * @param spi SPI Bus
wim 32:59c4b8f648d4 3829 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3830 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3831 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3832 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 3833 */
wim 32:59c4b8f648d4 3834 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3835 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3836 _spi(spi),
wim 32:59c4b8f648d4 3837 _cs(cs) {
wim 32:59c4b8f648d4 3838
wim 32:59c4b8f648d4 3839 // Init CS
wim 32:59c4b8f648d4 3840 _cs = 1;
wim 32:59c4b8f648d4 3841
wim 34:e5a0dcb43ecc 3842 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 3843 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 3844 _spi->format(8,3);
wim 32:59c4b8f648d4 3845 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3846
wim 32:59c4b8f648d4 3847 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3848 if (bl != NC) {
wim 32:59c4b8f648d4 3849 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3850 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3851 }
wim 32:59c4b8f648d4 3852 else {
wim 32:59c4b8f648d4 3853 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3854 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3855 }
wim 32:59c4b8f648d4 3856
wim 32:59c4b8f648d4 3857 //Sanity check
wim 32:59c4b8f648d4 3858 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 3859 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3860 }
wim 32:59c4b8f648d4 3861 else {
wim 32:59c4b8f648d4 3862 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 3863 }
wim 32:59c4b8f648d4 3864 }
wim 32:59c4b8f648d4 3865
wim 32:59c4b8f648d4 3866 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 3867 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3868 }
wim 32:59c4b8f648d4 3869
wim 32:59c4b8f648d4 3870 // Not used in this mode
wim 32:59c4b8f648d4 3871 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 3872 }
wim 32:59c4b8f648d4 3873
wim 32:59c4b8f648d4 3874 // Set RS pin
wim 32:59c4b8f648d4 3875 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3876 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 3877 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 3878 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3879 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3880 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 3881 //
wim 32:59c4b8f648d4 3882 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3883 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3884 //
wim 32:59c4b8f648d4 3885 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 3886
wim 32:59c4b8f648d4 3887 if (value) {
wim 32:59c4b8f648d4 3888 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3889 }
wim 32:59c4b8f648d4 3890 else {
wim 32:59c4b8f648d4 3891 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 3892 }
wim 32:59c4b8f648d4 3893 }
wim 32:59c4b8f648d4 3894
wim 32:59c4b8f648d4 3895 // Set BL pin
wim 32:59c4b8f648d4 3896 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 3897 if (_bl) {
wim 32:59c4b8f648d4 3898 _bl->write(value);
wim 32:59c4b8f648d4 3899 }
wim 32:59c4b8f648d4 3900 }
wim 32:59c4b8f648d4 3901
wim 32:59c4b8f648d4 3902 // Not used in this mode
wim 32:59c4b8f648d4 3903 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 3904 }
wim 32:59c4b8f648d4 3905
wim 32:59c4b8f648d4 3906 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 3907 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 3908
wim 32:59c4b8f648d4 3909 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 3910 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 3911 _cs = 0;
wim 32:59c4b8f648d4 3912 wait_us(1);
wim 32:59c4b8f648d4 3913 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3914
wim 32:59c4b8f648d4 3915 //Map and send the LSB nibble
wim 32:59c4b8f648d4 3916 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 3917
wim 32:59c4b8f648d4 3918 //Map and send the MSB nibble
wim 32:59c4b8f648d4 3919 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 3920
wim 32:59c4b8f648d4 3921 wait_us(1);
wim 32:59c4b8f648d4 3922 _cs = 1;
wim 32:59c4b8f648d4 3923 }
wim 34:e5a0dcb43ecc 3924 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3925 //------- End TextLCD_SPI_N_3_24 ----------