File content as of revision 1:ccc66fdf858d:

#include "defs.h"
#include "log.h"

#define CS_BIT_MASK_0 1 << 6 //pin 0.6

void SpiInit(void)
{   
    //Configure
    LPC_SSP1->CR0 |= 7 << 0; //3:0 8 bit transfer
    LPC_SSP1->CR0 |= 0 << 4; //5:4 SPI
    LPC_SSP1->CR0 |= 0 << 6; //7:6 Mode 0
    LPC_SSP1->CR0 |= 0 << 8; //divide by 1

    //Set prescaler bps = PCLK / PS ==> PS = PCLK / bps ==> PS = 96/16 = 6
    LPC_SSP1->CPSR = 6; //Bit 0 must be 0. 6 ==> 16 bps which is within the 20MHz allowed by the FRAM
    
    //Select the function of the ssel pin: P0.6
    LPC_PINCON->PINSEL0  &= ~0x3000;
    LPC_PINCON->PINSEL0  |=  0x0000; // table 80. 13:12 = 0b00 ==> GPIO
    LPC_PINCON->PINMODE0 &= ~0x3000; // table 88. 13:12 = 0b00 ==> enable pull-up resistor
    LPC_GPIO0->FIODIR |= CS_BIT_MASK_0; //Set the direction to 1 == output
    LPC_GPIO0->FIOSET  = CS_BIT_MASK_0; //Deselect the output == CS = 1
    
    //Select the function of the sck, miso and mosi pins: P0.7, P0.8 and P0.9
    LPC_PINCON->PINSEL0  &= ~0xFC000;
    LPC_PINCON->PINSEL0  |=  0xA8000; // table 80. 15:14, 17:16, 19:18 = 0b10
    LPC_PINCON->PINMODE0 &= ~0xFC000; // table 88. = 0b00 ==> enable pull-up resistor
    
    //Enable operation
    LPC_SSP1->CR1 |= 2; //Enable the SSP controller
}
void SpiChipSelect(int value)
{
    if (value) LPC_GPIO0->FIOSET = CS_BIT_MASK_0;
    else       LPC_GPIO0->FIOCLR = CS_BIT_MASK_0;
}
void SpiWrite(char byte)
{
    LPC_SSP1->DR = byte; //This loads the next frame in the TX FIFO
}
int  SpiBusy(void)
{
    return LPC_SSP1->SR & 0x10; //bit 4 is BSY. This bit is 0 if the SSPn controller is idle, or 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty.
}
char SpiRead(void)
{
    return LPC_SSP1->DR & 0xFF; //This reads the oldest frame in the RX FIFO
}
char SpiTransfer(char byte)
{
    SpiWrite(byte);
    while(SpiBusy()) /*spin until not busy, at 16 bits per us or 2 bytes per us should be only 48 operations*/;
    return SpiRead();
}