Central Heating controller using the real time clock, PHY module for internet, 1-wire interface for temperature sensors, a system log and a configuration file
Dependencies: net 1-wire lpc1768 crypto clock web fram log
/media/uploads/andrewboyson/heating.sch
/media/uploads/andrewboyson/heating.brd
/media/uploads/andrewboyson/eagle.epf
main/spi.c@0:3c04f4b47041, 2018-01-11 (annotated)
- Committer:
- andrewboyson
- Date:
- Thu Jan 11 17:40:08 2018 +0000
- Revision:
- 0:3c04f4b47041
- Child:
- 1:ccc66fdf858d
Removed dependence on Mbed OS
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
andrewboyson | 0:3c04f4b47041 | 1 | #include "peripherals.h" |
andrewboyson | 0:3c04f4b47041 | 2 | #include "log.h" |
andrewboyson | 0:3c04f4b47041 | 3 | |
andrewboyson | 0:3c04f4b47041 | 4 | #define CS_BIT_MASK_0 1 << 6 //pin 0.6 |
andrewboyson | 0:3c04f4b47041 | 5 | |
andrewboyson | 0:3c04f4b47041 | 6 | void SpiInit(void) |
andrewboyson | 0:3c04f4b47041 | 7 | { |
andrewboyson | 0:3c04f4b47041 | 8 | //Enable power |
andrewboyson | 0:3c04f4b47041 | 9 | LPC_SC->PCONP |= 0x0400; //Table 46 Bit 10 is SSP1 |
andrewboyson | 0:3c04f4b47041 | 10 | |
andrewboyson | 0:3c04f4b47041 | 11 | //Configure |
andrewboyson | 0:3c04f4b47041 | 12 | LPC_SSP1->CR0 |= 7 << 0; //3:0 8 bit transfer |
andrewboyson | 0:3c04f4b47041 | 13 | LPC_SSP1->CR0 |= 0 << 4; //5:4 SPI |
andrewboyson | 0:3c04f4b47041 | 14 | LPC_SSP1->CR0 |= 0 << 6; //7:6 Mode 0 |
andrewboyson | 0:3c04f4b47041 | 15 | LPC_SSP1->CR0 |= 0 << 8; //divide by 1 |
andrewboyson | 0:3c04f4b47041 | 16 | |
andrewboyson | 0:3c04f4b47041 | 17 | //Set prescaler bps = PCLK / PS ==> PS = PCLK / bps ==> PS = 96/16 = 6 |
andrewboyson | 0:3c04f4b47041 | 18 | LPC_SSP1->CPSR = 6; //Bit 0 must be 0. 6 ==> 16 bps which is within the 20MHz allowed by the FRAM |
andrewboyson | 0:3c04f4b47041 | 19 | |
andrewboyson | 0:3c04f4b47041 | 20 | //Select the function of the ssel pin: P0.6 |
andrewboyson | 0:3c04f4b47041 | 21 | LPC_PINCON->PINSEL0 &= ~0x3000; |
andrewboyson | 0:3c04f4b47041 | 22 | LPC_PINCON->PINSEL0 |= 0x0000; // table 80. 13:12 = 0b00 ==> GPIO |
andrewboyson | 0:3c04f4b47041 | 23 | LPC_PINCON->PINMODE0 &= ~0x3000; // table 88. 13:12 = 0b00 ==> enable pull-up resistor |
andrewboyson | 0:3c04f4b47041 | 24 | LPC_GPIO0->FIODIR |= CS_BIT_MASK_0; //Set the direction to 1 == output |
andrewboyson | 0:3c04f4b47041 | 25 | LPC_GPIO0->FIOSET = CS_BIT_MASK_0; //Deselect the output == CS = 1 |
andrewboyson | 0:3c04f4b47041 | 26 | |
andrewboyson | 0:3c04f4b47041 | 27 | //Select the function of the sck, miso and mosi pins: P0.7, P0.8 and P0.9 |
andrewboyson | 0:3c04f4b47041 | 28 | LPC_PINCON->PINSEL0 &= ~0xFC000; |
andrewboyson | 0:3c04f4b47041 | 29 | LPC_PINCON->PINSEL0 |= 0xA8000; // table 80. 15:14, 17:16, 19:18 = 0b10 |
andrewboyson | 0:3c04f4b47041 | 30 | LPC_PINCON->PINMODE0 &= ~0xFC000; // table 88. = 0b00 ==> enable pull-up resistor |
andrewboyson | 0:3c04f4b47041 | 31 | |
andrewboyson | 0:3c04f4b47041 | 32 | //Enable operation |
andrewboyson | 0:3c04f4b47041 | 33 | LPC_SSP1->CR1 |= 2; //Enable the SSP controller |
andrewboyson | 0:3c04f4b47041 | 34 | } |
andrewboyson | 0:3c04f4b47041 | 35 | void SpiChipSelect(int value) |
andrewboyson | 0:3c04f4b47041 | 36 | { |
andrewboyson | 0:3c04f4b47041 | 37 | if (value) LPC_GPIO0->FIOSET = CS_BIT_MASK_0; |
andrewboyson | 0:3c04f4b47041 | 38 | else LPC_GPIO0->FIOCLR = CS_BIT_MASK_0; |
andrewboyson | 0:3c04f4b47041 | 39 | } |
andrewboyson | 0:3c04f4b47041 | 40 | void SpiWrite(char byte) |
andrewboyson | 0:3c04f4b47041 | 41 | { |
andrewboyson | 0:3c04f4b47041 | 42 | LPC_SSP1->DR = byte; //This loads the next frame in the TX FIFO |
andrewboyson | 0:3c04f4b47041 | 43 | } |
andrewboyson | 0:3c04f4b47041 | 44 | int SpiBusy(void) |
andrewboyson | 0:3c04f4b47041 | 45 | { |
andrewboyson | 0:3c04f4b47041 | 46 | return LPC_SSP1->SR & 0x10; //bit 4 is BSY. This bit is 0 if the SSPn controller is idle, or 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty. |
andrewboyson | 0:3c04f4b47041 | 47 | } |
andrewboyson | 0:3c04f4b47041 | 48 | char SpiRead(void) |
andrewboyson | 0:3c04f4b47041 | 49 | { |
andrewboyson | 0:3c04f4b47041 | 50 | return LPC_SSP1->DR & 0xFF; //This reads the oldest frame in the RX FIFO |
andrewboyson | 0:3c04f4b47041 | 51 | } |
andrewboyson | 0:3c04f4b47041 | 52 | char SpiTransfer(char byte) |
andrewboyson | 0:3c04f4b47041 | 53 | { |
andrewboyson | 0:3c04f4b47041 | 54 | SpiWrite(byte); |
andrewboyson | 0:3c04f4b47041 | 55 | while(SpiBusy()) /*spin until not busy, at 16 bits per us or 2 bytes per us should be only 48 operations*/; |
andrewboyson | 0:3c04f4b47041 | 56 | return SpiRead(); |
andrewboyson | 0:3c04f4b47041 | 57 | } |