A GPS disciplined clock

Dependencies:   net lpc1768 crypto clock web log

Committer:
andrewboyson
Date:
Tue Apr 23 18:46:55 2019 +0000
Revision:
53:9ec18325113a
Parent:
main/periphs.c@4:108157115360
Updated libraries

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andrewboyson 4:108157115360 1 #define PCONP (*((volatile unsigned *) 0x400FC0C4))
andrewboyson 4:108157115360 2 #define PCLKSEL0 (*((volatile unsigned *) 0x400FC1A8))
andrewboyson 4:108157115360 3 #define PCLKSEL1 (*((volatile unsigned *) 0x400FC1AC))
andrewboyson 4:108157115360 4 #define PINSEL0 (*((volatile unsigned *) 0x4002C000))
andrewboyson 4:108157115360 5 #define PINSEL1 (*((volatile unsigned *) 0x4002C004))
andrewboyson 4:108157115360 6 #define PINSEL2 (*((volatile unsigned *) 0x4002C008))
andrewboyson 4:108157115360 7 #define PINSEL3 (*((volatile unsigned *) 0x4002C00C))
andrewboyson 4:108157115360 8
andrewboyson 0:67724a462d86 9
andrewboyson 0:67724a462d86 10 void PeriphsInit (void)
andrewboyson 0:67724a462d86 11 {
andrewboyson 0:67724a462d86 12 //Peripheral power - Table 46
andrewboyson 4:108157115360 13 PCONP = 0;
andrewboyson 4:108157115360 14 PCONP |= 1 << 1; //TIMER0
andrewboyson 4:108157115360 15 PCONP |= 1 << 3; //UART0
andrewboyson 4:108157115360 16 PCONP |= 1 << 4; //UART1
andrewboyson 4:108157115360 17 PCONP |= 1 << 9; //RTC
andrewboyson 4:108157115360 18 PCONP |= 1 << 10; //SSP1
andrewboyson 4:108157115360 19 PCONP |= 1 << 15; //GPIO
andrewboyson 4:108157115360 20 PCONP |= 1 << 30; //ENET
andrewboyson 4:108157115360 21
andrewboyson 4:108157115360 22 //Peripheral clock must be selected before PLL0 enabling and connecting; default is 00 divide by 4; need 01 to have divide by 1
andrewboyson 4:108157115360 23 PCLKSEL0 = 0;
andrewboyson 4:108157115360 24 PCLKSEL0 |= 1 << 2; //TIM0
andrewboyson 4:108157115360 25 PCLKSEL0 |= 1 << 6; //UART0
andrewboyson 4:108157115360 26 PCLKSEL0 |= 1 << 8; //UART1
andrewboyson 4:108157115360 27 PCLKSEL0 |= 1 << 20; //SSP1
andrewboyson 0:67724a462d86 28
andrewboyson 4:108157115360 29 //Pin functions table 80.
andrewboyson 4:108157115360 30 PINSEL0 = 0;
andrewboyson 4:108157115360 31 PINSEL0 |= 1U << 4; //P0.02 01 TXD0 UART0
andrewboyson 4:108157115360 32 PINSEL0 |= 1U << 6; //P0.03 01 RXD0 UART0
andrewboyson 4:108157115360 33 PINSEL0 |= 2U << 14; //P0.07 10 SCK1 SSP1
andrewboyson 4:108157115360 34 PINSEL0 |= 2U << 16; //P0.08 10 MISO1 SSP1
andrewboyson 4:108157115360 35 PINSEL0 |= 2U << 18; //P0.09 10 MOSI1 SSP1
andrewboyson 4:108157115360 36 PINSEL0 |= 1U << 30; //P0.15 01 TXD1 UART1
andrewboyson 4:108157115360 37
andrewboyson 4:108157115360 38 PINSEL1 = 0;
andrewboyson 4:108157115360 39 PINSEL1 |= 1U << 0; //P0.16 01 RXD1 UART1
andrewboyson 4:108157115360 40
andrewboyson 4:108157115360 41 PINSEL2 = 0;
andrewboyson 4:108157115360 42 PINSEL2 |= 1U << 0; //P1.00 01 ENET_TXD0
andrewboyson 4:108157115360 43 PINSEL2 |= 1U << 2; //P1.01 01 ENET_TXD1
andrewboyson 4:108157115360 44 PINSEL2 |= 1U << 8; //P1.04 01 ENET_TX_EN
andrewboyson 4:108157115360 45 PINSEL2 |= 1U << 16; //P1.08 01 ENET_CRS
andrewboyson 4:108157115360 46 PINSEL2 |= 1U << 18; //P1.09 01 ENET_RXD0
andrewboyson 4:108157115360 47 PINSEL2 |= 1U << 20; //P1.10 01 ENET_RXD1
andrewboyson 4:108157115360 48 PINSEL2 |= 1U << 28; //P1.14 01 ENET_RX_ER
andrewboyson 4:108157115360 49 PINSEL2 |= 1U << 30; //P1.15 01 ENET_REF_CLK
andrewboyson 4:108157115360 50
andrewboyson 4:108157115360 51 PINSEL3 = 0;
andrewboyson 4:108157115360 52 PINSEL3 |= 1U << 0; //P1.16 01 ENET_MDC
andrewboyson 4:108157115360 53 PINSEL3 |= 1U << 2; //P1.17 01 ENET_MDIO
andrewboyson 0:67724a462d86 54 }