A GPS disciplined clock

Dependencies:   net lpc1768 crypto clock web log

Committer:
andrewboyson
Date:
Sun Feb 04 11:35:05 2018 +0000
Revision:
3:36ee2aa7945a
Parent:
0:67724a462d86
Child:
4:108157115360
Updated libraries

Who changed what in which revision?

UserRevisionLine numberNew contents of line
andrewboyson 0:67724a462d86 1 #include "defs.h"
andrewboyson 0:67724a462d86 2
andrewboyson 0:67724a462d86 3 void PeriphsInit (void)
andrewboyson 0:67724a462d86 4 {
andrewboyson 0:67724a462d86 5 //Peripheral power - Table 46
andrewboyson 0:67724a462d86 6 LPC_SC->PCONP = 0;
andrewboyson 0:67724a462d86 7 LPC_SC->PCONP |= 1 << 1; //TIMER0
andrewboyson 0:67724a462d86 8 LPC_SC->PCONP |= 1 << 3; //UART0
andrewboyson 0:67724a462d86 9 LPC_SC->PCONP |= 1 << 4; //UART1
andrewboyson 0:67724a462d86 10 LPC_SC->PCONP |= 1 << 9; //RTC
andrewboyson 0:67724a462d86 11 LPC_SC->PCONP |= 1 << 10; //SSP1
andrewboyson 0:67724a462d86 12 LPC_SC->PCONP |= 1 << 15; //GPIO
andrewboyson 0:67724a462d86 13 LPC_SC->PCONP |= 1 << 30; //ENET
andrewboyson 0:67724a462d86 14
andrewboyson 0:67724a462d86 15 //Peripheral clock must be selected before PLL0 enabling and connecting
andrewboyson 0:67724a462d86 16 //Default is 00 == divide by 4; need 01 to have divide by 1
andrewboyson 0:67724a462d86 17 LPC_SC->PCLKSEL0 = 0;
andrewboyson 0:67724a462d86 18 LPC_SC->PCLKSEL1 = 0;
andrewboyson 0:67724a462d86 19 LPC_SC->PCLKSEL0 |= 1 << 2; //TIM0
andrewboyson 0:67724a462d86 20 LPC_SC->PCLKSEL0 |= 1 << 6; //UART0
andrewboyson 0:67724a462d86 21 LPC_SC->PCLKSEL0 |= 1 << 8; //UART1
andrewboyson 0:67724a462d86 22 LPC_SC->PCLKSEL0 |= 1 << 20; //SSP1
andrewboyson 0:67724a462d86 23 }