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Dependents: oldheating gps motorhome heating
timer/timer.c@39:5b594b1b6a0a, 2018-12-03 (annotated)
- Committer:
- andrewboyson
- Date:
- Mon Dec 03 12:50:10 2018 +0000
- Revision:
- 39:5b594b1b6a0a
- Parent:
- 38:25b2a3c494aa
Minor changes to names in timer
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| andrewboyson | 24:6c9833e2a049 | 1 | #include <stdint.h> |
| andrewboyson | 26:0421132e6eaf | 2 | #include <stdbool.h> |
| andrewboyson | 24:6c9833e2a049 | 3 | |
| andrewboyson | 38:25b2a3c494aa | 4 | #include "timer.h" |
| andrewboyson | 24:6c9833e2a049 | 5 | |
| andrewboyson | 30:212ca42b8779 | 6 | #define TCR (*((volatile unsigned *) 0x40004004)) |
| andrewboyson | 30:212ca42b8779 | 7 | #define TC (*((volatile unsigned *) 0x40004008)) |
| andrewboyson | 30:212ca42b8779 | 8 | #define PR (*((volatile unsigned *) 0x4000400C)) |
| andrewboyson | 30:212ca42b8779 | 9 | #define MCR (*((volatile unsigned *) 0x40004014)) |
| andrewboyson | 30:212ca42b8779 | 10 | #define CTCR (*((volatile unsigned *) 0x40004070)) |
| andrewboyson | 30:212ca42b8779 | 11 | |
| andrewboyson | 39:5b594b1b6a0a | 12 | uint32_t TimerCount() |
| andrewboyson | 26:0421132e6eaf | 13 | { |
| andrewboyson | 30:212ca42b8779 | 14 | return TC; |
| andrewboyson | 24:6c9833e2a049 | 15 | } |
| andrewboyson | 39:5b594b1b6a0a | 16 | uint32_t TimerSinceRepetitive(uint32_t* pLastCount) |
| andrewboyson | 24:6c9833e2a049 | 17 | { |
| andrewboyson | 30:212ca42b8779 | 18 | uint32_t thisCount = TC; |
| andrewboyson | 24:6c9833e2a049 | 19 | uint32_t period = thisCount - *pLastCount; |
| andrewboyson | 24:6c9833e2a049 | 20 | *pLastCount = thisCount; |
| andrewboyson | 24:6c9833e2a049 | 21 | return period; |
| andrewboyson | 24:6c9833e2a049 | 22 | } |
| andrewboyson | 39:5b594b1b6a0a | 23 | uint32_t TimerSinceCount(uint32_t lastCount) |
| andrewboyson | 24:6c9833e2a049 | 24 | { |
| andrewboyson | 39:5b594b1b6a0a | 25 | return TC - lastCount; |
| andrewboyson | 24:6c9833e2a049 | 26 | } |
| andrewboyson | 39:5b594b1b6a0a | 27 | uint32_t TimerSinceMs(uint32_t lastCount) |
| andrewboyson | 24:6c9833e2a049 | 28 | { |
| andrewboyson | 39:5b594b1b6a0a | 29 | uint32_t count = TC - lastCount; |
| andrewboyson | 25:81014a201736 | 30 | return count / TIMER_COUNT_PER_MS; |
| andrewboyson | 24:6c9833e2a049 | 31 | } |
| andrewboyson | 26:0421132e6eaf | 32 | |
| andrewboyson | 39:5b594b1b6a0a | 33 | bool TimerRepetitiveTick(uint32_t* pLastCount, uint32_t interval) |
| andrewboyson | 26:0421132e6eaf | 34 | { |
| andrewboyson | 39:5b594b1b6a0a | 35 | if (TC - *pLastCount >= interval) //All unsigned wrap around arithmetic |
| andrewboyson | 33:b9e3c06e7dab | 36 | { |
| andrewboyson | 39:5b594b1b6a0a | 37 | *pLastCount += interval; |
| andrewboyson | 33:b9e3c06e7dab | 38 | return true; |
| andrewboyson | 33:b9e3c06e7dab | 39 | } |
| andrewboyson | 33:b9e3c06e7dab | 40 | return false; |
| andrewboyson | 26:0421132e6eaf | 41 | } |
| andrewboyson | 33:b9e3c06e7dab | 42 | |
| andrewboyson | 39:5b594b1b6a0a | 43 | int32_t TimerMultiplyFractionalPart(int32_t value, uint32_t countSinceLast, uint32_t interval) |
| andrewboyson | 26:0421132e6eaf | 44 | { |
| andrewboyson | 26:0421132e6eaf | 45 | int64_t fraction; |
| andrewboyson | 26:0421132e6eaf | 46 | |
| andrewboyson | 39:5b594b1b6a0a | 47 | fraction = countSinceLast; |
| andrewboyson | 26:0421132e6eaf | 48 | fraction <<= 32; |
| andrewboyson | 33:b9e3c06e7dab | 49 | fraction /= interval; |
| andrewboyson | 26:0421132e6eaf | 50 | |
| andrewboyson | 26:0421132e6eaf | 51 | return (value * fraction) >> 32; |
| andrewboyson | 26:0421132e6eaf | 52 | } |
| andrewboyson | 26:0421132e6eaf | 53 | |
| andrewboyson | 26:0421132e6eaf | 54 | void TimerInit() |
| andrewboyson | 26:0421132e6eaf | 55 | { |
| andrewboyson | 30:212ca42b8779 | 56 | TCR = 2; // 21.6.2 Timer Control Register - Reset TC and PC. |
| andrewboyson | 30:212ca42b8779 | 57 | CTCR = 0; // 21.6.3 Count Control Register - Timer mode |
| andrewboyson | 30:212ca42b8779 | 58 | PR = 0; // 21.6.5 Prescale register - Don't prescale 96MHz clock (divide by PR+1). |
| andrewboyson | 30:212ca42b8779 | 59 | MCR = 0; // 21.6.8 Match Control Register - no interrupt or reset |
| andrewboyson | 30:212ca42b8779 | 60 | TCR = 1; // 21.6.2 Timer Control Register - Enable TC and PC |
| andrewboyson | 26:0421132e6eaf | 61 | } |