Revision 40:7d3fa6b99b2b, committed 2017-10-10

Comitter:

theotherjimmy

Date:

Tue Oct 10 16:56:30 2017 -0500

Parent:

39:c98cb013e99f

Child:

41:2a77626a4c21

Commit message:

Update to tools release 5.6.1

Changed in this revision

--- a/arm_pack_manager/aliases.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/arm_pack_manager/aliases.json	Tue Oct 10 16:56:30 2017 -0500
@@ -1,1 +1,1 @@
-{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "NuTiny-SDK-M451": "M453VG6AE", "NuTiny-SDK-M0518": "M0518SD2AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "MCB11C14": "LPC11C14FBD48/301", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "NUCLEO-L152RE": "STM32L152RE", "TWR-KV10Z32": "MKV10Z32xxx7", "NuTiny-SDK-NUC029AE": "NUC029FAE", "FRDM-KW40Z": "MKW40Z160xxx4", "NuTiny-SDK-NM1200": "NM1200LBAE", "TWR-K70F120M": "MK70FN1M0xxx12", "STM32F769I-Discovery": "STM32F769NIHx", "TWR-KE18F": "MKE18F512xxx16", "MCBSTM32F400": "STM32F407IG", "LPCXpresso54608": "LPC54608J512BD208", "STM32F030-Discovery": "STM32F030R8", "Apollo EVK": "Apollo_512_BGA", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "MCB1313": "LPC1313FBD48", "NUCLEO-F446RE": "STM32F446RE", "V2M-MPS2": "CMSDK_CM7", "MCB54110": "LPC54114J256BD64", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EFM32GG-DK3750": "EFM32GG990F1024", "MCBSTM32F200": "STM32F207IG", "EVAL-ADuCM322EBZ": "ADuCM322", "FRDM-KL25Z": "MKL25Z128xxx4", "SN32F707B Starter Kit Rev1_0": "SN32F70*B", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "Z32F0640100KITG": "Z32F06410AES", "LPCXpresso54114": "LPC54114J256BD64", "Colibri-iMX7": "MCIMX7D", "ADuCM3029 EZ-BOARD": "ADuCM3029", "SAM3S-EK": "ATSAM3S4C", "SF2_DEV_KIT": "M2S050", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "FRDM-K28F": "MK28FN2M0xxx15", "TRK-KEA64": "SKEAZN64xxx2", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "XMC4700 Relax Kit": "XMC4700-F144x2048", "SAMG55-XPRO": "ATSAMG55J19", "NuTiny-SDK-NUC200": "NUC220VE3AN", "TWR-K60D100M": "MK60DN512xxx10", "FRDM-KE06Z": "MKE06Z128xxx4", "SF2_ADV_DEV_KIT": "M2S150", "NuTiny-SDK-NUC100": "NUC100VE3DN", "MCB1700": "LPC1758", "MCBTMPM360": "TMPM362F10FG", "FRDM-K20D50M": "MK20DX128xxx5", "STM32756G-EVAL": "STM32F756NGHx", "SAM4L-XPRO": "ATSAM4LC4C", "FRDM-KL43Z": "MKL43Z256xxx4", "nRF52 PCA10036": "nRF52832_xxAA", "TWR-KV11Z75M": "MKV11Z128xxx7", "LPCXpresso54102": "LPC54102J512BD64", "TWR-KM34Z50": "MKM34Z128xxx5", "STM32L-Discovery": "STM32L152RB", "XMC1100 Boot Kit": "XMC1100-T038x0064", "TWR-KV46F150M": "MKV46F256xxx16", "Koala EVM": "STM32F429II", "EFM32WG-STK3800": "EFM32WG990F256", "MCIMX7D-SABRE": "MCIMX7D", "TWR-K65F180M": "MK65FN2M0xxx18", "EB_TMPM369FDFG": "TMPM369FDFG", "TS-R-IN32M3-EC": "R-IN32M3-EC", "ADSP-CM403F EZ-Board": "ADSP-CM403BSWZ-CF", "TWR-KM34Z50MV3": "MKM34Z128Axxx5", "XMC4300 Relax Kit": "XMC4300-F100x256", "NUCLEO-F091RC": "STM32F091RC", "SAMV71-XULTRA": "ATSAMV71Q21", "EVAL-ADuCM320EBZ": "ADuCM320", "TWR-KL43Z48M": "MKL43Z256xxx4", "STM32373C-EVAL": "STM32F373VC", "STM32F746G-Discovery": "STM32F746NGHx", "NuTiny-SDK-Mini51X": "Mini54XZAE", "LinkIt 2523 development board": "MT2523x", "nRF52 PCA10040": "nRF52832_xxAA", "MCBSTM32C": "STM32F107VC", "FRDM-KL03Z": "MKL03Z32xxx4", "AC30M1464 MINI B/D": "AC30M1464", "IMX7-PHYBOARD-ZETA": "MCIMX7D", "SF2_EVAL_KIT": "M2S025", "AC33MA384A MINI B/D": "AC33MA384A", "SAML22-XPRO": "ATSAML22N18A", "XMC4800 Relax EtherCAT Kit": "XMC4800-F144x2048", "iMX7-Dual-COM": "MCIMX7D", "TRK-KEA128": "SKEAZ128xxx4", "SAM4S-EK": "SAM4S16C", "NuTiny-SDK-Mini51": "Mini54LDE", "TWR-K20D50M": "MK20DX128xxx5", "STM32F3-Discovery": "STM32F303VC", "LPCXpresso1125": "LPC1125JBD48/303", "STM32F4-Discovery": "STM32F407VG", "CMSIS_RTOS_Tutorial": "STM32F103RB", "SAM3X-EK": "ATSAM3X8H", "STM32303C-EVAL": "STM32F303VC", "SN32F760 Starter Kit Rev1_1": "SN32F76*", "Core103R_Board": "MM32x103", "ADSP-CM408F EZ-Board": "ADSP-CM408BSWZ-BF", "FRDM-KE04Z": "MKE04Z8xxx4", "NuTiny-SDK-NUC123": "NUC123SD4AN0", "TWR-K24F120M": "MK24FN256xxx12", "Apollo2 EVK": "Apollo2_1024_BGA", "LPC4330-Xplorer": "LPC4330", "MCBTMPM330": "TMPM330FDFG", "NUCLEO-L476RG": "STM32L476RG", "Bulb Board": "S6E1A12B0A", "MCB1800": "LPC1850", "EFM32GG-STK3700": "EFM32GG990F1024", "FRDM-KL02Z": "MKL02Z32xxx4", "AC33GA256 MINI B/D": "AC33GA256", "TS-R-IN32M3-CL": "R-IN32M3-CL", "STM32F334-Discovery": "STM32F334C8", "SAM3N-EK": "ATSAM3N4C", "AC33M8128/6128 MINI B/D": "AC33M8128", "SAM4S-XPRO": "ATSAM4SD32C", "STM32L053-Discovery": "STM32L053C8", "STM32F429I-Discovery": "STM32F429ZI", "XMC4500 CPU Board - General Purpose (CPU_45A)": "XMC4500-F144x1024", "NuTiny-SDK-NUC122": "NUC122SD2AN", "Z32F3840100KITG": "Z32F38412ALS", "SAML21-XPRO": "ATSAML21J18A", "LPC824 LPCXpresso": "LPC824M201JHI33", "FRDM-KW41Z": "MKW41Z512xxx4", "EFM32TG-STK3300": "EFM32TG840F32", "AC33M4064/3064 MINI B/D": "AC33M4064", "NUCLEO-F030R8": "STM32F030R8", "NuTiny-SDK-NUC131": "NUC131SD2AE", "STM32F769I-EVAL": "STM32F769NIHx", "SF2_STARTER_KIT": "M2S010", "nRF51 PCA20006": "nRF51822_xxaa", "TS-R-IN32M4-CL2": "R-IN32M4-CL2", "MCIMX6SX-SABRE": "MCIMX6X1", "SAM4C-EK": "ATSAM4C16C", "Apollo2 Surrey FPGA": "Apollo2_FPGA", "MCB1500": "LPC1549JBD100", "TWR-KW21D256": "MKW21D256xxx5", "STM32L476G-EVAL": "STM32L476ZG", "NuTiny-SDK-NUC029AN": "NUC029TAN", "STM32F051-Discovery": "STM32F051R8", "NUCLEO-L053R8": "STM32L053R8", "FRDM-K64F": "MK64FN1M0VLL12", "NuTiny-SDK-NUC240": "NUC240VE3AE", "DK-TM4C129x": "TM4C129XNCZAD", "NuTiny-SDK-Nano112": "NANO112VC2AN", "SAMD20-XPRO": "ATSAMD20J18", "TWR-KL28Z72M": "MKL28Z512xxx7", "SAM4E-EK": "SAM4E16C", "MCB1343": "LPC1343FBD48", "LinkIt 7687 development board": "MT7687F", "XMC4500 CPU Board - General Purpose (CPU_45B)": "XMC4500-E144x1024", "EVAL-ADuCM320iQSPZ": "ADuCM320i", "SN32F100 Starter Kit": "SN32F10*", "SAM3U-EK": "ATSAM3U4E", "ADSP-CM419F EZ-BOARD M0": "ADSP-CM419F-BCZ_M0", "FRDM-KL82Z": "MKL81Z128xxx7", "XMC1300 Boot Kit": "XMC1302-T038x0200", "LPC1788-32 Developers Kit": "LPC1788", "MCBTMPM395": "TMPM395FWAXBG", "STM32F072-Discovery": "STM32F072RB", "BMSKTOPASM369": "TMPM369FDFG", "uVision Simulator": "ARMCM0", "NuTiny-SDK-NANO100AN": "NANO100VD3AN", "SAMHA1G16A-XPRO": "ATSAMHA1G16A", "TWR-K20D72M": "MK20DX256xxx7", "nRF51 PCA10031": "nRF51422_xxAC", "EK-TM4C1294XL": "TM4C1294NCPDT", "NUCLEO-F401RE": "STM32F401RE", "SK-FM3-176PMC-ETHERNET": "MB9BFD18T", "LPC4088-32 Developers Kit": "LPC4088FET208", "NUCLEO-F072RB": "STM32F072RB", "TLE984x Eval.Board": "TLE9844QX", "XMC4500 Relax Lite Kit": "XMC4500-F100x1024", "SAME70-XPLD": "ATSAME70Q21", "LPCXpresso11U68": "LPC11U68JBD100", "XMC4400 CPU Board - General Purpose  (CPU_44A)": "XMC4400-F100x512", "NUCLEO-F103RB": "STM32F103RB", "EFM32ZG-STK3200": "EFM32ZG222F32", "MCBTWRK60": "MK60DN512xxx10", "MCB9B500": "MB9BF506R", "MCBSTM32E": "STM32F103ZG", "LPC812 LPCXpresso": "LPC812M101JDH20", "TWR-KL82Z72M": "MKL82Z128xxx7", "TS-R-IN32M3-CEC": "R-IN32M3-EC", "NuTiny-SDK-M0519": "M0519VE3AE", "TWR-K64F120M": "MK64FN1M0xxx12", "MCB4300": "LPC4350", "XMC4200 CPU Board - Actuator  (CPU_42A)": "XMC4200-F64x256", "EVAL-ADuCM360MKZ": "ADuCM360"}
\ No newline at end of file
+{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "Apollo1 EVB": "APOLLO512-KBR", "NuTiny-SDK-M451": "M453VG6AE", "NuTiny-SDK-M0518": "M0518SD2AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "Z32F0640100KITG": "Z32F06410AES", "SAMD51-XPRO": "ATSAMD51P20A", "NuTiny-SDK-NANO112": "NANO112VC2AN", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "STM32H743I-EVAL": "STM32H743XI", "NUCLEO-L152RE": "STM32L152RE", "TWR-KV10Z32": "MKV10Z32xxx7", "XMC4800 Automation Board": "XMC4800-E196x2048", "FRDM-KW40Z": "MKW40Z160xxx4", "NuTiny-SDK-NM1200": "NM1200LBAE", "TWR-K70F120M": "MK70FN1M0xxx12", "STM32F769I-Discovery": "STM32F769NIHx", "TWR-KE18F": "MKE18F512xxx16", "MCBSTM32F400": "STM32F407IG", "SAML21-XPRO": "ATSAML21J18A", "STM32F030-Discovery": "STM32F030R8", "SAMA5D2-XULT": "ATSAMA5D27", "Apollo EVK": "APOLLO512-KBR", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "MCB1700": "LPC1758", "V2M-MPS2": "CMSDK_CM7", "MCB54110": "LPC54114J256BD64", "LPC1788-32 Developers Kit": "LPC1788", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EFM32GG-DK3750": "EFM32GG990F1024", "Colibri-VF50": "MVF50NN15xxxx40", "MCBSTM32F200": "STM32F207IG", "EVAL-ADuCM322EBZ": "ADuCM322", "FRDM-KL25Z": "MKL25Z128xxx4", "SN32F707B Starter Kit Rev1_0": "SN32F70*B", "NUCLEO-F446RE": "STM32F446RE", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "MCB11C14": "LPC11C14FBD48/301", "FRDM-KL02Z": "MKL02Z32xxx4", "Colibri-iMX7": "MCIMX7D7", "NuTiny-SDK-Mini55": "Mini54XZAE", "NuTiny-SDK-Mini57": "Mini57TDE", "SAM3S-EK": "ATSAM3S4C", "SF2_DEV_KIT": "M2S050", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "uVision Simulator": "ARMCM0", "FRDM-K28F": "MK28FN2M0xxx15", "TRK-KEA64": "SKEAZN64xxx2", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "EVAL-ADuCM320EBZ": "ADuCM320", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "NOVPEK-iMX7": "MCIMX7D7", "XMC4700 Relax Kit": "XMC4700-F144x2048", "SAMG55-XPRO": "ATSAMG55J19", "Fixed Virtual Platform": "ARMCA5", "SAMHA1G16A-XPRO": "ATSAMHA1G16A", "FRDM-KE06Z": "MKE06Z128xxx4", "NUCLEO-F072RB": "STM32F072RB", "NuTiny-SDK-NUC100": "NUC100VE3DN", "MCBTMPM360": "TMPM362F10FG", "NuTiny-SDK-NUC121": "NUC121SC2AE", "NuTiny-SDK-NUC029AE": "NUC029FAE", "NuTiny-SDK-M0564": "M0564VG4AE", "V2M-MPS2 (IoT)": "IOTKit_ARMv8MML", "ADuCM4050 EZ-KIT": "ADuCM4050", "FRDM-K20D50M": "MK20DX128xxx5", "STM32756G-EVAL": "STM32F756NGHx", "SAM4L-XPRO": "ATSAM4LC4C", "FRDM-KL43Z": "MKL43Z256xxx4", "nRF52 PCA10036": "nRF52832_xxAA", "TWR-KV11Z75M": "MKV11Z128xxx7", "NuTiny-SDK-NUC029AN": "NUC029TAN", "TWR-VF65GS10": "MVF61NS15xxxx50", "TWR-KM34Z50": "MKM34Z128xxx5", "STM32L-Discovery": "STM32L152RB", "AC30M1464 MINI B/D": "AC30M1464", "IMX7-PHYBOARD-ZETA": "MCIMX7D7", "XMC1100 Boot Kit": "XMC1100-T038x0064", "TWR-KV46F150M": "MKV46F256xxx16", "Koala EVM": "STM32F429II", "EFM32WG-STK3800": "EFM32WG990F256", "MCB1313": "LPC1313FBD48", "NuTiny-SDK-M480": "M487JIDAE", "TWR-K65F180M": "MK65FN2M0xxx18", "EB_TMPM369FDFG": "TMPM369FDFG", "TS-R-IN32M3-EC": "R-IN32M3-EC", "XMC4300 Relax Kit": "XMC4300-F100x256", "LPCXpresso54114": "LPC54114J256BD64", "STM32F429I-Discovery": "STM32F429ZI", "Colibri-VF61": "MVF61NN15xxxx50", "NUCLEO-F091RC": "STM32F091RC", "SAMV71-XULTRA": "ATSAMV71Q21", "FRDM-KW41Z": "MKW41Z512xxx4", "TWR-KL43Z48M": "MKL43Z256xxx4", "STM32373C-EVAL": "STM32F373VC", "QN908XDK": "QN9080A", "STM32F746G-Discovery": "STM32F746NGHx", "TWR-K24F120M": "MK24FN256xxx12", "nRF52 PCA10040": "nRF52832_xxAA", "MCBSTM32C": "STM32F107VC", "FRDM-KL03Z": "MKL03Z32xxx4", "MCBSTM32E": "STM32F103ZG", "NUCLEO-F401RE": "STM32F401RE", "SF2_EVAL_KIT": "M2S025", "STM32303C-EVAL": "STM32F303VC", "AC33MA384A MINI B/D": "AC33MA384A", "SAML22-XPRO": "ATSAML22N18A", "XMC4800 Relax EtherCAT Kit": "XMC4800-F144x2048", "iMX7-Dual-COM": "MCIMX7D7", "TRK-KEA128": "SKEAZ128xxx4", "SAM4S-EK": "SAM4S16C", "TWR-K20D50M": "MK20DX128xxx5", "STM32F3-Discovery": "STM32F303VC", "LPCXpresso1125": "LPC1125JBD48/303", "STM32F4-Discovery": "STM32F407VG", "CMSIS_RTOS_Tutorial": "STM32F103RB", "SAM3X-EK": "ATSAM3X8H", "SF2_ADV_DEV_KIT": "M2S150", "SN32F760 Starter Kit Rev1_1": "SN32F76*", "Core103R_Board": "MM32x103", "NuTiny-SDK-Mini51": "Mini54LDE", "Apollo2 EVB": "AMAPH1KK-KBR", "FRDM-KE04Z": "MKE04Z8xxx4", "NuTiny-SDK-NUC123": "NUC123SD4AN0", "TWR-KL28Z72M": "MKL28Z512xxx7", "Apollo2 EVK": "AMAPH1KK-KBR", "LPC4330-Xplorer": "LPC4330", "NuTiny-SDK-NUC126": "NUC126VG4AE", "MCBTMPM330": "TMPM330FDFG", "NUCLEO-L476RG": "STM32L476RG", "STM32F334-Discovery": "STM32F334C8", "MCB1800": "LPC1850", "EFM32GG-STK3700": "EFM32GG990F1024", "GD32150C-START": "GD32F150C8", "AC33GA256 MINI B/D": "AC33GA256", "TS-R-IN32M3-CL": "R-IN32M3-CL", "TS-R-IN32M3-CEC": "R-IN32M3-EC", "EVAL-ADuCM320iQSPZ": "ADuCM320i", "AC33M8128/6128 MINI B/D": "AC33M8128", "SAM4S-XPRO": "ATSAM4SD32C", "STM32L053-Discovery": "STM32L053C8", "TWR-KM34Z50MV3": "MKM34Z128Axxx5", "PAC52XX EVK": "PAC52XX", "XMC4500 CPU Board - General Purpose (CPU_45A)": "XMC4500-F144x1024", "NuTiny-SDK-NUC122": "NUC122SD2AN", "Z32F3840100KITG": "Z32F38412ALS", "LPCXpresso54608": "LPC54608J512BD208", "MCIMX7ULP-EVK": "MCIMX7U5", "LPC824 LPCXpresso": "LPC824M201JHI33", "STM32439I-EVAL": "STM32F439NI", "EFM32TG-STK3300": "EFM32TG840F32", "AC33M4064/3064 MINI B/D": "AC33M4064", "NUCLEO-F030R8": "STM32F030R8", "NuTiny-SDK-NUC131": "NUC131SD2AE", "DK-TM4C129x": "TM4C129XNCZAD", "STM32F769I-EVAL": "STM32F769NIHx", "SF2_STARTER_KIT": "M2S010", "nRF51 PCA20006": "nRF51822_xxaa", "TS-R-IN32M4-CL2": "R-IN32M4-CL2", "MCIMX6SX-SABRE": "MCIMX6X1", "EVAL-ADICUP3029": "ADuCM3029", "SAM4C-EK": "ATSAM4C16C", "MCB1500": "LPC1549JBD100", "TWR-KW21D256": "MKW21D256xxx5", "STM32L476G-EVAL": "STM32L476ZG", "MCIMX7D-SABRE": "MCIMX7D7", "STM32F051-Discovery": "STM32F051R8", "NUCLEO-L053R8": "STM32L053R8", "FRDM-K64F": "MK64FN1M0VLL12", "TLE9869 EvalKit": "TLE9869QXA20", "NuTiny-SDK-NUC240": "NUC240VE3AE", "LPC84x LPCXpresso": "LPC845M301JBD64", "S32K144-EVB": "S32K144UAT0xxxx", "SAMD20-XPRO": "ATSAMD20J18", "SN32F770 Starter Kit Rev1_0": "SN32F70*B", "SAM4E-EK": "SAM4E16C", "MCB1343": "LPC1343FBD48", "LinkIt 7687 development board": "MT7687F", "XMC4500 CPU Board - General Purpose (CPU_45B)": "XMC4500-E144x1024", "SAM3N-EK": "ATSAM3N4C", "LinkIt 2523 development board": "MT2523x", "SAM3U-EK": "ATSAM3U4E", "ADSP-CM419F EZ-BOARD M0": "ADSP-CM419F-BCZ_M0", "ADuCM3029 EZ-KIT": "ADuCM3029", "NuTiny-SDK-NUC200": "NUC220VE3AN", "FRDM-KL82Z": "MKL81Z128xxx7", "XMC1300 Boot Kit": "XMC1302-T038x0200", "Bulb Board": "S6E1A12B0A", "MCBTMPM395": "TMPM395FWAXBG", "STM32F072-Discovery": "STM32F072RB", "BMSKTOPASM369": "TMPM369FDFG", "LPCXpresso54102": "LPC54102J512BD64", "NuTiny-SDK-NANO100AN": "NANO100VD3AN", "TWR-K60D100M": "MK60DN512xxx10", "TWR-K20D72M": "MK20DX256xxx7", "nRF51 PCA10031": "nRF51422_xxAC", "EK-TM4C1294XL": "TM4C1294NCPDT", "SK-FM3-176PMC-ETHERNET": "MB9BFD18T", "LPC4088-32 Developers Kit": "LPC4088FET208", "FRDM-KW36": "MKW36A512xxx4", "TLE984x Eval.Board": "TLE9844QX", "XMC4500 Relax Lite Kit": "XMC4500-F100x1024", "iMX6-SoloX-COM": "MCIMX6X4", "SAME70-XPLD": "ATSAME70Q21", "LPCXpresso11U68": "LPC11U68JBD100", "XMC4400 CPU Board - General Purpose  (CPU_44A)": "XMC4400-F100x512", "NUCLEO-F103RB": "STM32F103RB", "EFM32ZG-STK3200": "EFM32ZG222F32", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "MCBTWRK60": "MK60DN512xxx10", "MCB9B500": "MB9BF506R", "Z32F0642100KITG": "Z32F06423AKE", "ADSP-CM419F EZ-BOARD": "ADSP-CM419F", "LPC812 LPCXpresso": "LPC812M101JDH20", "TWR-KL82Z72M": "MKL82Z128xxx7", "SN32F100 Starter Kit": "SN32F10*", "NuTiny-SDK-M0519": "M0519VE3AE", "TWR-K64F120M": "MK64FN1M0xxx12", "MCB4300": "LPC4350", "XMC4200 CPU Board - Actuator  (CPU_42A)": "XMC4200-F64x256", "EVAL-ADuCM360MKZ": "ADuCM360"}
\ No newline at end of file

--- a/arm_pack_manager/index.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/arm_pack_manager/index.json	Tue Oct 10 16:56:30 2017 -0500
@@ -1,1 +1,1 @@
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"http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.9.0.pack", "compile": {"header": "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h", "define": "STM32F732xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F7xx_DFP.pdsc", "memory": {"IROM2": {"start": "0x00200000", "size": "0x80000"}, "IROM1": {"start": "0x08000000", "size": "0x80000"}}, "debug": "CMSIS/SVD/STM32F7x2_v1r0.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian", "clock": "216000000"}}, "LM3S6938": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_256.FLM": {"default": "1", "ramsize": null, "size": "0x00040000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00010000"}, "IROM1": {"start": "0x00000000", "size": "0x00040000"}}, "debug": "SVD\\lm3s6938.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "50000000"}}, "Mini52ZDE": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/Mini51_LD_2.FLM": {"default": "0", "ramsize": null, "size": "0x800", "ramstart": null, "start": "0x00100000"}, "Flash/Mini51_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/Mini51_AP_8.FLM": {"default": "1", "ramsize": null, "size": "0x2000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.1.0.pack", "compile": {"header": "Device\\Mini51\\Include\\Mini51Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x800"}, "IROM1": {"start": "0x00000000", "size": "0x2000"}}, "debug": "SVD\\Nuvoton\\MINI51DE_v1.svd", "processor": {"fpu": "FPU", "clock": "24000000"}}, "STM32F318C8": {"core": "Cortex-M4", "vendor": "STMicroelectronics:13", "algorithm": {"Flash/STM32F3xx_256.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x08000000"}, "Flash/STM32F3xx_OPT.FLM": {"default": "0", "ramsize": null, "size": "0x00000010", "ramstart": null, "start": "0x1FFFF800"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.1.4.0.pack", "compile": {"header": "Device/Include/stm32f3xx.h", "define": "STM32F398xx"}, "pdsc_file": "http://www.keil.com/pack/Keil.STM32F3xx_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x08000000", "size": "0x00010000"}}, "debug": "SVD/STM32F301x.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "72000000"}}, "ATSAME54P20A": {"core": "Cortex-M4", "vendor": "Atmel:3", "algorithm": {"arm_addon/flash/ATSAME54_1024.FLM": {"default": "1", "ramsize": null, "size": "0x100000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAME54_DFP.1.0.0.pack", "compile": {"header": "include/sam.h", "define": "__SAME54N19A__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAME54_DFP.pdsc", "memory": {"IRAM4": {"start": "0x47000000", "size": "0x2000"}, "IRAM3": {"start": "0x20000000", "size": "0x8000"}, "IRAM1": {"start": "0x20000000", "size": "0x40000"}, "IRAM2": {"start": "0x20000000", "size": "0x8000"}, "IROM1": {"start": "0x00000000", "size": "0x100000"}}, "debug": "svd/ATSAME54P20A.svd", "processor": {"fpu": "SP_FPU", "endianness": "Little-endian"}}, "LM3S1H11": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h11.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "LM3S1H16": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_512.FLM": {"default": "1", "ramsize": null, "size": "0x00080000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s1z16.h", "define": "LM3S1Z16"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x0000C000"}, "IROM1": {"start": "0x00000000", "size": "0x00080000"}}, "debug": "SVD\\lm3s1h16.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "80000000"}}, "ATSAMV70N20": {"core": "Cortex-M7", "vendor": "Atmel:3", "algorithm": {"flash/ATSAMV7x_1024.FLM": {"default": "1", "ramsize": null, "size": "0x00100000", "ramstart": null, "start": "0x00400000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.2.3.0.pack", "compile": {"header": "SAMV70/include/sam.h", "define": "__SAMV70N19__"}, "pdsc_file": "http://www.keil.com/pack/Keil.SAM-V_DFP.pdsc", "memory": {"IROM2": {"start": "0x00800000", "size": "0x00004000"}, "IRAM1": {"start": "0x20400000", "size": "0x00060000"}, "IROM1": {"start": "0x00400000", "size": "0x00100000"}}, "debug": "svd/ATSAMV70N20.svd", "processor": {"fpu": "DP_FPU", "endianness": "Little-endian", "clock": "300000000"}}, "LPC1347FBD48": {"core": "Cortex-M3", "vendor": "NXP:11", "algorithm": {"Flash/LPC1xxx_64.FLM": {"default": "1", "ramsize": "0x0FE0", "size": "0x10000", "ramstart": "0x10000000", "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.1.1.0.pack", "compile": {"header": "Device/Include/LPC13Uxx/LPC13Uxx.h"}, "pdsc_file": "http://www.keil.com/pack/Keil.LPC1300_DFP.pdsc", "memory": {"IRAM1": {"start": "0x10000000", "size": "0x2000"}, "IRAM2": {"start": "0x20000000", "size": "0x0800"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD/LPC13Uxx.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "72000000"}}, "LM3S2410": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2410.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NUC100RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.1.0.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "clock": "50000000"}}, "LM3S6110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}}
\ No newline at end of file

Binary file bootloaders/REALTEK_RTL8195AM/ram_1.bin has changed

--- a/build_api.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/build_api.py	Tue Oct 10 16:56:30 2017 -0500
@@ -401,7 +401,7 @@
         merged.tofile(output, format='bin')
 
 def scan_resources(src_paths, toolchain, dependencies_paths=None,
-                   inc_dirs=None, base_path=None):
+                   inc_dirs=None, base_path=None, collect_ignores=False):
     """ Scan resources using initialized toolcain
 
     Positional arguments
@@ -413,9 +413,11 @@
     """
 
     # Scan src_path
-    resources = toolchain.scan_resources(src_paths[0], base_path=base_path)
+    resources = toolchain.scan_resources(src_paths[0], base_path=base_path,
+                                         collect_ignores=collect_ignores)
     for path in src_paths[1:]:
-        resources.add(toolchain.scan_resources(path, base_path=base_path))
+        resources.add(toolchain.scan_resources(path, base_path=base_path,
+                                               collect_ignores=collect_ignores))
 
     # Scan dependency paths for include dirs
     if dependencies_paths is not None:
@@ -445,7 +447,7 @@
                   macros=None, inc_dirs=None, jobs=1, silent=False,
                   report=None, properties=None, project_id=None,
                   project_description=None, extra_verbose=False, config=None,
-                  app_config=None, build_profile=None):
+                  app_config=None, build_profile=None, stats_depth=None):
     """ Build a project. A project may be a test or a user program.
 
     Positional arguments:
@@ -474,6 +476,7 @@
     config - a Config object to use instead of creating one
     app_config - location of a chosen mbed_app.json file
     build_profile - a dict of flags that will be passed to the compiler
+    stats_depth - depth level for memap to display file/dirs
     """
 
     # Convert src_path to a list if needed
@@ -591,18 +594,18 @@
         memap_table = ''
         if memap_instance:
             # Write output to stdout in text (pretty table) format
-            memap_table = memap_instance.generate_output('table')
+            memap_table = memap_instance.generate_output('table', stats_depth)
 
             if not silent:
                 print memap_table
 
             # Write output to file in JSON format
             map_out = join(build_path, name + "_map.json")
-            memap_instance.generate_output('json', map_out)
+            memap_instance.generate_output('json', stats_depth, map_out)
 
             # Write output to file in CSV format for the CI
             map_csv = join(build_path, name + "_map.csv")
-            memap_instance.generate_output('csv-ci', map_csv)
+            memap_instance.generate_output('csv-ci', stats_depth, map_csv)
 
         resources.detect_duplicates(toolchain)
 
@@ -611,7 +614,7 @@
             cur_result["elapsed_time"] = end - start
             cur_result["output"] = toolchain.get_output() + memap_table
             cur_result["result"] = "OK"
-            cur_result["memory_usage"] = toolchain.map_outputs
+            cur_result["memory_usage"] = memap_instance.mem_report
             cur_result["bin"] = res
             cur_result["elf"] = splitext(res)[0] + ".elf"
             cur_result.update(toolchain.report)
@@ -1032,7 +1035,7 @@
         mkdir(tmp_path)
 
         toolchain = prepare_toolchain(
-            [""], tmp_path, target, toolchain_name, macros=macros,
+            [""], tmp_path, target, toolchain_name, macros=macros,verbose=verbose,
             notify=notify, silent=silent, extra_verbose=extra_verbose,
             build_profile=build_profile, jobs=jobs, clean=clean)
 
@@ -1165,6 +1168,9 @@
                 if toolchain not in unique_supported_toolchains:
                     unique_supported_toolchains.append(toolchain)
 
+    if "ARM" in unique_supported_toolchains:
+        unique_supported_toolchains.append("ARMC6")
+
     return unique_supported_toolchains
 
 def mcu_toolchain_list(release_version='5'):
@@ -1201,7 +1207,7 @@
 
 
 def mcu_target_list(release_version='5'):
-    """  Shows target list 
+    """  Shows target list
 
     """
 
@@ -1310,7 +1316,9 @@
             row.append(text)
 
         for unique_toolchain in unique_supported_toolchains:
-            if unique_toolchain in TARGET_MAP[target].supported_toolchains:
+            if (unique_toolchain in TARGET_MAP[target].supported_toolchains or
+                (unique_toolchain == "ARMC6" and
+                 "ARM" in TARGET_MAP[target].supported_toolchains)):
                 text = "Supported"
                 perm_counter += 1
             else:
@@ -1361,7 +1369,7 @@
     """
     from prettytable import PrettyTable
     columns_text = ['name', 'target', 'toolchain']
-    columns_int = ['static_ram', 'stack', 'heap', 'total_ram', 'total_flash']
+    columns_int = ['static_ram', 'total_flash']
     table = PrettyTable(columns_text + columns_int)
 
     for col in columns_text:
@@ -1388,10 +1396,6 @@
                                 record['toolchain_name'],
                                 record['memory_usage'][-1]['summary'][
                                     'static_ram'],
-                                record['memory_usage'][-1]['summary']['stack'],
-                                record['memory_usage'][-1]['summary']['heap'],
-                                record['memory_usage'][-1]['summary'][
-                                    'total_ram'],
                                 record['memory_usage'][-1]['summary'][
                                     'total_flash'],
                             ]

--- a/export/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -27,15 +27,13 @@
 
 from tools.build_api import prepare_toolchain
 from tools.build_api import scan_resources
-from tools.toolchains import Resources, mbedToolchain
+from tools.toolchains import Resources
 from tools.export import lpcxpresso, ds5_5, iar, makefile
-from tools.export import embitz, coide, kds, simplicity, atmelstudio
+from tools.export import embitz, coide, kds, simplicity, atmelstudio, mcuxpresso
 from tools.export import sw4stm32, e2studio, zip, cmsis, uvision, cdt, vscode
 from tools.export import gnuarmeclipse
 from tools.export import qtcreator
-from tools.targets import TARGET_NAMES, set_targets_json_location
-from tools.build_profiles import find_build_profile, find_targets_json
-from tools.build_profiles import get_toolchain_profile
+from tools.targets import TARGET_NAMES
 
 EXPORTERS = {
     'uvision5': uvision.Uvision,
@@ -44,6 +42,7 @@
     'gcc_arm': makefile.GccArm,
     'make_gcc_arm': makefile.GccArm,
     'make_armc5': makefile.Armc5,
+    'make_armc6': makefile.Armc6,
     'make_iar': makefile.IAR,
     'ds5_5': ds5_5.DS5_5,
     'iar': iar.IAR,
@@ -58,9 +57,8 @@
     'eclipse_iar'      : cdt.EclipseIAR,
     'eclipse_armc5'    : cdt.EclipseArmc5,
     'gnuarmeclipse': gnuarmeclipse.GNUARMEclipse,
+    'mcuxpresso': mcuxpresso.MCUXpresso,
     'qtcreator': qtcreator.QtCreator,
-    'zip' : zip.ZIP,
-    'cmsis'    : cmsis.CMSIS,
     'vscode_gcc_arm' : vscode.VSCodeGcc,
     'vscode_iar' : vscode.VSCodeIAR,
     'vscode_armc5' : vscode.VSCodeArmc5
@@ -105,7 +103,7 @@
         row = [target]  # First column is platform name
         for ide in supported_ides:
             text = "-"
-            if target in EXPORTERS[ide].TARGETS:
+            if EXPORTERS[ide].is_target_supported(target):
                 if verbose_html:
                     text = "✓"
                 else:
@@ -305,45 +303,6 @@
 
     _, toolchain_name = get_exporter_toolchain(ide)
 
-    ###################################
-    # mbed Classic/2.0/libary support #
-
-    # Find build system profile
-    profile = None
-    targets_json = None
-    for path in paths:
-        profile = find_build_profile(path) or profile
-        if profile:
-            targets_json = join(dirname(dirname(abspath(__file__))), 'legacy_targets.json')
-        else:
-            targets_json = find_targets_json(path) or targets_json
-
-    # Apply targets.json to active targets
-    if targets_json:
-        if not silent:
-            print("Using targets from %s" % targets_json)
-        set_targets_json_location(targets_json)
-
-    # Apply profile to toolchains
-    if profile:
-        def init_hook(self):
-            profile_data = get_toolchain_profile(self.name, profile)
-            if not profile_data:
-                return
-            if not silent:
-                self.info("Using toolchain %s profile %s" % (self.name, profile))
-
-            for k,v in profile_data.items():
-                if self.flags.has_key(k):
-                    self.flags[k] = v
-                else:
-                    setattr(self, k, v)
-
-        mbedToolchain.init = init_hook
-
-    # mbed Classic/2.0/libary support #
-    ###################################
-
     # Pass all params to the unified prepare_resources()
     toolchain = prepare_toolchain(
         paths, "", target, toolchain_name, macros=macros, jobs=jobs,
@@ -351,11 +310,12 @@
         extra_verbose=extra_verbose, config=config, build_profile=build_profile,
         app_config=app_config)
     # The first path will give the name to the library
+    toolchain.RESPONSE_FILES = False
     if name is None:
         name = basename(normpath(abspath(src_paths[0])))
 
     # Call unified scan_resources
-    resource_dict = {loc: scan_resources(path, toolchain, inc_dirs=inc_dirs)
+    resource_dict = {loc: scan_resources(path, toolchain, inc_dirs=inc_dirs, collect_ignores=True)
                      for loc, path in src_paths.iteritems()}
     resources = Resources()
     toolchain.build_dir = export_path
@@ -387,13 +347,14 @@
                 if label not in toolchain.target.features:
                     resource.add(res)
         if isinstance(zip_proj, basestring):
-            zip_export(join(export_path, zip_proj), name, resource_dict, files,
-                       inc_repos)
+            zip_export(join(export_path, zip_proj), name, resource_dict,
+                       files + list(exporter.static_files), inc_repos)
         else:
-            zip_export(zip_proj, name, resource_dict, files, inc_repos)
+            zip_export(zip_proj, name, resource_dict,
+                       files + list(exporter.static_files), inc_repos)
     else:
-        for exported in files:
-            if not exists(join(export_path, basename(exported))):
-                copyfile(exported, join(export_path, basename(exported)))
+        for static_file in exporter.static_files:
+            if not exists(join(export_path, basename(static_file))):
+                copyfile(static_file, join(export_path, basename(static_file)))
 
     return exporter

--- a/export/atmelstudio/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/atmelstudio/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -17,9 +17,10 @@
 import uuid
 from os.path import splitext, basename, dirname
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
 
+@deprecated_exporter
 class AtmelStudio(Exporter):
     NAME = 'AtmelStudio'
     TOOLCHAIN = 'GCC_ARM'
@@ -36,6 +37,10 @@
 
     MBED_CONFIG_HEADER_SUPPORTED = True
 
+    @classmethod
+    def is_target_supported(cls, maybe_supported):
+        return maybe_supported in cls.TARGETS
+
     def generate(self):
 
         source_files = []

--- a/export/cdt/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/cdt/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -1,6 +1,6 @@
 import re
 
-from os.path import join, exists, realpath, relpath, basename
+from os.path import join, exists
 from os import makedirs
 
 from tools.export.makefile import Makefile, GccArm, Armc5, IAR
@@ -30,7 +30,9 @@
 
 
         self.gen_file('cdt/pyocd_settings.tmpl', ctx,
-                      join('eclipse-extras',self.target+'_pyocd_settings.launch'))
+                      join('eclipse-extras',
+                           '{target}_pyocd_{project}_settings.launch'.format(target=self.target,
+                                                                             project=self.project_name)))
         self.gen_file('cdt/necessary_software.tmpl', ctx,
                       join('eclipse-extras','necessary_software.p2f'))
 

--- a/export/cdt/pyocd_settings.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/cdt/pyocd_settings.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -49,7 +49,7 @@
 <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb.exe"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
 <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
 <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>

--- a/export/cmsis/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/cmsis/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -103,8 +103,11 @@
 class CMSIS(Exporter):
     NAME = 'cmsis'
     TOOLCHAIN = 'ARM'
-    TARGETS = [target for target, obj in TARGET_MAP.iteritems()
-               if "ARM" in obj.supported_toolchains]
+
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return cls.TOOLCHAIN in target.supported_toolchains
 
     def make_key(self, src):
         """turn a source file into its group name"""

--- a/export/coide/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/coide/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,9 +16,10 @@
 """
 from os.path import splitext, basename
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
 
+@deprecated_exporter
 class CoIDE(Exporter):
     NAME = 'CoIDE'
     TOOLCHAIN = 'GCC_ARM'

--- a/export/e2studio/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/e2studio/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,8 +16,9 @@
 """
 from os.path import splitext, basename
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
+@deprecated_exporter
 class E2Studio(Exporter):
     NAME = 'e2 studio'
     TOOLCHAIN = 'GCC_ARM'

--- a/export/embitz/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/embitz/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,7 +16,7 @@
 """
 from os.path import splitext, basename
 from tools.targets import TARGET_MAP
-from tools.export.exporters import Exporter, filter_supported
+from tools.export.exporters import Exporter, apply_supported_whitelist
 
 
 POST_BINARY_WHITELIST = set([
@@ -30,9 +30,6 @@
     NAME = 'EmBitz'
     TOOLCHAIN = 'GCC_ARM'
 
-
-    TARGETS = filter_supported("GCC_ARM", POST_BINARY_WHITELIST)
-
     MBED_CONFIG_HEADER_SUPPORTED = True
 
     FILE_TYPES = {
@@ -42,6 +39,11 @@
         'cpp_sources': 'cpp'
     }
 
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return apply_supported_whitelist(
+            cls.TOOLCHAIN, POST_BINARY_WHITELIST, target)
 
     @staticmethod
     def _remove_symbols(sym_list):

--- a/export/exporters.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/exporters.py	Tue Oct 10 16:56:30 2017 -0500
@@ -25,6 +25,18 @@
     def __get__(self, inst, cls):
         return self.func(cls)
 
+def deprecated_exporter(CLS):
+    old_init = CLS.__init__
+    old_name = CLS.NAME
+    def __init__(*args, **kwargs):
+        print("==================== DEPRECATION NOTICE ====================")
+        print("The exporter %s is no longer maintained, and deprecated." % old_name)
+        print("%s will be removed from mbed OS for the mbed OS 5.6 release." % old_name)
+        old_init(*args, **kwargs)
+    CLS.__init__ = __init__
+    CLS.NAME = "%s (DEPRECATED)" % old_name
+    return CLS
+
 class Exporter(object):
     """Exporter base class
 
@@ -36,7 +48,7 @@
     TEMPLATE_DIR = dirname(__file__)
     DOT_IN_RELATIVE_PATH = False
     NAME = None
-    TARGETS = None
+    TARGETS = set()
     TOOLCHAIN = None
 
 
@@ -60,8 +72,11 @@
         jinja_loader = FileSystemLoader(os.path.dirname(os.path.abspath(__file__)))
         self.jinja_environment = Environment(loader=jinja_loader)
         self.resources = resources
-        self.generated_files = [join(self.TEMPLATE_DIR, "GettingStarted.html"),
-                                join(self.TEMPLATE_DIR, ".mbed")]
+        self.generated_files = []
+        self.static_files = (
+            join(self.TEMPLATE_DIR, "GettingStarted.html"),
+            join(self.TEMPLATE_DIR, ".mbed"),
+        )
         self.builder_files_dict = {}
         self.add_config()
 
@@ -90,7 +105,10 @@
         config_header = self.toolchain.get_config_header()
         flags = {key + "_flags": copy.deepcopy(value) for key, value
                  in self.toolchain.flags.iteritems()}
-        asm_defines = ["-D" + symbol for symbol in self.toolchain.get_symbols(True)]
+        asm_defines = self.toolchain.get_compile_options(
+            self.toolchain.get_symbols(for_asm=True),
+            filter(None, self.resources.inc_dirs),
+            for_asm=True)
         c_defines = ["-D" + symbol for symbol in self.toolchain.get_symbols()]
         flags['asm_flags'] += asm_defines
         flags['c_flags'] += c_defines
@@ -178,19 +196,33 @@
         """Generate an IDE/tool specific project file"""
         raise NotImplemented("Implement a generate function in Exporter child class")
 
+    @classmethod
+    def is_target_supported(cls, target_name):
+        """Query support for a particular target
 
-def filter_supported(compiler, whitelist):
+        NOTE: override this method if your exporter does not provide a static list of targets
+
+        Positional Arguments:
+        target_name - the name of the target.
+        """
+        target = TARGET_MAP[target_name]
+        return bool(set(target.resolution_order_names).intersection(set(cls.TARGETS))) \
+            and cls.TOOLCHAIN in target.supported_toolchains
+
+
+    @classmethod
+    def all_supported_targets(cls):
+        return [t for t in TARGET_MAP.keys() if cls.is_target_supported(t)]
+
+
+def apply_supported_whitelist(compiler, whitelist, target):
     """Generate a list of supported targets for a given compiler and post-binary hook
     white-list."""
-    def supported_p(obj):
-        """Internal inner function used for filtering"""
-        if compiler not in obj.supported_toolchains:
-            return False
-        if not hasattr(obj, "post_binary_hook"):
-            return True
-        if obj.post_binary_hook['function'] in whitelist:
-            return True
-        else:
-            return False
-    return list(target for target, obj in TARGET_MAP.iteritems()
-                if supported_p(obj))
+    if compiler not in target.supported_toolchains:
+        return False
+    if not hasattr(target, "post_binary_hook"):
+        return True
+    if target.post_binary_hook['function'] in whitelist:
+        return True
+    else:
+        return False

--- a/export/gnuarmeclipse/.cproject.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/gnuarmeclipse/.cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -177,12 +177,12 @@
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
 									{% for s in opts['as']['defines'] %}
-									<listOptionValue builtIn="false" value="{{s}}"/>
+									<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
 									{% endfor %}
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.files.{{u.id}}" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
 									{% for file in opts['common']['include_files'] %}
-									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{file}}&quot;"/>
 									{% endfor %}
 								</option>
 								{% if opts['as']['otherwarnings'] != '' %}
@@ -207,12 +207,12 @@
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
 									{% for s in opts['c']['defines'] %}
-									<listOptionValue builtIn="false" value="{{s}}"/>
+									<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
 									{% endfor %}
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files.{{u.id}}" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
 									{% for file in opts['common']['include_files'] %}
-									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{file}}&quot;"/>
 									{% endfor %}
 								</option>
 								{% if opts['c']['compiler.std'] %}
@@ -255,12 +255,12 @@
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.defs.{{u.id}}" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
 									{% for s in opts['cpp']['defines'] %}
-									<listOptionValue builtIn="false" value="{{s}}"/>
+									<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
 									{% endfor %}
 								</option>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files.{{u.id}}" name="Include files (-include)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.compiler.include.files" useByScannerDiscovery="true" valueType="includeFiles">
 									{% for file in opts['common']['include_files'] %}
-									<listOptionValue builtIn="false" value="&quot;{{file}}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{file}}&quot;"/>
 									{% endfor %}
 								</option>
 								{% if opts['cpp']['compiler.std'] %}

--- a/export/gnuarmeclipse/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/gnuarmeclipse/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -33,7 +33,7 @@
 from random import randint
 from json import load
 
-from tools.export.exporters import Exporter, filter_supported
+from tools.export.exporters import Exporter, apply_supported_whitelist
 from tools.options import list_profiles
 from tools.targets import TARGET_MAP
 from tools.utils import NotSupportedException
@@ -69,7 +69,11 @@
     NAME = 'GNU ARM Eclipse'
     TOOLCHAIN = 'GCC_ARM'
 
-    TARGETS = filter_supported("GCC_ARM", POST_BINARY_WHITELIST)
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return apply_supported_whitelist(
+            cls.TOOLCHAIN, POST_BINARY_WHITELIST, target)
 
     # override
     @property
@@ -415,105 +419,10 @@
         """
         source_folders = [self.filter_dot(s) for s in set(dirname(
             src) for src in self.resources.c_sources + self.resources.cpp_sources + self.resources.s_sources)]
-        if '.' in source_folders:
-            source_folders.remove('.')
 
-        # print 'source folders'
-        # print source_folders
-
-        # Source folders were converted before and are guaranteed to
-        # use the POSIX separator.
-        top_folders = [f for f in set(s.split('/')[0]
-                                      for s in source_folders)]
-        # print 'top folders'
-        # print top_folders
-
-        self.source_tree = {}
-        for top_folder in top_folders:
-            for root, dirs, files in os.walk(top_folder, topdown=True):
-                # print root, dirs, files
-
-                # Paths returned by os.walk() must be split with os.dep
-                # to accomodate Windows weirdness.
-                parts = root.split(os.sep)
-
-                # Ignore paths that include parts starting with dot.
-                skip = False
-                for part in parts:
-                    if part.startswith('.'):
-                        skip = True
-                        break
-                if skip:
-                    continue
-
-                # Further process only leaf paths, (that do not have
-                # sub-folders).
-                if len(dirs) == 0:
-                    # The path is reconstructed using POSIX separators.
-                    self.add_source_folder_to_tree('/'.join(parts))
-
-        for folder in source_folders:
-            self.add_source_folder_to_tree(folder, True)
-
-        # print
-        # print self.source_tree
-        # self.dump_paths(self.source_tree)
-        # self.dump_tree(self.source_tree)
-
-        # print 'excludings'
-        self.excluded_folders = ['BUILD']
-        self.recurse_excludings(self.source_tree)
-
+        self.excluded_folders = set(self.resources.ignored_dirs) - set(self.resources.inc_dirs)
         print 'Source folders: {0}, with {1} exclusions'.format(len(source_folders), len(self.excluded_folders))
 
-    def add_source_folder_to_tree(self, path, is_used=False):
-        """
-        Decompose a path in an array of folder names and create the tree.
-        On the second pass the nodes should be already there; mark them
-        as used.
-        """
-        # print path, is_used
-
-        # All paths arriving here are guaranteed to use the POSIX
-        # separators, os.walk() paths were also explicitly converted.
-        parts = path.split('/')
-        # print parts
-        node = self.source_tree
-        prev = None
-        for part in parts:
-            if part not in node.keys():
-                new_node = {}
-                new_node['name'] = part
-                new_node['children'] = {}
-                if prev != None:
-                    new_node['parent'] = prev
-                node[part] = new_node
-            node[part]['is_used'] = is_used
-            prev = node[part]
-            node = node[part]['children']
-
-    def recurse_excludings(self, nodes):
-        """
-        Recurse the tree and collect all unused folders; descend
-        the hierarchy only for used nodes.
-        """
-        for k in nodes.keys():
-            node = nodes[k]
-            if node['is_used'] == False:
-                parts = []
-                cnode = node
-                while True:
-                    parts.insert(0, cnode['name'])
-                    if 'parent' not in cnode:
-                        break
-                    cnode = cnode['parent']
-
-                # Compose a POSIX path.
-                path = '/'.join(parts)
-                # print path
-                self.excluded_folders.append(path)
-            else:
-                self.recurse_excludings(node['children'])
 
     # -------------------------------------------------------------------------
 

--- a/export/iar/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/iar/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -30,15 +30,15 @@
 with open(_iar_defs, 'r') as f:
     _GUI_OPTIONS = json.load(f)
 
-_IAR_TARGETS = [target for target, obj in TARGET_MAP.iteritems() if
-                _supported(obj, _GUI_OPTIONS.keys())]
-
 
 class IAR(Exporter):
     NAME = 'iar'
     TOOLCHAIN = 'IAR'
 
-    TARGETS = _IAR_TARGETS
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return _supported(target, _GUI_OPTIONS.keys())
 
 
     def iar_groups(self, grouped_src):

--- a/export/iar/iar_definitions.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/iar/iar_definitions.json	Tue Oct 10 16:56:30 2017 -0500
@@ -35,8 +35,41 @@
     "STM32F070RB": {
         "OGChipSelectEditMenu": "STM32F070RB\tST STM32F070RB"
     },
+    "MK22DN512xxx5": {
+        "OGChipSelectEditMenu": "MK22DN512xxx5\tNXP MK22DN512xxx5"
+    },
+    "MK24FN1M0xxx12": {
+        "OGChipSelectEditMenu": "MK24FN1M0xxx12\tNXP MK24FN1M0xxx12"
+    },
     "MK64FN1M0xxx12": {
-        "OGChipSelectEditMenu": "MK64FN1M0xxx12\tFreescale MK64FN1M0xxx12"
+        "OGChipSelectEditMenu": "MK64FN1M0xxx12\tNXP MK64FN1M0xxx12"
+    },
+    "MK66FN2M0xxx18": {
+        "OGChipSelectEditMenu": "MK66FN2M0xxx18\tNXP MK66FN2M0xxx18"
+    },
+    "MK82FN256xxx15": {
+        "OGChipSelectEditMenu": "MK82FN256xxx15\tNXP MK82FN256xxx15"
+    },
+    "MKL27Z64xxx4": {
+        "OGChipSelectEditMenu": "MKL27Z64xxx4\tNXP MKL27Z64xxx4"
+    },
+    "MKL43Z256xxx4": {
+        "OGChipSelectEditMenu": "MKL43Z256xxx4\tNXP MKL43Z256xxx4"
+    },
+    "MKL82Z128xxx7": {
+        "OGChipSelectEditMenu": "MKL82Z128xxx7\tNXP MKL82Z128xxx7"
+    },
+    "MKW24D512xxx5": {
+        "OGChipSelectEditMenu": "MKW24D512xxx5\tNXP MKW24D512xxx5"
+    },
+    "MKW41Z512xxx4": {
+        "OGChipSelectEditMenu": "MKW41Z512xxx4\tNXP MKW41Z512xxx4"
+    },
+    "LPC54114J256BD64": {
+        "OGChipSelectEditMenu": "LPC54114J256_M4\tNXP LPC54114J256_M4"
+    },
+    "LPC54608J512ET180": {
+        "OGChipSelectEditMenu": "LPC54608J512\tNXP LPC54608J512"
     },
     "STM32F072RB": {
         "OGChipSelectEditMenu": "STM32F072RB\tST STM32F072RB"

--- a/export/kds/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/kds/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,9 +16,10 @@
 """
 from os.path import splitext, basename
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
 
+@deprecated_exporter
 class KDS(Exporter):
     NAME = 'Kinetis Design Studio'
     TOOLCHAIN = 'GCC_ARM'

--- a/export/lpcxpresso/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/lpcxpresso/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,8 +16,9 @@
 """
 from os.path import splitext, basename
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
+@deprecated_exporter
 class LPCXpresso(Exporter):
     NAME = 'LPCXpresso'
     TOOLCHAIN = 'GCC_ARM'

--- a/export/makefile/Makefile.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/makefile/Makefile.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -97,20 +97,26 @@
 all: $(PROJECT).bin $(PROJECT).hex size
 {% endif %}
 
-.asm.o:
-	+@$(call MAKEDIR,$(dir $@))
-	+@echo "Assemble: $(notdir $<)"
-	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
-
 .s.o:
 	+@$(call MAKEDIR,$(dir $@))
 	+@echo "Assemble: $(notdir $<)"
+  {% if needs_asm_preproc %}
+	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -E -o $(@:.o=.E.s) $<
+	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $(@:.o=.E.s)
+  {% else %}
 	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+  {% endif %}
+
 
 .S.o:
 	+@$(call MAKEDIR,$(dir $@))
 	+@echo "Assemble: $(notdir $<)"
+  {% if needs_asm_preproc %}
+	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -E -o $(@:.o=.E.s) $<
+	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $(@:.o=.E.s)
+  {% else %}
 	@$(AS) -c $(ASM_FLAGS) $(INCLUDE_PATHS) -o $@ $<
+  {% endif %}
 
 .c.o:
 	+@$(call MAKEDIR,$(dir $@))
@@ -130,7 +136,7 @@
 {% block target_project_elf %}
 $(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) {% if pp_cmd -%} $(PROJECT).link_script{{link_script_ext}} {% else%} $(LINKER_SCRIPT) {% endif %}
 	+@echo "link: $(notdir $@)"
-	@$(LD) $(LD_FLAGS) {{link_script_option}} $(filter %{{link_script_ext}}, $^) $(LIBRARY_PATHS) --output $@ $(filter %.o, $^) $(LIBRARIES) $(LD_SYS_LIBS)
+	@$(LD) $(LD_FLAGS) {{link_script_option}} $(filter-out %.o, $^) $(LIBRARY_PATHS) --output $@ $(filter %.o, $^) $(LIBRARIES) $(LD_SYS_LIBS)
 {% endblock %}
 
 $(PROJECT).bin: $(PROJECT).elf

--- a/export/makefile/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/makefile/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -21,7 +21,7 @@
 from subprocess import check_output, CalledProcessError, Popen, PIPE
 import shutil
 from jinja2.exceptions import TemplateNotFound
-from tools.export.exporters import Exporter, filter_supported
+from tools.export.exporters import Exporter, apply_supported_whitelist
 from tools.utils import NotSupportedException
 from tools.targets import TARGET_MAP
 
@@ -35,6 +35,8 @@
 
     MBED_CONFIG_HEADER_SUPPORTED = True
 
+    PREPROCESS_ASM = False
+
     POST_BINARY_WHITELIST = set([
         "MCU_NRF51Code.binary_hook",
         "TEENSY3_1Code.binary_hook",
@@ -42,6 +44,12 @@
         "LPC4088Code.binary_hook"
     ])
 
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return apply_supported_whitelist(
+            cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target)
+
     def generate(self):
         """Generate the makefile
 
@@ -90,6 +98,7 @@
             'link_script_ext': self.toolchain.LINKER_EXT,
             'link_script_option': self.LINK_SCRIPT_OPTION,
             'user_library_flag': self.USER_LIBRARY_FLAG,
+            'needs_asm_preproc': self.PREPROCESS_ASM,
         }
 
         if hasattr(self.toolchain, "preproc"):
@@ -186,7 +195,6 @@
 
 class GccArm(Makefile):
     """GCC ARM specific makefile target"""
-    TARGETS = filter_supported("GCC_ARM", Makefile.POST_BINARY_WHITELIST)
     NAME = 'Make-GCC-ARM'
     TEMPLATE = 'make-gcc-arm'
     TOOLCHAIN = "GCC_ARM"
@@ -195,21 +203,20 @@
 
     @staticmethod
     def prepare_lib(libname):
-        return "-l:" + libname
+        if "lib" == libname[:3]:
+            libname = libname[3:-2]
+        return "-l" + libname
 
     @staticmethod
     def prepare_sys_lib(libname):
         return "-l" + libname
 
 
-class Armc5(Makefile):
-    """ARM Compiler 5 specific makefile target"""
-    TARGETS = filter_supported("ARM", Makefile.POST_BINARY_WHITELIST)
-    NAME = 'Make-ARMc5'
-    TEMPLATE = 'make-armc5'
-    TOOLCHAIN = "ARM"
+class Arm(Makefile):
+    """ARM Compiler generic makefile target"""
     LINK_SCRIPT_OPTION = "--scatter"
     USER_LIBRARY_FLAG = "--userlibpath "
+    TEMPLATE = 'make-arm'
 
     @staticmethod
     def prepare_lib(libname):
@@ -219,10 +226,29 @@
     def prepare_sys_lib(libname):
         return libname
 
+    def generate(self):
+        if self.resources.linker_script:
+            new_script = self.toolchain.correct_scatter_shebang(
+                self.resources.linker_script)
+            if new_script is not self.resources.linker_script:
+                self.resources.linker_script = new_script
+                self.generated_files.append(new_script)
+        return super(Arm, self).generate()
+
+class Armc5(Arm):
+    """ARM Compiler 5 (armcc) specific makefile target"""
+    NAME = 'Make-ARMc5'
+    TOOLCHAIN = "ARM"
+    PREPROCESS_ASM = True
+
+class Armc6(Arm):
+    """ARM Compiler 6 (armclang) specific generic makefile target"""
+    NAME = 'Make-ARMc6'
+    TOOLCHAIN = "ARMC6"
+
 
 class IAR(Makefile):
     """IAR specific makefile target"""
-    TARGETS = filter_supported("IAR", Makefile.POST_BINARY_WHITELIST)
     NAME = 'Make-IAR'
     TEMPLATE = 'make-iar'
     TOOLCHAIN = "IAR"

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/makefile/make-arm.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,9 @@
+{% extends "makefile/Makefile.tmpl" %}
+
+{% block elf2bin %}
+	$(ELF2BIN) --bin --output $@ $< 
+{%- endblock %}
+
+{% block elf2hex %}
+	$(ELF2BIN) --i32 --output $@ $< 
+{%- endblock %}
\ No newline at end of file

--- a/export/makefile/make-armc5.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,9 +0,0 @@
-{% extends "makefile/Makefile.tmpl" %}
-
-{% block elf2bin %}
-	$(ELF2BIN) --bin --output $@ $< 
-{%- endblock %}
-
-{% block elf2hex %}
-	$(ELF2BIN) --i32 --output $@ $< 
-{%- endblock %}
\ No newline at end of file

--- a/export/makefile/make-gcc-arm.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/makefile/make-gcc-arm.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -1,6 +1,6 @@
 {% extends "makefile/Makefile.tmpl" %}
 
-{%- block sys_libs -%} -Wl,--start-group {{ld_sys_libs|join(" ")}} -Wl,--end-group {%- endblock -%}
+{%- block sys_libs -%} -Wl,--start-group {{ld_sys_libs|join(" ")}} {{libraries|join(" ")}} -Wl,--end-group {%- endblock -%}
 
 {% block elf2bin %}
 	$(ELF2BIN) -O binary $< $@

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/.cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,278 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		{% for cfg_key in options %}
+		{% set opts = options[cfg_key] %}
+		<cconfiguration id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" moduleId="org.eclipse.cdt.core.settings" name="{{opts['name']}}">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="{{opts['name']}} build" errorParsers="org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" name="{{opts['name']}}" parent="com.crt.advproject.config.exe.{{opts['id']}}" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size &quot;${BuildArtifactFileName}&quot; ; arm-none-eabi-objcopy -v -O binary &quot;${BuildArtifactFileName}&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; ; checksum -p ${TargetChip} -d &quot;${BuildArtifactFileBaseName}.bin&quot;">
+					<folderInfo id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" name="/" resourcePath="">
+						<toolChain id="com.crt.advproject.toolchain.exe.{{opts['id']}}.{{u.id}}" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.{{opts['parent_id']}}">
+							<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.{{opts['id']}}.{{u.id}}" name="ARM-based MCU ({{opts['name']}})" superClass="com.crt.advproject.platform.exe.{{opts['id']}}"/>
+							<builder buildPath="${workspace_loc:/{{name}}}/{{opts['name']}}" cleanBuildTarget="mbedclean" id="com.crt.advproject.builder.exe.{{opts['id']}}.{{u.id}}" incrementalBuildTarget="{{opts['ld']['script']}} all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.crt.advproject.builder.exe.{{opts['id']}}"/>
+
+							<tool id="com.crt.advproject.cpp.exe.{{opts['id']}}.{{opts['uid']['tool_cpp_compiler']}}" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.{{opts['id']}}">
+								<option id="com.crt.advproject.cpp.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.cpp.specs"  value="com.crt.advproject.cpp.specs.newlibnano" valueType="enumerated"/>
+								<option id="com.crt.advproject.cpp.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.cpp.arch"  value="com.crt.advproject.cpp.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
+                                {% if opts['common']['optimization.level'] != '' %}
+							    <option id="com.crt.advproject.cpp.exe.{{opts['id']}}.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="com.crt.advproject.cpp.exe.{{opts['id']}}.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.{{opts['common']['optimization.level']}}" valueType="enumerated"/>
+                                {% endif %}
+								<option id="gnu.cpp.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.cpp.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['cpp']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
+								{% if opts['cpp']['compiler.std'] %}
+								<option id="com.crt.advproject.cpp.misc.dialect.{{u.id}}" name="Language standard" superClass="com.crt.advproject.cpp.misc.dialect" useByScannerDiscovery="true" value="com.crt.advproject.misc.dialect.{{opts['cpp']['compiler.std']}}" valueType="enumerated"/>
+								{% endif %}
+
+								<option id="gnu.cpp.compiler.option.preprocessor.def.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def"  valueType="definedSymbols">
+									{% for s in opts['cpp']['defines'] %}
+									<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.cpp.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths"  valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.cpp.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.cpp.compiler.option.include.files"  valueType="includeFiles">
+									{% for file in opts['common']['include_files'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{file}}&quot;"/>
+									{% endfor %}
+								</option>
+
+                                {% if opts['common']['warnings.syntaxonly'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.syntax.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.syntax" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.pedantic'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.pedantic.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.pedanticerrors'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.pedantic.error.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic.error" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.nowarn'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.nowarn.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.nowarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.allwarn'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.allwarn.{{u.id}}" name="Enable all common warnings (-Wall)" superClass="gnu.cpp.compiler.option.warnings.allwarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.extrawarn'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.extrawarn.{{u.id}}" name="Enable extra warnings (-Wextra)" superClass="gnu.cpp.compiler.option.warnings.extrawarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.toerrors'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.toerrors.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.toerrors" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.conversion'] %}
+                                <option id="gnu.cpp.compiler.option.warnings.wconversion.{{u.id}}" name="Warn on implicit conversions (-Wconversion)" superClass="gnu.cpp.compiler.option.warnings.wconversion" value="true" valueType="boolean"/>
+                                {% endif %}
+
+                                {% if opts['common']['optimization.lto'] %}
+								<option id="com.crt.advproject.cpp.lto.{{u.id}}" name="Enable Link-time optimization (-flto)" superClass="com.crt.advproject.cpp.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['optimization.lto_objects'] %}
+								<option id="com.crt.advproject.cpp.lto.fat.{{u.id}}" name="Fat lto objects (-ffat-lto-objects)" superClass="com.crt.advproject.cpp.lto.fat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+
+								{% if opts['cpp']['verbose'] %}
+   								<option id="gnu.cpp.compiler.option.other.verbose.{{u.id}}" name="Verbose (-v)" superClass="gnu.cpp.compiler.option.other.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['arm.target.fpu.unit_nxp'] %}
+   								<option id="com.crt.advproject.cpp.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.cpp.fpu" useByScannerDiscovery="false" value="com.crt.advproject.cpp.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
+                                {% endif %}
+								<option id="gnu.cpp.compiler.option.other.other.{{u.id}}" superClass="gnu.cpp.compiler.option.other.other" useByScannerDiscovery="false" value="-c {{opts['cpp']['other']}} {{opts['common']['warnings.other']}}" valueType="string"/>
+								<inputType id="com.crt.advproject.compiler.cpp.input.{{opts['uid']['tool_cpp_compiler_input']}}" superClass="com.crt.advproject.compiler.cpp.input"/>
+							</tool>
+
+							<tool id="com.crt.advproject.gcc.exe.{{opts['id']}}.{{opts['uid']['tool_c_compiler']}}" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.{{opts['id']}}">
+								<option id="com.crt.advproject.gcc.hdrlib.{{u.id}}" name="Library headers" superClass="com.crt.advproject.gcc.hdrlib"  value="com.crt.advproject.gcc.hdrlib.newlibnano" valueType="enumerated"/>
+								<option id="com.crt.advproject.gcc.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.gcc.specs"  value="com.crt.advproject.gcc.specs.newlibnano" valueType="enumerated"/>
+								<option id="com.crt.advproject.gcc.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.gcc.arch"  value="com.crt.advproject.gcc.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
+                                {% if opts['common']['optimization.level'] != '' %}
+								<option id="com.crt.advproject.gcc.exe.{{opts['id']}}.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="com.crt.advproject.gcc.exe.{{opts['id']}}.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.{{opts['common']['optimization.level']}}" valueType="enumerated"/>
+                                {% endif %}
+								<option id="gnu.c.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['c']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
+
+								{% if opts['c']['compiler.std'] %}
+								<option id="com.crt.advproject.c.misc.dialect.{{u.id}}" name="Language standard" superClass="com.crt.advproject.c.misc.dialect" useByScannerDiscovery="true" value="com.crt.advproject.misc.dialect.{{opts['c']['compiler.std']}}" valueType="enumerated"/>
+								{% endif %}
+								<option id="gnu.c.compiler.option.preprocessor.def.symbols.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols"  valueType="definedSymbols">
+									{% for s in opts['c']['defines'] %}
+										<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.c.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths"  valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.c.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.c.compiler.option.include.files"  valueType="includeFiles">
+									{% for file in opts['common']['include_files'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{file}}&quot;"/>
+									{% endfor %}
+								</option>
+
+                                {% if opts['common']['warnings.syntaxonly'] %}
+                                <option id="gnu.c.compiler.option.warnings.syntax.{{u.id}}" superClass="gnu.c.compiler.option.warnings.syntax" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.pedantic'] %}
+                                <option id="gnu.c.compiler.option.warnings.pedantic.{{u.id}}" superClass="gnu.c.compiler.option.warnings.pedantic" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.pedanticerrors'] %}
+                                <option id="gnu.c.compiler.option.warnings.pedantic.error.{{u.id}}" superClass="gnu.c.compiler.option.warnings.pedantic.error" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.nowarn'] %}
+                                <option id="gnu.c.compiler.option.warnings.nowarn.{{u.id}}" superClass="gnu.c.compiler.option.warnings.nowarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.allwarn'] %}
+                                <option id="gnu.c.compiler.option.warnings.allwarn.{{u.id}}" name="Enable all common warnings (-Wall)" superClass="gnu.c.compiler.option.warnings.allwarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.extrawarn'] %}
+                                <option id="gnu.c.compiler.option.warnings.extrawarn.{{u.id}}" name="Enable extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.toerrors'] %}
+                                <option id="gnu.c.compiler.option.warnings.toerrors.{{u.id}}" superClass="gnu.c.compiler.option.warnings.toerrors" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['warnings.conversion'] %}
+                                <option id="gnu.c.compiler.option.warnings.wconversion.{{u.id}}" name="Warn on implicit conversions (-Wconversion)" superClass="gnu.c.compiler.option.warnings.wconversion" value="true" valueType="boolean"/>
+                                {% endif %}
+								{% if opts['c']['verbose'] %}
+								<option id="gnu.c.compiler.option.misc.verbose.{{u.id}}" name="Verbose (-v)" superClass="gnu.c.compiler.option.misc.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['arm.target.fpu.unit_nxp'] %}
+								<option id="com.crt.advproject.gcc.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.gcc.fpu" useByScannerDiscovery="false" value="com.crt.advproject.gcc.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
+                                {% endif %}
+
+                                {% if opts['common']['optimization.lto'] %}
+								<option id="com.crt.advproject.gcc.lto.{{u.id}}" name="Enable Link-time optimization (-flto)" superClass="com.crt.advproject.gcc.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+                                {% if opts['common']['optimization.lto_objects'] %}
+								<option id="com.crt.advproject.gcc.lto.fat.{{u.id}}" name="Fat lto objects (-ffat-lto-objects)" superClass="com.crt.advproject.gcc.lto.fat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+
+								<option id="gnu.c.compiler.option.misc.other.{{u.id}}" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c {{opts['c']['other']}} {{opts['common']['warnings.other']}}" valueType="string"/>
+								<inputType id="com.crt.advproject.compiler.input.{{opts['uid']['tool_c_compiler']}}" superClass="com.crt.advproject.compiler.input"/>
+							</tool>
+
+							<tool id="com.crt.advproject.gas.exe.{{opts['id']}}.{{u.id}}" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.{{opts['id']}}">
+								<option id="com.crt.advproject.gas.hdrlib.{{u.id}}" name="Library headers" superClass="com.crt.advproject.gas.hdrlib"  value="com.crt.advproject.gas.hdrlib.newlibnano" valueType="enumerated"/>
+								<option id="com.crt.advproject.gas.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.gas.specs"  value="com.crt.advproject.gas.specs.newlibnano" valueType="enumerated"/>
+								<option id="com.crt.advproject.gas.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.gas.arch"  value="com.crt.advproject.gas.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
+								<option id="gnu.both.asm.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths"  valueType="includePath">
+									{% for path in opts['common']['include_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
+                                {% if opts['common']['arm.target.fpu.unit_nxp'] %}
+								<option id="com.crt.advproject.gas.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.gas.fpu" useByScannerDiscovery="false" value="com.crt.advproject.gas.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
+                                {% endif %}
+								<option id="gnu.both.asm.option.flags.crt.{{u.id}}" superClass="gnu.both.asm.option.flags.crt" useByScannerDiscovery="false" value="-c {{opts['as']['other']}}" valueType="string"/>
+								{% if opts['as']['verbose'] %}
+								<option id="gnu.both.asm.option.version.{{u.id}}" superClass="gnu.both.asm.option.version" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+                                {% endif %}
+								<inputType id="com.crt.advproject.assembler.input.{{u.id}}" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
+							</tool>
+
+							<tool commandLinePattern="${COMMAND} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS} ${FLAGS}" id="com.crt.advproject.link.cpp.exe.{{opts['id']}}.{{u.id}}" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.{{opts['id']}}">
+								<option defaultValue="com.crt.advproject.heapAndStack.lpcXpressoStyle.cpp" id="com.crt.advproject.link.memory.heapAndStack.style.cpp.{{u.id}}" name="Heap and Stack placement" superClass="com.crt.advproject.link.memory.heapAndStack.style.cpp" useByScannerDiscovery="false" value="com.crt.advproject.heapAndStack.lpcXpressoStyle.cpp" valueType="enumerated"/>
+								<option id="com.crt.advproject.link.memory.heapAndStack.cpp.{{u.id}}" name="Heap and Stack options" superClass="com.crt.advproject.link.memory.heapAndStack.cpp" useByScannerDiscovery="false" value="&amp;Heap:Default;Post Data;Default&amp;Stack:Default;End;Default" valueType="string"/>
+								<option id="com.crt.advproject.link.cpp.multicore.master.{{u.id}}" name="Multicore master" superClass="com.crt.advproject.link.cpp.multicore.master" useByScannerDiscovery="false"/>
+								<option id="com.crt.advproject.link.cpp.multicore.master.userobjs.{{u.id}}" name="Slave Objects (not visible)" superClass="com.crt.advproject.link.cpp.multicore.master.userobjs" useByScannerDiscovery="false" valueType="userObjs"/>
+								<option id="com.crt.advproject.link.cpp.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" useByScannerDiscovery="false" value="com.crt.advproject.link.cpp.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
+								<option id="gnu.cpp.link.option.paths.{{u.id}}" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" useByScannerDiscovery="false">
+									{% for path in opts['ld']['library_paths'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.cpp.link.option.libs.{{u.id}}" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" useByScannerDiscovery="false" valueType="libs">
+                                    {% for lib in opts['ld']['user_libraries'] %}
+									<listOptionValue builtIn="false" value="{{lib}}"/>
+									{% endfor %}
+									{% for lib in opts['ld']['system_libraries'] %}
+									<listOptionValue builtIn="false" value="{{lib}}"/>
+									{% endfor %}
+								</option>
+								<option id="gnu.cpp.link.option.userobjs.{{u.id}}" name="Other objects" superClass="gnu.cpp.link.option.userobjs" useByScannerDiscovery="false">
+									{% for path in opts['ld']['object_files'] %}
+									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+
+								<option id="gnu.cpp.link.option.other.{{u.id}}" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other"  useByScannerDiscovery="false" valueType="stringList">
+									<listOptionValue builtIn="false" value="-Map=&quot;${BuildArtifactFileBaseName}.map&quot;"/>
+									<listOptionValue builtIn="false" value="-print-memory-usage"/>
+                                    {% if opts['ld']['gcsections'] %}
+                                    <listOptionValue builtIn="false" value="--gc-sections"/>
+                                    {% endif %}
+									{% for opt in opts['ld']['flags'] %}
+									<listOptionValue builtIn="false" value="{{opt}}"/>
+									{% endfor %}
+								</option>
+
+								{% if opts['ld']['nostart'] %}
+								<option id="gnu.cpp.link.option.nostart.{{u.id}}" name="Do not use standard start files (-nostartfiles)" superClass="gnu.cpp.link.option.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nodeflibs'] %}
+								<option id="gnu.cpp.link.option.nodeflibs.{{u.id}}" name="Do not use default libraries (-nodefaultlibs)" superClass="gnu.cpp.link.option.nodeflibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nostdlibs'] %}
+								<option id="gnu.cpp.link.option.nostdlibs.{{u.id}}" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['other'] != '' %}
+								<option id="gnu.cpp.link.option.flags.{{u.id}}" superClass="gnu.cpp.link.option.flags" useByScannerDiscovery="false"  value="{{opts['ld']['other']}}" valueType="string"/>
+								{% endif %}
+
+                                {% if opts['common']['optimization.lto'] %}
+								<option id="com.crt.advproject.link.cpp.lto.{{u.id}}" superClass="com.crt.advproject.link.cpp.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+
+								<option id="com.crt.advproject.link.cpp.script.{{u.id}}" name="Linker script" superClass="com.crt.advproject.link.cpp.script" useByScannerDiscovery="false" value="${ProjDirPath}/{{opts['name']}}/{{opts['ld']['script']}}"  valueType="string"/>
+
+                                <option id="com.crt.advproject.link.cpp.multicore.slave.{{u.id}}" name="Multicore configuration" superClass="com.crt.advproject.link.cpp.multicore.slave" useByScannerDiscovery="false"/>
+                                {% if opts['common']['arm.target.fpu.unit_nxp'] %}
+								<option id="com.crt.advproject.link.cpp.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" useByScannerDiscovery="false" value="com.crt.advproject.link.cpp.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
+                                {% endif %}
+								<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+
+							<tool id="com.crt.advproject.link.exe.{{opts['id']}}.{{u.id}}" name="MCU Linker" superClass="com.crt.advproject.link.exe.{{opts['id']}}"/>
+
+                            </toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="{{opts['common']['excluded_folders']}}" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		{% endfor %}
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="{{name}}.com.crt.advproject.projecttype.exe.{{u.id}}" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="com.crt.config">
+		<projectStorage>{% block cpu_config %}{% endblock %}</projectStorage>
+	</storageModule>
+	<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
+		<sdkName>{% block sdk_name %}{% endblock %}</sdkName>
+		<sdkVersion>{% block sdk_version %}{% endblock %}</sdkVersion>
+	</storageModule>
+	<storageModule moduleId="com.crt.advproject"/>
+</cproject>

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/.project.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Generated by the GNU ARM Eclipse exporter from an mBed project. -->
+<projectDescription>
+	<name>{{name}}</name>
+	<comment>This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-GNU-ARM-Eclipse</comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/K64F_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,98 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_3="NXP" property_4="MK64FN1M0xxx12" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="MK64FN1M0xxx12" name="MK64FN1M0xxx12"><chip><name>MK64FN1M0xxx12</name>
+<family>K6x</family>
+<vendor>NXP</vendor>
+<memory can_program="true" id="Flash" is_ro="true" size="1024" type="Flash"/>
+<memory id="RAM" size="256" type="RAM"/>
+<memoryInstance derived_from="Flash" driver="FTFE_4K.cfx" id="PROGRAM_FLASH" location="0x0" size="0x100000"/>
+<memoryInstance derived_from="RAM" id="SRAM_UPPER" location="0x20000000" size="0x30000"/>
+<memoryInstance derived_from="RAM" id="SRAM_LOWER" location="0x1fff0000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="FLEX_RAM" location="0x14000000" size="0x1000"/>
+<peripheralInstance derived_from="FTFE_FlashConfig" id="FTFE_FlashConfig" location="0x400"/>
+<peripheralInstance derived_from="AIPS0" id="AIPS0" location="0x40000000"/>
+<peripheralInstance derived_from="AIPS1" id="AIPS1" location="0x40080000"/>
+<peripheralInstance derived_from="AXBS" id="AXBS" location="0x40004000"/>
+<peripheralInstance derived_from="DMA" id="DMA" location="0x40008000"/>
+<peripheralInstance derived_from="FB" id="FB" location="0x4000C000"/>
+<peripheralInstance derived_from="SYSMPU" id="SYSMPU" location="0x4000D000"/>
+<peripheralInstance derived_from="FMC" id="FMC" location="0x4001F000"/>
+<peripheralInstance derived_from="FTFE" id="FTFE" location="0x40020000"/>
+<peripheralInstance derived_from="DMAMUX" id="DMAMUX" location="0x40021000"/>
+<peripheralInstance derived_from="CAN0" id="CAN0" location="0x40024000"/>
+<peripheralInstance derived_from="RNG" id="RNG" location="0x40029000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x4002C000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4002D000"/>
+<peripheralInstance derived_from="SPI2" id="SPI2" location="0x400AC000"/>
+<peripheralInstance derived_from="I2S0" id="I2S0" location="0x4002F000"/>
+<peripheralInstance derived_from="CRC" id="CRC" location="0x40032000"/>
+<peripheralInstance derived_from="USBDCD" id="USBDCD" location="0x40035000"/>
+<peripheralInstance derived_from="PDB0" id="PDB0" location="0x40036000"/>
+<peripheralInstance derived_from="PIT" id="PIT" location="0x40037000"/>
+<peripheralInstance derived_from="FTM0" id="FTM0" location="0x40038000"/>
+<peripheralInstance derived_from="FTM1" id="FTM1" location="0x40039000"/>
+<peripheralInstance derived_from="FTM2" id="FTM2" location="0x4003A000"/>
+<peripheralInstance derived_from="FTM3" id="FTM3" location="0x400B9000"/>
+<peripheralInstance derived_from="ADC0" id="ADC0" location="0x4003B000"/>
+<peripheralInstance derived_from="ADC1" id="ADC1" location="0x400BB000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x4003D000"/>
+<peripheralInstance derived_from="RFVBAT" id="RFVBAT" location="0x4003E000"/>
+<peripheralInstance derived_from="LPTMR0" id="LPTMR0" location="0x40040000"/>
+<peripheralInstance derived_from="RFSYS" id="RFSYS" location="0x40041000"/>
+<peripheralInstance derived_from="SIM" id="SIM" location="0x40047000"/>
+<peripheralInstance derived_from="PORTA" id="PORTA" location="0x40049000"/>
+<peripheralInstance derived_from="PORTB" id="PORTB" location="0x4004A000"/>
+<peripheralInstance derived_from="PORTC" id="PORTC" location="0x4004B000"/>
+<peripheralInstance derived_from="PORTD" id="PORTD" location="0x4004C000"/>
+<peripheralInstance derived_from="PORTE" id="PORTE" location="0x4004D000"/>
+<peripheralInstance derived_from="WDOG" id="WDOG" location="0x40052000"/>
+<peripheralInstance derived_from="EWM" id="EWM" location="0x40061000"/>
+<peripheralInstance derived_from="CMT" id="CMT" location="0x40062000"/>
+<peripheralInstance derived_from="MCG" id="MCG" location="0x40064000"/>
+<peripheralInstance derived_from="OSC" id="OSC" location="0x40065000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40066000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40067000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400E6000"/>
+<peripheralInstance derived_from="UART0" id="UART0" location="0x4006A000"/>
+<peripheralInstance derived_from="UART1" id="UART1" location="0x4006B000"/>
+<peripheralInstance derived_from="UART2" id="UART2" location="0x4006C000"/>
+<peripheralInstance derived_from="UART3" id="UART3" location="0x4006D000"/>
+<peripheralInstance derived_from="UART4" id="UART4" location="0x400EA000"/>
+<peripheralInstance derived_from="UART5" id="UART5" location="0x400EB000"/>
+<peripheralInstance derived_from="USB0" id="USB0" location="0x40072000"/>
+<peripheralInstance derived_from="CMP0" id="CMP0" location="0x40073000"/>
+<peripheralInstance derived_from="CMP1" id="CMP1" location="0x40073008"/>
+<peripheralInstance derived_from="CMP2" id="CMP2" location="0x40073010"/>
+<peripheralInstance derived_from="VREF" id="VREF" location="0x40074000"/>
+<peripheralInstance derived_from="LLWU" id="LLWU" location="0x4007C000"/>
+<peripheralInstance derived_from="PMC" id="PMC" location="0x4007D000"/>
+<peripheralInstance derived_from="SMC" id="SMC" location="0x4007E000"/>
+<peripheralInstance derived_from="RCM" id="RCM" location="0x4007F000"/>
+<peripheralInstance derived_from="SDHC" id="SDHC" location="0x400B1000"/>
+<peripheralInstance derived_from="ENET" id="ENET" location="0x400C0000"/>
+<peripheralInstance derived_from="DAC0" id="DAC0" location="0x400CC000"/>
+<peripheralInstance derived_from="DAC1" id="DAC1" location="0x400CD000"/>
+<peripheralInstance derived_from="GPIOA" id="GPIOA" location="0x400FF000"/>
+<peripheralInstance derived_from="GPIOB" id="GPIOB" location="0x400FF040"/>
+<peripheralInstance derived_from="GPIOC" id="GPIOC" location="0x400FF080"/>
+<peripheralInstance derived_from="GPIOD" id="GPIOD" location="0x400FF0C0"/>
+<peripheralInstance derived_from="GPIOE" id="GPIOE" location="0x400FF100"/>
+<peripheralInstance derived_from="SystemControl" id="SystemControl" location="0xE000E000"/>
+<peripheralInstance derived_from="SysTick" id="SysTick" location="0xE000E010"/>
+<peripheralInstance derived_from="NVIC" id="NVIC" location="0xE000E100"/>
+<peripheralInstance derived_from="MCM" id="MCM" location="0xE0080000"/>
+<peripheralInstance derived_from="CAU" id="CAU" location="0xE0081000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="MK64F12_internal_peripheral.xml" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}
+
+{% block sdk_name %}SDK_2.x_FRDM-K64F{% endblock %}
+{% block sdk_version %}2.2.0{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC11U37H_401_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,46 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_2="LPC11_12_13_128K_8K.cfx" property_3="NXP" property_4="LPC11U37H/401" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC11U37H/401" flash_driver="LPC11_12_13_128K_8K.cfx" match_id="0x0" name="LPC11U37H/401" stub="crt_emu_lpc11_13_nxp"><chip><name>LPC11U37H/401</name>
+<family>LPC11Uxx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash128" location="0x0" size="0x20000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
+<memoryInstance derived_from="RAM" id="RamIoh2" location="0x20000000" size="0x800"/>
+<peripheralInstance derived_from="V6M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART" id="USART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40060000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x50000000"/>
+</chip>
+<processor><name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC1549_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,63 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_2="LPC15xx_256K.cfx" property_3="NXP" property_4="LPC1549" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC1549" connectscript="LPC15RunBootRomConnect.scp" flash_driver="LPC15xx_256K.cfx" match_id="0x0" name="LPC1549" resetscript="LPC15RunBootRomReset.scp" stub="crt_emu_cm3_gen"><chip><name>LPC1549</name>
+<family>LPC15xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
+<memoryInstance derived_from="RAM" id="Ram0_16" location="0x2000000" size="0x4000"/>
+<memoryInstance derived_from="RAM" id="Ram1_16" location="0x2004000" size="0x4000"/>
+<memoryInstance derived_from="RAM" id="Ram2_4" location="0x2008000" size="0x1000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x1c000000"/>
+<peripheralInstance derived_from="DMA" id="DMA" location="0x1c004000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x1c00c000"/>
+<peripheralInstance derived_from="CRC" id="CRC" location="0x1c010000"/>
+<peripheralInstance derived_from="SCT0" id="SCT0" location="0x1c018000"/>
+<peripheralInstance derived_from="SCT1" id="SCT1" location="0x1c01c000"/>
+<peripheralInstance derived_from="SCT2" id="SCT2" location="0x1c020000"/>
+<peripheralInstance derived_from="SCT3" id="SCT3" location="0x1c024000"/>
+<peripheralInstance derived_from="ADC0" id="ADC0" location="0x40000000"/>
+<peripheralInstance derived_from="DAC" id="DAC" location="0x40004000"/>
+<peripheralInstance derived_from="ACMP" id="ACMP" location="0x40008000"/>
+<peripheralInstance derived_from="INMUX" id="INMUX" location="0x40014000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x40028000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4002c000"/>
+<peripheralInstance derived_from="SWM" id="SWM" location="0x40038000"/>
+<peripheralInstance derived_from="PMU" id="PMU" location="0x4003c000"/>
+<peripheralInstance derived_from="USART0" id="USART0" location="0x40040000"/>
+<peripheralInstance derived_from="USART1" id="USART1" location="0x40044000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40048000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4004c000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40050000"/>
+<peripheralInstance derived_from="QEI" id="QEI" location="0x40058000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40074000"/>
+<peripheralInstance derived_from="ADC1" id="ADC1" location="0x40080000"/>
+<peripheralInstance derived_from="MRT" id="MRT" location="0x400a0000"/>
+<peripheralInstance derived_from="PINT" id="PINT" location="0x400a4000"/>
+<peripheralInstance derived_from="GINT0" id="GINT0" location="0x400a8000"/>
+<peripheralInstance derived_from="GINT1" id="GINT1" location="0x400ac000"/>
+<peripheralInstance derived_from="RIT" id="RIT" location="0x400b4000"/>
+<peripheralInstance derived_from="SCTIPU" id="SCTIPU" location="0x400b8000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x400bc000"/>
+<peripheralInstance derived_from="USART2" id="USART2" location="0x400c0000"/>
+<peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400f0000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x400f8000"/>
+</chip>
+<processor><name gcc_name="cortex-m3">Cortex-M3</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC15xx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC54114_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,87 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="None" property_2="LPC5411x_256K.cfx" property_3="NXP" property_4="LPC54114J256" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC54114J256" flash_driver="LPC5411x_256K.cfx" match_id="0x0" name="LPC54114J256" stub="crt_emu_cm3_gen"><chip><name>LPC54114J256</name>
+<family>LPC5411x</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
+<memoryInstance derived_from="RAM" id="Ram0_64" location="0x20000000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="Ram1_64" location="0x20010000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="Ram2_32" location="0x20020000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamX_32" location="0x4000000" size="0x8000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40000000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40001000"/>
+<peripheralInstance derived_from="GINT0" id="GINT0" location="0x40002000"/>
+<peripheralInstance derived_from="GINT1" id="GINT1" location="0x40003000"/>
+<peripheralInstance derived_from="PINT" id="PINT" location="0x40004000"/>
+<peripheralInstance derived_from="INPUT-MUX" id="INPUT-MUX" location="0x40005000"/>
+<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40008000"/>
+<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40009000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4000c000"/>
+<peripheralInstance derived_from="MRT" id="MRT" location="0x4000d000"/>
+<peripheralInstance derived_from="UTICK" id="UTICK" location="0x4000e000"/>
+<peripheralInstance derived_from="CT32B2" id="CT32B2" location="0x40028000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x4002c000"/>
+<peripheralInstance derived_from="CT32B3" id="CT32B3" location="0x40048000"/>
+<peripheralInstance derived_from="CT32B4" id="CT32B4" location="0x40049000"/>
+<peripheralInstance derived_from="DMA" id="DMA" location="0x40082000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x40084000"/>
+<peripheralInstance derived_from="SCT" id="SCT" location="0x40085000"/>
+<peripheralInstance derived_from="FLEXCOMM0" id="FLEXCOMM0" location="0x40086000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40086000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40086000"/>
+<peripheralInstance derived_from="USART0" id="USART0" location="0x40086000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40087000"/>
+<peripheralInstance derived_from="FLEXCOMM1" id="FLEXCOMM1" location="0x40087000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x40087000"/>
+<peripheralInstance derived_from="USART1" id="USART1" location="0x40087000"/>
+<peripheralInstance derived_from="SPI2" id="SPI2" location="0x40088000"/>
+<peripheralInstance derived_from="FLEXCOMM2" id="FLEXCOMM2" location="0x40088000"/>
+<peripheralInstance derived_from="USART2" id="USART2" location="0x40088000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40088000"/>
+<peripheralInstance derived_from="FLEXCOMM3" id="FLEXCOMM3" location="0x40089000"/>
+<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40089000"/>
+<peripheralInstance derived_from="USART3" id="USART3" location="0x40089000"/>
+<peripheralInstance derived_from="SPI3" id="SPI3" location="0x40089000"/>
+<peripheralInstance derived_from="FLEXCOMM4" id="FLEXCOMM4" location="0x4008a000"/>
+<peripheralInstance derived_from="SPI4" id="SPI4" location="0x4008a000"/>
+<peripheralInstance derived_from="USART4" id="USART4" location="0x4008a000"/>
+<peripheralInstance derived_from="I2C4" id="I2C4" location="0x4008a000"/>
+<peripheralInstance derived_from="MAILBOX" id="MAILBOX" location="0x4008b000"/>
+<peripheralInstance derived_from="GPIO" id="GPIO" location="0x4008c000"/>
+<peripheralInstance derived_from="DMIC" id="DMIC" location="0x40090000"/>
+<peripheralInstance derived_from="CRC-ENGINE" id="CRC-ENGINE" location="0x40095000"/>
+<peripheralInstance derived_from="I2C6" id="I2C6" location="0x40096000"/>
+<peripheralInstance derived_from="USART7" id="USART7" location="0x40096000"/>
+<peripheralInstance derived_from="SPI6" id="SPI6" location="0x40096000"/>
+<peripheralInstance derived_from="I2C5" id="I2C5" location="0x40096000"/>
+<peripheralInstance derived_from="SPI5" id="SPI5" location="0x40096000"/>
+<peripheralInstance derived_from="SPI7" id="SPI7" location="0x40096000"/>
+<peripheralInstance derived_from="FLEXCOMM5" id="FLEXCOMM5" location="0x40096000"/>
+<peripheralInstance derived_from="USART6" id="USART6" location="0x40096000"/>
+<peripheralInstance derived_from="USART5" id="USART5" location="0x40096000"/>
+<peripheralInstance derived_from="I2C7" id="I2C7" location="0x40096000"/>
+<peripheralInstance derived_from="FLEXCOMM6" id="FLEXCOMM6" location="0x40097000"/>
+<peripheralInstance derived_from="I2S0" id="I2S0" location="0x40097000"/>
+<peripheralInstance derived_from="I2S1" id="I2S1" location="0x40098000"/>
+<peripheralInstance derived_from="FLEXCOMM7" id="FLEXCOMM7" location="0x40098000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x400a0000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC5411x_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC54608_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,106 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_3="NXP" property_4="LPC54608J512" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC54608J512" name="LPC54608J512"><chip><name>LPC54608J512</name>
+<family>LPC546xx</family>
+<vendor>NXP</vendor>
+<memory can_program="true" id="Flash" is_ro="true" size="512" type="Flash"/>
+<memory id="RAM" size="200" type="RAM"/>
+<memoryInstance derived_from="Flash" driver="LPC5460x_512K.cfx" id="PROGRAM_FLASH" location="0x0" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="SRAM_0_1_2_3" location="0x20000000" size="0x28000"/>
+<memoryInstance derived_from="RAM" id="SRAMX" location="0x4000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="USB_RAM" location="0x40100000" size="0x2000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40000000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40001000"/>
+<peripheralInstance derived_from="GINT0" id="GINT0" location="0x40002000"/>
+<peripheralInstance derived_from="GINT1" id="GINT1" location="0x40003000"/>
+<peripheralInstance derived_from="PINT" id="PINT" location="0x40004000"/>
+<peripheralInstance derived_from="INPUTMUX" id="INPUTMUX" location="0x40005000"/>
+<peripheralInstance derived_from="CTIMER0" id="CTIMER0" location="0x40008000"/>
+<peripheralInstance derived_from="CTIMER1" id="CTIMER1" location="0x40009000"/>
+<peripheralInstance derived_from="CTIMER2" id="CTIMER2" location="0x40028000"/>
+<peripheralInstance derived_from="CTIMER3" id="CTIMER3" location="0x40048000"/>
+<peripheralInstance derived_from="CTIMER4" id="CTIMER4" location="0x40049000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4000C000"/>
+<peripheralInstance derived_from="MRT0" id="MRT0" location="0x4000D000"/>
+<peripheralInstance derived_from="UTICK0" id="UTICK0" location="0x4000E000"/>
+<peripheralInstance derived_from="EEPROM" id="EEPROM" location="0x40014000"/>
+<peripheralInstance derived_from="OTPC" id="OTPC" location="0x40015000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x4002C000"/>
+<peripheralInstance derived_from="RIT" id="RIT" location="0x4002D000"/>
+<peripheralInstance derived_from="FMC" id="FMC" location="0x40034000"/>
+<peripheralInstance derived_from="SMARTCARD0" id="SMARTCARD0" location="0x40036000"/>
+<peripheralInstance derived_from="SMARTCARD1" id="SMARTCARD1" location="0x40037000"/>
+<peripheralInstance derived_from="ASYNC_SYSCON" id="ASYNC_SYSCON" location="0x40040000"/>
+<peripheralInstance derived_from="SPIFI0" id="SPIFI0" location="0x40080000"/>
+<peripheralInstance derived_from="EMC" id="EMC" location="0x40081000"/>
+<peripheralInstance derived_from="DMA0" id="DMA0" location="0x40082000"/>
+<peripheralInstance derived_from="LCD" id="LCD" location="0x40083000"/>
+<peripheralInstance derived_from="USB0" id="USB0" location="0x40084000"/>
+<peripheralInstance derived_from="SCT0" id="SCT0" location="0x40085000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40086000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x40087000"/>
+<peripheralInstance derived_from="SPI2" id="SPI2" location="0x40088000"/>
+<peripheralInstance derived_from="SPI3" id="SPI3" location="0x40089000"/>
+<peripheralInstance derived_from="SPI4" id="SPI4" location="0x4008A000"/>
+<peripheralInstance derived_from="SPI5" id="SPI5" location="0x40096000"/>
+<peripheralInstance derived_from="SPI6" id="SPI6" location="0x40097000"/>
+<peripheralInstance derived_from="SPI7" id="SPI7" location="0x40098000"/>
+<peripheralInstance derived_from="SPI8" id="SPI8" location="0x40099000"/>
+<peripheralInstance derived_from="SPI9" id="SPI9" location="0x4009A000"/>
+<peripheralInstance derived_from="FLEXCOMM0" id="FLEXCOMM0" location="0x40086000"/>
+<peripheralInstance derived_from="FLEXCOMM1" id="FLEXCOMM1" location="0x40087000"/>
+<peripheralInstance derived_from="FLEXCOMM2" id="FLEXCOMM2" location="0x40088000"/>
+<peripheralInstance derived_from="FLEXCOMM3" id="FLEXCOMM3" location="0x40089000"/>
+<peripheralInstance derived_from="FLEXCOMM4" id="FLEXCOMM4" location="0x4008A000"/>
+<peripheralInstance derived_from="FLEXCOMM5" id="FLEXCOMM5" location="0x40096000"/>
+<peripheralInstance derived_from="FLEXCOMM6" id="FLEXCOMM6" location="0x40097000"/>
+<peripheralInstance derived_from="FLEXCOMM7" id="FLEXCOMM7" location="0x40098000"/>
+<peripheralInstance derived_from="FLEXCOMM8" id="FLEXCOMM8" location="0x40099000"/>
+<peripheralInstance derived_from="FLEXCOMM9" id="FLEXCOMM9" location="0x4009A000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40086000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40087000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40088000"/>
+<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40089000"/>
+<peripheralInstance derived_from="I2C4" id="I2C4" location="0x4008A000"/>
+<peripheralInstance derived_from="I2C5" id="I2C5" location="0x40096000"/>
+<peripheralInstance derived_from="I2C6" id="I2C6" location="0x40097000"/>
+<peripheralInstance derived_from="I2C7" id="I2C7" location="0x40098000"/>
+<peripheralInstance derived_from="I2C8" id="I2C8" location="0x40099000"/>
+<peripheralInstance derived_from="I2C9" id="I2C9" location="0x4009A000"/>
+<peripheralInstance derived_from="USART0" id="USART0" location="0x40086000"/>
+<peripheralInstance derived_from="USART1" id="USART1" location="0x40087000"/>
+<peripheralInstance derived_from="USART2" id="USART2" location="0x40088000"/>
+<peripheralInstance derived_from="USART3" id="USART3" location="0x40089000"/>
+<peripheralInstance derived_from="USART4" id="USART4" location="0x4008A000"/>
+<peripheralInstance derived_from="USART5" id="USART5" location="0x40096000"/>
+<peripheralInstance derived_from="USART6" id="USART6" location="0x40097000"/>
+<peripheralInstance derived_from="USART7" id="USART7" location="0x40098000"/>
+<peripheralInstance derived_from="USART8" id="USART8" location="0x40099000"/>
+<peripheralInstance derived_from="USART9" id="USART9" location="0x4009A000"/>
+<peripheralInstance derived_from="GPIO" id="GPIO" location="0x4008C000"/>
+<peripheralInstance derived_from="DMIC0" id="DMIC0" location="0x40090000"/>
+<peripheralInstance derived_from="ENET" id="ENET" location="0x40092000"/>
+<peripheralInstance derived_from="USBHSD" id="USBHSD" location="0x40094000"/>
+<peripheralInstance derived_from="CRC_ENGINE" id="CRC_ENGINE" location="0x40095000"/>
+<peripheralInstance derived_from="I2S0" id="I2S0" location="0x40097000"/>
+<peripheralInstance derived_from="I2S1" id="I2S1" location="0x40098000"/>
+<peripheralInstance derived_from="SDIF" id="SDIF" location="0x4009B000"/>
+<peripheralInstance derived_from="CAN0" id="CAN0" location="0x4009D000"/>
+<peripheralInstance derived_from="CAN1" id="CAN1" location="0x4009E000"/>
+<peripheralInstance derived_from="ADC0" id="ADC0" location="0x400A0000"/>
+<peripheralInstance derived_from="USBFSH" id="USBFSH" location="0x400A2000"/>
+<peripheralInstance derived_from="USBHSH" id="USBHSH" location="0x400A3000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC54608_internal_peripheral.xml" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}
+
+{% block sdk_name %}SDK_2.x_LPCXpresso54608{% endblock %}
+{% block sdk_version %}2.2.0{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC824_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,51 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"><chip><name>LPC824</name>
+<family>LPC82x</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<peripheralInstance derived_from="V6M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
+<peripheralInstance derived_from="MRT" id="MRT" location="0x40004000"/>
+<peripheralInstance derived_from="WKT" id="WKT" location="0x40008000"/>
+<peripheralInstance derived_from="SWM" id="SWM" location="0x4000c000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" id="PMU" location="0x40020000"/>
+<peripheralInstance derived_from="CMP" id="CMP" location="0x40024000"/>
+<peripheralInstance derived_from="DMATRIGMUX" id="DMATRIGMUX" location="0x40028000"/>
+<peripheralInstance derived_from="INPUTMUX" id="INPUTMUX" location="0x4002c000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40050000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40054000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40058000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4005c000"/>
+<peripheralInstance derived_from="USART0" id="USART0" location="0x40064000"/>
+<peripheralInstance derived_from="USART1" id="USART1" location="0x40068000"/>
+<peripheralInstance derived_from="USART2" id="USART2" location="0x4006c000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40070000"/>
+<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40074000"/>
+<peripheralInstance derived_from="CRC" id="CRC" location="0x50000000"/>
+<peripheralInstance derived_from="SCT" id="SCT" location="0x50004000"/>
+<peripheralInstance derived_from="DMA" id="DMA" location="0x50008000"/>
+<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0xa0000000"/>
+<peripheralInstance derived_from="PIN-INT" id="PIN-INT" location="0xa0004000"/>
+</chip>
+<processor><name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC82x_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,742 @@
+"""
+mbed SDK
+Copyright (c) 2011-2016 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Title: MCUXpresso exporter.
+
+Description: Creates a managed build project that can be imported by
+the MCUXpresso IDE from NXP
+
+Based on GNU ARM Eclipse Exporter from Liviu Ionescu <ilg@livius.net>
+modified for MCUXpresso by Johannes Stratmann <jojos62@online.de>
+"""
+
+import copy
+import tempfile
+import shutil
+
+from subprocess import Popen, PIPE
+from os import getcwd, remove
+from os.path import splitext, basename, exists
+from random import randint
+
+from tools.export.gnuarmeclipse import GNUARMEclipse, UID
+from tools.export.exporters import apply_supported_whitelist
+from tools.targets import TARGET_MAP
+from tools.utils import NotSupportedException
+from tools.build_api import prepare_toolchain
+
+
+# =============================================================================
+
+
+POST_BINARY_WHITELIST = set([
+    "TEENSY3_1Code.binary_hook",
+    "MCU_NRF51Code.binary_hook",
+    "LPCTargetCode.lpc_patch",
+    "LPC4088Code.binary_hook"
+])
+
+class MCUXpresso(GNUARMEclipse):
+    NAME = 'MCUXpresso'
+    TOOLCHAIN = 'GCC_ARM'
+
+    MBED_CONFIG_HEADER_SUPPORTED = True
+
+    @classmethod
+    def is_target_supported(cls, target_name):
+        # targes suppoerted when .cproject templatefile exists
+        if exists(cls.TEMPLATE_DIR + '/mcuxpresso/' + target_name + '_cproject.tmpl'):
+            target = TARGET_MAP[target_name]
+            return apply_supported_whitelist(
+                cls.TOOLCHAIN, POST_BINARY_WHITELIST, target)
+        else:
+            return False
+
+    # override
+    def generate(self):
+        """
+        Generate the .project and .cproject files.
+        """
+        if not self.resources.linker_script:
+            raise NotSupportedException("No linker script found.")
+
+        print
+        print 'Create a GNU ARM Eclipse C++ managed project'
+        print 'Project name: {0}'.format(self.project_name)
+        print 'Target: {0}'.format(self.toolchain.target.name)
+        print 'Toolchain: {0}'.format(self.TOOLCHAIN)
+
+        self.resources.win_to_unix()
+
+        # TODO: use some logger to display additional info if verbose
+
+        self.libraries = []
+        # print 'libraries'
+        # print self.resources.libraries
+        for lib in self.resources.libraries:
+            l, _ = splitext(basename(lib))
+            self.libraries.append(l[3:])
+
+        self.system_libraries = [
+            'stdc++', 'supc++', 'm', 'c', 'gcc', 'nosys'
+        ]
+
+        # Read in all profiles, we'll extract compiler options.
+        profiles = self.get_all_profiles()
+
+        profile_ids = [s.lower() for s in profiles]
+        profile_ids.sort()
+
+        # TODO: get the list from existing .cproject
+        build_folders = [s.capitalize() for s in profile_ids]
+        build_folders.append('BUILD')
+        # print build_folders
+
+        objects = [self.filter_dot(s) for s in self.resources.objects]
+        for bf in build_folders:
+            objects = [o for o in objects if not o.startswith(bf + '/')]
+        # print 'objects'
+        # print objects
+
+        self.compute_exclusions()
+
+        self.include_path = [
+            self.filter_dot(s) for s in self.resources.inc_dirs]
+        print 'Include folders: {0}'.format(len(self.include_path))
+
+        self.as_defines = self.toolchain.get_symbols(True)
+        self.c_defines = self.toolchain.get_symbols()
+        self.cpp_defines = self.c_defines
+        print 'Symbols: {0}'.format(len(self.c_defines))
+
+        self.ld_script = self.filter_dot(
+            self.resources.linker_script)
+        print 'Linker script: {0}'.format(self.ld_script)
+
+        self.options = {}
+        profile_ids.remove('develop')
+        for id in profile_ids:
+
+            # There are 4 categories of options, a category common too
+            # all tools and a specific category for each of the tools.
+            opts = {}
+            opts['common'] = {}
+            opts['as'] = {}
+            opts['c'] = {}
+            opts['cpp'] = {}
+            opts['ld'] = {}
+
+            opts['id'] = id
+            opts['name'] = opts['id'].capitalize()
+
+            print
+            print 'Build configuration: {0}'.format(opts['name'])
+
+            profile = profiles[id]
+
+            # A small hack, do not bother with src_path again,
+            # pass an empty string to avoid crashing.
+            src_paths = ['']
+            target_name = self.toolchain.target.name
+            toolchain = prepare_toolchain(
+                src_paths, "", target_name, self.TOOLCHAIN, build_profile=[profile])
+
+            # Hack to fill in build_dir
+            toolchain.build_dir = self.toolchain.build_dir
+
+            flags = self.toolchain_flags(toolchain)
+
+            print 'Common flags:', ' '.join(flags['common_flags'])
+            print 'C++ flags:', ' '.join(flags['cxx_flags'])
+            print 'C flags:', ' '.join(flags['c_flags'])
+            print 'ASM flags:', ' '.join(flags['asm_flags'])
+            print 'Linker flags:', ' '.join(flags['ld_flags'])
+
+            # Most GNU ARM Eclipse options have a parent,
+            # either debug or release.
+            if '-O0' in flags['common_flags'] or '-Og' in flags['common_flags']:
+                opts['parent_id'] = 'debug'
+            else:
+                opts['parent_id'] = 'release'
+
+            self.process_options(opts, flags)
+
+            opts['as']['defines'] = self.as_defines
+            opts['c']['defines'] = self.c_defines
+            opts['cpp']['defines'] = self.cpp_defines
+
+            opts['common']['include_paths'] = self.include_path
+            opts['common']['excluded_folders'] = '|'.join(
+                self.excluded_folders)
+            self.excluded_folders = [item.replace("\\", "/") for item in self.excluded_folders]
+
+            opts['ld']['library_paths'] = [
+                self.filter_dot(s) for s in self.resources.lib_dirs]
+
+            opts['ld']['object_files'] = objects
+            opts['ld']['user_libraries'] = self.libraries
+            opts['ld']['system_libraries'] = self.system_libraries
+            opts['ld']['script'] = "linker-script-%s.ld" % id
+            opts['cpp_cmd'] = " ".join(toolchain.preproc)
+
+            # Unique IDs used in multiple places.
+            # Those used only once are implemented with {{u.id}}.
+            u = UID()
+            uid = {}
+            uid['config'] = u.id
+            uid['tool_c_compiler'] = u.id
+            uid['tool_c_compiler_input'] = u.id
+            uid['tool_cpp_compiler'] = u.id
+            uid['tool_cpp_compiler_input'] = u.id
+
+            opts['uid'] = uid
+
+            self.options[id] = opts
+
+        jinja_ctx = {
+            'name': self.project_name,
+            'ld_script': self.ld_script,
+
+            # Compiler & linker command line options
+            'options': self.options,
+
+            # Must be an object with an `id` property, which
+            # will be called repeatedly, to generate multiple UIDs.
+            'u': u,
+        }
+
+        self.gen_file('mcuxpresso/.project.tmpl', jinja_ctx,
+                      '.project', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('mcuxpresso/{0}_cproject.tmpl'.format(target_name), jinja_ctx,
+                      '.cproject', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('mcuxpresso/makefile.targets.tmpl', jinja_ctx,
+                      'makefile.targets', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('mcuxpresso/mbedignore.tmpl', jinja_ctx, '.mbedignore')
+
+        print
+        print 'Done. Import the \'{0}\' project in Eclipse.'.format(self.project_name)
+
+    # override
+    @staticmethod
+    def build(project_name, log_name="build_log.txt", cleanup=True):
+        """
+        Headless build an Eclipse project.
+
+        The following steps are performed:
+        - a temporary workspace is created,
+        - the project is imported,
+        - a clean build of all configurations is performed and
+        - the temporary workspace is removed.
+
+        The build results are in the Debug & Release folders.
+
+        All executables (eclipse & toolchain) must be in the PATH.
+
+        The general method to start a headless Eclipse build is:
+
+        $ eclipse \
+        --launcher.suppressErrors \
+        -nosplash \
+        -application org.eclipse.cdt.managedbuilder.core.headlessbuild \
+        -data /path/to/workspace \
+        -import /path/to/project \
+        -cleanBuild "project[/configuration] | all"
+        """
+
+        # TODO: possibly use the log file.
+
+        # Create a temporary folder for the workspace.
+        tmp_folder = tempfile.mkdtemp()
+
+        cmd = [
+            'mcuxpressoide',
+            '--launcher.suppressErrors',
+            '-nosplash',
+            '-application org.eclipse.cdt.managedbuilder.core.headlessbuild',
+            '-data', tmp_folder,
+            '-import', getcwd(),
+            '-cleanBuild', project_name
+        ]
+
+        p = Popen(' '.join(cmd), shell=True, stdout=PIPE, stderr=PIPE)
+        out, err = p.communicate()
+        ret_code = p.returncode
+        stdout_string = "=" * 10 + "STDOUT" + "=" * 10 + "\n"
+        err_string = "=" * 10 + "STDERR" + "=" * 10 + "\n"
+        err_string += err
+        success = any(l.startswith("Finished building target:") for l in out.split("\n"))
+
+        if success:
+            ret_string = "SUCCESS\n"
+        else:
+            ret_string = "FAILURE: build returned %s \n" % ret_code
+
+        print "%s\n%s\n%s\n%s" % (stdout_string, out, err_string, ret_string)
+
+        if log_name:
+            # Write the output to the log file
+            with open(log_name, 'w+') as f:
+                f.write(stdout_string)
+                f.write(out)
+                f.write(err_string)
+                f.write(ret_string)
+
+        # Cleanup the exported and built files
+        if cleanup:
+            if exists(log_name):
+                remove(log_name)
+            remove('.project')
+            remove('.cproject')
+            if exists('Debug'):
+                shutil.rmtree('Debug')
+            if exists('Release'):
+                shutil.rmtree('Release')
+            if exists('makefile.targets'):
+                remove('makefile.targets')
+
+        # Always remove the temporary folder.
+        if exists(tmp_folder):
+            shutil.rmtree(tmp_folder)
+
+        return not(success)
+
+
+    # -------------------------------------------------------------------------
+
+    def process_options(self, opts, flags_in):
+        """
+        CDT managed projects store lots of build options in separate
+        variables, with separate IDs in the .cproject file.
+        When the CDT build is started, all these options are brought
+        together to compose the compiler and linker command lines.
+
+        Here the process is reversed, from the compiler and linker
+        command lines, the options are identified and various flags are
+        set to control the template generation process.
+
+        Once identified, the options are removed from the command lines.
+
+        The options that were not identified are options that do not
+        have CDT equivalents and will be passed in the 'Other options'
+        categories.
+
+        Although this process does not have a very complicated logic,
+        given the large number of explicit configuration options
+        used by the GNU ARM Eclipse managed build plug-in, it is tedious...
+        """
+
+        # Make a copy of the flags, to be one by one removed after processing.
+        flags = copy.deepcopy(flags_in)
+
+        if False:
+            print
+            print 'common_flags', flags['common_flags']
+            print 'asm_flags', flags['asm_flags']
+            print 'c_flags', flags['c_flags']
+            print 'cxx_flags', flags['cxx_flags']
+            print 'ld_flags', flags['ld_flags']
+
+        # Initialise the 'last resort' options where all unrecognised
+        # options will be collected.
+        opts['as']['other'] = ''
+        opts['c']['other'] = ''
+        opts['cpp']['other'] = ''
+        opts['ld']['other'] = ''
+
+        MCPUS = {
+            'Cortex-M0': {'mcpu': 'cortex-m0', 'fpu_unit': None},
+            'Cortex-M0+': {'mcpu': 'cortex-m0plus', 'fpu_unit': None},
+            'Cortex-M1': {'mcpu': 'cortex-m1', 'fpu_unit': None},
+            'Cortex-M3': {'mcpu': 'cortex-m3', 'fpu_unit': None},
+            'Cortex-M4': {'mcpu': 'cortex-m4', 'fpu_unit': None},
+            'Cortex-M4F': {'mcpu': 'cortex-m4', 'fpu_unit': 'fpv4spd16'},
+            'Cortex-M7': {'mcpu': 'cortex-m7', 'fpu_unit': None},
+            'Cortex-M7F': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv4spd16'},
+            'Cortex-M7FD': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv5d16'},
+            'Cortex-A9': {'mcpu': 'cortex-a9', 'fpu_unit': 'vfpv3'}
+        }
+
+        MCPU_NXP = {
+            'cortex-m7' : 'cm7',
+            'cortex-m4' : 'cm4',
+            'cortex-m3' : 'cm3',
+            'cortex-m1' : 'cm1',
+            'cortex-m0' : 'cm0',
+            'cortex-m0.small-multiply' : 'cm0.smallmul',
+            'cortex-m0plus' : 'cm0plus',
+            'cortex-m0plus.small-multiply' : 'cm0plus.smallmul'
+        }
+
+        # Remove options that are supplied by CDT
+        self.remove_option(flags['common_flags'], '-c')
+        self.remove_option(flags['common_flags'], '-MMD')
+
+        # As 'plan B', get the CPU from the target definition.
+        core = self.toolchain.target.core
+
+        opts['common']['arm.target.family'] = None
+
+        # cortex-m0, cortex-m0-small-multiply, cortex-m0plus,
+        # cortex-m0plus-small-multiply, cortex-m1, cortex-m1-small-multiply,
+        # cortex-m3, cortex-m4, cortex-m7.
+        str = self.find_options(flags['common_flags'], '-mcpu=')
+        if str != None:
+            opts['common']['arm.target.family'] = str[len('-mcpu='):]
+            opts['common']['arm.target.family_nxp'] = MCPU_NXP[str[len('-mcpu='):]]
+            self.remove_option(flags['common_flags'], str)
+            self.remove_option(flags['ld_flags'], str)
+        else:
+            if core not in MCPUS:
+                raise NotSupportedException(
+                    'Target core {0} not supported.'.format(core))
+            opts['common']['arm.target.family'] = MCPUS[core]['mcpu']
+
+        opts['common']['arm.target.arch'] = 'none'
+        str = self.find_options(flags['common_flags'], '-march=')
+        arch = str[len('-march='):]
+        archs = {'armv6-m': 'armv6-m', 'armv7-m': 'armv7-m', 'armv7-a': 'armv7-a'}
+        if arch in archs:
+            opts['common']['arm.target.arch'] = archs[arch]
+            self.remove_option(flags['common_flags'], str)
+
+        opts['common']['arm.target.instructionset'] = 'thumb'
+        if '-mthumb' in flags['common_flags']:
+            self.remove_option(flags['common_flags'], '-mthumb')
+            self.remove_option(flags['ld_flags'], '-mthumb')
+        elif '-marm' in flags['common_flags']:
+            opts['common']['arm.target.instructionset'] = 'arm'
+            self.remove_option(flags['common_flags'], '-marm')
+            self.remove_option(flags['ld_flags'], '-marm')
+
+        opts['common']['arm.target.thumbinterwork'] = False
+        if '-mthumb-interwork' in flags['common_flags']:
+            opts['common']['arm.target.thumbinterwork'] = True
+            self.remove_option(flags['common_flags'], '-mthumb-interwork')
+
+        opts['common']['arm.target.endianness'] = None
+        if '-mlittle-endian' in flags['common_flags']:
+            opts['common']['arm.target.endianness'] = 'little'
+            self.remove_option(flags['common_flags'], '-mlittle-endian')
+        elif '-mbig-endian' in flags['common_flags']:
+            opts['common']['arm.target.endianness'] = 'big'
+            self.remove_option(flags['common_flags'], '-mbig-endian')
+
+        opts['common']['arm.target.fpu.unit'] = None
+        opts['common']['arm.target.fpu.unit_nxp'] = None
+        # default, fpv4spd16, fpv5d16, fpv5spd16
+        str = self.find_options(flags['common_flags'], '-mfpu=')
+        if str != None:
+            fpu = str[len('-mfpu='):]
+            fpus = {
+                'fpv4-sp-d16': 'fpv4spd16',
+                'fpv5-d16': 'fpv5d16',
+                'fpv5-sp-d16': 'fpv5spd16'
+            }
+            fpus_nxp = {
+                'fpv4-sp-d16': 'fpv4',
+                'fpv5-d16': 'fpv5dp',
+                'fpv5-sp-d16': 'fpv5sp'
+            }
+            if fpu in fpus:
+                opts['common']['arm.target.fpu.unit'] = fpus[fpu]
+                opts['common']['arm.target.fpu.unit_nxp'] = fpus_nxp[fpu]
+
+                self.remove_option(flags['common_flags'], str)
+                self.remove_option(flags['ld_flags'], str)
+        if opts['common']['arm.target.fpu.unit'] == None:
+            if core not in MCPUS:
+                raise NotSupportedException(
+                    'Target core {0} not supported.'.format(core))
+            if MCPUS[core]['fpu_unit']:
+                opts['common'][
+                    'arm.target.fpu.unit'] = MCPUS[core]['fpu_unit']
+
+        # soft, softfp, hard.
+        str = self.find_options(flags['common_flags'], '-mfloat-abi=')
+        if str != None:
+            opts['common']['arm.target.fpu.abi'] = str[
+                len('-mfloat-abi='):]
+            self.remove_option(flags['common_flags'], str)
+            self.remove_option(flags['ld_flags'], str)
+            if opts['common']['arm.target.fpu.abi'] == 'hard':
+                opts['common']['arm.target.fpu.unit_nxp'] += '.hard'
+
+        # Default optimisation level for Release.
+        opts['common']['optimization.level'] = '-Os'
+
+        # If the project defines an optimisation level, it is used
+        # only for the Release configuration, the Debug one used '-Og'.
+        str = self.find_options(flags['common_flags'], '-O')
+        if str != None:
+            levels = {
+                '-O0': 'none', '-O1': 'optimize', '-O2': 'more',
+                '-O3': 'most', '-Os': 'size', '-Og': 'debug'
+            }
+            if str in levels:
+                opts['common']['optimization.level'] = levels[str]
+                self.remove_option(flags['common_flags'], str)
+
+        include_files = []
+        for all_flags in [flags['common_flags'], flags['c_flags'], flags['cxx_flags']]:
+            while '-include' in all_flags:
+                ix = all_flags.index('-include')
+                str = all_flags[ix + 1]
+                if str not in include_files:
+                    include_files.append(str)
+                self.remove_option(all_flags, '-include')
+                self.remove_option(all_flags, str)
+
+        opts['common']['include_files'] = include_files
+
+        if '-ansi' in flags['c_flags']:
+            opts['c']['compiler.std'] = '-ansi'
+            self.remove_option(flags['c_flags'], str)
+        else:
+            str = self.find_options(flags['c_flags'], '-std')
+            std = str[len('-std='):]
+            c_std = {
+                'c90': 'c90', 'c89': 'c90', 'gnu90': 'gnu90', 'gnu89': 'gnu90',
+                'c99': 'c99', 'c9x': 'c99', 'gnu99': 'gnu99', 'gnu9x': 'gnu98',
+                'c11': 'c11', 'c1x': 'c11', 'gnu11': 'gnu11', 'gnu1x': 'gnu11'
+            }
+            if std in c_std:
+                opts['c']['compiler.std'] = c_std[std]
+                self.remove_option(flags['c_flags'], str)
+
+        if '-ansi' in flags['cxx_flags']:
+            opts['cpp']['compiler.std'] = '-ansi'
+            self.remove_option(flags['cxx_flags'], str)
+        else:
+            str = self.find_options(flags['cxx_flags'], '-std')
+            std = str[len('-std='):]
+            cpp_std = {
+                'c++98': 'cpp98', 'c++03': 'cpp03',
+                'gnu++98': 'gnupp98', 'gnu++03': 'gnupp03',
+                'c++0x': 'cpp03', 'gnu++0x': 'gnupp03',
+                'c++11': 'cpp11', 'gnu++11': 'gnupp11',
+                'c++1y': 'cpp11', 'gnu++1y': 'gnupp11',
+                'c++14': 'cpp14', 'gnu++14': 'gnupp14',
+                'c++1z': 'cpp1z', 'gnu++1z': 'gnupp1z',
+            }
+            if std in cpp_std:
+                opts['cpp']['compiler.std'] = cpp_std[std]
+                self.remove_option(flags['cxx_flags'], str)
+
+        # Common optimisation options.
+        optimization_options = {
+            '-flto': 'optimization.lto',
+            '--ffat-lto-objects': 'optimization.lto_objects'
+        }
+        for option in optimization_options:
+            opts['common'][optimization_options[option]] = False
+            if option in flags['common_flags']:
+                opts['common'][optimization_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        # Common warning options.
+        warning_options = {
+            '-fsyntax-only': 'warnings.syntaxonly',
+            '-pedantic': 'warnings.pedantic',
+            '-pedantic-errors': 'warnings.pedanticerrors',
+            '-w': 'warnings.nowarn',
+            '-Wall': 'warnings.allwarn',
+            '-Wextra': 'warnings.extrawarn',
+            '-Wconversion': 'warnings.conversion',
+            '-Werror': 'warnings.toerrors',
+        }
+
+        for option in warning_options:
+            opts['common'][warning_options[option]] = False
+            if option in flags['common_flags']:
+                opts['common'][warning_options[option]] = True
+                self.remove_option(flags['common_flags'], option)
+
+        # Common debug options.
+        debug_levels = {
+            '-g': 'default',
+            '-g1': 'minimal',
+            '-g3': 'max',
+        }
+        opts['common']['debugging.level'] = 'none'
+        for option in debug_levels:
+            if option in flags['common_flags']:
+                opts['common'][
+                    'debugging.level'] = debug_levels[option]
+                self.remove_option(flags['common_flags'], option)
+
+
+        opts['common']['debugging.prof'] = False
+        if '-p' in flags['common_flags']:
+            opts['common']['debugging.prof'] = True
+            self.remove_option(flags['common_flags'], '-p')
+
+        opts['common']['debugging.gprof'] = False
+        if '-pg' in flags['common_flags']:
+            opts['common']['debugging.gprof'] = True
+            self.remove_option(flags['common_flags'], '-gp')
+
+        # Assembler options.
+        opts['as']['usepreprocessor'] = False
+        while '-x' in flags['asm_flags']:
+            ix = flags['asm_flags'].index('-x')
+            str = flags['asm_flags'][ix + 1]
+
+            if str == 'assembler-with-cpp':
+                opts['as']['usepreprocessor'] = True
+            else:
+                # Collect all other assembler options.
+                opts['as']['other'] += ' -x ' + str
+
+            self.remove_option(flags['asm_flags'], '-x')
+            self.remove_option(flags['asm_flags'], 'assembler-with-cpp')
+
+        opts['as']['nostdinc'] = False
+        if '-nostdinc' in flags['asm_flags']:
+            opts['as']['nostdinc'] = True
+            self.remove_option(flags['asm_flags'], '-nostdinc')
+
+        opts['as']['verbose'] = False
+        if '-v' in flags['asm_flags']:
+            opts['as']['verbose'] = True
+            self.remove_option(flags['asm_flags'], '-v')
+
+        # C options.
+        opts['c']['nostdinc'] = False
+        if '-nostdinc' in flags['c_flags']:
+            opts['c']['nostdinc'] = True
+            self.remove_option(flags['c_flags'], '-nostdinc')
+
+        opts['c']['verbose'] = False
+        if '-v' in flags['c_flags']:
+            opts['c']['verbose'] = True
+            self.remove_option(flags['c_flags'], '-v')
+
+
+        # C++ options.
+        opts['cpp']['nostdinc'] = False
+        if '-nostdinc' in flags['cxx_flags']:
+            opts['cpp']['nostdinc'] = True
+            self.remove_option(flags['cxx_flags'], '-nostdinc')
+
+        opts['cpp']['nostdincpp'] = False
+        if '-nostdinc++' in flags['cxx_flags']:
+            opts['cpp']['nostdincpp'] = True
+            self.remove_option(flags['cxx_flags'], '-nostdinc++')
+
+        optimization_options = {
+            '-fno-exceptions': 'optimization.noexceptions',
+            '-fno-rtti': 'optimization.nortti',
+            '-fno-use-cxa-atexit': 'optimization.nousecxaatexit',
+            '-fno-threadsafe-statics': 'optimization.nothreadsafestatics',
+        }
+
+        for option in optimization_options:
+            opts['cpp'][optimization_options[option]] = False
+            if option in flags['cxx_flags']:
+                opts['cpp'][optimization_options[option]] = True
+            if option in flags['common_flags']:
+                opts['cpp'][optimization_options[option]] = True
+
+        opts['cpp']['verbose'] = False
+        if '-v' in flags['cxx_flags']:
+            opts['cpp']['verbose'] = True
+            self.remove_option(flags['cxx_flags'], '-v')
+
+        # Linker options.
+        linker_options = {
+            '-nostartfiles': 'nostart',
+            '-nodefaultlibs': 'nodeflibs',
+            '-nostdlib': 'nostdlibs',
+        }
+
+        for option in linker_options:
+            opts['ld'][linker_options[option]] = False
+            if option in flags['ld_flags']:
+                opts['ld'][linker_options[option]] = True
+                self.remove_option(flags['ld_flags'], option)
+
+        opts['ld']['gcsections'] = False
+        if '-Wl,--gc-sections' in flags['ld_flags']:
+            opts['ld']['gcsections'] = True
+            self.remove_option(flags['ld_flags'], '-Wl,--gc-sections')
+
+        opts['ld']['flags'] = []
+        to_remove = []
+        for opt in flags['ld_flags']:
+            if opt.startswith('-Wl,--wrap,'):
+                opts['ld']['flags'].append(
+                    '--wrap=' + opt[len('-Wl,--wrap,'):])
+                to_remove.append(opt)
+        for opt in to_remove:
+            self.remove_option(flags['ld_flags'], opt)
+
+        # Other tool remaining options are separated by category.
+        opts['as']['otherwarnings'] = self.find_options(
+            flags['asm_flags'], '-W')
+
+        opts['c']['otherwarnings'] = self.find_options(
+            flags['c_flags'], '-W')
+        opts['c']['otheroptimizations'] = self.find_options(flags[
+            'c_flags'], '-f')
+
+        opts['cpp']['otherwarnings'] = self.find_options(
+            flags['cxx_flags'], '-W')
+        opts['cpp']['otheroptimizations'] = self.find_options(
+            flags['cxx_flags'], '-f')
+
+        # Other common remaining options are separated by category.
+        opts['common']['optimization.other'] = self.find_options(
+            flags['common_flags'], '-f')
+        opts['common']['warnings.other'] = self.find_options(
+            flags['common_flags'], '-W')
+
+        # Remaining common flags are added to each tool.
+        opts['as']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + \
+            ' '.join(flags['asm_flags'])
+        opts['c']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + ' '.join(flags['c_flags'])
+        opts['cpp']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + \
+            ' '.join(flags['cxx_flags'])
+        opts['ld']['other'] += ' ' + \
+            ' '.join(flags['common_flags']) + ' ' + ' '.join(flags['ld_flags'])
+
+        if len(self.system_libraries) > 0:
+            opts['ld']['other'] += ' -Wl,--start-group '
+            opts['ld'][
+                'other'] += ' '.join('-l' + s for s in self.system_libraries) + ' '
+            opts['ld'][
+                'other'] += ' '.join('-l' + s for s in self.libraries)
+            opts['ld']['other'] += ' -Wl,--end-group '
+
+        # Strip all 'other' flags, since they might have leading spaces.
+        opts['as']['other'] = opts['as']['other'].strip()
+        opts['c']['other'] = opts['c']['other'].strip()
+        opts['cpp']['other'] = opts['cpp']['other'].strip()
+        opts['ld']['other'] = opts['ld']['other'].strip()
+
+        if False:
+            print
+            print opts
+
+            print
+            print 'common_flags', flags['common_flags']
+            print 'asm_flags', flags['asm_flags']
+            print 'c_flags', flags['c_flags']
+            print 'cxx_flags', flags['cxx_flags']
+            print 'ld_flags', flags['ld_flags']
+

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/arch_pro_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,77 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
+<infoList vendor="NXP">
+<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
+<chip>
+<name>LPC1768</name>
+<family>LPC17xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m3">Cortex-M3</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc1114_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,46 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/>
+<infoList vendor="NXP">
+<info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp">
+<chip>
+<name>LPC1114FN/102</name>
+<family>LPC11xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/>
+<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/>
+<peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/>
+<peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/>
+<peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11xx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc11u35_401_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,49 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/401" property_count="5" version="70002"/>
+<infoList vendor="NXP">
+<info chip="LPC11U35/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/401" stub="crt_emu_lpc11_13_nxp">
+<chip>
+<name>LPC11U35/401</name>
+<family>LPC11Uxx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
+<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
+<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc11u35_501_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,49 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/501" property_count="5" version="70002"/>
+<infoList vendor="NXP">
+<info chip="LPC11U35/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/501" stub="crt_emu_lpc11_13_nxp">
+<chip>
+<name>LPC11U35/501</name>
+<family>LPC11Uxx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
+<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
+<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc11u68_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,58 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC11U6x_256K.cfx" property_3="NXP" property_4="LPC11U68" property_count="5" version="70200"/>
+<infoList vendor="NXP">
<info chip="LPC11U68" flash_driver="LPC11U6x_256K.cfx" match_id="0x0" name="LPC11U68" stub="crt_emu_cm3_gen">
<chip>
<name>
LPC11U68</name>
+<family>
LPC11U6x</family>
+<vendor>
NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
+<memoryInstance derived_from="RAM" id="Ram0_32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="Ram1_2" location="0x20000000" size="0x800"/>
+<memoryInstance derived_from="RAM" id="Ram2USB_2" location="0x20004000" size="0x800"/>
+<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40020000"/>
+<peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/>
+<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="USART4" determined="infoFile" id="USART4" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x40060000"/>
+<peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x4006c000"/>
+<peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x40070000"/>
+<peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x40074000"/>
+<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/>
+<peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x5000c000"/>
+<peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x5000e000"/>
+<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/>
+<peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0xa0004000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc1768_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,77 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
+<infoList vendor="NXP">
+<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
+<chip>
+<name>LPC1768</name>
+<family>LPC17xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m3">Cortex-M3</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc4088_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,72 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name>
+<family>LPC407x_8x</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/>
+<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/>
+<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/>
+<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/>
+<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/>
+<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/>
+<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
+<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/>
+<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/>
+<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/>
+<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/>
+<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/>
+<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/>
+<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/>
+<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/>
+<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/>
+<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/>
+<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/>
+<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/>
+<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/>
+<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/>
+<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/>
+<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc4088_dm_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,72 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name>
+<family>LPC407x_8x</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/>
+<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/>
+<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/>
+<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/>
+<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/>
+<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/>
+<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
+<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/>
+<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/>
+<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/>
+<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/>
+<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/>
+<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/>
+<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/>
+<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/>
+<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/>
+<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/>
+<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/>
+<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/>
+<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/>
+<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/>
+<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/>
+<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpc4330_m4_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,77 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/>
+<infoList vendor="NXP">
+<info chip="LPC4330" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC4330" package="LPC43_lqfp100.xml">
+<chip>
+<name>LPC4330</name>
+<family>LPC43xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC43_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC43_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC43_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC43_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC43_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC43xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC43_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC43_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC43_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC43_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC43_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC43_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC43_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC43_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC43_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC43_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC43_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC43_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC4x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC43_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC43_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC43_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC43_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC43_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/lpccappuccino_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,49 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37/501" property_count="5" version="70002"/>
+<infoList vendor="NXP">
+<info chip="LPC11U37/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37/501" stub="crt_emu_lpc11_13_nxp">
+<chip>
+<name>LPC11U37/501</name>
+<family>LPC11Uxx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
+<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
+<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m0">Cortex-M0</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/makefile.targets.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,13 @@
+# DO NOT REMOVE! Generated by the MCUXpresso exporter from an mBed project.
+
+mbedclean:
+	$(RM) $(OBJS)
+	$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(C_DEPS)$(CPP_DEPS)
+	$(RM) $(EXECUTABLES) {{name}}.* linker-script-*.ld
+	-@echo ' '
+
+{% for config, data in options.iteritems() %}
+linker-script-{{config}}.ld: ../{{ld_script}}
+	{{data.cpp_cmd}} {{data.ld.other}} $< -o $@
+{{name}}.elf: linker-script-{{config}}.ld
+{% endfor %}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/mbedignore.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,3 @@
+{%- for config in options.values() -%}
+{{config.name}}/*
+{% endfor -%}

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/ublox_c027_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,77 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
+<infoList vendor="NXP">
+<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
+<chip>
+<name>LPC1768</name>
+<family>LPC17xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m3">Cortex-M3</name>
+<family>Cortex-M</family>
+</processor>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}

--- a/export/qtcreator/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/qtcreator/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,14 +16,11 @@
 """
 from os.path import splitext, basename
 from tools.targets import TARGET_MAP
-from tools.export.exporters import Exporter, filter_supported
+from tools.export.exporters import Exporter
 from tools.export.makefile import GccArm
 
 class QtCreator(GccArm):
     NAME = 'QtCreator'
-    TOOLCHAIN = 'GCC_ARM'
-
-    TARGETS = filter_supported("GCC_ARM", set())
 
     MBED_CONFIG_HEADER_SUPPORTED = True
 

--- a/export/simplicity/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/simplicity/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -16,7 +16,7 @@
 """
 from os.path import split,splitext, basename
 
-from tools.export.exporters import Exporter
+from tools.export.exporters import Exporter, deprecated_exporter
 
 class Folder:
     def __init__(self, name):
@@ -54,6 +54,7 @@
 
         return self.findChild(folderName)
 
+@deprecated_exporter
 class SimplicityV3(Exporter):
     NAME = 'SimplicityV3'
     TOOLCHAIN = 'GCC_ARM'

--- a/export/sw4stm32/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/sw4stm32/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -1,6 +1,6 @@
 """
 mbed SDK
-Copyright (c) 2011-2016 ARM Limited
+Copyright (c) 2011-2017 ARM Limited
 
 Licensed under the Apache License, Version 2.0 (the "License");
 you may not use this file except in compliance with the License.
@@ -14,109 +14,508 @@
 See the License for the specific language governing permissions and
 limitations under the License.
 """
+
 from os.path import splitext, basename, join
-from random import randint
 from tools.utils import mkdir
-from tools.export.exporters import Exporter
+from tools.export.gnuarmeclipse import GNUARMEclipse
+from tools.export.gnuarmeclipse import UID
+from tools.build_api import prepare_toolchain
+from sys import flags, platform
+
+# Global random number generator instance.
+u = UID()
 
 
-class Sw4STM32(Exporter):
+class Sw4STM32(GNUARMEclipse):
+    """
+    Sw4STM32 class
+    """
     NAME = 'Sw4STM32'
     TOOLCHAIN = 'GCC_ARM'
 
     BOARDS = {
-        'B96B_F446VE':             {'name': 'B96B-F446VE',           'mcuId': 'STM32F446VETx'},
-        'DISCO_F051R8':            {'name': 'STM32F0DISCOVERY',      'mcuId': 'STM32F051R8Tx'},
-        'DISCO_F303VC':            {'name': 'STM32F3DISCOVERY',      'mcuId': 'STM32F303VCTx'},
-        'DISCO_F334C8':            {'name': 'STM32F3348DISCOVERY',   'mcuId': 'STM32F334C8Tx'},
-        'DISCO_F401VC':            {'name': 'STM32F401C-DISCO',      'mcuId': 'STM32F401VCTx'},
-        'DISCO_F407VG':            {'name': 'STM32F4DISCOVERY',      'mcuId': 'STM32F407VGTx'},
-        'DISCO_F413ZH':            {'name': 'DISCO_F413',            'mcuId': 'STM32F413ZHTx'},
-        'DISCO_F429ZI':            {'name': 'STM32F429I-DISCO',      'mcuId': 'STM32F429ZITx'},
-        'DISCO_F469NI':            {'name': 'DISCO-F469NI',          'mcuId': 'STM32F469NIHx'},
-        'DISCO_F746NG':            {'name': 'STM32F746G-DISCO',      'mcuId': 'STM32F746NGHx'},
-        'DISCO_F769NI':            {'name': 'DISCO-F769NI',          'mcuId': 'STM32F769NIHx'},
-        'DISCO_L053C8':            {'name': 'STM32L0538DISCOVERY',   'mcuId': 'STM32L053C8Tx'},
-        'DISCO_L072CZ_LRWAN1':     {'name': 'DISCO-L072CZ-LRWAN1',   'mcuId': 'STM32L072CZTx'},
-        'DISCO_L475VG_IOT01A':     {'name': 'STM32L475G-DISCO',      'mcuId': 'STM32L475VGTx'},
-        'DISCO_L476VG':            {'name': 'STM32L476G-DISCO',      'mcuId': 'STM32L476VGTx'},
-        'NUCLEO_F030R8':           {'name': 'NUCLEO-F030R8',         'mcuId': 'STM32F030R8Tx'},
-        'NUCLEO_F031K6':           {'name': 'NUCLEO-F031K6',         'mcuId': 'STM32F031K6Tx'},
-        'NUCLEO_F042K6':           {'name': 'NUCLEO-F042K6',         'mcuId': 'STM32F042K6Tx'},
-        'NUCLEO_F070RB':           {'name': 'NUCLEO-F070RB',         'mcuId': 'STM32F070RBTx'},
-        'NUCLEO_F072RB':           {'name': 'NUCLEO-F072RB',         'mcuId': 'STM32F072RBTx'},
-        'NUCLEO_F091RC':           {'name': 'NUCLEO-F091RC',         'mcuId': 'STM32F091RCTx'},
-        'NUCLEO_F103RB':           {'name': 'NUCLEO-F103RB',         'mcuId': 'STM32F103RBTx'},
-        'NUCLEO_F207ZG':           {'name': 'NUCLEO-F207ZG',         'mcuId': 'STM32F207ZGTx'},
-        'NUCLEO_F302R8':           {'name': 'NUCLEO-F302R8',         'mcuId': 'STM32F302R8Tx'},
-        'NUCLEO_F303K8':           {'name': 'NUCLEO-F303K8',         'mcuId': 'STM32F303K8Tx'},
-        'NUCLEO_F303RE':           {'name': 'NUCLEO-F303RE',         'mcuId': 'STM32F303RETx'},
-        'NUCLEO_F303ZE':           {'name': 'NUCLEO-F303ZE',         'mcuId': 'STM32F303ZETx'},
-        'NUCLEO_F334R8':           {'name': 'NUCLEO-F334R8',         'mcuId': 'STM32F334R8Tx'},
-        'NUCLEO_F401RE':           {'name': 'NUCLEO-F401RE',         'mcuId': 'STM32F401RETx'},
-        'NUCLEO_F410RB':           {'name': 'NUCLEO-F410RB',         'mcuId': 'STM32F410RBTx'},
-        'NUCLEO_F411RE':           {'name': 'NUCLEO-F411RE',         'mcuId': 'STM32F411RETx'},
-        'NUCLEO_F429ZI':           {'name': 'NUCLEO-F429ZI',         'mcuId': 'STM32F429ZITx'},
-        'NUCLEO_F446RE':           {'name': 'NUCLEO-F446RE',         'mcuId': 'STM32F446RETx'},
-        'NUCLEO_F446ZE':           {'name': 'NUCLEO-F446ZE',         'mcuId': 'STM32F446ZETx'},
-        'NUCLEO_F746ZG':           {'name': 'NUCLEO-F746ZG',         'mcuId': 'STM32F746ZGTx'},
-        'NUCLEO_F767ZI':           {'name': 'NUCLEO-F767ZI',         'mcuId': 'STM32F767ZITx'},
-        'NUCLEO_L011K4':           {'name': 'NUCLEO-L011K4',         'mcuId': 'STM32L011K4Tx'},
-        'NUCLEO_L031K6':           {'name': 'NUCLEO-L031K6',         'mcuId': 'STM32L031K6Tx'},
-        'NUCLEO_L053R8':           {'name': 'NUCLEO-L053R8',         'mcuId': 'STM32L053R8Tx'},
-        'NUCLEO_L073RZ':           {'name': 'NUCLEO-L073RZ',         'mcuId': 'STM32L073RZTx'},
-        'NUCLEO_L152RE':           {'name': 'NUCLEO-L152RE',         'mcuId': 'STM32L152RETx'},
-        'NUCLEO_L432KC':           {'name': 'NUCLEO-L432KC',         'mcuId': 'STM32L432KCUx'},
-        'NUCLEO_L476RG':           {'name': 'NUCLEO-L476RG',         'mcuId': 'STM32L476RGTx'},
+        'B96B_F446VE':
+        {
+            'name': 'B96B-F446VE',
+            'mcuId': 'STM32F446VETx'
+        },
+        'DISCO_F051R8':
+        {
+            'name': 'STM32F0DISCOVERY',
+            'mcuId': 'STM32F051R8Tx'
+        },
+        'DISCO_F303VC':
+        {
+            'name': 'STM32F3DISCOVERY',
+            'mcuId': 'STM32F303VCTx'
+        },
+        'DISCO_F334C8':
+        {
+            'name': 'STM32F3348DISCOVERY',
+            'mcuId': 'STM32F334C8Tx'
+        },
+        'DISCO_F401VC':
+        {
+            'name': 'STM32F401C-DISCO',
+            'mcuId': 'STM32F401VCTx'
+        },
+        'DISCO_F407VG':
+        {
+            'name': 'STM32F4DISCOVERY',
+            'mcuId': 'STM32F407VGTx'
+        },
+        'DISCO_F413ZH':
+        {
+            'name': 'DISCO_F413',
+            'mcuId': 'STM32F413ZHTx'
+        },
+        'DISCO_F429ZI':
+        {
+            'name': 'STM32F429I-DISCO',
+            'mcuId': 'STM32F429ZITx'
+        },
+        'DISCO_F469NI':
+        {
+            'name': 'DISCO-F469NI',
+            'mcuId': 'STM32F469NIHx'
+        },
+        'DISCO_F746NG':
+        {
+            'name': 'STM32F746G-DISCO',
+            'mcuId': 'STM32F746NGHx'
+        },
+        'DISCO_F769NI':
+        {
+            'name': 'DISCO-F769NI',
+            'mcuId': 'STM32F769NIHx'
+        },
+        'DISCO_L053C8':
+        {
+            'name': 'STM32L0538DISCOVERY',
+            'mcuId': 'STM32L053C8Tx'
+        },
+        'DISCO_L072CZ_LRWAN1':
+        {
+            'name': 'DISCO-L072CZ-LRWAN1',
+            'mcuId': 'STM32L072CZTx'
+        },
+        'DISCO_L475VG_IOT01A':
+        {
+            'name': 'STM32L475G-DISCO',
+            'mcuId': 'STM32L475VGTx'
+        },
+        'DISCO_L476VG':
+        {
+            'name': 'STM32L476G-DISCO',
+            'mcuId': 'STM32L476VGTx'
+        },
+        'NUCLEO_F030R8':
+        {
+            'name': 'NUCLEO-F030R8',
+            'mcuId': 'STM32F030R8Tx'
+        },
+        'NUCLEO_F031K6':
+        {
+            'name': 'NUCLEO-F031K6',
+            'mcuId': 'STM32F031K6Tx'
+        },
+        'NUCLEO_F042K6':
+        {
+            'name': 'NUCLEO-F042K6',
+            'mcuId': 'STM32F042K6Tx'
+        },
+        'NUCLEO_F070RB':
+        {
+            'name': 'NUCLEO-F070RB',
+            'mcuId': 'STM32F070RBTx'
+        },
+        'NUCLEO_F072RB':
+        {
+            'name': 'NUCLEO-F072RB',
+            'mcuId': 'STM32F072RBTx'
+        },
+        'NUCLEO_F091RC':
+        {
+            'name': 'NUCLEO-F091RC',
+            'mcuId': 'STM32F091RCTx'
+        },
+        'NUCLEO_F103RB':
+        {
+            'name': 'NUCLEO-F103RB',
+            'mcuId': 'STM32F103RBTx'
+        },
+        'NUCLEO_F207ZG':
+        {
+            'name': 'NUCLEO-F207ZG',
+            'mcuId': 'STM32F207ZGTx'
+        },
+        'NUCLEO_F302R8':
+        {
+            'name': 'NUCLEO-F302R8',
+            'mcuId': 'STM32F302R8Tx'
+        },
+        'NUCLEO_F303K8':
+        {
+            'name': 'NUCLEO-F303K8',
+            'mcuId': 'STM32F303K8Tx'
+        },
+        'NUCLEO_F303RE':
+        {
+            'name': 'NUCLEO-F303RE',
+            'mcuId': 'STM32F303RETx'
+        },
+        'NUCLEO_F303ZE':
+        {
+            'name': 'NUCLEO-F303ZE',
+            'mcuId': 'STM32F303ZETx'
+        },
+        'NUCLEO_F334R8':
+        {
+            'name': 'NUCLEO-F334R8',
+            'mcuId': 'STM32F334R8Tx'
+        },
+        'NUCLEO_F401RE':
+        {
+            'name': 'NUCLEO-F401RE',
+            'mcuId': 'STM32F401RETx'
+        },
+        'NUCLEO_F410RB':
+        {
+            'name': 'NUCLEO-F410RB',
+            'mcuId': 'STM32F410RBTx'
+        },
+        'NUCLEO_F411RE':
+        {
+            'name': 'NUCLEO-F411RE',
+            'mcuId': 'STM32F411RETx'
+        },
+        'NUCLEO_F429ZI':
+        {
+            'name': 'NUCLEO-F429ZI',
+            'mcuId': 'STM32F429ZITx'
+        },
+        'NUCLEO_F446RE':
+        {
+            'name': 'NUCLEO-F446RE',
+            'mcuId': 'STM32F446RETx'
+        },
+        'NUCLEO_F446ZE':
+        {
+            'name': 'NUCLEO-F446ZE',
+            'mcuId': 'STM32F446ZETx'
+        },
+        'NUCLEO_F746ZG':
+        {
+            'name': 'NUCLEO-F746ZG',
+            'mcuId': 'STM32F746ZGTx'
+        },
+        'NUCLEO_F767ZI':
+        {
+            'name': 'NUCLEO-F767ZI',
+            'mcuId': 'STM32F767ZITx'
+        },
+        'NUCLEO_L011K4':
+        {
+            'name': 'NUCLEO-L011K4',
+            'mcuId': 'STM32L011K4Tx'
+        },
+        'NUCLEO_L031K6':
+        {
+            'name': 'NUCLEO-L031K6',
+            'mcuId': 'STM32L031K6Tx'
+        },
+        'NUCLEO_L053R8':
+        {
+            'name': 'NUCLEO-L053R8',
+            'mcuId': 'STM32L053R8Tx'
+        },
+        'NUCLEO_L073RZ':
+        {
+            'name': 'NUCLEO-L073RZ',
+            'mcuId': 'STM32L073RZTx'
+        },
+        'NUCLEO_L152RE':
+        {
+            'name': 'NUCLEO-L152RE',
+            'mcuId': 'STM32L152RETx'
+        },
+        'NUCLEO_L432KC':
+        {
+            'name': 'NUCLEO-L432KC',
+            'mcuId': 'STM32L432KCUx'
+        },
+        'NUCLEO_L476RG':
+        {
+            'name': 'NUCLEO-L476RG',
+            'mcuId': 'STM32L476RGTx'
+        },
     }
 
     TARGETS = BOARDS.keys()
 
-    def __gen_dir(self, dirname):
-        settings = join(self.export_dir, dirname)
+    def __gen_dir(self, dir_name):
+        """
+        Method that creates directory
+        """
+        settings = join(self.export_dir, dir_name)
         mkdir(settings)
 
-    def __generate_uid(self):
-        return "%0.9u" % randint(0, 999999999)
+    def get_fpu_hardware(self, fpu_unit):
+        """
+        Convert fpu unit name into hardware name.
+        """
+        hw = ''
+        fpus = {
+            'fpv4spd16': 'fpv4-sp-d16',
+            'fpv5d16': 'fpv5-d16',
+            'fpv5spd16': 'fpv5-sp-d16'
+        }
+        if fpu_unit in fpus:
+            hw = fpus[fpu_unit]
+        return hw
+
+    def process_sw_options(self, opts, flags_in):
+        """
+        Process System Workbench specific options.
+
+        System Workbench for STM32 has some compile options, which are not recognized by the GNUARMEclipse exporter.
+        Those are handled in this method.
+        """
+        opts['c']['preprocess'] = False
+        if '-E' in flags_in['c_flags']:
+            opts['c']['preprocess'] = True
+        opts['cpp']['preprocess'] = False
+        if '-E' in flags_in['cxx_flags']:
+            opts['cpp']['preprocess'] = True
+        opts['c']['slowflashdata'] = False
+        if '-mslow-flash-data' in flags_in['c_flags']:
+            opts['c']['slowflashdata'] = True
+        opts['cpp']['slowflashdata'] = False
+        if '-mslow-flash-data' in flags_in['cxx_flags']:
+            opts['cpp']['slowflashdata'] = True
+        if opts['common']['optimization.messagelength']:
+            opts['common']['optimization.other'] += ' -fmessage-length=0'
+        if opts['common']['optimization.signedchar']:
+            opts['common']['optimization.other'] += ' -fsigned-char'
+        if opts['common']['optimization.nocommon']:
+            opts['common']['optimization.other'] += ' -fno-common'
+        if opts['common']['optimization.noinlinefunctions']:
+            opts['common']['optimization.other'] += ' -fno-inline-functions'
+        if opts['common']['optimization.freestanding']:
+            opts['common']['optimization.other'] += ' -ffreestanding'
+        if opts['common']['optimization.nobuiltin']:
+            opts['common']['optimization.other'] += ' -fno-builtin'
+        if opts['common']['optimization.spconstant']:
+            opts['common']['optimization.other'] += ' -fsingle-precision-constant'
+        if opts['common']['optimization.nomoveloopinvariants']:
+            opts['common']['optimization.other'] += ' -fno-move-loop-invariants'
+        if opts['common']['warnings.unused']:
+            opts['common']['warnings.other'] += ' -Wunused'
+        if opts['common']['warnings.uninitialized']:
+            opts['common']['warnings.other'] += ' -Wuninitialized'
+        if opts['common']['warnings.missingdeclaration']:
+            opts['common']['warnings.other'] += ' -Wmissing-declarations'
+        if opts['common']['warnings.pointerarith']:
+            opts['common']['warnings.other'] += ' -Wpointer-arith'
+        if opts['common']['warnings.padded']:
+            opts['common']['warnings.other'] += ' -Wpadded'
+        if opts['common']['warnings.shadow']:
+            opts['common']['warnings.other'] += ' -Wshadow'
+        if opts['common']['warnings.logicalop']:
+            opts['common']['warnings.other'] += ' -Wlogical-op'
+        if opts['common']['warnings.agreggatereturn']:
+            opts['common']['warnings.other'] += ' -Waggregate-return'
+        if opts['common']['warnings.floatequal']:
+            opts['common']['warnings.other'] += ' -Wfloat-equal'
+        opts['ld']['strip'] = False
+        if '-s' in flags_in['ld_flags']:
+            opts['ld']['strip'] = True
+        opts['ld']['shared'] = False
+        if '-shared' in flags_in['ld_flags']:
+            opts['ld']['shared'] = True
+        opts['ld']['soname'] = ''
+        opts['ld']['implname'] = ''
+        opts['ld']['defname'] = ''
+        for item in flags_in['ld_flags']:
+            if item.startswith('-Wl,-soname='):
+                opts['ld']['soname'] = item[len('-Wl,-soname='):]
+            if item.startswith('-Wl,--out-implib='):
+                opts['ld']['implname'] = item[len('-Wl,--out-implib='):]
+            if item.startswith('-Wl,--output-def='):
+                opts['ld']['defname'] = item[len('-Wl,--output-def='):]
+        opts['common']['arm.target.fpu.hardware'] = self.get_fpu_hardware(
+            opts['common']['arm.target.fpu.unit'])
+        opts['common']['debugging.codecov'] = False
+        if '-fprofile-arcs' in flags_in['common_flags'] and '-ftest-coverage' in flags_in['common_flags']:
+            opts['common']['debugging.codecov'] = True
+        # Passing linker options to linker with '-Wl,'-prefix.
+        for index in range(len(opts['ld']['flags'])):
+            item = opts['ld']['flags'][index]
+            if not item.startswith('-Wl,'):
+                opts['ld']['flags'][index] = '-Wl,' + item
+        # Strange System Workbench feature: If first parameter in Other flags is a
+        # define (-D...), Other flags will be replaced by defines and other flags
+        # are completely ignored. Moving -D parameters to defines.
+        for compiler in ['c', 'cpp', 'as']:
+            tmpList = opts[compiler]['other'].split(' ')
+            otherList = []
+            for item in tmpList:
+                if item.startswith('-D'):
+                    opts[compiler]['defines'].append(str(item[2:]))
+                else:
+                    otherList.append(item)
+            opts[compiler]['other'] = ' '.join(otherList)
+        # Assembler options
+        for as_def in opts['as']['defines']:
+            if '=' in as_def:
+                opts['as']['other'] += ' --defsym ' + as_def
+            else:
+                opts['as']['other'] += ' --defsym ' + as_def + '=1'
 
     def generate(self):
-        fp_hardware = "no"
-        fp_abi = "soft"
-        core = self.toolchain.target.core
-        if core == "Cortex-M4F" or core == "Cortex-M7F":
-            fp_hardware = "fpv4-sp-d16"
-            fp_abi = "soft-fp"
-        elif core == "Cortex-M7FD":
-            fp_hardware = "fpv5-d16"
-            fp_abi = "soft-fp"
-            
+        """
+        Generate the .project and .cproject files.
+        """
+        options = {}
+
+        if not self.resources.linker_script:
+            raise NotSupportedException("No linker script found.")
+
+        print ('\nCreate a System Workbench for STM32 managed project')
+        print ('Project name: {0}'.format(self.project_name))
+        print ('Target:       {0}'.format(self.toolchain.target.name))
+        print ('Toolchain:    {0}'.format(self.TOOLCHAIN) + '\n')
+
+        self.resources.win_to_unix()
+
+        config_header = self.filter_dot(self.toolchain.get_config_header())
+
         libraries = []
         for lib in self.resources.libraries:
-            l, _ = splitext(basename(lib))
-            libraries.append(l[3:])
+            library, _ = splitext(basename(lib))
+            libraries.append(library[3:])
+
+        self.system_libraries = [
+            'stdc++', 'supc++', 'm', 'c', 'gcc', 'nosys'
+        ]
+
+        profiles = self.get_all_profiles()
+        self.as_defines = [s.replace('"', '"')
+                           for s in self.toolchain.get_symbols(True)]
+        self.c_defines = [s.replace('"', '"')
+                          for s in self.toolchain.get_symbols()]
+        self.cpp_defines = self.c_defines
+        print 'Symbols: {0}'.format(len(self.c_defines))
+
+        self.include_path = []
+        for s in self.resources.inc_dirs:
+            self.include_path.append("../" + self.filter_dot(s))
+        print ('Include folders: {0}'.format(len(self.include_path)))
+
+        self.compute_exclusions()
+
+        print ('Exclude folders: {0}'.format(len(self.excluded_folders)))
+
+        ld_script = self.filter_dot(self.resources.linker_script)
+        print ('Linker script:   {0}'.format(ld_script))
+
+        lib_dirs = [self.filter_dot(s) for s in self.resources.lib_dirs]
+
+        preproc_cmd = basename(self.toolchain.preproc[0]) + " " + " ".join(self.toolchain.preproc[1:])
+
+        for id in ['debug', 'release']:
+            opts = {}
+            opts['common'] = {}
+            opts['as'] = {}
+            opts['c'] = {}
+            opts['cpp'] = {}
+            opts['ld'] = {}
+
+            opts['id'] = id
+            opts['name'] = opts['id'].capitalize()
+
+            # TODO: Add prints to log or console in verbose mode.
+            #print ('\nBuild configuration: {0}'.format(opts['name']))
+
+            profile = profiles[id]
+
+            # A small hack, do not bother with src_path again,
+            # pass an empty string to avoid crashing.
+            src_paths = ['']
+            toolchain = prepare_toolchain(
+                src_paths, "", self.toolchain.target.name, self.TOOLCHAIN, build_profile=[profile])
+
+            # Hack to fill in build_dir
+            toolchain.build_dir = self.toolchain.build_dir
+
+            flags = self.toolchain_flags(toolchain)
+
+            # TODO: Add prints to log or console in verbose mode.
+            # print 'Common flags:', ' '.join(flags['common_flags'])
+            # print 'C++ flags:', ' '.join(flags['cxx_flags'])
+            # print 'C flags:', ' '.join(flags['c_flags'])
+            # print 'ASM flags:', ' '.join(flags['asm_flags'])
+            # print 'Linker flags:', ' '.join(flags['ld_flags'])
+
+            # Most GNU ARM Eclipse options have a parent,
+            # either debug or release.
+            if '-O0' in flags['common_flags'] or '-Og' in flags['common_flags']:
+                opts['parent_id'] = 'debug'
+            else:
+                opts['parent_id'] = 'release'
+
+            self.process_options(opts, flags)
+
+            opts['c']['defines'] = self.c_defines
+            opts['cpp']['defines'] = self.cpp_defines
+            opts['as']['defines'] = self.as_defines
+
+            self.process_sw_options(opts, flags)
+
+            opts['ld']['library_paths'] = [
+                self.filter_dot(s) for s in self.resources.lib_dirs]
+
+            opts['ld']['user_libraries'] = libraries
+            opts['ld']['system_libraries'] = self.system_libraries
+            opts['ld']['script'] = "linker-script-" + id + ".ld"
+
+            # Unique IDs used in multiple places.
+            uid = {}
+            uid['config'] = u.id
+            uid['tool_c_compiler'] = u.id
+            uid['tool_c_compiler_input'] = u.id
+            uid['tool_cpp_compiler'] = u.id
+            uid['tool_cpp_compiler_input'] = u.id
+
+            opts['uid'] = uid
+
+            options[id] = opts
 
         ctx = {
             'name': self.project_name,
-            'include_paths': self.resources.inc_dirs,
-            'linker_script': self.resources.linker_script,
-            'library_paths': self.resources.lib_dirs,
+            'platform': platform,
+            'include_paths': self.include_path,
+            'config_header': config_header,
+            'exclude_paths': '|'.join(self.excluded_folders),
+            'ld_script': ld_script,
+            'library_paths': lib_dirs,
             'object_files': self.resources.objects,
             'libraries': libraries,
-            'symbols': self.toolchain.get_symbols(),
             'board_name': self.BOARDS[self.target.upper()]['name'],
             'mcu_name': self.BOARDS[self.target.upper()]['mcuId'],
-            'debug_config_uid': self.__generate_uid(),
-            'debug_tool_compiler_uid': self.__generate_uid(),
-            'debug_tool_compiler_input_uid': self.__generate_uid(),
-            'release_config_uid': self.__generate_uid(),
-            'release_tool_compiler_uid': self.__generate_uid(),
-            'release_tool_compiler_input_uid': self.__generate_uid(),
-            'uid': self.__generate_uid(),
-            'floating_point_hardware': fp_hardware,
-            'floating_point_abi': fp_abi
+            'cpp_cmd': preproc_cmd,
+            'options': options,
+            # id property of 'u' will generate new random identifier every time
+            # when called.
+            'u': u
         }
 
         self.__gen_dir('.settings')
-        self.gen_file('sw4stm32/language_settings_commom.tmpl', ctx, '.settings/language.settings.xml')
+        self.gen_file('sw4stm32/language_settings_commom.tmpl',
+                      ctx, '.settings/language.settings.xml')
         self.gen_file('sw4stm32/project_common.tmpl', ctx, '.project')
         self.gen_file('sw4stm32/cproject_common.tmpl', ctx, '.cproject')
+        self.gen_file('sw4stm32/makefile.targets.tmpl', ctx,
+                      'makefile.targets', trim_blocks=True, lstrip_blocks=True)
+        self.gen_file('sw4stm32/launch.tmpl', ctx, self.project_name +
+                      ' ' + options['debug']['name'] + '.launch')

--- a/export/sw4stm32/cproject_common.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/sw4stm32/cproject_common.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -1,8 +1,10 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
 	<storageModule moduleId="org.eclipse.cdt.core.settings">
-		<cconfiguration id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+		{% for cfg_id in options %}
+		{% set opts = options[cfg_id] %}
+		<cconfiguration id="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}" moduleId="org.eclipse.cdt.core.settings" name="{{opts['name']}}">
 				<externalSettings/>
 				<extensions>
 					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
@@ -14,201 +16,300 @@
 				</extensions>
 			</storageModule>
 			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}" name="Debug" parent="fr.ac6.managedbuild.config.gnu.cross.exe.debug" postannouncebuildStep="Generating binary and Printing size information:" postbuildStep="arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileBaseName}.elf&quot; &quot;${BuildArtifactFileBaseName}.bin&quot; &amp;&amp; arm-none-eabi-size &quot;${BuildArtifactFileName}&quot;">
-					<folderInfo id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}." name="/" resourcePath="">
-						<toolChain id="fr.ac6.managedbuild.toolchain.gnu.cross.exe.debug.{{uid}}" name="Ac6 STM32 MCU GCC" superClass="fr.ac6.managedbuild.toolchain.gnu.cross.exe.debug">
-							<option id="fr.ac6.managedbuild.option.gnu.cross.mcu.{{uid}}" name="Mcu" superClass="fr.ac6.managedbuild.option.gnu.cross.mcu" value="{{mcu_name}}" valueType="string"/>
-							<option id="fr.ac6.managedbuild.option.gnu.cross.board.{{uid}}" name="Board" superClass="fr.ac6.managedbuild.option.gnu.cross.board" value="{{board_name}}" valueType="string"/>
-							<option id="fr.ac6.managedbuild.option.gnu.cross.fpu.{{uid}}" name="Floating point hardware" superClass="fr.ac6.managedbuild.option.gnu.cross.fpu" value="fr.ac6.managedbuild.option.gnu.cross.fpu.{{floating_point_hardware}}" valueType="enumerated"/>
-							<option id="fr.ac6.managedbuild.option.gnu.cross.floatabi.{{uid}}" name="Floating-point ABI" superClass="fr.ac6.managedbuild.option.gnu.cross.floatabi" value="fr.ac6.managedbuild.option.gnu.cross.floatabi.{{floating_point_abi}}" valueType="enumerated"/>
-							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="fr.ac6.managedbuild.targetPlatform.gnu.cross.{{uid}}" isAbstract="false" osList="all" superClass="fr.ac6.managedbuild.targetPlatform.gnu.cross"/>
-							<builder buildPath="${workspace_loc:/{{name}}}/Debug" id="fr.ac6.managedbuild.builder.gnu.cross.{{uid}}" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="fr.ac6.managedbuild.builder.gnu.cross"/>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.{{debug_tool_compiler_uid}}" name="MCU GCC Compiler" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler">
-								<option id="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level.{{uid}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
-								<option id="gnu.c.compiler.option.debugging.level.{{uid}}" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.c.debugging.level.max" valueType="enumerated"/>
-								<option id="gnu.c.compiler.option.include.paths.{{uid}}" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
+				<configuration artifactExtension="elf" artifactName="${ProjName}-{{cfg_id}}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.{{cfg_id}}" cleanCommand="rm -rf" description="" id="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}" name="{{opts['name']}}" parent="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}" postannouncebuildStep="Generating binary and Printing size information:" postbuildStep="arm-none-eabi-objcopy -O binary &quot;${BuildArtifactFileBaseName}.elf&quot; &quot;${ProjName}.bin&quot; &amp;&amp; arm-none-eabi-size -B &quot;${BuildArtifactFileName}&quot; &amp;&amp; make ldclean" preannouncebuildStep="Creating makefile.defs:" prebuildStep="echo &quot;export PREPROC_CMD = ${openstm32_compiler_path}/${compiler_prefix}cpp -E -P&quot; &gt; ${ProjDirPath}/makefile.defs">
+					<folderInfo id="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}." name="/" resourcePath="">
+						<toolChain id="fr.ac6.managedbuild.toolchain.gnu.cross.exe.{{cfg_id}}.{{u.id}}" name="Ac6 STM32 MCU GCC" superClass="fr.ac6.managedbuild.toolchain.gnu.cross.exe.{{cfg_id}}">
+							<option id="fr.ac6.managedbuild.option.gnu.cross.mcu.{{u.id}}" name="Mcu" superClass="fr.ac6.managedbuild.option.gnu.cross.mcu" value="{{mcu_name}}" valueType="string"/>
+							<option id="fr.ac6.managedbuild.option.gnu.cross.board.{{u.id}}" name="Board" superClass="fr.ac6.managedbuild.option.gnu.cross.board" value="{{board_name}}" valueType="string"/>
+							{% if opts['common']['arm.target.fpu.hardware'] %}
+							<option id="fr.ac6.managedbuild.option.gnu.cross.fpu.{{u.id}}" name="Floating point hardware" superClass="fr.ac6.managedbuild.option.gnu.cross.fpu" value="fr.ac6.managedbuild.option.gnu.cross.fpu.{{opts['common']['arm.target.fpu.hardware']}}" valueType="enumerated"/>
+							{% endif %}
+							{% if opts['common']['arm.target.fpu.abi'] %}
+							<option id="fr.ac6.managedbuild.option.gnu.cross.floatabi.{{u.id}}" name="Floating-point ABI" superClass="fr.ac6.managedbuild.option.gnu.cross.floatabi" value="fr.ac6.managedbuild.option.gnu.cross.floatabi.{{opts['common']['arm.target.fpu.abi']}}" valueType="enumerated"/>
+							{% endif %}
+							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="fr.ac6.managedbuild.targetPlatform.gnu.cross.{{u.id}}" isAbstract="false" osList="all" superClass="fr.ac6.managedbuild.targetPlatform.gnu.cross"/>
+							<builder buildPath="${workspace_loc:/{{name}}}/{{opts['name']}}" id="fr.ac6.managedbuild.builder.gnu.cross.{{u.id}}" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="fr.ac6.managedbuild.builder.gnu.cross"/>
+							<tool id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.{{opts['uid']['tool_c_compiler']}}" name="MCU GCC Compiler" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler">
+								{% if cfg_id == 'debug' %}
+								<option id="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="fr.ac6.managedbuild.gnu.c.optimization.level.more" valueType="enumerated"/>
+								<option id="gnu.c.compiler.option.debugging.level.{{u.id}}" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.c.debugging.level.max" valueType="enumerated"/>
+								{% else %}
+								<option id="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="fr.ac6.managedbuild.gnu.c.optimization.level.most" valueType="enumerated"/>
+								<option id="gnu.c.compiler.option.debugging.level.{{u.id}}" name="Debug Level" superClass="gnu.c.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.c.debugging.level.none" valueType="enumerated"/>
+								{% endif %}
+								<option id="gnu.c.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
 									{% for path in include_paths %}
-									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;{{path}}&quot;"/>
 									{% endfor %}
 								</option>
-								<option id="gnu.c.compiler.option.preprocessor.def.symbols.{{uid}}" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
-									{% for s in symbols %}
+								<option id="gnu.c.compiler.option.preprocessor.def.symbols.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" useByScannerDiscovery="false" valueType="definedSymbols">
+									{% for s in opts['c']['defines'] %}
 									<listOptionValue builtIn="false" value="{{s}}"/>
 									{% endfor %}
 								</option>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c.{{release_tool_compiler_input_uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c"/>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.s.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.s"/>
+								{% if config_header %}
+								<option id="gnu.c.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.c.compiler.option.include.files" useByScannerDiscovery="false" valueType="includeFiles">
+									<listOptionValue builtIn="false" value="${ProjDirPath}/{{config_header}}"/>
+								</option>
+								{% endif %}
+								{% if 'compiler.std' in opts['c'] %}
+								{% if opts['c']['compiler.std'] == '-ansi' %}
+								<option id="gnu.c.compiler.option.misc.ansi.{{u.id}}" name="Support ANSI programs (-ansi)" superClass="gnu.c.compiler.option.misc.ansi" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% elif opts['c']['compiler.std'] %}
+								<option id="gnu.c.compiler.option.dialect.std.{{u.id}}" superClass="gnu.c.compiler.option.dialect.std" value="gnu.c.compiler.dialect.{{opts['c']['compiler.std']}}" valueType="enumerated"/>
+								<option id="gnu.c.compiler.option.dialect.std.{{u.id}}" name="Language standard" superClass="gnu.c.compiler.option.dialect.std" useByScannerDiscovery="true" value="gnu.c.compiler.dialect.c99" valueType="enumerated"/>
+								{% endif %}
+								{% endif %}
+								{% if opts['common']['warnings.pedantic'] %}
+								<option id="gnu.c.compiler.option.warnings.pedantic.{{u.id}}" name="Pedantic (-pedantic)" superClass="gnu.c.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.pedanticerrors'] %}
+								<option id="gnu.c.compiler.option.warnings.pedantic.error.{{u.id}}" name="Pedantic warnings as errors (-pedantic-errors)" superClass="gnu.c.compiler.option.warnings.pedantic.error" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['nostdinc'] %}
+								<option id="gnu.c.compiler.option.preprocessor.nostdinc.{{u.id}}" name="Do not search system directories (-nostdinc)" superClass="gnu.c.compiler.option.preprocessor.nostdinc" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['preprocess'] %}
+								<option id="gnu.c.compiler.option.preprocessor.preprocess.{{u.id}}" name="Preprocess only (-E)" superClass="gnu.c.compiler.option.preprocessor.preprocess" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}								
+								{% if opts['common']['warnings.syntaxonly'] %}
+								<option id="gnu.c.compiler.option.warnings.syntax.{{u.id}}" name="Check syntax only (-fsyntax-only)" superClass="gnu.c.compiler.option.warnings.syntax" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.nowarn'] %}
+								<option id="gnu.c.compiler.option.warnings.nowarn.{{u.id}}" name="Inhibit all warnings (-w)" superClass="gnu.c.compiler.option.warnings.nowarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.extrawarn'] %}
+								<option id="gnu.c.compiler.option.warnings.extrawarn.{{u.id}}" name="Extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.toerrors'] %}
+								<option id="gnu.c.compiler.option.warnings.toerrors.{{u.id}}" name="Warnings as errors (-Werror)" superClass="gnu.c.compiler.option.warnings.toerrors" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.conversion'] %}
+								<option id="gnu.c.compiler.option.warnings.wconversion.{{u.id}}" name="Implicit conversion warnings (-Wconversion)" superClass="gnu.c.compiler.option.warnings.wconversion" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.prof'] %}
+								<option id="gnu.c.compiler.option.debugging.prof.{{u.id}}" name="Generate prof information (-p)" superClass="gnu.c.compiler.option.debugging.prof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.gprof'] %}
+								<option id="gnu.c.compiler.option.debugging.gprof.{{u.id}}" name="Generate gprof information (-pg)" superClass="gnu.c.compiler.option.debugging.gprof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.codecov'] %}
+								<option id="gnu.c.compiler.option.debugging.codecov.{{u.id}}" superClass="gnu.c.compiler.option.debugging.codecov" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['verbose'] %}
+								<option id="gnu.c.compiler.option.misc.verbose.{{u.id}}" name="Verbose (-v)" superClass="gnu.c.compiler.option.misc.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.PIC'] %}
+								<option id="gnu.c.compiler.option.misc.pic.{{u.id}}" name="Position Independent Code (-fPIC)" superClass="gnu.c.compiler.option.misc.pic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.datasections'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.fdata.{{u.id}}" name="Place the data in their own section (-fdata-sections)" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.fdata" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.functionsections'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.ffunction.{{u.id}}" name="Place the function in their own section (-ffunction-sections)" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.ffunction" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['otheroptimizations'] != '' or opts['common']['optimization.other'] != '' %}
+								<option id="gnu.c.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['c']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['c']['other'] != '' or opts['c']['otherwarnings'] != '' or opts['common']['warnings.other'] != '' %}
+								<option id="fr.ac6.managedbuid.gnu.c.compiler.option.misc.other.{{u.id}}" name="Other flags" superClass="fr.ac6.managedbuid.gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="{{opts['c']['other']}} {{opts['c']['otherwarnings']}} {{opts['common']['warnings.other']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['c']['slowflashdata'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.pcrop.{{u.id}}" name="No data reads in code memory (-mslow-flash-data) " superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.pcrop" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c.{{opts['uid']['tool_c_compiler_input']}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c"/>
+								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.s.{{u.id}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.s"/>
 							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.{{uid}}" name="MCU G++ Compiler" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler">
-								<option id="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level.{{uid}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
-								<option id="gnu.cpp.compiler.option.debugging.level.{{uid}}" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.debugging.level.max" valueType="enumerated"/>
-								<option id="gnu.cpp.compiler.option.include.paths.{{uid}}" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
+							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.{{opts['uid']['tool_cpp_compiler']}}" name="MCU G++ Compiler" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler">
+								{% if cfg_id == 'debug' %}
+								<option id="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
+								<option id="gnu.cpp.compiler.option.debugging.level.{{u.id}}" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+								{% else %}
+								<option id="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="fr.ac6.managedbuild.gnu.cpp.optimization.level.most" valueType="enumerated"/>
+								<option id="gnu.cpp.compiler.option.debugging.level.{{u.id}}" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.debugging.level.none" valueType="enumerated"/>
+								{% endif %}
+								<option id="gnu.cpp.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
 									{% for path in include_paths %}
-									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;{{path}}&quot;"/>
 									{% endfor %}
 								</option>
-								<option id="gnu.cpp.compiler.option.dialect.std.{{uid}}" superClass="gnu.cpp.compiler.option.dialect.std" value="gnu.cpp.compiler.dialect.default" valueType="enumerated"/>
-								<option id="gnu.cpp.compiler.option.preprocessor.def{{uid}}" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-								{% for s in symbols %}
+								<option id="gnu.cpp.compiler.option.preprocessor.def.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
+								{% for s in opts['cpp']['defines'] %}
 									<listOptionValue builtIn="false" value="{{s}}"/>
 								{% endfor %}
 								</option>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp"/>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s"/>
+								{% if config_header %}
+								<option id="gnu.cpp.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.cpp.compiler.option.include.files" useByScannerDiscovery="false" valueType="includeFiles">
+									<listOptionValue builtIn="false" value="${ProjDirPath}/{{config_header}}"/>
+								</option>
+								{% endif %}
+								{% if 'compiler.std' in opts['cpp'] %}
+								{% if opts['cpp']['compiler.std'] %}
+								<option id="gnu.cpp.compiler.option.dialect.std.{{u.id}}" name="Language standard" superClass="gnu.cpp.compiler.option.dialect.std" useByScannerDiscovery="true" value="gnu.cpp.compiler.dialect.{{opts['c']['compiler.std']}}" valueType="enumerated"/>
+								{% endif %}
+								{% endif %}
+								{% if opts['common']['warnings.pedantic'] %}
+								<option id="gnu.cpp.compiler.option.warnings.pedantic.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.pedanticerrors'] %}
+								<option id="gnu.cpp.compiler.option.warnings.pedantic.error.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic.error" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['nostdinc'] %}
+								<option id="gnu.cpp.compiler.option.preprocessor.nostdinc.{{u.id}}" superClass="gnu.cpp.compiler.option.preprocessor.nostdinc" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['preprocess'] %}
+								<option id="gnu.cpp.compiler.option.preprocessor.preprocess.{{u.id}}" superClass="gnu.cpp.compiler.option.preprocessor.preprocess" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.syntaxonly'] %}
+								<option id="gnu.cpp.compiler.option.warnings.syntax.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.syntax" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.nowarn'] %}
+								<option id="gnu.cpp.compiler.option.warnings.nowarn.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.nowarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								<option id="gnu.cpp.compiler.option.warnings.allwarn.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.allwarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% if opts['common']['warnings.extrawarn'] %}
+								<option id="gnu.cpp.compiler.option.warnings.extrawarn.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.extrawarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['warnings.toerrors'] %}
+								<option id="gnu.cpp.compiler.option.warnings.toerrors.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.toerrors" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}							
+								{% if opts['common']['warnings.conversion'] %}
+								<option id="gnu.cpp.compiler.option.warnings.wconversion.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.wconversion" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.prof'] %}
+								<option id="gnu.cpp.compiler.option.debugging.prof.{{u.id}}" superClass="gnu.cpp.compiler.option.debugging.prof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.gprof'] %}
+								<option id="gnu.cpp.compiler.option.debugging.gprof.{{u.id}}" superClass="gnu.cpp.compiler.option.debugging.gprof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.codecov'] %}
+								<option id="gnu.cpp.compiler.option.debugging.codecov.{{u.id}}" superClass="gnu.cpp.compiler.option.debugging.codecov" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['c']['verbose'] %}
+								<option id="gnu.cpp.compiler.option.other.verbose.{{u.id}}" superClass="gnu.cpp.compiler.option.other.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.PIC'] %}
+								<option id="gnu.cpp.compiler.option.other.pic.{{u.id}}" superClass="gnu.cpp.compiler.option.other.pic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.datasections'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.fdata.{{u.id}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.fdata" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['optimization.functionsections'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.ffunction.{{u.id}}" name="Place the function in their own section (-ffunction-sections)" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.compiler.ffunction" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['cpp']['otheroptimizations'] != '' or opts['common']['optimization.other'] != '' %}
+								<option id="gnu.cpp.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.cpp.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['cpp']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['cpp']['other'] != '' or opts['cpp']['otherwarnings'] != '' or opts['common']['warnings.other'] != '' %}
+								<option id="fr.ac6.managedbuild.gnu.cpp.compiler.option.misc.other.{{u.id}}" name="Other flags" superClass="fr.ac6.managedbuild.gnu.cpp.compiler.option.misc.other" useByScannerDiscovery="false" value="{{opts['cpp']['other']}} {{opts['cpp']['otherwarnings']}} {{opts['common']['warnings.other']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['cpp']['slowflashdata'] %}
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.pcrop.{{u.id}}" name="No data reads in code memory (-mslow-flash-data) " superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.pcrop" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp.{{opts['uid']['tool_cpp_compiler_input']}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp"/>
+								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s.{{u.id}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s"/>
 							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.c.linker.{{uid}}" name="MCU GCC Linker" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.linker">
-								<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
-								</inputType>
-							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.{{uid}}" name="MCU G++ Linker" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker">
-								<option id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script" value="${workspace_loc:/${ProjName}/{{linker_script}}}" valueType="string"/>
-								<option id="gnu.cpp.link.option.flags.{{uid}}" superClass="gnu.cpp.link.option.flags" value="--specs=nano.specs" valueType="string"/>
-								<option id="gnu.cpp.link.option.userobjs.{{uid}}" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
+							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.{{u.id}}" name="MCU G++ Linker" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker">
+								<option id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script.{{u.id}}" name="Linker Script (-T)" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script" value="${ProjDirPath}/{{opts['name']}}/{{opts['ld']['script']}}" valueType="string"/>
+								{% if opts['ld']['flags'] != '' or opts['ld']['other'] != '' %}
+								<option id="gnu.cpp.link.option.flags.{{u.id}}" name="Linker flags" superClass="gnu.cpp.link.option.flags" value="{{ opts['ld']['flags']|join(' ') }} {{opts['ld']['other']}}" valueType="string"/>
+								{% endif %}
+								<option id="gnu.cpp.link.option.userobjs.{{u.id}}" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
 									{% for path in object_files %}
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
 									{% endfor %}
 								</option>
-								<option id="gnu.cpp.link.option.libs.{{uid}}" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
+								<option id="gnu.cpp.link.option.libs.{{u.id}}" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
 									{% for lib in libraries %}
 									<listOptionValue builtIn="false" value="{{lib}}"/>
 									{% endfor %}
 								</option>
-								<option id="gnu.cpp.link.option.paths.{{uid}}" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
+								{% if opts['ld']['nostart'] %}
+								<option id="gnu.cpp.link.option.nostart.{{u.id}}" name="Do not use standard start files (-nostartfiles)" superClass="gnu.cpp.link.option.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nodeflibs'] %}
+								<option id="gnu.cpp.link.option.nodeflibs.{{u.id}}" superClass="gnu.cpp.link.option.nodeflibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['nostdlibs'] %}
+								<option id="gnu.cpp.link.option.nostdlibs.{{u.id}}" superClass="gnu.cpp.link.option.nostdlibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['strip'] %}
+								<option id="gnu.cpp.link.option.strip.{{u.id}}" superClass="gnu.cpp.link.option.strip" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['shared'] %}
+								<option id="gnu.cpp.link.option.shared.{{u.id}}" superClass="gnu.cpp.link.option.shared" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['ld']['soname'] != '' %}
+								<option id="gnu.cpp.link.option.soname.{{u.id}}" superClass="gnu.cpp.link.option.soname" useByScannerDiscovery="false" value="{{opts['ld']['soname']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['ld']['implname'] != '' %}
+								<option id="gnu.cpp.link.option.implname.{{u.id}}" superClass="gnu.cpp.link.option.implname" useByScannerDiscovery="false" value="{{opts['ld']['implname']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['ld']['defname'] != '' %}
+								<option id="gnu.cpp.link.option.defname.{{u.id}}" superClass="gnu.cpp.link.option.defname" useByScannerDiscovery="false" value="{{opts['ld']['defname']}}" valueType="string"/>
+								{% endif %}
+								{% if opts['common']['debugging.prof'] %}
+								<option id="gnu.cpp.link.option.debugging.prof.{{u.id}}" superClass="gnu.cpp.link.option.debugging.prof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.gprof'] %}
+								<option id="gnu.cpp.link.option.debugging.gprof.{{u.id}}" superClass="gnu.cpp.link.option.debugging.gprof" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								{% if opts['common']['debugging.codecov'] %}
+								<option id="gnu.cpp.link.option.debugging.codecov.{{u.id}}" superClass="gnu.cpp.link.option.debugging.codecov" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
+								<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+								<option id="gnu.cpp.link.option.paths.{{u.id}}" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
 									{% for path in library_paths %}
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
 									{% endfor %}
 								</option>
-								<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
-								</inputType>
-							</tool>							<tool id="fr.ac6.managedbuild.tool.gnu.archiver.{{uid}}" name="MCU GCC Archiver" superClass="fr.ac6.managedbuild.tool.gnu.archiver"/>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.assembler.{{uid}}" name="MCU GCC Assembler" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler">
-								<option id="gnu.both.asm.option.include.paths.{{uid}}" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
-								{% for path in include_paths %}
-								<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
+							</tool>
+							<tool id="fr.ac6.managedbuild.tool.gnu.archiver.{{u.id}}" name="MCU GCC Archiver" superClass="fr.ac6.managedbuild.tool.gnu.archiver"/>
+							<tool id="fr.ac6.managedbuild.tool.gnu.cross.assembler.{{u.id}}" name="MCU GCC Assembler" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler">
+								<option id="gnu.both.asm.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
+									{% for path in include_paths %}
+									<listOptionValue builtIn="false" value="&quot;{{path}}&quot;"/>
+									{% endfor %}
+								</option>
+								{% if opts['as']['other'] != '' or opts['as']['otherwarnings'] != '' %}
+								<option id="gnu.both.asm.option.flags.{{u.id}}" superClass="gnu.both.asm.option.flags" useByScannerDiscovery="false" value="{{opts['as']['other']}} {{opts['as']['otherwarnings']}}" valueType="string"/>
+								{% endif %}
+								{% for item in opts['as']['otherwarnings'] %}
+								{% if item == '-W' %}
+								<option id="gnu.both.asm.option.warnings.nowarn.{{u.id}}" superClass="gnu.both.asm.option.warnings.nowarn" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								{% endif %}
 								{% endfor %}
-								</option>
-								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.assembler.input.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler.input"/>
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
+								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.assembler.input.{{u.id}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler.input"/>
 							</tool>
 						</toolChain>
 					</folderInfo>
+					<sourceEntries>
+						<entry excluding="{{exclude_paths}}" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
 				</configuration>
 			</storageModule>
 			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 		</cconfiguration>
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-				<extensions>
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-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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-								<option id="gnu.c.compiler.option.include.paths.{{uid}}" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
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-							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.{{uid}}" name="MCU G++ Compiler" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler">
-								<option id="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level.{{uid}}" name="Optimization Level" superClass="fr.ac6.managedbuild.gnu.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="fr.ac6.managedbuild.gnu.cpp.optimization.level.most" valueType="enumerated"/>
-								<option id="gnu.cpp.compiler.option.debugging.level.{{uid}}" name="Debug Level" superClass="gnu.cpp.compiler.option.debugging.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.debugging.level.none" valueType="enumerated"/>
-								<option id="gnu.cpp.compiler.option.include.paths.{{uid}}" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
-									{% for path in include_paths %}
-									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
-									{% endfor %}
-								</option>
-								<option id="gnu.cpp.compiler.option.preprocessor.def{{uid}}" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
-								{% for s in symbols %}
-									<listOptionValue builtIn="false" value="{{s}}"/>
-								{% endfor %}
-								</option>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp"/>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.s"/>
-							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.c.linker.{{uid}}" name="MCU GCC Linker" superClass="fr.ac6.managedbuild.tool.gnu.cross.c.linker">
-								<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
-								</inputType>
-							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.{{uid}}" name="MCU G++ Linker" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker">
-								<option id="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.cpp.linker.script" value="${workspace_loc:/${ProjName}/{{linker_script}}}" valueType="string"/>
-								<option id="gnu.cpp.link.option.flags.{{uid}}" superClass="gnu.cpp.link.option.flags" value="--specs=nano.specs" valueType="string"/>
-								<option id="gnu.cpp.link.option.userobjs.{{uid}}" name="Other objects" superClass="gnu.cpp.link.option.userobjs" valueType="userObjs">
-									{% for path in object_files %}
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-									{% endfor %}
-								</option>
-								<option id="gnu.cpp.link.option.libs.{{uid}}" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" valueType="libs">
-									{% for lib in libraries %}
-									<listOptionValue builtIn="false" value="{{lib}}"/>
-									{% endfor %}
-								</option>
-								<option id="gnu.cpp.link.option.paths.{{uid}}" superClass="gnu.cpp.link.option.paths" valueType="libPaths">
-									{% for path in library_paths %}
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
-									{% endfor %}
-								</option>
-								<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
-								</inputType>
-							</tool>
-							<tool id="fr.ac6.managedbuild.tool.gnu.archiver.{{uid}}" name="MCU GCC Archiver" superClass="fr.ac6.managedbuild.tool.gnu.archiver"/>
-							<tool id="fr.ac6.managedbuild.tool.gnu.cross.assembler.{{uid}}" name="MCU GCC Assembler" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler">
-								<option id="gnu.both.asm.option.include.paths.{{uid}}" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
-								{% for path in include_paths %}
-									<listOptionValue builtIn="false" value="&quot;${ProjDirPath}/{{path}}&quot;"/>
-								{% endfor %}
-								</option>
-								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.{{uid}}" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
-								<inputType id="fr.ac6.managedbuild.tool.gnu.cross.assembler.input.{{uid}}" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler.input"/>
-							</tool>
-						</toolChain>
-					</folderInfo>
-				</configuration>
-			</storageModule>
-			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-		</cconfiguration>
+		{% endfor %}
 	</storageModule>
 	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-		<project id="{{name}}.fr.ac6.managedbuild.target.gnu.cross.exe.{{uid}}" name="Executable" projectType="fr.ac6.managedbuild.target.gnu.cross.exe"/>
+		<project id="{{name}}.fr.ac6.managedbuild.target.gnu.cross.exe.{{u.id}}" name="Executable" projectType="fr.ac6.managedbuild.target.gnu.cross.exe"/>
 	</storageModule>
 	<storageModule moduleId="scannerConfiguration">
 		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		<scannerConfigBuildInfo instanceId="fr.ac6.managedbuild.config.gnu.cross.exe.release.{{release_config_uid}};fr.ac6.managedbuild.config.gnu.cross.exe.release.{{release_config_uid}}.;fr.ac6.managedbuild.tool.gnu.cross.c.compiler.{{release_tool_compiler_uid}};fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c.{{debug_tool_compiler_input_uid}}">
+		{% for cfg_key in options %}
+		{% set opts = options[cfg_key] %}	
+		<scannerConfigBuildInfo instanceId="fr.ac6.managedbuild.config.gnu.cross.exe.{{opts['id']}}.{{opts['uid']['config']}};fr.ac6.managedbuild.config.gnu.cross.exe.{{opts['id']}}.{{opts['uid']['config']}}.;fr.ac6.managedbuild.tool.gnu.cross.c.compiler.{{opts['uid']['tool_c_compiler']}};fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c.{{opts['uid']['tool_c_compiler_input']}}">
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
-		<scannerConfigBuildInfo instanceId="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}};fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}.;fr.ac6.managedbuild.tool.gnu.cross.c.compiler.{{debug_tool_compiler_uid}};fr.ac6.managedbuild.tool.gnu.cross.c.compiler.input.c.{{release_tool_compiler_input_uid}}">
+		<scannerConfigBuildInfo instanceId="fr.ac6.managedbuild.config.gnu.cross.exe.{{opts['id']}}.{{opts['uid']['config']}};fr.ac6.managedbuild.config.gnu.cross.exe.{{opts['id']}}.{{opts['uid']['config']}}.;fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.{{opts['uid']['tool_cpp_compiler']}};fr.ac6.managedbuild.tool.gnu.cross.cpp.compiler.input.cpp.{{opts['uid']['tool_cpp_compiler_input']}}">
 			<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
 		</scannerConfigBuildInfo>
+		{% endfor %}
 	</storageModule>
 	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
 </cproject>

--- a/export/sw4stm32/language_settings_commom.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/sw4stm32/language_settings_commom.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -1,25 +1,18 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <project>
-	<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.{{debug_config_uid}}" name="Debug">
+	{% for cfg_id in options %}
+	{% set opts = options[cfg_id] %}
+	<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}" name="{{opts['name']}}">
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="1343080084626211886" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
+			<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-1025524915312781673" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
 		</extension>
 	</configuration>
-	<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.release.{{release_config_uid}}" name="Release">
-		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
-			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
-			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
-			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="1343080084626211886" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
-				<language-scope id="org.eclipse.cdt.core.gcc"/>
-				<language-scope id="org.eclipse.cdt.core.g++"/>
-			</provider>
-		</extension>
-	</configuration>
+	{% endfor %}
 </project>

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/sw4stm32/launch.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,63 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="fr.ac6.mcu.debug.config.launchConfigurationType">
+<stringAttribute key="DEBBUGER_BOARD_NAME" value="{{board_name}}"/>
+<stringAttribute key="DEBBUGER_MCU_NAME" value="{{mcu_name}}"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_DEVICE" value="ST-Link"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_DEVICE_SHAREABLE_ALLOWED" value="false"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_INTERFACE" value="SWD"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_INTERFACE_FREQUENCY" value="4000000.0"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_LOW_POWER_MODE_ALLOWED" value="true"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_RESET_MODE" value="connect_under_reset"/>
+<stringAttribute key="fr.ac6.mcu.ide.DBG_STOP_WATCHDOG_THEN_HALTED_ALLOWED" value="true"/>
+<booleanAttribute key="fr.ac6.mcu.ide.OPENOCD_GENERATOR_OPTION" value="false"/>
+<stringAttribute key="fr.ac6.mcu.ide.OPENOCD_NAME" value="&quot;${openstm32_openocd_path}{% if platform == 'win32' %}\{% else %}/{% endif %}openocd{% if platform == 'win32' %}.exe{% endif %}&quot;"/>
+<stringAttribute key="fr.ac6.mcu.ide.OPENOCD_OTHER_OPTIONS" value=""/>
+{% set cfg_id = 'debug' %}
+{% set opts = options[cfg_id] %}
+<stringAttribute key="fr.ac6.mcu.ide.OPENOCD_SCRIPT" value="{{opts['name']}}{% if platform == 'win32' %}\{% else %}/{% endif %}{{name}} {{opts['name']}}.cfg"/>
+<stringAttribute key="fr.ac6.mcu.ide.OPENOCD_SCRIPT_CHOICE" value="automated"/>
+<stringAttribute key="fr.ac6.mcu.ide.OPENOCD_SCRIPT_IS_LEGACY" value="false"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="monitor reset halt"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${openstm32_compiler_path}{% if platform == 'win32' %}\{% else %}/{% endif %}arm-none-eabi-gdb"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="{{opts['name']}}{% if platform == 'win32' %}\{% else %}/{% endif %}{{name}}-{{cfg_id}}.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="{{name}}"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="fr.ac6.managedbuild.config.gnu.cross.exe.{{cfg_id}}.{{opts['uid']['config']}}"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/{{name}}"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.{{cfg_id}}"/>
+</listAttribute>
+<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#13;&#10;"/>
+<stringAttribute key="process_factory_id" value="fr.ac6.mcu.debug.launching.MCUGdbProcessFactory"/>
+</launchConfiguration>

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/sw4stm32/makefile.targets.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,16 @@
+# DO NOT REMOVE! Generated by the SW4STM32 exporter from the mbed project.
+
+PREPROC_CMD ?= {{cpp_cmd}}
+
+ldclean:
+{% for config, opts in options.iteritems() %}
+	$(RM) {{opts['ld']['script']}}
+{% endfor %}
+
+{% for config, opts in options.iteritems() %}
+{{opts['ld']['script']}}: ../{{ld_script}}
+	$(PREPROC_CMD) {{opts.ld.other}} $< -o $@
+
+{{name}}-{{config}}.elf: {{opts['ld']['script']}}
+
+{% endfor %}

--- a/export/uvision/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/uvision/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -9,7 +9,7 @@
 
 from tools.arm_pack_manager import Cache
 from tools.targets import TARGET_MAP
-from tools.export.exporters import Exporter, filter_supported
+from tools.export.exporters import Exporter, apply_supported_whitelist
 from tools.export.cmsis import DeviceCMSIS
 
 cache_d = False
@@ -129,8 +129,13 @@
         "MTSCode.combine_bins_mts_dragonfly",
         "NCS36510TargetCode.ncs36510_addfib"
     ])
-    TARGETS = [tgt for tgt in filter_supported("ARM", POST_BINARY_WHITELIST)
-               if DeviceCMSIS.check_supported(tgt)]
+
+    @classmethod
+    def is_target_supported(cls, target_name):
+        target = TARGET_MAP[target_name]
+        return apply_supported_whitelist(
+            cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target) and\
+            DeviceCMSIS.check_supported(target_name)
 
     #File associations within .uvprojx file
     file_types = {'.cpp': 8, '.c': 1, '.s': 2,
@@ -162,11 +167,13 @@
         """Format toolchain flags for Uvision"""
         flags = copy.deepcopy(self.flags)
         # to be preprocessed with armcc
-        asm_flag_string = '--cpreproc --cpreproc_opts=-D__ASSERT_MSG,' + \
-                          ",".join(flags['asm_flags'])
+        asm_flag_string = (
+            '--cpreproc --cpreproc_opts=-D__ASSERT_MSG,' +
+            ",".join(filter(lambda f: f.startswith("-D"), flags['asm_flags'])))
         flags['asm_flags'] = asm_flag_string
         # All non-asm flags are in one template field
         c_flags = list(set(flags['c_flags'] + flags['cxx_flags'] +flags['common_flags']))
+        ld_flags = list(set(flags['ld_flags'] ))
         # These flags are in template to be set by user i n IDE
         template = ["--no_vla", "--cpp", "--c99"]
         # Flag is invalid if set in template
@@ -174,6 +181,7 @@
         invalid_flag = lambda x: x in template or re.match("-O(\d|time)", x) 
         flags['c_flags'] = [flag.replace('"','\\"') for flag in c_flags if not invalid_flag(flag)]
         flags['c_flags'] = " ".join(flags['c_flags'])
+        flags['ld_flags'] = " ".join(flags['ld_flags'])
         return flags
 
     def format_src(self, srcs):
@@ -209,10 +217,12 @@
             # UVFile tuples defined above
             'project_files': sorted(list(self.format_src(srcs).iteritems()),
                                     key=lambda (group, _): group.lower()),
-            'linker_script':self.resources.linker_script,
+            'linker_script':self.toolchain.correct_scatter_shebang(
+                self.resources.linker_script),
             'include_paths': '; '.join(self.resources.inc_dirs).encode('utf-8'),
             'device': DeviceUvision(self.target),
         }
+        self.generated_files.append(ctx['linker_script'])
         core = ctx['device'].core
         ctx['cputype'] = core.rstrip("FD")
         if core.endswith("FD"):

--- a/export/uvision/uvision.tmpl	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/uvision/uvision.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -394,7 +394,7 @@
               <MiscControls>{{asm_flags}}</MiscControls>
               <Define></Define>
               <Undefine></Undefine>
-              <IncludePath></IncludePath>
+              <IncludePath>{{include_paths}}</IncludePath>
             </VariousControls>
           </Aads>
           <LDads>
@@ -410,7 +410,7 @@
             <ScatterFile>{{linker_script}}</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
-            <Misc></Misc>
+            <Misc>{{ld_flags}}</Misc>
             <LinkerInputFile></LinkerInputFile>
             <DisabledWarnings></DisabledWarnings>
           </LDads>

--- a/export/vscode/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/export/vscode/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -63,15 +63,18 @@
             "configurations": [
                 {
                     "name": "Windows",
-                    "includePath": [x.replace("/", "\\") for x in all_directories]
+                    "includePath": [x.replace("/", "\\") for x in all_directories],
+                    "defines": [symbol for symbol in self.toolchain.get_symbols()]
                 },
                 {
                     "name": "Mac",
-                    "includePath": all_directories
+                    "includePath": all_directories,
+                    "defines": [symbol for symbol in self.toolchain.get_symbols()]
                 },
                 {
                     "name": "Linux",
-                    "includePath": all_directories
+                    "includePath": all_directories,
+                    "defines": [symbol for symbol in self.toolchain.get_symbols()]
                 }
             ]
         }

--- a/get_config.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/get_config.py	Tue Oct 10 16:56:30 2017 -0500
@@ -67,7 +67,7 @@
         if params:
             print "Configuration parameters"
             print "------------------------"
-            for p in params:
+            for p in sorted(params):
                 for s in options.prefix:
                     if p.startswith(s):
                         print(str(params[p]) if not options.verbose else params[p].get_verbose_description())

--- a/hooks.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/hooks.py	Tue Oct 10 16:56:30 2017 -0500
@@ -65,7 +65,7 @@
         _HOOKS.clear()
         self._cmdline_hooks = {}
         self.toolchain = toolchain
-        target.init_hooks(self, toolchain.__class__.__name__)
+        target.init_hooks(self, toolchain)
 
     # Hook various functions directly
     @staticmethod

--- a/latest_targets.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/latest_targets.json	Tue Oct 10 16:56:30 2017 -0500
@@ -58,7 +58,7 @@
         "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
-        "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "LPC11C24FBD48/301"
     },
     "LPC1114": {
@@ -68,7 +68,7 @@
         "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC1114FN28/102"
@@ -81,7 +81,7 @@
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "detect_code": ["1040"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U24FBD48/401"
@@ -90,7 +90,7 @@
         "inherits": ["LPC11U24"],
         "macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "extra_labels": ["NXP", "LPC11UXX"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2"]
     },
     "LPC11U24_301": {
@@ -99,7 +99,7 @@
         "extra_labels": ["NXP", "LPC11UXX"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "LPC11U24FHI33/301"
     },
     "LPC11U34_421": {
@@ -109,7 +109,7 @@
         "extra_labels": ["NXP", "LPC11UXX"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
 	"default_lib": "small",
         "device_name": "LPC11U34FBD48/311"
     },
@@ -127,7 +127,7 @@
         "extra_labels": ["NXP", "LPC11UXX"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U35FBD48/401"
@@ -139,7 +139,7 @@
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U35FHI33/501"
@@ -151,7 +151,7 @@
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "device_name": "LPC11U35FHI33/501"
     },
@@ -165,7 +165,7 @@
         "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "device_name": "LPC11U35FHI33/501"
     },
@@ -181,7 +181,7 @@
     },
     "LPCCAPPUCCINO": {
         "inherits": ["LPC11U37_501"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "device_name": "LPC11U37FBD64/501"
     },
     "ARCH_GPRS": {
@@ -192,7 +192,7 @@
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U37FBD64/501"
@@ -205,7 +205,7 @@
         "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
         "inherits": ["LPCTarget"],
         "detect_code": ["1168"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U68JBD100"
@@ -238,7 +238,7 @@
         "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "detect_code": ["1010"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
         "features": ["LWIP"],
         "device_name": "LPC1768"
@@ -250,7 +250,7 @@
         "extra_labels": ["NXP", "LPC176X"],
         "macros": ["TARGET_LPC1768"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
         "features": ["LWIP"],
         "device_name": "LPC1768"
@@ -259,22 +259,22 @@
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M3",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "extra_labels": ["NXP", "LPC176X", "FLASH_CMSIS_ALGO"],
+        "extra_labels": ["NXP", "LPC176X"],
         "config": {
             "modem_is_on_board": {
                 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD" 
+                "macro_name": "MODEM_ON_BOARD"
             },
             "modem_data_connection_type": {
                 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD_UART" 
+                "macro_name": "MODEM_ON_BOARD_UART"
             }
         },
         "macros": ["TARGET_LPC1768"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
         "features": ["LWIP"],
         "device_name": "LPC1768"
@@ -283,10 +283,10 @@
         "inherits": ["LPCTarget"],
         "core": "Cortex-M3",
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
-        "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768", "FLASH_CMSIS_ALGO"],
+        "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
         "macros": ["TARGET_LPC1768"],
         "detect_code": ["1010"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "device_name": "LPC1768"
     },
     "LPC810": {
@@ -296,7 +296,7 @@
         "extra_labels": ["NXP", "LPC81X"],
         "is_disk_virtual": true,
         "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
-        "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "device_name": "LPC810M021FN8"
     },
@@ -309,7 +309,7 @@
         "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
         "inherits": ["LPCTarget"],
         "detect_code": ["1050"],
-        "device_has": ["ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC812M101JDH20"
@@ -322,7 +322,7 @@
         "is_disk_virtual": true,
         "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC824M201JDH20"
@@ -334,7 +334,7 @@
         "extra_labels": ["NXP", "LPC82X"],
         "is_disk_virtual": true,
         "supported_toolchains": ["uARM", "GCC_ARM"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"]
     },
@@ -347,7 +347,7 @@
         "post_binary_hook": {
             "function": "LPC4088Code.binary_hook"
         },
-        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "features": ["LWIP"],
         "device_name": "LPC4088FBD144"
     },
@@ -364,7 +364,7 @@
         "core": "Cortex-M4F",
         "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
         "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "LPC4330"
     },
     "LPC4330_M0": {
@@ -372,14 +372,14 @@
         "core": "Cortex-M0",
         "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
         "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
+        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
     },
     "LPC4337": {
         "inherits": ["LPCTarget"],
         "core": "Cortex-M4F",
         "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
         "supported_toolchains": ["ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ERROR_RED", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2"],
         "device_name": "LPC4337"
     },
@@ -398,7 +398,7 @@
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
         "inherits": ["LPCTarget"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "LPC11U37HFBD64/401"
@@ -422,7 +422,7 @@
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "small",
         "release_versions": ["2"],
         "device_name": "MKL05Z32xxx4"
@@ -435,7 +435,7 @@
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0200"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "MKL25Z128xxx4"
     },
@@ -446,7 +446,7 @@
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "device_name": "MKL26Z128xxx4"
     },
     "KL46Z": {
@@ -457,7 +457,7 @@
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
         "inherits": ["Target"],
         "detect_code": ["0220"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "MKL46Z256xxx4",
         "bootloader_supported": true
@@ -469,7 +469,7 @@
         "is_disk_virtual": true,
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
         "detect_code": ["0230"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2"],
         "device_name": "MK20DX128xxx5"
     },
@@ -485,7 +485,7 @@
             "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
         },
         "detect_code": ["0230"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2"],
         "device_name": "MK20DX256xxx7"
     },
@@ -498,7 +498,7 @@
         "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0231"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "device_name": "MK22DN512xxx5"
     },
     "K22F": {
@@ -517,7 +517,7 @@
         "is_disk_virtual": true,
         "default_toolchain": "ARM",
         "detect_code": ["0261"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "default_lib": "std",
         "release_versions": ["2"],
         "device_name": "MKL27Z64xxx4"
@@ -531,7 +531,7 @@
         "is_disk_virtual": true,
         "inherits": ["Target"],
         "detect_code": ["0262"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "MKL43Z256xxx4"
     },
@@ -544,7 +544,7 @@
         "is_disk_virtual": true,
         "inherits": ["Target"],
         "detect_code": ["0218"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "release_versions": ["2", "5"],
         "device_name": "MKL82Z128xxx7"
     },
@@ -563,9 +563,10 @@
         "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0250"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "MKW24D512xxx5"
+        "device_name": "MKW24D512xxx5",
+        "bootloader_supported": true
     },
     "KW41Z": {
         "supported_form_factors": ["ARDUINO"],
@@ -576,7 +577,7 @@
         "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0201"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"],
         "device_name": "MKW41Z512xxx4"
     },
@@ -588,7 +589,7 @@
         "public": false,
         "macros": ["CPU_MK24FN1M0VDC12", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "device_name": "MK24FN1M0xxx12"
     },
     "RO359B": {
@@ -606,7 +607,7 @@
         "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0240"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
         "features": ["LWIP", "STORAGE"],
         "release_versions": ["2", "5"],
         "device_name": "MK64FN1M0xxx12",
@@ -631,7 +632,7 @@
         "is_disk_virtual": true,
         "default_toolchain": "ARM",
         "detect_code": ["0214"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "default_lib": "std",
         "release_versions": ["2", "5"],
         "device_name": "MK64FN1M0xxx12"
@@ -645,7 +646,7 @@
         "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0311"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "MK66FN2M0xxx18"
@@ -659,7 +660,7 @@
         "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
         "inherits": ["Target"],
         "detect_code": ["0217"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
         "release_versions": ["2", "5"],
         "device_name": "MK82FN256xxx15"
     },
@@ -676,11 +677,44 @@
         "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
     },
+    "LPC54114": {
+        "supported_form_factors": ["ARDUINO"],
+        "core": "Cortex-M4F",
+        "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
+        "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso"],
+        "is_disk_virtual": true,
+        "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"],
+        "inherits": ["Target"],
+        "detect_code": ["1054"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "release_versions": ["2", "5"],
+        "device_name" : "LPC54114J256BD64"
+    },
+    "LPC54608": {
+        "supported_form_factors": ["ARDUINO"],
+        "core": "Cortex-M4F",
+        "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
+        "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54608", "LPCXpresso"],
+        "is_disk_virtual": true,
+        "macros": ["CPU_LPC54608J512ET180", "FSL_RTOS_MBED"],
+        "inherits": ["Target"],
+        "detect_code": ["1056"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "release_versions": ["2", "5"],
+        "device_name" : "LPC54608J512ET180"
+    },
     "NUCLEO_F030R8": {
         "inherits": ["FAMILY_STM32"],
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0",
         "extra_labels_add": ["STM32F0", "STM32F030R8"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0725"],
         "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["SERIAL_FC"],
@@ -694,6 +728,13 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels_add": ["STM32F0", "STM32F031K6"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0791"],
         "macros_add": ["RTC_LSI=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["SERIAL_FC"],
@@ -707,6 +748,13 @@
         "core": "Cortex-M0",
         "default_toolchain": "uARM",
         "extra_labels_add": ["STM32F0", "STM32F042K6"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0785"],
         "macros_add": ["RTC_LSI=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["CAN", "SERIAL_FC"],
@@ -719,6 +767,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0",
         "extra_labels_add": ["STM32F0", "STM32F070RB"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0755"],
         "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
@@ -730,6 +785,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0",
         "extra_labels_add": ["STM32F0", "STM32F072RB"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0730"],
         "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
@@ -741,6 +803,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0",
         "extra_labels_add": ["STM32F0", "STM32F091RC"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0750"],
         "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH"],
@@ -752,6 +821,18 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M3",
         "extra_labels_add": ["STM32F1", "STM32F103RB"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            },
+            "clock_source_usb": {
+                "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
+                "value": "0",
+                "macro_name": "CLOCK_SOURCE_USB"
+            }
+        },
         "detect_code": ["0700"],
         "device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH"],
         "release_versions": ["2", "5"],
@@ -767,6 +848,11 @@
                 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
                 "value": "PA_7",
                 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            },
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
             }
         },
         "detect_code": ["0835"],
@@ -781,6 +867,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0705"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
         "default_lib": "small",
@@ -793,6 +886,13 @@
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"],
         "macros_add": ["RTC_LSI=1"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0775"],
         "default_lib": "small",
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
@@ -804,6 +904,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0745"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
         "release_versions": ["2", "5"],
@@ -814,6 +921,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0747"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER"],
         "release_versions": ["2", "5"],
@@ -824,6 +938,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0735"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
         "default_lib": "small",
@@ -844,7 +965,7 @@
         },
         "detect_code": ["0720"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ERROR_RED", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F401RE"
     },
@@ -861,7 +982,7 @@
             }
         },
         "detect_code": ["0744"],
-        "device_has_add": ["ANALOGOUT", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F410RB"
     },
@@ -884,7 +1005,7 @@
             }
         },
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F411RE"
     },
@@ -902,9 +1023,10 @@
         },
         "detect_code": ["0826"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG"],
+        "device_has_add": ["CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "STM32F412ZG"
+        "device_name": "STM32F412ZG",
+        "bootloader_supported": true
     },
     "DISCO_F413ZH": {
         "inherits": ["FAMILY_STM32"],
@@ -920,7 +1042,7 @@
         },
         "detect_code": ["0743"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F413ZH"
     },
@@ -958,9 +1080,9 @@
                 "macro_name": "CLOCK_SOURCE_USB"
             }
         },
-        "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "FLASH_CMSIS_ALGO"],
+        "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
         "detect_code": ["0796"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
@@ -988,9 +1110,9 @@
                 "macro_name": "CLOCK_SOURCE_USB"
             }
         },
-        "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI", "FLASH_CMSIS_ALGO"],
+        "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI"],
         "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
         "detect_code": ["0797"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
@@ -1011,7 +1133,7 @@
         },
         "detect_code": ["0777"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F446RE"
     },
@@ -1029,7 +1151,7 @@
         },
         "detect_code": ["0778"],
         "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F446ZE"
     },
@@ -1039,7 +1161,7 @@
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"],
         "detect_code": ["0840"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name":"STM32F446VE"
     },
@@ -1052,12 +1174,17 @@
                 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
                 "value": "PA_7",
                 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            },
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
             }
         },
         "macros_add": ["USBHOST_OTHER"],
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0816"],
-        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F746ZG"
@@ -1071,11 +1198,17 @@
                 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
                 "value": "PA_7",
                 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            },
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
             }
         },
+        "macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0819"],
-        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F756ZG"
@@ -1089,12 +1222,17 @@
                 "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
                 "value": "PA_7",
                 "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
+            },
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
             }
         },
         "supported_form_factors": ["ARDUINO"],
         "macros_add": ["USBHOST_OTHER"],
         "detect_code": ["0818"],
-        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F767ZI"
@@ -1106,6 +1244,13 @@
         "supported_toolchains": ["uARM"],
         "default_toolchain": "uARM",
         "supported_form_factors": ["ARDUINO"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0780"],
         "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
         "default_lib": "small",
@@ -1118,6 +1263,13 @@
         "extra_labels_add": ["STM32L0", "STM32L031K6"],
         "default_toolchain": "uARM",
         "supported_form_factors": ["ARDUINO"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0790"],
         "device_has_add": ["LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
         "default_lib": "small",
@@ -1128,7 +1280,14 @@
         "inherits": ["FAMILY_STM32"],
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0+",
-        "extra_labels_add": ["STM32L0", "STM32L053R8"],
+        "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0715"],
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
         "default_lib": "small",
@@ -1140,6 +1299,13 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M0+",
         "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0760"],
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
@@ -1150,8 +1316,15 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M3",
         "extra_labels_add": ["STM32L1", "STM32L152RE"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0710"],
-        "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
+        "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L152RE"
     },
@@ -1160,6 +1333,13 @@
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
+                "value": "USE_PLL_MSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0770"],
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "CAN", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
@@ -1172,7 +1352,7 @@
         "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"],
         "config": {
             "clock_source": {
-                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI (L4)",
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
                 "value": "USE_PLL_MSI",
                 "macro_name": "CLOCK_SOURCE"
             }
@@ -1189,8 +1369,15 @@
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
+                "value": "USE_PLL_MSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0827"],
-        "macros_add": ["USBHOST_OTHER"],
+        "macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32L486RG"
@@ -1211,6 +1398,13 @@
         "core": "Cortex-M0",
         "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"],
         "supported_toolchains": ["GCC_ARM"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "device_has_add": ["SERIAL_FC"],
         "device_name": "STM32F051R8"
@@ -1237,6 +1431,13 @@
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"],
         "macros_add": ["RTC_LSI=1"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0810"],
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
         "default_lib": "small",
@@ -1249,13 +1450,13 @@
         "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
         "macros_add": ["USB_STM_HAL"],
-        "device_has_add": ["ANALOGOUT", "ERROR_RED"],
+        "device_has_add": ["ANALOGOUT"],
         "device_name": "STM32F407VG"
     },
     "DISCO_F429ZI": {
         "inherits": ["FAMILY_STM32"],
         "core": "Cortex-M4F",
-        "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx", "FLASH_CMSIS_ALGO"],
+        "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
         "config": {
             "clock_source": {
                 "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
@@ -1269,7 +1470,7 @@
             }
         },
         "macros_add": ["RTC_LSI=1", "USBHOST_OTHER"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
+        "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F429ZI"
     },
@@ -1286,15 +1487,22 @@
             }
         },
         "detect_code": ["0788"],
-        "device_has_add": ["ANALOGOUT", "CAN", "ERROR_RED", "LOWPOWERTIMER", "SERIAL_FC", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F469NI"
     },
     "DISCO_L053C8": {
         "inherits": ["FAMILY_STM32"],
         "core": "Cortex-M0+",
-        "extra_labels_add": ["STM32L0", "STM32L053C8"],
+        "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"],
         "macros": ["RTC_LSI=1"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_EXTC|USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
         "default_lib": "small",
         "release_versions": ["2"],
@@ -1306,6 +1514,13 @@
         "extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xx"],
         "supported_form_factors": ["ARDUINO", "MORPHO"],
         "macros": ["RTC_LSI=1"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
+                "value": "USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0833"],
         "device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG"],
         "release_versions": ["2", "5"],
@@ -1316,8 +1531,15 @@
         "core": "Cortex-M7F",
         "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG"],
         "supported_form_factors": ["ARDUINO"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0815"],
-        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F746NG"
@@ -1327,8 +1549,15 @@
         "core": "Cortex-M7FD",
         "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI"],
         "supported_form_factors": ["ARDUINO"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
+                "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0817"],
-        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["2", "5"],
         "device_name": "STM32F769NI"
@@ -1337,6 +1566,13 @@
         "inherits": ["FAMILY_STM32"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
+                "value": "USE_PLL_MSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "supported_form_factors": ["ARDUINO"],
         "detect_code": ["0764"],
         "macros_add": ["USBHOST_OTHER"],
@@ -1348,11 +1584,19 @@
         "inherits": ["FAMILY_STM32"],
         "core": "Cortex-M4F",
         "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"],
+        "config": {
+            "clock_source": {
+                "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
+                "value": "USE_PLL_MSI",
+                "macro_name": "CLOCK_SOURCE"
+            }
+        },
         "detect_code": ["0820"],
         "macros_add": ["USBHOST_OTHER"],
         "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
         "release_versions": ["2", "5"],
-        "device_name": "STM32L476VG"
+        "device_name": "STM32L476VG",
+        "bootloader_supported": true
     },
     "MTS_MDOT_F405RG": {
         "inherits": ["FAMILY_STM32"],
@@ -1385,12 +1629,12 @@
             "modem_is_on_board": {
                 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD" 
+                "macro_name": "MODEM_ON_BOARD"
             },
             "modem_data_connection_type": {
                 "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD_UART" 
+                "macro_name": "MODEM_ON_BOARD_UART"
             }
         },
         "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000", "RTC_LSI=1"],
@@ -1407,10 +1651,22 @@
         "core": "Cortex-M3",
         "default_toolchain": "ARM",
         "extra_labels_add": ["STM32L1", "STM32L151CC"],
+        "config": {
+            "hse_value": {
+            "value": "24000000",
+            "macro_name": "HSE_VALUE"
+            }
+        },
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
-        "device_has_add": ["ANALOGOUT"],
+        "device_has_add": ["ANALOGOUT", "FLASH"],
         "release_versions": ["5"],
-        "device_name": "STM32L151CC"
+        "device_name": "STM32L151CC",
+        "bootloader_supported": true
+    },
+    "FF1705_L151CC": {
+        "supported_form_factors": ["ARDUINO"],
+        "inherits": ["XDOT_L151CC"],
+        "detect_code": ["8080"]
     },
     "MOTE_L152RC": {
         "inherits": ["FAMILY_STM32"],
@@ -1430,15 +1686,15 @@
         "default_toolchain": "GCC_ARM",
         "extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"],
         "supported_toolchains": ["GCC_ARM"],
-        "device_has_add": ["ERROR_RED"],
+        "device_has_add": [],
         "device_name": "STM32F401VC"
     },
     "UBLOX_EVK_ODIN_W2": {
         "inherits": ["FAMILY_STM32"],
         "supported_form_factors": ["ARDUINO"],
         "core": "Cortex-M4F",
-        "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI", "FLASH_CMSIS_ALGO"],
-        "macros": ["HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
+        "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI"],
+        "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
         "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH"],
         "device_has_remove": ["RTC", "SLEEP"],
         "features": ["LWIP"],
@@ -1456,19 +1712,20 @@
             "modem_is_on_board": {
                 "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD" 
+                "macro_name": "MODEM_ON_BOARD"
             },
             "modem_data_connection_type": {
                 "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
                 "value": 1,
-                "macro_name": "MODEM_ON_BOARD_UART" 
+                "macro_name": "MODEM_ON_BOARD_UART"
             }
         },
         "macros_add": ["RTC_LSI=1", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
-        "device_has_add": ["ANALOGOUT", "TRNG"],
+        "device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"],
         "features": ["LWIP"],
         "public": false,
-        "device_name": "STM32F437VG"
+        "device_name": "STM32F437VG",
+        "bootloader_supported": true
     },
     "UBLOX_C030_U201": {
         "inherits": ["UBLOX_C030"],
@@ -1536,7 +1793,7 @@
         },
         "program_cycle_s": 6,
         "features": ["BLE"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
     },
     "MCU_NRF51_16K_BASE": {
         "inherits": ["MCU_NRF51"],
@@ -1763,7 +2020,7 @@
         "inherits": ["MCU_NRF51_32K"],
         "program_cycle_s": 10,
         "macros_add": ["TARGET_NRF_LFCLK_RC"],
-        "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
         "release_versions": ["2"],
         "device_name": "nRF51822_xxAA"
     },
@@ -1782,7 +2039,7 @@
     "DELTA_DFCM_NNN50": {
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "device_name": "nRF51822_xxAC"
     },
     "DELTA_DFCM_NNN50_BOOT": {
@@ -1880,7 +2137,7 @@
     "TY51822R3": {
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
         "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "detect_code": ["1019"],
         "release_versions": ["2", "5"],
         "overrides": {"uart_hwfc": 0},
@@ -1975,7 +2232,9 @@
         "extra_labels": ["ARM_SSG", "CM3DS_MPS2"],
         "macros": ["CMSDK_CM3DS"],
         "device_has": ["ANALOGIN", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SPI", "RTC"],
-        "release_versions": ["2", "5"]
+        "release_versions": ["2", "5"],
+        "copy_method": "mps2",
+        "reset_method": "reboot.txt"
     },
     "ARM_BEETLE_SOC": {
         "inherits": ["ARM_IOTSS_Target"],
@@ -1995,7 +2254,7 @@
         "extra_labels": ["RENESAS", "MBRZA1H"],
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "features": ["LWIP"],
         "release_versions": ["2"]
     },
@@ -2006,7 +2265,7 @@
         "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
         "default_toolchain": "ARM",
         "program_cycle_s": 2,
-        "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "features": ["LWIP"],
         "default_lib": "std",
         "release_versions": ["2"]
@@ -2017,7 +2276,7 @@
         "macros": ["__SYSTEM_HFX=24000000"],
         "extra_labels": ["Maxim", "MAX32610"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
         "features": ["BLE"],
         "release_versions": ["2", "5"]
     },
@@ -2027,7 +2286,7 @@
         "macros": ["__SYSTEM_HFX=24000000"],
         "extra_labels": ["Maxim", "MAX32600"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "MAX32620HSP": {
@@ -2035,7 +2294,7 @@
         "core": "Cortex-M4F",
         "extra_labels": ["Maxim", "MAX32620"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "features": ["BLE"],
         "release_versions": ["2", "5"]
     },
@@ -2045,7 +2304,7 @@
         "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
         "extra_labels": ["Maxim", "MAX32625"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "MAX32625NEXPAQ": {
@@ -2054,16 +2313,17 @@
         "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
         "extra_labels": ["Maxim", "MAX32625"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "MAX32630FTHR": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
-        "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132"],
+        "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"],
         "extra_labels": ["Maxim", "MAX32630"],
         "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
-        "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
+		"features": ["BLE"],
         "release_versions": ["2", "5"]
     },
     "EFM32": {
@@ -2085,7 +2345,7 @@
     "EFM32GG_STK3700": {
         "inherits": ["EFM32GG990F1024"],
         "progen": {"target": "efm32gg-stk"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2138,7 +2398,7 @@
     },
     "EFM32LG_STK3600": {
         "inherits": ["EFM32LG990F256"],
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "device_name": "EFM32LG990F256",
         "config": {
@@ -2193,7 +2453,7 @@
     "EFM32WG_STK3800": {
         "inherits": ["EFM32WG990F256"],
         "progen": {"target": "efm32wg-stk"},
-        "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2247,7 +2507,7 @@
     },
     "EFM32ZG_STK3200": {
         "inherits": ["EFM32ZG222F32"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2301,7 +2561,7 @@
     },
     "EFM32HG_STK3400": {
         "inherits": ["EFM32HG322F64"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2354,7 +2614,7 @@
     },
     "EFM32PG_STK3401": {
         "inherits": ["EFM32PG1B100F256GM32"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2417,7 +2677,7 @@
     },
     "EFR32MG1_BRD4150": {
         "inherits": ["EFR32MG1P132F256GM48"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2460,7 +2720,7 @@
     },
     "TB_SENSE_1": {
         "inherits": ["EFR32MG1P233F256GM48"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "FLASH"],
         "forced_reset_timeout": 5,
         "config": {
             "hf_clock_src": {
@@ -2507,7 +2767,7 @@
     },
     "EFM32PG12_STK3402": {
         "inherits": ["EFM32PG12B500F1024GL125"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "forced_reset_timeout": 2,
         "config": {
             "hf_clock_src": {
@@ -2559,7 +2819,7 @@
     },
 	"TB_SENSE_12": {
         "inherits": ["EFR32MG12P332F1024GL125"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
         "forced_reset_timeout": 5,
         "config": {
             "hf_clock_src": {
@@ -2601,7 +2861,7 @@
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "WIZWIKI_W7500P": {
@@ -2611,7 +2871,7 @@
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],
-        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "WIZWIKI_W7500ECO": {
@@ -2620,7 +2880,7 @@
         "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
         "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
         "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
-        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
         "release_versions": ["2", "5"]
     },
     "SAMR21G18A": {
@@ -2685,7 +2945,9 @@
             "S130",
             "TARGET_MCU_NRF51822",
             "CMSIS_VECTAB_VIRTUAL",
-            "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""
+            "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
+            "NO_SYSTICK",
+            "MBED_TICKLESS"
         ],
         "MERGE_BOOTLOADER": false,
         "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5", "SDK11"],
@@ -2719,7 +2981,7 @@
                 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
             }
         },
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
+        "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
     },
     "MCU_NRF51_32K_UNIFIED": {
         "inherits": ["MCU_NRF51_UNIFIED"],
@@ -2730,20 +2992,20 @@
     "NRF51_DK": {
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "device_name": "nRF51822_xxAA"
     },
     "NRF51_DONGLE": {
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
         "progen": {"target": "nrf51-dongle"},
-        "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"]
     },
     "MCU_NRF52": {
         "inherits": ["Target"],
         "core": "Cortex-M4F",
-        "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"", "MBED_TICKLESS"],
         "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5", "SDK11", "NRF52_COMMON"],
         "OUTPUT_EXT": "hex",
         "is_disk_virtual": true,
@@ -2781,14 +3043,14 @@
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF52"],
         "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "device_name": "nRF52832_xxAA"
     },
     "UBLOX_EVA_NINA": {
         "inherits": ["MCU_NRF52"],
         "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "overrides": {"uart_hwfc": 0},
         "device_name": "nRF52832_xxAA"
@@ -2797,7 +3059,7 @@
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF52"],
         "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "device_name": "nRF52832_xxAA"
     },
@@ -2805,7 +3067,7 @@
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF52"],
         "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2", "5"],
         "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
         "config": {
@@ -2862,7 +3124,7 @@
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF52840"],
         "macros_add": ["BOARD_PCA10056", "CONFIG_GPIO_AS_PINRESET", "SWI_DISABLE0", "NRF52_ERRATA_20"],
-        "device_has": ["FLASH", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "TRNG"],
+        "device_has": ["FLASH", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "TRNG"],
         "release_versions": ["2", "5"],
         "device_name": "nRF52840_xxAA"
     },
@@ -2881,7 +3143,26 @@
         "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "config": {
+            "gpio-irq-debounce-enable": {
+                "help": "Enable GPIO IRQ debounce",
+                "value": 0
+            },
+            "gpio-irq-debounce-enable-list": {
+                "help": "Comma separated pin list to enable GPIO IRQ debounce",
+                "value": "NC"
+            },
+            "gpio-irq-debounce-clock-source": {
+                "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
+                "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
+            },
+            "gpio-irq-debounce-sample-rate": {
+                "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
+                "value": "GPIO_DBCTL_DBCLKSEL_16"
+            }
+        },
         "inherits": ["Target"],
+        "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["5"],
@@ -2918,6 +3199,7 @@
                 "value": "0xFFFFFFFF"
             }
         },
+        "OUTPUT_EXT": "hex",
         "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
         "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
         "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
@@ -2930,6 +3212,24 @@
         "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "config": {
+            "gpio-irq-debounce-enable": {
+                "help": "Enable GPIO IRQ debounce",
+                "value": 0
+            },
+            "gpio-irq-debounce-enable-list": {
+                "help": "Comma separated pin list to enable GPIO IRQ debounce",
+                "value": "NC"
+            },
+            "gpio-irq-debounce-clock-source": {
+                "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
+                "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
+            },
+            "gpio-irq-debounce-sample-rate": {
+                "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
+                "value": "GPIO_DBCTL_DBCLKSEL_16"
+            }
+        },
         "inherits": ["Target"],
         "progen": {"target": "numaker-pfm-m453"},
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
@@ -2937,6 +3237,18 @@
         "device_name": "M453VG6AE",
         "bootloader_supported": true
     },
+    "NUMAKER_PFM_NANO130": {
+        "core": "Cortex-M0",
+        "default_toolchain": "ARM",
+        "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
+        "is_disk_virtual": true,
+        "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "inherits": ["Target"],
+        "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
+        "release_versions": ["5"],
+        "device_name": "NANO130KE3BN"
+    },
     "HI2110": {
         "inherits": ["Target"],
         "core": "Cortex-M0",
@@ -3000,8 +3312,68 @@
     "VBLUNO51": {
         "supported_form_factors": ["ARDUINO"],
         "inherits": ["MCU_NRF51_32K_UNIFIED"],
-        "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
         "release_versions": ["2"],
         "device_name": "nRF51822_xxAC"
+    },
+    "VBLUNO52": {
+        "supported_form_factors": ["ARDUINO"],
+        "inherits": ["MCU_NRF52"],
+        "macros_add": ["BOARD_PCA10040", "BOARD_VBLUNO52", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
+        "device_has": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
+        "release_versions": ["2"],
+        "device_name": "nRF52832_xxAA"
+    },
+    "NUMAKER_PFM_M487": {
+        "core": "Cortex-M4F",
+        "default_toolchain": "ARM",
+        "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO"],
+        "is_disk_virtual": true,
+        "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "config": {
+            "gpio-irq-debounce-enable": {
+                "help": "Enable GPIO IRQ debounce",
+                "value": 0
+            },
+            "gpio-irq-debounce-enable-list": {
+                "help": "Comma separated pin list to enable GPIO IRQ debounce",
+                "value": "NC"
+            },
+            "gpio-irq-debounce-clock-source": {
+                "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
+                "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
+            },
+            "gpio-irq-debounce-sample-rate": {
+                "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
+                "value": "GPIO_DBCTL_DBCLKSEL_16"
+            },
+            "usb-device-hsusbd": {
+                "help": "Select high-speed USB device or not",
+                "value": 1
+            },
+            "ctrl01-enable": {
+                "help": "Enable control_01",
+                "value": 0
+            }
+        },
+        "inherits": ["Target"],
+        "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
+        "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN"],
+        "features": ["LWIP"],
+        "release_versions": ["5"],
+        "device_name": "M487JIDAE",
+        "bootloader_supported": true
+    },
+    "TMPM066": {
+        "inherits": ["Target"],
+        "core": "Cortex-M0",
+        "is_disk_virtual": true,
+        "extra_labels": ["TOSHIBA"],
+        "macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
+        "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
+        "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"],
+        "device_name": "TMPM066FWUG",
+        "detect_code": ["7011"],
+        "release_versions": ["5"]
     }
 }

--- a/make.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/make.py	Tue Oct 10 16:56:30 2017 -0500
@@ -58,51 +58,66 @@
     # Parse Options
     parser = get_default_options_parser(add_app_config=True)
     group = parser.add_mutually_exclusive_group(required=False)
-    group.add_argument("-p",
-                      type=argparse_many(test_known),
-                      dest="program",
-                      help="The index of the desired test program: [0-%d]" % (len(TESTS)-1))
+    group.add_argument(
+        "-p",
+        type=argparse_many(test_known),
+        dest="program",
+        help="The index of the desired test program: [0-%d]" % (len(TESTS)-1))
 
-    group.add_argument("-n",
-                       type=argparse_many(test_name_known),
-                      dest="program",
-                      help="The name of the desired test program")
+    group.add_argument(
+        "-n",
+        type=argparse_many(test_name_known),
+        dest="program",
+        help="The name of the desired test program")
 
-    parser.add_argument("-j", "--jobs",
-                      type=int,
-                      dest="jobs",
-                      default=0,
-                      help="Number of concurrent jobs. Default: 0/auto (based on host machine's number of CPUs)")
+    parser.add_argument(
+        "-j", "--jobs",
+        type=int,
+        dest="jobs",
+        default=0,
+        help="Number of concurrent jobs. Default: 0/auto (based on host machine's number of CPUs)")
 
-    parser.add_argument("-v", "--verbose",
-                      action="store_true",
-                      dest="verbose",
-                      default=False,
-                      help="Verbose diagnostic output")
+    parser.add_argument(
+        "-v", "--verbose",
+        action="store_true",
+        dest="verbose",
+        default=False,
+        help="Verbose diagnostic output")
 
-    parser.add_argument("--silent",
-                      action="store_true",
-                      dest="silent",
-                      default=False,
-                      help="Silent diagnostic output (no copy, compile notification)")
+    parser.add_argument(
+        "--silent",
+        action="store_true",
+        dest="silent",
+        default=False,
+        help="Silent diagnostic output (no copy, compile notification)")
 
-    parser.add_argument("-D",
-                      action="append",
-                      dest="macros",
-                      help="Add a macro definition")
+    parser.add_argument(
+        "-D",
+        action="append",
+        dest="macros",
+        help="Add a macro definition")
 
-    group.add_argument("-S", "--supported-toolchains",
-                      dest="supported_toolchains",
-                      default=False,
-                      const="matrix",
-                      choices=["matrix", "toolchains", "targets"],
-                      nargs="?",
-                      help="Displays supported matrix of MCUs and toolchains")
+    group.add_argument(
+        "-S", "--supported-toolchains",
+        dest="supported_toolchains",
+        default=False,
+        const="matrix",
+        choices=["matrix", "toolchains", "targets"],
+        nargs="?",
+        help="Displays supported matrix of MCUs and toolchains")
 
-    parser.add_argument('-f', '--filter',
-                      dest='general_filter_regex',
-                      default=None,
-                      help='For some commands you can use filter to filter out results')
+    parser.add_argument(
+        '-f', '--filter',
+        dest='general_filter_regex',
+        default=None,
+        help='For some commands you can use filter to filter out results')
+
+    parser.add_argument(
+        "--stats-depth",
+        type=int,
+        dest="stats_depth",
+        default=2,
+        help="Depth level for static memory report")
 
     # Local run
     parser.add_argument("--automated", action="store_true", dest="automated",
@@ -277,7 +292,8 @@
                                      inc_dirs=[dirname(MBED_LIBRARIES)],
                                      build_profile=extract_profile(parser,
                                                                    options,
-                                                                   toolchain))
+                                                                   toolchain),
+                                     stats_depth=options.stats_depth)
             print 'Image: %s'% bin_file
 
             if options.disk:
@@ -322,7 +338,7 @@
                 traceback.print_exc(file=sys.stdout)
             else:
                 print "[ERROR] %s" % str(e)
-            
+
             sys.exit(1)
     if options.build_data:
         merge_build_data(options.build_data, build_data_blob, "application")

--- a/memap.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/memap.py	Tue Oct 10 16:56:30 2017 -0500
@@ -8,19 +8,30 @@
 import csv
 import json
 import argparse
+from copy import deepcopy
 from prettytable import PrettyTable
 
 from utils import argparse_filestring_type, \
     argparse_lowercase_hyphen_type, argparse_uppercase_type
 
-DEBUG = False
-
 RE_ARMCC = re.compile(
     r'^\s+0x(\w{8})\s+0x(\w{8})\s+(\w+)\s+(\w+)\s+(\d+)\s+[*]?.+\s+(.+)$')
 RE_IAR = re.compile(
     r'^\s+(.+)\s+(zero|const|ro code|inited|uninit)\s'
     r'+0x(\w{8})\s+0x(\w+)\s+(.+)\s.+$')
 
+RE_CMDLINE_FILE_IAR = re.compile(r'^#\s+(.+\.o)')
+RE_LIBRARY_IAR = re.compile(r'^(.+\.a)\:.+$')
+RE_OBJECT_LIBRARY_IAR = re.compile(r'^\s+(.+\.o)\s.*')
+
+RE_OBJECT_FILE_GCC = re.compile(r'^(.+\/.+\.o)$')
+RE_LIBRARY_OBJECT_GCC = re.compile(r'^.+\/lib(.+\.a)\((.+\.o)\)$')
+RE_STD_SECTION_GCC = re.compile(r'^\s+.*0x(\w{8,16})\s+0x(\w+)\s(.+)$')
+RE_FILL_SECTION_GCC = re.compile(r'^\s*\*fill\*\s+0x(\w{8,16})\s+0x(\w+).*$')
+
+RE_OBJECT_ARMCC = re.compile(r'(.+\.(l|ar))\((.+\.o)\)')
+
+
 class MemapParser(object):
     """An object that represents parsed results, parses the memory map files,
     and writes out different file types of memory results
@@ -38,22 +49,18 @@
     # sections to print info (generic for all toolchains)
     sections = ('.text', '.data', '.bss', '.heap', '.stack')
 
-    def __init__(self, detailed_misc=False):
+    def __init__(self):
         """ General initialization
         """
-        # 
-        self.detailed_misc = detailed_misc
-        
+
         # list of all modules and their sections
-        self.modules = dict()
+        self.modules = dict()       # full list - doesn't change with depth
+        self.short_modules = dict() # short version with specific depth
 
         # sections must be defined in this order to take irrelevant out
         self.all_sections = self.sections + self.other_sections + \
                             self.misc_flash_sections + ('unknown', 'OUTPUT')
 
-        # list of all object files and mappting to module names
-        self.object_to_module = dict()
-
         # Memory report (sections + summary)
         self.mem_report = []
 
@@ -62,23 +69,46 @@
 
         self.subtotal = dict()
 
-    def module_add(self, module_name, size, section):
+        self.misc_flash_mem = 0
+
+        # Modules passed to the linker on the command line
+        # this is a dict because modules are looked up by their basename
+        self.cmd_modules = {}
+
+
+    def module_add(self, object_name, size, section):
         """ Adds a module / section to the list
 
         Positional arguments:
-        module_name - name of the module to add
+        object_name - name of the entry to add
         size - the size of the module being added
         section - the section the module contributes to
         """
 
-        if module_name in self.modules:
-            self.modules[module_name][section] += size
-        else:
-            temp_dic = dict()
-            for section_idx in self.all_sections:
-                temp_dic[section_idx] = 0
-            temp_dic[section] = size
-            self.modules[module_name] = temp_dic
+        if not object_name or not size or not section:
+            return
+
+        if object_name in self.modules:
+            self.modules[object_name].setdefault(section, 0)
+            self.modules[object_name][section] += size
+            return
+
+        obj_split = os.sep + os.path.basename(object_name)
+        for module_path, contents in self.modules.items():
+            if module_path.endswith(obj_split) or module_path == object_name:
+                contents.setdefault(section, 0)
+                contents[section] += size
+                return
+
+        new_module = {section: size}
+        self.modules[object_name] = new_module
+
+    def module_replace(self, old_object, new_object):
+        """ Replaces an object name with a new one
+        """
+        if old_object in self.modules:
+            self.modules[new_object] = self.modules[old_object]
+            del self.modules[old_object]
 
     def check_new_section_gcc(self, line):
         """ Check whether a new section in a map file has been detected (only
@@ -98,44 +128,39 @@
         else:
             return False         # everything else, means no change in section
 
-    
-    def path_object_to_module_name(self, txt):
-        """ Parse a path to object file to extract it's module and object data
+
+    def parse_object_name_gcc(self, line):
+        """ Parse a path to object file
 
         Positional arguments:
         txt - the path to parse the object and module name from
         """
 
-        txt = txt.replace('\\', '/')
-        rex_mbed_os_name = r'^.+mbed-os\/(.+)\/(.+\.o)$'
-        test_rex_mbed_os_name = re.match(rex_mbed_os_name, txt)
+        line = line.replace('\\', '/')
+        test_re_mbed_os_name = re.match(RE_OBJECT_FILE_GCC, line)
 
-        if test_rex_mbed_os_name:
+        if test_re_mbed_os_name:
 
-            object_name = test_rex_mbed_os_name.group(2)
-            data = test_rex_mbed_os_name.group(1).split('/')
-            ndata = len(data)
+            object_name = test_re_mbed_os_name.group(1)
 
-            if ndata == 1:
-                module_name = data[0]
-            else:
-                module_name = data[0] + '/' + data[1]
+            # corner case: certain objects are provided by the GCC toolchain
+            if 'arm-none-eabi' in line:
+                return '[lib]/misc/' + object_name
+            return object_name
 
-            if self.detailed_misc:
-                return [module_name + '/' + object_name, object_name]
+        else:
+
+            test_re_obj_name = re.match(RE_LIBRARY_OBJECT_GCC, line)
+
+            if test_re_obj_name:
+                object_name = test_re_obj_name.group(1) + '/' + \
+                              test_re_obj_name.group(2)
+
+                return '[lib]/' + object_name
+
             else:
-                return [module_name, object_name]
-            
-        elif self.detailed_misc:           
-            rex_obj_name = r'^.+\/(.+\.o\)*)$'
-            test_rex_obj_name = re.match(rex_obj_name, txt)
-            if test_rex_obj_name:
-                object_name = test_rex_obj_name.group(1)
-                return ['Misc/' + object_name, ""]        
-                
-            return ['Misc', ""]
-        else: 
-            return ['Misc', ""]
+                print "Unknown object name found in GCC map file: %s" % line
+                return '[misc]'
 
     def parse_section_gcc(self, line):
         """ Parse data from a section of gcc map file
@@ -147,36 +172,21 @@
         Positional arguments:
         line - the line to parse a section from
         """
-        rex_address_len_name = re.compile(
-            r'^\s+.*0x(\w{8,16})\s+0x(\w+)\s(.+)$')
 
-        test_address_len_name = re.match(rex_address_len_name, line)
-
-        if test_address_len_name:
-
-            if int(test_address_len_name.group(2), 16) == 0: # size == 0
-                return ["", 0] # no valid entry
-            else:
-                m_name, _ = self.path_object_to_module_name(
-                    test_address_len_name.group(3))
-                m_size = int(test_address_len_name.group(2), 16)
-                return [m_name, m_size]
+        is_fill = re.match(RE_FILL_SECTION_GCC, line)
+        if is_fill:
+            o_name = '[fill]'
+            o_size = int(is_fill.group(2), 16)
+            return [o_name, o_size]
 
-        else: # special corner case for *fill* sections
-            #  example
-            # *fill*         0x0000abe4        0x4
-            rex_address_len = r'^\s+\*fill\*\s+0x(\w{8,16})\s+0x(\w+).*$'
-            test_address_len = re.match(rex_address_len, line)
+        is_section = re.match(RE_STD_SECTION_GCC, line)
+        if is_section:
+            o_size = int(is_section.group(2), 16)
+            if o_size:
+                o_name = self.parse_object_name_gcc(is_section.group(3))
+                return [o_name, o_size]
 
-            if test_address_len:
-                if int(test_address_len.group(2), 16) == 0: # size == 0
-                    return ["", 0] # no valid entry
-                else:
-                    m_name = 'Fill'
-                    m_size = int(test_address_len.group(2), 16)
-                    return [m_name, m_size]
-            else:
-                return ["", 0] # no valid entry
+        return ["", 0]
 
     def parse_map_file_gcc(self, file_desc):
         """ Main logic to decode gcc map files
@@ -188,35 +198,56 @@
         current_section = 'unknown'
 
         with file_desc as infile:
-
-            # Search area to parse
             for line in infile:
                 if line.startswith('Linker script and memory map'):
                     current_section = "unknown"
                     break
 
-            # Start decoding the map file
             for line in infile:
-
-                change_section = self.check_new_section_gcc(line)
+                next_section = self.check_new_section_gcc(line)
 
-                if change_section == "OUTPUT": # finish parsing file: exit
+                if next_section == "OUTPUT":
                     break
-                elif change_section != False:
-                    current_section = change_section
+                elif next_section:
+                    current_section = next_section
+
+                object_name, object_size = self.parse_section_gcc(line)
+
+                self.module_add(object_name, object_size, current_section)
 
-                [module_name, module_size] = self.parse_section_gcc(line)
+        common_prefix = os.path.dirname(os.path.commonprefix([
+            o for o in self.modules.keys() if (o.endswith(".o") and not o.startswith("[lib]"))]))
+        new_modules = {}
+        for name, stats in self.modules.items():
+            if name.startswith("[lib]"):
+                new_modules[name] = stats
+            elif name.endswith(".o"):
+                new_modules[os.path.relpath(name, common_prefix)] = stats
+            else:
+                new_modules[name] = stats
+        self.modules = new_modules
+
+    def parse_object_name_armcc(self, line):
+        """ Parse object file
 
-                if module_size == 0 or module_name == "":
-                    pass
-                else:
-                    self.module_add(module_name, module_size, current_section)
+        Positional arguments:
+        line - the line containing the object or library
+        """
+
+        # simple object (not library)
+        if line[-2] == '.' and line[-1] == 'o':
+            return line
 
-                if DEBUG:
-                    print "Line: %s" % line,
-                    print "Module: %s\tSection: %s\tSize: %s" % \
-                        (module_name, current_section, module_size)
-                    raw_input("----------")
+        else:
+            is_obj = re.match(RE_OBJECT_ARMCC, line)
+            if is_obj:
+                object_name = os.path.basename(is_obj.group(1)) + '/' + is_obj.group(3)
+                return '[lib]/' + object_name
+            else:
+                print "Malformed input found when parsing ARMCC map: %s" % line
+                return '[misc]'
+
+
 
     def parse_section_armcc(self, line):
         """ Parse data from an armcc map file
@@ -230,34 +261,48 @@
         line - the line to parse the section data from
         """
 
-        test_rex_armcc = re.match(RE_ARMCC, line)
+        test_re_armcc = re.match(RE_ARMCC, line)
 
-        if test_rex_armcc:
+        if test_re_armcc:
 
-            size = int(test_rex_armcc.group(2), 16)
+            size = int(test_re_armcc.group(2), 16)
 
-            if test_rex_armcc.group(4) == 'RO':
+            if test_re_armcc.group(4) == 'RO':
                 section = '.text'
             else:
-                if test_rex_armcc.group(3) == 'Data':
+                if test_re_armcc.group(3) == 'Data':
                     section = '.data'
-                elif test_rex_armcc.group(3) == 'Zero':
+                elif test_re_armcc.group(3) == 'Zero':
                     section = '.bss'
                 else:
-                    print "BUG armcc map parser"
-                    raw_input()
+                    print "Malformed input found when parsing armcc map: %s" %\
+                          line
 
-            # lookup object in dictionary and return module name
-            object_name = test_rex_armcc.group(6)
-            if object_name in self.object_to_module:
-                module_name = self.object_to_module[object_name]
-            else:
-                module_name = 'Misc'
+            # check name of object or library
+            object_name = self.parse_object_name_armcc(\
+                test_re_armcc.group(6))
 
-            return [module_name, size, section]
+            return [object_name, size, section]
 
         else:
-            return ["", 0, ""] # no valid entry
+            return ["", 0, ""]
+
+    def parse_object_name_iar(self, object_name):
+        """ Parse object file
+
+        Positional arguments:
+        line - the line containing the object or library
+        """
+
+        # simple object (not library)
+        if object_name.endswith(".o"):
+            try:
+                return self.cmd_modules[object_name]
+            except KeyError:
+                return object_name
+        else:
+            return '[misc]'
+
 
     def parse_section_iar(self, line):
         """ Parse data from an IAR map file
@@ -277,38 +322,33 @@
         line - the line to parse section data from
         """
 
-        test_rex_iar = re.match(RE_IAR, line)
+        test_re_iar = re.match(RE_IAR, line)
 
-        if test_rex_iar:
+        if test_re_iar:
 
-            size = int(test_rex_iar.group(4), 16)
+            size = int(test_re_iar.group(4), 16)
 
-            if test_rex_iar.group(2) == 'const' or \
-               test_rex_iar.group(2) == 'ro code':
+            if (test_re_iar.group(2) == 'const' or
+                test_re_iar.group(2) == 'ro code'):
                 section = '.text'
-            elif test_rex_iar.group(2) == 'zero' or \
-            test_rex_iar.group(2) == 'uninit':
-                if test_rex_iar.group(1)[0:4] == 'HEAP':
+            elif (test_re_iar.group(2) == 'zero' or
+                  test_re_iar.group(2) == 'uninit'):
+                if test_re_iar.group(1)[0:4] == 'HEAP':
                     section = '.heap'
-                elif test_rex_iar.group(1)[0:6] == 'CSTACK':
+                elif test_re_iar.group(1)[0:6] == 'CSTACK':
                     section = '.stack'
                 else:
                     section = '.bss' #  default section
 
-            elif test_rex_iar.group(2) == 'inited':
+            elif test_re_iar.group(2) == 'inited':
                 section = '.data'
             else:
-                print "BUG IAR map parser"
-                raw_input()
+                print "Malformed input found when parsing IAR map: %s" % line
 
             # lookup object in dictionary and return module name
-            object_name = test_rex_iar.group(5)
-            if object_name in self.object_to_module:
-                module_name = self.object_to_module[object_name]
-            else:
-                module_name = 'Misc'
+            object_name = self.parse_object_name_iar(test_re_iar.group(5))
 
-            return [module_name, size, section]
+            return [object_name, size, section]
 
         else:
             return ["", 0, ""] # no valid entry
@@ -329,13 +369,74 @@
 
             # Start decoding the map file
             for line in infile:
+                self.module_add(*self.parse_section_armcc(line))
 
-                [name, size, section] = self.parse_section_armcc(line)
+        common_prefix = os.path.dirname(os.path.commonprefix([
+            o for o in self.modules.keys() if (o.endswith(".o") and o != "anon$$obj.o" and not o.startswith("[lib]"))]))
+        new_modules = {}
+        for name, stats in self.modules.items():
+            if name == "anon$$obj.o" or name.startswith("[lib]"):
+                new_modules[name] = stats
+            elif name.endswith(".o"):
+                new_modules[os.path.relpath(name, common_prefix)] = stats
+            else:
+                new_modules[name] = stats
+        self.modules = new_modules
+
+
+
+    def check_new_library_iar(self, line):
+        """
+        Searches for libraries and returns name. Example:
+        m7M_tls.a: [43]
+
+        """
+
+
+        test_address_line = re.match(RE_LIBRARY_IAR, line)
+
+        if test_address_line:
+            return test_address_line.group(1)
+        else:
+            return ""
 
-                if size == 0 or name == "" or section == "":
-                    pass
-                else:
-                    self.module_add(name, size, section)
+    def check_new_object_lib_iar(self, line):
+        """
+        Searches for objects within a library section and returns name. Example:
+        rt7M_tl.a: [44]
+            ABImemclr4.o                 6
+            ABImemcpy_unaligned.o      118
+            ABImemset48.o               50
+            I64DivMod.o                238
+            I64DivZer.o                  2
+
+        """
+
+        test_address_line = re.match(RE_OBJECT_LIBRARY_IAR, line)
+
+        if test_address_line:
+            return test_address_line.group(1)
+        else:
+            return ""
+
+    def parse_iar_command_line(self, lines):
+        """Parse the files passed on the command line to the iar linker
+
+        Positional arguments:
+        lines -- an iterator over the lines within a file
+        """
+        for line in lines:
+            if line.startswith("*"):
+                break
+            is_cmdline_file = RE_CMDLINE_FILE_IAR.match(line)
+            if is_cmdline_file:
+                full_path = is_cmdline_file.group(1)
+                self.cmd_modules[os.path.basename(full_path)] = full_path
+
+        common_prefix = os.path.dirname(os.path.commonprefix(self.cmd_modules.values()))
+        self.cmd_modules = {s: os.path.relpath(f, common_prefix)
+                            for s, f in self.cmd_modules.items()}
+
 
     def parse_map_file_iar(self, file_desc):
         """ Main logic to decode IAR map files
@@ -345,61 +446,66 @@
         """
 
         with file_desc as infile:
+            self.parse_iar_command_line(infile)
 
-            # Search area to parse
             for line in infile:
                 if line.startswith('  Section  '):
                     break
 
-            # Start decoding the map file
+            for line in infile:
+                self.module_add(*self.parse_section_iar(line))
+
+                if line.startswith('*** MODULE SUMMARY'): # finish section
+                    break
+
+            current_library = ""
             for line in infile:
 
-                [name, size, section] = self.parse_section_iar(line)
+                library = self.check_new_library_iar(line)
 
-                if size == 0 or name == "" or section == "":
-                    pass
-                else:
-                    self.module_add(name, size, section)
+                if library:
+                    current_library = library
 
-    def search_objects(self, path):
-        """ Searches for object files and creates mapping: object --> module
+                object_name = self.check_new_object_lib_iar(line)
 
-        Positional arguments:
-        path - the path to an object file
-        """
+                if object_name and current_library:
+                    print("Replacing module", object_name, current_library)
+                    temp = '[lib]' + '/'+ current_library + '/'+ object_name
+                    self.module_replace(object_name, temp)
+
 
-        path = path.replace('\\', '/')
+    def reduce_depth(self, depth):
+        """
+        populates the short_modules attribute with a truncated module list
 
-        # check location of map file
-        rex = r'^(.+)' + r'\/(.+\.map)$'
-        test_rex = re.match(rex, path)
+        (1) depth = 1:
+        main.o
+        mbed-os
 
-        if test_rex:
-            search_path = test_rex.group(1) + '/mbed-os/'
-        else:
-            print "Warning: this doesn't look like an mbed project"
-            return
+        (2) depth = 2:
+        main.o
+        mbed-os/test.o
+        mbed-os/drivers
 
-        for root, _, obj_files in os.walk(search_path):
-            for obj_file in obj_files:
-                if obj_file.endswith(".o"):
-                    module_name, object_name = self.path_object_to_module_name(
-                        os.path.join(root, obj_file))
+        """
+        if depth == 0 or depth == None:
+            self.short_modules = deepcopy(self.modules)
+        else:
+            self.short_modules = dict()
+            for module_name, v in self.modules.items():
+                split_name = module_name.split('/')
+                if split_name[0] == '':
+                    split_name = split_name[1:]
+                new_name = "/".join(split_name[:depth])
+                self.short_modules.setdefault(new_name, {})
+                for section_idx, value in v.items():
+                    self.short_modules[new_name].setdefault(section_idx, 0)
+                    self.short_modules[new_name][section_idx] += self.modules[module_name][section_idx]
 
-                    if object_name in self.object_to_module:
-                        if DEBUG:
-                            print "WARNING: multiple usages of object file: %s"\
-                                % object_name
-                            print "    Current: %s" % \
-                                self.object_to_module[object_name]
-                            print "    New:     %s" % module_name
-                            print " "
-                    else:
-                        self.object_to_module.update({object_name:module_name})
 
     export_formats = ["json", "csv-ci", "table"]
 
-    def generate_output(self, export_format, file_output=None):
+    def generate_output(self, export_format, depth, file_output=None):
         """ Generates summary of memory map data
 
         Positional arguments:
@@ -407,10 +513,14 @@
 
         Keyword arguments:
         file_desc - descriptor (either stdout or file)
+        depth - directory depth on report
 
         Returns: generated string for the 'table' format, otherwise None
         """
 
+        self.reduce_depth(depth)
+        self.compute_report()
+
         try:
             if file_output:
                 file_desc = open(file_output, 'wb')
@@ -452,29 +562,14 @@
 
         csv_module_section = []
         csv_sizes = []
-        for i in sorted(self.modules):
+        for i in sorted(self.short_modules):
             for k in self.print_sections:
                 csv_module_section += [i+k]
-                csv_sizes += [self.modules[i][k]]
+                csv_sizes += [self.short_modules[i][k]]
 
         csv_module_section += ['static_ram']
         csv_sizes += [self.mem_summary['static_ram']]
 
-        csv_module_section += ['heap']
-        if self.mem_summary['heap'] == 0:
-            csv_sizes += ['unknown']
-        else:
-            csv_sizes += [self.mem_summary['heap']]
-
-        csv_module_section += ['stack']
-        if self.mem_summary['stack'] == 0:
-            csv_sizes += ['unknown']
-        else:
-            csv_sizes += [self.mem_summary['stack']]
-
-        csv_module_section += ['total_ram']
-        csv_sizes += [self.mem_summary['total_ram']]
-
         csv_module_section += ['total_flash']
         csv_sizes += [self.mem_summary['total_flash']]
 
@@ -486,9 +581,6 @@
     def generate_table(self, file_desc):
         """Generate a table from a memoy map
 
-        Positional arguments:
-        file_desc - the file to write out the final report to
-
         Returns: string of the generated table
         """
         # Create table
@@ -503,11 +595,11 @@
         for i in list(self.print_sections):
             table.align[i] = 'r'
 
-        for i in sorted(self.modules):
+        for i in sorted(self.short_modules):
             row = [i]
 
             for k in self.print_sections:
-                row.append(self.modules[i][k])
+                row.append(self.short_modules[i][k])
 
             table.add_row(row)
 
@@ -520,23 +612,9 @@
         output = table.get_string()
         output += '\n'
 
-        if self.mem_summary['heap'] == 0:
-            output += "Allocated Heap: unknown\n"
-        else:
-            output += "Allocated Heap: %s bytes\n" % \
-                        str(self.mem_summary['heap'])
-
-        if self.mem_summary['stack'] == 0:
-            output += "Allocated Stack: unknown\n"
-        else:
-            output += "Allocated Stack: %s bytes\n" % \
-                        str(self.mem_summary['stack'])
-
         output += "Total Static RAM memory (data + bss): %s bytes\n" % \
                         str(self.mem_summary['static_ram'])
-        output += "Total RAM memory (data + bss + heap + stack): %s bytes\n" % \
-                        str(self.mem_summary['total_ram'])
-        output += "Total Flash memory (text + data + misc): %s bytes\n" % \
+        output += "Total Flash memory (text + data): %s bytes\n" % \
                         str(self.mem_summary['total_flash'])
 
         return output
@@ -544,36 +622,27 @@
     toolchains = ["ARM", "ARM_STD", "ARM_MICRO", "GCC_ARM", "GCC_CR", "IAR"]
 
     def compute_report(self):
+        """ Generates summary of memory usage for main areas
+        """
         for k in self.sections:
             self.subtotal[k] = 0
 
-        for i in sorted(self.modules):
+        for i in self.short_modules:
             for k in self.sections:
-                self.subtotal[k] += self.modules[i][k]
-
-        # Calculate misc flash sections
-        self.misc_flash_mem = 0
-        for i in self.modules:
-            for k in self.misc_flash_sections:
-                if self.modules[i][k]:
-                    self.misc_flash_mem += self.modules[i][k]
+                self.short_modules[i].setdefault(k, 0)
+                self.subtotal[k] += self.short_modules[i][k]
 
         self.mem_summary = {
             'static_ram': (self.subtotal['.data'] + self.subtotal['.bss']),
-            'heap': (self.subtotal['.heap']),
-            'stack': (self.subtotal['.stack']),
-            'total_ram': (self.subtotal['.data'] + self.subtotal['.bss'] +
-                          self.subtotal['.heap']+self.subtotal['.stack']),
-            'total_flash': (self.subtotal['.text'] + self.subtotal['.data'] +
-                            self.misc_flash_mem),
+            'total_flash': (self.subtotal['.text'] + self.subtotal['.data']),
         }
 
         self.mem_report = []
-        for i in sorted(self.modules):
+        for i in sorted(self.short_modules):
             self.mem_report.append({
                 "module":i,
                 "size":{
-                    k:self.modules[i][k] for k in self.print_sections
+                    k: self.short_modules[i][k] for k in self.print_sections
                 }
             })
 
@@ -592,20 +661,15 @@
         result = True
         try:
             with open(mapfile, 'r') as file_input:
-                if toolchain == "ARM" or toolchain == "ARM_STD" or\
-                   toolchain == "ARM_MICRO":
-                    self.search_objects(os.path.abspath(mapfile))
+                if toolchain in ("ARM", "ARM_STD", "ARM_MICRO", "ARMC6"):
                     self.parse_map_file_armcc(file_input)
                 elif toolchain == "GCC_ARM" or toolchain == "GCC_CR":
                     self.parse_map_file_gcc(file_input)
                 elif toolchain == "IAR":
-                    self.search_objects(os.path.abspath(mapfile))
                     self.parse_map_file_iar(file_input)
                 else:
                     result = False
-            
-            self.compute_report()
-        
+
         except IOError as error:
             print "I/O error({0}): {1}".format(error.errno, error.strerror)
             result = False
@@ -614,7 +678,7 @@
 def main():
     """Entry Point"""
 
-    version = '0.3.12'
+    version = '0.4.0'
 
     # Parser handling
     parser = argparse.ArgumentParser(
@@ -632,6 +696,10 @@
         type=argparse_uppercase_type(MemapParser.toolchains, "toolchain"))
 
     parser.add_argument(
+        '-d', '--depth', dest='depth', type=int,
+        help='specify directory depth level to display report', required=False)
+
+    parser.add_argument(
         '-o', '--output', help='output file name', required=False)
 
     parser.add_argument(
@@ -642,31 +710,34 @@
         ", ".join(MemapParser.export_formats))
 
     parser.add_argument('-v', '--version', action='version', version=version)
-    
-    parser.add_argument('-d', '--detailed', action='store_true', help='Displays the elements in "Misc" in a detailed fashion', required=False)
 
     # Parse/run command
     if len(sys.argv) <= 1:
         parser.print_help()
         sys.exit(1)
 
-
     args = parser.parse_args()
 
     # Create memap object
-    memap = MemapParser(detailed_misc=args.detailed)
+    memap = MemapParser()
 
     # Parse and decode a map file
     if args.file and args.toolchain:
         if memap.parse(args.file, args.toolchain) is False:
             sys.exit(0)
 
+    if args.depth is None:
+        depth = 2  # default depth level
+    else:
+        depth = args.depth
+
     returned_string = None
     # Write output in file
     if args.output != None:
-        returned_string = memap.generate_output(args.export, args.output)
+        returned_string = memap.generate_output(args.export, \
+            depth, args.output)
     else: # Write output in screen
-        returned_string = memap.generate_output(args.export)
+        returned_string = memap.generate_output(args.export, depth)
 
     if args.export == 'table' and returned_string:
         print returned_string

--- a/profiles/debug.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/profiles/debug.json	Tue Oct 10 16:56:30 2017 -0500
@@ -15,6 +15,17 @@
                "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
                "-Wl,-n"]
     },
+    "ARMC6": {
+        "common": ["-c", "--target=arm-arm-none-eabi", "-mthumb", "-g", "-O0",
+                   "-Wno-armcc-pragma-push-pop", "-Wno-armcc-pragma-anon-unions",
+                   "-DMULADDC_CANNOT_USE_R7", "-fdata-sections",
+                   "-fno-exceptions", "-MMD"],
+        "asm": [],
+        "c": ["-D__ASSERT_MSG", "-std=gnu99"],
+        "cxx": ["-fno-rtti", "-std=gnu++98"],
+        "ld": ["--verbose", "--remove", "--legacyalign", "--no_strict_wchar_size",
+               "--no_strict_enum_size"]
+    },
     "ARM": {
         "common": ["-c", "--gnu", "-Otime", "--split_sections",
                    "--apcs=interwork", "--brief_diagnostics", "--restrict",
@@ -23,7 +34,7 @@
         "asm": [],
         "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
         "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": []
+        "ld": ["--show_full_path"]
     },
     "uARM": {
         "common": ["-c", "--gnu", "-Otime", "--split_sections",

--- a/profiles/develop.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/profiles/develop.json	Tue Oct 10 16:56:30 2017 -0500
@@ -14,6 +14,16 @@
                "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
                "-Wl,-n"]
     },
+    "ARMC6": {
+        "common": ["-c", "--target=arm-arm-none-eabi", "-mthumb", "-Os",
+                   "-Wno-armcc-pragma-push-pop", "-Wno-armcc-pragma-anon-unions",
+                   "-DMULADDC_CANNOT_USE_R7", "-fdata-sections",
+                   "-fno-exceptions", "-MMD"],
+        "asm": [],
+        "c": ["-D__ASSERT_MSG", "-std=gnu99"],
+        "cxx": ["-fno-rtti", "-std=gnu++98"],
+        "ld": ["--legacyalign", "--no_strict_wchar_size", "--no_strict_enum_size"]
+    },
     "ARM": {
         "common": ["-c", "--gnu", "-Otime", "--split_sections",
                    "--apcs=interwork", "--brief_diagnostics", "--restrict",
@@ -21,7 +31,7 @@
         "asm": [],
         "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
         "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": []
+        "ld": ["--show_full_path"]
     },
     "uARM": {
         "common": ["-c", "--gnu", "-Otime", "--split_sections",

--- a/profiles/release.json	Wed Jul 19 16:44:30 2017 -0500
+++ b/profiles/release.json	Tue Oct 10 16:56:30 2017 -0500
@@ -14,6 +14,16 @@
                "-Wl,--wrap,_calloc_r", "-Wl,--wrap,exit", "-Wl,--wrap,atexit",
                "-Wl,-n"]
     },
+    "ARMC6": {
+        "common": ["-c", "--target=arm-arm-none-eabi", "-mthumb", "-Oz",
+                   "-Wno-armcc-pragma-push-pop", "-Wno-armcc-pragma-anon-unions",
+                   "-DMULADDC_CANNOT_USE_R7", "-fdata-sections",
+                   "-fno-exceptions", "-MMD"],
+        "asm": [],
+        "c": ["-D__ASSERT_MSG", "-std=gnu99"],
+        "cxx": ["-fno-rtti", "-std=gnu++98"],
+        "ld": ["--legacyalign", "--no_strict_wchar_size", "--no_strict_enum_size"]
+    },
     "ARM": {
         "common": ["-c", "--gnu", "-Ospace", "--split_sections",
                    "--apcs=interwork", "--brief_diagnostics", "--restrict",
@@ -21,7 +31,7 @@
         "asm": [],
         "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
         "cxx": ["--cpp", "--no_rtti", "--no_vla"],
-        "ld": []
+        "ld": ["--show_full_path"]
     },
     "uARM": {
         "common": ["-c", "--gnu", "-Ospace", "--split_sections",

--- a/project.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/project.py	Tue Oct 10 16:56:30 2017 -0500
@@ -15,12 +15,14 @@
 from tools.export import EXPORTERS, mcu_ide_matrix, mcu_ide_list, export_project, get_exporter_toolchain
 from tools.tests import TESTS, TEST_MAP
 from tools.tests import test_known, test_name_known, Test
-from tools.targets import TARGET_NAMES
+from tools.targets import TARGET_NAMES, set_targets_json_location
 from tools.utils import argparse_filestring_type, argparse_profile_filestring_type, argparse_many, args_error
 from tools.utils import argparse_force_lowercase_type
 from tools.utils import argparse_force_uppercase_type
 from tools.utils import print_large_string
 from tools.options import extract_profile, list_profiles, extract_mcus
+from tools.build_profiles import find_targets_json, find_build_profile, get_toolchain_profile
+from tools.toolchains import mbedToolchain
 
 def setup_project(ide, target, program=None, source_dir=None, build=None, export_path=None):
     """Generate a name, if not provided, and find dependencies
@@ -89,6 +91,45 @@
 
     zip_name = name+".zip" if zip_proj else None
 
+    ###################################
+    # mbed Classic/2.0/libary support #
+
+    # Find build system profile
+    profile = None
+    targets_json = None
+    for path in src:
+        profile = find_build_profile(path) or profile
+        if profile:
+            targets_json = join(dirname(dirname(abspath(__file__))), 'legacy_targets.json')
+        else:
+            targets_json = find_targets_json(path) or targets_json
+
+    # Apply targets.json to active targets
+    if targets_json:
+        if not silent:
+            print("Using targets from %s" % targets_json)
+        set_targets_json_location(targets_json)
+
+    # Apply profile to toolchains
+    if profile:
+        def init_hook(self):
+            profile_data = get_toolchain_profile(self.name, profile)
+            if not profile_data:
+                return
+            if not silent:
+                self.info("Using toolchain %s profile %s" % (self.name, profile))
+
+            for k,v in profile_data.items():
+                if self.flags.has_key(k):
+                    self.flags[k] = v
+                else:
+                    setattr(self, k, v)
+
+        mbedToolchain.init = init_hook
+
+    # mbed Classic/2.0/libary support #
+    ###################################
+
     return export_project(src, project_dir, target, ide, name=name,
                           macros=macros, libraries_paths=lib, zip_proj=zip_name,
                           build_profile=build_profile, silent=silent,
@@ -107,7 +148,7 @@
 
     parser.add_argument("-m", "--mcu",
                         metavar="MCU",
-                        type=argparse_force_uppercase_type(targetnames, "MCU"),
+                        type=str.upper,
                         help="generate project for the given MCU ({})".format(
                             ', '.join(targetnames)))
 
@@ -235,19 +276,17 @@
         if exists(EXPORT_DIR):
             rmtree(EXPORT_DIR)
 
-    for mcu in options.mcu:
-        zip_proj = not bool(options.source_dir)
+    zip_proj = not bool(options.source_dir)
 
     if (options.program is None) and (not options.source_dir):
         args_error(parser, "one of -p, -n, or --source is required")
-        # Export to selected toolchain
     exporter, toolchain_name = get_exporter_toolchain(options.ide)
-    if options.mcu not in exporter.TARGETS:
-        args_error(parser, "%s not supported by %s"%(options.mcu,options.ide))
+    mcu = extract_mcus(parser, options)[0]
+    if not exporter.is_target_supported(mcu):
+        args_error(parser, "%s not supported by %s"%(mcu,options.ide))
     profile = extract_profile(parser, options, toolchain_name, fallback="debug")
     if options.clean:
         rmtree(BUILD_DIR)
-    mcu = extract_mcus(parser, options)[0]
     export(mcu, options.ide, build=options.build,
            src=options.source_dir, macros=options.macros,
            project_id=options.program, zip_proj=zip_proj,

--- a/settings.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/settings.py	Tue Oct 10 16:56:30 2017 -0500
@@ -30,6 +30,9 @@
 # ARM Compiler 5
 ARM_PATH = ""
 
+# ARM Compiler 6
+ARMC6_PATH = ""
+
 # GCC ARM
 GCC_ARM_PATH = ""
 
@@ -70,7 +73,8 @@
 ##############################################################################
 # User Settings (env vars)
 ##############################################################################
-_ENV_PATHS = ['ARM_PATH', 'GCC_ARM_PATH', 'GCC_CR_PATH', 'IAR_PATH']
+_ENV_PATHS = ['ARM_PATH', 'GCC_ARM_PATH', 'GCC_CR_PATH', 'IAR_PATH',
+              'ARMC6_PATH']
 
 for _n in _ENV_PATHS:
     if getenv('MBED_'+_n):

--- a/targets/NCS.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/targets/NCS.py	Tue Oct 10 16:56:30 2017 -0500
@@ -18,9 +18,12 @@
 from tools.config import Config
 
 FIB_BASE = 0x2000
+TRIM_BASE = 0x2800
 FLASH_BASE = 0x3000
+FLASHA_SIZE = 0x52000
+FLASHB_BASE = 0x00102000
+FLASHB_SIZE = 0x52000
 FW_REV = 0x01000100
-TRIM_BASE = 0x2800
 
 def ranges(i):
     for _, b in itertools.groupby(enumerate(i), lambda x_y: x_y[1] - x_y[0]):
@@ -29,17 +32,17 @@
 
 
 def add_fib_at_start(arginput):
-    input_file = arginput + ".bin"
-    file_name_hex = arginput + "_fib.hex"
+    input_file = arginput + ".hex"
+    file_name_hex = arginput + ".hex"
     file_name_bin = arginput + ".bin"
 
     # Read in hex file
     input_hex_file = intelhex.IntelHex()
-    input_hex_file.padding = 0x00
-    input_hex_file.loadbin(input_file, offset=FLASH_BASE)
-
+    input_hex_file.loadhex(input_file)
+    #set padding value to be returned when reading from unspecified address
+    input_hex_file.padding = 0xFF
+    # Create new hex file
     output_hex_file = intelhex.IntelHex()
-    output_hex_file.padding = 0x00
 
     # Get the starting and ending address
     addresses = input_hex_file.addresses()
@@ -48,17 +51,41 @@
     regions = len(start_end_pairs)
 
     if regions == 1:
+        #single range indicating fits within first flash block (<320K)
         start, end = start_end_pairs[0]
+        print("Memory start 0x%08X, end 0x%08X" % (start, end))
+        # Compute checksum over the range (don't include data at location of crc)
+        size = end - start + 1
+        data = input_hex_file.tobinarray(start=start, size=size)
+        crc32 = binascii.crc32(data) & 0xFFFFFFFF
     else:
-        start = min(min(start_end_pairs))
-        end = max(max(start_end_pairs))
+        #multiple ranges indicating requires both flash blocks (>320K)
+        start, end = start_end_pairs[0]
+        start2, end2 = start_end_pairs[1]
+        print("Region 1: memory start 0x%08X, end 0x%08X" % (start, end))
+        print("Region 2: memory start 0x%08X, end 0x%08X" % (start2, end2))
+        # Compute checksum over the range (don't include data at location of crc)
+        # replace end with end of flash block A
+        end = FLASHA_SIZE - 1
+        size = end - start + 1
+        data = input_hex_file.tobinarray(start=start, size=size)
+
+        # replace start2 with base of flash block B
+        start2 = FLASHB_BASE
+        size2 = end2 - start2 + 1
+        data2 = input_hex_file.tobinarray(start=start2, size=size2)
+
+        #concatenate data and data2 arrays together
+        data.extend(data2)
+        crc32 = binascii.crc32(data) & 0xFFFFFFFF
+
+        #replace size with sum of two memory region sizes
+        size = size + size2
 
     assert start >= FLASH_BASE, ("Error - start 0x%x less than begining of user\
     flash area" %start)
-    # Compute checksum over the range (don't include data at location of crc)
-    size = end - start + 1
-    data = input_hex_file.tobinarray(start=start, size=size)
-    crc32 = binascii.crc32(data) & 0xFFFFFFFF
+
+    assert regions <= 2, ("Error - more than 2 memory regions found")
 
     fw_rev = FW_REV
 
@@ -177,7 +204,7 @@
     output_hex_file[trim_area_start + 1] = (mac_addr_low >> 8)  & 0xFF
     output_hex_file[trim_area_start + 2] = (mac_addr_low >> 16) & 0xFF
     output_hex_file[trim_area_start + 3] = (mac_addr_low >> 24) & 0xFF
-    
+
     output_hex_file[trim_area_start + 4] = mac_addr_high & 0xFF
     output_hex_file[trim_area_start + 5] = (mac_addr_high >> 8)  & 0xFF
     output_hex_file[trim_area_start + 6] = (mac_addr_high >> 16) & 0xFF
@@ -202,7 +229,7 @@
     output_hex_file[trim_area_start + 21] = (txtune >> 8)  & 0xFF
     output_hex_file[trim_area_start + 22] = (txtune >> 16) & 0xFF
     output_hex_file[trim_area_start + 23] = (txtune >> 24) & 0xFF
-    
+
     # pad the rest of the area with 0xFF
     for i in range(trim_area_start + trim_size, user_code_start):
         output_hex_file[i] = 0xFF
@@ -212,4 +239,3 @@
 
     # Write out file(s)
     output_hex_file.tofile(file_name_hex, 'hex')
-    output_hex_file.tofile(file_name_bin, 'bin')

--- a/targets/REALTEK_RTL8195AM.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/targets/REALTEK_RTL8195AM.py	Tue Oct 10 16:56:30 2017 -0500
@@ -1,141 +1,276 @@
 """
-mbed REALTEK_RTL8195AM elf2bin script
-Copyright (c) 2011-2016 Realtek Semiconductor Corp.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
+Realtek Semiconductor Corp.
 
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-LIBRARIES BUILD
+RTL8195A elf2bin script
 """
 
 import sys, array, struct, os, re, subprocess
 import hashlib
+import shutil
 
 from tools.paths import TOOLS_BOOTLOADERS
 from datetime import datetime
 
 # Constant Variables
-RAM2_RSVD = 0x3131373835393138
+RAM2_RSVD = 0x00000000
+RAM2_VER = 0x8195FFFF00000000
+RAM2_TAG = 0x81950001
+RAM2_SHA = '0'
 
 def write_fixed_width_string(value, width, output):
-    # cut string to list & reverse
-    line = [value[i:i+2] for i in range(0, len(value), 2)]
-    output.write("".join([chr(long(b, 16)) for b in line]))
+        # cut string to list & reverse
+        line = [value[i:i+2] for i in range(0, len(value), 2)]
+        output.write("".join([chr(long(b, 16)) for b in line]))
 
 def write_fixed_width_value(value, width, output):
-    # convert to string
-    line = format(value, '0%dx' % (width))
-    if len(line) > width:
-        print "[ERROR] value 0x%s cannot fit width %d" % (line, width)
-        sys.exit(-1)
-    # cut string to list & reverse
-    line = [line[i:i+2] for i in range(0, len(line), 2)]
-    line.reverse()
-    # convert to write buffer
-    output.write("".join([chr(long(b, 16)) for b in line]))
+        # convert to string
+        line = format(value, '0%dx' % (width))
+        if len(line) > width:
+            print "[ERROR] value 0x%s cannot fit width %d" % (line, width)
+            sys.exit(-1)
+        # cut string to list & reverse
+        line = [line[i:i+2] for i in range(0, len(line), 2)]
+        line.reverse()
+        # convert to write buffer
+        output.write("".join([chr(long(b, 16)) for b in line]))
 
 def append_image_file(image, output):
     input = open(image, "rb")
     output.write(input.read())
     input.close()
 
-def prepend(image, image_prepend, toolchain, info):
-    output = open(image_prepend, "wb")  
-    write_fixed_width_value(info['size'], 8, output)
-    write_fixed_width_value(info['addr'], 8, output)
-    write_fixed_width_value(RAM2_RSVD, 16, output)
-    with open(image, "rb") as input:
-        if toolchain == "IAR":
-            input.seek(info['addr'])
-        output.write(input.read(info['size']))
+def write_padding_bytes(output_name, size):
+    current_size = os.stat(output_name).st_size
+    padcount = size - current_size
+    if padcount < 0:
+        print "[ERROR] image is larger than expected size"
+        sys.exit(-1)
+    output = open(output_name, "ab")
+    output.write('\377' * padcount)
     output.close()
 
-def parse_section(toolchain, elf, section):
-    info = {'addr':None, 'size':0};
-    if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]:
-        print "[ERROR] unsupported toolchain " + toolchain
-        sys.exit(-1)
-    
-    mapfile = elf.rsplit(".", 1)[0] + ".map"
-    
-    with open(mapfile, 'r') as infile:
-        # Search area to parse
-        for line in infile:
-            if toolchain == "GCC_ARM":
-                # .image2.table   0x[00000000]30000000       0x18
-                #                 0x[00000000]30000000       __image2_start__ = .
-                #                 0x[00000000]30000000       __image2_entry_func__ = .
-                match = re.match(r'^' + section + \
-                        r'\s+0x0{,8}(?P<addr>[0-9A-Fa-f]{8})\s+0x(?P<size>[0-9A-Fa-f]+).*$', line)
-            elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]:
-                # Memory Map of the image
-                #   Load Region LR_DRAM (Base: 0x30000000, Size: 0x00006a74, Max: 0x00200000, ABSOLUTE)
-                #     Execution Region IMAGE2_TABLE (Base: 0x30000000, Size: 0x00000018, Max: 0xffffffff, ABSOLUTE, FIXED)
-                #     Base Addr    Size         Type   Attr      Idx    E Section Name        Object
-                #     0x30000000   0x00000004   Data   RO         5257    .image2.ram.data    rtl8195a_init.o
-                match = re.match(r'^.*Region\s+' + section + \
-                        r'\s+\(Base: 0x(?P<addr>[0-9A-Fa-f]{8}),\s+Size: 0x(?P<size>[0-9A-Fa-f]+), .*\)$', line)
-            elif toolchain == "IAR":
-                #   Section                 Kind        Address     Size  Object
-                #   -------                 ----        -------     ----  ------
-                # "A3":                                           0x8470
-                #   IMAGE2                           0x10006000   0x5d18  <Block>
-                #     .ram_image2.text               0x10006000   0x5bbc  <Block>
-                #       .rodata             const    0x10006000     0x14  retarget.o [17]
-                match = re.match(r'^\s+' + section + \
-                        r'\s+0x(?P<addr>[0-9A-Fa-f]{8})\s+0x(?P<size>[0-9A-Fa-f]+)\s+.*<Block>$', line)
-            if match:
-                info['addr'] = int(match.group("addr"), 16)
-                try:
-                    info['size'] = int(match.group("size"), 16)
-                except IndexError:
-                    print "[WARNING] cannot find the size of section " + section
-                return info
+def sha256_checksum(filename, block_size=65536):
+    sha256 = hashlib.sha256()
+    with open(filename, 'rb') as f:
+        for block in iter(lambda: f.read(block_size), b''):
+            sha256.update(block)
+    return sha256.hexdigest()
 
-    print "[ERROR] cannot find the address of section " + section    
-    return info
+def get_version_by_time():
+    secs = int((datetime.now()-datetime(2016,11,1)).total_seconds())
+    return RAM2_VER + secs
 
 # ----------------------------
 #       main function
 # ----------------------------
-def rtl8195a_elf2bin(toolchain, image_elf, image_bin):
+def prepend(image, entry, segment, image_ram2, image_ota):
+
+    # parse input arguments
+    output = open(image_ram2, "wb")
+
+    write_fixed_width_value(os.stat(image).st_size, 8, output)
+    write_fixed_width_value(int(entry), 8, output)
+    write_fixed_width_value(int(segment), 8, output)
+
+    RAM2_SHA = sha256_checksum(image)
+    write_fixed_width_value(RAM2_TAG, 8, output)
+    write_fixed_width_value(get_version_by_time(), 16, output)
+    write_fixed_width_string(RAM2_SHA, 64, output)
+    write_fixed_width_value(RAM2_RSVD, 8, output)
+
+    append_image_file(image, output)
+    output.close()
+
+    ota = open(image_ota, "wb")
+    write_fixed_width_value(os.stat(image).st_size, 8, ota)
+    write_fixed_width_value(int(entry), 8, ota)
+    write_fixed_width_value(int(segment), 8, ota)
+    write_fixed_width_value(0xFFFFFFFF, 8, ota)
+    write_fixed_width_value(get_version_by_time(), 16, ota)
+    write_fixed_width_string(RAM2_SHA, 64, ota)
+    write_fixed_width_value(RAM2_RSVD, 8, ota)
+
+    append_image_file(image, ota)
+    ota.close()
+
+def find_symbol(toolchain, mapfile, symbol):
+    ret = None
+
+    HEX = '0x0{,8}(?P<addr>[0-9A-Fa-f]{8})'
     if toolchain == "GCC_ARM":
-        img2_sections = [".image2.table", ".text", ".data"]
+        SYM = re.compile(r'^\s+' + HEX + r'\s+' + symbol + '\r?$')
     elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]:
-        img2_sections = [".image2.table", ".text", ".data"]
+        SYM = re.compile(r'^\s+' + HEX + r'\s+0x[0-9A-Fa-f]{8}\s+Code.*\s+i\.' + symbol + r'\s+.*$')
     elif toolchain == "IAR":
-        # actually it's block
-        img2_sections = ["IMAGE2"]
+        SYM = re.compile(r'^' + symbol + r'\s+' + HEX + '\s+.*$')
+
+    with open(mapfile, 'r') as infile:
+        for line in infile:
+            match = re.match(SYM, line)
+            if match:
+                ret = match.group("addr")
+
+    if not ret:
+        print "[ERROR] cannot find the address of symbol " + symbol
+        return 0
+
+    return int(ret,16) | 1
+
+def parse_load_segment_gcc(image_elf):
+    # Program Headers:
+    #   Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+    #   LOAD           0x000034 0x10006000 0x10006000 0x026bc 0x026bc RW  0x8
+    #   LOAD           0x0026f0 0x30000000 0x30000000 0x06338 0x06338 RWE 0x4
+    segment_list = []
+    cmd = 'arm-none-eabi-readelf -l ' + image_elf
+    for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"):
+        if not line.startswith("  LOAD"):
+            continue
+        segment = line.split()
+        if len(segment) != 8:
+            continue
+        offset = int(segment[1][2:], 16)
+        addr   = int(segment[2][2:], 16)
+        size   = int(segment[4][2:], 16)
+        if addr != 0 and size != 0:
+            segment_list.append((offset, addr, size))
+    return segment_list
+
+def parse_load_segment_armcc(image_elf):
+    # ====================================
+    #
+    # ** Program header #2
+    #
+    #     Type          : PT_LOAD (1)
+    #     File Offset   : 52 (0x34)
+    #     Virtual Addr  : 0x30000000
+    #     Physical Addr : 0x30000000
+    #     Size in file  : 27260 bytes (0x6a7c)
+    #     Size in memory: 42168 bytes (0xa4b8)
+    #     Flags         : PF_X + PF_W + PF_R + PF_ARM_ENTRY (0x80000007)
+    #     Alignment     : 8
+    #
+    (offset, addr, size) = (0, 0, 0)
+    segment_list = []
+    in_segment = False
+    cmd = 'fromelf --text -v --only=none ' + image_elf
+    for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"):
+        if line == "":
+            pass
+        elif line.startswith("** Program header"):
+            in_segment = True
+        elif in_segment == False:
+            pass
+        elif line.startswith("============"):
+            if addr != 0 and size != 0:
+                segment_list.append((offset, addr, size))
+            in_segment = False
+            (offset, addr, size) = (0, 0, 0)
+        elif line.startswith("    Type"):
+            if not re.match(r'\s+Type\s+:\s+PT_LOAD\s.*$', line):
+                in_segment = False
+        elif line.startswith("    File Offset"):
+            match = re.match(r'^\s+File Offset\s+:\s+(?P<offset>\d+).*$', line)
+            if match:
+                offset = int(match.group("offset"))
+        elif line.startswith("    Virtual Addr"):
+            match = re.match(r'^\s+Virtual Addr\s+:\s+0x(?P<addr>[0-9a-f]+).*$', line)
+            if match:
+                addr = int(match.group("addr"), 16)
+        elif line.startswith("    Size in file"):
+            match = re.match(r'^\s+Size in file\s+:.*\(0x(?P<size>[0-9a-f]+)\).*$', line)
+            if match:
+                size = int(match.group("size"), 16)
+    return segment_list
+
+
+def parse_load_segment_iar(image_elf):
+    #   SEGMENTS:
+    #
+    #      Type Offset    Virtual   Physical File Sz Mem Sz Flags   Align
+    #      ---- ------    -------   -------- ------- ------ -----   -----
+    #   0: load   0x34 0x10006000 0x10006000  0x26bc 0x26bc 0x6  WR   0x8
+    #   1: load 0x26f0 0x30000000 0x30000000  0x6338 0x6338 0x7 XWR   0x4
+    #
+    #   SECTIONS:
+    #
+    #       Name            Type     Addr         Offset    Size Aln Lnk Inf  ESz Flags
+    #       ----            ----     ----         ------    ---- --- --- ---  --- -----
+    #    1: .shstrtab       strtab               0xfc4d8    0x60 0x4
+    #    2: .strtab         strtab               0xfc538  0xbb3f 0x4
+
+    segment_list = []
+    in_segment = False
+    cmd = 'ielfdumparm ' + image_elf
+    for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"):
+        if line.startswith("  SEGMENTS:"):
+            in_segment = True
+        elif in_segment == False:
+            pass
+        elif line.startswith("  SECTIONS:"):
+            break
+        elif re.match(r'^\s+\w+:\s+load\s+.*$', line):
+            segment = line.split()
+            offset = int(segment[2][2:], 16)
+            addr   = int(segment[3][2:], 16)
+            size   = int(segment[5][2:], 16)
+            if addr < 0x10007000:
+                continue
+            if addr != 0 and size != 0:
+                segment_list.append((offset, addr, size))
+    return segment_list
+
+def parse_load_segment(toolchain, image_elf):
+    if toolchain == "GCC_ARM":
+        return parse_load_segment_gcc(image_elf)
+    elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]:
+        return parse_load_segment_armcc(image_elf)
+    elif toolchain == "IAR":
+        return parse_load_segment_iar(image_elf)
     else:
-        print("[error] unsupported toolchain") + toolchain
-        return
-    ram2_info = {'addr':None, 'size':0}
+        return []
+
+def write_load_segment(image_elf, image_bin, segment):
+    file_elf = open(image_elf, "rb")
+    file_bin = open(image_bin, "wb")
+    for (offset, addr, size) in segment:
+        file_elf.seek(offset)
+        # write image header - size & addr
+        write_fixed_width_value(addr, 8, file_bin)
+        write_fixed_width_value(size, 8, file_bin)
+        # write load segment
+        file_bin.write(file_elf.read(size))
+        delta = size % 4
+        if delta != 0:
+            padding = 4 - delta
+            write_fixed_width_value(0x0, padding * 2, file_bin)
+    file_bin.close()
+    file_elf.close()
+
+# ----------------------------
+#       main function
+# ----------------------------
+def rtl8195a_elf2bin(t_self, image_elf, image_bin):
+    # remove target binary file/path
+    if os.path.isfile(image_bin):
+        os.remove(image_bin)
+    else:
+        shutil.rmtree(image_bin)
+
+    segment = parse_load_segment(t_self.name, image_elf)
+    write_load_segment(image_elf, image_bin, segment)
+
     image_name = os.path.splitext(image_elf)[0]
+    image_map = image_name + '.map'
 
-    ram1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin")
-    ram2_prepend_bin = image_name + '-ram_2_prepend.bin'
-    
-    old_bin = image_name + '.bin'
-    for section in img2_sections:
-        section_info = parse_section(toolchain, image_elf, section)
-        if ram2_info['addr'] is None or ram2_info['addr'] > section_info['addr']:
-            ram2_info['addr'] = section_info['addr']
-        ram2_info['size'] = ram2_info['size'] + section_info['size']
+    ram2_ent = find_symbol(t_self.name, image_map, "PLAT_Start")
+    ram1_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1.bin")
+    ram2_bin = image_name + '-ram_2.bin'
+    ota_bin = image_name + '-ota.bin'
+    prepend(image_bin, ram2_ent, len(segment), ram2_bin, ota_bin)
 
-    prepend(old_bin, ram2_prepend_bin, toolchain, ram2_info)
     # write output file
     output = open(image_bin, "wb")
-    append_image_file(ram1_prepend_bin, output)
-    append_image_file(ram2_prepend_bin, output)
+    append_image_file(ram1_bin, output)
+    append_image_file(ram2_bin, output)
     output.close()
-    # post built done
-

--- a/targets/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/targets/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -22,6 +22,7 @@
 import inspect
 import sys
 from copy import copy
+from inspect import getmro
 from collections import namedtuple, Mapping
 from tools.targets.LPC import patch
 from tools.paths import TOOLS_BOOTLOADERS
@@ -32,16 +33,20 @@
            "CUMULATIVE_ATTRIBUTES", "get_resolution_order"]
 
 CORE_LABELS = {
-    "Cortex-M0" : ["M0", "CORTEX_M", "LIKE_CORTEX_M0"],
-    "Cortex-M0+": ["M0P", "CORTEX_M", "LIKE_CORTEX_M0"],
-    "Cortex-M1" : ["M1", "CORTEX_M", "LIKE_CORTEX_M1"],
-    "Cortex-M3" : ["M3", "CORTEX_M", "LIKE_CORTEX_M3"],
-    "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
-    "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"],
-    "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-M7FD" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"],
-    "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9"]
+   "Cortex-M0" : ["M0", "CORTEX_M", "LIKE_CORTEX_M0", "CORTEX"],
+   "Cortex-M0+": ["M0P", "CORTEX_M", "LIKE_CORTEX_M0", "CORTEX"],
+   "Cortex-M1" : ["M1", "CORTEX_M", "LIKE_CORTEX_M1", "CORTEX"],
+   "Cortex-M3" : ["M3", "CORTEX_M", "LIKE_CORTEX_M3", "CORTEX"],
+   "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4", "CORTEX"],
+   "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4", "CORTEX"],
+   "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7", "CORTEX"],
+   "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7", "CORTEX"],
+   "Cortex-M7FD" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7", "CORTEX"],
+   "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9", "CORTEX"],
+    "Cortex-M23": ["M23", "CORTEX_M", "LIKE_CORTEX_M23", "CORTEX"],
+    "Cortex-M23-NS": ["M23", "CORTEX_M", "LIKE_CORTEX_M23", "CORTEX"],
+    "Cortex-M33": ["M33", "CORTEX_M", "LIKE_CORTEX_M33", "CORTEX"],
+    "Cortex-M33-NS": ["M33", "CORTEX_M", "LIKE_CORTEX_M33", "CORTEX"]
 }
 
 ################################################################################
@@ -306,10 +311,14 @@
             labels.append("UVISOR_UNSUPPORTED")
         return labels
 
-    def init_hooks(self, hook, toolchain_name):
+    def init_hooks(self, hook, toolchain):
         """Initialize the post-build hooks for a toolchain. For now, this
         function only allows "post binary" hooks (hooks that are executed
         after the binary image is extracted from the executable file)
+
+        Positional Arguments:
+        hook - the hook object to add post-binary-hooks to
+        toolchain - the toolchain object for inspection
         """
 
         # If there's no hook, simply return
@@ -325,7 +334,7 @@
                 ("Invalid format for hook '%s' in target '%s'"
                  % (hook_data["function"], self.name)) +
                 " (must be 'class_name.function_name')")
-        class_name, function_name = temp[0], temp[1]
+        class_name, function_name = temp
         # "class_name" must refer to a class in this file, so check if the
         # class exists
         mdata = self.get_module_data()
@@ -345,10 +354,11 @@
                 ("required by '%s' " % hook_data["function"]) +
                 ("in target '%s' " % self.name) +
                 ("not found in class '%s'" %  class_name))
-        # Check if the hook specification also has target restrictions
-        toolchain_restrictions = hook_data.get("toolchains", [])
+        # Check if the hook specification also has toolchain restrictions
+        toolchain_restrictions = set(hook_data.get("toolchains", []))
+        toolchain_labels = set(c.__name__ for c in getmro(toolchain.__class__))
         if toolchain_restrictions and \
-           (toolchain_name not in toolchain_restrictions):
+           not toolchain_labels.intersection(toolchain_restrictions):
             return
         # Finally, hook the requested function
         hook.hook_add_binary("post", getattr(cls, function_name))
@@ -523,7 +533,7 @@
     @staticmethod
     def binary_hook(t_self, resources, elf, binf):
         from tools.targets.REALTEK_RTL8195AM import rtl8195a_elf2bin
-        rtl8195a_elf2bin(t_self.name, elf, binf)
+        rtl8195a_elf2bin(t_self, elf, binf)
 ################################################################################
 
 # Instantiate all public targets

--- a/test.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/test.py	Tue Oct 10 16:56:30 2017 -0500
@@ -44,12 +44,12 @@
     try:
         # Parse Options
         parser = get_default_options_parser(add_app_config=True)
-        
+
         parser.add_argument("-D",
                           action="append",
                           dest="macros",
                           help="Add a macro definition")
-       
+
         parser.add_argument("-j", "--jobs",
                           type=int,
                           dest="jobs",
@@ -76,30 +76,36 @@
         parser.add_argument("-f", "--format", dest="format",
                             type=argparse_lowercase_type(format_choices, "format"),
                             default=format_default_choice, help=format_help)
-        
+
         parser.add_argument("--continue-on-build-fail", action="store_true", dest="continue_on_build_fail",
                           default=None, help="Continue trying to build all tests if a build failure occurs")
 
         #TODO validate the names instead of just passing through str
         parser.add_argument("-n", "--names", dest="names", type=argparse_many(str),
                           default=None, help="Limit the tests to a comma separated list of names")
-                          
+
         parser.add_argument("--test-spec", dest="test_spec",
                           default=None, help="Destination path for a test spec file that can be used by the Greentea automated test tool")
-        
+
         parser.add_argument("--build-report-junit", dest="build_report_junit",
                           default=None, help="Destination path for a build report in the JUnit xml format")
         parser.add_argument("--build-data",
                             dest="build_data",
                             default=None,
                             help="Dump build_data to this file")
-        
+
         parser.add_argument("-v", "--verbose",
                           action="store_true",
                           dest="verbose",
                           default=False,
                           help="Verbose diagnostic output")
 
+        parser.add_argument("--stats-depth",
+                            type=int,
+                            dest="stats_depth",
+                            default=2,
+                            help="Depth level for static memory report")
+
         options = parser.parse_args()
 
         # Filter tests by path if specified
@@ -129,7 +135,7 @@
 
         # Find all tests in the relevant paths
         for path in all_paths:
-            all_tests.update(find_tests(path, mcu, toolchain, 
+            all_tests.update(find_tests(path, mcu, toolchain,
                                         app_config=options.app_config))
 
         # Filter tests by name if specified
@@ -172,7 +178,7 @@
             # Default base source path is the current directory
             if not base_source_paths:
                 base_source_paths = ['.']
-            
+
             build_report = {}
             build_properties = {}
 
@@ -214,8 +220,9 @@
                         notify=notify,
                         jobs=options.jobs,
                         continue_on_build_fail=options.continue_on_build_fail,
-                                                             app_config=options.app_config,
-                                                             build_profile=profile)
+                        app_config=options.app_config,
+                        build_profile=profile,
+                        stats_depth=options.stats_depth)
 
                 # If a path to a test spec is provided, write it to a file
                 if options.test_spec:

--- a/test_api.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/test_api.py	Tue Oct 10 16:56:30 2017 -0500
@@ -365,6 +365,7 @@
             clean_mbed_libs_options = True if self.opts_goanna_for_mbed_sdk or clean or self.opts_clean else None
 
             profile = extract_profile(self.opts_parser, self.opts, toolchain)
+            stats_depth = self.opts.stats_depth or 2
 
 
             try:
@@ -481,22 +482,13 @@
 
                 project_name = self.opts_firmware_global_name if self.opts_firmware_global_name else None
                 try:
-                    path = build_project(test.source_dir,
-                                     join(build_dir, test_id),
-                                     T,
-                                     toolchain,
-                                     test.dependencies,
-                                     clean=clean_project_options,
-                                     verbose=self.opts_verbose,
-                                     name=project_name,
-                                     macros=MACROS,
-                                     inc_dirs=INC_DIRS,
-                                     jobs=self.opts_jobs,
-                                     report=build_report,
-                                     properties=build_properties,
-                                     project_id=test_id,
-                                     project_description=test.get_description(),
-                                     build_profile=profile)
+                    path = build_project(test.source_dir, join(build_dir, test_id), T,
+                        toolchain, test.dependencies, clean=clean_project_options,
+                        verbose=self.opts_verbose, name=project_name, macros=MACROS,
+                        inc_dirs=INC_DIRS, jobs=self.opts_jobs, report=build_report,
+                        properties=build_properties, project_id=test_id,
+                        project_description=test.get_description(),
+                        build_profile=profile, stats_depth=stats_depth)
 
                 except Exception, e:
                     project_name_str = project_name if project_name is not None else test_id
@@ -1987,6 +1979,12 @@
                         default=False,
                         action="store_true",
                         help='Prints script version and exits')
+
+    parser.add_argument('--stats-depth',
+                        dest='stats_depth',
+                        default=2,
+                        type=int,
+                        help="Depth level for static memory report")
     return parser
 
 def test_path_to_name(path, base):
@@ -2038,7 +2036,7 @@
                 if path_depth == 2:
                     test_group_directory_path, test_case_directory = os.path.split(d)
                     test_group_directory = os.path.basename(test_group_directory_path)
-                    
+
                     # Check to make sure discoverd folder is not in a host test directory
                     if test_case_directory != 'host_tests' and test_group_directory != 'host_tests':
                         test_name = test_path_to_name(d, base_dir)
@@ -2122,7 +2120,7 @@
                 clean=False, notify=None, verbose=False, jobs=1, macros=None,
                 silent=False, report=None, properties=None,
                 continue_on_build_fail=False, app_config=None,
-                build_profile=None):
+                build_profile=None, stats_depth=None):
     """Given the data structure from 'find_tests' and the typical build parameters,
     build all the tests
 
@@ -2158,7 +2156,7 @@
         src_path = base_source_paths + [test_path]
         bin_file = None
         test_case_folder_name = os.path.basename(test_path)
-        
+
         args = (src_path, test_build_path, target, toolchain_name)
         kwargs = {
             'jobs': 1,
@@ -2172,9 +2170,10 @@
             'app_config': app_config,
             'build_profile': build_profile,
             'silent': True,
-            'toolchain_paths': TOOLCHAIN_PATHS
+            'toolchain_paths': TOOLCHAIN_PATHS,
+            'stats_depth': stats_depth
         }
-        
+
         results.append(p.apply_async(build_test_worker, args, kwargs))
 
     p.close()
@@ -2196,10 +2195,11 @@
                         results.remove(r)
 
                         # Take report from the kwargs and merge it into existing report
-                        report_entry = worker_result['kwargs']['report'][target_name][toolchain_name]
-                        for test_key in report_entry.keys():
-                            report[target_name][toolchain_name][test_key] = report_entry[test_key]
-                        
+                        if report:
+                            report_entry = worker_result['kwargs']['report'][target_name][toolchain_name]
+                            for test_key in report_entry.keys():
+                                report[target_name][toolchain_name][test_key] = report_entry[test_key]
+
                         # Set the overall result to a failure if a build failure occurred
                         if ('reason' in worker_result and
                             not worker_result['reason'] and
@@ -2222,7 +2222,8 @@
                             }
 
                             test_key = worker_result['kwargs']['project_id'].upper()
-                            print report[target_name][toolchain_name][test_key][0][0]['output'].rstrip()
+                            if report:
+                                print report[target_name][toolchain_name][test_key][0][0]['output'].rstrip()
                             print 'Image: %s\n' % bin_file
 
                     except:

--- a/toolchains/__init__.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/toolchains/__init__.py	Tue Oct 10 16:56:30 2017 -0500
@@ -26,7 +26,6 @@
 from itertools import chain
 from inspect import getmro
 from copy import deepcopy
-from tools.config import Config
 from abc import ABCMeta, abstractmethod
 from distutils.spawn import find_executable
 
@@ -116,8 +115,9 @@
         self.eager = {}
 
 class Resources:
-    def __init__(self, base_path=None):
+    def __init__(self, base_path=None, collect_ignores=False):
         self.base_path = base_path
+        self.collect_ignores = collect_ignores
 
         self.file_basepath = {}
 
@@ -148,6 +148,7 @@
 
         # Features
         self.features = LazyDict()
+        self.ignored_dirs = []
 
     def __add__(self, resources):
         if resources is None:
@@ -161,6 +162,10 @@
         else:
             return self.add(resources)
 
+    def ignore_dir(self, directory):
+        if self.collect_ignores:
+            self.ignored_dirs.append(directory)
+
     def add(self, resources):
         for f,p in resources.file_basepath.items():
             self.file_basepath[f] = p
@@ -190,6 +195,7 @@
         self.json_files += resources.json_files
 
         self.features.update(resources.features)
+        self.ignored_dirs += resources.ignored_dirs
 
         return self
 
@@ -295,11 +301,13 @@
     'LPC11U24', 'LPC1768', 'LPC2368', 'LPC4088', 'LPC812', 'KL25Z',
     'ARM', 'uARM', 'IAR',
     'GCC_ARM', 'GCC_CS', 'GCC_CR', 'GCC_CW', 'GCC_CW_EWL', 'GCC_CW_NEWLIB',
+    'ARMC6'
 ])
 LEGACY_TOOLCHAIN_NAMES = {
     'ARM_STD':'ARM', 'ARM_MICRO': 'uARM',
     'GCC_ARM': 'GCC_ARM', 'GCC_CR': 'GCC_CR',
     'IAR': 'IAR',
+    'ARMC6': 'ARMC6',
 }
 
 
@@ -325,6 +333,10 @@
         "Cortex-M7F" : ["__CORTEX_M7", "ARM_MATH_CM7", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
         "Cortex-M7FD" : ["__CORTEX_M7", "ARM_MATH_CM7", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
         "Cortex-A9" : ["__CORTEX_A9", "ARM_MATH_CA9", "__FPU_PRESENT", "__CMSIS_RTOS", "__EVAL", "__MBED_CMSIS_RTOS_CA9"],
+        "Cortex-M23-NS": ["__CORTEX_M23", "ARM_MATH_ARMV8MBL", "__DOMAIN_NS=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
+        "Cortex-M23": ["__CORTEX_M23", "ARM_MATH_ARMV8MBL", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
+        "Cortex-M33-NS": ["__CORTEX_M33", "ARM_MATH_ARMV8MML", "__DOMAIN_NS=1", "__FPU_PRESENT", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
+        "Cortex-M33": ["__CORTEX_M33", "ARM_MATH_ARMV8MML", "__FPU_PRESENT", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"],
     }
 
     MBED_CONFIG_FILE_NAME="mbed_config.h"
@@ -409,7 +421,6 @@
 
         # Print output buffer
         self.output = str()
-        self.map_outputs = list()   # Place to store memmap scan results in JSON like data structures
 
         # uVisor spepcific rules
         if 'UVISOR' in self.target.features and 'UVISOR_SUPPORTED' in self.target.extra_labels:
@@ -578,13 +589,13 @@
             # information about the library paths. Safe option: assume an update
             if not d or not exists(d):
                 return True
-            
+
             if not self.stat_cache.has_key(d):
                 self.stat_cache[d] = stat(d).st_mtime
 
             if self.stat_cache[d] >= target_mod_time:
                 return True
-        
+
         return False
 
     def is_ignored(self, file_path):
@@ -612,10 +623,11 @@
     # The parameter *base_path* is used to set the base_path attribute of the Resources
     # object and the parameter *exclude_paths* is used by the directory traversal to
     # exclude certain paths from the traversal.
-    def scan_resources(self, path, exclude_paths=None, base_path=None):
+    def scan_resources(self, path, exclude_paths=None, base_path=None,
+                       collect_ignores=False):
         self.progress("scan", path)
 
-        resources = Resources(path)
+        resources = Resources(path, collect_ignores=collect_ignores)
         if not base_path:
             if isfile(path):
                 base_path = dirname(path)
@@ -656,8 +668,10 @@
                     self.add_ignore_patterns(root, base_path, lines)
 
             # Skip the whole folder if ignored, e.g. .mbedignore containing '*'
-            if (self.is_ignored(join(relpath(root, base_path),"")) or
-                self.build_dir == join(relpath(root, base_path))):
+            root_path =join(relpath(root, base_path))
+            if  (self.is_ignored(join(root_path,"")) or
+                 self.build_dir == root_path):
+                resources.ignore_dir(root_path)
                 dirs[:] = []
                 continue
 
@@ -676,18 +690,22 @@
                     self.is_ignored(join(relpath(root, base_path), d,"")) or
                     # Ignore TESTS dir
                     (d == 'TESTS')):
+                        resources.ignore_dir(dir_path)
                         dirs.remove(d)
                 elif d.startswith('FEATURE_'):
                     # Recursively scan features but ignore them in the current scan.
                     # These are dynamically added by the config system if the conditions are matched
                     def closure (dir_path=dir_path, base_path=base_path):
-                        return self.scan_resources(dir_path, base_path=base_path)
+                        return self.scan_resources(dir_path, base_path=base_path,
+                                                   collect_ignores=resources.collect_ignores)
                     resources.features.add_lazy(d[8:], closure)
+                    resources.ignore_dir(dir_path)
                     dirs.remove(d)
                 elif exclude_paths:
                     for exclude_path in exclude_paths:
                         rel_path = relpath(dir_path, exclude_path)
                         if not (rel_path.startswith('..')):
+                            resources.ignore_dir(dir_path)
                             dirs.remove(d)
                             break
 
@@ -818,7 +836,7 @@
                         c = c.replace("\\", "/")
                         if self.CHROOT:
                             c = c.replace(self.CHROOT, '')
-                        cmd_list.append('-I%s' % c)
+                        cmd_list.append('"-I%s"' % c)
                 string = " ".join(cmd_list)
                 f.write(string)
         return include_file
@@ -838,7 +856,7 @@
             string = " ".join(cmd_list)
             f.write(string)
         return link_file
- 
+
     # Generate response file for all objects when archiving.
     # ARM, GCC, IAR cross compatible
     def get_arch_file(self, objects):
@@ -863,7 +881,10 @@
 
         inc_paths = resources.inc_dirs
         if inc_dirs is not None:
-            inc_paths.extend(inc_dirs)
+            if isinstance(inc_dirs, list):
+                inc_paths.extend(inc_dirs)
+            else:
+                inc_paths.append(inc_dirs)
         # De-duplicate include paths
         inc_paths = set(inc_paths)
         # Sort include paths for consistency
@@ -1012,7 +1033,6 @@
 
         return None
 
-    @abstractmethod
     def parse_dependencies(self, dep_path):
         """Parse the dependency information generated by the compiler.
 
@@ -1024,8 +1044,21 @@
 
         Side effects:
         None
+
+        Note: A default implementation is provided for make-like file formats
         """
-        raise NotImplemented
+        dependencies = []
+        buff = open(dep_path).readlines()
+        if buff:
+            buff[0] = re.sub('^(.*?)\: ', '', buff[0])
+            for line in buff:
+                filename = line.replace('\\\n', '').strip()
+                if file:
+                    filename = filename.replace('\\ ', '\a')
+                    dependencies.extend(((self.CHROOT if self.CHROOT else '') +
+                                         f.replace('\a', ' '))
+                                        for f in filename.split(" "))
+        return list(filter(None, dependencies))
 
     def is_not_supported_error(self, output):
         return "#error directive: [NOT_SUPPORTED]" in output
@@ -1111,7 +1144,8 @@
             self.progress("elf2bin", name)
             self.binary(r, elf, bin)
 
-        self.map_outputs = self.mem_stats(map)
+        # Initialize memap and process map file. This doesn't generate output.
+        self.mem_stats(map)
 
         self.var("compile_succeded", True)
         self.var("binary", filename)
@@ -1176,8 +1210,7 @@
     def mem_stats(self, map):
         """! Creates parser object
         @param map Path to linker map file to parse and decode
-        @return Memory summary structure with memory usage statistics
-                None if map file can't be opened and processed
+        @return None
         """
         toolchain = self.__class__.__name__
 
@@ -1192,10 +1225,10 @@
         # Store the memap instance for later use
         self.memap_instance = memap
 
-        # Here we return memory statistics structure (constructed after
-        # call to generate_output) which contains raw data in bytes
-        # about sections + summary
-        return memap.mem_report
+        # Note: memory statistics are not returned.
+        # Need call to generate_output later (depends on depth & output format)
+
+        return None
 
     # Set the configuration data
     def set_config_data(self, config_data):
@@ -1223,7 +1256,7 @@
         else:
             prev_data = None
         # Get the current configuration data
-        crt_data = Config.config_to_header(self.config_data) if self.config_data else None
+        crt_data = self.config.config_to_header(self.config_data) if self.config_data else None
         # "changed" indicates if a configuration change was detected
         changed = False
         if prev_data is not None: # a previous mbed_config.h exists
@@ -1327,6 +1360,25 @@
         raise NotImplemented
 
     @abstractmethod
+    def get_compile_options(self, defines, includes, for_asm=False):
+        """Generate the compiler options from the defines and includes
+
+        Positional arguments:
+        defines -- The preprocessor macros defined on the command line
+        includes -- The include file search paths
+
+        Keyword arguments:
+        for_asm -- generate the assembler options instead of the compiler options
+
+        Return value:
+        A list of the command line arguments that will force the inclusion the specified header
+
+        Side effects:
+        None
+        """
+        raise NotImplemented
+
+    @abstractmethod
     def assemble(self, source, object, includes):
         """Generate the command line that assembles.
 
@@ -1500,7 +1552,7 @@
 
     # Return the list of macros geenrated by the build system
     def get_config_macros(self):
-        return Config.config_to_macros(self.config_data) if self.config_data else []
+        return self.config.config_to_macros(self.config_data) if self.config_data else []
 
     @property
     def report(self):
@@ -1515,24 +1567,24 @@
         to_ret.update(self.config.report)
         return to_ret
 
-from tools.settings import ARM_PATH
-from tools.settings import GCC_ARM_PATH
-from tools.settings import IAR_PATH
+from tools.settings import ARM_PATH, ARMC6_PATH, GCC_ARM_PATH, IAR_PATH
 
 TOOLCHAIN_PATHS = {
     'ARM': ARM_PATH,
     'uARM': ARM_PATH,
+    'ARMC6': ARMC6_PATH,
     'GCC_ARM': GCC_ARM_PATH,
     'IAR': IAR_PATH
 }
 
-from tools.toolchains.arm import ARM_STD, ARM_MICRO
+from tools.toolchains.arm import ARM_STD, ARM_MICRO, ARMC6
 from tools.toolchains.gcc import GCC_ARM
 from tools.toolchains.iar import IAR
 
 TOOLCHAIN_CLASSES = {
     'ARM': ARM_STD,
     'uARM': ARM_MICRO,
+    'ARMC6': ARMC6,
     'GCC_ARM': GCC_ARM,
     'IAR': IAR
 }

--- a/toolchains/arm.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/toolchains/arm.py	Tue Oct 10 16:56:30 2017 -0500
@@ -15,13 +15,14 @@
 limitations under the License.
 """
 import re
+from copy import copy
 from os.path import join, dirname, splitext, basename, exists
 from os import makedirs, write
 from tempfile import mkstemp
 
 from tools.toolchains import mbedToolchain, TOOLCHAIN_PATHS
 from tools.hooks import hook_tool
-from tools.utils import mkdir
+from tools.utils import mkdir, NotSupportedException
 
 class ARM(mbedToolchain):
     LINKER_EXT = '.sct'
@@ -31,6 +32,7 @@
     DIAGNOSTIC_PATTERN  = re.compile('"(?P<file>[^"]+)", line (?P<line>\d+)( \(column (?P<column>\d+)\)|): (?P<severity>Warning|Error|Fatal error): (?P<message>.+)')
     INDEX_PATTERN  = re.compile('(?P<col>\s*)\^')
     DEP_PATTERN = re.compile('\S+:\s(?P<file>.+)\n')
+    SHEBANG = "#! armcc -E"
 
     @staticmethod
     def check_executable():
@@ -47,6 +49,9 @@
                                extra_verbose=extra_verbose,
                                build_profile=build_profile)
 
+        if "ARM" not in target.supported_toolchains:
+            raise NotSupportedException("ARM compiler support is required for ARM build")
+
         if target.core == "Cortex-M0+":
             cpu = "Cortex-M0"
         elif target.core == "Cortex-M4F":
@@ -69,7 +74,7 @@
         self.cc = [main_cc] + self.flags['common'] + self.flags['c']
         self.cppc = [main_cc] + self.flags['common'] + self.flags['c'] + self.flags['cxx']
 
-        self.ld = [join(ARM_BIN, "armlink")]
+        self.ld = [join(ARM_BIN, "armlink")] + self.flags['ld']
 
         self.ar = join(ARM_BIN, "armar")
         self.elf2bin = join(ARM_BIN, "fromelf")
@@ -82,7 +87,7 @@
                 #we need to append chroot, because when the .d files are generated the compiler is chrooted
                 dependencies.append((self.CHROOT if self.CHROOT else '') + match.group('file'))
         return dependencies
-        
+
     def parse_output(self, output):
         msg = None
         for line in output.splitlines():
@@ -175,32 +180,53 @@
     def compile_cpp(self, source, object, includes):
         return self.compile(self.cppc, source, object, includes)
 
-    @hook_tool
-    def link(self, output, objects, libraries, lib_dirs, mem_map):
-        map_file = splitext(output)[0] + ".map"
-        if len(lib_dirs):
-            args = ["-o", output, "--userlibpath", ",".join(lib_dirs), "--info=totals", "--map", "--list=%s" % map_file]
-        else:
-            args = ["-o", output, "--info=totals", "--map", "--list=%s" % map_file]
+    def correct_scatter_shebang(self, scatter_file):
+        """Correct the shebang at the top of a scatter file.
+
+        Positional arguments:
+        scatter_file -- the scatter file to correct
+
+        Return:
+        The location of the correct scatter file
 
-        args.extend(self.flags['ld'])
-
-        if mem_map:
-            args.extend(["--scatter", mem_map])
+        Side Effects:
+        This method MAY write a new scatter file to disk
+        """
+        with open(scatter_file, "rb") as input:
+            lines = input.readlines()
+            if  (lines[0].startswith(self.SHEBANG) or
+                 not lines[0].startswith("#!")):
+                return scatter_file
+            else:
+                new_scatter = join(self.build_dir, ".link_script.sct")
+                if self.need_update(new_scatter, [scatter_file]):
+                    with open(new_scatter, "wb") as out:
+                        out.write(self.SHEBANG)
+                        out.write("\n")
+                        out.write("".join(lines[1:]))
+                return new_scatter
 
-        # Build linker command
-        cmd = self.ld + args + objects + libraries + self.sys_libs
+    @hook_tool
+    def link(self, output, objects, libraries, lib_dirs, scatter_file):
+        base, _ = splitext(output)
+        map_file = base + ".map"
+        args = ["-o", output, "--info=totals", "--map", "--list=%s" % map_file]
+        args.extend(objects)
+        args.extend(libraries)
+        if lib_dirs:
+            args.extend(["--userlibpath", ",".join(lib_dirs)])
+        if scatter_file:
+            new_scatter = self.correct_scatter_shebang(scatter_file)
+            args.extend(["--scatter", new_scatter])
 
-        # Call cmdline hook
-        cmd = self.hook.get_cmdline_linker(cmd)
+        cmd_pre = self.ld + args
+        cmd = self.hook.get_cmdline_linker(cmd_pre)
 
         if self.RESPONSE_FILES:
-            # Split link command to linker executable + response file
             cmd_linker = cmd[0]
             link_files = self.get_link_file(cmd[1:])
             cmd = [cmd_linker, '--via', link_files]
 
-        # Exec command
         self.cc_verbose("Link: %s" % ' '.join(cmd))
         self.default_cmd(cmd)
 
@@ -210,21 +236,14 @@
             param = ['--via', self.get_arch_file(objects)]
         else:
             param = objects
-
-        # Exec command
         self.default_cmd([self.ar, '-r', lib_path] + param)
 
     @hook_tool
     def binary(self, resources, elf, bin):
         _, fmt = splitext(bin)
         bin_arg = {".bin": "--bin", ".hex": "--i32"}[fmt]
-        # Build binary command
         cmd = [self.elf2bin, bin_arg, '-o', bin, elf]
-
-        # Call cmdline hook
         cmd = self.hook.get_cmdline_binary(cmd)
-
-        # Exec command
         self.cc_verbose("FromELF: %s" % ' '.join(cmd))
         self.default_cmd(cmd)
 
@@ -248,6 +267,107 @@
 class ARM_STD(ARM):
     pass
 
-
 class ARM_MICRO(ARM):
     PATCHED_LIBRARY = False
+
+class ARMC6(ARM_STD):
+    SHEBANG = "#! armclang -E --target=arm-arm-none-eabi -x c"
+    @staticmethod
+    def check_executable():
+        return mbedToolchain.generic_check_executable("ARMC6", "armclang", 1)
+
+    def __init__(self, target, *args, **kwargs):
+        mbedToolchain.__init__(self, target, *args, **kwargs)
+
+        if not set(("ARM", "ARMC6")).intersection(set(target.supported_toolchains)):
+            raise NotSupportedException("ARM/ARMC6 compiler support is required for ARMC6 build")
+
+        if target.core.lower().endswith("fd"):
+            self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-2])
+            self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-2])
+        elif target.core.lower().endswith("f"):
+            self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-1])
+            self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-1])
+        elif target.core.lower().endswith("ns"):
+            self.flags['common'].append("-mcpu=%s" % target.core.lower()[:-3])
+            self.flags['ld'].append("--cpu=%s" % target.core.lower()[:-3])
+        else:
+            self.flags['common'].append("-mcpu=%s" % target.core.lower())
+            self.flags['ld'].append("--cpu=%s" % target.core.lower())
+
+        if target.core == "Cortex-M4F":
+            self.flags['common'].append("-mfpu=fpv4-sp-d16")
+            self.flags['common'].append("-mfloat-abi=hard")
+        elif target.core == "Cortex-M7F":
+            self.flags['common'].append("-mfpu=fpv5-sp-d16")
+            self.flags['common'].append("-mfloat-abi=softfp")
+        elif target.core == "Cortex-M7FD":
+            self.flags['common'].append("-mfpu=fpv5-d16")
+            self.flags['common'].append("-mfloat-abi=softfp")
+        elif target.core.startswith("Cortex-M23"):
+            self.flags['common'].append("-march=armv8-m.base")
+        elif target.core.startswith("Cortex-M33"):
+            self.flags['common'].append("-march=armv8-m.main")
+
+        if target.core == "Cortex-M23" or target.core == "Cortex-M33":
+            self.flags['common'].append("-mcmse")
+
+        asm_cpu = {
+            "Cortex-M0+": "Cortex-M0",
+            "Cortex-M4F": "Cortex-M4.fp",
+            "Cortex-M7F": "Cortex-M7.fp.sp",
+            "Cortex-M7FD": "Cortex-M7.fp.dp",
+            "Cortex-M23-NS": "Cortex-M23",
+            "Cortex-M33-NS": "Cortex-M33" }.get(target.core, target.core)
+
+        self.flags['asm'].append("--cpu=%s" % asm_cpu)
+
+        self.cc = ([join(TOOLCHAIN_PATHS["ARMC6"], "armclang")] +
+                   self.flags['common'] + self.flags['c'])
+        self.cppc = ([join(TOOLCHAIN_PATHS["ARMC6"], "armclang")] +
+                     self.flags['common'] + self.flags['cxx'])
+        self.asm = [join(TOOLCHAIN_PATHS["ARMC6"], "armasm")] + self.flags['asm']
+        self.ld = [join(TOOLCHAIN_PATHS["ARMC6"], "armlink")] + self.flags['ld']
+        self.ar = [join(TOOLCHAIN_PATHS["ARMC6"], "armar")]
+        self.elf2bin = join(TOOLCHAIN_PATHS["ARMC6"], "fromelf")
+
+
+    def parse_dependencies(self, dep_path):
+        return mbedToolchain.parse_dependencies(self, dep_path)
+
+    def is_not_supported_error(self, output):
+        return "#error [NOT_SUPPORTED]" in output
+
+    def parse_output(self, output):
+        pass
+
+    def get_config_option(self, config_header):
+        return ["-include", config_header]
+
+    def get_compile_options(self, defines, includes, for_asm=False):
+        opts = ['-D%s' % d for d in defines]
+        opts.extend(["-I%s" % i for i in includes])
+        if for_asm:
+            return ["--cpreproc",
+                    "--cpreproc_opts=%s" % ",".join(self.flags['common'] + opts)]
+        else:
+            config_header = self.get_config_header()
+            if config_header:
+                opts.extend(self.get_config_option(config_header))
+            return opts
+
+    @hook_tool
+    def assemble(self, source, object, includes):
+        cmd_pre = copy(self.asm)
+        cmd_pre.extend(self.get_compile_options(
+            self.get_symbols(True), includes, for_asm=True))
+        cmd_pre.extend(["-o", object, source])
+        return [self.hook.get_cmdline_assembler(cmd_pre)]
+
+    @hook_tool
+    def compile(self, cc, source, object, includes):
+        cmd = copy(cc)
+        cmd.extend(self.get_compile_options(self.get_symbols(), includes))
+        cmd.extend(["-o", object, source])
+        cmd = self.hook.get_cmdline_compiler(cmd)
+        return [cmd]

--- a/toolchains/gcc.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/toolchains/gcc.py	Tue Oct 10 16:56:30 2017 -0500
@@ -56,6 +56,10 @@
             cpu = "cortex-m7"
         elif target.core == "Cortex-M7FD":
             cpu = "cortex-m7"
+        elif target.core == "Cortex-M23-NS":
+            cpu = "cortex-m23"
+        elif target.core == "Cortex-M33-NS":
+            cpu = "cortex-m33"
         else:
             cpu = target.core.lower()
 
@@ -82,6 +86,14 @@
             self.cpu.append("-mfloat-abi=hard")
             self.cpu.append("-mno-unaligned-access")
 
+        if target.core.startswith("Cortex-M23"):
+            self.cpu.append("-march=armv8-m.base")
+        elif target.core.startswith("Cortex-M33"):
+            self.cpu.append("-march=armv8-m.main")
+
+        if target.core == "Cortex-M23" or target.core == "Cortex-M33":
+            self.cpu.append("-mcmse")
+
         self.flags["common"] += self.cpu
 
         main_cc = join(tool_path, "arm-none-eabi-gcc")
@@ -100,27 +112,6 @@
         self.ar = join(tool_path, "arm-none-eabi-ar")
         self.elf2bin = join(tool_path, "arm-none-eabi-objcopy")
 
-    def parse_dependencies(self, dep_path):
-        dependencies = []
-        buff = open(dep_path).readlines()
-        buff[0] = re.sub('^(.*?)\: ', '', buff[0])
-        for line in buff:
-            file = line.replace('\\\n', '').strip()
-            if file:
-                # GCC might list more than one dependency on a single line, in this case
-                # the dependencies are separated by a space. However, a space might also
-                # indicate an actual space character in a dependency path, but in this case
-                # the space character is prefixed by a backslash.
-                # Temporary replace all '\ ' with a special char that is not used (\a in this
-                # case) to keep them from being interpreted by 'split' (they will be converted
-                # back later to a space char)
-                file = file.replace('\\ ', '\a')
-                if file.find(" ") == -1:
-                    dependencies.append((self.CHROOT if self.CHROOT else '') + file.replace('\a', ' '))
-                else:
-                    dependencies = dependencies + [(self.CHROOT if self.CHROOT else '') + f.replace('\a', ' ') for f in file.split(" ")]
-        return dependencies
-
     def is_not_supported_error(self, output):
         return "error: #error [NOT_SUPPORTED]" in output
 

--- a/toolchains/iar.py	Wed Jul 19 16:44:30 2017 -0500
+++ b/toolchains/iar.py	Tue Oct 10 16:56:30 2017 -0500
@@ -45,29 +45,19 @@
                                build_profile=build_profile)
         if target.core == "Cortex-M7F" or target.core == "Cortex-M7FD":
             cpuchoice = "Cortex-M7"
+        elif target.core.startswith("Cortex-M23"):
+            cpuchoice = "8-M.baseline"
+        elif target.core.startswith("Cortex-M33"):
+            cpuchoice = "8-M.mainline"
         else:
             cpuchoice = target.core
 
         # flags_cmd are used only by our scripts, the project files have them already defined,
         # using this flags results in the errors (duplication)
         # asm accepts --cpu Core or --fpu FPU, not like c/c++ --cpu=Core
-        if target.core == "Cortex-M4F":
-          asm_flags_cmd = [
-              "--cpu", "Cortex-M4F"
-          ]
-        else:
-          asm_flags_cmd = [
-              "--cpu", cpuchoice
-          ]
+        asm_flags_cmd = ["--cpu", cpuchoice]
         # custom c flags
-        if target.core == "Cortex-M4F":
-          c_flags_cmd = [
-              "--cpu", "Cortex-M4F"
-          ]
-        else:
-          c_flags_cmd = [
-              "--cpu", cpuchoice
-          ]
+        c_flags_cmd = ["--cpu", cpuchoice]
 
         c_flags_cmd.extend([
             "--thumb", "--dlib_config", "DLib_Config_Full.h"
@@ -82,6 +72,8 @@
         elif target.core == "Cortex-M7F":
             asm_flags_cmd += ["--fpu", "VFPv5_sp"]
             c_flags_cmd.append("--fpu=VFPv5_sp")
+        elif target.core == "Cortex-M23" or target.core == "Cortex-M33":
+            self.flags["asm"] += ["--cmse"]
 
         IAR_BIN = join(TOOLCHAIN_PATHS['IAR'], "bin")
         main_cc = join(IAR_BIN, "iccarm")
@@ -145,15 +137,16 @@
 
     def get_compile_options(self, defines, includes, for_asm=False):
         opts = ['-D%s' % d for d in defines]
+        if for_asm :
+            return opts
         if self.RESPONSE_FILES:
             opts += ['-f', self.get_inc_file(includes)]
         else:
             opts += ["-I%s" % i for i in includes]
 
-        if not for_asm:
-            config_header = self.get_config_header()
-            if config_header is not None:
-                opts = opts + self.get_config_option(config_header)
+        config_header = self.get_config_header()
+        if config_header is not None:
+            opts = opts + self.get_config_option(config_header)
         return opts
 
     @hook_tool