Diff: export/mcuxpresso/LPC54114_cproject.tmpl

Revision:

40:7d3fa6b99b2b

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/export/mcuxpresso/LPC54114_cproject.tmpl	Tue Oct 10 16:56:30 2017 -0500
@@ -0,0 +1,87 @@
+{% extends "mcuxpresso/.cproject.tmpl" %}
+
+{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_0="None" property_2="LPC5411x_256K.cfx" property_3="NXP" property_4="LPC54114J256" property_count="5" version="70200"/>
+<infoList vendor="NXP"><info chip="LPC54114J256" flash_driver="LPC5411x_256K.cfx" match_id="0x0" name="LPC54114J256" stub="crt_emu_cm3_gen"><chip><name>LPC54114J256</name>
+<family>LPC5411x</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
+<memoryInstance derived_from="RAM" id="Ram0_64" location="0x20000000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="Ram1_64" location="0x20010000" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="Ram2_32" location="0x20020000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamX_32" location="0x4000000" size="0x8000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40000000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40001000"/>
+<peripheralInstance derived_from="GINT0" id="GINT0" location="0x40002000"/>
+<peripheralInstance derived_from="GINT1" id="GINT1" location="0x40003000"/>
+<peripheralInstance derived_from="PINT" id="PINT" location="0x40004000"/>
+<peripheralInstance derived_from="INPUT-MUX" id="INPUT-MUX" location="0x40005000"/>
+<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40008000"/>
+<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40009000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4000c000"/>
+<peripheralInstance derived_from="MRT" id="MRT" location="0x4000d000"/>
+<peripheralInstance derived_from="UTICK" id="UTICK" location="0x4000e000"/>
+<peripheralInstance derived_from="CT32B2" id="CT32B2" location="0x40028000"/>
+<peripheralInstance derived_from="RTC" id="RTC" location="0x4002c000"/>
+<peripheralInstance derived_from="CT32B3" id="CT32B3" location="0x40048000"/>
+<peripheralInstance derived_from="CT32B4" id="CT32B4" location="0x40049000"/>
+<peripheralInstance derived_from="DMA" id="DMA" location="0x40082000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x40084000"/>
+<peripheralInstance derived_from="SCT" id="SCT" location="0x40085000"/>
+<peripheralInstance derived_from="FLEXCOMM0" id="FLEXCOMM0" location="0x40086000"/>
+<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40086000"/>
+<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40086000"/>
+<peripheralInstance derived_from="USART0" id="USART0" location="0x40086000"/>
+<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40087000"/>
+<peripheralInstance derived_from="FLEXCOMM1" id="FLEXCOMM1" location="0x40087000"/>
+<peripheralInstance derived_from="SPI1" id="SPI1" location="0x40087000"/>
+<peripheralInstance derived_from="USART1" id="USART1" location="0x40087000"/>
+<peripheralInstance derived_from="SPI2" id="SPI2" location="0x40088000"/>
+<peripheralInstance derived_from="FLEXCOMM2" id="FLEXCOMM2" location="0x40088000"/>
+<peripheralInstance derived_from="USART2" id="USART2" location="0x40088000"/>
+<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40088000"/>
+<peripheralInstance derived_from="FLEXCOMM3" id="FLEXCOMM3" location="0x40089000"/>
+<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40089000"/>
+<peripheralInstance derived_from="USART3" id="USART3" location="0x40089000"/>
+<peripheralInstance derived_from="SPI3" id="SPI3" location="0x40089000"/>
+<peripheralInstance derived_from="FLEXCOMM4" id="FLEXCOMM4" location="0x4008a000"/>
+<peripheralInstance derived_from="SPI4" id="SPI4" location="0x4008a000"/>
+<peripheralInstance derived_from="USART4" id="USART4" location="0x4008a000"/>
+<peripheralInstance derived_from="I2C4" id="I2C4" location="0x4008a000"/>
+<peripheralInstance derived_from="MAILBOX" id="MAILBOX" location="0x4008b000"/>
+<peripheralInstance derived_from="GPIO" id="GPIO" location="0x4008c000"/>
+<peripheralInstance derived_from="DMIC" id="DMIC" location="0x40090000"/>
+<peripheralInstance derived_from="CRC-ENGINE" id="CRC-ENGINE" location="0x40095000"/>
+<peripheralInstance derived_from="I2C6" id="I2C6" location="0x40096000"/>
+<peripheralInstance derived_from="USART7" id="USART7" location="0x40096000"/>
+<peripheralInstance derived_from="SPI6" id="SPI6" location="0x40096000"/>
+<peripheralInstance derived_from="I2C5" id="I2C5" location="0x40096000"/>
+<peripheralInstance derived_from="SPI5" id="SPI5" location="0x40096000"/>
+<peripheralInstance derived_from="SPI7" id="SPI7" location="0x40096000"/>
+<peripheralInstance derived_from="FLEXCOMM5" id="FLEXCOMM5" location="0x40096000"/>
+<peripheralInstance derived_from="USART6" id="USART6" location="0x40096000"/>
+<peripheralInstance derived_from="USART5" id="USART5" location="0x40096000"/>
+<peripheralInstance derived_from="I2C7" id="I2C7" location="0x40096000"/>
+<peripheralInstance derived_from="FLEXCOMM6" id="FLEXCOMM6" location="0x40097000"/>
+<peripheralInstance derived_from="I2S0" id="I2S0" location="0x40097000"/>
+<peripheralInstance derived_from="I2S1" id="I2S1" location="0x40098000"/>
+<peripheralInstance derived_from="FLEXCOMM7" id="FLEXCOMM7" location="0x40098000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x400a0000"/>
+</chip>
+<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<family>Cortex-M</family>
+</processor>
+<link href="LPC5411x_peripheral.xme" show="embed" type="simple"/>
+</info>
+</infoList>
+</TargetConfig>{% endblock %}