FOR 32V 3.2A

Fork of INA219 by Components

Committer:
andcor02
Date:
Thu Apr 12 14:21:51 2018 +0000
Revision:
1:69f47d90848a
Parent:
0:eee9c8ba72ff
FOR 32V 3.2A

Who changed what in which revision?

UserRevisionLine numberNew contents of line
melse 0:eee9c8ba72ff 1 /*
melse 0:eee9c8ba72ff 2 'Borrowed' from Adafruit's INA219 libarary. Licensed under the BSD license.
melse 0:eee9c8ba72ff 3
melse 0:eee9c8ba72ff 4 https://github.com/adafruit/Adafruit_INA219
melse 0:eee9c8ba72ff 5 */
melse 0:eee9c8ba72ff 6
melse 0:eee9c8ba72ff 7 // Hopefully Adafruit won't mind if I borrow this...
melse 0:eee9c8ba72ff 8
melse 0:eee9c8ba72ff 9 /*=========================================================================
melse 0:eee9c8ba72ff 10 I2C ADDRESS/BITS
melse 0:eee9c8ba72ff 11 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 12 #define INA219_ADDRESS (0x40) // 1000000 (A0+A1=GND)
melse 0:eee9c8ba72ff 13 #define INA219_READ (0x01)
melse 0:eee9c8ba72ff 14 /*=========================================================================*/
melse 0:eee9c8ba72ff 15
melse 0:eee9c8ba72ff 16 /*=========================================================================
melse 0:eee9c8ba72ff 17 CONFIG REGISTER (R/W)
melse 0:eee9c8ba72ff 18 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 19 #define INA219_REG_CONFIG (0x00)
melse 0:eee9c8ba72ff 20 /*---------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 21 #define INA219_CONFIG_RESET (0x8000) // Reset Bit
melse 0:eee9c8ba72ff 22
melse 0:eee9c8ba72ff 23 #define INA219_CONFIG_BVOLTAGERANGE_MASK (0x2000) // Bus Voltage Range Mask
melse 0:eee9c8ba72ff 24 #define INA219_CONFIG_BVOLTAGERANGE_16V (0x0000) // 0-16V Range
melse 0:eee9c8ba72ff 25 #define INA219_CONFIG_BVOLTAGERANGE_32V (0x2000) // 0-32V Range
melse 0:eee9c8ba72ff 26
melse 0:eee9c8ba72ff 27 #define INA219_CONFIG_GAIN_MASK (0x1800) // Gain Mask
melse 0:eee9c8ba72ff 28 #define INA219_CONFIG_GAIN_1_40MV (0x0000) // Gain 1, 40mV Range
melse 0:eee9c8ba72ff 29 #define INA219_CONFIG_GAIN_2_80MV (0x0800) // Gain 2, 80mV Range
melse 0:eee9c8ba72ff 30 #define INA219_CONFIG_GAIN_4_160MV (0x1000) // Gain 4, 160mV Range
melse 0:eee9c8ba72ff 31 #define INA219_CONFIG_GAIN_8_320MV (0x1800) // Gain 8, 320mV Range
melse 0:eee9c8ba72ff 32
melse 0:eee9c8ba72ff 33 #define INA219_CONFIG_BADCRES_MASK (0x0780) // Bus ADC Resolution Mask
melse 0:eee9c8ba72ff 34 #define INA219_CONFIG_BADCRES_9BIT (0x0080) // 9-bit bus res = 0..511
melse 0:eee9c8ba72ff 35 #define INA219_CONFIG_BADCRES_10BIT (0x0100) // 10-bit bus res = 0..1023
melse 0:eee9c8ba72ff 36 #define INA219_CONFIG_BADCRES_11BIT (0x0200) // 11-bit bus res = 0..2047
melse 0:eee9c8ba72ff 37 #define INA219_CONFIG_BADCRES_12BIT (0x0400) // 12-bit bus res = 0..4097
melse 0:eee9c8ba72ff 38
melse 0:eee9c8ba72ff 39 #define INA219_CONFIG_SADCRES_MASK (0x0078) // Shunt ADC Resolution and Averaging Mask
melse 0:eee9c8ba72ff 40 #define INA219_CONFIG_SADCRES_9BIT_1S_84US (0x0000) // 1 x 9-bit shunt sample
melse 0:eee9c8ba72ff 41 #define INA219_CONFIG_SADCRES_10BIT_1S_148US (0x0008) // 1 x 10-bit shunt sample
melse 0:eee9c8ba72ff 42 #define INA219_CONFIG_SADCRES_11BIT_1S_276US (0x0010) // 1 x 11-bit shunt sample
melse 0:eee9c8ba72ff 43 #define INA219_CONFIG_SADCRES_12BIT_1S_532US (0x0018) // 1 x 12-bit shunt sample
melse 0:eee9c8ba72ff 44 #define INA219_CONFIG_SADCRES_12BIT_2S_1060US (0x0048) // 2 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 45 #define INA219_CONFIG_SADCRES_12BIT_4S_2130US (0x0050) // 4 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 46 #define INA219_CONFIG_SADCRES_12BIT_8S_4260US (0x0058) // 8 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 47 #define INA219_CONFIG_SADCRES_12BIT_16S_8510US (0x0060) // 16 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 48 #define INA219_CONFIG_SADCRES_12BIT_32S_17MS (0x0068) // 32 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 49 #define INA219_CONFIG_SADCRES_12BIT_64S_34MS (0x0070) // 64 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 50 #define INA219_CONFIG_SADCRES_12BIT_128S_69MS (0x0078) // 128 x 12-bit shunt samples averaged together
melse 0:eee9c8ba72ff 51
melse 0:eee9c8ba72ff 52 #define INA219_CONFIG_MODE_MASK (0x0007) // Operating Mode Mask
melse 0:eee9c8ba72ff 53 #define INA219_CONFIG_MODE_POWERDOWN (0x0000)
melse 0:eee9c8ba72ff 54 #define INA219_CONFIG_MODE_SVOLT_TRIGGERED (0x0001)
melse 0:eee9c8ba72ff 55 #define INA219_CONFIG_MODE_BVOLT_TRIGGERED (0x0002)
melse 0:eee9c8ba72ff 56 #define INA219_CONFIG_MODE_SANDBVOLT_TRIGGERED (0x0003)
melse 0:eee9c8ba72ff 57 #define INA219_CONFIG_MODE_ADCOFF (0x0004)
melse 0:eee9c8ba72ff 58 #define INA219_CONFIG_MODE_SVOLT_CONTINUOUS (0x0005)
melse 0:eee9c8ba72ff 59 #define INA219_CONFIG_MODE_BVOLT_CONTINUOUS (0x0006)
melse 0:eee9c8ba72ff 60 #define INA219_CONFIG_MODE_SANDBVOLT_CONTINUOUS (0x0007)
melse 0:eee9c8ba72ff 61 /*=========================================================================*/
melse 0:eee9c8ba72ff 62
melse 0:eee9c8ba72ff 63 /*=========================================================================
melse 0:eee9c8ba72ff 64 SHUNT VOLTAGE REGISTER (R)
melse 0:eee9c8ba72ff 65 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 66 #define INA219_REG_SHUNTVOLTAGE (0x01)
melse 0:eee9c8ba72ff 67 /*=========================================================================*/
melse 0:eee9c8ba72ff 68
melse 0:eee9c8ba72ff 69 /*=========================================================================
melse 0:eee9c8ba72ff 70 BUS VOLTAGE REGISTER (R)
melse 0:eee9c8ba72ff 71 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 72 #define INA219_REG_BUSVOLTAGE (0x02)
melse 0:eee9c8ba72ff 73 /*=========================================================================*/
melse 0:eee9c8ba72ff 74
melse 0:eee9c8ba72ff 75 /*=========================================================================
melse 0:eee9c8ba72ff 76 POWER REGISTER (R)
melse 0:eee9c8ba72ff 77 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 78 #define INA219_REG_POWER (0x03)
melse 0:eee9c8ba72ff 79 /*=========================================================================*/
melse 0:eee9c8ba72ff 80
melse 0:eee9c8ba72ff 81 /*=========================================================================
melse 0:eee9c8ba72ff 82 CURRENT REGISTER (R)
melse 0:eee9c8ba72ff 83 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 84 #define INA219_REG_CURRENT (0x04)
melse 0:eee9c8ba72ff 85 /*=========================================================================*/
melse 0:eee9c8ba72ff 86
melse 0:eee9c8ba72ff 87 /*=========================================================================
melse 0:eee9c8ba72ff 88 CALIBRATION REGISTER (R/W)
melse 0:eee9c8ba72ff 89 -----------------------------------------------------------------------*/
melse 0:eee9c8ba72ff 90 #define INA219_REG_CALIBRATION (0x05)
melse 0:eee9c8ba72ff 91 /*=========================================================================*/