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drivers/SPI.cpp@174:b96e65c34a4d, 2017-10-02 (annotated)

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
Parent:
170:19eb464bc2be 
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2006-2013 ARM Limited
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16 #include "drivers/SPI.h"
<> 160:d5399cc887bb 17 #include "platform/mbed_critical.h"
<> 149:156823d33999 18
AnnaBridge 174:b96e65c34a4d 19 #if DEVICE_SPI_ASYNCH
AnnaBridge 174:b96e65c34a4d 20 #include "platform/mbed_sleep.h"
AnnaBridge 174:b96e65c34a4d 21 #endif
AnnaBridge 174:b96e65c34a4d 22
<> 149:156823d33999 23 #if DEVICE_SPI
<> 149:156823d33999 24
<> 149:156823d33999 25 namespace mbed {
<> 149:156823d33999 26
<> 149:156823d33999 27 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 28 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
<> 149:156823d33999 29 #endif
<> 149:156823d33999 30
<> 149:156823d33999 31 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
<> 149:156823d33999 32 _spi(),
<> 149:156823d33999 33 #if DEVICE_SPI_ASYNCH
<> 149:156823d33999 34 _irq(this),
<> 149:156823d33999 35 _usage(DMA_USAGE_NEVER),
<> 149:156823d33999 36 #endif
<> 149:156823d33999 37 _bits(8),
<> 149:156823d33999 38 _mode(0),
Kojto 170:19eb464bc2be 39 _hz(1000000),
Kojto 170:19eb464bc2be 40 _write_fill(SPI_FILL_CHAR) {
<> 149:156823d33999 41 // No lock needed in the constructor
<> 149:156823d33999 42
<> 149:156823d33999 43 spi_init(&_spi, mosi, miso, sclk, ssel);
Kojto 169:e3b6fe271b81 44 _acquire();
<> 149:156823d33999 45 }
<> 149:156823d33999 46
<> 149:156823d33999 47 void SPI::format(int bits, int mode) {
<> 149:156823d33999 48 lock();
<> 149:156823d33999 49 _bits = bits;
<> 149:156823d33999 50 _mode = mode;
Kojto 169:e3b6fe271b81 51 // If changing format while you are the owner than just
Kojto 169:e3b6fe271b81 52 // update format, but if owner is changed than even frequency should be
Kojto 169:e3b6fe271b81 53 // updated which is done by acquire.
Kojto 169:e3b6fe271b81 54 if (_owner == this) {
Kojto 169:e3b6fe271b81 55 spi_format(&_spi, _bits, _mode, 0);
Kojto 169:e3b6fe271b81 56 } else {
Kojto 169:e3b6fe271b81 57 _acquire();
Kojto 169:e3b6fe271b81 58 }
<> 149:156823d33999 59 unlock();
<> 149:156823d33999 60 }
<> 149:156823d33999 61
<> 149:156823d33999 62 void SPI::frequency(int hz) {
<> 149:156823d33999 63 lock();
<> 149:156823d33999 64 _hz = hz;
Kojto 169:e3b6fe271b81 65 // If changing format while you are the owner than just
Kojto 169:e3b6fe271b81 66 // update frequency, but if owner is changed than even frequency should be
Kojto 169:e3b6fe271b81 67 // updated which is done by acquire.
Kojto 169:e3b6fe271b81 68 if (_owner == this) {
Kojto 169:e3b6fe271b81 69 spi_frequency(&_spi, _hz);
Kojto 169:e3b6fe271b81 70 } else {
Kojto 169:e3b6fe271b81 71 _acquire();
Kojto 169:e3b6fe271b81 72 }
<> 149:156823d33999 73 unlock();
<> 149:156823d33999 74 }
<> 149:156823d33999 75
<> 149:156823d33999 76 SPI* SPI::_owner = NULL;
<> 149:156823d33999 77 SingletonPtr<PlatformMutex> SPI::_mutex;
<> 149:156823d33999 78
<> 149:156823d33999 79 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
<> 149:156823d33999 80 void SPI::aquire() {
<> 149:156823d33999 81 lock();
<> 149:156823d33999 82 if (_owner != this) {
<> 149:156823d33999 83 spi_format(&_spi, _bits, _mode, 0);
<> 149:156823d33999 84 spi_frequency(&_spi, _hz);
<> 149:156823d33999 85 _owner = this;
<> 149:156823d33999 86 }
<> 149:156823d33999 87 unlock();
<> 149:156823d33999 88 }
<> 149:156823d33999 89
Kojto 169:e3b6fe271b81 90 // Note: Private function with no locking
Kojto 169:e3b6fe271b81 91 void SPI::_acquire() {
Kojto 169:e3b6fe271b81 92 if (_owner != this) {
Kojto 169:e3b6fe271b81 93 spi_format(&_spi, _bits, _mode, 0);
Kojto 169:e3b6fe271b81 94 spi_frequency(&_spi, _hz);
Kojto 169:e3b6fe271b81 95 _owner = this;
Kojto 169:e3b6fe271b81 96 }
Kojto 169:e3b6fe271b81 97 }
Kojto 169:e3b6fe271b81 98
<> 149:156823d33999 99 int SPI::write(int value) {
<> 149:156823d33999 100 lock();
Kojto 169:e3b6fe271b81 101 _acquire();
<> 149:156823d33999 102 int ret = spi_master_write(&_spi, value);
<> 149:156823d33999 103 unlock();
<> 149:156823d33999 104 return ret;
<> 149:156823d33999 105 }
<> 149:156823d33999 106
AnnaBridge 167:e84263d55307 107 int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) {
AnnaBridge 167:e84263d55307 108 lock();
Kojto 169:e3b6fe271b81 109 _acquire();
Kojto 170:19eb464bc2be 110 int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, _write_fill);
AnnaBridge 167:e84263d55307 111 unlock();
AnnaBridge 167:e84263d55307 112 return ret;
AnnaBridge 167:e84263d55307 113 }
AnnaBridge 167:e84263d55307 114
<> 149:156823d33999 115 void SPI::lock() {
<> 149:156823d33999 116 _mutex->lock();
<> 149:156823d33999 117 }
<> 149:156823d33999 118
<> 149:156823d33999 119 void SPI::unlock() {
<> 149:156823d33999 120 _mutex->unlock();
<> 149:156823d33999 121 }
<> 149:156823d33999 122
Kojto 170:19eb464bc2be 123 void SPI::set_default_write_value(char data) {
Kojto 170:19eb464bc2be 124 lock();
Kojto 170:19eb464bc2be 125 _write_fill = data;
Kojto 170:19eb464bc2be 126 unlock();
Kojto 170:19eb464bc2be 127 }
Kojto 170:19eb464bc2be 128
<> 149:156823d33999 129 #if DEVICE_SPI_ASYNCH
<> 149:156823d33999 130
<> 149:156823d33999 131 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
<> 149:156823d33999 132 {
<> 149:156823d33999 133 if (spi_active(&_spi)) {
<> 149:156823d33999 134 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
<> 149:156823d33999 135 }
<> 149:156823d33999 136 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
<> 149:156823d33999 137 return 0;
<> 149:156823d33999 138 }
<> 149:156823d33999 139
<> 149:156823d33999 140 void SPI::abort_transfer()
<> 149:156823d33999 141 {
<> 149:156823d33999 142 spi_abort_asynch(&_spi);
AnnaBridge 174:b96e65c34a4d 143 sleep_manager_unlock_deep_sleep();
<> 149:156823d33999 144 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 145 dequeue_transaction();
<> 149:156823d33999 146 #endif
<> 149:156823d33999 147 }
<> 149:156823d33999 148
<> 149:156823d33999 149
<> 149:156823d33999 150 void SPI::clear_transfer_buffer()
<> 149:156823d33999 151 {
<> 149:156823d33999 152 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 153 _transaction_buffer.reset();
<> 149:156823d33999 154 #endif
<> 149:156823d33999 155 }
<> 149:156823d33999 156
<> 149:156823d33999 157 void SPI::abort_all_transfers()
<> 149:156823d33999 158 {
<> 149:156823d33999 159 clear_transfer_buffer();
<> 149:156823d33999 160 abort_transfer();
<> 149:156823d33999 161 }
<> 149:156823d33999 162
<> 149:156823d33999 163 int SPI::set_dma_usage(DMAUsage usage)
<> 149:156823d33999 164 {
<> 149:156823d33999 165 if (spi_active(&_spi)) {
<> 149:156823d33999 166 return -1;
<> 149:156823d33999 167 }
<> 149:156823d33999 168 _usage = usage;
<> 149:156823d33999 169 return 0;
<> 149:156823d33999 170 }
<> 149:156823d33999 171
<> 149:156823d33999 172 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
<> 149:156823d33999 173 {
<> 149:156823d33999 174 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 175 transaction_t t;
<> 149:156823d33999 176
<> 149:156823d33999 177 t.tx_buffer = const_cast<void *>(tx_buffer);
<> 149:156823d33999 178 t.tx_length = tx_length;
<> 149:156823d33999 179 t.rx_buffer = rx_buffer;
<> 149:156823d33999 180 t.rx_length = rx_length;
<> 149:156823d33999 181 t.event = event;
<> 149:156823d33999 182 t.callback = callback;
<> 149:156823d33999 183 t.width = bit_width;
<> 149:156823d33999 184 Transaction<SPI> transaction(this, t);
<> 149:156823d33999 185 if (_transaction_buffer.full()) {
<> 149:156823d33999 186 return -1; // the buffer is full
<> 149:156823d33999 187 } else {
<> 149:156823d33999 188 core_util_critical_section_enter();
<> 149:156823d33999 189 _transaction_buffer.push(transaction);
<> 149:156823d33999 190 if (!spi_active(&_spi)) {
<> 149:156823d33999 191 dequeue_transaction();
<> 149:156823d33999 192 }
<> 149:156823d33999 193 core_util_critical_section_exit();
<> 149:156823d33999 194 return 0;
<> 149:156823d33999 195 }
<> 149:156823d33999 196 #else
<> 149:156823d33999 197 return -1;
<> 149:156823d33999 198 #endif
<> 149:156823d33999 199 }
<> 149:156823d33999 200
<> 149:156823d33999 201 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
<> 149:156823d33999 202 {
AnnaBridge 174:b96e65c34a4d 203 sleep_manager_lock_deep_sleep();
Kojto 169:e3b6fe271b81 204 _acquire();
<> 149:156823d33999 205 _callback = callback;
<> 149:156823d33999 206 _irq.callback(&SPI::irq_handler_asynch);
<> 149:156823d33999 207 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
<> 149:156823d33999 208 }
<> 149:156823d33999 209
<> 149:156823d33999 210 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 211
<> 149:156823d33999 212 void SPI::start_transaction(transaction_t *data)
<> 149:156823d33999 213 {
<> 149:156823d33999 214 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
<> 149:156823d33999 215 }
<> 149:156823d33999 216
<> 149:156823d33999 217 void SPI::dequeue_transaction()
<> 149:156823d33999 218 {
<> 149:156823d33999 219 Transaction<SPI> t;
<> 149:156823d33999 220 if (_transaction_buffer.pop(t)) {
<> 149:156823d33999 221 SPI* obj = t.get_object();
<> 149:156823d33999 222 transaction_t* data = t.get_transaction();
<> 149:156823d33999 223 obj->start_transaction(data);
<> 149:156823d33999 224 }
<> 149:156823d33999 225 }
<> 149:156823d33999 226
<> 149:156823d33999 227 #endif
<> 149:156823d33999 228
<> 149:156823d33999 229 void SPI::irq_handler_asynch(void)
<> 149:156823d33999 230 {
<> 149:156823d33999 231 int event = spi_irq_handler_asynch(&_spi);
<> 149:156823d33999 232 if (_callback && (event & SPI_EVENT_ALL)) {
AnnaBridge 174:b96e65c34a4d 233 sleep_manager_unlock_deep_sleep();
<> 149:156823d33999 234 _callback.call(event & SPI_EVENT_ALL);
<> 149:156823d33999 235 }
<> 149:156823d33999 236 #if TRANSACTION_QUEUE_SIZE_SPI
<> 149:156823d33999 237 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
<> 149:156823d33999 238 // SPI peripheral is free (event happend), dequeue transaction
<> 149:156823d33999 239 dequeue_transaction();
<> 149:156823d33999 240 }
<> 149:156823d33999 241 #endif
<> 149:156823d33999 242 }
<> 149:156823d33999 243
<> 149:156823d33999 244 #endif
<> 149:156823d33999 245
<> 149:156823d33999 246 } // namespace mbed
<> 149:156823d33999 247
<> 149:156823d33999 248 #endif