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drivers/SPI.cpp@169:e3b6fe271b81, 2017-07-19 (annotated)
- Committer:
- Kojto
- Date:
- Wed Jul 19 17:31:21 2017 +0100
- Revision:
- 169:e3b6fe271b81
- Parent:
- 167:e84263d55307
- Child:
- 170:19eb464bc2be
This updates the lib to the mbed lib v 147
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
<> | 149:156823d33999 | 16 | #include "drivers/SPI.h" |
<> | 160:d5399cc887bb | 17 | #include "platform/mbed_critical.h" |
<> | 149:156823d33999 | 18 | |
<> | 149:156823d33999 | 19 | #if DEVICE_SPI |
<> | 149:156823d33999 | 20 | |
<> | 149:156823d33999 | 21 | namespace mbed { |
<> | 149:156823d33999 | 22 | |
<> | 149:156823d33999 | 23 | #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 24 | CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer; |
<> | 149:156823d33999 | 25 | #endif |
<> | 149:156823d33999 | 26 | |
<> | 149:156823d33999 | 27 | SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) : |
<> | 149:156823d33999 | 28 | _spi(), |
<> | 149:156823d33999 | 29 | #if DEVICE_SPI_ASYNCH |
<> | 149:156823d33999 | 30 | _irq(this), |
<> | 149:156823d33999 | 31 | _usage(DMA_USAGE_NEVER), |
<> | 149:156823d33999 | 32 | #endif |
<> | 149:156823d33999 | 33 | _bits(8), |
<> | 149:156823d33999 | 34 | _mode(0), |
<> | 149:156823d33999 | 35 | _hz(1000000) { |
<> | 149:156823d33999 | 36 | // No lock needed in the constructor |
<> | 149:156823d33999 | 37 | |
<> | 149:156823d33999 | 38 | spi_init(&_spi, mosi, miso, sclk, ssel); |
Kojto | 169:e3b6fe271b81 | 39 | _acquire(); |
<> | 149:156823d33999 | 40 | } |
<> | 149:156823d33999 | 41 | |
<> | 149:156823d33999 | 42 | void SPI::format(int bits, int mode) { |
<> | 149:156823d33999 | 43 | lock(); |
<> | 149:156823d33999 | 44 | _bits = bits; |
<> | 149:156823d33999 | 45 | _mode = mode; |
Kojto | 169:e3b6fe271b81 | 46 | // If changing format while you are the owner than just |
Kojto | 169:e3b6fe271b81 | 47 | // update format, but if owner is changed than even frequency should be |
Kojto | 169:e3b6fe271b81 | 48 | // updated which is done by acquire. |
Kojto | 169:e3b6fe271b81 | 49 | if (_owner == this) { |
Kojto | 169:e3b6fe271b81 | 50 | spi_format(&_spi, _bits, _mode, 0); |
Kojto | 169:e3b6fe271b81 | 51 | } else { |
Kojto | 169:e3b6fe271b81 | 52 | _acquire(); |
Kojto | 169:e3b6fe271b81 | 53 | } |
<> | 149:156823d33999 | 54 | unlock(); |
<> | 149:156823d33999 | 55 | } |
<> | 149:156823d33999 | 56 | |
<> | 149:156823d33999 | 57 | void SPI::frequency(int hz) { |
<> | 149:156823d33999 | 58 | lock(); |
<> | 149:156823d33999 | 59 | _hz = hz; |
Kojto | 169:e3b6fe271b81 | 60 | // If changing format while you are the owner than just |
Kojto | 169:e3b6fe271b81 | 61 | // update frequency, but if owner is changed than even frequency should be |
Kojto | 169:e3b6fe271b81 | 62 | // updated which is done by acquire. |
Kojto | 169:e3b6fe271b81 | 63 | if (_owner == this) { |
Kojto | 169:e3b6fe271b81 | 64 | spi_frequency(&_spi, _hz); |
Kojto | 169:e3b6fe271b81 | 65 | } else { |
Kojto | 169:e3b6fe271b81 | 66 | _acquire(); |
Kojto | 169:e3b6fe271b81 | 67 | } |
<> | 149:156823d33999 | 68 | unlock(); |
<> | 149:156823d33999 | 69 | } |
<> | 149:156823d33999 | 70 | |
<> | 149:156823d33999 | 71 | SPI* SPI::_owner = NULL; |
<> | 149:156823d33999 | 72 | SingletonPtr<PlatformMutex> SPI::_mutex; |
<> | 149:156823d33999 | 73 | |
<> | 149:156823d33999 | 74 | // ignore the fact there are multiple physical spis, and always update if it wasnt us last |
<> | 149:156823d33999 | 75 | void SPI::aquire() { |
<> | 149:156823d33999 | 76 | lock(); |
<> | 149:156823d33999 | 77 | if (_owner != this) { |
<> | 149:156823d33999 | 78 | spi_format(&_spi, _bits, _mode, 0); |
<> | 149:156823d33999 | 79 | spi_frequency(&_spi, _hz); |
<> | 149:156823d33999 | 80 | _owner = this; |
<> | 149:156823d33999 | 81 | } |
<> | 149:156823d33999 | 82 | unlock(); |
<> | 149:156823d33999 | 83 | } |
<> | 149:156823d33999 | 84 | |
Kojto | 169:e3b6fe271b81 | 85 | // Note: Private function with no locking |
Kojto | 169:e3b6fe271b81 | 86 | void SPI::_acquire() { |
Kojto | 169:e3b6fe271b81 | 87 | if (_owner != this) { |
Kojto | 169:e3b6fe271b81 | 88 | spi_format(&_spi, _bits, _mode, 0); |
Kojto | 169:e3b6fe271b81 | 89 | spi_frequency(&_spi, _hz); |
Kojto | 169:e3b6fe271b81 | 90 | _owner = this; |
Kojto | 169:e3b6fe271b81 | 91 | } |
Kojto | 169:e3b6fe271b81 | 92 | } |
Kojto | 169:e3b6fe271b81 | 93 | |
<> | 149:156823d33999 | 94 | int SPI::write(int value) { |
<> | 149:156823d33999 | 95 | lock(); |
Kojto | 169:e3b6fe271b81 | 96 | _acquire(); |
<> | 149:156823d33999 | 97 | int ret = spi_master_write(&_spi, value); |
<> | 149:156823d33999 | 98 | unlock(); |
<> | 149:156823d33999 | 99 | return ret; |
<> | 149:156823d33999 | 100 | } |
<> | 149:156823d33999 | 101 | |
AnnaBridge | 167:e84263d55307 | 102 | int SPI::write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length) { |
AnnaBridge | 167:e84263d55307 | 103 | lock(); |
Kojto | 169:e3b6fe271b81 | 104 | _acquire(); |
AnnaBridge | 167:e84263d55307 | 105 | int ret = spi_master_block_write(&_spi, tx_buffer, tx_length, rx_buffer, rx_length); |
AnnaBridge | 167:e84263d55307 | 106 | unlock(); |
AnnaBridge | 167:e84263d55307 | 107 | return ret; |
AnnaBridge | 167:e84263d55307 | 108 | } |
AnnaBridge | 167:e84263d55307 | 109 | |
<> | 149:156823d33999 | 110 | void SPI::lock() { |
<> | 149:156823d33999 | 111 | _mutex->lock(); |
<> | 149:156823d33999 | 112 | } |
<> | 149:156823d33999 | 113 | |
<> | 149:156823d33999 | 114 | void SPI::unlock() { |
<> | 149:156823d33999 | 115 | _mutex->unlock(); |
<> | 149:156823d33999 | 116 | } |
<> | 149:156823d33999 | 117 | |
<> | 149:156823d33999 | 118 | #if DEVICE_SPI_ASYNCH |
<> | 149:156823d33999 | 119 | |
<> | 149:156823d33999 | 120 | int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 121 | { |
<> | 149:156823d33999 | 122 | if (spi_active(&_spi)) { |
<> | 149:156823d33999 | 123 | return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event); |
<> | 149:156823d33999 | 124 | } |
<> | 149:156823d33999 | 125 | start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event); |
<> | 149:156823d33999 | 126 | return 0; |
<> | 149:156823d33999 | 127 | } |
<> | 149:156823d33999 | 128 | |
<> | 149:156823d33999 | 129 | void SPI::abort_transfer() |
<> | 149:156823d33999 | 130 | { |
<> | 149:156823d33999 | 131 | spi_abort_asynch(&_spi); |
<> | 149:156823d33999 | 132 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 133 | dequeue_transaction(); |
<> | 149:156823d33999 | 134 | #endif |
<> | 149:156823d33999 | 135 | } |
<> | 149:156823d33999 | 136 | |
<> | 149:156823d33999 | 137 | |
<> | 149:156823d33999 | 138 | void SPI::clear_transfer_buffer() |
<> | 149:156823d33999 | 139 | { |
<> | 149:156823d33999 | 140 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 141 | _transaction_buffer.reset(); |
<> | 149:156823d33999 | 142 | #endif |
<> | 149:156823d33999 | 143 | } |
<> | 149:156823d33999 | 144 | |
<> | 149:156823d33999 | 145 | void SPI::abort_all_transfers() |
<> | 149:156823d33999 | 146 | { |
<> | 149:156823d33999 | 147 | clear_transfer_buffer(); |
<> | 149:156823d33999 | 148 | abort_transfer(); |
<> | 149:156823d33999 | 149 | } |
<> | 149:156823d33999 | 150 | |
<> | 149:156823d33999 | 151 | int SPI::set_dma_usage(DMAUsage usage) |
<> | 149:156823d33999 | 152 | { |
<> | 149:156823d33999 | 153 | if (spi_active(&_spi)) { |
<> | 149:156823d33999 | 154 | return -1; |
<> | 149:156823d33999 | 155 | } |
<> | 149:156823d33999 | 156 | _usage = usage; |
<> | 149:156823d33999 | 157 | return 0; |
<> | 149:156823d33999 | 158 | } |
<> | 149:156823d33999 | 159 | |
<> | 149:156823d33999 | 160 | int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 161 | { |
<> | 149:156823d33999 | 162 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 163 | transaction_t t; |
<> | 149:156823d33999 | 164 | |
<> | 149:156823d33999 | 165 | t.tx_buffer = const_cast<void *>(tx_buffer); |
<> | 149:156823d33999 | 166 | t.tx_length = tx_length; |
<> | 149:156823d33999 | 167 | t.rx_buffer = rx_buffer; |
<> | 149:156823d33999 | 168 | t.rx_length = rx_length; |
<> | 149:156823d33999 | 169 | t.event = event; |
<> | 149:156823d33999 | 170 | t.callback = callback; |
<> | 149:156823d33999 | 171 | t.width = bit_width; |
<> | 149:156823d33999 | 172 | Transaction<SPI> transaction(this, t); |
<> | 149:156823d33999 | 173 | if (_transaction_buffer.full()) { |
<> | 149:156823d33999 | 174 | return -1; // the buffer is full |
<> | 149:156823d33999 | 175 | } else { |
<> | 149:156823d33999 | 176 | core_util_critical_section_enter(); |
<> | 149:156823d33999 | 177 | _transaction_buffer.push(transaction); |
<> | 149:156823d33999 | 178 | if (!spi_active(&_spi)) { |
<> | 149:156823d33999 | 179 | dequeue_transaction(); |
<> | 149:156823d33999 | 180 | } |
<> | 149:156823d33999 | 181 | core_util_critical_section_exit(); |
<> | 149:156823d33999 | 182 | return 0; |
<> | 149:156823d33999 | 183 | } |
<> | 149:156823d33999 | 184 | #else |
<> | 149:156823d33999 | 185 | return -1; |
<> | 149:156823d33999 | 186 | #endif |
<> | 149:156823d33999 | 187 | } |
<> | 149:156823d33999 | 188 | |
<> | 149:156823d33999 | 189 | void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event) |
<> | 149:156823d33999 | 190 | { |
Kojto | 169:e3b6fe271b81 | 191 | _acquire(); |
<> | 149:156823d33999 | 192 | _callback = callback; |
<> | 149:156823d33999 | 193 | _irq.callback(&SPI::irq_handler_asynch); |
<> | 149:156823d33999 | 194 | spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage); |
<> | 149:156823d33999 | 195 | } |
<> | 149:156823d33999 | 196 | |
<> | 149:156823d33999 | 197 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 198 | |
<> | 149:156823d33999 | 199 | void SPI::start_transaction(transaction_t *data) |
<> | 149:156823d33999 | 200 | { |
<> | 149:156823d33999 | 201 | start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event); |
<> | 149:156823d33999 | 202 | } |
<> | 149:156823d33999 | 203 | |
<> | 149:156823d33999 | 204 | void SPI::dequeue_transaction() |
<> | 149:156823d33999 | 205 | { |
<> | 149:156823d33999 | 206 | Transaction<SPI> t; |
<> | 149:156823d33999 | 207 | if (_transaction_buffer.pop(t)) { |
<> | 149:156823d33999 | 208 | SPI* obj = t.get_object(); |
<> | 149:156823d33999 | 209 | transaction_t* data = t.get_transaction(); |
<> | 149:156823d33999 | 210 | obj->start_transaction(data); |
<> | 149:156823d33999 | 211 | } |
<> | 149:156823d33999 | 212 | } |
<> | 149:156823d33999 | 213 | |
<> | 149:156823d33999 | 214 | #endif |
<> | 149:156823d33999 | 215 | |
<> | 149:156823d33999 | 216 | void SPI::irq_handler_asynch(void) |
<> | 149:156823d33999 | 217 | { |
<> | 149:156823d33999 | 218 | int event = spi_irq_handler_asynch(&_spi); |
<> | 149:156823d33999 | 219 | if (_callback && (event & SPI_EVENT_ALL)) { |
<> | 149:156823d33999 | 220 | _callback.call(event & SPI_EVENT_ALL); |
<> | 149:156823d33999 | 221 | } |
<> | 149:156823d33999 | 222 | #if TRANSACTION_QUEUE_SIZE_SPI |
<> | 149:156823d33999 | 223 | if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) { |
<> | 149:156823d33999 | 224 | // SPI peripheral is free (event happend), dequeue transaction |
<> | 149:156823d33999 | 225 | dequeue_transaction(); |
<> | 149:156823d33999 | 226 | } |
<> | 149:156823d33999 | 227 | #endif |
<> | 149:156823d33999 | 228 | } |
<> | 149:156823d33999 | 229 | |
<> | 149:156823d33999 | 230 | #endif |
<> | 149:156823d33999 | 231 | |
<> | 149:156823d33999 | 232 | } // namespace mbed |
<> | 149:156823d33999 | 233 | |
<> | 149:156823d33999 | 234 | #endif |