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targets/hal/TARGET_Freescale/TARGET_KLXX/rtc_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 56:05912f50f004
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /* mbed Microcontroller Library |
bogdanm | 0:9b334a45a8ff | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 0:9b334a45a8ff | 3 | * |
bogdanm | 0:9b334a45a8ff | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 0:9b334a45a8ff | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 0:9b334a45a8ff | 6 | * You may obtain a copy of the License at |
bogdanm | 0:9b334a45a8ff | 7 | * |
bogdanm | 0:9b334a45a8ff | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 0:9b334a45a8ff | 9 | * |
bogdanm | 0:9b334a45a8ff | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 0:9b334a45a8ff | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 0:9b334a45a8ff | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 0:9b334a45a8ff | 13 | * See the License for the specific language governing permissions and |
bogdanm | 0:9b334a45a8ff | 14 | * limitations under the License. |
bogdanm | 0:9b334a45a8ff | 15 | */ |
bogdanm | 0:9b334a45a8ff | 16 | #include "rtc_api.h" |
bogdanm | 0:9b334a45a8ff | 17 | #include "PeripheralPins.h" |
bogdanm | 0:9b334a45a8ff | 18 | #include "clk_freqs.h" |
bogdanm | 0:9b334a45a8ff | 19 | |
bogdanm | 0:9b334a45a8ff | 20 | static void init(void) { |
bogdanm | 0:9b334a45a8ff | 21 | // enable RTC clock |
bogdanm | 0:9b334a45a8ff | 22 | SIM->SCGC6 |= SIM_SCGC6_RTC_MASK; |
bogdanm | 0:9b334a45a8ff | 23 | |
bogdanm | 0:9b334a45a8ff | 24 | // select RTC clock source |
bogdanm | 0:9b334a45a8ff | 25 | SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK; |
bogdanm | 0:9b334a45a8ff | 26 | |
bogdanm | 0:9b334a45a8ff | 27 | // Enable external crystal source if clock source is 32KHz |
bogdanm | 0:9b334a45a8ff | 28 | if (extosc_frequency()==32768) { |
bogdanm | 0:9b334a45a8ff | 29 | SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(OSC32KCLK); |
bogdanm | 0:9b334a45a8ff | 30 | } |
bogdanm | 0:9b334a45a8ff | 31 | else{ |
bogdanm | 0:9b334a45a8ff | 32 | // If main clock is NOT 32KHz crystal, use external 32KHz clock source defined in PeripheralPins.c |
bogdanm | 0:9b334a45a8ff | 33 | SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(PinMap_RTC[0].peripheral); |
bogdanm | 0:9b334a45a8ff | 34 | pinmap_pinout(PinMap_RTC[0].pin, PinMap_RTC); //Map RTC clk input (if not NC) |
bogdanm | 0:9b334a45a8ff | 35 | } |
bogdanm | 0:9b334a45a8ff | 36 | } |
bogdanm | 0:9b334a45a8ff | 37 | |
bogdanm | 0:9b334a45a8ff | 38 | void rtc_init(void) { |
bogdanm | 0:9b334a45a8ff | 39 | init(); |
bogdanm | 0:9b334a45a8ff | 40 | |
bogdanm | 0:9b334a45a8ff | 41 | //Configure the TSR. default value: 1 |
bogdanm | 0:9b334a45a8ff | 42 | RTC->TSR = 1; |
bogdanm | 0:9b334a45a8ff | 43 | |
bogdanm | 0:9b334a45a8ff | 44 | if (PinMap_RTC[0].pin == NC) { //Use OSC32K |
bogdanm | 0:9b334a45a8ff | 45 | RTC->CR |= RTC_CR_OSCE_MASK; |
bogdanm | 0:9b334a45a8ff | 46 | //delay for OSCE stabilization |
bogdanm | 0:9b334a45a8ff | 47 | for(int i=0; i<0x1000; i++) __NOP(); |
bogdanm | 0:9b334a45a8ff | 48 | } |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | // enable counter |
bogdanm | 0:9b334a45a8ff | 51 | RTC->SR |= RTC_SR_TCE_MASK; |
bogdanm | 0:9b334a45a8ff | 52 | } |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | void rtc_free(void) { |
bogdanm | 0:9b334a45a8ff | 55 | // [TODO] |
bogdanm | 0:9b334a45a8ff | 56 | } |
bogdanm | 0:9b334a45a8ff | 57 | |
bogdanm | 0:9b334a45a8ff | 58 | /* |
bogdanm | 0:9b334a45a8ff | 59 | * Little check routine to see if the RTC has been enabled |
bogdanm | 0:9b334a45a8ff | 60 | * 0 = Disabled, 1 = Enabled |
bogdanm | 0:9b334a45a8ff | 61 | */ |
bogdanm | 0:9b334a45a8ff | 62 | int rtc_isenabled(void) { |
bogdanm | 0:9b334a45a8ff | 63 | // even if the RTC module is enabled, |
bogdanm | 0:9b334a45a8ff | 64 | // as we use RTC_CLKIN and an external clock, |
bogdanm | 0:9b334a45a8ff | 65 | // we need to reconfigure the pins. That is why we |
bogdanm | 0:9b334a45a8ff | 66 | // call init() if the rtc is enabled |
bogdanm | 0:9b334a45a8ff | 67 | |
bogdanm | 0:9b334a45a8ff | 68 | // if RTC not enabled return 0 |
bogdanm | 0:9b334a45a8ff | 69 | SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; |
bogdanm | 0:9b334a45a8ff | 70 | SIM->SCGC6 |= SIM_SCGC6_RTC_MASK; |
bogdanm | 0:9b334a45a8ff | 71 | if ((RTC->SR & RTC_SR_TCE_MASK) == 0) |
bogdanm | 0:9b334a45a8ff | 72 | return 0; |
bogdanm | 0:9b334a45a8ff | 73 | |
bogdanm | 0:9b334a45a8ff | 74 | init(); |
bogdanm | 0:9b334a45a8ff | 75 | return 1; |
bogdanm | 0:9b334a45a8ff | 76 | } |
bogdanm | 0:9b334a45a8ff | 77 | |
bogdanm | 0:9b334a45a8ff | 78 | time_t rtc_read(void) { |
bogdanm | 0:9b334a45a8ff | 79 | return RTC->TSR; |
bogdanm | 0:9b334a45a8ff | 80 | } |
bogdanm | 0:9b334a45a8ff | 81 | |
bogdanm | 0:9b334a45a8ff | 82 | void rtc_write(time_t t) { |
bogdanm | 0:9b334a45a8ff | 83 | // disable counter |
bogdanm | 0:9b334a45a8ff | 84 | RTC->SR &= ~RTC_SR_TCE_MASK; |
bogdanm | 0:9b334a45a8ff | 85 | |
bogdanm | 0:9b334a45a8ff | 86 | // we do not write 0 into TSR |
bogdanm | 0:9b334a45a8ff | 87 | // to avoid invalid time |
bogdanm | 0:9b334a45a8ff | 88 | if (t == 0) |
bogdanm | 0:9b334a45a8ff | 89 | t = 1; |
bogdanm | 0:9b334a45a8ff | 90 | |
bogdanm | 0:9b334a45a8ff | 91 | // write seconds |
bogdanm | 0:9b334a45a8ff | 92 | RTC->TSR = t; |
bogdanm | 0:9b334a45a8ff | 93 | |
bogdanm | 0:9b334a45a8ff | 94 | // re-enable counter |
bogdanm | 0:9b334a45a8ff | 95 | RTC->SR |= RTC_SR_TCE_MASK; |
bogdanm | 0:9b334a45a8ff | 96 | } |