Amit Gandhi / sensen_copy_2

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targets/hal/TARGET_ARM_SSG/TARGET_MPS2/i2c_api.c@80:bdf1132a57cf, 2016-03-02 (annotated)

Committer:
mbed_official
Date:
Wed Mar 02 14:30:11 2016 +0000
Revision:
80:bdf1132a57cf
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision de3b14ec9234d586b155fd24badc22775489a3dc



Full URL: https://github.com/mbedmicro/mbed/commit/de3b14ec9234d586b155fd24badc22775489a3dc/



latest changes to add arduino support, plus fixes for IOTSS BEID

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "i2c_api.h"
bogdanm 0:9b334a45a8ff 17 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 18 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 19 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 20 #include "SMM_MPS2.h"
bogdanm 0:9b334a45a8ff 21 #include "wait_api.h"
bogdanm 0:9b334a45a8ff 22 #include "fpga.h"
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 // Types
bogdanm 0:9b334a45a8ff 25 #undef FALSE
bogdanm 0:9b334a45a8ff 26 #undef TRUE
bogdanm 0:9b334a45a8ff 27 #define FALSE 0
bogdanm 0:9b334a45a8ff 28 #define TRUE 1
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 // TSC I2C controller
bogdanm 0:9b334a45a8ff 31 #define TSC_I2C_ADDR 0x82
bogdanm 0:9b334a45a8ff 32 // AACI I2C controller I2C address
bogdanm 0:9b334a45a8ff 33 #define AAIC_I2C_ADDR 0x96
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 #define TSC_I2C_CID 0x0811
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // TSC I2C controller registers
bogdanm 0:9b334a45a8ff 38 #define TSC_I2C_CRID 0x00
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 // TSSPCPSR Clock prescale register
bogdanm 0:9b334a45a8ff 42 #define TSSPCPSR_DFLT 0x0002 // Clock prescale (use with SCR)
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 // TSC defaults
bogdanm 0:9b334a45a8ff 45 #define TSC_XOFF 20 // X offset
bogdanm 0:9b334a45a8ff 46 #define TSC_YOFF 20 // Y offset
bogdanm 0:9b334a45a8ff 47 #define TSC_MAXVAL 37000 // 0x0FFF * 10 with TSC to LCD scaling
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 #define TSC_TSU 15 // Setup delay 600nS min
bogdanm 0:9b334a45a8ff 50 #define AAIC_TSU 25 // Setup delay 1000nS min
mbed_official 80:bdf1132a57cf 51 #define SHIELD_TSU 25 // Setup delay 1000nS min
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 static const PinMap PinMap_I2C_SDA[] = {
bogdanm 0:9b334a45a8ff 55 {TSC_SDA, I2C_0, 0},
bogdanm 0:9b334a45a8ff 56 {AUD_SDA, I2C_1, 0},
mbed_official 80:bdf1132a57cf 57 {SHIELD_0_SDA, I2C_2, 0},
mbed_official 80:bdf1132a57cf 58 {SHIELD_1_SDA, I2C_3, 0},
bogdanm 0:9b334a45a8ff 59 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 60 };
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 static const PinMap PinMap_I2C_SCL[] = {
bogdanm 0:9b334a45a8ff 63 {TSC_SCL, I2C_0, 0},
bogdanm 0:9b334a45a8ff 64 {AUD_SCL, I2C_1, 0},
mbed_official 80:bdf1132a57cf 65 {SHIELD_0_SCL, I2C_2, 0},
mbed_official 80:bdf1132a57cf 66 {SHIELD_1_SCL, I2C_3, 0},
bogdanm 0:9b334a45a8ff 67 {NC , NC, 0}
bogdanm 0:9b334a45a8ff 68 };
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 static inline void i2c_send_byte(i2c_t *obj, unsigned char c)
bogdanm 0:9b334a45a8ff 71 {
bogdanm 0:9b334a45a8ff 72 int loop;
mbed_official 80:bdf1132a57cf 73 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 74 case I2C_0:
bogdanm 0:9b334a45a8ff 75 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 76 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 77
mbed_official 80:bdf1132a57cf 78 for (loop = 0; loop < 8; loop++)
mbed_official 80:bdf1132a57cf 79 {
mbed_official 80:bdf1132a57cf 80 if (c & (1 << (7 - loop)))
mbed_official 80:bdf1132a57cf 81 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 82 else
mbed_official 80:bdf1132a57cf 83 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 84
mbed_official 80:bdf1132a57cf 85 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 86 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 87 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 88 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 89 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 90 }
mbed_official 80:bdf1132a57cf 91
mbed_official 80:bdf1132a57cf 92 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 93 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 94 break;
mbed_official 80:bdf1132a57cf 95 case I2C_1:
mbed_official 80:bdf1132a57cf 96 for (loop = 0; loop < 8; loop++) {
mbed_official 80:bdf1132a57cf 97 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 98 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 99 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 100 if (c & (1 << (7 - loop)))
mbed_official 80:bdf1132a57cf 101 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 102 else
mbed_official 80:bdf1132a57cf 103 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 104
mbed_official 80:bdf1132a57cf 105 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 106 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 107 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 108 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 109 }
mbed_official 80:bdf1132a57cf 110
bogdanm 0:9b334a45a8ff 111 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 112 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 113 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 114 break;
mbed_official 80:bdf1132a57cf 115 case I2C_2:
mbed_official 80:bdf1132a57cf 116 case I2C_3:
bogdanm 0:9b334a45a8ff 117 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 118 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 119
mbed_official 80:bdf1132a57cf 120 for (loop = 0; loop < 8; loop++)
mbed_official 80:bdf1132a57cf 121 {
mbed_official 80:bdf1132a57cf 122 if (c & (1 << (7 - loop)))
mbed_official 80:bdf1132a57cf 123 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 124 else
mbed_official 80:bdf1132a57cf 125 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 126
mbed_official 80:bdf1132a57cf 127 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 128 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 129 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 130 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 131 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 132 }
mbed_official 80:bdf1132a57cf 133
mbed_official 80:bdf1132a57cf 134 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 135 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 136 break;
bogdanm 0:9b334a45a8ff 137 }
bogdanm 0:9b334a45a8ff 138 }
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 static inline unsigned char i2c_receive_byte(i2c_t *obj)
bogdanm 0:9b334a45a8ff 141 {
mbed_official 80:bdf1132a57cf 142 int data_receive_byte, loop;
mbed_official 80:bdf1132a57cf 143 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 144 case I2C_0:
mbed_official 80:bdf1132a57cf 145 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 146 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 147
mbed_official 80:bdf1132a57cf 148 data_receive_byte = 0;
mbed_official 80:bdf1132a57cf 149
mbed_official 80:bdf1132a57cf 150 for (loop = 0; loop < 8; loop++)
mbed_official 80:bdf1132a57cf 151 {
mbed_official 80:bdf1132a57cf 152 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 153 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 154 if ((obj->i2c->CONTROL & SDA))
mbed_official 80:bdf1132a57cf 155 data_receive_byte += (1 << (7 - loop));
mbed_official 80:bdf1132a57cf 156
mbed_official 80:bdf1132a57cf 157 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 158 i2c_delay(TSC_TSU);
mbed_official 80:bdf1132a57cf 159 }
mbed_official 80:bdf1132a57cf 160
mbed_official 80:bdf1132a57cf 161 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 162 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 163 break;
mbed_official 80:bdf1132a57cf 164 case I2C_1:
mbed_official 80:bdf1132a57cf 165 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 166 data_receive_byte = 0;
mbed_official 80:bdf1132a57cf 167
mbed_official 80:bdf1132a57cf 168 for (loop = 0; loop < 8; loop++) {
mbed_official 80:bdf1132a57cf 169 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 170 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 171 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 172 obj->i2c->CONTROLS = SCL | SDA;
mbed_official 80:bdf1132a57cf 173 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 174 if ((obj->i2c->CONTROL & SDA))
mbed_official 80:bdf1132a57cf 175 data_receive_byte += (1 << (7 - loop));
mbed_official 80:bdf1132a57cf 176
mbed_official 80:bdf1132a57cf 177 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 178 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 179 }
mbed_official 80:bdf1132a57cf 180
bogdanm 0:9b334a45a8ff 181 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 182 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 183 i2c_delay(AAIC_TSU);
mbed_official 80:bdf1132a57cf 184 break;
mbed_official 80:bdf1132a57cf 185 case I2C_2:
mbed_official 80:bdf1132a57cf 186 case I2C_3:
mbed_official 80:bdf1132a57cf 187 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 188 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 189
mbed_official 80:bdf1132a57cf 190 data_receive_byte = 0;
mbed_official 80:bdf1132a57cf 191
mbed_official 80:bdf1132a57cf 192 for (loop = 0; loop < 8; loop++)
mbed_official 80:bdf1132a57cf 193 {
mbed_official 80:bdf1132a57cf 194 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 195 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 196 if ((obj->i2c->CONTROL & SDA))
mbed_official 80:bdf1132a57cf 197 data_receive_byte += (1 << (7 - loop));
mbed_official 80:bdf1132a57cf 198
mbed_official 80:bdf1132a57cf 199 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 200 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 201 }
mbed_official 80:bdf1132a57cf 202
mbed_official 80:bdf1132a57cf 203 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 204 i2c_delay(SHIELD_TSU);
mbed_official 80:bdf1132a57cf 205 break;
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 return data_receive_byte;
bogdanm 0:9b334a45a8ff 208 }
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 static inline int i2c_receive_ack(i2c_t *obj)
bogdanm 0:9b334a45a8ff 211 {
bogdanm 0:9b334a45a8ff 212 int nack;
mbed_official 80:bdf1132a57cf 213 int delay_value;
mbed_official 80:bdf1132a57cf 214 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 215 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 216 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 217 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 218 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 219 }
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 222 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 223 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 224 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 225 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 226 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 227 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 228 nack = obj->i2c->CONTROL & SDA;
bogdanm 0:9b334a45a8ff 229 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 230 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 231 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 232 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 233 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 234 if(nack==0)
bogdanm 0:9b334a45a8ff 235 return 1;
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 return 0;
bogdanm 0:9b334a45a8ff 238 }
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240
mbed_official 80:bdf1132a57cf 241 static inline void i2c_send_nack(i2c_t *obj)
bogdanm 0:9b334a45a8ff 242 {
mbed_official 80:bdf1132a57cf 243 int delay_value;
mbed_official 80:bdf1132a57cf 244 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 245 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 246 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 247 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 248 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 249 }
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 252 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 253 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 254 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 255 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 256 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 257 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 258 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 259 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 260 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 261 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 }
bogdanm 0:9b334a45a8ff 264
mbed_official 80:bdf1132a57cf 265 static inline void i2c_send_ack(i2c_t *obj)
mbed_official 80:bdf1132a57cf 266 {
mbed_official 80:bdf1132a57cf 267 int delay_value;
mbed_official 80:bdf1132a57cf 268 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 269 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 270 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 271 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 272 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 273 }
bogdanm 0:9b334a45a8ff 274
mbed_official 80:bdf1132a57cf 275 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 276 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 277 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 278 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 279 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 280 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 281 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 282
mbed_official 80:bdf1132a57cf 283 }
mbed_official 80:bdf1132a57cf 284
mbed_official 80:bdf1132a57cf 285 void i2c_init(i2c_t *obj, PinName sda, PinName scl)
mbed_official 80:bdf1132a57cf 286 {
bogdanm 0:9b334a45a8ff 287 // determine the SPI to use
bogdanm 0:9b334a45a8ff 288 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 289 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 0:9b334a45a8ff 290 obj->i2c = (MPS2_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 if ((int)obj->i2c == NC) {
bogdanm 0:9b334a45a8ff 293 error("I2C pin mapping failed");
bogdanm 0:9b334a45a8ff 294 }
mbed_official 80:bdf1132a57cf 295
bogdanm 0:9b334a45a8ff 296 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 297 pinmap_pinout(scl, PinMap_I2C_SCL);
mbed_official 80:bdf1132a57cf 298
mbed_official 80:bdf1132a57cf 299 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 300 case I2C_2: CMSDK_GPIO0->ALTFUNCSET |= 0x8020; break;
mbed_official 80:bdf1132a57cf 301 case I2C_3: CMSDK_GPIO1->ALTFUNCSET |= 0x8000;
mbed_official 80:bdf1132a57cf 302 CMSDK_GPIO2->ALTFUNCSET |= 0x0200; break;
mbed_official 80:bdf1132a57cf 303 }
mbed_official 80:bdf1132a57cf 304
mbed_official 80:bdf1132a57cf 305
bogdanm 0:9b334a45a8ff 306 }
bogdanm 0:9b334a45a8ff 307
mbed_official 80:bdf1132a57cf 308 int i2c_start(i2c_t *obj)
mbed_official 80:bdf1132a57cf 309 {
mbed_official 80:bdf1132a57cf 310 int delay_value;
mbed_official 80:bdf1132a57cf 311 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 312 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 313 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 314 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 315 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 316 }
mbed_official 80:bdf1132a57cf 317
mbed_official 80:bdf1132a57cf 318 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 319 obj->i2c->CONTROLS = SDA | SCL;
mbed_official 80:bdf1132a57cf 320 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 321 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 322 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 return 0;
bogdanm 0:9b334a45a8ff 325 }
bogdanm 0:9b334a45a8ff 326
mbed_official 80:bdf1132a57cf 327 int i2c_start_tsc(i2c_t *obj)
mbed_official 80:bdf1132a57cf 328 {
mbed_official 80:bdf1132a57cf 329 int delay_value;
mbed_official 80:bdf1132a57cf 330 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 331 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 332 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 333 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 334 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 335 }
mbed_official 80:bdf1132a57cf 336
mbed_official 80:bdf1132a57cf 337 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 338 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 339 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 340 obj->i2c->CONTROLC = SCL;
mbed_official 80:bdf1132a57cf 341 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 return 0;
bogdanm 0:9b334a45a8ff 344 }
bogdanm 0:9b334a45a8ff 345
mbed_official 80:bdf1132a57cf 346 int i2c_stop(i2c_t *obj)
mbed_official 80:bdf1132a57cf 347 {
mbed_official 80:bdf1132a57cf 348 int delay_value;
mbed_official 80:bdf1132a57cf 349 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 350 case I2C_0: delay_value = TSC_TSU; break;
mbed_official 80:bdf1132a57cf 351 case I2C_1: delay_value = AAIC_TSU; break;
mbed_official 80:bdf1132a57cf 352 case I2C_2: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 353 case I2C_3: delay_value = SHIELD_TSU; break;
mbed_official 80:bdf1132a57cf 354 }
mbed_official 80:bdf1132a57cf 355 // Actual stop bit
mbed_official 80:bdf1132a57cf 356 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 357 obj->i2c->CONTROLC = SDA;
mbed_official 80:bdf1132a57cf 358 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 359 obj->i2c->CONTROLS = SCL;
mbed_official 80:bdf1132a57cf 360 i2c_delay(delay_value);
mbed_official 80:bdf1132a57cf 361 obj->i2c->CONTROLS = SDA;
mbed_official 80:bdf1132a57cf 362 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 363
mbed_official 80:bdf1132a57cf 364 return 0;
bogdanm 0:9b334a45a8ff 365 }
bogdanm 0:9b334a45a8ff 366
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371
mbed_official 80:bdf1132a57cf 372 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
mbed_official 80:bdf1132a57cf 373 {
mbed_official 80:bdf1132a57cf 374 unsigned int loop, rxdata;
mbed_official 80:bdf1132a57cf 375 int sadr, ack, bytes_read;
mbed_official 80:bdf1132a57cf 376 rxdata=0;
mbed_official 80:bdf1132a57cf 377 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 378 case I2C_0:
mbed_official 80:bdf1132a57cf 379 sadr = TSC_I2C_ADDR;
mbed_official 80:bdf1132a57cf 380 break;
mbed_official 80:bdf1132a57cf 381 case I2C_1:
mbed_official 80:bdf1132a57cf 382 sadr = AAIC_I2C_ADDR;
mbed_official 80:bdf1132a57cf 383 break;
mbed_official 80:bdf1132a57cf 384 case I2C_2:
mbed_official 80:bdf1132a57cf 385 case I2C_3:
mbed_official 80:bdf1132a57cf 386 sadr = address; //LM75_I2C_ADDR; or MMA7660_I2C_ADDR;
mbed_official 80:bdf1132a57cf 387 break;
mbed_official 80:bdf1132a57cf 388 }
mbed_official 80:bdf1132a57cf 389 bytes_read = 0;
bogdanm 0:9b334a45a8ff 390 // Start bit
mbed_official 80:bdf1132a57cf 391 i2c_start(obj);
mbed_official 80:bdf1132a57cf 392
mbed_official 80:bdf1132a57cf 393 switch ((int)obj->i2c) {
mbed_official 80:bdf1132a57cf 394 case I2C_0:
mbed_official 80:bdf1132a57cf 395 // Set serial and register address
mbed_official 80:bdf1132a57cf 396 i2c_send_byte(obj,sadr);
mbed_official 80:bdf1132a57cf 397 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 398 i2c_send_byte(obj, address);
mbed_official 80:bdf1132a57cf 399 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 400
mbed_official 80:bdf1132a57cf 401 // Stop bit
mbed_official 80:bdf1132a57cf 402 i2c_stop(obj);
mbed_official 80:bdf1132a57cf 403
mbed_official 80:bdf1132a57cf 404 // Start bit
mbed_official 80:bdf1132a57cf 405 i2c_start_tsc(obj);
mbed_official 80:bdf1132a57cf 406
mbed_official 80:bdf1132a57cf 407 // Read from I2C address
mbed_official 80:bdf1132a57cf 408 i2c_send_byte(obj,sadr | 1);
mbed_official 80:bdf1132a57cf 409 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 410
mbed_official 80:bdf1132a57cf 411 rxdata = (i2c_receive_byte(obj) & 0xFF);
mbed_official 80:bdf1132a57cf 412 data[((length-1)-bytes_read)] = (char)rxdata;
mbed_official 80:bdf1132a57cf 413 bytes_read++;
mbed_official 80:bdf1132a57cf 414 // Read multiple bytes
mbed_official 80:bdf1132a57cf 415 if ((length > 1) && (length < 5))
mbed_official 80:bdf1132a57cf 416 {
mbed_official 80:bdf1132a57cf 417 for (loop = 1; loop <= (length - 1); loop++)
mbed_official 80:bdf1132a57cf 418 {
mbed_official 80:bdf1132a57cf 419 // Send ACK
mbed_official 80:bdf1132a57cf 420 i2c_send_ack(obj);
mbed_official 80:bdf1132a57cf 421
mbed_official 80:bdf1132a57cf 422 // Next byte
mbed_official 80:bdf1132a57cf 423 //rxdata = ((rxdata << 8) & 0xFFFFFF00);
mbed_official 80:bdf1132a57cf 424 //rxdata |= (i2c_receive_byte(obj) & 0xFF);
mbed_official 80:bdf1132a57cf 425 rxdata = i2c_receive_byte(obj);
mbed_official 80:bdf1132a57cf 426 data[(length-1)-bytes_read] = (char)rxdata;
mbed_official 80:bdf1132a57cf 427 bytes_read++;
mbed_official 80:bdf1132a57cf 428
mbed_official 80:bdf1132a57cf 429 }
mbed_official 80:bdf1132a57cf 430 }
mbed_official 80:bdf1132a57cf 431 break;
mbed_official 80:bdf1132a57cf 432 case I2C_1:
mbed_official 80:bdf1132a57cf 433 // Set serial and register address
mbed_official 80:bdf1132a57cf 434 i2c_send_byte(obj,sadr);
mbed_official 80:bdf1132a57cf 435 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 436 i2c_send_byte(obj, address);
mbed_official 80:bdf1132a57cf 437 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 438
mbed_official 80:bdf1132a57cf 439 // Stop bit
mbed_official 80:bdf1132a57cf 440 i2c_stop(obj);
mbed_official 80:bdf1132a57cf 441
mbed_official 80:bdf1132a57cf 442 // Start bit
mbed_official 80:bdf1132a57cf 443 i2c_start_tsc(obj);
mbed_official 80:bdf1132a57cf 444 // Fall through to read data
mbed_official 80:bdf1132a57cf 445 case I2C_2:
mbed_official 80:bdf1132a57cf 446 case I2C_3:
mbed_official 80:bdf1132a57cf 447 // Read from preset register address pointer
mbed_official 80:bdf1132a57cf 448 i2c_send_byte(obj,sadr | 1);
mbed_official 80:bdf1132a57cf 449 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 450
mbed_official 80:bdf1132a57cf 451 rxdata = i2c_receive_byte(obj);
mbed_official 80:bdf1132a57cf 452 data[bytes_read] = (char)rxdata;
mbed_official 80:bdf1132a57cf 453 bytes_read++;
mbed_official 80:bdf1132a57cf 454 // Read multiple bytes
mbed_official 80:bdf1132a57cf 455 if ((length > 1) && (length < 5))
mbed_official 80:bdf1132a57cf 456 {
mbed_official 80:bdf1132a57cf 457 for (loop = 1; loop <= (length - 1); loop++)
mbed_official 80:bdf1132a57cf 458 {
mbed_official 80:bdf1132a57cf 459 // Send ACK
mbed_official 80:bdf1132a57cf 460 i2c_send_ack(obj);
mbed_official 80:bdf1132a57cf 461
mbed_official 80:bdf1132a57cf 462 // Next byte
mbed_official 80:bdf1132a57cf 463 rxdata = i2c_receive_byte(obj);
mbed_official 80:bdf1132a57cf 464 data[loop] = (char)rxdata;
mbed_official 80:bdf1132a57cf 465 bytes_read++;
mbed_official 80:bdf1132a57cf 466
mbed_official 80:bdf1132a57cf 467 }
mbed_official 80:bdf1132a57cf 468 }
mbed_official 80:bdf1132a57cf 469 break;
bogdanm 0:9b334a45a8ff 470 }
mbed_official 80:bdf1132a57cf 471 i2c_send_nack(obj);
bogdanm 0:9b334a45a8ff 472
mbed_official 80:bdf1132a57cf 473 i2c_stop(obj); // Actual stop bit
bogdanm 0:9b334a45a8ff 474
bogdanm 0:9b334a45a8ff 475 return bytes_read;
bogdanm 0:9b334a45a8ff 476 }
bogdanm 0:9b334a45a8ff 477
mbed_official 80:bdf1132a57cf 478 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
mbed_official 80:bdf1132a57cf 479 {
mbed_official 80:bdf1132a57cf 480 int ack=0;
mbed_official 80:bdf1132a57cf 481 int sadr;
mbed_official 80:bdf1132a57cf 482 char * ptr;
mbed_official 80:bdf1132a57cf 483 char addr;
mbed_official 80:bdf1132a57cf 484 ptr = (char*)data;
mbed_official 80:bdf1132a57cf 485 switch ((int)obj->i2c)
mbed_official 80:bdf1132a57cf 486 {
mbed_official 80:bdf1132a57cf 487 case I2C_0:
mbed_official 80:bdf1132a57cf 488 sadr = TSC_I2C_ADDR;
mbed_official 80:bdf1132a57cf 489 addr = address;
mbed_official 80:bdf1132a57cf 490 break;
mbed_official 80:bdf1132a57cf 491 case I2C_1:
mbed_official 80:bdf1132a57cf 492 sadr = AAIC_I2C_ADDR;
mbed_official 80:bdf1132a57cf 493 addr = address;
mbed_official 80:bdf1132a57cf 494 break;
mbed_official 80:bdf1132a57cf 495 case I2C_2:
mbed_official 80:bdf1132a57cf 496 case I2C_3:
mbed_official 80:bdf1132a57cf 497 sadr = address; //LM75_I2C_ADDR or MMA7660_I2C_ADDR;
mbed_official 80:bdf1132a57cf 498 addr = *ptr++;
mbed_official 80:bdf1132a57cf 499 break;
mbed_official 80:bdf1132a57cf 500 }
mbed_official 80:bdf1132a57cf 501
mbed_official 80:bdf1132a57cf 502 // printf("adr = %x, reg = %x\n",sadr, address);
mbed_official 80:bdf1132a57cf 503 i2c_start(obj);
bogdanm 0:9b334a45a8ff 504
mbed_official 80:bdf1132a57cf 505 // Set serial and register address
mbed_official 80:bdf1132a57cf 506 i2c_send_byte(obj,sadr);
mbed_official 80:bdf1132a57cf 507 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 508 i2c_send_byte(obj, addr);
mbed_official 80:bdf1132a57cf 509 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 510
mbed_official 80:bdf1132a57cf 511 for(int i = 1; i<length; i++)
mbed_official 80:bdf1132a57cf 512 {
mbed_official 80:bdf1132a57cf 513 i2c_send_byte(obj, *ptr++);
mbed_official 80:bdf1132a57cf 514 ack += i2c_receive_ack(obj);
mbed_official 80:bdf1132a57cf 515 }
mbed_official 80:bdf1132a57cf 516
mbed_official 80:bdf1132a57cf 517 i2c_stop(obj);
mbed_official 80:bdf1132a57cf 518 if(ack==3) { return 1; }
mbed_official 80:bdf1132a57cf 519 else{ return 0; }
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 }
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 void i2c_reset(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 524 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 525 }
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 0:9b334a45a8ff 528 return 0;
bogdanm 0:9b334a45a8ff 529 }
bogdanm 0:9b334a45a8ff 530
bogdanm 0:9b334a45a8ff 531 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 0:9b334a45a8ff 532 return 0;
bogdanm 0:9b334a45a8ff 533 }