Amit Gandhi / sensen_copy_2

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targets/hal/TARGET_ARM_SSG/TARGET_MPS2/i2c_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
80:bdf1132a57cf
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2015 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "i2c_api.h"
bogdanm 0:9b334a45a8ff 17 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 18 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 19 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 20 #include "SMM_MPS2.h"
bogdanm 0:9b334a45a8ff 21 #include "wait_api.h"
bogdanm 0:9b334a45a8ff 22 #include "fpga.h"
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 // Types
bogdanm 0:9b334a45a8ff 25 #undef FALSE
bogdanm 0:9b334a45a8ff 26 #undef TRUE
bogdanm 0:9b334a45a8ff 27 #define FALSE 0
bogdanm 0:9b334a45a8ff 28 #define TRUE 1
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 // TSC I2C controller
bogdanm 0:9b334a45a8ff 31 #define TSC_I2C_ADDR 0x82
bogdanm 0:9b334a45a8ff 32 // AACI I2C controller I2C address
bogdanm 0:9b334a45a8ff 33 #define AAIC_I2C_ADDR 0x96
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 #define TSC_I2C_CID 0x0811
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 // TSC I2C controller registers
bogdanm 0:9b334a45a8ff 38 #define TSC_I2C_CRID 0x00
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 // TSSPCPSR Clock prescale register
bogdanm 0:9b334a45a8ff 42 #define TSSPCPSR_DFLT 0x0002 // Clock prescale (use with SCR)
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 // TSC defaults
bogdanm 0:9b334a45a8ff 45 #define TSC_XOFF 20 // X offset
bogdanm 0:9b334a45a8ff 46 #define TSC_YOFF 20 // Y offset
bogdanm 0:9b334a45a8ff 47 #define TSC_MAXVAL 37000 // 0x0FFF * 10 with TSC to LCD scaling
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 #define TSC_TSU 15 // Setup delay 600nS min
bogdanm 0:9b334a45a8ff 50 #define AAIC_TSU 25 // Setup delay 1000nS min
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 static const PinMap PinMap_I2C_SDA[] = {
bogdanm 0:9b334a45a8ff 54 {TSC_SDA, I2C_0, 0},
bogdanm 0:9b334a45a8ff 55 {AUD_SDA, I2C_1, 0},
bogdanm 0:9b334a45a8ff 56 // {EXP_SDA, I2C_2, 0}, //only used in extended version
bogdanm 0:9b334a45a8ff 57 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 58 };
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 static const PinMap PinMap_I2C_SCL[] = {
bogdanm 0:9b334a45a8ff 61 {TSC_SCL, I2C_0, 0},
bogdanm 0:9b334a45a8ff 62 {AUD_SCL, I2C_1, 0},
bogdanm 0:9b334a45a8ff 63 // {EXP_SCL, I2C_2, 0}, //only used in extended version
bogdanm 0:9b334a45a8ff 64 {NC , NC, 0}
bogdanm 0:9b334a45a8ff 65 };
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 static inline void i2c_send_byte(i2c_t *obj, unsigned char c)
bogdanm 0:9b334a45a8ff 68 {
bogdanm 0:9b334a45a8ff 69 int loop;
bogdanm 0:9b334a45a8ff 70 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 71 case I2C_0:
bogdanm 0:9b334a45a8ff 72 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 73 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 for (loop = 0; loop < 8; loop++)
bogdanm 0:9b334a45a8ff 76 {
bogdanm 0:9b334a45a8ff 77 if (c & (1 << (7 - loop)))
bogdanm 0:9b334a45a8ff 78 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 79 else
bogdanm 0:9b334a45a8ff 80 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 81 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 82 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 83 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 84 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 85 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 86 }
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 89 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 90 break;
bogdanm 0:9b334a45a8ff 91 case I2C_1:
bogdanm 0:9b334a45a8ff 92 for (loop = 0; loop < 8; loop++) {
bogdanm 0:9b334a45a8ff 93 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 94 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 95 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 96 if (c & (1 << (7 - loop)))
bogdanm 0:9b334a45a8ff 97 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 98 else
bogdanm 0:9b334a45a8ff 99 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 100 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 101 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 102 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 103 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 104 }
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 107 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 108 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 109 break;
bogdanm 0:9b334a45a8ff 110 }
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 static inline unsigned char i2c_receive_byte(i2c_t *obj)
bogdanm 0:9b334a45a8ff 114 {
bogdanm 0:9b334a45a8ff 115 int data_receive_byte, loop;
bogdanm 0:9b334a45a8ff 116 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 117 case I2C_0:
bogdanm 0:9b334a45a8ff 118 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 119 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 data_receive_byte = 0;
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 for (loop = 0; loop < 8; loop++)
bogdanm 0:9b334a45a8ff 124 {
bogdanm 0:9b334a45a8ff 125 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 126 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 127 if ((obj->i2c->CONTROL & SDA))
bogdanm 0:9b334a45a8ff 128 data_receive_byte += (1 << (7 - loop));
bogdanm 0:9b334a45a8ff 129 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 130 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 131 }
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 134 i2c_delay(TSC_TSU);
bogdanm 0:9b334a45a8ff 135 break;
bogdanm 0:9b334a45a8ff 136 case I2C_1:
bogdanm 0:9b334a45a8ff 137 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 138 data_receive_byte = 0;
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 for (loop = 0; loop < 8; loop++) {
bogdanm 0:9b334a45a8ff 141 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 142 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 143 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 144 obj->i2c->CONTROLS = SCL | SDA;
bogdanm 0:9b334a45a8ff 145 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 146 if ((obj->i2c->CONTROL & SDA))
bogdanm 0:9b334a45a8ff 147 data_receive_byte += (1 << (7 - loop));
bogdanm 0:9b334a45a8ff 148 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 149 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 150 }
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 153 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 154 i2c_delay(AAIC_TSU);
bogdanm 0:9b334a45a8ff 155 break;
bogdanm 0:9b334a45a8ff 156 }
bogdanm 0:9b334a45a8ff 157 return data_receive_byte;
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 static inline int i2c_receive_ack(i2c_t *obj)
bogdanm 0:9b334a45a8ff 161 {
bogdanm 0:9b334a45a8ff 162 int nack;
bogdanm 0:9b334a45a8ff 163 int delay_value;
bogdanm 0:9b334a45a8ff 164 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 165 case I2C_0: delay_value = TSC_TSU; break;
bogdanm 0:9b334a45a8ff 166 case I2C_1: delay_value = AAIC_TSU; break;
bogdanm 0:9b334a45a8ff 167 }
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 170 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 171 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 172 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 173 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 174 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 175 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 176 nack = obj->i2c->CONTROL & SDA;
bogdanm 0:9b334a45a8ff 177 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 178 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 179 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 180 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 181 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 182 if(nack==0)
bogdanm 0:9b334a45a8ff 183 return 1;
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 return 0;
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 static inline void i2c_send_ack(i2c_t *obj)
bogdanm 0:9b334a45a8ff 190 {
bogdanm 0:9b334a45a8ff 191 int delay_value;
bogdanm 0:9b334a45a8ff 192 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 193 case I2C_0: delay_value = TSC_TSU; break;
bogdanm 0:9b334a45a8ff 194 case I2C_1: delay_value = AAIC_TSU; break;
bogdanm 0:9b334a45a8ff 195 }
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 198 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 199 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 200 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 201 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 202 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 203 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 204 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 205 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 206 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 207 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 }
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 // determine the SPI to use
bogdanm 0:9b334a45a8ff 216 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 217 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 0:9b334a45a8ff 218 obj->i2c = (MPS2_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 if ((int)obj->i2c == NC) {
bogdanm 0:9b334a45a8ff 221 error("I2C pin mapping failed");
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 0:9b334a45a8ff 225 pinmap_pinout(scl, PinMap_I2C_SCL);
bogdanm 0:9b334a45a8ff 226 }
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 int i2c_start(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 int delay_value;
bogdanm 0:9b334a45a8ff 231 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 232 case I2C_0: delay_value = TSC_TSU; break;
bogdanm 0:9b334a45a8ff 233 case I2C_1: delay_value = AAIC_TSU; break;
bogdanm 0:9b334a45a8ff 234 }
bogdanm 0:9b334a45a8ff 235 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 236 obj->i2c->CONTROLS = SDA | SCL;
bogdanm 0:9b334a45a8ff 237 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 238 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 239 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 return 0;
bogdanm 0:9b334a45a8ff 244 }
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 int i2c_start_tsc(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 int delay_value;
bogdanm 0:9b334a45a8ff 249 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 250 case I2C_0: delay_value = TSC_TSU; break;
bogdanm 0:9b334a45a8ff 251 case I2C_1: delay_value = AAIC_TSU; break;
bogdanm 0:9b334a45a8ff 252 }
bogdanm 0:9b334a45a8ff 253 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 254 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 255 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 256 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 257 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 return 0;
bogdanm 0:9b334a45a8ff 260 }
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 int i2c_stop(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 int delay_value;
bogdanm 0:9b334a45a8ff 265 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 266 case I2C_0: delay_value = TSC_TSU; break;
bogdanm 0:9b334a45a8ff 267 case I2C_1: delay_value = AAIC_TSU; break;
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269 // Actual stop bit
bogdanm 0:9b334a45a8ff 270 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 271 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 272 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 273 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 274 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 275 obj->i2c->CONTROLS = SDA;
bogdanm 0:9b334a45a8ff 276 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 return 0;
bogdanm 0:9b334a45a8ff 279 }
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 0:9b334a45a8ff 284 }
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 0:9b334a45a8ff 287 unsigned int loop, rxdata;
bogdanm 0:9b334a45a8ff 288 int delay_value, sadr, ack, bytes_read;
bogdanm 0:9b334a45a8ff 289 rxdata=0;
bogdanm 0:9b334a45a8ff 290 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 291 case I2C_0:
bogdanm 0:9b334a45a8ff 292 delay_value = TSC_TSU;
bogdanm 0:9b334a45a8ff 293 sadr = TSC_I2C_ADDR;
bogdanm 0:9b334a45a8ff 294 break;
bogdanm 0:9b334a45a8ff 295 case I2C_1:
bogdanm 0:9b334a45a8ff 296 delay_value = AAIC_TSU;
bogdanm 0:9b334a45a8ff 297 sadr = AAIC_I2C_ADDR;
bogdanm 0:9b334a45a8ff 298 break;
bogdanm 0:9b334a45a8ff 299 }
bogdanm 0:9b334a45a8ff 300 // Start bit
bogdanm 0:9b334a45a8ff 301 i2c_start(obj);
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 // Set serial and register address
bogdanm 0:9b334a45a8ff 304 i2c_send_byte(obj,sadr);
bogdanm 0:9b334a45a8ff 305 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 306 i2c_send_byte(obj, address);
bogdanm 0:9b334a45a8ff 307 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 // Stop bit
bogdanm 0:9b334a45a8ff 310 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 // Start bit
bogdanm 0:9b334a45a8ff 313 i2c_start_tsc(obj);
bogdanm 0:9b334a45a8ff 314
bogdanm 0:9b334a45a8ff 315 // Read from serial address
bogdanm 0:9b334a45a8ff 316 i2c_send_byte(obj,sadr | 1);
bogdanm 0:9b334a45a8ff 317 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 318 bytes_read = 0;
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 321 case I2C_0:
bogdanm 0:9b334a45a8ff 322 rxdata = (i2c_receive_byte(obj) & 0xFF);
bogdanm 0:9b334a45a8ff 323 data[((length-1)-bytes_read)] = (char)rxdata;
bogdanm 0:9b334a45a8ff 324 bytes_read++;
bogdanm 0:9b334a45a8ff 325 // Read multiple bytes
bogdanm 0:9b334a45a8ff 326 if ((length > 1) && (length < 5))
bogdanm 0:9b334a45a8ff 327 {
bogdanm 0:9b334a45a8ff 328 for (loop = 1; loop <= (length - 1); loop++)
bogdanm 0:9b334a45a8ff 329 {
bogdanm 0:9b334a45a8ff 330 // Send ACK
bogdanm 0:9b334a45a8ff 331 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 332 obj->i2c->CONTROLC = SDA;
bogdanm 0:9b334a45a8ff 333 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 334 obj->i2c->CONTROLS = SCL;
bogdanm 0:9b334a45a8ff 335 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 336 obj->i2c->CONTROLC = SCL;
bogdanm 0:9b334a45a8ff 337 i2c_delay(delay_value);
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 rxdata = i2c_receive_byte(obj);
bogdanm 0:9b334a45a8ff 340 data[(length-1)-bytes_read] = (char)rxdata;
bogdanm 0:9b334a45a8ff 341 bytes_read++;
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344 }
bogdanm 0:9b334a45a8ff 345 break;
bogdanm 0:9b334a45a8ff 346 case I2C_1:
bogdanm 0:9b334a45a8ff 347 rxdata = i2c_receive_byte(obj);
bogdanm 0:9b334a45a8ff 348 data[bytes_read] = (char)rxdata;
bogdanm 0:9b334a45a8ff 349 bytes_read++;
bogdanm 0:9b334a45a8ff 350 break;
bogdanm 0:9b334a45a8ff 351 }
bogdanm 0:9b334a45a8ff 352 i2c_send_ack(obj);
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 // Actual stop bit
bogdanm 0:9b334a45a8ff 355 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 return bytes_read;
bogdanm 0:9b334a45a8ff 358 }
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 0:9b334a45a8ff 361 int ack=0;
bogdanm 0:9b334a45a8ff 362 int sadr;
bogdanm 0:9b334a45a8ff 363 switch ((int)obj->i2c) {
bogdanm 0:9b334a45a8ff 364 case I2C_0: sadr = TSC_I2C_ADDR; break;
bogdanm 0:9b334a45a8ff 365 case I2C_1: sadr = AAIC_I2C_ADDR; break;
bogdanm 0:9b334a45a8ff 366 }
bogdanm 0:9b334a45a8ff 367 for(int i = 1; i<=length; i++)
bogdanm 0:9b334a45a8ff 368 {
bogdanm 0:9b334a45a8ff 369 i2c_start(obj);
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 // Set serial and register address
bogdanm 0:9b334a45a8ff 372 i2c_send_byte(obj,sadr);
bogdanm 0:9b334a45a8ff 373 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 374 i2c_send_byte(obj, address);
bogdanm 0:9b334a45a8ff 375 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 376 i2c_send_byte(obj, *data);
bogdanm 0:9b334a45a8ff 377 ack += i2c_receive_ack(obj);
bogdanm 0:9b334a45a8ff 378 }
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 381 if(ack==3) { return 1; }
bogdanm 0:9b334a45a8ff 382 else{ return 0; }
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 void i2c_reset(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 387 i2c_stop(obj);
bogdanm 0:9b334a45a8ff 388 }
bogdanm 0:9b334a45a8ff 389
bogdanm 0:9b334a45a8ff 390 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 0:9b334a45a8ff 391 return 0;
bogdanm 0:9b334a45a8ff 392 }
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 0:9b334a45a8ff 395 return 0;
bogdanm 0:9b334a45a8ff 396 }
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
bogdanm 0:9b334a45a8ff 399 }
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 int i2c_slave_receive(i2c_t *obj) {
bogdanm 0:9b334a45a8ff 402 return 0;
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405 int i2c_slave_read(i2c_t *obj, char *data, int length) {
bogdanm 0:9b334a45a8ff 406 return 0;
bogdanm 0:9b334a45a8ff 407 }
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
bogdanm 0:9b334a45a8ff 410 return 0;
bogdanm 0:9b334a45a8ff 411 }
bogdanm 0:9b334a45a8ff 412
bogdanm 0:9b334a45a8ff 413 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415