Nordic stack and drivers for the mbed BLE API
Fork of nRF51822 by
TARGET_MCU_NRF51822/sdk/source/drivers_nrf/hal/nrf_wdt.h@638:c90ae1400bf2, 2016-09-14 (annotated)
- Committer:
- Vincent Coubard
- Date:
- Wed Sep 14 14:39:43 2016 +0100
- Revision:
- 638:c90ae1400bf2
Sync with bdab10dc0f90748b6989c8b577771bb403ca6bd8 from ARMmbed/mbed-os.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Vincent Coubard |
638:c90ae1400bf2 | 1 | /* |
Vincent Coubard |
638:c90ae1400bf2 | 2 | * Copyright (c) Nordic Semiconductor ASA |
Vincent Coubard |
638:c90ae1400bf2 | 3 | * All rights reserved. |
Vincent Coubard |
638:c90ae1400bf2 | 4 | * |
Vincent Coubard |
638:c90ae1400bf2 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
Vincent Coubard |
638:c90ae1400bf2 | 6 | * are permitted provided that the following conditions are met: |
Vincent Coubard |
638:c90ae1400bf2 | 7 | * |
Vincent Coubard |
638:c90ae1400bf2 | 8 | * 1. Redistributions of source code must retain the above copyright notice, this |
Vincent Coubard |
638:c90ae1400bf2 | 9 | * list of conditions and the following disclaimer. |
Vincent Coubard |
638:c90ae1400bf2 | 10 | * |
Vincent Coubard |
638:c90ae1400bf2 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, this |
Vincent Coubard |
638:c90ae1400bf2 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
Vincent Coubard |
638:c90ae1400bf2 | 13 | * other materials provided with the distribution. |
Vincent Coubard |
638:c90ae1400bf2 | 14 | * |
Vincent Coubard |
638:c90ae1400bf2 | 15 | * 3. Neither the name of Nordic Semiconductor ASA nor the names of other |
Vincent Coubard |
638:c90ae1400bf2 | 16 | * contributors to this software may be used to endorse or promote products |
Vincent Coubard |
638:c90ae1400bf2 | 17 | * derived from this software without specific prior written permission. |
Vincent Coubard |
638:c90ae1400bf2 | 18 | * |
Vincent Coubard |
638:c90ae1400bf2 | 19 | * |
Vincent Coubard |
638:c90ae1400bf2 | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Vincent Coubard |
638:c90ae1400bf2 | 21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Vincent Coubard |
638:c90ae1400bf2 | 22 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Vincent Coubard |
638:c90ae1400bf2 | 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Vincent Coubard |
638:c90ae1400bf2 | 24 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Vincent Coubard |
638:c90ae1400bf2 | 25 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Vincent Coubard |
638:c90ae1400bf2 | 26 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Vincent Coubard |
638:c90ae1400bf2 | 27 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Vincent Coubard |
638:c90ae1400bf2 | 28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Vincent Coubard |
638:c90ae1400bf2 | 29 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Vincent Coubard |
638:c90ae1400bf2 | 30 | * |
Vincent Coubard |
638:c90ae1400bf2 | 31 | */ |
Vincent Coubard |
638:c90ae1400bf2 | 32 | |
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638:c90ae1400bf2 | 33 | /** |
Vincent Coubard |
638:c90ae1400bf2 | 34 | * @defgroup nrf_wdt_hal WDT HAL |
Vincent Coubard |
638:c90ae1400bf2 | 35 | * @{ |
Vincent Coubard |
638:c90ae1400bf2 | 36 | * @ingroup nrf_wdt |
Vincent Coubard |
638:c90ae1400bf2 | 37 | * |
Vincent Coubard |
638:c90ae1400bf2 | 38 | * @brief Hardware access layer for accessing the watchdog timer (WDT) peripheral. |
Vincent Coubard |
638:c90ae1400bf2 | 39 | */ |
Vincent Coubard |
638:c90ae1400bf2 | 40 | |
Vincent Coubard |
638:c90ae1400bf2 | 41 | #ifndef NRF_WDT_H__ |
Vincent Coubard |
638:c90ae1400bf2 | 42 | #define NRF_WDT_H__ |
Vincent Coubard |
638:c90ae1400bf2 | 43 | |
Vincent Coubard |
638:c90ae1400bf2 | 44 | #include <stddef.h> |
Vincent Coubard |
638:c90ae1400bf2 | 45 | #include <stdbool.h> |
Vincent Coubard |
638:c90ae1400bf2 | 46 | #include <stdint.h> |
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638:c90ae1400bf2 | 47 | |
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638:c90ae1400bf2 | 48 | #include "nrf.h" |
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638:c90ae1400bf2 | 49 | |
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638:c90ae1400bf2 | 50 | #define NRF_WDT_CHANNEL_NUMBER 0x8UL |
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638:c90ae1400bf2 | 51 | #define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/ |
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638:c90ae1400bf2 | 52 | |
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638:c90ae1400bf2 | 53 | #define NRF_WDT_TASK_SET 1UL |
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638:c90ae1400bf2 | 54 | #define NRF_WDT_EVENT_CLEAR 0UL |
Vincent Coubard |
638:c90ae1400bf2 | 55 | |
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638:c90ae1400bf2 | 56 | /** |
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638:c90ae1400bf2 | 57 | * @enum nrf_wdt_task_t |
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638:c90ae1400bf2 | 58 | * @brief WDT tasks. |
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638:c90ae1400bf2 | 59 | */ |
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638:c90ae1400bf2 | 60 | typedef enum |
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638:c90ae1400bf2 | 61 | { |
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638:c90ae1400bf2 | 62 | /*lint -save -e30 -esym(628,__INTADDR__)*/ |
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638:c90ae1400bf2 | 63 | NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */ |
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638:c90ae1400bf2 | 64 | /*lint -restore*/ |
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638:c90ae1400bf2 | 65 | } nrf_wdt_task_t; |
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638:c90ae1400bf2 | 66 | |
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638:c90ae1400bf2 | 67 | /** |
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638:c90ae1400bf2 | 68 | * @enum nrf_wdt_event_t |
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638:c90ae1400bf2 | 69 | * @brief WDT events. |
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638:c90ae1400bf2 | 70 | */ |
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638:c90ae1400bf2 | 71 | typedef enum |
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638:c90ae1400bf2 | 72 | { |
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638:c90ae1400bf2 | 73 | /*lint -save -e30*/ |
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638:c90ae1400bf2 | 74 | NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */ |
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638:c90ae1400bf2 | 75 | /*lint -restore*/ |
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638:c90ae1400bf2 | 76 | } nrf_wdt_event_t; |
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638:c90ae1400bf2 | 77 | |
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638:c90ae1400bf2 | 78 | /** |
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638:c90ae1400bf2 | 79 | * @enum nrf_wdt_behaviour_t |
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638:c90ae1400bf2 | 80 | * @brief WDT behavior in CPU SLEEP or HALT mode. |
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638:c90ae1400bf2 | 81 | */ |
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638:c90ae1400bf2 | 82 | typedef enum |
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638:c90ae1400bf2 | 83 | { |
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638:c90ae1400bf2 | 84 | NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */ |
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638:c90ae1400bf2 | 85 | NRF_WDT_BEHAVIOUR_RUN_HALT = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */ |
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638:c90ae1400bf2 | 86 | NRF_WDT_BEHAVIOUR_RUN_SLEEP_HALT = WDT_CONFIG_SLEEP_Msk | WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in SLEEP or HALT mode. */ |
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638:c90ae1400bf2 | 87 | NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */ |
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638:c90ae1400bf2 | 88 | } nrf_wdt_behaviour_t; |
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638:c90ae1400bf2 | 89 | |
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638:c90ae1400bf2 | 90 | /** |
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638:c90ae1400bf2 | 91 | * @enum nrf_wdt_rr_register_t |
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638:c90ae1400bf2 | 92 | * @brief WDT reload request registers. |
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638:c90ae1400bf2 | 93 | */ |
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638:c90ae1400bf2 | 94 | typedef enum |
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638:c90ae1400bf2 | 95 | { |
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638:c90ae1400bf2 | 96 | NRF_WDT_RR0 = 0, /**< Reload request register 0. */ |
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638:c90ae1400bf2 | 97 | NRF_WDT_RR1, /**< Reload request register 1. */ |
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638:c90ae1400bf2 | 98 | NRF_WDT_RR2, /**< Reload request register 2. */ |
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638:c90ae1400bf2 | 99 | NRF_WDT_RR3, /**< Reload request register 3. */ |
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638:c90ae1400bf2 | 100 | NRF_WDT_RR4, /**< Reload request register 4. */ |
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638:c90ae1400bf2 | 101 | NRF_WDT_RR5, /**< Reload request register 5. */ |
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638:c90ae1400bf2 | 102 | NRF_WDT_RR6, /**< Reload request register 6. */ |
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638:c90ae1400bf2 | 103 | NRF_WDT_RR7 /**< Reload request register 7. */ |
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638:c90ae1400bf2 | 104 | } nrf_wdt_rr_register_t; |
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638:c90ae1400bf2 | 105 | |
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638:c90ae1400bf2 | 106 | /** |
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638:c90ae1400bf2 | 107 | * @enum nrf_wdt_int_mask_t |
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638:c90ae1400bf2 | 108 | * @brief WDT interrupts. |
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638:c90ae1400bf2 | 109 | */ |
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638:c90ae1400bf2 | 110 | typedef enum |
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638:c90ae1400bf2 | 111 | { |
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638:c90ae1400bf2 | 112 | NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */ |
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638:c90ae1400bf2 | 113 | } nrf_wdt_int_mask_t; |
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638:c90ae1400bf2 | 114 | |
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638:c90ae1400bf2 | 115 | /** |
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638:c90ae1400bf2 | 116 | * @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted. |
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638:c90ae1400bf2 | 117 | * |
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638:c90ae1400bf2 | 118 | * @param behaviour Watchdog behavior when CPU is in SLEEP or HALT mode. |
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638:c90ae1400bf2 | 119 | */ |
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638:c90ae1400bf2 | 120 | __STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour) |
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638:c90ae1400bf2 | 121 | { |
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638:c90ae1400bf2 | 122 | NRF_WDT->CONFIG = behaviour; |
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638:c90ae1400bf2 | 123 | } |
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638:c90ae1400bf2 | 124 | |
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638:c90ae1400bf2 | 125 | |
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638:c90ae1400bf2 | 126 | /** |
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638:c90ae1400bf2 | 127 | * @brief Function for starting the watchdog. |
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638:c90ae1400bf2 | 128 | * |
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638:c90ae1400bf2 | 129 | * @param[in] task Task. |
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638:c90ae1400bf2 | 130 | */ |
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638:c90ae1400bf2 | 131 | __STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task) |
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638:c90ae1400bf2 | 132 | { |
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638:c90ae1400bf2 | 133 | *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET; |
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638:c90ae1400bf2 | 134 | } |
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638:c90ae1400bf2 | 135 | |
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638:c90ae1400bf2 | 136 | |
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638:c90ae1400bf2 | 137 | /** |
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638:c90ae1400bf2 | 138 | * @brief Function for clearing the WDT event. |
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638:c90ae1400bf2 | 139 | * |
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638:c90ae1400bf2 | 140 | * @param[in] event Event. |
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638:c90ae1400bf2 | 141 | */ |
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638:c90ae1400bf2 | 142 | __STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event) |
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638:c90ae1400bf2 | 143 | { |
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638:c90ae1400bf2 | 144 | *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR; |
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638:c90ae1400bf2 | 145 | } |
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638:c90ae1400bf2 | 146 | |
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638:c90ae1400bf2 | 147 | |
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638:c90ae1400bf2 | 148 | /** |
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638:c90ae1400bf2 | 149 | * @brief Function for retrieving the state of the WDT event. |
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638:c90ae1400bf2 | 150 | * |
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638:c90ae1400bf2 | 151 | * @param[in] event Event. |
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638:c90ae1400bf2 | 152 | * |
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638:c90ae1400bf2 | 153 | * @retval true If the event is set. |
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638:c90ae1400bf2 | 154 | * @retval false If the event is not set. |
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638:c90ae1400bf2 | 155 | */ |
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638:c90ae1400bf2 | 156 | __STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event) |
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638:c90ae1400bf2 | 157 | { |
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638:c90ae1400bf2 | 158 | return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event)); |
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638:c90ae1400bf2 | 159 | } |
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638:c90ae1400bf2 | 160 | |
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638:c90ae1400bf2 | 161 | |
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638:c90ae1400bf2 | 162 | /** |
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638:c90ae1400bf2 | 163 | * @brief Function for enabling a specific interrupt. |
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638:c90ae1400bf2 | 164 | * |
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638:c90ae1400bf2 | 165 | * @param[in] int_mask Interrupt. |
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638:c90ae1400bf2 | 166 | */ |
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638:c90ae1400bf2 | 167 | __STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask) |
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638:c90ae1400bf2 | 168 | { |
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638:c90ae1400bf2 | 169 | NRF_WDT->INTENSET = int_mask; |
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638:c90ae1400bf2 | 170 | } |
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638:c90ae1400bf2 | 171 | |
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638:c90ae1400bf2 | 172 | |
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638:c90ae1400bf2 | 173 | /** |
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638:c90ae1400bf2 | 174 | * @brief Function for retrieving the state of given interrupt. |
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638:c90ae1400bf2 | 175 | * |
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638:c90ae1400bf2 | 176 | * @param[in] int_mask Interrupt. |
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638:c90ae1400bf2 | 177 | * |
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638:c90ae1400bf2 | 178 | * @retval true Interrupt is enabled. |
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638:c90ae1400bf2 | 179 | * @retval false Interrupt is not enabled. |
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638:c90ae1400bf2 | 180 | */ |
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638:c90ae1400bf2 | 181 | __STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask) |
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638:c90ae1400bf2 | 182 | { |
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638:c90ae1400bf2 | 183 | return (bool)(NRF_WDT->INTENSET & int_mask); |
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638:c90ae1400bf2 | 184 | } |
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638:c90ae1400bf2 | 185 | |
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638:c90ae1400bf2 | 186 | |
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638:c90ae1400bf2 | 187 | /** |
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638:c90ae1400bf2 | 188 | * @brief Function for disabling a specific interrupt. |
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638:c90ae1400bf2 | 189 | * |
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638:c90ae1400bf2 | 190 | * @param[in] int_mask Interrupt. |
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638:c90ae1400bf2 | 191 | */ |
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638:c90ae1400bf2 | 192 | __STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask) |
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638:c90ae1400bf2 | 193 | { |
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638:c90ae1400bf2 | 194 | NRF_WDT->INTENCLR = int_mask; |
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638:c90ae1400bf2 | 195 | } |
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638:c90ae1400bf2 | 196 | |
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638:c90ae1400bf2 | 197 | |
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638:c90ae1400bf2 | 198 | /** |
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638:c90ae1400bf2 | 199 | * @brief Function for returning the address of a specific WDT task register. |
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638:c90ae1400bf2 | 200 | * |
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638:c90ae1400bf2 | 201 | * @param[in] task Task. |
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638:c90ae1400bf2 | 202 | */ |
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638:c90ae1400bf2 | 203 | __STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task) |
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638:c90ae1400bf2 | 204 | { |
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638:c90ae1400bf2 | 205 | return ((uint32_t)NRF_WDT + task); |
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638:c90ae1400bf2 | 206 | } |
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638:c90ae1400bf2 | 207 | |
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638:c90ae1400bf2 | 208 | |
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638:c90ae1400bf2 | 209 | /** |
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638:c90ae1400bf2 | 210 | * @brief Function for returning the address of a specific WDT event register. |
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638:c90ae1400bf2 | 211 | * |
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638:c90ae1400bf2 | 212 | * @param[in] event Event. |
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638:c90ae1400bf2 | 213 | * |
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638:c90ae1400bf2 | 214 | * @retval address of requested event register |
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638:c90ae1400bf2 | 215 | */ |
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638:c90ae1400bf2 | 216 | __STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event) |
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638:c90ae1400bf2 | 217 | { |
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638:c90ae1400bf2 | 218 | return ((uint32_t)NRF_WDT + event); |
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638:c90ae1400bf2 | 219 | } |
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638:c90ae1400bf2 | 220 | |
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638:c90ae1400bf2 | 221 | |
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638:c90ae1400bf2 | 222 | /** |
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638:c90ae1400bf2 | 223 | * @brief Function for retrieving the watchdog status. |
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638:c90ae1400bf2 | 224 | * |
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638:c90ae1400bf2 | 225 | * @retval true If the watchdog is started. |
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638:c90ae1400bf2 | 226 | * @retval false If the watchdog is not started. |
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638:c90ae1400bf2 | 227 | */ |
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638:c90ae1400bf2 | 228 | __STATIC_INLINE bool nrf_wdt_started(void) |
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638:c90ae1400bf2 | 229 | { |
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638:c90ae1400bf2 | 230 | return (bool)(NRF_WDT->RUNSTATUS); |
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638:c90ae1400bf2 | 231 | } |
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638:c90ae1400bf2 | 232 | |
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638:c90ae1400bf2 | 233 | |
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638:c90ae1400bf2 | 234 | /** |
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638:c90ae1400bf2 | 235 | * @brief Function for retrieving the watchdog reload request status. |
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638:c90ae1400bf2 | 236 | * |
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638:c90ae1400bf2 | 237 | * @param[in] rr_register Reload request register to check. |
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638:c90ae1400bf2 | 238 | * |
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638:c90ae1400bf2 | 239 | * @retval true If a reload request is running. |
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638:c90ae1400bf2 | 240 | * @retval false If no reload request is running. |
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638:c90ae1400bf2 | 241 | */ |
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638:c90ae1400bf2 | 242 | __STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register) |
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638:c90ae1400bf2 | 243 | { |
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638:c90ae1400bf2 | 244 | return (bool)(((NRF_WDT->REQSTATUS) >> rr_register) & 0x1UL); |
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638:c90ae1400bf2 | 245 | } |
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638:c90ae1400bf2 | 246 | |
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638:c90ae1400bf2 | 247 | |
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638:c90ae1400bf2 | 248 | /** |
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638:c90ae1400bf2 | 249 | * @brief Function for setting the watchdog reload value. |
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638:c90ae1400bf2 | 250 | * |
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638:c90ae1400bf2 | 251 | * @param[in] reload_value Watchdog counter initial value. |
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638:c90ae1400bf2 | 252 | */ |
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638:c90ae1400bf2 | 253 | __STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value) |
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638:c90ae1400bf2 | 254 | { |
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638:c90ae1400bf2 | 255 | NRF_WDT->CRV = reload_value; |
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638:c90ae1400bf2 | 256 | } |
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638:c90ae1400bf2 | 257 | |
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638:c90ae1400bf2 | 258 | |
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638:c90ae1400bf2 | 259 | /** |
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638:c90ae1400bf2 | 260 | * @brief Function for retrieving the watchdog reload value. |
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638:c90ae1400bf2 | 261 | * |
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638:c90ae1400bf2 | 262 | * @retval Reload value. |
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638:c90ae1400bf2 | 263 | */ |
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638:c90ae1400bf2 | 264 | __STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void) |
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638:c90ae1400bf2 | 265 | { |
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638:c90ae1400bf2 | 266 | return (uint32_t)NRF_WDT->CRV; |
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638:c90ae1400bf2 | 267 | } |
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638:c90ae1400bf2 | 268 | |
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638:c90ae1400bf2 | 269 | |
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638:c90ae1400bf2 | 270 | /** |
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638:c90ae1400bf2 | 271 | * @brief Function for enabling a specific reload request register. |
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638:c90ae1400bf2 | 272 | * |
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638:c90ae1400bf2 | 273 | * @param[in] rr_register Reload request register to enable. |
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638:c90ae1400bf2 | 274 | */ |
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638:c90ae1400bf2 | 275 | __STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register) |
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638:c90ae1400bf2 | 276 | { |
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638:c90ae1400bf2 | 277 | NRF_WDT->RREN |= 0x1UL << rr_register; |
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638:c90ae1400bf2 | 278 | } |
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638:c90ae1400bf2 | 279 | |
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638:c90ae1400bf2 | 280 | |
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638:c90ae1400bf2 | 281 | /** |
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638:c90ae1400bf2 | 282 | * @brief Function for disabling a specific reload request register. |
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638:c90ae1400bf2 | 283 | * |
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638:c90ae1400bf2 | 284 | * @param[in] rr_register Reload request register to disable. |
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638:c90ae1400bf2 | 285 | */ |
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638:c90ae1400bf2 | 286 | __STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register) |
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638:c90ae1400bf2 | 287 | { |
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638:c90ae1400bf2 | 288 | NRF_WDT->RREN &= ~(0x1UL << rr_register); |
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638:c90ae1400bf2 | 289 | } |
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638:c90ae1400bf2 | 290 | |
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638:c90ae1400bf2 | 291 | |
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638:c90ae1400bf2 | 292 | /** |
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638:c90ae1400bf2 | 293 | * @brief Function for retrieving the status of a specific reload request register. |
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638:c90ae1400bf2 | 294 | * |
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638:c90ae1400bf2 | 295 | * @param[in] rr_register Reload request register to check. |
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638:c90ae1400bf2 | 296 | * |
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638:c90ae1400bf2 | 297 | * @retval true If the reload request register is enabled. |
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638:c90ae1400bf2 | 298 | * @retval false If the reload request register is not enabled. |
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638:c90ae1400bf2 | 299 | */ |
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638:c90ae1400bf2 | 300 | __STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register) |
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638:c90ae1400bf2 | 301 | { |
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638:c90ae1400bf2 | 302 | return (bool)(NRF_WDT->RREN & (0x1UL << rr_register)); |
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638:c90ae1400bf2 | 303 | } |
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638:c90ae1400bf2 | 304 | |
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638:c90ae1400bf2 | 305 | |
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638:c90ae1400bf2 | 306 | /** |
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638:c90ae1400bf2 | 307 | * @brief Function for setting a specific reload request register. |
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638:c90ae1400bf2 | 308 | * |
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638:c90ae1400bf2 | 309 | * @param[in] rr_register Reload request register to set. |
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638:c90ae1400bf2 | 310 | */ |
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638:c90ae1400bf2 | 311 | __STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register) |
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638:c90ae1400bf2 | 312 | { |
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638:c90ae1400bf2 | 313 | NRF_WDT->RR[rr_register] = NRF_WDT_RR_VALUE; |
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638:c90ae1400bf2 | 314 | } |
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638:c90ae1400bf2 | 315 | |
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638:c90ae1400bf2 | 316 | |
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638:c90ae1400bf2 | 317 | #endif |
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638:c90ae1400bf2 | 318 | |
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638:c90ae1400bf2 | 319 | /** @} */ |