Diff: Devices/FastIO_EFM32.h

Revision:

15:e0c5a5216647

Child:

16:a56c0e7ebf7f

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Devices/FastIO_EFM32.h	Thu Jul 09 21:11:39 2015 +0000
@@ -0,0 +1,33 @@
+#if defined(TARGET_EFM32)
+
+#include "mbed.h"
+#include "pinmap.h"
+#include "em_cmu.h"
+
+typedef struct {
+    uint32_t mask;
+    uint8_t input_mode;
+    uint8_t output_mode;
+} fastio_vars;
+
+#define PIN_INDEX       (pin & 0xF)
+#define PINMASK         (1 << PIN_INDEX)
+#define PORT_INDEX      (pin >> 4)
+
+//Mode_reg is either high or low, depending on first 8 bit or second 8-bit of a port
+#define MODE_REG        (*((&GPIO->P[PORT_INDEX].MODEL) + PIN_INDEX / 8))
+#define MODE_SHIFT      ((PIN_INDEX * 4) % 32)
+
+#define INIT_PIN        container.mask = PINMASK; container.input_mode = PullDefault; container.output_mode = PushPull; CMU_ClockEnable(cmuClock_HFPER, true); CMU_ClockEnable(cmuClock_GPIO, true)
+#define DESTROY_PIN     
+
+#define SET_DIR_INPUT   uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (Input << MODE_SHIFT)
+#define SET_DIR_OUTPUT  uint32_t temp = MODE_REG & ~(0xF << MODE_SHIFT); MODE_REG = temp + (container.output_mode << MODE_SHIFT)
+#define SET_MODE(pull)  (((pull <= 3) || (pull > 0x10)) ? container.input_mode = pull : container.output_mode = pull)
+
+#define WRITE_PIN_SET   GPIO->P[PORT_INDEX].DOUTSET = PINMASK
+#define WRITE_PIN_CLR   GPIO->P[PORT_INDEX].DOUTCLR = PINMASK
+
+#define READ_PIN        ((GPIO->P[PORT_INDEX].DIN & PINMASK) ? 1 : 0)
+
+#endif