Alex Whittemore
/
BURTDAQ
Program to run data acquisition and control for BU Rocket Team's MKII hybrid rocket motor
burtdaq/burtdaq.h@0:7fd45d2b5926, 2012-04-09 (annotated)
- Committer:
- alexwhittemore
- Date:
- Mon Apr 09 16:39:50 2012 +0000
- Revision:
- 0:7fd45d2b5926
For some reason, this thing wont run serial interrupts and threads simultaneously without locking up.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
alexwhittemore | 0:7fd45d2b5926 | 1 | // Pin function definitions for BURT MKII DAQ Main Board r1.0 |
alexwhittemore | 0:7fd45d2b5926 | 2 | #ifndef BURTDAQ_H |
alexwhittemore | 0:7fd45d2b5926 | 3 | #define BURTDAQ_H |
alexwhittemore | 0:7fd45d2b5926 | 4 | |
alexwhittemore | 0:7fd45d2b5926 | 5 | // XBee serial port |
alexwhittemore | 0:7fd45d2b5926 | 6 | #define XBEETX p28 |
alexwhittemore | 0:7fd45d2b5926 | 7 | #define XBEERX p27 |
alexwhittemore | 0:7fd45d2b5926 | 8 | |
alexwhittemore | 0:7fd45d2b5926 | 9 | // LCD serial port |
alexwhittemore | 0:7fd45d2b5926 | 10 | #define LCDTX p9 |
alexwhittemore | 0:7fd45d2b5926 | 11 | #define LCDRX p10 |
alexwhittemore | 0:7fd45d2b5926 | 12 | |
alexwhittemore | 0:7fd45d2b5926 | 13 | // SPI A |
alexwhittemore | 0:7fd45d2b5926 | 14 | #define SPIA_MOSI p5 |
alexwhittemore | 0:7fd45d2b5926 | 15 | #define SPIA_MISO p6 |
alexwhittemore | 0:7fd45d2b5926 | 16 | #define SPIA_CLK p7 |
alexwhittemore | 0:7fd45d2b5926 | 17 | |
alexwhittemore | 0:7fd45d2b5926 | 18 | #define SPIA_P1_CS p8 // P0.6 |
alexwhittemore | 0:7fd45d2b5926 | 19 | #define SPIA_P2_CS p14 // P0.16 |
alexwhittemore | 0:7fd45d2b5926 | 20 | #define SPIA_P3_CS p30 // P0.4 |
alexwhittemore | 0:7fd45d2b5926 | 21 | #define SPIA_P4_CS p29 // P0.5 |
alexwhittemore | 0:7fd45d2b5926 | 22 | |
alexwhittemore | 0:7fd45d2b5926 | 23 | #define SPIA_CS_PORT_MASK 0x10070 |
alexwhittemore | 0:7fd45d2b5926 | 24 | #define SPIA_P1_CS_PORT_MASK 0x40 |
alexwhittemore | 0:7fd45d2b5926 | 25 | #define SPIA_P2_CS_PORT_MASK 0x10000 |
alexwhittemore | 0:7fd45d2b5926 | 26 | #define SPIA_P3_CS_PORT_MASK 0x10 |
alexwhittemore | 0:7fd45d2b5926 | 27 | #define SPIA_P4_CS_PORT_MASK 0x20 |
alexwhittemore | 0:7fd45d2b5926 | 28 | |
alexwhittemore | 0:7fd45d2b5926 | 29 | // SPI B |
alexwhittemore | 0:7fd45d2b5926 | 30 | #define SPIB_MOSI p11 |
alexwhittemore | 0:7fd45d2b5926 | 31 | #define SPIB_MISO p12 |
alexwhittemore | 0:7fd45d2b5926 | 32 | #define SPIB_CLK p13 |
alexwhittemore | 0:7fd45d2b5926 | 33 | |
alexwhittemore | 0:7fd45d2b5926 | 34 | #define SPIB_P1_CS p15 |
alexwhittemore | 0:7fd45d2b5926 | 35 | #define SPIB_P2_CS p16 |
alexwhittemore | 0:7fd45d2b5926 | 36 | #define SPIB_P3_CS p17 |
alexwhittemore | 0:7fd45d2b5926 | 37 | #define SPIB_P4_CS p19 |
alexwhittemore | 0:7fd45d2b5926 | 38 | |
alexwhittemore | 0:7fd45d2b5926 | 39 | // H-Bridge Outputs |
alexwhittemore | 0:7fd45d2b5926 | 40 | #define MOTOR1 p25 |
alexwhittemore | 0:7fd45d2b5926 | 41 | #define MOTOR2 p24 |
alexwhittemore | 0:7fd45d2b5926 | 42 | #define MOTOR3 p22 // NOTE: Motor3 and Motor4 are mixed up in schematic, so the pins are out of order |
alexwhittemore | 0:7fd45d2b5926 | 43 | #define MOTOR4 p23 |
alexwhittemore | 0:7fd45d2b5926 | 44 | |
alexwhittemore | 0:7fd45d2b5926 | 45 | // Filter Clock Output |
alexwhittemore | 0:7fd45d2b5926 | 46 | #define FILTCLK p26 |
alexwhittemore | 0:7fd45d2b5926 | 47 | |
alexwhittemore | 0:7fd45d2b5926 | 48 | #endif |