MPU6050_DMP_Nucleo-I2Cdev - MPU DMP code modified for use with ST Nucelo boar…

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Akash Vibhute / MPU6050_DMP_Nucleo-I2Cdev

MPU DMP code modified for use with ST Nucelo boards. This Library makes use of I2Cdev.

Dependents: MPU9150_nucleo_i2cdev Orion_newPCB_test_LV Orion_PCB_test_Faulhaber_gr41_wptcmd_V1 MPU9150_nucleo_i2cdev ... more

Fork of MPU6050-DMP-Ian by Ian Hua

MPU/MPU6050.cpp@6:2dc23167c8d8, 2014-04-29 (annotated)

Committer:: pHysiX
Date:: Tue Apr 29 10:36:21 2014 +0000
Revision:: 6:2dc23167c8d8

Working in RTOS

Who changed what in which revision?

User	Revision	Line number	New contents of line
pHysiX	6:2dc23167c8d8	1	#include "MPU6050.h"
pHysiX	6:2dc23167c8d8	2
pHysiX	6:2dc23167c8d8	3	#define useDebugSerial
pHysiX	6:2dc23167c8d8	4
pHysiX	6:2dc23167c8d8	5	//instead of using pgmspace.h
pHysiX	6:2dc23167c8d8	6	typedef const unsigned char prog_uchar;
pHysiX	6:2dc23167c8d8	7	#define pgm_read_byte_near(x) ((prog_uchar)(x))//<- I modified here
pHysiX	6:2dc23167c8d8	8	#define pgm_read_byte(x) ((prog_uchar)(x))//<- I modified here
pHysiX	6:2dc23167c8d8	9
pHysiX	6:2dc23167c8d8	10	/** Default constructor, uses default I2C address.
pHysiX	6:2dc23167c8d8	11	* @see MPU6050_DEFAULT_ADDRESS
pHysiX	6:2dc23167c8d8	12	*/
pHysiX	6:2dc23167c8d8	13	MPU6050::MPU6050() : debugSerial(USBTX, USBRX)
pHysiX	6:2dc23167c8d8	14	{
pHysiX	6:2dc23167c8d8	15	devAddr = MPU6050_DEFAULT_ADDRESS;
pHysiX	6:2dc23167c8d8	16	}
pHysiX	6:2dc23167c8d8	17
pHysiX	6:2dc23167c8d8	18	MPU6050::MPU6050(PinName i2cSDA, PinName i2cSCL) : i2Cdev(i2cSDA, i2cSCL), debugSerial(USBTX, USBRX)
pHysiX	6:2dc23167c8d8	19	{
pHysiX	6:2dc23167c8d8	20	devAddr = MPU6050_DEFAULT_ADDRESS;
pHysiX	6:2dc23167c8d8	21	}
pHysiX	6:2dc23167c8d8	22
pHysiX	6:2dc23167c8d8	23	/** Specific address constructor.
pHysiX	6:2dc23167c8d8	24	* @param address I2C address
pHysiX	6:2dc23167c8d8	25	* @see MPU6050_DEFAULT_ADDRESS
pHysiX	6:2dc23167c8d8	26	* @see MPU6050_ADDRESS_AD0_LOW
pHysiX	6:2dc23167c8d8	27	* @see MPU6050_ADDRESS_AD0_HIGH
pHysiX	6:2dc23167c8d8	28	*/
pHysiX	6:2dc23167c8d8	29	MPU6050::MPU6050(uint8_t address) : debugSerial(USBTX, USBRX)
pHysiX	6:2dc23167c8d8	30	{
pHysiX	6:2dc23167c8d8	31	devAddr = address;
pHysiX	6:2dc23167c8d8	32	}
pHysiX	6:2dc23167c8d8	33
pHysiX	6:2dc23167c8d8	34	/** Power on and prepare for general usage.
pHysiX	6:2dc23167c8d8	35	* This will activate the device and take it out of sleep mode (which must be done
pHysiX	6:2dc23167c8d8	36	* after start-up). This function also sets both the accelerometer and the gyroscope
pHysiX	6:2dc23167c8d8	37	* to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
pHysiX	6:2dc23167c8d8	38	* the clock source to use the X Gyro for reference, which is slightly better than
pHysiX	6:2dc23167c8d8	39	* the default internal clock source.
pHysiX	6:2dc23167c8d8	40	*/
pHysiX	6:2dc23167c8d8	41	void MPU6050::initialize()
pHysiX	6:2dc23167c8d8	42	{
pHysiX	6:2dc23167c8d8	43	#ifdef useDebugSerial
pHysiX	6:2dc23167c8d8	44	debugSerial.printf("MPU6050::initialize start\n");
pHysiX	6:2dc23167c8d8	45	#endif
pHysiX	6:2dc23167c8d8	46
pHysiX	6:2dc23167c8d8	47	setClockSource(MPU6050_CLOCK_PLL_XGYRO);
pHysiX	6:2dc23167c8d8	48	setFullScaleGyroRange(MPU6050_GYRO_FS_250);
pHysiX	6:2dc23167c8d8	49	setFullScaleAccelRange(MPU6050_ACCEL_FS_2);
pHysiX	6:2dc23167c8d8	50	setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
pHysiX	6:2dc23167c8d8	51
pHysiX	6:2dc23167c8d8	52	#ifdef useDebugSerial
pHysiX	6:2dc23167c8d8	53	debugSerial.printf("MPU6050::initialize end\n");
pHysiX	6:2dc23167c8d8	54	#endif
pHysiX	6:2dc23167c8d8	55	}
pHysiX	6:2dc23167c8d8	56
pHysiX	6:2dc23167c8d8	57	/** Verify the I2C connection.
pHysiX	6:2dc23167c8d8	58	* Make sure the device is connected and responds as expected.
pHysiX	6:2dc23167c8d8	59	* @return True if connection is valid, false otherwise
pHysiX	6:2dc23167c8d8	60	*/
pHysiX	6:2dc23167c8d8	61	bool MPU6050::testConnection()
pHysiX	6:2dc23167c8d8	62	{
pHysiX	6:2dc23167c8d8	63	#ifdef useDebugSerial
pHysiX	6:2dc23167c8d8	64	debugSerial.printf("MPU6050::testConnection start\n");
pHysiX	6:2dc23167c8d8	65	#endif
pHysiX	6:2dc23167c8d8	66	uint8_t deviceId = getDeviceID();
pHysiX	6:2dc23167c8d8	67	#ifdef useDebugSerial
pHysiX	6:2dc23167c8d8	68	debugSerial.printf("DeviceId = %d\n",deviceId);
pHysiX	6:2dc23167c8d8	69	#endif
pHysiX	6:2dc23167c8d8	70	return deviceId == 0x34;
pHysiX	6:2dc23167c8d8	71	}
pHysiX	6:2dc23167c8d8	72
pHysiX	6:2dc23167c8d8	73	// AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
pHysiX	6:2dc23167c8d8	74
pHysiX	6:2dc23167c8d8	75	/** Get the auxiliary I2C supply voltage level.
pHysiX	6:2dc23167c8d8	76	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
pHysiX	6:2dc23167c8d8	77	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
pHysiX	6:2dc23167c8d8	78	* the MPU-6000, which does not have a VLOGIC pin.
pHysiX	6:2dc23167c8d8	79	* @return I2C supply voltage level (0=VLOGIC, 1=VDD)
pHysiX	6:2dc23167c8d8	80	*/
pHysiX	6:2dc23167c8d8	81	uint8_t MPU6050::getAuxVDDIOLevel()
pHysiX	6:2dc23167c8d8	82	{
pHysiX	6:2dc23167c8d8	83	i2Cdev.readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer);
pHysiX	6:2dc23167c8d8	84	return buffer[0];
pHysiX	6:2dc23167c8d8	85	}
pHysiX	6:2dc23167c8d8	86	/** Set the auxiliary I2C supply voltage level.
pHysiX	6:2dc23167c8d8	87	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
pHysiX	6:2dc23167c8d8	88	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
pHysiX	6:2dc23167c8d8	89	* the MPU-6000, which does not have a VLOGIC pin.
pHysiX	6:2dc23167c8d8	90	* @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
pHysiX	6:2dc23167c8d8	91	*/
pHysiX	6:2dc23167c8d8	92	void MPU6050::setAuxVDDIOLevel(uint8_t level)
pHysiX	6:2dc23167c8d8	93	{
pHysiX	6:2dc23167c8d8	94	i2Cdev.writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level);
pHysiX	6:2dc23167c8d8	95	}
pHysiX	6:2dc23167c8d8	96
pHysiX	6:2dc23167c8d8	97	// SMPLRT_DIV register
pHysiX	6:2dc23167c8d8	98
pHysiX	6:2dc23167c8d8	99	/** Get gyroscope output rate divider.
pHysiX	6:2dc23167c8d8	100	* The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
pHysiX	6:2dc23167c8d8	101	* Motion detection, and Free Fall detection are all based on the Sample Rate.
pHysiX	6:2dc23167c8d8	102	* The Sample Rate is generated by dividing the gyroscope output rate by
pHysiX	6:2dc23167c8d8	103	* SMPLRT_DIV:
pHysiX	6:2dc23167c8d8	104	*
pHysiX	6:2dc23167c8d8	105	* Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
pHysiX	6:2dc23167c8d8	106	*
pHysiX	6:2dc23167c8d8	107	* where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
pHysiX	6:2dc23167c8d8	108	* 7), and 1kHz when the DLPF is enabled (see Register 26).
pHysiX	6:2dc23167c8d8	109	*
pHysiX	6:2dc23167c8d8	110	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
pHysiX	6:2dc23167c8d8	111	* Rate greater than 1kHz, the same accelerometer sample may be output to the
pHysiX	6:2dc23167c8d8	112	* FIFO, DMP, and sensor registers more than once.
pHysiX	6:2dc23167c8d8	113	*
pHysiX	6:2dc23167c8d8	114	* For a diagram of the gyroscope and accelerometer signal paths, see Section 8
pHysiX	6:2dc23167c8d8	115	* of the MPU-6000/MPU-6050 Product Specification document.
pHysiX	6:2dc23167c8d8	116	*
pHysiX	6:2dc23167c8d8	117	* @return Current sample rate
pHysiX	6:2dc23167c8d8	118	* @see MPU6050_RA_SMPLRT_DIV
pHysiX	6:2dc23167c8d8	119	*/
pHysiX	6:2dc23167c8d8	120	uint8_t MPU6050::getRate()
pHysiX	6:2dc23167c8d8	121	{
pHysiX	6:2dc23167c8d8	122	i2Cdev.readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer);
pHysiX	6:2dc23167c8d8	123	return buffer[0];
pHysiX	6:2dc23167c8d8	124	}
pHysiX	6:2dc23167c8d8	125	/** Set gyroscope sample rate divider.
pHysiX	6:2dc23167c8d8	126	* @param rate New sample rate divider
pHysiX	6:2dc23167c8d8	127	* @see getRate()
pHysiX	6:2dc23167c8d8	128	* @see MPU6050_RA_SMPLRT_DIV
pHysiX	6:2dc23167c8d8	129	*/
pHysiX	6:2dc23167c8d8	130	void MPU6050::setRate(uint8_t rate)
pHysiX	6:2dc23167c8d8	131	{
pHysiX	6:2dc23167c8d8	132	i2Cdev.writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate);
pHysiX	6:2dc23167c8d8	133	}
pHysiX	6:2dc23167c8d8	134
pHysiX	6:2dc23167c8d8	135	// CONFIG register
pHysiX	6:2dc23167c8d8	136
pHysiX	6:2dc23167c8d8	137	/** Get external FSYNC configuration.
pHysiX	6:2dc23167c8d8	138	* Configures the external Frame Synchronization (FSYNC) pin sampling. An
pHysiX	6:2dc23167c8d8	139	* external signal connected to the FSYNC pin can be sampled by configuring
pHysiX	6:2dc23167c8d8	140	* EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
pHysiX	6:2dc23167c8d8	141	* strobes may be captured. The latched FSYNC signal will be sampled at the
pHysiX	6:2dc23167c8d8	142	* Sampling Rate, as defined in register 25. After sampling, the latch will
pHysiX	6:2dc23167c8d8	143	* reset to the current FSYNC signal state.
pHysiX	6:2dc23167c8d8	144	*
pHysiX	6:2dc23167c8d8	145	* The sampled value will be reported in place of the least significant bit in
pHysiX	6:2dc23167c8d8	146	* a sensor data register determined by the value of EXT_SYNC_SET according to
pHysiX	6:2dc23167c8d8	147	* the following table.
pHysiX	6:2dc23167c8d8	148	*
pHysiX	6:2dc23167c8d8	149	* <pre>
pHysiX	6:2dc23167c8d8	150	* EXT_SYNC_SET \| FSYNC Bit Location
pHysiX	6:2dc23167c8d8	151	* -------------+-------------------
pHysiX	6:2dc23167c8d8	152	* 0 \| Input disabled
pHysiX	6:2dc23167c8d8	153	* 1 \| TEMP_OUT_L[0]
pHysiX	6:2dc23167c8d8	154	* 2 \| GYRO_XOUT_L[0]
pHysiX	6:2dc23167c8d8	155	* 3 \| GYRO_YOUT_L[0]
pHysiX	6:2dc23167c8d8	156	* 4 \| GYRO_ZOUT_L[0]
pHysiX	6:2dc23167c8d8	157	* 5 \| ACCEL_XOUT_L[0]
pHysiX	6:2dc23167c8d8	158	* 6 \| ACCEL_YOUT_L[0]
pHysiX	6:2dc23167c8d8	159	* 7 \| ACCEL_ZOUT_L[0]
pHysiX	6:2dc23167c8d8	160	* </pre>
pHysiX	6:2dc23167c8d8	161	*
pHysiX	6:2dc23167c8d8	162	* @return FSYNC configuration value
pHysiX	6:2dc23167c8d8	163	*/
pHysiX	6:2dc23167c8d8	164	uint8_t MPU6050::getExternalFrameSync()
pHysiX	6:2dc23167c8d8	165	{
pHysiX	6:2dc23167c8d8	166	i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	167	return buffer[0];
pHysiX	6:2dc23167c8d8	168	}
pHysiX	6:2dc23167c8d8	169	/** Set external FSYNC configuration.
pHysiX	6:2dc23167c8d8	170	* @see getExternalFrameSync()
pHysiX	6:2dc23167c8d8	171	* @see MPU6050_RA_CONFIG
pHysiX	6:2dc23167c8d8	172	* @param sync New FSYNC configuration value
pHysiX	6:2dc23167c8d8	173	*/
pHysiX	6:2dc23167c8d8	174	void MPU6050::setExternalFrameSync(uint8_t sync)
pHysiX	6:2dc23167c8d8	175	{
pHysiX	6:2dc23167c8d8	176	i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync);
pHysiX	6:2dc23167c8d8	177	}
pHysiX	6:2dc23167c8d8	178	/** Get digital low-pass filter configuration.
pHysiX	6:2dc23167c8d8	179	* The DLPF_CFG parameter sets the digital low pass filter configuration. It
pHysiX	6:2dc23167c8d8	180	* also determines the internal sampling rate used by the device as shown in
pHysiX	6:2dc23167c8d8	181	* the table below.
pHysiX	6:2dc23167c8d8	182	*
pHysiX	6:2dc23167c8d8	183	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
pHysiX	6:2dc23167c8d8	184	* Rate greater than 1kHz, the same accelerometer sample may be output to the
pHysiX	6:2dc23167c8d8	185	* FIFO, DMP, and sensor registers more than once.
pHysiX	6:2dc23167c8d8	186	*
pHysiX	6:2dc23167c8d8	187	* <pre>
pHysiX	6:2dc23167c8d8	188	* \| ACCELEROMETER \| GYROSCOPE
pHysiX	6:2dc23167c8d8	189	* DLPF_CFG \| Bandwidth \| Delay \| Bandwidth \| Delay \| Sample Rate
pHysiX	6:2dc23167c8d8	190	* ---------+-----------+--------+-----------+--------+-------------
pHysiX	6:2dc23167c8d8	191	* 0 \| 260Hz \| 0ms \| 256Hz \| 0.98ms \| 8kHz
pHysiX	6:2dc23167c8d8	192	* 1 \| 184Hz \| 2.0ms \| 188Hz \| 1.9ms \| 1kHz
pHysiX	6:2dc23167c8d8	193	* 2 \| 94Hz \| 3.0ms \| 98Hz \| 2.8ms \| 1kHz
pHysiX	6:2dc23167c8d8	194	* 3 \| 44Hz \| 4.9ms \| 42Hz \| 4.8ms \| 1kHz
pHysiX	6:2dc23167c8d8	195	* 4 \| 21Hz \| 8.5ms \| 20Hz \| 8.3ms \| 1kHz
pHysiX	6:2dc23167c8d8	196	* 5 \| 10Hz \| 13.8ms \| 10Hz \| 13.4ms \| 1kHz
pHysiX	6:2dc23167c8d8	197	* 6 \| 5Hz \| 19.0ms \| 5Hz \| 18.6ms \| 1kHz
pHysiX	6:2dc23167c8d8	198	* 7 \| -- Reserved -- \| -- Reserved -- \| Reserved
pHysiX	6:2dc23167c8d8	199	* </pre>
pHysiX	6:2dc23167c8d8	200	*
pHysiX	6:2dc23167c8d8	201	* @return DLFP configuration
pHysiX	6:2dc23167c8d8	202	* @see MPU6050_RA_CONFIG
pHysiX	6:2dc23167c8d8	203	* @see MPU6050_CFG_DLPF_CFG_BIT
pHysiX	6:2dc23167c8d8	204	* @see MPU6050_CFG_DLPF_CFG_LENGTH
pHysiX	6:2dc23167c8d8	205	*/
pHysiX	6:2dc23167c8d8	206	uint8_t MPU6050::getDLPFMode()
pHysiX	6:2dc23167c8d8	207	{
pHysiX	6:2dc23167c8d8	208	i2Cdev.readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	209	return buffer[0];
pHysiX	6:2dc23167c8d8	210	}
pHysiX	6:2dc23167c8d8	211	/** Set digital low-pass filter configuration.
pHysiX	6:2dc23167c8d8	212	* @param mode New DLFP configuration setting
pHysiX	6:2dc23167c8d8	213	* @see getDLPFBandwidth()
pHysiX	6:2dc23167c8d8	214	* @see MPU6050_DLPF_BW_256
pHysiX	6:2dc23167c8d8	215	* @see MPU6050_RA_CONFIG
pHysiX	6:2dc23167c8d8	216	* @see MPU6050_CFG_DLPF_CFG_BIT
pHysiX	6:2dc23167c8d8	217	* @see MPU6050_CFG_DLPF_CFG_LENGTH
pHysiX	6:2dc23167c8d8	218	*/
pHysiX	6:2dc23167c8d8	219	void MPU6050::setDLPFMode(uint8_t mode)
pHysiX	6:2dc23167c8d8	220	{
pHysiX	6:2dc23167c8d8	221	i2Cdev.writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode);
pHysiX	6:2dc23167c8d8	222	}
pHysiX	6:2dc23167c8d8	223
pHysiX	6:2dc23167c8d8	224	// GYRO_CONFIG register
pHysiX	6:2dc23167c8d8	225
pHysiX	6:2dc23167c8d8	226	/** Get full-scale gyroscope range.
pHysiX	6:2dc23167c8d8	227	* The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
pHysiX	6:2dc23167c8d8	228	* as described in the table below.
pHysiX	6:2dc23167c8d8	229	*
pHysiX	6:2dc23167c8d8	230	* <pre>
pHysiX	6:2dc23167c8d8	231	* 0 = +/- 250 degrees/sec
pHysiX	6:2dc23167c8d8	232	* 1 = +/- 500 degrees/sec
pHysiX	6:2dc23167c8d8	233	* 2 = +/- 1000 degrees/sec
pHysiX	6:2dc23167c8d8	234	* 3 = +/- 2000 degrees/sec
pHysiX	6:2dc23167c8d8	235	* </pre>
pHysiX	6:2dc23167c8d8	236	*
pHysiX	6:2dc23167c8d8	237	* @return Current full-scale gyroscope range setting
pHysiX	6:2dc23167c8d8	238	* @see MPU6050_GYRO_FS_250
pHysiX	6:2dc23167c8d8	239	* @see MPU6050_RA_GYRO_CONFIG
pHysiX	6:2dc23167c8d8	240	* @see MPU6050_GCONFIG_FS_SEL_BIT
pHysiX	6:2dc23167c8d8	241	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
pHysiX	6:2dc23167c8d8	242	*/
pHysiX	6:2dc23167c8d8	243	uint8_t MPU6050::getFullScaleGyroRange()
pHysiX	6:2dc23167c8d8	244	{
pHysiX	6:2dc23167c8d8	245	i2Cdev.readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	246	return buffer[0];
pHysiX	6:2dc23167c8d8	247	}
pHysiX	6:2dc23167c8d8	248	/** Set full-scale gyroscope range.
pHysiX	6:2dc23167c8d8	249	* @param range New full-scale gyroscope range value
pHysiX	6:2dc23167c8d8	250	* @see getFullScaleRange()
pHysiX	6:2dc23167c8d8	251	* @see MPU6050_GYRO_FS_250
pHysiX	6:2dc23167c8d8	252	* @see MPU6050_RA_GYRO_CONFIG
pHysiX	6:2dc23167c8d8	253	* @see MPU6050_GCONFIG_FS_SEL_BIT
pHysiX	6:2dc23167c8d8	254	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
pHysiX	6:2dc23167c8d8	255	*/
pHysiX	6:2dc23167c8d8	256	void MPU6050::setFullScaleGyroRange(uint8_t range)
pHysiX	6:2dc23167c8d8	257	{
pHysiX	6:2dc23167c8d8	258	i2Cdev.writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range);
pHysiX	6:2dc23167c8d8	259	}
pHysiX	6:2dc23167c8d8	260
pHysiX	6:2dc23167c8d8	261	// ACCEL_CONFIG register
pHysiX	6:2dc23167c8d8	262
pHysiX	6:2dc23167c8d8	263	/** Get self-test enabled setting for accelerometer X axis.
pHysiX	6:2dc23167c8d8	264	* @return Self-test enabled value
pHysiX	6:2dc23167c8d8	265	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	266	*/
pHysiX	6:2dc23167c8d8	267	bool MPU6050::getAccelXSelfTest()
pHysiX	6:2dc23167c8d8	268	{
pHysiX	6:2dc23167c8d8	269	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer);
pHysiX	6:2dc23167c8d8	270	return buffer[0];
pHysiX	6:2dc23167c8d8	271	}
pHysiX	6:2dc23167c8d8	272	/** Get self-test enabled setting for accelerometer X axis.
pHysiX	6:2dc23167c8d8	273	* @param enabled Self-test enabled value
pHysiX	6:2dc23167c8d8	274	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	275	*/
pHysiX	6:2dc23167c8d8	276	void MPU6050::setAccelXSelfTest(bool enabled)
pHysiX	6:2dc23167c8d8	277	{
pHysiX	6:2dc23167c8d8	278	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled);
pHysiX	6:2dc23167c8d8	279	}
pHysiX	6:2dc23167c8d8	280	/** Get self-test enabled value for accelerometer Y axis.
pHysiX	6:2dc23167c8d8	281	* @return Self-test enabled value
pHysiX	6:2dc23167c8d8	282	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	283	*/
pHysiX	6:2dc23167c8d8	284	bool MPU6050::getAccelYSelfTest()
pHysiX	6:2dc23167c8d8	285	{
pHysiX	6:2dc23167c8d8	286	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer);
pHysiX	6:2dc23167c8d8	287	return buffer[0];
pHysiX	6:2dc23167c8d8	288	}
pHysiX	6:2dc23167c8d8	289	/** Get self-test enabled value for accelerometer Y axis.
pHysiX	6:2dc23167c8d8	290	* @param enabled Self-test enabled value
pHysiX	6:2dc23167c8d8	291	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	292	*/
pHysiX	6:2dc23167c8d8	293	void MPU6050::setAccelYSelfTest(bool enabled)
pHysiX	6:2dc23167c8d8	294	{
pHysiX	6:2dc23167c8d8	295	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled);
pHysiX	6:2dc23167c8d8	296	}
pHysiX	6:2dc23167c8d8	297	/** Get self-test enabled value for accelerometer Z axis.
pHysiX	6:2dc23167c8d8	298	* @return Self-test enabled value
pHysiX	6:2dc23167c8d8	299	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	300	*/
pHysiX	6:2dc23167c8d8	301	bool MPU6050::getAccelZSelfTest()
pHysiX	6:2dc23167c8d8	302	{
pHysiX	6:2dc23167c8d8	303	i2Cdev.readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer);
pHysiX	6:2dc23167c8d8	304	return buffer[0];
pHysiX	6:2dc23167c8d8	305	}
pHysiX	6:2dc23167c8d8	306	/** Set self-test enabled value for accelerometer Z axis.
pHysiX	6:2dc23167c8d8	307	* @param enabled Self-test enabled value
pHysiX	6:2dc23167c8d8	308	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	309	*/
pHysiX	6:2dc23167c8d8	310	void MPU6050::setAccelZSelfTest(bool enabled)
pHysiX	6:2dc23167c8d8	311	{
pHysiX	6:2dc23167c8d8	312	i2Cdev.writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled);
pHysiX	6:2dc23167c8d8	313	}
pHysiX	6:2dc23167c8d8	314	/** Get full-scale accelerometer range.
pHysiX	6:2dc23167c8d8	315	* The FS_SEL parameter allows setting the full-scale range of the accelerometer
pHysiX	6:2dc23167c8d8	316	* sensors, as described in the table below.
pHysiX	6:2dc23167c8d8	317	*
pHysiX	6:2dc23167c8d8	318	* <pre>
pHysiX	6:2dc23167c8d8	319	* 0 = +/- 2g
pHysiX	6:2dc23167c8d8	320	* 1 = +/- 4g
pHysiX	6:2dc23167c8d8	321	* 2 = +/- 8g
pHysiX	6:2dc23167c8d8	322	* 3 = +/- 16g
pHysiX	6:2dc23167c8d8	323	* </pre>
pHysiX	6:2dc23167c8d8	324	*
pHysiX	6:2dc23167c8d8	325	* @return Current full-scale accelerometer range setting
pHysiX	6:2dc23167c8d8	326	* @see MPU6050_ACCEL_FS_2
pHysiX	6:2dc23167c8d8	327	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	328	* @see MPU6050_ACONFIG_AFS_SEL_BIT
pHysiX	6:2dc23167c8d8	329	* @see MPU6050_ACONFIG_AFS_SEL_LENGTH
pHysiX	6:2dc23167c8d8	330	*/
pHysiX	6:2dc23167c8d8	331	uint8_t MPU6050::getFullScaleAccelRange()
pHysiX	6:2dc23167c8d8	332	{
pHysiX	6:2dc23167c8d8	333	i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	334	return buffer[0];
pHysiX	6:2dc23167c8d8	335	}
pHysiX	6:2dc23167c8d8	336	/** Set full-scale accelerometer range.
pHysiX	6:2dc23167c8d8	337	* @param range New full-scale accelerometer range setting
pHysiX	6:2dc23167c8d8	338	* @see getFullScaleAccelRange()
pHysiX	6:2dc23167c8d8	339	*/
pHysiX	6:2dc23167c8d8	340	void MPU6050::setFullScaleAccelRange(uint8_t range)
pHysiX	6:2dc23167c8d8	341	{
pHysiX	6:2dc23167c8d8	342	i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range);
pHysiX	6:2dc23167c8d8	343	}
pHysiX	6:2dc23167c8d8	344	/** Get the high-pass filter configuration.
pHysiX	6:2dc23167c8d8	345	* The DHPF is a filter module in the path leading to motion detectors (Free
pHysiX	6:2dc23167c8d8	346	* Fall, Motion threshold, and Zero Motion). The high pass filter output is not
pHysiX	6:2dc23167c8d8	347	* available to the data registers (see Figure in Section 8 of the MPU-6000/
pHysiX	6:2dc23167c8d8	348	* MPU-6050 Product Specification document).
pHysiX	6:2dc23167c8d8	349	*
pHysiX	6:2dc23167c8d8	350	* The high pass filter has three modes:
pHysiX	6:2dc23167c8d8	351	*
pHysiX	6:2dc23167c8d8	352	* <pre>
pHysiX	6:2dc23167c8d8	353	* Reset: The filter output settles to zero within one sample. This
pHysiX	6:2dc23167c8d8	354	* effectively disables the high pass filter. This mode may be toggled
pHysiX	6:2dc23167c8d8	355	* to quickly settle the filter.
pHysiX	6:2dc23167c8d8	356	*
pHysiX	6:2dc23167c8d8	357	* On: The high pass filter will pass signals above the cut off frequency.
pHysiX	6:2dc23167c8d8	358	*
pHysiX	6:2dc23167c8d8	359	* Hold: When triggered, the filter holds the present sample. The filter
pHysiX	6:2dc23167c8d8	360	* output will be the difference between the input sample and the held
pHysiX	6:2dc23167c8d8	361	* sample.
pHysiX	6:2dc23167c8d8	362	* </pre>
pHysiX	6:2dc23167c8d8	363	*
pHysiX	6:2dc23167c8d8	364	* <pre>
pHysiX	6:2dc23167c8d8	365	* ACCEL_HPF \| Filter Mode \| Cut-off Frequency
pHysiX	6:2dc23167c8d8	366	* ----------+-------------+------------------
pHysiX	6:2dc23167c8d8	367	* 0 \| Reset \| None
pHysiX	6:2dc23167c8d8	368	* 1 \| On \| 5Hz
pHysiX	6:2dc23167c8d8	369	* 2 \| On \| 2.5Hz
pHysiX	6:2dc23167c8d8	370	* 3 \| On \| 1.25Hz
pHysiX	6:2dc23167c8d8	371	* 4 \| On \| 0.63Hz
pHysiX	6:2dc23167c8d8	372	* 7 \| Hold \| None
pHysiX	6:2dc23167c8d8	373	* </pre>
pHysiX	6:2dc23167c8d8	374	*
pHysiX	6:2dc23167c8d8	375	* @return Current high-pass filter configuration
pHysiX	6:2dc23167c8d8	376	* @see MPU6050_DHPF_RESET
pHysiX	6:2dc23167c8d8	377	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	378	*/
pHysiX	6:2dc23167c8d8	379	uint8_t MPU6050::getDHPFMode()
pHysiX	6:2dc23167c8d8	380	{
pHysiX	6:2dc23167c8d8	381	i2Cdev.readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	382	return buffer[0];
pHysiX	6:2dc23167c8d8	383	}
pHysiX	6:2dc23167c8d8	384	/** Set the high-pass filter configuration.
pHysiX	6:2dc23167c8d8	385	* @param bandwidth New high-pass filter configuration
pHysiX	6:2dc23167c8d8	386	* @see setDHPFMode()
pHysiX	6:2dc23167c8d8	387	* @see MPU6050_DHPF_RESET
pHysiX	6:2dc23167c8d8	388	* @see MPU6050_RA_ACCEL_CONFIG
pHysiX	6:2dc23167c8d8	389	*/
pHysiX	6:2dc23167c8d8	390	void MPU6050::setDHPFMode(uint8_t bandwidth)
pHysiX	6:2dc23167c8d8	391	{
pHysiX	6:2dc23167c8d8	392	i2Cdev.writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
pHysiX	6:2dc23167c8d8	393	}
pHysiX	6:2dc23167c8d8	394
pHysiX	6:2dc23167c8d8	395	// FF_THR register
pHysiX	6:2dc23167c8d8	396
pHysiX	6:2dc23167c8d8	397	/** Get free-fall event acceleration threshold.
pHysiX	6:2dc23167c8d8	398	* This register configures the detection threshold for Free Fall event
pHysiX	6:2dc23167c8d8	399	* detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
pHysiX	6:2dc23167c8d8	400	* absolute value of the accelerometer measurements for the three axes are each
pHysiX	6:2dc23167c8d8	401	* less than the detection threshold. This condition increments the Free Fall
pHysiX	6:2dc23167c8d8	402	* duration counter (Register 30). The Free Fall interrupt is triggered when the
pHysiX	6:2dc23167c8d8	403	* Free Fall duration counter reaches the time specified in FF_DUR.
pHysiX	6:2dc23167c8d8	404	*
pHysiX	6:2dc23167c8d8	405	* For more details on the Free Fall detection interrupt, see Section 8.2 of the
pHysiX	6:2dc23167c8d8	406	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
pHysiX	6:2dc23167c8d8	407	* 58 of this document.
pHysiX	6:2dc23167c8d8	408	*
pHysiX	6:2dc23167c8d8	409	* @return Current free-fall acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	410	* @see MPU6050_RA_FF_THR
pHysiX	6:2dc23167c8d8	411	*/
pHysiX	6:2dc23167c8d8	412	uint8_t MPU6050::getFreefallDetectionThreshold()
pHysiX	6:2dc23167c8d8	413	{
pHysiX	6:2dc23167c8d8	414	i2Cdev.readByte(devAddr, MPU6050_RA_FF_THR, buffer);
pHysiX	6:2dc23167c8d8	415	return buffer[0];
pHysiX	6:2dc23167c8d8	416	}
pHysiX	6:2dc23167c8d8	417	/** Get free-fall event acceleration threshold.
pHysiX	6:2dc23167c8d8	418	* @param threshold New free-fall acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	419	* @see getFreefallDetectionThreshold()
pHysiX	6:2dc23167c8d8	420	* @see MPU6050_RA_FF_THR
pHysiX	6:2dc23167c8d8	421	*/
pHysiX	6:2dc23167c8d8	422	void MPU6050::setFreefallDetectionThreshold(uint8_t threshold)
pHysiX	6:2dc23167c8d8	423	{
pHysiX	6:2dc23167c8d8	424	i2Cdev.writeByte(devAddr, MPU6050_RA_FF_THR, threshold);
pHysiX	6:2dc23167c8d8	425	}
pHysiX	6:2dc23167c8d8	426
pHysiX	6:2dc23167c8d8	427	// FF_DUR register
pHysiX	6:2dc23167c8d8	428
pHysiX	6:2dc23167c8d8	429	/** Get free-fall event duration threshold.
pHysiX	6:2dc23167c8d8	430	* This register configures the duration counter threshold for Free Fall event
pHysiX	6:2dc23167c8d8	431	* detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
pHysiX	6:2dc23167c8d8	432	* of 1 LSB = 1 ms.
pHysiX	6:2dc23167c8d8	433	*
pHysiX	6:2dc23167c8d8	434	* The Free Fall duration counter increments while the absolute value of the
pHysiX	6:2dc23167c8d8	435	* accelerometer measurements are each less than the detection threshold
pHysiX	6:2dc23167c8d8	436	* (Register 29). The Free Fall interrupt is triggered when the Free Fall
pHysiX	6:2dc23167c8d8	437	* duration counter reaches the time specified in this register.
pHysiX	6:2dc23167c8d8	438	*
pHysiX	6:2dc23167c8d8	439	* For more details on the Free Fall detection interrupt, see Section 8.2 of
pHysiX	6:2dc23167c8d8	440	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
pHysiX	6:2dc23167c8d8	441	* and 58 of this document.
pHysiX	6:2dc23167c8d8	442	*
pHysiX	6:2dc23167c8d8	443	* @return Current free-fall duration threshold value (LSB = 1ms)
pHysiX	6:2dc23167c8d8	444	* @see MPU6050_RA_FF_DUR
pHysiX	6:2dc23167c8d8	445	*/
pHysiX	6:2dc23167c8d8	446	uint8_t MPU6050::getFreefallDetectionDuration()
pHysiX	6:2dc23167c8d8	447	{
pHysiX	6:2dc23167c8d8	448	i2Cdev.readByte(devAddr, MPU6050_RA_FF_DUR, buffer);
pHysiX	6:2dc23167c8d8	449	return buffer[0];
pHysiX	6:2dc23167c8d8	450	}
pHysiX	6:2dc23167c8d8	451	/** Get free-fall event duration threshold.
pHysiX	6:2dc23167c8d8	452	* @param duration New free-fall duration threshold value (LSB = 1ms)
pHysiX	6:2dc23167c8d8	453	* @see getFreefallDetectionDuration()
pHysiX	6:2dc23167c8d8	454	* @see MPU6050_RA_FF_DUR
pHysiX	6:2dc23167c8d8	455	*/
pHysiX	6:2dc23167c8d8	456	void MPU6050::setFreefallDetectionDuration(uint8_t duration)
pHysiX	6:2dc23167c8d8	457	{
pHysiX	6:2dc23167c8d8	458	i2Cdev.writeByte(devAddr, MPU6050_RA_FF_DUR, duration);
pHysiX	6:2dc23167c8d8	459	}
pHysiX	6:2dc23167c8d8	460
pHysiX	6:2dc23167c8d8	461	// MOT_THR register
pHysiX	6:2dc23167c8d8	462
pHysiX	6:2dc23167c8d8	463	/** Get motion detection event acceleration threshold.
pHysiX	6:2dc23167c8d8	464	* This register configures the detection threshold for Motion interrupt
pHysiX	6:2dc23167c8d8	465	* generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
pHysiX	6:2dc23167c8d8	466	* absolute value of any of the accelerometer measurements exceeds this Motion
pHysiX	6:2dc23167c8d8	467	* detection threshold. This condition increments the Motion detection duration
pHysiX	6:2dc23167c8d8	468	* counter (Register 32). The Motion detection interrupt is triggered when the
pHysiX	6:2dc23167c8d8	469	* Motion Detection counter reaches the time count specified in MOT_DUR
pHysiX	6:2dc23167c8d8	470	* (Register 32).
pHysiX	6:2dc23167c8d8	471	*
pHysiX	6:2dc23167c8d8	472	* The Motion interrupt will indicate the axis and polarity of detected motion
pHysiX	6:2dc23167c8d8	473	* in MOT_DETECT_STATUS (Register 97).
pHysiX	6:2dc23167c8d8	474	*
pHysiX	6:2dc23167c8d8	475	* For more details on the Motion detection interrupt, see Section 8.3 of the
pHysiX	6:2dc23167c8d8	476	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
pHysiX	6:2dc23167c8d8	477	* 58 of this document.
pHysiX	6:2dc23167c8d8	478	*
pHysiX	6:2dc23167c8d8	479	* @return Current motion detection acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	480	* @see MPU6050_RA_MOT_THR
pHysiX	6:2dc23167c8d8	481	*/
pHysiX	6:2dc23167c8d8	482	uint8_t MPU6050::getMotionDetectionThreshold()
pHysiX	6:2dc23167c8d8	483	{
pHysiX	6:2dc23167c8d8	484	i2Cdev.readByte(devAddr, MPU6050_RA_MOT_THR, buffer);
pHysiX	6:2dc23167c8d8	485	return buffer[0];
pHysiX	6:2dc23167c8d8	486	}
pHysiX	6:2dc23167c8d8	487	/** Set free-fall event acceleration threshold.
pHysiX	6:2dc23167c8d8	488	* @param threshold New motion detection acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	489	* @see getMotionDetectionThreshold()
pHysiX	6:2dc23167c8d8	490	* @see MPU6050_RA_MOT_THR
pHysiX	6:2dc23167c8d8	491	*/
pHysiX	6:2dc23167c8d8	492	void MPU6050::setMotionDetectionThreshold(uint8_t threshold)
pHysiX	6:2dc23167c8d8	493	{
pHysiX	6:2dc23167c8d8	494	i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_THR, threshold);
pHysiX	6:2dc23167c8d8	495	}
pHysiX	6:2dc23167c8d8	496
pHysiX	6:2dc23167c8d8	497	// MOT_DUR register
pHysiX	6:2dc23167c8d8	498
pHysiX	6:2dc23167c8d8	499	/** Get motion detection event duration threshold.
pHysiX	6:2dc23167c8d8	500	* This register configures the duration counter threshold for Motion interrupt
pHysiX	6:2dc23167c8d8	501	* generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
pHysiX	6:2dc23167c8d8	502	* of 1LSB = 1ms. The Motion detection duration counter increments when the
pHysiX	6:2dc23167c8d8	503	* absolute value of any of the accelerometer measurements exceeds the Motion
pHysiX	6:2dc23167c8d8	504	* detection threshold (Register 31). The Motion detection interrupt is
pHysiX	6:2dc23167c8d8	505	* triggered when the Motion detection counter reaches the time count specified
pHysiX	6:2dc23167c8d8	506	* in this register.
pHysiX	6:2dc23167c8d8	507	*
pHysiX	6:2dc23167c8d8	508	* For more details on the Motion detection interrupt, see Section 8.3 of the
pHysiX	6:2dc23167c8d8	509	* MPU-6000/MPU-6050 Product Specification document.
pHysiX	6:2dc23167c8d8	510	*
pHysiX	6:2dc23167c8d8	511	* @return Current motion detection duration threshold value (LSB = 1ms)
pHysiX	6:2dc23167c8d8	512	* @see MPU6050_RA_MOT_DUR
pHysiX	6:2dc23167c8d8	513	*/
pHysiX	6:2dc23167c8d8	514	uint8_t MPU6050::getMotionDetectionDuration()
pHysiX	6:2dc23167c8d8	515	{
pHysiX	6:2dc23167c8d8	516	i2Cdev.readByte(devAddr, MPU6050_RA_MOT_DUR, buffer);
pHysiX	6:2dc23167c8d8	517	return buffer[0];
pHysiX	6:2dc23167c8d8	518	}
pHysiX	6:2dc23167c8d8	519	/** Set motion detection event duration threshold.
pHysiX	6:2dc23167c8d8	520	* @param duration New motion detection duration threshold value (LSB = 1ms)
pHysiX	6:2dc23167c8d8	521	* @see getMotionDetectionDuration()
pHysiX	6:2dc23167c8d8	522	* @see MPU6050_RA_MOT_DUR
pHysiX	6:2dc23167c8d8	523	*/
pHysiX	6:2dc23167c8d8	524	void MPU6050::setMotionDetectionDuration(uint8_t duration)
pHysiX	6:2dc23167c8d8	525	{
pHysiX	6:2dc23167c8d8	526	i2Cdev.writeByte(devAddr, MPU6050_RA_MOT_DUR, duration);
pHysiX	6:2dc23167c8d8	527	}
pHysiX	6:2dc23167c8d8	528
pHysiX	6:2dc23167c8d8	529	// ZRMOT_THR register
pHysiX	6:2dc23167c8d8	530
pHysiX	6:2dc23167c8d8	531	/** Get zero motion detection event acceleration threshold.
pHysiX	6:2dc23167c8d8	532	* This register configures the detection threshold for Zero Motion interrupt
pHysiX	6:2dc23167c8d8	533	* generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
pHysiX	6:2dc23167c8d8	534	* the absolute value of the accelerometer measurements for the 3 axes are each
pHysiX	6:2dc23167c8d8	535	* less than the detection threshold. This condition increments the Zero Motion
pHysiX	6:2dc23167c8d8	536	* duration counter (Register 34). The Zero Motion interrupt is triggered when
pHysiX	6:2dc23167c8d8	537	* the Zero Motion duration counter reaches the time count specified in
pHysiX	6:2dc23167c8d8	538	* ZRMOT_DUR (Register 34).
pHysiX	6:2dc23167c8d8	539	*
pHysiX	6:2dc23167c8d8	540	* Unlike Free Fall or Motion detection, Zero Motion detection triggers an
pHysiX	6:2dc23167c8d8	541	* interrupt both when Zero Motion is first detected and when Zero Motion is no
pHysiX	6:2dc23167c8d8	542	* longer detected.
pHysiX	6:2dc23167c8d8	543	*
pHysiX	6:2dc23167c8d8	544	* When a zero motion event is detected, a Zero Motion Status will be indicated
pHysiX	6:2dc23167c8d8	545	* in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
pHysiX	6:2dc23167c8d8	546	* condition is detected, the status bit is set to 1. When a zero-motion-to-
pHysiX	6:2dc23167c8d8	547	* motion condition is detected, the status bit is set to 0.
pHysiX	6:2dc23167c8d8	548	*
pHysiX	6:2dc23167c8d8	549	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
pHysiX	6:2dc23167c8d8	550	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
pHysiX	6:2dc23167c8d8	551	* and 58 of this document.
pHysiX	6:2dc23167c8d8	552	*
pHysiX	6:2dc23167c8d8	553	* @return Current zero motion detection acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	554	* @see MPU6050_RA_ZRMOT_THR
pHysiX	6:2dc23167c8d8	555	*/
pHysiX	6:2dc23167c8d8	556	uint8_t MPU6050::getZeroMotionDetectionThreshold()
pHysiX	6:2dc23167c8d8	557	{
pHysiX	6:2dc23167c8d8	558	i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer);
pHysiX	6:2dc23167c8d8	559	return buffer[0];
pHysiX	6:2dc23167c8d8	560	}
pHysiX	6:2dc23167c8d8	561	/** Set zero motion detection event acceleration threshold.
pHysiX	6:2dc23167c8d8	562	* @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
pHysiX	6:2dc23167c8d8	563	* @see getZeroMotionDetectionThreshold()
pHysiX	6:2dc23167c8d8	564	* @see MPU6050_RA_ZRMOT_THR
pHysiX	6:2dc23167c8d8	565	*/
pHysiX	6:2dc23167c8d8	566	void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold)
pHysiX	6:2dc23167c8d8	567	{
pHysiX	6:2dc23167c8d8	568	i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold);
pHysiX	6:2dc23167c8d8	569	}
pHysiX	6:2dc23167c8d8	570
pHysiX	6:2dc23167c8d8	571	// ZRMOT_DUR register
pHysiX	6:2dc23167c8d8	572
pHysiX	6:2dc23167c8d8	573	/** Get zero motion detection event duration threshold.
pHysiX	6:2dc23167c8d8	574	* This register configures the duration counter threshold for Zero Motion
pHysiX	6:2dc23167c8d8	575	* interrupt generation. The duration counter ticks at 16 Hz, therefore
pHysiX	6:2dc23167c8d8	576	* ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
pHysiX	6:2dc23167c8d8	577	* increments while the absolute value of the accelerometer measurements are
pHysiX	6:2dc23167c8d8	578	* each less than the detection threshold (Register 33). The Zero Motion
pHysiX	6:2dc23167c8d8	579	* interrupt is triggered when the Zero Motion duration counter reaches the time
pHysiX	6:2dc23167c8d8	580	* count specified in this register.
pHysiX	6:2dc23167c8d8	581	*
pHysiX	6:2dc23167c8d8	582	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
pHysiX	6:2dc23167c8d8	583	* the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56
pHysiX	6:2dc23167c8d8	584	* and 58 of this document.
pHysiX	6:2dc23167c8d8	585	*
pHysiX	6:2dc23167c8d8	586	* @return Current zero motion detection duration threshold value (LSB = 64ms)
pHysiX	6:2dc23167c8d8	587	* @see MPU6050_RA_ZRMOT_DUR
pHysiX	6:2dc23167c8d8	588	*/
pHysiX	6:2dc23167c8d8	589	uint8_t MPU6050::getZeroMotionDetectionDuration()
pHysiX	6:2dc23167c8d8	590	{
pHysiX	6:2dc23167c8d8	591	i2Cdev.readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer);
pHysiX	6:2dc23167c8d8	592	return buffer[0];
pHysiX	6:2dc23167c8d8	593	}
pHysiX	6:2dc23167c8d8	594	/** Set zero motion detection event duration threshold.
pHysiX	6:2dc23167c8d8	595	* @param duration New zero motion detection duration threshold value (LSB = 1ms)
pHysiX	6:2dc23167c8d8	596	* @see getZeroMotionDetectionDuration()
pHysiX	6:2dc23167c8d8	597	* @see MPU6050_RA_ZRMOT_DUR
pHysiX	6:2dc23167c8d8	598	*/
pHysiX	6:2dc23167c8d8	599	void MPU6050::setZeroMotionDetectionDuration(uint8_t duration)
pHysiX	6:2dc23167c8d8	600	{
pHysiX	6:2dc23167c8d8	601	i2Cdev.writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration);
pHysiX	6:2dc23167c8d8	602	}
pHysiX	6:2dc23167c8d8	603
pHysiX	6:2dc23167c8d8	604	// FIFO_EN register
pHysiX	6:2dc23167c8d8	605
pHysiX	6:2dc23167c8d8	606	/** Get temperature FIFO enabled value.
pHysiX	6:2dc23167c8d8	607	* When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
pHysiX	6:2dc23167c8d8	608	* 66) to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	609	* @return Current temperature FIFO enabled value
pHysiX	6:2dc23167c8d8	610	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	611	*/
pHysiX	6:2dc23167c8d8	612	bool MPU6050::getTempFIFOEnabled()
pHysiX	6:2dc23167c8d8	613	{
pHysiX	6:2dc23167c8d8	614	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	615	return buffer[0];
pHysiX	6:2dc23167c8d8	616	}
pHysiX	6:2dc23167c8d8	617	/** Set temperature FIFO enabled value.
pHysiX	6:2dc23167c8d8	618	* @param enabled New temperature FIFO enabled value
pHysiX	6:2dc23167c8d8	619	* @see getTempFIFOEnabled()
pHysiX	6:2dc23167c8d8	620	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	621	*/
pHysiX	6:2dc23167c8d8	622	void MPU6050::setTempFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	623	{
pHysiX	6:2dc23167c8d8	624	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	625	}
pHysiX	6:2dc23167c8d8	626	/** Get gyroscope X-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	627	* When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
pHysiX	6:2dc23167c8d8	628	* 68) to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	629	* @return Current gyroscope X-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	630	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	631	*/
pHysiX	6:2dc23167c8d8	632	bool MPU6050::getXGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	633	{
pHysiX	6:2dc23167c8d8	634	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	635	return buffer[0];
pHysiX	6:2dc23167c8d8	636	}
pHysiX	6:2dc23167c8d8	637	/** Set gyroscope X-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	638	* @param enabled New gyroscope X-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	639	* @see getXGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	640	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	641	*/
pHysiX	6:2dc23167c8d8	642	void MPU6050::setXGyroFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	643	{
pHysiX	6:2dc23167c8d8	644	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	645	}
pHysiX	6:2dc23167c8d8	646	/** Get gyroscope Y-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	647	* When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
pHysiX	6:2dc23167c8d8	648	* 70) to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	649	* @return Current gyroscope Y-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	650	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	651	*/
pHysiX	6:2dc23167c8d8	652	bool MPU6050::getYGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	653	{
pHysiX	6:2dc23167c8d8	654	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	655	return buffer[0];
pHysiX	6:2dc23167c8d8	656	}
pHysiX	6:2dc23167c8d8	657	/** Set gyroscope Y-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	658	* @param enabled New gyroscope Y-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	659	* @see getYGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	660	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	661	*/
pHysiX	6:2dc23167c8d8	662	void MPU6050::setYGyroFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	663	{
pHysiX	6:2dc23167c8d8	664	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	665	}
pHysiX	6:2dc23167c8d8	666	/** Get gyroscope Z-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	667	* When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
pHysiX	6:2dc23167c8d8	668	* 72) to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	669	* @return Current gyroscope Z-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	670	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	671	*/
pHysiX	6:2dc23167c8d8	672	bool MPU6050::getZGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	673	{
pHysiX	6:2dc23167c8d8	674	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	675	return buffer[0];
pHysiX	6:2dc23167c8d8	676	}
pHysiX	6:2dc23167c8d8	677	/** Set gyroscope Z-axis FIFO enabled value.
pHysiX	6:2dc23167c8d8	678	* @param enabled New gyroscope Z-axis FIFO enabled value
pHysiX	6:2dc23167c8d8	679	* @see getZGyroFIFOEnabled()
pHysiX	6:2dc23167c8d8	680	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	681	*/
pHysiX	6:2dc23167c8d8	682	void MPU6050::setZGyroFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	683	{
pHysiX	6:2dc23167c8d8	684	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	685	}
pHysiX	6:2dc23167c8d8	686	/** Get accelerometer FIFO enabled value.
pHysiX	6:2dc23167c8d8	687	* When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
pHysiX	6:2dc23167c8d8	688	* ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
pHysiX	6:2dc23167c8d8	689	* written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	690	* @return Current accelerometer FIFO enabled value
pHysiX	6:2dc23167c8d8	691	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	692	*/
pHysiX	6:2dc23167c8d8	693	bool MPU6050::getAccelFIFOEnabled()
pHysiX	6:2dc23167c8d8	694	{
pHysiX	6:2dc23167c8d8	695	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	696	return buffer[0];
pHysiX	6:2dc23167c8d8	697	}
pHysiX	6:2dc23167c8d8	698	/** Set accelerometer FIFO enabled value.
pHysiX	6:2dc23167c8d8	699	* @param enabled New accelerometer FIFO enabled value
pHysiX	6:2dc23167c8d8	700	* @see getAccelFIFOEnabled()
pHysiX	6:2dc23167c8d8	701	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	702	*/
pHysiX	6:2dc23167c8d8	703	void MPU6050::setAccelFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	704	{
pHysiX	6:2dc23167c8d8	705	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	706	}
pHysiX	6:2dc23167c8d8	707	/** Get Slave 2 FIFO enabled value.
pHysiX	6:2dc23167c8d8	708	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
pHysiX	6:2dc23167c8d8	709	* associated with Slave 2 to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	710	* @return Current Slave 2 FIFO enabled value
pHysiX	6:2dc23167c8d8	711	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	712	*/
pHysiX	6:2dc23167c8d8	713	bool MPU6050::getSlave2FIFOEnabled()
pHysiX	6:2dc23167c8d8	714	{
pHysiX	6:2dc23167c8d8	715	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	716	return buffer[0];
pHysiX	6:2dc23167c8d8	717	}
pHysiX	6:2dc23167c8d8	718	/** Set Slave 2 FIFO enabled value.
pHysiX	6:2dc23167c8d8	719	* @param enabled New Slave 2 FIFO enabled value
pHysiX	6:2dc23167c8d8	720	* @see getSlave2FIFOEnabled()
pHysiX	6:2dc23167c8d8	721	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	722	*/
pHysiX	6:2dc23167c8d8	723	void MPU6050::setSlave2FIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	724	{
pHysiX	6:2dc23167c8d8	725	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	726	}
pHysiX	6:2dc23167c8d8	727	/** Get Slave 1 FIFO enabled value.
pHysiX	6:2dc23167c8d8	728	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
pHysiX	6:2dc23167c8d8	729	* associated with Slave 1 to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	730	* @return Current Slave 1 FIFO enabled value
pHysiX	6:2dc23167c8d8	731	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	732	*/
pHysiX	6:2dc23167c8d8	733	bool MPU6050::getSlave1FIFOEnabled()
pHysiX	6:2dc23167c8d8	734	{
pHysiX	6:2dc23167c8d8	735	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	736	return buffer[0];
pHysiX	6:2dc23167c8d8	737	}
pHysiX	6:2dc23167c8d8	738	/** Set Slave 1 FIFO enabled value.
pHysiX	6:2dc23167c8d8	739	* @param enabled New Slave 1 FIFO enabled value
pHysiX	6:2dc23167c8d8	740	* @see getSlave1FIFOEnabled()
pHysiX	6:2dc23167c8d8	741	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	742	*/
pHysiX	6:2dc23167c8d8	743	void MPU6050::setSlave1FIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	744	{
pHysiX	6:2dc23167c8d8	745	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	746	}
pHysiX	6:2dc23167c8d8	747	/** Get Slave 0 FIFO enabled value.
pHysiX	6:2dc23167c8d8	748	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
pHysiX	6:2dc23167c8d8	749	* associated with Slave 0 to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	750	* @return Current Slave 0 FIFO enabled value
pHysiX	6:2dc23167c8d8	751	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	752	*/
pHysiX	6:2dc23167c8d8	753	bool MPU6050::getSlave0FIFOEnabled()
pHysiX	6:2dc23167c8d8	754	{
pHysiX	6:2dc23167c8d8	755	i2Cdev.readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	756	return buffer[0];
pHysiX	6:2dc23167c8d8	757	}
pHysiX	6:2dc23167c8d8	758	/** Set Slave 0 FIFO enabled value.
pHysiX	6:2dc23167c8d8	759	* @param enabled New Slave 0 FIFO enabled value
pHysiX	6:2dc23167c8d8	760	* @see getSlave0FIFOEnabled()
pHysiX	6:2dc23167c8d8	761	* @see MPU6050_RA_FIFO_EN
pHysiX	6:2dc23167c8d8	762	*/
pHysiX	6:2dc23167c8d8	763	void MPU6050::setSlave0FIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	764	{
pHysiX	6:2dc23167c8d8	765	i2Cdev.writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	766	}
pHysiX	6:2dc23167c8d8	767
pHysiX	6:2dc23167c8d8	768	// I2C_MST_CTRL register
pHysiX	6:2dc23167c8d8	769
pHysiX	6:2dc23167c8d8	770	/** Get multi-master enabled value.
pHysiX	6:2dc23167c8d8	771	* Multi-master capability allows multiple I2C masters to operate on the same
pHysiX	6:2dc23167c8d8	772	* bus. In circuits where multi-master capability is required, set MULT_MST_EN
pHysiX	6:2dc23167c8d8	773	* to 1. This will increase current drawn by approximately 30uA.
pHysiX	6:2dc23167c8d8	774	*
pHysiX	6:2dc23167c8d8	775	* In circuits where multi-master capability is required, the state of the I2C
pHysiX	6:2dc23167c8d8	776	* bus must always be monitored by each separate I2C Master. Before an I2C
pHysiX	6:2dc23167c8d8	777	* Master can assume arbitration of the bus, it must first confirm that no other
pHysiX	6:2dc23167c8d8	778	* I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
pHysiX	6:2dc23167c8d8	779	* MPU-60X0's bus arbitration detection logic is turned on, enabling it to
pHysiX	6:2dc23167c8d8	780	* detect when the bus is available.
pHysiX	6:2dc23167c8d8	781	*
pHysiX	6:2dc23167c8d8	782	* @return Current multi-master enabled value
pHysiX	6:2dc23167c8d8	783	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	784	*/
pHysiX	6:2dc23167c8d8	785	bool MPU6050::getMultiMasterEnabled()
pHysiX	6:2dc23167c8d8	786	{
pHysiX	6:2dc23167c8d8	787	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	788	return buffer[0];
pHysiX	6:2dc23167c8d8	789	}
pHysiX	6:2dc23167c8d8	790	/** Set multi-master enabled value.
pHysiX	6:2dc23167c8d8	791	* @param enabled New multi-master enabled value
pHysiX	6:2dc23167c8d8	792	* @see getMultiMasterEnabled()
pHysiX	6:2dc23167c8d8	793	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	794	*/
pHysiX	6:2dc23167c8d8	795	void MPU6050::setMultiMasterEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	796	{
pHysiX	6:2dc23167c8d8	797	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	798	}
pHysiX	6:2dc23167c8d8	799	/** Get wait-for-external-sensor-data enabled value.
pHysiX	6:2dc23167c8d8	800	* When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
pHysiX	6:2dc23167c8d8	801	* delayed until External Sensor data from the Slave Devices are loaded into the
pHysiX	6:2dc23167c8d8	802	* EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
pHysiX	6:2dc23167c8d8	803	* data (i.e. from gyro and accel) and external sensor data have been loaded to
pHysiX	6:2dc23167c8d8	804	* their respective data registers (i.e. the data is synced) when the Data Ready
pHysiX	6:2dc23167c8d8	805	* interrupt is triggered.
pHysiX	6:2dc23167c8d8	806	*
pHysiX	6:2dc23167c8d8	807	* @return Current wait-for-external-sensor-data enabled value
pHysiX	6:2dc23167c8d8	808	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	809	*/
pHysiX	6:2dc23167c8d8	810	bool MPU6050::getWaitForExternalSensorEnabled()
pHysiX	6:2dc23167c8d8	811	{
pHysiX	6:2dc23167c8d8	812	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer);
pHysiX	6:2dc23167c8d8	813	return buffer[0];
pHysiX	6:2dc23167c8d8	814	}
pHysiX	6:2dc23167c8d8	815	/** Set wait-for-external-sensor-data enabled value.
pHysiX	6:2dc23167c8d8	816	* @param enabled New wait-for-external-sensor-data enabled value
pHysiX	6:2dc23167c8d8	817	* @see getWaitForExternalSensorEnabled()
pHysiX	6:2dc23167c8d8	818	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	819	*/
pHysiX	6:2dc23167c8d8	820	void MPU6050::setWaitForExternalSensorEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	821	{
pHysiX	6:2dc23167c8d8	822	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled);
pHysiX	6:2dc23167c8d8	823	}
pHysiX	6:2dc23167c8d8	824	/** Get Slave 3 FIFO enabled value.
pHysiX	6:2dc23167c8d8	825	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
pHysiX	6:2dc23167c8d8	826	* associated with Slave 3 to be written into the FIFO buffer.
pHysiX	6:2dc23167c8d8	827	* @return Current Slave 3 FIFO enabled value
pHysiX	6:2dc23167c8d8	828	* @see MPU6050_RA_MST_CTRL
pHysiX	6:2dc23167c8d8	829	*/
pHysiX	6:2dc23167c8d8	830	bool MPU6050::getSlave3FIFOEnabled()
pHysiX	6:2dc23167c8d8	831	{
pHysiX	6:2dc23167c8d8	832	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	833	return buffer[0];
pHysiX	6:2dc23167c8d8	834	}
pHysiX	6:2dc23167c8d8	835	/** Set Slave 3 FIFO enabled value.
pHysiX	6:2dc23167c8d8	836	* @param enabled New Slave 3 FIFO enabled value
pHysiX	6:2dc23167c8d8	837	* @see getSlave3FIFOEnabled()
pHysiX	6:2dc23167c8d8	838	* @see MPU6050_RA_MST_CTRL
pHysiX	6:2dc23167c8d8	839	*/
pHysiX	6:2dc23167c8d8	840	void MPU6050::setSlave3FIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	841	{
pHysiX	6:2dc23167c8d8	842	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	843	}
pHysiX	6:2dc23167c8d8	844	/** Get slave read/write transition enabled value.
pHysiX	6:2dc23167c8d8	845	* The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
pHysiX	6:2dc23167c8d8	846	* read to the next slave read. If the bit equals 0, there will be a restart
pHysiX	6:2dc23167c8d8	847	* between reads. If the bit equals 1, there will be a stop followed by a start
pHysiX	6:2dc23167c8d8	848	* of the following read. When a write transaction follows a read transaction,
pHysiX	6:2dc23167c8d8	849	* the stop followed by a start of the successive write will be always used.
pHysiX	6:2dc23167c8d8	850	*
pHysiX	6:2dc23167c8d8	851	* @return Current slave read/write transition enabled value
pHysiX	6:2dc23167c8d8	852	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	853	*/
pHysiX	6:2dc23167c8d8	854	bool MPU6050::getSlaveReadWriteTransitionEnabled()
pHysiX	6:2dc23167c8d8	855	{
pHysiX	6:2dc23167c8d8	856	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer);
pHysiX	6:2dc23167c8d8	857	return buffer[0];
pHysiX	6:2dc23167c8d8	858	}
pHysiX	6:2dc23167c8d8	859	/** Set slave read/write transition enabled value.
pHysiX	6:2dc23167c8d8	860	* @param enabled New slave read/write transition enabled value
pHysiX	6:2dc23167c8d8	861	* @see getSlaveReadWriteTransitionEnabled()
pHysiX	6:2dc23167c8d8	862	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	863	*/
pHysiX	6:2dc23167c8d8	864	void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	865	{
pHysiX	6:2dc23167c8d8	866	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled);
pHysiX	6:2dc23167c8d8	867	}
pHysiX	6:2dc23167c8d8	868	/** Get I2C master clock speed.
pHysiX	6:2dc23167c8d8	869	* I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
pHysiX	6:2dc23167c8d8	870	* MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
pHysiX	6:2dc23167c8d8	871	* the following table:
pHysiX	6:2dc23167c8d8	872	*
pHysiX	6:2dc23167c8d8	873	* <pre>
pHysiX	6:2dc23167c8d8	874	* I2C_MST_CLK \| I2C Master Clock Speed \| 8MHz Clock Divider
pHysiX	6:2dc23167c8d8	875	* ------------+------------------------+-------------------
pHysiX	6:2dc23167c8d8	876	* 0 \| 348kHz \| 23
pHysiX	6:2dc23167c8d8	877	* 1 \| 333kHz \| 24
pHysiX	6:2dc23167c8d8	878	* 2 \| 320kHz \| 25
pHysiX	6:2dc23167c8d8	879	* 3 \| 308kHz \| 26
pHysiX	6:2dc23167c8d8	880	* 4 \| 296kHz \| 27
pHysiX	6:2dc23167c8d8	881	* 5 \| 286kHz \| 28
pHysiX	6:2dc23167c8d8	882	* 6 \| 276kHz \| 29
pHysiX	6:2dc23167c8d8	883	* 7 \| 267kHz \| 30
pHysiX	6:2dc23167c8d8	884	* 8 \| 258kHz \| 31
pHysiX	6:2dc23167c8d8	885	* 9 \| 500kHz \| 16
pHysiX	6:2dc23167c8d8	886	* 10 \| 471kHz \| 17
pHysiX	6:2dc23167c8d8	887	* 11 \| 444kHz \| 18
pHysiX	6:2dc23167c8d8	888	* 12 \| 421kHz \| 19
pHysiX	6:2dc23167c8d8	889	* 13 \| 400kHz \| 20
pHysiX	6:2dc23167c8d8	890	* 14 \| 381kHz \| 21
pHysiX	6:2dc23167c8d8	891	* 15 \| 364kHz \| 22
pHysiX	6:2dc23167c8d8	892	* </pre>
pHysiX	6:2dc23167c8d8	893	*
pHysiX	6:2dc23167c8d8	894	* @return Current I2C master clock speed
pHysiX	6:2dc23167c8d8	895	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	896	*/
pHysiX	6:2dc23167c8d8	897	uint8_t MPU6050::getMasterClockSpeed()
pHysiX	6:2dc23167c8d8	898	{
pHysiX	6:2dc23167c8d8	899	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	900	return buffer[0];
pHysiX	6:2dc23167c8d8	901	}
pHysiX	6:2dc23167c8d8	902	/** Set I2C master clock speed.
pHysiX	6:2dc23167c8d8	903	* @reparam speed Current I2C master clock speed
pHysiX	6:2dc23167c8d8	904	* @see MPU6050_RA_I2C_MST_CTRL
pHysiX	6:2dc23167c8d8	905	*/
pHysiX	6:2dc23167c8d8	906	void MPU6050::setMasterClockSpeed(uint8_t speed)
pHysiX	6:2dc23167c8d8	907	{
pHysiX	6:2dc23167c8d8	908	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed);
pHysiX	6:2dc23167c8d8	909	}
pHysiX	6:2dc23167c8d8	910
pHysiX	6:2dc23167c8d8	911	// I2C_SLV* registers (Slave 0-3)
pHysiX	6:2dc23167c8d8	912
pHysiX	6:2dc23167c8d8	913	/** Get the I2C address of the specified slave (0-3).
pHysiX	6:2dc23167c8d8	914	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
pHysiX	6:2dc23167c8d8	915	* operation, and if it is cleared, then it's a write operation. The remaining
pHysiX	6:2dc23167c8d8	916	* bits (6-0) are the 7-bit device address of the slave device.
pHysiX	6:2dc23167c8d8	917	*
pHysiX	6:2dc23167c8d8	918	* In read mode, the result of the read is placed in the lowest available
pHysiX	6:2dc23167c8d8	919	* EXT_SENS_DATA register. For further information regarding the allocation of
pHysiX	6:2dc23167c8d8	920	* read results, please refer to the EXT_SENS_DATA register description
pHysiX	6:2dc23167c8d8	921	* (Registers 73 - 96).
pHysiX	6:2dc23167c8d8	922	*
pHysiX	6:2dc23167c8d8	923	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
pHysiX	6:2dc23167c8d8	924	* characteristics, and so it has its own functions (getSlave4* and setSlave4*).
pHysiX	6:2dc23167c8d8	925	*
pHysiX	6:2dc23167c8d8	926	* I2C data transactions are performed at the Sample Rate, as defined in
pHysiX	6:2dc23167c8d8	927	* Register 25. The user is responsible for ensuring that I2C data transactions
pHysiX	6:2dc23167c8d8	928	* to and from each enabled Slave can be completed within a single period of the
pHysiX	6:2dc23167c8d8	929	* Sample Rate.
pHysiX	6:2dc23167c8d8	930	*
pHysiX	6:2dc23167c8d8	931	* The I2C slave access rate can be reduced relative to the Sample Rate. This
pHysiX	6:2dc23167c8d8	932	* reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
pHysiX	6:2dc23167c8d8	933	* slave's access rate is reduced relative to the Sample Rate is determined by
pHysiX	6:2dc23167c8d8	934	* I2C_MST_DELAY_CTRL (Register 103).
pHysiX	6:2dc23167c8d8	935	*
pHysiX	6:2dc23167c8d8	936	* The processing order for the slaves is fixed. The sequence followed for
pHysiX	6:2dc23167c8d8	937	* processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
pHysiX	6:2dc23167c8d8	938	* particular Slave is disabled it will be skipped.
pHysiX	6:2dc23167c8d8	939	*
pHysiX	6:2dc23167c8d8	940	* Each slave can either be accessed at the sample rate or at a reduced sample
pHysiX	6:2dc23167c8d8	941	* rate. In a case where some slaves are accessed at the Sample Rate and some
pHysiX	6:2dc23167c8d8	942	* slaves are accessed at the reduced rate, the sequence of accessing the slaves
pHysiX	6:2dc23167c8d8	943	* (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
pHysiX	6:2dc23167c8d8	944	* be skipped if their access rate dictates that they should not be accessed
pHysiX	6:2dc23167c8d8	945	* during that particular cycle. For further information regarding the reduced
pHysiX	6:2dc23167c8d8	946	* access rate, please refer to Register 52. Whether a slave is accessed at the
pHysiX	6:2dc23167c8d8	947	* Sample Rate or at the reduced rate is determined by the Delay Enable bits in
pHysiX	6:2dc23167c8d8	948	* Register 103.
pHysiX	6:2dc23167c8d8	949	*
pHysiX	6:2dc23167c8d8	950	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	951	* @return Current address for specified slave
pHysiX	6:2dc23167c8d8	952	* @see MPU6050_RA_I2C_SLV0_ADDR
pHysiX	6:2dc23167c8d8	953	*/
pHysiX	6:2dc23167c8d8	954	uint8_t MPU6050::getSlaveAddress(uint8_t num)
pHysiX	6:2dc23167c8d8	955	{
pHysiX	6:2dc23167c8d8	956	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	957	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer);
pHysiX	6:2dc23167c8d8	958	return buffer[0];
pHysiX	6:2dc23167c8d8	959	}
pHysiX	6:2dc23167c8d8	960	/** Set the I2C address of the specified slave (0-3).
pHysiX	6:2dc23167c8d8	961	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	962	* @param address New address for specified slave
pHysiX	6:2dc23167c8d8	963	* @see getSlaveAddress()
pHysiX	6:2dc23167c8d8	964	* @see MPU6050_RA_I2C_SLV0_ADDR
pHysiX	6:2dc23167c8d8	965	*/
pHysiX	6:2dc23167c8d8	966	void MPU6050::setSlaveAddress(uint8_t num, uint8_t address)
pHysiX	6:2dc23167c8d8	967	{
pHysiX	6:2dc23167c8d8	968	if (num > 3) return;
pHysiX	6:2dc23167c8d8	969	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address);
pHysiX	6:2dc23167c8d8	970	}
pHysiX	6:2dc23167c8d8	971	/** Get the active internal register for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	972	* Read/write operations for this slave will be done to whatever internal
pHysiX	6:2dc23167c8d8	973	* register address is stored in this MPU register.
pHysiX	6:2dc23167c8d8	974	*
pHysiX	6:2dc23167c8d8	975	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
pHysiX	6:2dc23167c8d8	976	* characteristics, and so it has its own functions.
pHysiX	6:2dc23167c8d8	977	*
pHysiX	6:2dc23167c8d8	978	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	979	* @return Current active register for specified slave
pHysiX	6:2dc23167c8d8	980	* @see MPU6050_RA_I2C_SLV0_REG
pHysiX	6:2dc23167c8d8	981	*/
pHysiX	6:2dc23167c8d8	982	uint8_t MPU6050::getSlaveRegister(uint8_t num)
pHysiX	6:2dc23167c8d8	983	{
pHysiX	6:2dc23167c8d8	984	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	985	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer);
pHysiX	6:2dc23167c8d8	986	return buffer[0];
pHysiX	6:2dc23167c8d8	987	}
pHysiX	6:2dc23167c8d8	988	/** Set the active internal register for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	989	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	990	* @param reg New active register for specified slave
pHysiX	6:2dc23167c8d8	991	* @see getSlaveRegister()
pHysiX	6:2dc23167c8d8	992	* @see MPU6050_RA_I2C_SLV0_REG
pHysiX	6:2dc23167c8d8	993	*/
pHysiX	6:2dc23167c8d8	994	void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg)
pHysiX	6:2dc23167c8d8	995	{
pHysiX	6:2dc23167c8d8	996	if (num > 3) return;
pHysiX	6:2dc23167c8d8	997	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg);
pHysiX	6:2dc23167c8d8	998	}
pHysiX	6:2dc23167c8d8	999	/** Get the enabled value for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1000	* When set to 1, this bit enables Slave 0 for data transfer operations. When
pHysiX	6:2dc23167c8d8	1001	* cleared to 0, this bit disables Slave 0 from data transfer operations.
pHysiX	6:2dc23167c8d8	1002	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1003	* @return Current enabled value for specified slave
pHysiX	6:2dc23167c8d8	1004	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1005	*/
pHysiX	6:2dc23167c8d8	1006	bool MPU6050::getSlaveEnabled(uint8_t num)
pHysiX	6:2dc23167c8d8	1007	{
pHysiX	6:2dc23167c8d8	1008	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	1009	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1010	return buffer[0];
pHysiX	6:2dc23167c8d8	1011	}
pHysiX	6:2dc23167c8d8	1012	/** Set the enabled value for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1013	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1014	* @param enabled New enabled value for specified slave
pHysiX	6:2dc23167c8d8	1015	* @see getSlaveEnabled()
pHysiX	6:2dc23167c8d8	1016	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1017	*/
pHysiX	6:2dc23167c8d8	1018	void MPU6050::setSlaveEnabled(uint8_t num, bool enabled)
pHysiX	6:2dc23167c8d8	1019	{
pHysiX	6:2dc23167c8d8	1020	if (num > 3) return;
pHysiX	6:2dc23167c8d8	1021	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1022	}
pHysiX	6:2dc23167c8d8	1023	/** Get word pair byte-swapping enabled for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1024	* When set to 1, this bit enables byte swapping. When byte swapping is enabled,
pHysiX	6:2dc23167c8d8	1025	* the high and low bytes of a word pair are swapped. Please refer to
pHysiX	6:2dc23167c8d8	1026	* I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
pHysiX	6:2dc23167c8d8	1027	* bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
pHysiX	6:2dc23167c8d8	1028	* registers in the order they were transferred.
pHysiX	6:2dc23167c8d8	1029	*
pHysiX	6:2dc23167c8d8	1030	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1031	* @return Current word pair byte-swapping enabled value for specified slave
pHysiX	6:2dc23167c8d8	1032	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1033	*/
pHysiX	6:2dc23167c8d8	1034	bool MPU6050::getSlaveWordByteSwap(uint8_t num)
pHysiX	6:2dc23167c8d8	1035	{
pHysiX	6:2dc23167c8d8	1036	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	1037	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer);
pHysiX	6:2dc23167c8d8	1038	return buffer[0];
pHysiX	6:2dc23167c8d8	1039	}
pHysiX	6:2dc23167c8d8	1040	/** Set word pair byte-swapping enabled for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1041	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1042	* @param enabled New word pair byte-swapping enabled value for specified slave
pHysiX	6:2dc23167c8d8	1043	* @see getSlaveWordByteSwap()
pHysiX	6:2dc23167c8d8	1044	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1045	*/
pHysiX	6:2dc23167c8d8	1046	void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled)
pHysiX	6:2dc23167c8d8	1047	{
pHysiX	6:2dc23167c8d8	1048	if (num > 3) return;
pHysiX	6:2dc23167c8d8	1049	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled);
pHysiX	6:2dc23167c8d8	1050	}
pHysiX	6:2dc23167c8d8	1051	/** Get write mode for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1052	* When set to 1, the transaction will read or write data only. When cleared to
pHysiX	6:2dc23167c8d8	1053	* 0, the transaction will write a register address prior to reading or writing
pHysiX	6:2dc23167c8d8	1054	* data. This should equal 0 when specifying the register address within the
pHysiX	6:2dc23167c8d8	1055	* Slave device to/from which the ensuing data transaction will take place.
pHysiX	6:2dc23167c8d8	1056	*
pHysiX	6:2dc23167c8d8	1057	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1058	* @return Current write mode for specified slave (0 = register address + data, 1 = data only)
pHysiX	6:2dc23167c8d8	1059	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1060	*/
pHysiX	6:2dc23167c8d8	1061	bool MPU6050::getSlaveWriteMode(uint8_t num)
pHysiX	6:2dc23167c8d8	1062	{
pHysiX	6:2dc23167c8d8	1063	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	1064	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer);
pHysiX	6:2dc23167c8d8	1065	return buffer[0];
pHysiX	6:2dc23167c8d8	1066	}
pHysiX	6:2dc23167c8d8	1067	/** Set write mode for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1068	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1069	* @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
pHysiX	6:2dc23167c8d8	1070	* @see getSlaveWriteMode()
pHysiX	6:2dc23167c8d8	1071	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1072	*/
pHysiX	6:2dc23167c8d8	1073	void MPU6050::setSlaveWriteMode(uint8_t num, bool mode)
pHysiX	6:2dc23167c8d8	1074	{
pHysiX	6:2dc23167c8d8	1075	if (num > 3) return;
pHysiX	6:2dc23167c8d8	1076	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode);
pHysiX	6:2dc23167c8d8	1077	}
pHysiX	6:2dc23167c8d8	1078	/** Get word pair grouping order offset for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1079	* This sets specifies the grouping order of word pairs received from registers.
pHysiX	6:2dc23167c8d8	1080	* When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
pHysiX	6:2dc23167c8d8	1081	* then odd register addresses) are paired to form a word. When set to 1, bytes
pHysiX	6:2dc23167c8d8	1082	* from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
pHysiX	6:2dc23167c8d8	1083	* register addresses) are paired to form a word.
pHysiX	6:2dc23167c8d8	1084	*
pHysiX	6:2dc23167c8d8	1085	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1086	* @return Current word pair grouping order offset for specified slave
pHysiX	6:2dc23167c8d8	1087	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1088	*/
pHysiX	6:2dc23167c8d8	1089	bool MPU6050::getSlaveWordGroupOffset(uint8_t num)
pHysiX	6:2dc23167c8d8	1090	{
pHysiX	6:2dc23167c8d8	1091	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	1092	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer);
pHysiX	6:2dc23167c8d8	1093	return buffer[0];
pHysiX	6:2dc23167c8d8	1094	}
pHysiX	6:2dc23167c8d8	1095	/** Set word pair grouping order offset for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1096	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1097	* @param enabled New word pair grouping order offset for specified slave
pHysiX	6:2dc23167c8d8	1098	* @see getSlaveWordGroupOffset()
pHysiX	6:2dc23167c8d8	1099	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1100	*/
pHysiX	6:2dc23167c8d8	1101	void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled)
pHysiX	6:2dc23167c8d8	1102	{
pHysiX	6:2dc23167c8d8	1103	if (num > 3) return;
pHysiX	6:2dc23167c8d8	1104	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled);
pHysiX	6:2dc23167c8d8	1105	}
pHysiX	6:2dc23167c8d8	1106	/** Get number of bytes to read for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1107	* Specifies the number of bytes transferred to and from Slave 0. Clearing this
pHysiX	6:2dc23167c8d8	1108	* bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
pHysiX	6:2dc23167c8d8	1109	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1110	* @return Number of bytes to read for specified slave
pHysiX	6:2dc23167c8d8	1111	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1112	*/
pHysiX	6:2dc23167c8d8	1113	uint8_t MPU6050::getSlaveDataLength(uint8_t num)
pHysiX	6:2dc23167c8d8	1114	{
pHysiX	6:2dc23167c8d8	1115	if (num > 3) return 0;
pHysiX	6:2dc23167c8d8	1116	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	1117	return buffer[0];
pHysiX	6:2dc23167c8d8	1118	}
pHysiX	6:2dc23167c8d8	1119	/** Set number of bytes to read for the specified slave (0-3).
pHysiX	6:2dc23167c8d8	1120	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	1121	* @param length Number of bytes to read for specified slave
pHysiX	6:2dc23167c8d8	1122	* @see getSlaveDataLength()
pHysiX	6:2dc23167c8d8	1123	* @see MPU6050_RA_I2C_SLV0_CTRL
pHysiX	6:2dc23167c8d8	1124	*/
pHysiX	6:2dc23167c8d8	1125	void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length)
pHysiX	6:2dc23167c8d8	1126	{
pHysiX	6:2dc23167c8d8	1127	if (num > 3) return;
pHysiX	6:2dc23167c8d8	1128	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length);
pHysiX	6:2dc23167c8d8	1129	}
pHysiX	6:2dc23167c8d8	1130
pHysiX	6:2dc23167c8d8	1131	// I2C_SLV* registers (Slave 4)
pHysiX	6:2dc23167c8d8	1132
pHysiX	6:2dc23167c8d8	1133	/** Get the I2C address of Slave 4.
pHysiX	6:2dc23167c8d8	1134	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
pHysiX	6:2dc23167c8d8	1135	* operation, and if it is cleared, then it's a write operation. The remaining
pHysiX	6:2dc23167c8d8	1136	* bits (6-0) are the 7-bit device address of the slave device.
pHysiX	6:2dc23167c8d8	1137	*
pHysiX	6:2dc23167c8d8	1138	* @return Current address for Slave 4
pHysiX	6:2dc23167c8d8	1139	* @see getSlaveAddress()
pHysiX	6:2dc23167c8d8	1140	* @see MPU6050_RA_I2C_SLV4_ADDR
pHysiX	6:2dc23167c8d8	1141	*/
pHysiX	6:2dc23167c8d8	1142	uint8_t MPU6050::getSlave4Address()
pHysiX	6:2dc23167c8d8	1143	{
pHysiX	6:2dc23167c8d8	1144	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer);
pHysiX	6:2dc23167c8d8	1145	return buffer[0];
pHysiX	6:2dc23167c8d8	1146	}
pHysiX	6:2dc23167c8d8	1147	/** Set the I2C address of Slave 4.
pHysiX	6:2dc23167c8d8	1148	* @param address New address for Slave 4
pHysiX	6:2dc23167c8d8	1149	* @see getSlave4Address()
pHysiX	6:2dc23167c8d8	1150	* @see MPU6050_RA_I2C_SLV4_ADDR
pHysiX	6:2dc23167c8d8	1151	*/
pHysiX	6:2dc23167c8d8	1152	void MPU6050::setSlave4Address(uint8_t address)
pHysiX	6:2dc23167c8d8	1153	{
pHysiX	6:2dc23167c8d8	1154	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address);
pHysiX	6:2dc23167c8d8	1155	}
pHysiX	6:2dc23167c8d8	1156	/** Get the active internal register for the Slave 4.
pHysiX	6:2dc23167c8d8	1157	* Read/write operations for this slave will be done to whatever internal
pHysiX	6:2dc23167c8d8	1158	* register address is stored in this MPU register.
pHysiX	6:2dc23167c8d8	1159	*
pHysiX	6:2dc23167c8d8	1160	* @return Current active register for Slave 4
pHysiX	6:2dc23167c8d8	1161	* @see MPU6050_RA_I2C_SLV4_REG
pHysiX	6:2dc23167c8d8	1162	*/
pHysiX	6:2dc23167c8d8	1163	uint8_t MPU6050::getSlave4Register()
pHysiX	6:2dc23167c8d8	1164	{
pHysiX	6:2dc23167c8d8	1165	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer);
pHysiX	6:2dc23167c8d8	1166	return buffer[0];
pHysiX	6:2dc23167c8d8	1167	}
pHysiX	6:2dc23167c8d8	1168	/** Set the active internal register for Slave 4.
pHysiX	6:2dc23167c8d8	1169	* @param reg New active register for Slave 4
pHysiX	6:2dc23167c8d8	1170	* @see getSlave4Register()
pHysiX	6:2dc23167c8d8	1171	* @see MPU6050_RA_I2C_SLV4_REG
pHysiX	6:2dc23167c8d8	1172	*/
pHysiX	6:2dc23167c8d8	1173	void MPU6050::setSlave4Register(uint8_t reg)
pHysiX	6:2dc23167c8d8	1174	{
pHysiX	6:2dc23167c8d8	1175	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg);
pHysiX	6:2dc23167c8d8	1176	}
pHysiX	6:2dc23167c8d8	1177	/** Set new byte to write to Slave 4.
pHysiX	6:2dc23167c8d8	1178	* This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
pHysiX	6:2dc23167c8d8	1179	* is set 1 (set to read), this register has no effect.
pHysiX	6:2dc23167c8d8	1180	* @param data New byte to write to Slave 4
pHysiX	6:2dc23167c8d8	1181	* @see MPU6050_RA_I2C_SLV4_DO
pHysiX	6:2dc23167c8d8	1182	*/
pHysiX	6:2dc23167c8d8	1183	void MPU6050::setSlave4OutputByte(uint8_t data)
pHysiX	6:2dc23167c8d8	1184	{
pHysiX	6:2dc23167c8d8	1185	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data);
pHysiX	6:2dc23167c8d8	1186	}
pHysiX	6:2dc23167c8d8	1187	/** Get the enabled value for the Slave 4.
pHysiX	6:2dc23167c8d8	1188	* When set to 1, this bit enables Slave 4 for data transfer operations. When
pHysiX	6:2dc23167c8d8	1189	* cleared to 0, this bit disables Slave 4 from data transfer operations.
pHysiX	6:2dc23167c8d8	1190	* @return Current enabled value for Slave 4
pHysiX	6:2dc23167c8d8	1191	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1192	*/
pHysiX	6:2dc23167c8d8	1193	bool MPU6050::getSlave4Enabled()
pHysiX	6:2dc23167c8d8	1194	{
pHysiX	6:2dc23167c8d8	1195	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1196	return buffer[0];
pHysiX	6:2dc23167c8d8	1197	}
pHysiX	6:2dc23167c8d8	1198	/** Set the enabled value for Slave 4.
pHysiX	6:2dc23167c8d8	1199	* @param enabled New enabled value for Slave 4
pHysiX	6:2dc23167c8d8	1200	* @see getSlave4Enabled()
pHysiX	6:2dc23167c8d8	1201	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1202	*/
pHysiX	6:2dc23167c8d8	1203	void MPU6050::setSlave4Enabled(bool enabled)
pHysiX	6:2dc23167c8d8	1204	{
pHysiX	6:2dc23167c8d8	1205	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1206	}
pHysiX	6:2dc23167c8d8	1207	/** Get the enabled value for Slave 4 transaction interrupts.
pHysiX	6:2dc23167c8d8	1208	* When set to 1, this bit enables the generation of an interrupt signal upon
pHysiX	6:2dc23167c8d8	1209	* completion of a Slave 4 transaction. When cleared to 0, this bit disables the
pHysiX	6:2dc23167c8d8	1210	* generation of an interrupt signal upon completion of a Slave 4 transaction.
pHysiX	6:2dc23167c8d8	1211	* The interrupt status can be observed in Register 54.
pHysiX	6:2dc23167c8d8	1212	*
pHysiX	6:2dc23167c8d8	1213	* @return Current enabled value for Slave 4 transaction interrupts.
pHysiX	6:2dc23167c8d8	1214	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1215	*/
pHysiX	6:2dc23167c8d8	1216	bool MPU6050::getSlave4InterruptEnabled()
pHysiX	6:2dc23167c8d8	1217	{
pHysiX	6:2dc23167c8d8	1218	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1219	return buffer[0];
pHysiX	6:2dc23167c8d8	1220	}
pHysiX	6:2dc23167c8d8	1221	/** Set the enabled value for Slave 4 transaction interrupts.
pHysiX	6:2dc23167c8d8	1222	* @param enabled New enabled value for Slave 4 transaction interrupts.
pHysiX	6:2dc23167c8d8	1223	* @see getSlave4InterruptEnabled()
pHysiX	6:2dc23167c8d8	1224	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1225	*/
pHysiX	6:2dc23167c8d8	1226	void MPU6050::setSlave4InterruptEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1227	{
pHysiX	6:2dc23167c8d8	1228	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1229	}
pHysiX	6:2dc23167c8d8	1230	/** Get write mode for Slave 4.
pHysiX	6:2dc23167c8d8	1231	* When set to 1, the transaction will read or write data only. When cleared to
pHysiX	6:2dc23167c8d8	1232	* 0, the transaction will write a register address prior to reading or writing
pHysiX	6:2dc23167c8d8	1233	* data. This should equal 0 when specifying the register address within the
pHysiX	6:2dc23167c8d8	1234	* Slave device to/from which the ensuing data transaction will take place.
pHysiX	6:2dc23167c8d8	1235	*
pHysiX	6:2dc23167c8d8	1236	* @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
pHysiX	6:2dc23167c8d8	1237	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1238	*/
pHysiX	6:2dc23167c8d8	1239	bool MPU6050::getSlave4WriteMode()
pHysiX	6:2dc23167c8d8	1240	{
pHysiX	6:2dc23167c8d8	1241	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer);
pHysiX	6:2dc23167c8d8	1242	return buffer[0];
pHysiX	6:2dc23167c8d8	1243	}
pHysiX	6:2dc23167c8d8	1244	/** Set write mode for the Slave 4.
pHysiX	6:2dc23167c8d8	1245	* @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
pHysiX	6:2dc23167c8d8	1246	* @see getSlave4WriteMode()
pHysiX	6:2dc23167c8d8	1247	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1248	*/
pHysiX	6:2dc23167c8d8	1249	void MPU6050::setSlave4WriteMode(bool mode)
pHysiX	6:2dc23167c8d8	1250	{
pHysiX	6:2dc23167c8d8	1251	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode);
pHysiX	6:2dc23167c8d8	1252	}
pHysiX	6:2dc23167c8d8	1253	/** Get Slave 4 master delay value.
pHysiX	6:2dc23167c8d8	1254	* This configures the reduced access rate of I2C slaves relative to the Sample
pHysiX	6:2dc23167c8d8	1255	* Rate. When a slave's access rate is decreased relative to the Sample Rate,
pHysiX	6:2dc23167c8d8	1256	* the slave is accessed every:
pHysiX	6:2dc23167c8d8	1257	*
pHysiX	6:2dc23167c8d8	1258	* 1 / (1 + I2C_MST_DLY) samples
pHysiX	6:2dc23167c8d8	1259	*
pHysiX	6:2dc23167c8d8	1260	* This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
pHysiX	6:2dc23167c8d8	1261	* DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
pHysiX	6:2dc23167c8d8	1262	* the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
pHysiX	6:2dc23167c8d8	1263	* further information regarding the Sample Rate, please refer to register 25.
pHysiX	6:2dc23167c8d8	1264	*
pHysiX	6:2dc23167c8d8	1265	* @return Current Slave 4 master delay value
pHysiX	6:2dc23167c8d8	1266	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1267	*/
pHysiX	6:2dc23167c8d8	1268	uint8_t MPU6050::getSlave4MasterDelay()
pHysiX	6:2dc23167c8d8	1269	{
pHysiX	6:2dc23167c8d8	1270	i2Cdev.readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	1271	return buffer[0];
pHysiX	6:2dc23167c8d8	1272	}
pHysiX	6:2dc23167c8d8	1273	/** Set Slave 4 master delay value.
pHysiX	6:2dc23167c8d8	1274	* @param delay New Slave 4 master delay value
pHysiX	6:2dc23167c8d8	1275	* @see getSlave4MasterDelay()
pHysiX	6:2dc23167c8d8	1276	* @see MPU6050_RA_I2C_SLV4_CTRL
pHysiX	6:2dc23167c8d8	1277	*/
pHysiX	6:2dc23167c8d8	1278	void MPU6050::setSlave4MasterDelay(uint8_t delay)
pHysiX	6:2dc23167c8d8	1279	{
pHysiX	6:2dc23167c8d8	1280	i2Cdev.writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay);
pHysiX	6:2dc23167c8d8	1281	}
pHysiX	6:2dc23167c8d8	1282	/** Get last available byte read from Slave 4.
pHysiX	6:2dc23167c8d8	1283	* This register stores the data read from Slave 4. This field is populated
pHysiX	6:2dc23167c8d8	1284	* after a read transaction.
pHysiX	6:2dc23167c8d8	1285	* @return Last available byte read from to Slave 4
pHysiX	6:2dc23167c8d8	1286	* @see MPU6050_RA_I2C_SLV4_DI
pHysiX	6:2dc23167c8d8	1287	*/
pHysiX	6:2dc23167c8d8	1288	uint8_t MPU6050::getSlate4InputByte()
pHysiX	6:2dc23167c8d8	1289	{
pHysiX	6:2dc23167c8d8	1290	i2Cdev.readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer);
pHysiX	6:2dc23167c8d8	1291	return buffer[0];
pHysiX	6:2dc23167c8d8	1292	}
pHysiX	6:2dc23167c8d8	1293
pHysiX	6:2dc23167c8d8	1294	// I2C_MST_STATUS register
pHysiX	6:2dc23167c8d8	1295
pHysiX	6:2dc23167c8d8	1296	/** Get FSYNC interrupt status.
pHysiX	6:2dc23167c8d8	1297	* This bit reflects the status of the FSYNC interrupt from an external device
pHysiX	6:2dc23167c8d8	1298	* into the MPU-60X0. This is used as a way to pass an external interrupt
pHysiX	6:2dc23167c8d8	1299	* through the MPU-60X0 to the host application processor. When set to 1, this
pHysiX	6:2dc23167c8d8	1300	* bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1301	* (Register 55).
pHysiX	6:2dc23167c8d8	1302	* @return FSYNC interrupt status
pHysiX	6:2dc23167c8d8	1303	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1304	*/
pHysiX	6:2dc23167c8d8	1305	bool MPU6050::getPassthroughStatus()
pHysiX	6:2dc23167c8d8	1306	{
pHysiX	6:2dc23167c8d8	1307	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer);
pHysiX	6:2dc23167c8d8	1308	return buffer[0];
pHysiX	6:2dc23167c8d8	1309	}
pHysiX	6:2dc23167c8d8	1310	/** Get Slave 4 transaction done status.
pHysiX	6:2dc23167c8d8	1311	* Automatically sets to 1 when a Slave 4 transaction has completed. This
pHysiX	6:2dc23167c8d8	1312	* triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
pHysiX	6:2dc23167c8d8	1313	* (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
pHysiX	6:2dc23167c8d8	1314	* I2C_SLV4_CTRL register (Register 52).
pHysiX	6:2dc23167c8d8	1315	* @return Slave 4 transaction done status
pHysiX	6:2dc23167c8d8	1316	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1317	*/
pHysiX	6:2dc23167c8d8	1318	bool MPU6050::getSlave4IsDone()
pHysiX	6:2dc23167c8d8	1319	{
pHysiX	6:2dc23167c8d8	1320	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer);
pHysiX	6:2dc23167c8d8	1321	return buffer[0];
pHysiX	6:2dc23167c8d8	1322	}
pHysiX	6:2dc23167c8d8	1323	/** Get master arbitration lost status.
pHysiX	6:2dc23167c8d8	1324	* This bit automatically sets to 1 when the I2C Master has lost arbitration of
pHysiX	6:2dc23167c8d8	1325	* the auxiliary I2C bus (an error condition). This triggers an interrupt if the
pHysiX	6:2dc23167c8d8	1326	* I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1327	* @return Master arbitration lost status
pHysiX	6:2dc23167c8d8	1328	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1329	*/
pHysiX	6:2dc23167c8d8	1330	bool MPU6050::getLostArbitration()
pHysiX	6:2dc23167c8d8	1331	{
pHysiX	6:2dc23167c8d8	1332	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer);
pHysiX	6:2dc23167c8d8	1333	return buffer[0];
pHysiX	6:2dc23167c8d8	1334	}
pHysiX	6:2dc23167c8d8	1335	/** Get Slave 4 NACK status.
pHysiX	6:2dc23167c8d8	1336	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
pHysiX	6:2dc23167c8d8	1337	* transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
pHysiX	6:2dc23167c8d8	1338	* bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1339	* @return Slave 4 NACK interrupt status
pHysiX	6:2dc23167c8d8	1340	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1341	*/
pHysiX	6:2dc23167c8d8	1342	bool MPU6050::getSlave4Nack()
pHysiX	6:2dc23167c8d8	1343	{
pHysiX	6:2dc23167c8d8	1344	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer);
pHysiX	6:2dc23167c8d8	1345	return buffer[0];
pHysiX	6:2dc23167c8d8	1346	}
pHysiX	6:2dc23167c8d8	1347	/** Get Slave 3 NACK status.
pHysiX	6:2dc23167c8d8	1348	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
pHysiX	6:2dc23167c8d8	1349	* transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
pHysiX	6:2dc23167c8d8	1350	* bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1351	* @return Slave 3 NACK interrupt status
pHysiX	6:2dc23167c8d8	1352	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1353	*/
pHysiX	6:2dc23167c8d8	1354	bool MPU6050::getSlave3Nack()
pHysiX	6:2dc23167c8d8	1355	{
pHysiX	6:2dc23167c8d8	1356	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer);
pHysiX	6:2dc23167c8d8	1357	return buffer[0];
pHysiX	6:2dc23167c8d8	1358	}
pHysiX	6:2dc23167c8d8	1359	/** Get Slave 2 NACK status.
pHysiX	6:2dc23167c8d8	1360	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
pHysiX	6:2dc23167c8d8	1361	* transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
pHysiX	6:2dc23167c8d8	1362	* bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1363	* @return Slave 2 NACK interrupt status
pHysiX	6:2dc23167c8d8	1364	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1365	*/
pHysiX	6:2dc23167c8d8	1366	bool MPU6050::getSlave2Nack()
pHysiX	6:2dc23167c8d8	1367	{
pHysiX	6:2dc23167c8d8	1368	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer);
pHysiX	6:2dc23167c8d8	1369	return buffer[0];
pHysiX	6:2dc23167c8d8	1370	}
pHysiX	6:2dc23167c8d8	1371	/** Get Slave 1 NACK status.
pHysiX	6:2dc23167c8d8	1372	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
pHysiX	6:2dc23167c8d8	1373	* transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
pHysiX	6:2dc23167c8d8	1374	* bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1375	* @return Slave 1 NACK interrupt status
pHysiX	6:2dc23167c8d8	1376	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1377	*/
pHysiX	6:2dc23167c8d8	1378	bool MPU6050::getSlave1Nack()
pHysiX	6:2dc23167c8d8	1379	{
pHysiX	6:2dc23167c8d8	1380	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer);
pHysiX	6:2dc23167c8d8	1381	return buffer[0];
pHysiX	6:2dc23167c8d8	1382	}
pHysiX	6:2dc23167c8d8	1383	/** Get Slave 0 NACK status.
pHysiX	6:2dc23167c8d8	1384	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
pHysiX	6:2dc23167c8d8	1385	* transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
pHysiX	6:2dc23167c8d8	1386	* bit in the INT_ENABLE register (Register 56) is asserted.
pHysiX	6:2dc23167c8d8	1387	* @return Slave 0 NACK interrupt status
pHysiX	6:2dc23167c8d8	1388	* @see MPU6050_RA_I2C_MST_STATUS
pHysiX	6:2dc23167c8d8	1389	*/
pHysiX	6:2dc23167c8d8	1390	bool MPU6050::getSlave0Nack()
pHysiX	6:2dc23167c8d8	1391	{
pHysiX	6:2dc23167c8d8	1392	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer);
pHysiX	6:2dc23167c8d8	1393	return buffer[0];
pHysiX	6:2dc23167c8d8	1394	}
pHysiX	6:2dc23167c8d8	1395
pHysiX	6:2dc23167c8d8	1396	// INT_PIN_CFG register
pHysiX	6:2dc23167c8d8	1397
pHysiX	6:2dc23167c8d8	1398	/** Get interrupt logic level mode.
pHysiX	6:2dc23167c8d8	1399	* Will be set 0 for active-high, 1 for active-low.
pHysiX	6:2dc23167c8d8	1400	* @return Current interrupt mode (0=active-high, 1=active-low)
pHysiX	6:2dc23167c8d8	1401	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1402	* @see MPU6050_INTCFG_INT_LEVEL_BIT
pHysiX	6:2dc23167c8d8	1403	*/
pHysiX	6:2dc23167c8d8	1404	bool MPU6050::getInterruptMode()
pHysiX	6:2dc23167c8d8	1405	{
pHysiX	6:2dc23167c8d8	1406	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer);
pHysiX	6:2dc23167c8d8	1407	return buffer[0];
pHysiX	6:2dc23167c8d8	1408	}
pHysiX	6:2dc23167c8d8	1409	/** Set interrupt logic level mode.
pHysiX	6:2dc23167c8d8	1410	* @param mode New interrupt mode (0=active-high, 1=active-low)
pHysiX	6:2dc23167c8d8	1411	* @see getInterruptMode()
pHysiX	6:2dc23167c8d8	1412	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1413	* @see MPU6050_INTCFG_INT_LEVEL_BIT
pHysiX	6:2dc23167c8d8	1414	*/
pHysiX	6:2dc23167c8d8	1415	void MPU6050::setInterruptMode(bool mode)
pHysiX	6:2dc23167c8d8	1416	{
pHysiX	6:2dc23167c8d8	1417	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode);
pHysiX	6:2dc23167c8d8	1418	}
pHysiX	6:2dc23167c8d8	1419	/** Get interrupt drive mode.
pHysiX	6:2dc23167c8d8	1420	* Will be set 0 for push-pull, 1 for open-drain.
pHysiX	6:2dc23167c8d8	1421	* @return Current interrupt drive mode (0=push-pull, 1=open-drain)
pHysiX	6:2dc23167c8d8	1422	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1423	* @see MPU6050_INTCFG_INT_OPEN_BIT
pHysiX	6:2dc23167c8d8	1424	*/
pHysiX	6:2dc23167c8d8	1425	bool MPU6050::getInterruptDrive()
pHysiX	6:2dc23167c8d8	1426	{
pHysiX	6:2dc23167c8d8	1427	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1428	return buffer[0];
pHysiX	6:2dc23167c8d8	1429	}
pHysiX	6:2dc23167c8d8	1430	/** Set interrupt drive mode.
pHysiX	6:2dc23167c8d8	1431	* @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
pHysiX	6:2dc23167c8d8	1432	* @see getInterruptDrive()
pHysiX	6:2dc23167c8d8	1433	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1434	* @see MPU6050_INTCFG_INT_OPEN_BIT
pHysiX	6:2dc23167c8d8	1435	*/
pHysiX	6:2dc23167c8d8	1436	void MPU6050::setInterruptDrive(bool drive)
pHysiX	6:2dc23167c8d8	1437	{
pHysiX	6:2dc23167c8d8	1438	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive);
pHysiX	6:2dc23167c8d8	1439	}
pHysiX	6:2dc23167c8d8	1440	/** Get interrupt latch mode.
pHysiX	6:2dc23167c8d8	1441	* Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
pHysiX	6:2dc23167c8d8	1442	* @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
pHysiX	6:2dc23167c8d8	1443	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1444	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
pHysiX	6:2dc23167c8d8	1445	*/
pHysiX	6:2dc23167c8d8	1446	bool MPU6050::getInterruptLatch()
pHysiX	6:2dc23167c8d8	1447	{
pHysiX	6:2dc23167c8d8	1448	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1449	return buffer[0];
pHysiX	6:2dc23167c8d8	1450	}
pHysiX	6:2dc23167c8d8	1451	/** Set interrupt latch mode.
pHysiX	6:2dc23167c8d8	1452	* @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
pHysiX	6:2dc23167c8d8	1453	* @see getInterruptLatch()
pHysiX	6:2dc23167c8d8	1454	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1455	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
pHysiX	6:2dc23167c8d8	1456	*/
pHysiX	6:2dc23167c8d8	1457	void MPU6050::setInterruptLatch(bool latch)
pHysiX	6:2dc23167c8d8	1458	{
pHysiX	6:2dc23167c8d8	1459	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch);
pHysiX	6:2dc23167c8d8	1460	}
pHysiX	6:2dc23167c8d8	1461	/** Get interrupt latch clear mode.
pHysiX	6:2dc23167c8d8	1462	* Will be set 0 for status-read-only, 1 for any-register-read.
pHysiX	6:2dc23167c8d8	1463	* @return Current latch clear mode (0=status-read-only, 1=any-register-read)
pHysiX	6:2dc23167c8d8	1464	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1465	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
pHysiX	6:2dc23167c8d8	1466	*/
pHysiX	6:2dc23167c8d8	1467	bool MPU6050::getInterruptLatchClear()
pHysiX	6:2dc23167c8d8	1468	{
pHysiX	6:2dc23167c8d8	1469	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer);
pHysiX	6:2dc23167c8d8	1470	return buffer[0];
pHysiX	6:2dc23167c8d8	1471	}
pHysiX	6:2dc23167c8d8	1472	/** Set interrupt latch clear mode.
pHysiX	6:2dc23167c8d8	1473	* @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
pHysiX	6:2dc23167c8d8	1474	* @see getInterruptLatchClear()
pHysiX	6:2dc23167c8d8	1475	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1476	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
pHysiX	6:2dc23167c8d8	1477	*/
pHysiX	6:2dc23167c8d8	1478	void MPU6050::setInterruptLatchClear(bool clear)
pHysiX	6:2dc23167c8d8	1479	{
pHysiX	6:2dc23167c8d8	1480	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear);
pHysiX	6:2dc23167c8d8	1481	}
pHysiX	6:2dc23167c8d8	1482	/** Get FSYNC interrupt logic level mode.
pHysiX	6:2dc23167c8d8	1483	* @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
pHysiX	6:2dc23167c8d8	1484	* @see getFSyncInterruptMode()
pHysiX	6:2dc23167c8d8	1485	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1486	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
pHysiX	6:2dc23167c8d8	1487	*/
pHysiX	6:2dc23167c8d8	1488	bool MPU6050::getFSyncInterruptLevel()
pHysiX	6:2dc23167c8d8	1489	{
pHysiX	6:2dc23167c8d8	1490	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
pHysiX	6:2dc23167c8d8	1491	return buffer[0];
pHysiX	6:2dc23167c8d8	1492	}
pHysiX	6:2dc23167c8d8	1493	/** Set FSYNC interrupt logic level mode.
pHysiX	6:2dc23167c8d8	1494	* @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
pHysiX	6:2dc23167c8d8	1495	* @see getFSyncInterruptMode()
pHysiX	6:2dc23167c8d8	1496	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1497	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
pHysiX	6:2dc23167c8d8	1498	*/
pHysiX	6:2dc23167c8d8	1499	void MPU6050::setFSyncInterruptLevel(bool level)
pHysiX	6:2dc23167c8d8	1500	{
pHysiX	6:2dc23167c8d8	1501	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level);
pHysiX	6:2dc23167c8d8	1502	}
pHysiX	6:2dc23167c8d8	1503	/** Get FSYNC pin interrupt enabled setting.
pHysiX	6:2dc23167c8d8	1504	* Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1505	* @return Current interrupt enabled setting
pHysiX	6:2dc23167c8d8	1506	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1507	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
pHysiX	6:2dc23167c8d8	1508	*/
pHysiX	6:2dc23167c8d8	1509	bool MPU6050::getFSyncInterruptEnabled()
pHysiX	6:2dc23167c8d8	1510	{
pHysiX	6:2dc23167c8d8	1511	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1512	return buffer[0];
pHysiX	6:2dc23167c8d8	1513	}
pHysiX	6:2dc23167c8d8	1514	/** Set FSYNC pin interrupt enabled setting.
pHysiX	6:2dc23167c8d8	1515	* @param enabled New FSYNC pin interrupt enabled setting
pHysiX	6:2dc23167c8d8	1516	* @see getFSyncInterruptEnabled()
pHysiX	6:2dc23167c8d8	1517	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1518	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
pHysiX	6:2dc23167c8d8	1519	*/
pHysiX	6:2dc23167c8d8	1520	void MPU6050::setFSyncInterruptEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1521	{
pHysiX	6:2dc23167c8d8	1522	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1523	}
pHysiX	6:2dc23167c8d8	1524	/** Get I2C bypass enabled status.
pHysiX	6:2dc23167c8d8	1525	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
pHysiX	6:2dc23167c8d8	1526	* 0, the host application processor will be able to directly access the
pHysiX	6:2dc23167c8d8	1527	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
pHysiX	6:2dc23167c8d8	1528	* application processor will not be able to directly access the auxiliary I2C
pHysiX	6:2dc23167c8d8	1529	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
pHysiX	6:2dc23167c8d8	1530	* bit[5]).
pHysiX	6:2dc23167c8d8	1531	* @return Current I2C bypass enabled status
pHysiX	6:2dc23167c8d8	1532	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1533	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
pHysiX	6:2dc23167c8d8	1534	*/
pHysiX	6:2dc23167c8d8	1535	bool MPU6050::getI2CBypassEnabled()
pHysiX	6:2dc23167c8d8	1536	{
pHysiX	6:2dc23167c8d8	1537	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1538	return buffer[0];
pHysiX	6:2dc23167c8d8	1539	}
pHysiX	6:2dc23167c8d8	1540	/** Set I2C bypass enabled status.
pHysiX	6:2dc23167c8d8	1541	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
pHysiX	6:2dc23167c8d8	1542	* 0, the host application processor will be able to directly access the
pHysiX	6:2dc23167c8d8	1543	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
pHysiX	6:2dc23167c8d8	1544	* application processor will not be able to directly access the auxiliary I2C
pHysiX	6:2dc23167c8d8	1545	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
pHysiX	6:2dc23167c8d8	1546	* bit[5]).
pHysiX	6:2dc23167c8d8	1547	* @param enabled New I2C bypass enabled status
pHysiX	6:2dc23167c8d8	1548	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1549	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
pHysiX	6:2dc23167c8d8	1550	*/
pHysiX	6:2dc23167c8d8	1551	void MPU6050::setI2CBypassEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1552	{
pHysiX	6:2dc23167c8d8	1553	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1554	}
pHysiX	6:2dc23167c8d8	1555	/** Get reference clock output enabled status.
pHysiX	6:2dc23167c8d8	1556	* When this bit is equal to 1, a reference clock output is provided at the
pHysiX	6:2dc23167c8d8	1557	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
pHysiX	6:2dc23167c8d8	1558	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
pHysiX	6:2dc23167c8d8	1559	* Specification document.
pHysiX	6:2dc23167c8d8	1560	* @return Current reference clock output enabled status
pHysiX	6:2dc23167c8d8	1561	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1562	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
pHysiX	6:2dc23167c8d8	1563	*/
pHysiX	6:2dc23167c8d8	1564	bool MPU6050::getClockOutputEnabled()
pHysiX	6:2dc23167c8d8	1565	{
pHysiX	6:2dc23167c8d8	1566	i2Cdev.readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	1567	return buffer[0];
pHysiX	6:2dc23167c8d8	1568	}
pHysiX	6:2dc23167c8d8	1569	/** Set reference clock output enabled status.
pHysiX	6:2dc23167c8d8	1570	* When this bit is equal to 1, a reference clock output is provided at the
pHysiX	6:2dc23167c8d8	1571	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
pHysiX	6:2dc23167c8d8	1572	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
pHysiX	6:2dc23167c8d8	1573	* Specification document.
pHysiX	6:2dc23167c8d8	1574	* @param enabled New reference clock output enabled status
pHysiX	6:2dc23167c8d8	1575	* @see MPU6050_RA_INT_PIN_CFG
pHysiX	6:2dc23167c8d8	1576	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
pHysiX	6:2dc23167c8d8	1577	*/
pHysiX	6:2dc23167c8d8	1578	void MPU6050::setClockOutputEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1579	{
pHysiX	6:2dc23167c8d8	1580	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	1581	}
pHysiX	6:2dc23167c8d8	1582
pHysiX	6:2dc23167c8d8	1583	// INT_ENABLE register
pHysiX	6:2dc23167c8d8	1584
pHysiX	6:2dc23167c8d8	1585	/** Get full interrupt enabled status.
pHysiX	6:2dc23167c8d8	1586	* Full register byte for all interrupts, for quick reading. Each bit will be
pHysiX	6:2dc23167c8d8	1587	* set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1588	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1589	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1590	* @see MPU6050_INTERRUPT_FF_BIT
pHysiX	6:2dc23167c8d8	1591	**/
pHysiX	6:2dc23167c8d8	1592	uint8_t MPU6050::getIntEnabled()
pHysiX	6:2dc23167c8d8	1593	{
pHysiX	6:2dc23167c8d8	1594	i2Cdev.readByte(devAddr, MPU6050_RA_INT_ENABLE, buffer);
pHysiX	6:2dc23167c8d8	1595	return buffer[0];
pHysiX	6:2dc23167c8d8	1596	}
pHysiX	6:2dc23167c8d8	1597	/** Set full interrupt enabled status.
pHysiX	6:2dc23167c8d8	1598	* Full register byte for all interrupts, for quick reading. Each bit should be
pHysiX	6:2dc23167c8d8	1599	* set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1600	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1601	* @see getIntFreefallEnabled()
pHysiX	6:2dc23167c8d8	1602	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1603	* @see MPU6050_INTERRUPT_FF_BIT
pHysiX	6:2dc23167c8d8	1604	**/
pHysiX	6:2dc23167c8d8	1605	void MPU6050::setIntEnabled(uint8_t enabled)
pHysiX	6:2dc23167c8d8	1606	{
pHysiX	6:2dc23167c8d8	1607	i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled);
pHysiX	6:2dc23167c8d8	1608	}
pHysiX	6:2dc23167c8d8	1609	/** Get Free Fall interrupt enabled status.
pHysiX	6:2dc23167c8d8	1610	* Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1611	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1612	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1613	* @see MPU6050_INTERRUPT_FF_BIT
pHysiX	6:2dc23167c8d8	1614	**/
pHysiX	6:2dc23167c8d8	1615	bool MPU6050::getIntFreefallEnabled()
pHysiX	6:2dc23167c8d8	1616	{
pHysiX	6:2dc23167c8d8	1617	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer);
pHysiX	6:2dc23167c8d8	1618	return buffer[0];
pHysiX	6:2dc23167c8d8	1619	}
pHysiX	6:2dc23167c8d8	1620	/** Set Free Fall interrupt enabled status.
pHysiX	6:2dc23167c8d8	1621	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1622	* @see getIntFreefallEnabled()
pHysiX	6:2dc23167c8d8	1623	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1624	* @see MPU6050_INTERRUPT_FF_BIT
pHysiX	6:2dc23167c8d8	1625	**/
pHysiX	6:2dc23167c8d8	1626	void MPU6050::setIntFreefallEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1627	{
pHysiX	6:2dc23167c8d8	1628	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled);
pHysiX	6:2dc23167c8d8	1629	}
pHysiX	6:2dc23167c8d8	1630	/** Get Motion Detection interrupt enabled status.
pHysiX	6:2dc23167c8d8	1631	* Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1632	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1633	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1634	* @see MPU6050_INTERRUPT_MOT_BIT
pHysiX	6:2dc23167c8d8	1635	**/
pHysiX	6:2dc23167c8d8	1636	bool MPU6050::getIntMotionEnabled()
pHysiX	6:2dc23167c8d8	1637	{
pHysiX	6:2dc23167c8d8	1638	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1639	return buffer[0];
pHysiX	6:2dc23167c8d8	1640	}
pHysiX	6:2dc23167c8d8	1641	/** Set Motion Detection interrupt enabled status.
pHysiX	6:2dc23167c8d8	1642	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1643	* @see getIntMotionEnabled()
pHysiX	6:2dc23167c8d8	1644	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1645	* @see MPU6050_INTERRUPT_MOT_BIT
pHysiX	6:2dc23167c8d8	1646	**/
pHysiX	6:2dc23167c8d8	1647	void MPU6050::setIntMotionEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1648	{
pHysiX	6:2dc23167c8d8	1649	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled);
pHysiX	6:2dc23167c8d8	1650	}
pHysiX	6:2dc23167c8d8	1651	/** Get Zero Motion Detection interrupt enabled status.
pHysiX	6:2dc23167c8d8	1652	* Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1653	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1654	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1655	* @see MPU6050_INTERRUPT_ZMOT_BIT
pHysiX	6:2dc23167c8d8	1656	**/
pHysiX	6:2dc23167c8d8	1657	bool MPU6050::getIntZeroMotionEnabled()
pHysiX	6:2dc23167c8d8	1658	{
pHysiX	6:2dc23167c8d8	1659	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1660	return buffer[0];
pHysiX	6:2dc23167c8d8	1661	}
pHysiX	6:2dc23167c8d8	1662	/** Set Zero Motion Detection interrupt enabled status.
pHysiX	6:2dc23167c8d8	1663	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1664	* @see getIntZeroMotionEnabled()
pHysiX	6:2dc23167c8d8	1665	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1666	* @see MPU6050_INTERRUPT_ZMOT_BIT
pHysiX	6:2dc23167c8d8	1667	**/
pHysiX	6:2dc23167c8d8	1668	void MPU6050::setIntZeroMotionEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1669	{
pHysiX	6:2dc23167c8d8	1670	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled);
pHysiX	6:2dc23167c8d8	1671	}
pHysiX	6:2dc23167c8d8	1672	/** Get FIFO Buffer Overflow interrupt enabled status.
pHysiX	6:2dc23167c8d8	1673	* Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1674	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1675	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1676	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
pHysiX	6:2dc23167c8d8	1677	**/
pHysiX	6:2dc23167c8d8	1678	bool MPU6050::getIntFIFOBufferOverflowEnabled()
pHysiX	6:2dc23167c8d8	1679	{
pHysiX	6:2dc23167c8d8	1680	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
pHysiX	6:2dc23167c8d8	1681	return buffer[0];
pHysiX	6:2dc23167c8d8	1682	}
pHysiX	6:2dc23167c8d8	1683	/** Set FIFO Buffer Overflow interrupt enabled status.
pHysiX	6:2dc23167c8d8	1684	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1685	* @see getIntFIFOBufferOverflowEnabled()
pHysiX	6:2dc23167c8d8	1686	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1687	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
pHysiX	6:2dc23167c8d8	1688	**/
pHysiX	6:2dc23167c8d8	1689	void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1690	{
pHysiX	6:2dc23167c8d8	1691	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled);
pHysiX	6:2dc23167c8d8	1692	}
pHysiX	6:2dc23167c8d8	1693	/** Get I2C Master interrupt enabled status.
pHysiX	6:2dc23167c8d8	1694	* This enables any of the I2C Master interrupt sources to generate an
pHysiX	6:2dc23167c8d8	1695	* interrupt. Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1696	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1697	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1698	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
pHysiX	6:2dc23167c8d8	1699	**/
pHysiX	6:2dc23167c8d8	1700	bool MPU6050::getIntI2CMasterEnabled()
pHysiX	6:2dc23167c8d8	1701	{
pHysiX	6:2dc23167c8d8	1702	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1703	return buffer[0];
pHysiX	6:2dc23167c8d8	1704	}
pHysiX	6:2dc23167c8d8	1705	/** Set I2C Master interrupt enabled status.
pHysiX	6:2dc23167c8d8	1706	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1707	* @see getIntI2CMasterEnabled()
pHysiX	6:2dc23167c8d8	1708	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1709	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
pHysiX	6:2dc23167c8d8	1710	**/
pHysiX	6:2dc23167c8d8	1711	void MPU6050::setIntI2CMasterEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1712	{
pHysiX	6:2dc23167c8d8	1713	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled);
pHysiX	6:2dc23167c8d8	1714	}
pHysiX	6:2dc23167c8d8	1715	/** Get Data Ready interrupt enabled setting.
pHysiX	6:2dc23167c8d8	1716	* This event occurs each time a write operation to all of the sensor registers
pHysiX	6:2dc23167c8d8	1717	* has been completed. Will be set 0 for disabled, 1 for enabled.
pHysiX	6:2dc23167c8d8	1718	* @return Current interrupt enabled status
pHysiX	6:2dc23167c8d8	1719	* @see MPU6050_RA_INT_ENABLE
pHysiX	6:2dc23167c8d8	1720	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
pHysiX	6:2dc23167c8d8	1721	*/
pHysiX	6:2dc23167c8d8	1722	bool MPU6050::getIntDataReadyEnabled()
pHysiX	6:2dc23167c8d8	1723	{
pHysiX	6:2dc23167c8d8	1724	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
pHysiX	6:2dc23167c8d8	1725	return buffer[0];
pHysiX	6:2dc23167c8d8	1726	}
pHysiX	6:2dc23167c8d8	1727	/** Set Data Ready interrupt enabled status.
pHysiX	6:2dc23167c8d8	1728	* @param enabled New interrupt enabled status
pHysiX	6:2dc23167c8d8	1729	* @see getIntDataReadyEnabled()
pHysiX	6:2dc23167c8d8	1730	* @see MPU6050_RA_INT_CFG
pHysiX	6:2dc23167c8d8	1731	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
pHysiX	6:2dc23167c8d8	1732	*/
pHysiX	6:2dc23167c8d8	1733	void MPU6050::setIntDataReadyEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	1734	{
pHysiX	6:2dc23167c8d8	1735	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled);
pHysiX	6:2dc23167c8d8	1736	}
pHysiX	6:2dc23167c8d8	1737
pHysiX	6:2dc23167c8d8	1738	// INT_STATUS register
pHysiX	6:2dc23167c8d8	1739
pHysiX	6:2dc23167c8d8	1740	/** Get full set of interrupt status bits.
pHysiX	6:2dc23167c8d8	1741	* These bits clear to 0 after the register has been read. Very useful
pHysiX	6:2dc23167c8d8	1742	* for getting multiple INT statuses, since each single bit read clears
pHysiX	6:2dc23167c8d8	1743	* all of them because it has to read the whole byte.
pHysiX	6:2dc23167c8d8	1744	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1745	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1746	*/
pHysiX	6:2dc23167c8d8	1747	uint8_t MPU6050::getIntStatus()
pHysiX	6:2dc23167c8d8	1748	{
pHysiX	6:2dc23167c8d8	1749	i2Cdev.readByte(devAddr, MPU6050_RA_INT_STATUS, buffer);
pHysiX	6:2dc23167c8d8	1750	return buffer[0];
pHysiX	6:2dc23167c8d8	1751	}
pHysiX	6:2dc23167c8d8	1752	/** Get Free Fall interrupt status.
pHysiX	6:2dc23167c8d8	1753	* This bit automatically sets to 1 when a Free Fall interrupt has been
pHysiX	6:2dc23167c8d8	1754	* generated. The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1755	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1756	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1757	* @see MPU6050_INTERRUPT_FF_BIT
pHysiX	6:2dc23167c8d8	1758	*/
pHysiX	6:2dc23167c8d8	1759	bool MPU6050::getIntFreefallStatus()
pHysiX	6:2dc23167c8d8	1760	{
pHysiX	6:2dc23167c8d8	1761	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer);
pHysiX	6:2dc23167c8d8	1762	return buffer[0];
pHysiX	6:2dc23167c8d8	1763	}
pHysiX	6:2dc23167c8d8	1764	/** Get Motion Detection interrupt status.
pHysiX	6:2dc23167c8d8	1765	* This bit automatically sets to 1 when a Motion Detection interrupt has been
pHysiX	6:2dc23167c8d8	1766	* generated. The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1767	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1768	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1769	* @see MPU6050_INTERRUPT_MOT_BIT
pHysiX	6:2dc23167c8d8	1770	*/
pHysiX	6:2dc23167c8d8	1771	bool MPU6050::getIntMotionStatus()
pHysiX	6:2dc23167c8d8	1772	{
pHysiX	6:2dc23167c8d8	1773	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1774	return buffer[0];
pHysiX	6:2dc23167c8d8	1775	}
pHysiX	6:2dc23167c8d8	1776	/** Get Zero Motion Detection interrupt status.
pHysiX	6:2dc23167c8d8	1777	* This bit automatically sets to 1 when a Zero Motion Detection interrupt has
pHysiX	6:2dc23167c8d8	1778	* been generated. The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1779	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1780	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1781	* @see MPU6050_INTERRUPT_ZMOT_BIT
pHysiX	6:2dc23167c8d8	1782	*/
pHysiX	6:2dc23167c8d8	1783	bool MPU6050::getIntZeroMotionStatus()
pHysiX	6:2dc23167c8d8	1784	{
pHysiX	6:2dc23167c8d8	1785	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1786	return buffer[0];
pHysiX	6:2dc23167c8d8	1787	}
pHysiX	6:2dc23167c8d8	1788	/** Get FIFO Buffer Overflow interrupt status.
pHysiX	6:2dc23167c8d8	1789	* This bit automatically sets to 1 when a Free Fall interrupt has been
pHysiX	6:2dc23167c8d8	1790	* generated. The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1791	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1792	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1793	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
pHysiX	6:2dc23167c8d8	1794	*/
pHysiX	6:2dc23167c8d8	1795	bool MPU6050::getIntFIFOBufferOverflowStatus()
pHysiX	6:2dc23167c8d8	1796	{
pHysiX	6:2dc23167c8d8	1797	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
pHysiX	6:2dc23167c8d8	1798	return buffer[0];
pHysiX	6:2dc23167c8d8	1799	}
pHysiX	6:2dc23167c8d8	1800	/** Get I2C Master interrupt status.
pHysiX	6:2dc23167c8d8	1801	* This bit automatically sets to 1 when an I2C Master interrupt has been
pHysiX	6:2dc23167c8d8	1802	* generated. For a list of I2C Master interrupts, please refer to Register 54.
pHysiX	6:2dc23167c8d8	1803	* The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1804	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1805	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1806	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
pHysiX	6:2dc23167c8d8	1807	*/
pHysiX	6:2dc23167c8d8	1808	bool MPU6050::getIntI2CMasterStatus()
pHysiX	6:2dc23167c8d8	1809	{
pHysiX	6:2dc23167c8d8	1810	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	1811	return buffer[0];
pHysiX	6:2dc23167c8d8	1812	}
pHysiX	6:2dc23167c8d8	1813	/** Get Data Ready interrupt status.
pHysiX	6:2dc23167c8d8	1814	* This bit automatically sets to 1 when a Data Ready interrupt has been
pHysiX	6:2dc23167c8d8	1815	* generated. The bit clears to 0 after the register has been read.
pHysiX	6:2dc23167c8d8	1816	* @return Current interrupt status
pHysiX	6:2dc23167c8d8	1817	* @see MPU6050_RA_INT_STATUS
pHysiX	6:2dc23167c8d8	1818	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
pHysiX	6:2dc23167c8d8	1819	*/
pHysiX	6:2dc23167c8d8	1820	bool MPU6050::getIntDataReadyStatus()
pHysiX	6:2dc23167c8d8	1821	{
pHysiX	6:2dc23167c8d8	1822	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
pHysiX	6:2dc23167c8d8	1823	return buffer[0];
pHysiX	6:2dc23167c8d8	1824	}
pHysiX	6:2dc23167c8d8	1825
pHysiX	6:2dc23167c8d8	1826	// ACCEL_OUT_ registers
pHysiX	6:2dc23167c8d8	1827
pHysiX	6:2dc23167c8d8	1828	/** Get raw 9-axis motion sensor readings (accel/gyro/compass).
pHysiX	6:2dc23167c8d8	1829	* FUNCTION NOT FULLY IMPLEMENTED YET.
pHysiX	6:2dc23167c8d8	1830	* @param ax 16-bit signed integer container for accelerometer X-axis value
pHysiX	6:2dc23167c8d8	1831	* @param ay 16-bit signed integer container for accelerometer Y-axis value
pHysiX	6:2dc23167c8d8	1832	* @param az 16-bit signed integer container for accelerometer Z-axis value
pHysiX	6:2dc23167c8d8	1833	* @param gx 16-bit signed integer container for gyroscope X-axis value
pHysiX	6:2dc23167c8d8	1834	* @param gy 16-bit signed integer container for gyroscope Y-axis value
pHysiX	6:2dc23167c8d8	1835	* @param gz 16-bit signed integer container for gyroscope Z-axis value
pHysiX	6:2dc23167c8d8	1836	* @param mx 16-bit signed integer container for magnetometer X-axis value
pHysiX	6:2dc23167c8d8	1837	* @param my 16-bit signed integer container for magnetometer Y-axis value
pHysiX	6:2dc23167c8d8	1838	* @param mz 16-bit signed integer container for magnetometer Z-axis value
pHysiX	6:2dc23167c8d8	1839	* @see getMotion6()
pHysiX	6:2dc23167c8d8	1840	* @see getAcceleration()
pHysiX	6:2dc23167c8d8	1841	* @see getRotation()
pHysiX	6:2dc23167c8d8	1842	* @see MPU6050_RA_ACCEL_XOUT_H
pHysiX	6:2dc23167c8d8	1843	*/
pHysiX	6:2dc23167c8d8	1844	void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz)
pHysiX	6:2dc23167c8d8	1845	{
pHysiX	6:2dc23167c8d8	1846	getMotion6(ax, ay, az, gx, gy, gz);
pHysiX	6:2dc23167c8d8	1847
pHysiX	6:2dc23167c8d8	1848	// magnetometer reading
pHysiX	6:2dc23167c8d8	1849	i2Cdev.writeByte(devAddr, MPU6050_RA_INT_PIN_CFG, 0x02); //set i2c bypass enable pin to true to access magnetometer
pHysiX	6:2dc23167c8d8	1850	wait_ms(10); // necessary wait >=6ms
pHysiX	6:2dc23167c8d8	1851	i2Cdev.writeByte(MPU9150_RA_MAG_ADDRESS, 0x0A, 0x01); // enable the magnetometer
pHysiX	6:2dc23167c8d8	1852	wait_ms(10); // necessary wait >=6ms
pHysiX	6:2dc23167c8d8	1853	i2Cdev.readBytes(MPU9150_RA_MAG_ADDRESS, MPU9150_RA_MAG_XOUT_L, 6, buffer);
pHysiX	6:2dc23167c8d8	1854	*mx = (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1855	*my = (((int16_t)buffer[2]) << 8) \| buffer[3];
pHysiX	6:2dc23167c8d8	1856	*mz = (((int16_t)buffer[4]) << 8) \| buffer[5];
pHysiX	6:2dc23167c8d8	1857	}
pHysiX	6:2dc23167c8d8	1858	/** Get raw 6-axis motion sensor readings (accel/gyro).
pHysiX	6:2dc23167c8d8	1859	* Retrieves all currently available motion sensor values.
pHysiX	6:2dc23167c8d8	1860	* @param ax 16-bit signed integer container for accelerometer X-axis value
pHysiX	6:2dc23167c8d8	1861	* @param ay 16-bit signed integer container for accelerometer Y-axis value
pHysiX	6:2dc23167c8d8	1862	* @param az 16-bit signed integer container for accelerometer Z-axis value
pHysiX	6:2dc23167c8d8	1863	* @param gx 16-bit signed integer container for gyroscope X-axis value
pHysiX	6:2dc23167c8d8	1864	* @param gy 16-bit signed integer container for gyroscope Y-axis value
pHysiX	6:2dc23167c8d8	1865	* @param gz 16-bit signed integer container for gyroscope Z-axis value
pHysiX	6:2dc23167c8d8	1866	* @see getAcceleration()
pHysiX	6:2dc23167c8d8	1867	* @see getRotation()
pHysiX	6:2dc23167c8d8	1868	* @see MPU6050_RA_ACCEL_XOUT_H
pHysiX	6:2dc23167c8d8	1869	*/
pHysiX	6:2dc23167c8d8	1870	void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz)
pHysiX	6:2dc23167c8d8	1871	{
pHysiX	6:2dc23167c8d8	1872	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer);
pHysiX	6:2dc23167c8d8	1873	*ax = (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1874	*ay = (((int16_t)buffer[2]) << 8) \| buffer[3];
pHysiX	6:2dc23167c8d8	1875	*az = (((int16_t)buffer[4]) << 8) \| buffer[5];
pHysiX	6:2dc23167c8d8	1876	*gx = (((int16_t)buffer[8]) << 8) \| buffer[9];
pHysiX	6:2dc23167c8d8	1877	*gy = (((int16_t)buffer[10]) << 8) \| buffer[11];
pHysiX	6:2dc23167c8d8	1878	*gz = (((int16_t)buffer[12]) << 8) \| buffer[13];
pHysiX	6:2dc23167c8d8	1879	}
pHysiX	6:2dc23167c8d8	1880	/** Get 3-axis accelerometer readings.
pHysiX	6:2dc23167c8d8	1881	* These registers store the most recent accelerometer measurements.
pHysiX	6:2dc23167c8d8	1882	* Accelerometer measurements are written to these registers at the Sample Rate
pHysiX	6:2dc23167c8d8	1883	* as defined in Register 25.
pHysiX	6:2dc23167c8d8	1884	*
pHysiX	6:2dc23167c8d8	1885	* The accelerometer measurement registers, along with the temperature
pHysiX	6:2dc23167c8d8	1886	* measurement registers, gyroscope measurement registers, and external sensor
pHysiX	6:2dc23167c8d8	1887	* data registers, are composed of two sets of registers: an internal register
pHysiX	6:2dc23167c8d8	1888	* set and a user-facing read register set.
pHysiX	6:2dc23167c8d8	1889	*
pHysiX	6:2dc23167c8d8	1890	* The data within the accelerometer sensors' internal register set is always
pHysiX	6:2dc23167c8d8	1891	* updated at the Sample Rate. Meanwhile, the user-facing read register set
pHysiX	6:2dc23167c8d8	1892	* duplicates the internal register set's data values whenever the serial
pHysiX	6:2dc23167c8d8	1893	* interface is idle. This guarantees that a burst read of sensor registers will
pHysiX	6:2dc23167c8d8	1894	* read measurements from the same sampling instant. Note that if burst reads
pHysiX	6:2dc23167c8d8	1895	* are not used, the user is responsible for ensuring a set of single byte reads
pHysiX	6:2dc23167c8d8	1896	* correspond to a single sampling instant by checking the Data Ready interrupt.
pHysiX	6:2dc23167c8d8	1897	*
pHysiX	6:2dc23167c8d8	1898	* Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
pHysiX	6:2dc23167c8d8	1899	* (Register 28). For each full scale setting, the accelerometers' sensitivity
pHysiX	6:2dc23167c8d8	1900	* per LSB in ACCEL_xOUT is shown in the table below:
pHysiX	6:2dc23167c8d8	1901	*
pHysiX	6:2dc23167c8d8	1902	* <pre>
pHysiX	6:2dc23167c8d8	1903	* AFS_SEL \| Full Scale Range \| LSB Sensitivity
pHysiX	6:2dc23167c8d8	1904	* --------+------------------+----------------
pHysiX	6:2dc23167c8d8	1905	* 0 \| +/- 2g \| 8192 LSB/mg
pHysiX	6:2dc23167c8d8	1906	* 1 \| +/- 4g \| 4096 LSB/mg
pHysiX	6:2dc23167c8d8	1907	* 2 \| +/- 8g \| 2048 LSB/mg
pHysiX	6:2dc23167c8d8	1908	* 3 \| +/- 16g \| 1024 LSB/mg
pHysiX	6:2dc23167c8d8	1909	* </pre>
pHysiX	6:2dc23167c8d8	1910	*
pHysiX	6:2dc23167c8d8	1911	* @param x 16-bit signed integer container for X-axis acceleration
pHysiX	6:2dc23167c8d8	1912	* @param y 16-bit signed integer container for Y-axis acceleration
pHysiX	6:2dc23167c8d8	1913	* @param z 16-bit signed integer container for Z-axis acceleration
pHysiX	6:2dc23167c8d8	1914	* @see MPU6050_RA_GYRO_XOUT_H
pHysiX	6:2dc23167c8d8	1915	*/
pHysiX	6:2dc23167c8d8	1916	void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z)
pHysiX	6:2dc23167c8d8	1917	{
pHysiX	6:2dc23167c8d8	1918	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer);
pHysiX	6:2dc23167c8d8	1919	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1920	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
pHysiX	6:2dc23167c8d8	1921	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
pHysiX	6:2dc23167c8d8	1922	}
pHysiX	6:2dc23167c8d8	1923	/** Get X-axis accelerometer reading.
pHysiX	6:2dc23167c8d8	1924	* @return X-axis acceleration measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	1925	* @see getMotion6()
pHysiX	6:2dc23167c8d8	1926	* @see MPU6050_RA_ACCEL_XOUT_H
pHysiX	6:2dc23167c8d8	1927	*/
pHysiX	6:2dc23167c8d8	1928	int16_t MPU6050::getAccelerationX()
pHysiX	6:2dc23167c8d8	1929	{
pHysiX	6:2dc23167c8d8	1930	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	1931	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1932	}
pHysiX	6:2dc23167c8d8	1933	/** Get Y-axis accelerometer reading.
pHysiX	6:2dc23167c8d8	1934	* @return Y-axis acceleration measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	1935	* @see getMotion6()
pHysiX	6:2dc23167c8d8	1936	* @see MPU6050_RA_ACCEL_YOUT_H
pHysiX	6:2dc23167c8d8	1937	*/
pHysiX	6:2dc23167c8d8	1938	int16_t MPU6050::getAccelerationY()
pHysiX	6:2dc23167c8d8	1939	{
pHysiX	6:2dc23167c8d8	1940	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	1941	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1942	}
pHysiX	6:2dc23167c8d8	1943	/** Get Z-axis accelerometer reading.
pHysiX	6:2dc23167c8d8	1944	* @return Z-axis acceleration measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	1945	* @see getMotion6()
pHysiX	6:2dc23167c8d8	1946	* @see MPU6050_RA_ACCEL_ZOUT_H
pHysiX	6:2dc23167c8d8	1947	*/
pHysiX	6:2dc23167c8d8	1948	int16_t MPU6050::getAccelerationZ()
pHysiX	6:2dc23167c8d8	1949	{
pHysiX	6:2dc23167c8d8	1950	i2Cdev.readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	1951	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1952	}
pHysiX	6:2dc23167c8d8	1953
pHysiX	6:2dc23167c8d8	1954	// TEMP_OUT_* registers
pHysiX	6:2dc23167c8d8	1955
pHysiX	6:2dc23167c8d8	1956	/** Get current internal temperature.
pHysiX	6:2dc23167c8d8	1957	* @return Temperature reading in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	1958	* @see MPU6050_RA_TEMP_OUT_H
pHysiX	6:2dc23167c8d8	1959	*/
pHysiX	6:2dc23167c8d8	1960	int16_t MPU6050::getTemperature()
pHysiX	6:2dc23167c8d8	1961	{
pHysiX	6:2dc23167c8d8	1962	i2Cdev.readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	1963	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	1964	}
pHysiX	6:2dc23167c8d8	1965
pHysiX	6:2dc23167c8d8	1966	// GYRO_OUT_ registers
pHysiX	6:2dc23167c8d8	1967
pHysiX	6:2dc23167c8d8	1968	/** Get 3-axis gyroscope readings.
pHysiX	6:2dc23167c8d8	1969	* These gyroscope measurement registers, along with the accelerometer
pHysiX	6:2dc23167c8d8	1970	* measurement registers, temperature measurement registers, and external sensor
pHysiX	6:2dc23167c8d8	1971	* data registers, are composed of two sets of registers: an internal register
pHysiX	6:2dc23167c8d8	1972	* set and a user-facing read register set.
pHysiX	6:2dc23167c8d8	1973	* The data within the gyroscope sensors' internal register set is always
pHysiX	6:2dc23167c8d8	1974	* updated at the Sample Rate. Meanwhile, the user-facing read register set
pHysiX	6:2dc23167c8d8	1975	* duplicates the internal register set's data values whenever the serial
pHysiX	6:2dc23167c8d8	1976	* interface is idle. This guarantees that a burst read of sensor registers will
pHysiX	6:2dc23167c8d8	1977	* read measurements from the same sampling instant. Note that if burst reads
pHysiX	6:2dc23167c8d8	1978	* are not used, the user is responsible for ensuring a set of single byte reads
pHysiX	6:2dc23167c8d8	1979	* correspond to a single sampling instant by checking the Data Ready interrupt.
pHysiX	6:2dc23167c8d8	1980	*
pHysiX	6:2dc23167c8d8	1981	* Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
pHysiX	6:2dc23167c8d8	1982	* (Register 27). For each full scale setting, the gyroscopes' sensitivity per
pHysiX	6:2dc23167c8d8	1983	* LSB in GYRO_xOUT is shown in the table below:
pHysiX	6:2dc23167c8d8	1984	*
pHysiX	6:2dc23167c8d8	1985	* <pre>
pHysiX	6:2dc23167c8d8	1986	* FS_SEL \| Full Scale Range \| LSB Sensitivity
pHysiX	6:2dc23167c8d8	1987	* -------+--------------------+----------------
pHysiX	6:2dc23167c8d8	1988	* 0 \| +/- 250 degrees/s \| 131 LSB/deg/s
pHysiX	6:2dc23167c8d8	1989	* 1 \| +/- 500 degrees/s \| 65.5 LSB/deg/s
pHysiX	6:2dc23167c8d8	1990	* 2 \| +/- 1000 degrees/s \| 32.8 LSB/deg/s
pHysiX	6:2dc23167c8d8	1991	* 3 \| +/- 2000 degrees/s \| 16.4 LSB/deg/s
pHysiX	6:2dc23167c8d8	1992	* </pre>
pHysiX	6:2dc23167c8d8	1993	*
pHysiX	6:2dc23167c8d8	1994	* @param x 16-bit signed integer container for X-axis rotation
pHysiX	6:2dc23167c8d8	1995	* @param y 16-bit signed integer container for Y-axis rotation
pHysiX	6:2dc23167c8d8	1996	* @param z 16-bit signed integer container for Z-axis rotation
pHysiX	6:2dc23167c8d8	1997	* @see getMotion6()
pHysiX	6:2dc23167c8d8	1998	* @see MPU6050_RA_GYRO_XOUT_H
pHysiX	6:2dc23167c8d8	1999	*/
pHysiX	6:2dc23167c8d8	2000	void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z)
pHysiX	6:2dc23167c8d8	2001	{
pHysiX	6:2dc23167c8d8	2002	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer);
pHysiX	6:2dc23167c8d8	2003	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2004	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
pHysiX	6:2dc23167c8d8	2005	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
pHysiX	6:2dc23167c8d8	2006	}
pHysiX	6:2dc23167c8d8	2007	/** Get X-axis gyroscope reading.
pHysiX	6:2dc23167c8d8	2008	* @return X-axis rotation measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	2009	* @see getMotion6()
pHysiX	6:2dc23167c8d8	2010	* @see MPU6050_RA_GYRO_XOUT_H
pHysiX	6:2dc23167c8d8	2011	*/
pHysiX	6:2dc23167c8d8	2012	int16_t MPU6050::getRotationX()
pHysiX	6:2dc23167c8d8	2013	{
pHysiX	6:2dc23167c8d8	2014	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	2015	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2016	}
pHysiX	6:2dc23167c8d8	2017	/** Get Y-axis gyroscope reading.
pHysiX	6:2dc23167c8d8	2018	* @return Y-axis rotation measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	2019	* @see getMotion6()
pHysiX	6:2dc23167c8d8	2020	* @see MPU6050_RA_GYRO_YOUT_H
pHysiX	6:2dc23167c8d8	2021	*/
pHysiX	6:2dc23167c8d8	2022	int16_t MPU6050::getRotationY()
pHysiX	6:2dc23167c8d8	2023	{
pHysiX	6:2dc23167c8d8	2024	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	2025	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2026	}
pHysiX	6:2dc23167c8d8	2027	/** Get Z-axis gyroscope reading.
pHysiX	6:2dc23167c8d8	2028	* @return Z-axis rotation measurement in 16-bit 2's complement format
pHysiX	6:2dc23167c8d8	2029	* @see getMotion6()
pHysiX	6:2dc23167c8d8	2030	* @see MPU6050_RA_GYRO_ZOUT_H
pHysiX	6:2dc23167c8d8	2031	*/
pHysiX	6:2dc23167c8d8	2032	int16_t MPU6050::getRotationZ()
pHysiX	6:2dc23167c8d8	2033	{
pHysiX	6:2dc23167c8d8	2034	i2Cdev.readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer);
pHysiX	6:2dc23167c8d8	2035	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2036	}
pHysiX	6:2dc23167c8d8	2037
pHysiX	6:2dc23167c8d8	2038	// EXT_SENS_DATA_* registers
pHysiX	6:2dc23167c8d8	2039
pHysiX	6:2dc23167c8d8	2040	/** Read single byte from external sensor data register.
pHysiX	6:2dc23167c8d8	2041	* These registers store data read from external sensors by the Slave 0, 1, 2,
pHysiX	6:2dc23167c8d8	2042	* and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
pHysiX	6:2dc23167c8d8	2043	* I2C_SLV4_DI (Register 53).
pHysiX	6:2dc23167c8d8	2044	*
pHysiX	6:2dc23167c8d8	2045	* External sensor data is written to these registers at the Sample Rate as
pHysiX	6:2dc23167c8d8	2046	* defined in Register 25. This access rate can be reduced by using the Slave
pHysiX	6:2dc23167c8d8	2047	* Delay Enable registers (Register 103).
pHysiX	6:2dc23167c8d8	2048	*
pHysiX	6:2dc23167c8d8	2049	* External sensor data registers, along with the gyroscope measurement
pHysiX	6:2dc23167c8d8	2050	* registers, accelerometer measurement registers, and temperature measurement
pHysiX	6:2dc23167c8d8	2051	* registers, are composed of two sets of registers: an internal register set
pHysiX	6:2dc23167c8d8	2052	* and a user-facing read register set.
pHysiX	6:2dc23167c8d8	2053	*
pHysiX	6:2dc23167c8d8	2054	* The data within the external sensors' internal register set is always updated
pHysiX	6:2dc23167c8d8	2055	* at the Sample Rate (or the reduced access rate) whenever the serial interface
pHysiX	6:2dc23167c8d8	2056	* is idle. This guarantees that a burst read of sensor registers will read
pHysiX	6:2dc23167c8d8	2057	* measurements from the same sampling instant. Note that if burst reads are not
pHysiX	6:2dc23167c8d8	2058	* used, the user is responsible for ensuring a set of single byte reads
pHysiX	6:2dc23167c8d8	2059	* correspond to a single sampling instant by checking the Data Ready interrupt.
pHysiX	6:2dc23167c8d8	2060	*
pHysiX	6:2dc23167c8d8	2061	* Data is placed in these external sensor data registers according to
pHysiX	6:2dc23167c8d8	2062	* I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
pHysiX	6:2dc23167c8d8	2063	* 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
pHysiX	6:2dc23167c8d8	2064	* an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
pHysiX	6:2dc23167c8d8	2065	* defined in Register 25) or delayed rate (if specified in Register 52 and
pHysiX	6:2dc23167c8d8	2066	* 103). During each Sample cycle, slave reads are performed in order of Slave
pHysiX	6:2dc23167c8d8	2067	* number. If all slaves are enabled with more than zero bytes to be read, the
pHysiX	6:2dc23167c8d8	2068	* order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
pHysiX	6:2dc23167c8d8	2069	*
pHysiX	6:2dc23167c8d8	2070	* Each enabled slave will have EXT_SENS_DATA registers associated with it by
pHysiX	6:2dc23167c8d8	2071	* number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
pHysiX	6:2dc23167c8d8	2072	* EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
pHysiX	6:2dc23167c8d8	2073	* change the higher numbered slaves' associated registers. Furthermore, if
pHysiX	6:2dc23167c8d8	2074	* fewer total bytes are being read from the external sensors as a result of
pHysiX	6:2dc23167c8d8	2075	* such a change, then the data remaining in the registers which no longer have
pHysiX	6:2dc23167c8d8	2076	* an associated slave device (i.e. high numbered registers) will remain in
pHysiX	6:2dc23167c8d8	2077	* these previously allocated registers unless reset.
pHysiX	6:2dc23167c8d8	2078	*
pHysiX	6:2dc23167c8d8	2079	* If the sum of the read lengths of all SLVx transactions exceed the number of
pHysiX	6:2dc23167c8d8	2080	* available EXT_SENS_DATA registers, the excess bytes will be dropped. There
pHysiX	6:2dc23167c8d8	2081	* are 24 EXT_SENS_DATA registers and hence the total read lengths between all
pHysiX	6:2dc23167c8d8	2082	* the slaves cannot be greater than 24 or some bytes will be lost.
pHysiX	6:2dc23167c8d8	2083	*
pHysiX	6:2dc23167c8d8	2084	* Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
pHysiX	6:2dc23167c8d8	2085	* information regarding the characteristics of Slave 4, please refer to
pHysiX	6:2dc23167c8d8	2086	* Registers 49 to 53.
pHysiX	6:2dc23167c8d8	2087	*
pHysiX	6:2dc23167c8d8	2088	* EXAMPLE:
pHysiX	6:2dc23167c8d8	2089	* Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
pHysiX	6:2dc23167c8d8	2090	* I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
pHysiX	6:2dc23167c8d8	2091	* I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
pHysiX	6:2dc23167c8d8	2092	* through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
pHysiX	6:2dc23167c8d8	2093	* will be associated with Slave 1. If Slave 2 is enabled as well, registers
pHysiX	6:2dc23167c8d8	2094	* starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
pHysiX	6:2dc23167c8d8	2095	*
pHysiX	6:2dc23167c8d8	2096	* If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
pHysiX	6:2dc23167c8d8	2097	* registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
pHysiX	6:2dc23167c8d8	2098	* instead.
pHysiX	6:2dc23167c8d8	2099	*
pHysiX	6:2dc23167c8d8	2100	* REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
pHysiX	6:2dc23167c8d8	2101	* If a slave is disabled at any time, the space initially allocated to the
pHysiX	6:2dc23167c8d8	2102	* slave in the EXT_SENS_DATA register, will remain associated with that slave.
pHysiX	6:2dc23167c8d8	2103	* This is to avoid dynamic adjustment of the register allocation.
pHysiX	6:2dc23167c8d8	2104	*
pHysiX	6:2dc23167c8d8	2105	* The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
pHysiX	6:2dc23167c8d8	2106	* slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
pHysiX	6:2dc23167c8d8	2107	*
pHysiX	6:2dc23167c8d8	2108	* This above is also true if one of the slaves gets NACKed and stops
pHysiX	6:2dc23167c8d8	2109	* functioning.
pHysiX	6:2dc23167c8d8	2110	*
pHysiX	6:2dc23167c8d8	2111	* @param position Starting position (0-23)
pHysiX	6:2dc23167c8d8	2112	* @return Byte read from register
pHysiX	6:2dc23167c8d8	2113	*/
pHysiX	6:2dc23167c8d8	2114	uint8_t MPU6050::getExternalSensorByte(int position)
pHysiX	6:2dc23167c8d8	2115	{
pHysiX	6:2dc23167c8d8	2116	i2Cdev.readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer);
pHysiX	6:2dc23167c8d8	2117	return buffer[0];
pHysiX	6:2dc23167c8d8	2118	}
pHysiX	6:2dc23167c8d8	2119	/** Read word (2 bytes) from external sensor data registers.
pHysiX	6:2dc23167c8d8	2120	* @param position Starting position (0-21)
pHysiX	6:2dc23167c8d8	2121	* @return Word read from register
pHysiX	6:2dc23167c8d8	2122	* @see getExternalSensorByte()
pHysiX	6:2dc23167c8d8	2123	*/
pHysiX	6:2dc23167c8d8	2124	uint16_t MPU6050::getExternalSensorWord(int position)
pHysiX	6:2dc23167c8d8	2125	{
pHysiX	6:2dc23167c8d8	2126	i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer);
pHysiX	6:2dc23167c8d8	2127	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2128	}
pHysiX	6:2dc23167c8d8	2129	/** Read double word (4 bytes) from external sensor data registers.
pHysiX	6:2dc23167c8d8	2130	* @param position Starting position (0-20)
pHysiX	6:2dc23167c8d8	2131	* @return Double word read from registers
pHysiX	6:2dc23167c8d8	2132	* @see getExternalSensorByte()
pHysiX	6:2dc23167c8d8	2133	*/
pHysiX	6:2dc23167c8d8	2134	uint32_t MPU6050::getExternalSensorDWord(int position)
pHysiX	6:2dc23167c8d8	2135	{
pHysiX	6:2dc23167c8d8	2136	i2Cdev.readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer);
pHysiX	6:2dc23167c8d8	2137	return (((uint32_t)buffer[0]) << 24) \| (((uint32_t)buffer[1]) << 16) \| (((uint16_t)buffer[2]) << 8) \| buffer[3];
pHysiX	6:2dc23167c8d8	2138	}
pHysiX	6:2dc23167c8d8	2139
pHysiX	6:2dc23167c8d8	2140	// MOT_DETECT_STATUS register
pHysiX	6:2dc23167c8d8	2141
pHysiX	6:2dc23167c8d8	2142	/** Get X-axis negative motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2143	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2144	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2145	* @see MPU6050_MOTION_MOT_XNEG_BIT
pHysiX	6:2dc23167c8d8	2146	*/
pHysiX	6:2dc23167c8d8	2147	bool MPU6050::getXNegMotionDetected()
pHysiX	6:2dc23167c8d8	2148	{
pHysiX	6:2dc23167c8d8	2149	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2150	return buffer[0];
pHysiX	6:2dc23167c8d8	2151	}
pHysiX	6:2dc23167c8d8	2152	/** Get X-axis positive motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2153	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2154	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2155	* @see MPU6050_MOTION_MOT_XPOS_BIT
pHysiX	6:2dc23167c8d8	2156	*/
pHysiX	6:2dc23167c8d8	2157	bool MPU6050::getXPosMotionDetected()
pHysiX	6:2dc23167c8d8	2158	{
pHysiX	6:2dc23167c8d8	2159	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer);
pHysiX	6:2dc23167c8d8	2160	return buffer[0];
pHysiX	6:2dc23167c8d8	2161	}
pHysiX	6:2dc23167c8d8	2162	/** Get Y-axis negative motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2163	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2164	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2165	* @see MPU6050_MOTION_MOT_YNEG_BIT
pHysiX	6:2dc23167c8d8	2166	*/
pHysiX	6:2dc23167c8d8	2167	bool MPU6050::getYNegMotionDetected()
pHysiX	6:2dc23167c8d8	2168	{
pHysiX	6:2dc23167c8d8	2169	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2170	return buffer[0];
pHysiX	6:2dc23167c8d8	2171	}
pHysiX	6:2dc23167c8d8	2172	/** Get Y-axis positive motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2173	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2174	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2175	* @see MPU6050_MOTION_MOT_YPOS_BIT
pHysiX	6:2dc23167c8d8	2176	*/
pHysiX	6:2dc23167c8d8	2177	bool MPU6050::getYPosMotionDetected()
pHysiX	6:2dc23167c8d8	2178	{
pHysiX	6:2dc23167c8d8	2179	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer);
pHysiX	6:2dc23167c8d8	2180	return buffer[0];
pHysiX	6:2dc23167c8d8	2181	}
pHysiX	6:2dc23167c8d8	2182	/** Get Z-axis negative motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2183	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2184	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2185	* @see MPU6050_MOTION_MOT_ZNEG_BIT
pHysiX	6:2dc23167c8d8	2186	*/
pHysiX	6:2dc23167c8d8	2187	bool MPU6050::getZNegMotionDetected()
pHysiX	6:2dc23167c8d8	2188	{
pHysiX	6:2dc23167c8d8	2189	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2190	return buffer[0];
pHysiX	6:2dc23167c8d8	2191	}
pHysiX	6:2dc23167c8d8	2192	/** Get Z-axis positive motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2193	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2194	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2195	* @see MPU6050_MOTION_MOT_ZPOS_BIT
pHysiX	6:2dc23167c8d8	2196	*/
pHysiX	6:2dc23167c8d8	2197	bool MPU6050::getZPosMotionDetected()
pHysiX	6:2dc23167c8d8	2198	{
pHysiX	6:2dc23167c8d8	2199	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer);
pHysiX	6:2dc23167c8d8	2200	return buffer[0];
pHysiX	6:2dc23167c8d8	2201	}
pHysiX	6:2dc23167c8d8	2202	/** Get zero motion detection interrupt status.
pHysiX	6:2dc23167c8d8	2203	* @return Motion detection status
pHysiX	6:2dc23167c8d8	2204	* @see MPU6050_RA_MOT_DETECT_STATUS
pHysiX	6:2dc23167c8d8	2205	* @see MPU6050_MOTION_MOT_ZRMOT_BIT
pHysiX	6:2dc23167c8d8	2206	*/
pHysiX	6:2dc23167c8d8	2207	bool MPU6050::getZeroMotionDetected()
pHysiX	6:2dc23167c8d8	2208	{
pHysiX	6:2dc23167c8d8	2209	i2Cdev.readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer);
pHysiX	6:2dc23167c8d8	2210	return buffer[0];
pHysiX	6:2dc23167c8d8	2211	}
pHysiX	6:2dc23167c8d8	2212
pHysiX	6:2dc23167c8d8	2213	// I2C_SLV*_DO register
pHysiX	6:2dc23167c8d8	2214
pHysiX	6:2dc23167c8d8	2215	/** Write byte to Data Output container for specified slave.
pHysiX	6:2dc23167c8d8	2216	* This register holds the output data written into Slave when Slave is set to
pHysiX	6:2dc23167c8d8	2217	* write mode. For further information regarding Slave control, please
pHysiX	6:2dc23167c8d8	2218	* refer to Registers 37 to 39 and immediately following.
pHysiX	6:2dc23167c8d8	2219	* @param num Slave number (0-3)
pHysiX	6:2dc23167c8d8	2220	* @param data Byte to write
pHysiX	6:2dc23167c8d8	2221	* @see MPU6050_RA_I2C_SLV0_DO
pHysiX	6:2dc23167c8d8	2222	*/
pHysiX	6:2dc23167c8d8	2223	void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data)
pHysiX	6:2dc23167c8d8	2224	{
pHysiX	6:2dc23167c8d8	2225	if (num > 3) return;
pHysiX	6:2dc23167c8d8	2226	i2Cdev.writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data);
pHysiX	6:2dc23167c8d8	2227	}
pHysiX	6:2dc23167c8d8	2228
pHysiX	6:2dc23167c8d8	2229	// I2C_MST_DELAY_CTRL register
pHysiX	6:2dc23167c8d8	2230
pHysiX	6:2dc23167c8d8	2231	/** Get external data shadow delay enabled status.
pHysiX	6:2dc23167c8d8	2232	* This register is used to specify the timing of external sensor data
pHysiX	6:2dc23167c8d8	2233	* shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
pHysiX	6:2dc23167c8d8	2234	* sensor data is delayed until all data has been received.
pHysiX	6:2dc23167c8d8	2235	* @return Current external data shadow delay enabled status.
pHysiX	6:2dc23167c8d8	2236	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
pHysiX	6:2dc23167c8d8	2237	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
pHysiX	6:2dc23167c8d8	2238	*/
pHysiX	6:2dc23167c8d8	2239	bool MPU6050::getExternalShadowDelayEnabled()
pHysiX	6:2dc23167c8d8	2240	{
pHysiX	6:2dc23167c8d8	2241	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
pHysiX	6:2dc23167c8d8	2242	return buffer[0];
pHysiX	6:2dc23167c8d8	2243	}
pHysiX	6:2dc23167c8d8	2244	/** Set external data shadow delay enabled status.
pHysiX	6:2dc23167c8d8	2245	* @param enabled New external data shadow delay enabled status.
pHysiX	6:2dc23167c8d8	2246	* @see getExternalShadowDelayEnabled()
pHysiX	6:2dc23167c8d8	2247	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
pHysiX	6:2dc23167c8d8	2248	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
pHysiX	6:2dc23167c8d8	2249	*/
pHysiX	6:2dc23167c8d8	2250	void MPU6050::setExternalShadowDelayEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2251	{
pHysiX	6:2dc23167c8d8	2252	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
pHysiX	6:2dc23167c8d8	2253	}
pHysiX	6:2dc23167c8d8	2254	/** Get slave delay enabled status.
pHysiX	6:2dc23167c8d8	2255	* When a particular slave delay is enabled, the rate of access for the that
pHysiX	6:2dc23167c8d8	2256	* slave device is reduced. When a slave's access rate is decreased relative to
pHysiX	6:2dc23167c8d8	2257	* the Sample Rate, the slave is accessed every:
pHysiX	6:2dc23167c8d8	2258	*
pHysiX	6:2dc23167c8d8	2259	* 1 / (1 + I2C_MST_DLY) Samples
pHysiX	6:2dc23167c8d8	2260	*
pHysiX	6:2dc23167c8d8	2261	* This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25)
pHysiX	6:2dc23167c8d8	2262	* and DLPF_CFG (register 26).
pHysiX	6:2dc23167c8d8	2263	*
pHysiX	6:2dc23167c8d8	2264	* For further information regarding I2C_MST_DLY, please refer to register 52.
pHysiX	6:2dc23167c8d8	2265	* For further information regarding the Sample Rate, please refer to register 25.
pHysiX	6:2dc23167c8d8	2266	*
pHysiX	6:2dc23167c8d8	2267	* @param num Slave number (0-4)
pHysiX	6:2dc23167c8d8	2268	* @return Current slave delay enabled status.
pHysiX	6:2dc23167c8d8	2269	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
pHysiX	6:2dc23167c8d8	2270	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
pHysiX	6:2dc23167c8d8	2271	*/
pHysiX	6:2dc23167c8d8	2272	bool MPU6050::getSlaveDelayEnabled(uint8_t num)
pHysiX	6:2dc23167c8d8	2273	{
pHysiX	6:2dc23167c8d8	2274	// MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
pHysiX	6:2dc23167c8d8	2275	if (num > 4) return 0;
pHysiX	6:2dc23167c8d8	2276	i2Cdev.readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer);
pHysiX	6:2dc23167c8d8	2277	return buffer[0];
pHysiX	6:2dc23167c8d8	2278	}
pHysiX	6:2dc23167c8d8	2279	/** Set slave delay enabled status.
pHysiX	6:2dc23167c8d8	2280	* @param num Slave number (0-4)
pHysiX	6:2dc23167c8d8	2281	* @param enabled New slave delay enabled status.
pHysiX	6:2dc23167c8d8	2282	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
pHysiX	6:2dc23167c8d8	2283	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
pHysiX	6:2dc23167c8d8	2284	*/
pHysiX	6:2dc23167c8d8	2285	void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled)
pHysiX	6:2dc23167c8d8	2286	{
pHysiX	6:2dc23167c8d8	2287	i2Cdev.writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled);
pHysiX	6:2dc23167c8d8	2288	}
pHysiX	6:2dc23167c8d8	2289
pHysiX	6:2dc23167c8d8	2290	// SIGNAL_PATH_RESET register
pHysiX	6:2dc23167c8d8	2291
pHysiX	6:2dc23167c8d8	2292	/** Reset gyroscope signal path.
pHysiX	6:2dc23167c8d8	2293	* The reset will revert the signal path analog to digital converters and
pHysiX	6:2dc23167c8d8	2294	* filters to their power up configurations.
pHysiX	6:2dc23167c8d8	2295	* @see MPU6050_RA_SIGNAL_PATH_RESET
pHysiX	6:2dc23167c8d8	2296	* @see MPU6050_PATHRESET_GYRO_RESET_BIT
pHysiX	6:2dc23167c8d8	2297	*/
pHysiX	6:2dc23167c8d8	2298	void MPU6050::resetGyroscopePath()
pHysiX	6:2dc23167c8d8	2299	{
pHysiX	6:2dc23167c8d8	2300	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2301	}
pHysiX	6:2dc23167c8d8	2302	/** Reset accelerometer signal path.
pHysiX	6:2dc23167c8d8	2303	* The reset will revert the signal path analog to digital converters and
pHysiX	6:2dc23167c8d8	2304	* filters to their power up configurations.
pHysiX	6:2dc23167c8d8	2305	* @see MPU6050_RA_SIGNAL_PATH_RESET
pHysiX	6:2dc23167c8d8	2306	* @see MPU6050_PATHRESET_ACCEL_RESET_BIT
pHysiX	6:2dc23167c8d8	2307	*/
pHysiX	6:2dc23167c8d8	2308	void MPU6050::resetAccelerometerPath()
pHysiX	6:2dc23167c8d8	2309	{
pHysiX	6:2dc23167c8d8	2310	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2311	}
pHysiX	6:2dc23167c8d8	2312	/** Reset temperature sensor signal path.
pHysiX	6:2dc23167c8d8	2313	* The reset will revert the signal path analog to digital converters and
pHysiX	6:2dc23167c8d8	2314	* filters to their power up configurations.
pHysiX	6:2dc23167c8d8	2315	* @see MPU6050_RA_SIGNAL_PATH_RESET
pHysiX	6:2dc23167c8d8	2316	* @see MPU6050_PATHRESET_TEMP_RESET_BIT
pHysiX	6:2dc23167c8d8	2317	*/
pHysiX	6:2dc23167c8d8	2318	void MPU6050::resetTemperaturePath()
pHysiX	6:2dc23167c8d8	2319	{
pHysiX	6:2dc23167c8d8	2320	i2Cdev.writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2321	}
pHysiX	6:2dc23167c8d8	2322
pHysiX	6:2dc23167c8d8	2323	// MOT_DETECT_CTRL register
pHysiX	6:2dc23167c8d8	2324
pHysiX	6:2dc23167c8d8	2325	/** Get accelerometer power-on delay.
pHysiX	6:2dc23167c8d8	2326	* The accelerometer data path provides samples to the sensor registers, Motion
pHysiX	6:2dc23167c8d8	2327	* detection, Zero Motion detection, and Free Fall detection modules. The
pHysiX	6:2dc23167c8d8	2328	* signal path contains filters which must be flushed on wake-up with new
pHysiX	6:2dc23167c8d8	2329	* samples before the detection modules begin operations. The default wake-up
pHysiX	6:2dc23167c8d8	2330	* delay, of 4ms can be lengthened by up to 3ms. This additional delay is
pHysiX	6:2dc23167c8d8	2331	* specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
pHysiX	6:2dc23167c8d8	2332	* any value above zero unless instructed otherwise by InvenSense. Please refer
pHysiX	6:2dc23167c8d8	2333	* to Section 8 of the MPU-6000/MPU-6050 Product Specification document for
pHysiX	6:2dc23167c8d8	2334	* further information regarding the detection modules.
pHysiX	6:2dc23167c8d8	2335	* @return Current accelerometer power-on delay
pHysiX	6:2dc23167c8d8	2336	* @see MPU6050_RA_MOT_DETECT_CTRL
pHysiX	6:2dc23167c8d8	2337	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
pHysiX	6:2dc23167c8d8	2338	*/
pHysiX	6:2dc23167c8d8	2339	uint8_t MPU6050::getAccelerometerPowerOnDelay()
pHysiX	6:2dc23167c8d8	2340	{
pHysiX	6:2dc23167c8d8	2341	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2342	return buffer[0];
pHysiX	6:2dc23167c8d8	2343	}
pHysiX	6:2dc23167c8d8	2344	/** Set accelerometer power-on delay.
pHysiX	6:2dc23167c8d8	2345	* @param delay New accelerometer power-on delay (0-3)
pHysiX	6:2dc23167c8d8	2346	* @see getAccelerometerPowerOnDelay()
pHysiX	6:2dc23167c8d8	2347	* @see MPU6050_RA_MOT_DETECT_CTRL
pHysiX	6:2dc23167c8d8	2348	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
pHysiX	6:2dc23167c8d8	2349	*/
pHysiX	6:2dc23167c8d8	2350	void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay)
pHysiX	6:2dc23167c8d8	2351	{
pHysiX	6:2dc23167c8d8	2352	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
pHysiX	6:2dc23167c8d8	2353	}
pHysiX	6:2dc23167c8d8	2354	/** Get Free Fall detection counter decrement configuration.
pHysiX	6:2dc23167c8d8	2355	* Detection is registered by the Free Fall detection module after accelerometer
pHysiX	6:2dc23167c8d8	2356	* measurements meet their respective threshold conditions over a specified
pHysiX	6:2dc23167c8d8	2357	* number of samples. When the threshold conditions are met, the corresponding
pHysiX	6:2dc23167c8d8	2358	* detection counter increments by 1. The user may control the rate at which the
pHysiX	6:2dc23167c8d8	2359	* detection counter decrements when the threshold condition is not met by
pHysiX	6:2dc23167c8d8	2360	* configuring FF_COUNT. The decrement rate can be set according to the
pHysiX	6:2dc23167c8d8	2361	* following table:
pHysiX	6:2dc23167c8d8	2362	*
pHysiX	6:2dc23167c8d8	2363	* <pre>
pHysiX	6:2dc23167c8d8	2364	* FF_COUNT \| Counter Decrement
pHysiX	6:2dc23167c8d8	2365	* ---------+------------------
pHysiX	6:2dc23167c8d8	2366	* 0 \| Reset
pHysiX	6:2dc23167c8d8	2367	* 1 \| 1
pHysiX	6:2dc23167c8d8	2368	* 2 \| 2
pHysiX	6:2dc23167c8d8	2369	* 3 \| 4
pHysiX	6:2dc23167c8d8	2370	* </pre>
pHysiX	6:2dc23167c8d8	2371	*
pHysiX	6:2dc23167c8d8	2372	* When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
pHysiX	6:2dc23167c8d8	2373	* reset the counter to 0. For further information on Free Fall detection,
pHysiX	6:2dc23167c8d8	2374	* please refer to Registers 29 to 32.
pHysiX	6:2dc23167c8d8	2375	*
pHysiX	6:2dc23167c8d8	2376	* @return Current decrement configuration
pHysiX	6:2dc23167c8d8	2377	* @see MPU6050_RA_MOT_DETECT_CTRL
pHysiX	6:2dc23167c8d8	2378	* @see MPU6050_DETECT_FF_COUNT_BIT
pHysiX	6:2dc23167c8d8	2379	*/
pHysiX	6:2dc23167c8d8	2380	uint8_t MPU6050::getFreefallDetectionCounterDecrement()
pHysiX	6:2dc23167c8d8	2381	{
pHysiX	6:2dc23167c8d8	2382	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2383	return buffer[0];
pHysiX	6:2dc23167c8d8	2384	}
pHysiX	6:2dc23167c8d8	2385	/** Set Free Fall detection counter decrement configuration.
pHysiX	6:2dc23167c8d8	2386	* @param decrement New decrement configuration value
pHysiX	6:2dc23167c8d8	2387	* @see getFreefallDetectionCounterDecrement()
pHysiX	6:2dc23167c8d8	2388	* @see MPU6050_RA_MOT_DETECT_CTRL
pHysiX	6:2dc23167c8d8	2389	* @see MPU6050_DETECT_FF_COUNT_BIT
pHysiX	6:2dc23167c8d8	2390	*/
pHysiX	6:2dc23167c8d8	2391	void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement)
pHysiX	6:2dc23167c8d8	2392	{
pHysiX	6:2dc23167c8d8	2393	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement);
pHysiX	6:2dc23167c8d8	2394	}
pHysiX	6:2dc23167c8d8	2395	/** Get Motion detection counter decrement configuration.
pHysiX	6:2dc23167c8d8	2396	* Detection is registered by the Motion detection module after accelerometer
pHysiX	6:2dc23167c8d8	2397	* measurements meet their respective threshold conditions over a specified
pHysiX	6:2dc23167c8d8	2398	* number of samples. When the threshold conditions are met, the corresponding
pHysiX	6:2dc23167c8d8	2399	* detection counter increments by 1. The user may control the rate at which the
pHysiX	6:2dc23167c8d8	2400	* detection counter decrements when the threshold condition is not met by
pHysiX	6:2dc23167c8d8	2401	* configuring MOT_COUNT. The decrement rate can be set according to the
pHysiX	6:2dc23167c8d8	2402	* following table:
pHysiX	6:2dc23167c8d8	2403	*
pHysiX	6:2dc23167c8d8	2404	* <pre>
pHysiX	6:2dc23167c8d8	2405	* MOT_COUNT \| Counter Decrement
pHysiX	6:2dc23167c8d8	2406	* ----------+------------------
pHysiX	6:2dc23167c8d8	2407	* 0 \| Reset
pHysiX	6:2dc23167c8d8	2408	* 1 \| 1
pHysiX	6:2dc23167c8d8	2409	* 2 \| 2
pHysiX	6:2dc23167c8d8	2410	* 3 \| 4
pHysiX	6:2dc23167c8d8	2411	* </pre>
pHysiX	6:2dc23167c8d8	2412	*
pHysiX	6:2dc23167c8d8	2413	* When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
pHysiX	6:2dc23167c8d8	2414	* reset the counter to 0. For further information on Motion detection,
pHysiX	6:2dc23167c8d8	2415	* please refer to Registers 29 to 32.
pHysiX	6:2dc23167c8d8	2416	*
pHysiX	6:2dc23167c8d8	2417	*/
pHysiX	6:2dc23167c8d8	2418	uint8_t MPU6050::getMotionDetectionCounterDecrement()
pHysiX	6:2dc23167c8d8	2419	{
pHysiX	6:2dc23167c8d8	2420	i2Cdev.readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2421	return buffer[0];
pHysiX	6:2dc23167c8d8	2422	}
pHysiX	6:2dc23167c8d8	2423	/** Set Motion detection counter decrement configuration.
pHysiX	6:2dc23167c8d8	2424	* @param decrement New decrement configuration value
pHysiX	6:2dc23167c8d8	2425	* @see getMotionDetectionCounterDecrement()
pHysiX	6:2dc23167c8d8	2426	* @see MPU6050_RA_MOT_DETECT_CTRL
pHysiX	6:2dc23167c8d8	2427	* @see MPU6050_DETECT_MOT_COUNT_BIT
pHysiX	6:2dc23167c8d8	2428	*/
pHysiX	6:2dc23167c8d8	2429	void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement)
pHysiX	6:2dc23167c8d8	2430	{
pHysiX	6:2dc23167c8d8	2431	i2Cdev.writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement);
pHysiX	6:2dc23167c8d8	2432	}
pHysiX	6:2dc23167c8d8	2433
pHysiX	6:2dc23167c8d8	2434	// USER_CTRL register
pHysiX	6:2dc23167c8d8	2435
pHysiX	6:2dc23167c8d8	2436	/** Get FIFO enabled status.
pHysiX	6:2dc23167c8d8	2437	* When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
pHysiX	6:2dc23167c8d8	2438	* cannot be written to or read from while disabled. The FIFO buffer's state
pHysiX	6:2dc23167c8d8	2439	* does not change unless the MPU-60X0 is power cycled.
pHysiX	6:2dc23167c8d8	2440	* @return Current FIFO enabled status
pHysiX	6:2dc23167c8d8	2441	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2442	* @see MPU6050_USERCTRL_FIFO_EN_BIT
pHysiX	6:2dc23167c8d8	2443	*/
pHysiX	6:2dc23167c8d8	2444	bool MPU6050::getFIFOEnabled()
pHysiX	6:2dc23167c8d8	2445	{
pHysiX	6:2dc23167c8d8	2446	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	2447	return buffer[0];
pHysiX	6:2dc23167c8d8	2448	}
pHysiX	6:2dc23167c8d8	2449	/** Set FIFO enabled status.
pHysiX	6:2dc23167c8d8	2450	* @param enabled New FIFO enabled status
pHysiX	6:2dc23167c8d8	2451	* @see getFIFOEnabled()
pHysiX	6:2dc23167c8d8	2452	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2453	* @see MPU6050_USERCTRL_FIFO_EN_BIT
pHysiX	6:2dc23167c8d8	2454	*/
pHysiX	6:2dc23167c8d8	2455	void MPU6050::setFIFOEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2456	{
pHysiX	6:2dc23167c8d8	2457	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	2458	}
pHysiX	6:2dc23167c8d8	2459	/** Get I2C Master Mode enabled status.
pHysiX	6:2dc23167c8d8	2460	* When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
pHysiX	6:2dc23167c8d8	2461	* external sensor slave devices on the auxiliary I2C bus. When this bit is
pHysiX	6:2dc23167c8d8	2462	* cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
pHysiX	6:2dc23167c8d8	2463	* driven by the primary I2C bus (SDA and SCL). This is a precondition to
pHysiX	6:2dc23167c8d8	2464	* enabling Bypass Mode. For further information regarding Bypass Mode, please
pHysiX	6:2dc23167c8d8	2465	* refer to Register 55.
pHysiX	6:2dc23167c8d8	2466	* @return Current I2C Master Mode enabled status
pHysiX	6:2dc23167c8d8	2467	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2468	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
pHysiX	6:2dc23167c8d8	2469	*/
pHysiX	6:2dc23167c8d8	2470	bool MPU6050::getI2CMasterModeEnabled()
pHysiX	6:2dc23167c8d8	2471	{
pHysiX	6:2dc23167c8d8	2472	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	2473	return buffer[0];
pHysiX	6:2dc23167c8d8	2474	}
pHysiX	6:2dc23167c8d8	2475	/** Set I2C Master Mode enabled status.
pHysiX	6:2dc23167c8d8	2476	* @param enabled New I2C Master Mode enabled status
pHysiX	6:2dc23167c8d8	2477	* @see getI2CMasterModeEnabled()
pHysiX	6:2dc23167c8d8	2478	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2479	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
pHysiX	6:2dc23167c8d8	2480	*/
pHysiX	6:2dc23167c8d8	2481	void MPU6050::setI2CMasterModeEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2482	{
pHysiX	6:2dc23167c8d8	2483	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	2484	}
pHysiX	6:2dc23167c8d8	2485	/** Switch from I2C to SPI mode (MPU-6000 only)
pHysiX	6:2dc23167c8d8	2486	* If this is set, the primary SPI interface will be enabled in place of the
pHysiX	6:2dc23167c8d8	2487	* disabled primary I2C interface.
pHysiX	6:2dc23167c8d8	2488	*/
pHysiX	6:2dc23167c8d8	2489	void MPU6050::switchSPIEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2490	{
pHysiX	6:2dc23167c8d8	2491	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled);
pHysiX	6:2dc23167c8d8	2492	}
pHysiX	6:2dc23167c8d8	2493	/** Reset the FIFO.
pHysiX	6:2dc23167c8d8	2494	* This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
pHysiX	6:2dc23167c8d8	2495	* bit automatically clears to 0 after the reset has been triggered.
pHysiX	6:2dc23167c8d8	2496	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2497	* @see MPU6050_USERCTRL_FIFO_RESET_BIT
pHysiX	6:2dc23167c8d8	2498	*/
pHysiX	6:2dc23167c8d8	2499	void MPU6050::resetFIFO()
pHysiX	6:2dc23167c8d8	2500	{
pHysiX	6:2dc23167c8d8	2501	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2502	}
pHysiX	6:2dc23167c8d8	2503	/** Reset the I2C Master.
pHysiX	6:2dc23167c8d8	2504	* This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
pHysiX	6:2dc23167c8d8	2505	* This bit automatically clears to 0 after the reset has been triggered.
pHysiX	6:2dc23167c8d8	2506	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2507	* @see MPU6050_USERCTRL_I2C_MST_RESET_BIT
pHysiX	6:2dc23167c8d8	2508	*/
pHysiX	6:2dc23167c8d8	2509	void MPU6050::resetI2CMaster()
pHysiX	6:2dc23167c8d8	2510	{
pHysiX	6:2dc23167c8d8	2511	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2512	}
pHysiX	6:2dc23167c8d8	2513	/** Reset all sensor registers and signal paths.
pHysiX	6:2dc23167c8d8	2514	* When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
pHysiX	6:2dc23167c8d8	2515	* accelerometers, and temperature sensor). This operation will also clear the
pHysiX	6:2dc23167c8d8	2516	* sensor registers. This bit automatically clears to 0 after the reset has been
pHysiX	6:2dc23167c8d8	2517	* triggered.
pHysiX	6:2dc23167c8d8	2518	*
pHysiX	6:2dc23167c8d8	2519	* When resetting only the signal path (and not the sensor registers), please
pHysiX	6:2dc23167c8d8	2520	* use Register 104, SIGNAL_PATH_RESET.
pHysiX	6:2dc23167c8d8	2521	*
pHysiX	6:2dc23167c8d8	2522	* @see MPU6050_RA_USER_CTRL
pHysiX	6:2dc23167c8d8	2523	* @see MPU6050_USERCTRL_SIG_COND_RESET_BIT
pHysiX	6:2dc23167c8d8	2524	*/
pHysiX	6:2dc23167c8d8	2525	void MPU6050::resetSensors()
pHysiX	6:2dc23167c8d8	2526	{
pHysiX	6:2dc23167c8d8	2527	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2528	}
pHysiX	6:2dc23167c8d8	2529
pHysiX	6:2dc23167c8d8	2530	// PWR_MGMT_1 register
pHysiX	6:2dc23167c8d8	2531
pHysiX	6:2dc23167c8d8	2532	/** Trigger a full device reset.
pHysiX	6:2dc23167c8d8	2533	* A small delay of ~50ms may be desirable after triggering a reset.
pHysiX	6:2dc23167c8d8	2534	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2535	* @see MPU6050_PWR1_DEVICE_RESET_BIT
pHysiX	6:2dc23167c8d8	2536	*/
pHysiX	6:2dc23167c8d8	2537	void MPU6050::reset()
pHysiX	6:2dc23167c8d8	2538	{
pHysiX	6:2dc23167c8d8	2539	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	2540	}
pHysiX	6:2dc23167c8d8	2541	/** Get sleep mode status.
pHysiX	6:2dc23167c8d8	2542	* Setting the SLEEP bit in the register puts the device into very low power
pHysiX	6:2dc23167c8d8	2543	* sleep mode. In this mode, only the serial interface and internal registers
pHysiX	6:2dc23167c8d8	2544	* remain active, allowing for a very low standby current. Clearing this bit
pHysiX	6:2dc23167c8d8	2545	* puts the device back into normal mode. To save power, the individual standby
pHysiX	6:2dc23167c8d8	2546	* selections for each of the gyros should be used if any gyro axis is not used
pHysiX	6:2dc23167c8d8	2547	* by the application.
pHysiX	6:2dc23167c8d8	2548	* @return Current sleep mode enabled status
pHysiX	6:2dc23167c8d8	2549	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2550	* @see MPU6050_PWR1_SLEEP_BIT
pHysiX	6:2dc23167c8d8	2551	*/
pHysiX	6:2dc23167c8d8	2552	bool MPU6050::getSleepEnabled()
pHysiX	6:2dc23167c8d8	2553	{
pHysiX	6:2dc23167c8d8	2554	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer);
pHysiX	6:2dc23167c8d8	2555	return buffer[0];
pHysiX	6:2dc23167c8d8	2556	}
pHysiX	6:2dc23167c8d8	2557	/** Set sleep mode status.
pHysiX	6:2dc23167c8d8	2558	* @param enabled New sleep mode enabled status
pHysiX	6:2dc23167c8d8	2559	* @see getSleepEnabled()
pHysiX	6:2dc23167c8d8	2560	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2561	* @see MPU6050_PWR1_SLEEP_BIT
pHysiX	6:2dc23167c8d8	2562	*/
pHysiX	6:2dc23167c8d8	2563	void MPU6050::setSleepEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2564	{
pHysiX	6:2dc23167c8d8	2565	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled);
pHysiX	6:2dc23167c8d8	2566	}
pHysiX	6:2dc23167c8d8	2567	/** Get wake cycle enabled status.
pHysiX	6:2dc23167c8d8	2568	* When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
pHysiX	6:2dc23167c8d8	2569	* between sleep mode and waking up to take a single sample of data from active
pHysiX	6:2dc23167c8d8	2570	* sensors at a rate determined by LP_WAKE_CTRL (register 108).
pHysiX	6:2dc23167c8d8	2571	* @return Current sleep mode enabled status
pHysiX	6:2dc23167c8d8	2572	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2573	* @see MPU6050_PWR1_CYCLE_BIT
pHysiX	6:2dc23167c8d8	2574	*/
pHysiX	6:2dc23167c8d8	2575	bool MPU6050::getWakeCycleEnabled()
pHysiX	6:2dc23167c8d8	2576	{
pHysiX	6:2dc23167c8d8	2577	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer);
pHysiX	6:2dc23167c8d8	2578	return buffer[0];
pHysiX	6:2dc23167c8d8	2579	}
pHysiX	6:2dc23167c8d8	2580	/** Set wake cycle enabled status.
pHysiX	6:2dc23167c8d8	2581	* @param enabled New sleep mode enabled status
pHysiX	6:2dc23167c8d8	2582	* @see getWakeCycleEnabled()
pHysiX	6:2dc23167c8d8	2583	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2584	* @see MPU6050_PWR1_CYCLE_BIT
pHysiX	6:2dc23167c8d8	2585	*/
pHysiX	6:2dc23167c8d8	2586	void MPU6050::setWakeCycleEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2587	{
pHysiX	6:2dc23167c8d8	2588	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled);
pHysiX	6:2dc23167c8d8	2589	}
pHysiX	6:2dc23167c8d8	2590	/** Get temperature sensor enabled status.
pHysiX	6:2dc23167c8d8	2591	* Control the usage of the internal temperature sensor.
pHysiX	6:2dc23167c8d8	2592	*
pHysiX	6:2dc23167c8d8	2593	* Note: this register stores the disabled value, but for consistency with the
pHysiX	6:2dc23167c8d8	2594	* rest of the code, the function is named and used with standard true/false
pHysiX	6:2dc23167c8d8	2595	* values to indicate whether the sensor is enabled or disabled, respectively.
pHysiX	6:2dc23167c8d8	2596	*
pHysiX	6:2dc23167c8d8	2597	* @return Current temperature sensor enabled status
pHysiX	6:2dc23167c8d8	2598	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2599	* @see MPU6050_PWR1_TEMP_DIS_BIT
pHysiX	6:2dc23167c8d8	2600	*/
pHysiX	6:2dc23167c8d8	2601	bool MPU6050::getTempSensorEnabled()
pHysiX	6:2dc23167c8d8	2602	{
pHysiX	6:2dc23167c8d8	2603	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer);
pHysiX	6:2dc23167c8d8	2604	return buffer[0] == 0; // 1 is actually disabled here
pHysiX	6:2dc23167c8d8	2605	}
pHysiX	6:2dc23167c8d8	2606	/** Set temperature sensor enabled status.
pHysiX	6:2dc23167c8d8	2607	* Note: this register stores the disabled value, but for consistency with the
pHysiX	6:2dc23167c8d8	2608	* rest of the code, the function is named and used with standard true/false
pHysiX	6:2dc23167c8d8	2609	* values to indicate whether the sensor is enabled or disabled, respectively.
pHysiX	6:2dc23167c8d8	2610	*
pHysiX	6:2dc23167c8d8	2611	* @param enabled New temperature sensor enabled status
pHysiX	6:2dc23167c8d8	2612	* @see getTempSensorEnabled()
pHysiX	6:2dc23167c8d8	2613	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2614	* @see MPU6050_PWR1_TEMP_DIS_BIT
pHysiX	6:2dc23167c8d8	2615	*/
pHysiX	6:2dc23167c8d8	2616	void MPU6050::setTempSensorEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2617	{
pHysiX	6:2dc23167c8d8	2618	// 1 is actually disabled here
pHysiX	6:2dc23167c8d8	2619	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled);
pHysiX	6:2dc23167c8d8	2620	}
pHysiX	6:2dc23167c8d8	2621	/** Get clock source setting.
pHysiX	6:2dc23167c8d8	2622	* @return Current clock source setting
pHysiX	6:2dc23167c8d8	2623	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2624	* @see MPU6050_PWR1_CLKSEL_BIT
pHysiX	6:2dc23167c8d8	2625	* @see MPU6050_PWR1_CLKSEL_LENGTH
pHysiX	6:2dc23167c8d8	2626	*/
pHysiX	6:2dc23167c8d8	2627	uint8_t MPU6050::getClockSource()
pHysiX	6:2dc23167c8d8	2628	{
pHysiX	6:2dc23167c8d8	2629	i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2630	return buffer[0];
pHysiX	6:2dc23167c8d8	2631	}
pHysiX	6:2dc23167c8d8	2632	/** Set clock source setting.
pHysiX	6:2dc23167c8d8	2633	* An internal 8MHz oscillator, gyroscope based clock, or external sources can
pHysiX	6:2dc23167c8d8	2634	* be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
pHysiX	6:2dc23167c8d8	2635	* or an external source is chosen as the clock source, the MPU-60X0 can operate
pHysiX	6:2dc23167c8d8	2636	* in low power modes with the gyroscopes disabled.
pHysiX	6:2dc23167c8d8	2637	*
pHysiX	6:2dc23167c8d8	2638	* Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
pHysiX	6:2dc23167c8d8	2639	* However, it is highly recommended that the device be configured to use one of
pHysiX	6:2dc23167c8d8	2640	* the gyroscopes (or an external clock source) as the clock reference for
pHysiX	6:2dc23167c8d8	2641	* improved stability. The clock source can be selected according to the following table:
pHysiX	6:2dc23167c8d8	2642	*
pHysiX	6:2dc23167c8d8	2643	* <pre>
pHysiX	6:2dc23167c8d8	2644	* CLK_SEL \| Clock Source
pHysiX	6:2dc23167c8d8	2645	* --------+--------------------------------------
pHysiX	6:2dc23167c8d8	2646	* 0 \| Internal oscillator
pHysiX	6:2dc23167c8d8	2647	* 1 \| PLL with X Gyro reference
pHysiX	6:2dc23167c8d8	2648	* 2 \| PLL with Y Gyro reference
pHysiX	6:2dc23167c8d8	2649	* 3 \| PLL with Z Gyro reference
pHysiX	6:2dc23167c8d8	2650	* 4 \| PLL with external 32.768kHz reference
pHysiX	6:2dc23167c8d8	2651	* 5 \| PLL with external 19.2MHz reference
pHysiX	6:2dc23167c8d8	2652	* 6 \| Reserved
pHysiX	6:2dc23167c8d8	2653	* 7 \| Stops the clock and keeps the timing generator in reset
pHysiX	6:2dc23167c8d8	2654	* </pre>
pHysiX	6:2dc23167c8d8	2655	*
pHysiX	6:2dc23167c8d8	2656	* @param source New clock source setting
pHysiX	6:2dc23167c8d8	2657	* @see getClockSource()
pHysiX	6:2dc23167c8d8	2658	* @see MPU6050_RA_PWR_MGMT_1
pHysiX	6:2dc23167c8d8	2659	* @see MPU6050_PWR1_CLKSEL_BIT
pHysiX	6:2dc23167c8d8	2660	* @see MPU6050_PWR1_CLKSEL_LENGTH
pHysiX	6:2dc23167c8d8	2661	*/
pHysiX	6:2dc23167c8d8	2662	void MPU6050::setClockSource(uint8_t source)
pHysiX	6:2dc23167c8d8	2663	{
pHysiX	6:2dc23167c8d8	2664	i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source);
pHysiX	6:2dc23167c8d8	2665	}
pHysiX	6:2dc23167c8d8	2666
pHysiX	6:2dc23167c8d8	2667	// PWR_MGMT_2 register
pHysiX	6:2dc23167c8d8	2668
pHysiX	6:2dc23167c8d8	2669	/** Get wake frequency in Accel-Only Low Power Mode.
pHysiX	6:2dc23167c8d8	2670	* The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
pHysiX	6:2dc23167c8d8	2671	* PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
pHysiX	6:2dc23167c8d8	2672	* the device will power off all devices except for the primary I2C interface,
pHysiX	6:2dc23167c8d8	2673	* waking only the accelerometer at fixed intervals to take a single
pHysiX	6:2dc23167c8d8	2674	* measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
pHysiX	6:2dc23167c8d8	2675	* as shown below:
pHysiX	6:2dc23167c8d8	2676	*
pHysiX	6:2dc23167c8d8	2677	* <pre>
pHysiX	6:2dc23167c8d8	2678	* LP_WAKE_CTRL \| Wake-up Frequency
pHysiX	6:2dc23167c8d8	2679	* -------------+------------------
pHysiX	6:2dc23167c8d8	2680	* 0 \| 1.25 Hz
pHysiX	6:2dc23167c8d8	2681	* 1 \| 2.5 Hz
pHysiX	6:2dc23167c8d8	2682	* 2 \| 5 Hz
pHysiX	6:2dc23167c8d8	2683	* 3 \| 10 Hz
pHysiX	6:2dc23167c8d8	2684	* <pre>
pHysiX	6:2dc23167c8d8	2685	*
pHysiX	6:2dc23167c8d8	2686	* For further information regarding the MPU-60X0's power modes, please refer to
pHysiX	6:2dc23167c8d8	2687	* Register 107.
pHysiX	6:2dc23167c8d8	2688	*
pHysiX	6:2dc23167c8d8	2689	* @return Current wake frequency
pHysiX	6:2dc23167c8d8	2690	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2691	*/
pHysiX	6:2dc23167c8d8	2692	uint8_t MPU6050::getWakeFrequency()
pHysiX	6:2dc23167c8d8	2693	{
pHysiX	6:2dc23167c8d8	2694	i2Cdev.readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2695	return buffer[0];
pHysiX	6:2dc23167c8d8	2696	}
pHysiX	6:2dc23167c8d8	2697	/** Set wake frequency in Accel-Only Low Power Mode.
pHysiX	6:2dc23167c8d8	2698	* @param frequency New wake frequency
pHysiX	6:2dc23167c8d8	2699	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2700	*/
pHysiX	6:2dc23167c8d8	2701	void MPU6050::setWakeFrequency(uint8_t frequency)
pHysiX	6:2dc23167c8d8	2702	{
pHysiX	6:2dc23167c8d8	2703	i2Cdev.writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
pHysiX	6:2dc23167c8d8	2704	}
pHysiX	6:2dc23167c8d8	2705
pHysiX	6:2dc23167c8d8	2706	/** Get X-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2707	* If enabled, the X-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2708	* @return Current X-axis standby enabled status
pHysiX	6:2dc23167c8d8	2709	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2710	* @see MPU6050_PWR2_STBY_XA_BIT
pHysiX	6:2dc23167c8d8	2711	*/
pHysiX	6:2dc23167c8d8	2712	bool MPU6050::getStandbyXAccelEnabled()
pHysiX	6:2dc23167c8d8	2713	{
pHysiX	6:2dc23167c8d8	2714	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer);
pHysiX	6:2dc23167c8d8	2715	return buffer[0];
pHysiX	6:2dc23167c8d8	2716	}
pHysiX	6:2dc23167c8d8	2717	/** Set X-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2718	* @param New X-axis standby enabled status
pHysiX	6:2dc23167c8d8	2719	* @see getStandbyXAccelEnabled()
pHysiX	6:2dc23167c8d8	2720	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2721	* @see MPU6050_PWR2_STBY_XA_BIT
pHysiX	6:2dc23167c8d8	2722	*/
pHysiX	6:2dc23167c8d8	2723	void MPU6050::setStandbyXAccelEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2724	{
pHysiX	6:2dc23167c8d8	2725	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled);
pHysiX	6:2dc23167c8d8	2726	}
pHysiX	6:2dc23167c8d8	2727	/** Get Y-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2728	* If enabled, the Y-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2729	* @return Current Y-axis standby enabled status
pHysiX	6:2dc23167c8d8	2730	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2731	* @see MPU6050_PWR2_STBY_YA_BIT
pHysiX	6:2dc23167c8d8	2732	*/
pHysiX	6:2dc23167c8d8	2733	bool MPU6050::getStandbyYAccelEnabled()
pHysiX	6:2dc23167c8d8	2734	{
pHysiX	6:2dc23167c8d8	2735	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer);
pHysiX	6:2dc23167c8d8	2736	return buffer[0];
pHysiX	6:2dc23167c8d8	2737	}
pHysiX	6:2dc23167c8d8	2738	/** Set Y-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2739	* @param New Y-axis standby enabled status
pHysiX	6:2dc23167c8d8	2740	* @see getStandbyYAccelEnabled()
pHysiX	6:2dc23167c8d8	2741	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2742	* @see MPU6050_PWR2_STBY_YA_BIT
pHysiX	6:2dc23167c8d8	2743	*/
pHysiX	6:2dc23167c8d8	2744	void MPU6050::setStandbyYAccelEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2745	{
pHysiX	6:2dc23167c8d8	2746	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled);
pHysiX	6:2dc23167c8d8	2747	}
pHysiX	6:2dc23167c8d8	2748	/** Get Z-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2749	* If enabled, the Z-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2750	* @return Current Z-axis standby enabled status
pHysiX	6:2dc23167c8d8	2751	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2752	* @see MPU6050_PWR2_STBY_ZA_BIT
pHysiX	6:2dc23167c8d8	2753	*/
pHysiX	6:2dc23167c8d8	2754	bool MPU6050::getStandbyZAccelEnabled()
pHysiX	6:2dc23167c8d8	2755	{
pHysiX	6:2dc23167c8d8	2756	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer);
pHysiX	6:2dc23167c8d8	2757	return buffer[0];
pHysiX	6:2dc23167c8d8	2758	}
pHysiX	6:2dc23167c8d8	2759	/** Set Z-axis accelerometer standby enabled status.
pHysiX	6:2dc23167c8d8	2760	* @param New Z-axis standby enabled status
pHysiX	6:2dc23167c8d8	2761	* @see getStandbyZAccelEnabled()
pHysiX	6:2dc23167c8d8	2762	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2763	* @see MPU6050_PWR2_STBY_ZA_BIT
pHysiX	6:2dc23167c8d8	2764	*/
pHysiX	6:2dc23167c8d8	2765	void MPU6050::setStandbyZAccelEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2766	{
pHysiX	6:2dc23167c8d8	2767	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled);
pHysiX	6:2dc23167c8d8	2768	}
pHysiX	6:2dc23167c8d8	2769	/** Get X-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2770	* If enabled, the X-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2771	* @return Current X-axis standby enabled status
pHysiX	6:2dc23167c8d8	2772	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2773	* @see MPU6050_PWR2_STBY_XG_BIT
pHysiX	6:2dc23167c8d8	2774	*/
pHysiX	6:2dc23167c8d8	2775	bool MPU6050::getStandbyXGyroEnabled()
pHysiX	6:2dc23167c8d8	2776	{
pHysiX	6:2dc23167c8d8	2777	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2778	return buffer[0];
pHysiX	6:2dc23167c8d8	2779	}
pHysiX	6:2dc23167c8d8	2780	/** Set X-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2781	* @param New X-axis standby enabled status
pHysiX	6:2dc23167c8d8	2782	* @see getStandbyXGyroEnabled()
pHysiX	6:2dc23167c8d8	2783	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2784	* @see MPU6050_PWR2_STBY_XG_BIT
pHysiX	6:2dc23167c8d8	2785	*/
pHysiX	6:2dc23167c8d8	2786	void MPU6050::setStandbyXGyroEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2787	{
pHysiX	6:2dc23167c8d8	2788	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled);
pHysiX	6:2dc23167c8d8	2789	}
pHysiX	6:2dc23167c8d8	2790	/** Get Y-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2791	* If enabled, the Y-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2792	* @return Current Y-axis standby enabled status
pHysiX	6:2dc23167c8d8	2793	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2794	* @see MPU6050_PWR2_STBY_YG_BIT
pHysiX	6:2dc23167c8d8	2795	*/
pHysiX	6:2dc23167c8d8	2796	bool MPU6050::getStandbyYGyroEnabled()
pHysiX	6:2dc23167c8d8	2797	{
pHysiX	6:2dc23167c8d8	2798	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2799	return buffer[0];
pHysiX	6:2dc23167c8d8	2800	}
pHysiX	6:2dc23167c8d8	2801	/** Set Y-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2802	* @param New Y-axis standby enabled status
pHysiX	6:2dc23167c8d8	2803	* @see getStandbyYGyroEnabled()
pHysiX	6:2dc23167c8d8	2804	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2805	* @see MPU6050_PWR2_STBY_YG_BIT
pHysiX	6:2dc23167c8d8	2806	*/
pHysiX	6:2dc23167c8d8	2807	void MPU6050::setStandbyYGyroEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2808	{
pHysiX	6:2dc23167c8d8	2809	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled);
pHysiX	6:2dc23167c8d8	2810	}
pHysiX	6:2dc23167c8d8	2811	/** Get Z-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2812	* If enabled, the Z-axis will not gather or report data (or use power).
pHysiX	6:2dc23167c8d8	2813	* @return Current Z-axis standby enabled status
pHysiX	6:2dc23167c8d8	2814	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2815	* @see MPU6050_PWR2_STBY_ZG_BIT
pHysiX	6:2dc23167c8d8	2816	*/
pHysiX	6:2dc23167c8d8	2817	bool MPU6050::getStandbyZGyroEnabled()
pHysiX	6:2dc23167c8d8	2818	{
pHysiX	6:2dc23167c8d8	2819	i2Cdev.readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer);
pHysiX	6:2dc23167c8d8	2820	return buffer[0];
pHysiX	6:2dc23167c8d8	2821	}
pHysiX	6:2dc23167c8d8	2822	/** Set Z-axis gyroscope standby enabled status.
pHysiX	6:2dc23167c8d8	2823	* @param New Z-axis standby enabled status
pHysiX	6:2dc23167c8d8	2824	* @see getStandbyZGyroEnabled()
pHysiX	6:2dc23167c8d8	2825	* @see MPU6050_RA_PWR_MGMT_2
pHysiX	6:2dc23167c8d8	2826	* @see MPU6050_PWR2_STBY_ZG_BIT
pHysiX	6:2dc23167c8d8	2827	*/
pHysiX	6:2dc23167c8d8	2828	void MPU6050::setStandbyZGyroEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	2829	{
pHysiX	6:2dc23167c8d8	2830	i2Cdev.writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled);
pHysiX	6:2dc23167c8d8	2831	}
pHysiX	6:2dc23167c8d8	2832
pHysiX	6:2dc23167c8d8	2833	// FIFO_COUNT* registers
pHysiX	6:2dc23167c8d8	2834
pHysiX	6:2dc23167c8d8	2835	/** Get current FIFO buffer size.
pHysiX	6:2dc23167c8d8	2836	* This value indicates the number of bytes stored in the FIFO buffer. This
pHysiX	6:2dc23167c8d8	2837	* number is in turn the number of bytes that can be read from the FIFO buffer
pHysiX	6:2dc23167c8d8	2838	* and it is directly proportional to the number of samples available given the
pHysiX	6:2dc23167c8d8	2839	* set of sensor data bound to be stored in the FIFO (register 35 and 36).
pHysiX	6:2dc23167c8d8	2840	* @return Current FIFO buffer size
pHysiX	6:2dc23167c8d8	2841	*/
pHysiX	6:2dc23167c8d8	2842	uint16_t MPU6050::getFIFOCount()
pHysiX	6:2dc23167c8d8	2843	{
pHysiX	6:2dc23167c8d8	2844	i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer);
pHysiX	6:2dc23167c8d8	2845	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	2846	}
pHysiX	6:2dc23167c8d8	2847
pHysiX	6:2dc23167c8d8	2848	// FIFO_R_W register
pHysiX	6:2dc23167c8d8	2849
pHysiX	6:2dc23167c8d8	2850	/** Get byte from FIFO buffer.
pHysiX	6:2dc23167c8d8	2851	* This register is used to read and write data from the FIFO buffer. Data is
pHysiX	6:2dc23167c8d8	2852	* written to the FIFO in order of register number (from lowest to highest). If
pHysiX	6:2dc23167c8d8	2853	* all the FIFO enable flags (see below) are enabled and all External Sensor
pHysiX	6:2dc23167c8d8	2854	* Data registers (Registers 73 to 96) are associated with a Slave device, the
pHysiX	6:2dc23167c8d8	2855	* contents of registers 59 through 96 will be written in order at the Sample
pHysiX	6:2dc23167c8d8	2856	* Rate.
pHysiX	6:2dc23167c8d8	2857	*
pHysiX	6:2dc23167c8d8	2858	* The contents of the sensor data registers (Registers 59 to 96) are written
pHysiX	6:2dc23167c8d8	2859	* into the FIFO buffer when their corresponding FIFO enable flags are set to 1
pHysiX	6:2dc23167c8d8	2860	* in FIFO_EN (Register 35). An additional flag for the sensor data registers
pHysiX	6:2dc23167c8d8	2861	* associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
pHysiX	6:2dc23167c8d8	2862	*
pHysiX	6:2dc23167c8d8	2863	* If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
pHysiX	6:2dc23167c8d8	2864	* automatically set to 1. This bit is located in INT_STATUS (Register 58).
pHysiX	6:2dc23167c8d8	2865	* When the FIFO buffer has overflowed, the oldest data will be lost and new
pHysiX	6:2dc23167c8d8	2866	* data will be written to the FIFO.
pHysiX	6:2dc23167c8d8	2867	*
pHysiX	6:2dc23167c8d8	2868	* If the FIFO buffer is empty, reading this register will return the last byte
pHysiX	6:2dc23167c8d8	2869	* that was previously read from the FIFO until new data is available. The user
pHysiX	6:2dc23167c8d8	2870	* should check FIFO_COUNT to ensure that the FIFO buffer is not read when
pHysiX	6:2dc23167c8d8	2871	* empty.
pHysiX	6:2dc23167c8d8	2872	*
pHysiX	6:2dc23167c8d8	2873	* @return Byte from FIFO buffer
pHysiX	6:2dc23167c8d8	2874	*/
pHysiX	6:2dc23167c8d8	2875	uint8_t MPU6050::getFIFOByte()
pHysiX	6:2dc23167c8d8	2876	{
pHysiX	6:2dc23167c8d8	2877	i2Cdev.readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer);
pHysiX	6:2dc23167c8d8	2878	return buffer[0];
pHysiX	6:2dc23167c8d8	2879	}
pHysiX	6:2dc23167c8d8	2880	void MPU6050::getFIFOBytes(uint8_t *data, uint8_t length)
pHysiX	6:2dc23167c8d8	2881	{
pHysiX	6:2dc23167c8d8	2882	i2Cdev.readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data);
pHysiX	6:2dc23167c8d8	2883	}
pHysiX	6:2dc23167c8d8	2884	/** Write byte to FIFO buffer.
pHysiX	6:2dc23167c8d8	2885	* @see getFIFOByte()
pHysiX	6:2dc23167c8d8	2886	* @see MPU6050_RA_FIFO_R_W
pHysiX	6:2dc23167c8d8	2887	*/
pHysiX	6:2dc23167c8d8	2888	void MPU6050::setFIFOByte(uint8_t data)
pHysiX	6:2dc23167c8d8	2889	{
pHysiX	6:2dc23167c8d8	2890	i2Cdev.writeByte(devAddr, MPU6050_RA_FIFO_R_W, data);
pHysiX	6:2dc23167c8d8	2891	}
pHysiX	6:2dc23167c8d8	2892
pHysiX	6:2dc23167c8d8	2893	// WHO_AM_I register
pHysiX	6:2dc23167c8d8	2894
pHysiX	6:2dc23167c8d8	2895	/** Get Device ID.
pHysiX	6:2dc23167c8d8	2896	* This register is used to verify the identity of the device (0b110100, 0x34).
pHysiX	6:2dc23167c8d8	2897	* @return Device ID (6 bits only! should be 0x34)
pHysiX	6:2dc23167c8d8	2898	* @see MPU6050_RA_WHO_AM_I
pHysiX	6:2dc23167c8d8	2899	* @see MPU6050_WHO_AM_I_BIT
pHysiX	6:2dc23167c8d8	2900	* @see MPU6050_WHO_AM_I_LENGTH
pHysiX	6:2dc23167c8d8	2901	*/
pHysiX	6:2dc23167c8d8	2902	uint8_t MPU6050::getDeviceID()
pHysiX	6:2dc23167c8d8	2903	{
pHysiX	6:2dc23167c8d8	2904	i2Cdev.readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2905	return buffer[0];
pHysiX	6:2dc23167c8d8	2906	}
pHysiX	6:2dc23167c8d8	2907	/** Set Device ID.
pHysiX	6:2dc23167c8d8	2908	* Write a new ID into the WHO_AM_I register (no idea why this should ever be
pHysiX	6:2dc23167c8d8	2909	* necessary though).
pHysiX	6:2dc23167c8d8	2910	* @param id New device ID to set.
pHysiX	6:2dc23167c8d8	2911	* @see getDeviceID()
pHysiX	6:2dc23167c8d8	2912	* @see MPU6050_RA_WHO_AM_I
pHysiX	6:2dc23167c8d8	2913	* @see MPU6050_WHO_AM_I_BIT
pHysiX	6:2dc23167c8d8	2914	* @see MPU6050_WHO_AM_I_LENGTH
pHysiX	6:2dc23167c8d8	2915	*/
pHysiX	6:2dc23167c8d8	2916	void MPU6050::setDeviceID(uint8_t id)
pHysiX	6:2dc23167c8d8	2917	{
pHysiX	6:2dc23167c8d8	2918	i2Cdev.writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id);
pHysiX	6:2dc23167c8d8	2919	}
pHysiX	6:2dc23167c8d8	2920
pHysiX	6:2dc23167c8d8	2921	// ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
pHysiX	6:2dc23167c8d8	2922
pHysiX	6:2dc23167c8d8	2923	// XG_OFFS_TC register
pHysiX	6:2dc23167c8d8	2924
pHysiX	6:2dc23167c8d8	2925	uint8_t MPU6050::getOTPBankValid()
pHysiX	6:2dc23167c8d8	2926	{
pHysiX	6:2dc23167c8d8	2927	i2Cdev.readBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, buffer);
pHysiX	6:2dc23167c8d8	2928	return buffer[0];
pHysiX	6:2dc23167c8d8	2929	}
pHysiX	6:2dc23167c8d8	2930	void MPU6050::setOTPBankValid(bool enabled)
pHysiX	6:2dc23167c8d8	2931	{
pHysiX	6:2dc23167c8d8	2932	i2Cdev.writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled);
pHysiX	6:2dc23167c8d8	2933	}
pHysiX	6:2dc23167c8d8	2934	int8_t MPU6050::getXGyroOffset()
pHysiX	6:2dc23167c8d8	2935	{
pHysiX	6:2dc23167c8d8	2936	i2Cdev.readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2937	return buffer[0];
pHysiX	6:2dc23167c8d8	2938	}
pHysiX	6:2dc23167c8d8	2939	void MPU6050::setXGyroOffset(int8_t offset)
pHysiX	6:2dc23167c8d8	2940	{
pHysiX	6:2dc23167c8d8	2941	i2Cdev.writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
pHysiX	6:2dc23167c8d8	2942	}
pHysiX	6:2dc23167c8d8	2943
pHysiX	6:2dc23167c8d8	2944	// YG_OFFS_TC register
pHysiX	6:2dc23167c8d8	2945
pHysiX	6:2dc23167c8d8	2946	int8_t MPU6050::getYGyroOffset()
pHysiX	6:2dc23167c8d8	2947	{
pHysiX	6:2dc23167c8d8	2948	i2Cdev.readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2949	return buffer[0];
pHysiX	6:2dc23167c8d8	2950	}
pHysiX	6:2dc23167c8d8	2951	void MPU6050::setYGyroOffset(int8_t offset)
pHysiX	6:2dc23167c8d8	2952	{
pHysiX	6:2dc23167c8d8	2953	i2Cdev.writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
pHysiX	6:2dc23167c8d8	2954	}
pHysiX	6:2dc23167c8d8	2955
pHysiX	6:2dc23167c8d8	2956	// ZG_OFFS_TC register
pHysiX	6:2dc23167c8d8	2957
pHysiX	6:2dc23167c8d8	2958	int8_t MPU6050::getZGyroOffset()
pHysiX	6:2dc23167c8d8	2959	{
pHysiX	6:2dc23167c8d8	2960	i2Cdev.readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
pHysiX	6:2dc23167c8d8	2961	return buffer[0];
pHysiX	6:2dc23167c8d8	2962	}
pHysiX	6:2dc23167c8d8	2963	void MPU6050::setZGyroOffset(int8_t offset)
pHysiX	6:2dc23167c8d8	2964	{
pHysiX	6:2dc23167c8d8	2965	i2Cdev.writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
pHysiX	6:2dc23167c8d8	2966	}
pHysiX	6:2dc23167c8d8	2967
pHysiX	6:2dc23167c8d8	2968	// X_FINE_GAIN register
pHysiX	6:2dc23167c8d8	2969
pHysiX	6:2dc23167c8d8	2970	int8_t MPU6050::getXFineGain()
pHysiX	6:2dc23167c8d8	2971	{
pHysiX	6:2dc23167c8d8	2972	i2Cdev.readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer);
pHysiX	6:2dc23167c8d8	2973	return buffer[0];
pHysiX	6:2dc23167c8d8	2974	}
pHysiX	6:2dc23167c8d8	2975	void MPU6050::setXFineGain(int8_t gain)
pHysiX	6:2dc23167c8d8	2976	{
pHysiX	6:2dc23167c8d8	2977	i2Cdev.writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain);
pHysiX	6:2dc23167c8d8	2978	}
pHysiX	6:2dc23167c8d8	2979
pHysiX	6:2dc23167c8d8	2980	// Y_FINE_GAIN register
pHysiX	6:2dc23167c8d8	2981
pHysiX	6:2dc23167c8d8	2982	int8_t MPU6050::getYFineGain()
pHysiX	6:2dc23167c8d8	2983	{
pHysiX	6:2dc23167c8d8	2984	i2Cdev.readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer);
pHysiX	6:2dc23167c8d8	2985	return buffer[0];
pHysiX	6:2dc23167c8d8	2986	}
pHysiX	6:2dc23167c8d8	2987	void MPU6050::setYFineGain(int8_t gain)
pHysiX	6:2dc23167c8d8	2988	{
pHysiX	6:2dc23167c8d8	2989	i2Cdev.writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain);
pHysiX	6:2dc23167c8d8	2990	}
pHysiX	6:2dc23167c8d8	2991
pHysiX	6:2dc23167c8d8	2992	// Z_FINE_GAIN register
pHysiX	6:2dc23167c8d8	2993
pHysiX	6:2dc23167c8d8	2994	int8_t MPU6050::getZFineGain()
pHysiX	6:2dc23167c8d8	2995	{
pHysiX	6:2dc23167c8d8	2996	i2Cdev.readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer);
pHysiX	6:2dc23167c8d8	2997	return buffer[0];
pHysiX	6:2dc23167c8d8	2998	}
pHysiX	6:2dc23167c8d8	2999	void MPU6050::setZFineGain(int8_t gain)
pHysiX	6:2dc23167c8d8	3000	{
pHysiX	6:2dc23167c8d8	3001	i2Cdev.writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain);
pHysiX	6:2dc23167c8d8	3002	}
pHysiX	6:2dc23167c8d8	3003
pHysiX	6:2dc23167c8d8	3004	// XA_OFFS_* registers
pHysiX	6:2dc23167c8d8	3005
pHysiX	6:2dc23167c8d8	3006	int16_t MPU6050::getXAccelOffset()
pHysiX	6:2dc23167c8d8	3007	{
pHysiX	6:2dc23167c8d8	3008	i2Cdev.readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer);
pHysiX	6:2dc23167c8d8	3009	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3010	}
pHysiX	6:2dc23167c8d8	3011	void MPU6050::setXAccelOffset(int16_t offset)
pHysiX	6:2dc23167c8d8	3012	{
pHysiX	6:2dc23167c8d8	3013	i2Cdev.writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset);
pHysiX	6:2dc23167c8d8	3014	}
pHysiX	6:2dc23167c8d8	3015
pHysiX	6:2dc23167c8d8	3016	// YA_OFFS_* register
pHysiX	6:2dc23167c8d8	3017
pHysiX	6:2dc23167c8d8	3018	int16_t MPU6050::getYAccelOffset()
pHysiX	6:2dc23167c8d8	3019	{
pHysiX	6:2dc23167c8d8	3020	i2Cdev.readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer);
pHysiX	6:2dc23167c8d8	3021	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3022	}
pHysiX	6:2dc23167c8d8	3023	void MPU6050::setYAccelOffset(int16_t offset)
pHysiX	6:2dc23167c8d8	3024	{
pHysiX	6:2dc23167c8d8	3025	i2Cdev.writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset);
pHysiX	6:2dc23167c8d8	3026	}
pHysiX	6:2dc23167c8d8	3027
pHysiX	6:2dc23167c8d8	3028	// ZA_OFFS_* register
pHysiX	6:2dc23167c8d8	3029
pHysiX	6:2dc23167c8d8	3030	int16_t MPU6050::getZAccelOffset()
pHysiX	6:2dc23167c8d8	3031	{
pHysiX	6:2dc23167c8d8	3032	i2Cdev.readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer);
pHysiX	6:2dc23167c8d8	3033	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3034	}
pHysiX	6:2dc23167c8d8	3035	void MPU6050::setZAccelOffset(int16_t offset)
pHysiX	6:2dc23167c8d8	3036	{
pHysiX	6:2dc23167c8d8	3037	i2Cdev.writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset);
pHysiX	6:2dc23167c8d8	3038	}
pHysiX	6:2dc23167c8d8	3039
pHysiX	6:2dc23167c8d8	3040	// XG_OFFS_USR* registers
pHysiX	6:2dc23167c8d8	3041
pHysiX	6:2dc23167c8d8	3042	int16_t MPU6050::getXGyroOffsetUser()
pHysiX	6:2dc23167c8d8	3043	{
pHysiX	6:2dc23167c8d8	3044	i2Cdev.readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer);
pHysiX	6:2dc23167c8d8	3045	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3046	}
pHysiX	6:2dc23167c8d8	3047	void MPU6050::setXGyroOffsetUser(int16_t offset)
pHysiX	6:2dc23167c8d8	3048	{
pHysiX	6:2dc23167c8d8	3049	i2Cdev.writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset);
pHysiX	6:2dc23167c8d8	3050	}
pHysiX	6:2dc23167c8d8	3051
pHysiX	6:2dc23167c8d8	3052	// YG_OFFS_USR* register
pHysiX	6:2dc23167c8d8	3053
pHysiX	6:2dc23167c8d8	3054	int16_t MPU6050::getYGyroOffsetUser()
pHysiX	6:2dc23167c8d8	3055	{
pHysiX	6:2dc23167c8d8	3056	i2Cdev.readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer);
pHysiX	6:2dc23167c8d8	3057	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3058	}
pHysiX	6:2dc23167c8d8	3059	void MPU6050::setYGyroOffsetUser(int16_t offset)
pHysiX	6:2dc23167c8d8	3060	{
pHysiX	6:2dc23167c8d8	3061	i2Cdev.writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset);
pHysiX	6:2dc23167c8d8	3062	}
pHysiX	6:2dc23167c8d8	3063
pHysiX	6:2dc23167c8d8	3064	// ZG_OFFS_USR* register
pHysiX	6:2dc23167c8d8	3065
pHysiX	6:2dc23167c8d8	3066	int16_t MPU6050::getZGyroOffsetUser()
pHysiX	6:2dc23167c8d8	3067	{
pHysiX	6:2dc23167c8d8	3068	i2Cdev.readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer);
pHysiX	6:2dc23167c8d8	3069	return (((int16_t)buffer[0]) << 8) \| buffer[1];
pHysiX	6:2dc23167c8d8	3070	}
pHysiX	6:2dc23167c8d8	3071	void MPU6050::setZGyroOffsetUser(int16_t offset)
pHysiX	6:2dc23167c8d8	3072	{
pHysiX	6:2dc23167c8d8	3073	i2Cdev.writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset);
pHysiX	6:2dc23167c8d8	3074	}
pHysiX	6:2dc23167c8d8	3075
pHysiX	6:2dc23167c8d8	3076	// INT_ENABLE register (DMP functions)
pHysiX	6:2dc23167c8d8	3077
pHysiX	6:2dc23167c8d8	3078	bool MPU6050::getIntPLLReadyEnabled()
pHysiX	6:2dc23167c8d8	3079	{
pHysiX	6:2dc23167c8d8	3080	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	3081	return buffer[0];
pHysiX	6:2dc23167c8d8	3082	}
pHysiX	6:2dc23167c8d8	3083	void MPU6050::setIntPLLReadyEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	3084	{
pHysiX	6:2dc23167c8d8	3085	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled);
pHysiX	6:2dc23167c8d8	3086	}
pHysiX	6:2dc23167c8d8	3087	bool MPU6050::getIntDMPEnabled()
pHysiX	6:2dc23167c8d8	3088	{
pHysiX	6:2dc23167c8d8	3089	i2Cdev.readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	3090	return buffer[0];
pHysiX	6:2dc23167c8d8	3091	}
pHysiX	6:2dc23167c8d8	3092	void MPU6050::setIntDMPEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	3093	{
pHysiX	6:2dc23167c8d8	3094	i2Cdev.writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled);
pHysiX	6:2dc23167c8d8	3095	}
pHysiX	6:2dc23167c8d8	3096
pHysiX	6:2dc23167c8d8	3097	// DMP_INT_STATUS
pHysiX	6:2dc23167c8d8	3098
pHysiX	6:2dc23167c8d8	3099	bool MPU6050::getDMPInt5Status()
pHysiX	6:2dc23167c8d8	3100	{
pHysiX	6:2dc23167c8d8	3101	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer);
pHysiX	6:2dc23167c8d8	3102	return buffer[0];
pHysiX	6:2dc23167c8d8	3103	}
pHysiX	6:2dc23167c8d8	3104	bool MPU6050::getDMPInt4Status()
pHysiX	6:2dc23167c8d8	3105	{
pHysiX	6:2dc23167c8d8	3106	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer);
pHysiX	6:2dc23167c8d8	3107	return buffer[0];
pHysiX	6:2dc23167c8d8	3108	}
pHysiX	6:2dc23167c8d8	3109	bool MPU6050::getDMPInt3Status()
pHysiX	6:2dc23167c8d8	3110	{
pHysiX	6:2dc23167c8d8	3111	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer);
pHysiX	6:2dc23167c8d8	3112	return buffer[0];
pHysiX	6:2dc23167c8d8	3113	}
pHysiX	6:2dc23167c8d8	3114	bool MPU6050::getDMPInt2Status()
pHysiX	6:2dc23167c8d8	3115	{
pHysiX	6:2dc23167c8d8	3116	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer);
pHysiX	6:2dc23167c8d8	3117	return buffer[0];
pHysiX	6:2dc23167c8d8	3118	}
pHysiX	6:2dc23167c8d8	3119	bool MPU6050::getDMPInt1Status()
pHysiX	6:2dc23167c8d8	3120	{
pHysiX	6:2dc23167c8d8	3121	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer);
pHysiX	6:2dc23167c8d8	3122	return buffer[0];
pHysiX	6:2dc23167c8d8	3123	}
pHysiX	6:2dc23167c8d8	3124	bool MPU6050::getDMPInt0Status()
pHysiX	6:2dc23167c8d8	3125	{
pHysiX	6:2dc23167c8d8	3126	i2Cdev.readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer);
pHysiX	6:2dc23167c8d8	3127	return buffer[0];
pHysiX	6:2dc23167c8d8	3128	}
pHysiX	6:2dc23167c8d8	3129
pHysiX	6:2dc23167c8d8	3130	// INT_STATUS register (DMP functions)
pHysiX	6:2dc23167c8d8	3131
pHysiX	6:2dc23167c8d8	3132	bool MPU6050::getIntPLLReadyStatus()
pHysiX	6:2dc23167c8d8	3133	{
pHysiX	6:2dc23167c8d8	3134	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	3135	return buffer[0];
pHysiX	6:2dc23167c8d8	3136	}
pHysiX	6:2dc23167c8d8	3137	bool MPU6050::getIntDMPStatus()
pHysiX	6:2dc23167c8d8	3138	{
pHysiX	6:2dc23167c8d8	3139	i2Cdev.readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
pHysiX	6:2dc23167c8d8	3140	return buffer[0];
pHysiX	6:2dc23167c8d8	3141	}
pHysiX	6:2dc23167c8d8	3142
pHysiX	6:2dc23167c8d8	3143	// USER_CTRL register (DMP functions)
pHysiX	6:2dc23167c8d8	3144
pHysiX	6:2dc23167c8d8	3145	bool MPU6050::getDMPEnabled()
pHysiX	6:2dc23167c8d8	3146	{
pHysiX	6:2dc23167c8d8	3147	i2Cdev.readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer);
pHysiX	6:2dc23167c8d8	3148	return buffer[0];
pHysiX	6:2dc23167c8d8	3149	}
pHysiX	6:2dc23167c8d8	3150	void MPU6050::setDMPEnabled(bool enabled)
pHysiX	6:2dc23167c8d8	3151	{
pHysiX	6:2dc23167c8d8	3152	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled);
pHysiX	6:2dc23167c8d8	3153	}
pHysiX	6:2dc23167c8d8	3154	void MPU6050::resetDMP()
pHysiX	6:2dc23167c8d8	3155	{
pHysiX	6:2dc23167c8d8	3156	i2Cdev.writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
pHysiX	6:2dc23167c8d8	3157	}
pHysiX	6:2dc23167c8d8	3158
pHysiX	6:2dc23167c8d8	3159	// BANK_SEL register
pHysiX	6:2dc23167c8d8	3160
pHysiX	6:2dc23167c8d8	3161	void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank)
pHysiX	6:2dc23167c8d8	3162	{
pHysiX	6:2dc23167c8d8	3163	bank &= 0x1F;
pHysiX	6:2dc23167c8d8	3164	if (userBank) bank \|= 0x20;
pHysiX	6:2dc23167c8d8	3165	if (prefetchEnabled) bank \|= 0x40;
pHysiX	6:2dc23167c8d8	3166	i2Cdev.writeByte(devAddr, MPU6050_RA_BANK_SEL, bank);
pHysiX	6:2dc23167c8d8	3167	}
pHysiX	6:2dc23167c8d8	3168
pHysiX	6:2dc23167c8d8	3169	// MEM_START_ADDR register
pHysiX	6:2dc23167c8d8	3170
pHysiX	6:2dc23167c8d8	3171	void MPU6050::setMemoryStartAddress(uint8_t address)
pHysiX	6:2dc23167c8d8	3172	{
pHysiX	6:2dc23167c8d8	3173	i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address);
pHysiX	6:2dc23167c8d8	3174	}
pHysiX	6:2dc23167c8d8	3175
pHysiX	6:2dc23167c8d8	3176	// MEM_R_W register
pHysiX	6:2dc23167c8d8	3177
pHysiX	6:2dc23167c8d8	3178	uint8_t MPU6050::readMemoryByte()
pHysiX	6:2dc23167c8d8	3179	{
pHysiX	6:2dc23167c8d8	3180	i2Cdev.readByte(devAddr, MPU6050_RA_MEM_R_W, buffer);
pHysiX	6:2dc23167c8d8	3181	return buffer[0];
pHysiX	6:2dc23167c8d8	3182	}
pHysiX	6:2dc23167c8d8	3183	void MPU6050::writeMemoryByte(uint8_t data)
pHysiX	6:2dc23167c8d8	3184	{
pHysiX	6:2dc23167c8d8	3185	i2Cdev.writeByte(devAddr, MPU6050_RA_MEM_R_W, data);
pHysiX	6:2dc23167c8d8	3186	}
pHysiX	6:2dc23167c8d8	3187	void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address)
pHysiX	6:2dc23167c8d8	3188	{
pHysiX	6:2dc23167c8d8	3189	setMemoryBank(bank);
pHysiX	6:2dc23167c8d8	3190	setMemoryStartAddress(address);
pHysiX	6:2dc23167c8d8	3191	uint8_t chunkSize;
pHysiX	6:2dc23167c8d8	3192	for (uint16_t i = 0; i < dataSize;) {
pHysiX	6:2dc23167c8d8	3193	// determine correct chunk size according to bank position and data size
pHysiX	6:2dc23167c8d8	3194	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
pHysiX	6:2dc23167c8d8	3195
pHysiX	6:2dc23167c8d8	3196	// make sure we don't go past the data size
pHysiX	6:2dc23167c8d8	3197	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
pHysiX	6:2dc23167c8d8	3198
pHysiX	6:2dc23167c8d8	3199	// make sure this chunk doesn't go past the bank boundary (256 bytes)
pHysiX	6:2dc23167c8d8	3200	if (chunkSize > 256 - address) chunkSize = 256 - address;
pHysiX	6:2dc23167c8d8	3201
pHysiX	6:2dc23167c8d8	3202	// read the chunk of data as specified
pHysiX	6:2dc23167c8d8	3203	i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i);
pHysiX	6:2dc23167c8d8	3204
pHysiX	6:2dc23167c8d8	3205	// increase byte index by [chunkSize]
pHysiX	6:2dc23167c8d8	3206	i += chunkSize;
pHysiX	6:2dc23167c8d8	3207
pHysiX	6:2dc23167c8d8	3208	// uint8_t automatically wraps to 0 at 256
pHysiX	6:2dc23167c8d8	3209	address += chunkSize;
pHysiX	6:2dc23167c8d8	3210
pHysiX	6:2dc23167c8d8	3211	// if we aren't done, update bank (if necessary) and address
pHysiX	6:2dc23167c8d8	3212	if (i < dataSize) {
pHysiX	6:2dc23167c8d8	3213	if (address == 0) bank++;
pHysiX	6:2dc23167c8d8	3214	setMemoryBank(bank);
pHysiX	6:2dc23167c8d8	3215	setMemoryStartAddress(address);
pHysiX	6:2dc23167c8d8	3216	}
pHysiX	6:2dc23167c8d8	3217	}
pHysiX	6:2dc23167c8d8	3218	}
pHysiX	6:2dc23167c8d8	3219	bool MPU6050::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem)
pHysiX	6:2dc23167c8d8	3220	{
pHysiX	6:2dc23167c8d8	3221	setMemoryBank(bank);
pHysiX	6:2dc23167c8d8	3222	setMemoryStartAddress(address);
pHysiX	6:2dc23167c8d8	3223	uint8_t chunkSize;
pHysiX	6:2dc23167c8d8	3224	uint8_t *verifyBuffer = NULL;
pHysiX	6:2dc23167c8d8	3225	uint8_t *progBuffer = NULL;
pHysiX	6:2dc23167c8d8	3226	uint16_t i;
pHysiX	6:2dc23167c8d8	3227	uint8_t j;
pHysiX	6:2dc23167c8d8	3228	if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
pHysiX	6:2dc23167c8d8	3229	if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
pHysiX	6:2dc23167c8d8	3230	for (i = 0; i < dataSize;) {
pHysiX	6:2dc23167c8d8	3231	// determine correct chunk size according to bank position and data size
pHysiX	6:2dc23167c8d8	3232	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
pHysiX	6:2dc23167c8d8	3233
pHysiX	6:2dc23167c8d8	3234	// make sure we don't go past the data size
pHysiX	6:2dc23167c8d8	3235	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
pHysiX	6:2dc23167c8d8	3236
pHysiX	6:2dc23167c8d8	3237	// make sure this chunk doesn't go past the bank boundary (256 bytes)
pHysiX	6:2dc23167c8d8	3238	if (chunkSize > 256 - address) chunkSize = 256 - address;
pHysiX	6:2dc23167c8d8	3239
pHysiX	6:2dc23167c8d8	3240	if (useProgMem) {
pHysiX	6:2dc23167c8d8	3241	// write the chunk of data as specified
pHysiX	6:2dc23167c8d8	3242	for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
pHysiX	6:2dc23167c8d8	3243	} else {
pHysiX	6:2dc23167c8d8	3244	// write the chunk of data as specified
pHysiX	6:2dc23167c8d8	3245	progBuffer = (uint8_t *)data + i;
pHysiX	6:2dc23167c8d8	3246	}
pHysiX	6:2dc23167c8d8	3247
pHysiX	6:2dc23167c8d8	3248	i2Cdev.writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer);
pHysiX	6:2dc23167c8d8	3249
pHysiX	6:2dc23167c8d8	3250	// verify data if needed
pHysiX	6:2dc23167c8d8	3251	if (verify && verifyBuffer) {
pHysiX	6:2dc23167c8d8	3252	setMemoryBank(bank);
pHysiX	6:2dc23167c8d8	3253	setMemoryStartAddress(address);
pHysiX	6:2dc23167c8d8	3254	i2Cdev.readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer);
pHysiX	6:2dc23167c8d8	3255	if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
pHysiX	6:2dc23167c8d8	3256	/*Serial.print("Block write verification error, bank ");
pHysiX	6:2dc23167c8d8	3257	Serial.print(bank, DEC);
pHysiX	6:2dc23167c8d8	3258	Serial.print(", address ");
pHysiX	6:2dc23167c8d8	3259	Serial.print(address, DEC);
pHysiX	6:2dc23167c8d8	3260	Serial.print("!\nExpected:");
pHysiX	6:2dc23167c8d8	3261	for (j = 0; j < chunkSize; j++) {
pHysiX	6:2dc23167c8d8	3262	Serial.print(" 0x");
pHysiX	6:2dc23167c8d8	3263	if (progBuffer[j] < 16) Serial.print("0");
pHysiX	6:2dc23167c8d8	3264	Serial.print(progBuffer[j], HEX);
pHysiX	6:2dc23167c8d8	3265	}
pHysiX	6:2dc23167c8d8	3266	Serial.print("\nReceived:");
pHysiX	6:2dc23167c8d8	3267	for (uint8_t j = 0; j < chunkSize; j++) {
pHysiX	6:2dc23167c8d8	3268	Serial.print(" 0x");
pHysiX	6:2dc23167c8d8	3269	if (verifyBuffer[i + j] < 16) Serial.print("0");
pHysiX	6:2dc23167c8d8	3270	Serial.print(verifyBuffer[i + j], HEX);
pHysiX	6:2dc23167c8d8	3271	}
pHysiX	6:2dc23167c8d8	3272	Serial.print("\n");*/
pHysiX	6:2dc23167c8d8	3273	free(verifyBuffer);
pHysiX	6:2dc23167c8d8	3274	if (useProgMem) free(progBuffer);
pHysiX	6:2dc23167c8d8	3275	return false; // uh oh.
pHysiX	6:2dc23167c8d8	3276	}
pHysiX	6:2dc23167c8d8	3277	}
pHysiX	6:2dc23167c8d8	3278
pHysiX	6:2dc23167c8d8	3279	// increase byte index by [chunkSize]
pHysiX	6:2dc23167c8d8	3280	i += chunkSize;
pHysiX	6:2dc23167c8d8	3281
pHysiX	6:2dc23167c8d8	3282	// uint8_t automatically wraps to 0 at 256
pHysiX	6:2dc23167c8d8	3283	address += chunkSize;
pHysiX	6:2dc23167c8d8	3284
pHysiX	6:2dc23167c8d8	3285	// if we aren't done, update bank (if necessary) and address
pHysiX	6:2dc23167c8d8	3286	if (i < dataSize) {
pHysiX	6:2dc23167c8d8	3287	if (address == 0) bank++;
pHysiX	6:2dc23167c8d8	3288	setMemoryBank(bank);
pHysiX	6:2dc23167c8d8	3289	setMemoryStartAddress(address);
pHysiX	6:2dc23167c8d8	3290	}
pHysiX	6:2dc23167c8d8	3291	}
pHysiX	6:2dc23167c8d8	3292	if (verify) free(verifyBuffer);
pHysiX	6:2dc23167c8d8	3293	if (useProgMem) free(progBuffer);
pHysiX	6:2dc23167c8d8	3294	return true;
pHysiX	6:2dc23167c8d8	3295	}
pHysiX	6:2dc23167c8d8	3296	bool MPU6050::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify)
pHysiX	6:2dc23167c8d8	3297	{
pHysiX	6:2dc23167c8d8	3298	return writeMemoryBlock(data, dataSize, bank, address, verify, true);
pHysiX	6:2dc23167c8d8	3299	}
pHysiX	6:2dc23167c8d8	3300	bool MPU6050::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem)
pHysiX	6:2dc23167c8d8	3301	{
pHysiX	6:2dc23167c8d8	3302	uint8_t success, special;
pHysiX	6:2dc23167c8d8	3303	uint8_t *progBuffer = NULL;
pHysiX	6:2dc23167c8d8	3304	uint16_t i, j;
pHysiX	6:2dc23167c8d8	3305	if (useProgMem) {
pHysiX	6:2dc23167c8d8	3306	progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary
pHysiX	6:2dc23167c8d8	3307	}
pHysiX	6:2dc23167c8d8	3308
pHysiX	6:2dc23167c8d8	3309	// config set data is a long string of blocks with the following structure:
pHysiX	6:2dc23167c8d8	3310	// [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
pHysiX	6:2dc23167c8d8	3311	uint8_t bank, offset, length;
pHysiX	6:2dc23167c8d8	3312	for (i = 0; i < dataSize;) {
pHysiX	6:2dc23167c8d8	3313	if (useProgMem) {
pHysiX	6:2dc23167c8d8	3314	bank = pgm_read_byte(data + i++);
pHysiX	6:2dc23167c8d8	3315	offset = pgm_read_byte(data + i++);
pHysiX	6:2dc23167c8d8	3316	length = pgm_read_byte(data + i++);
pHysiX	6:2dc23167c8d8	3317	} else {
pHysiX	6:2dc23167c8d8	3318	bank = data[i++];
pHysiX	6:2dc23167c8d8	3319	offset = data[i++];
pHysiX	6:2dc23167c8d8	3320	length = data[i++];
pHysiX	6:2dc23167c8d8	3321	}
pHysiX	6:2dc23167c8d8	3322
pHysiX	6:2dc23167c8d8	3323	// write data or perform special action
pHysiX	6:2dc23167c8d8	3324	if (length > 0) {
pHysiX	6:2dc23167c8d8	3325	// regular block of data to write
pHysiX	6:2dc23167c8d8	3326	/*Serial.print("Writing config block to bank ");
pHysiX	6:2dc23167c8d8	3327	Serial.print(bank);
pHysiX	6:2dc23167c8d8	3328	Serial.print(", offset ");
pHysiX	6:2dc23167c8d8	3329	Serial.print(offset);
pHysiX	6:2dc23167c8d8	3330	Serial.print(", length=");
pHysiX	6:2dc23167c8d8	3331	Serial.println(length);*/
pHysiX	6:2dc23167c8d8	3332	if (useProgMem) {
pHysiX	6:2dc23167c8d8	3333	if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length);
pHysiX	6:2dc23167c8d8	3334	for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j);
pHysiX	6:2dc23167c8d8	3335	} else {
pHysiX	6:2dc23167c8d8	3336	progBuffer = (uint8_t *)data + i;
pHysiX	6:2dc23167c8d8	3337	}
pHysiX	6:2dc23167c8d8	3338	success = writeMemoryBlock(progBuffer, length, bank, offset, true);
pHysiX	6:2dc23167c8d8	3339	i += length;
pHysiX	6:2dc23167c8d8	3340	} else {
pHysiX	6:2dc23167c8d8	3341	// special instruction
pHysiX	6:2dc23167c8d8	3342	// NOTE: this kind of behavior (what and when to do certain things)
pHysiX	6:2dc23167c8d8	3343	// is totally undocumented. This code is in here based on observed
pHysiX	6:2dc23167c8d8	3344	// behavior only, and exactly why (or even whether) it has to be here
pHysiX	6:2dc23167c8d8	3345	// is anybody's guess for now.
pHysiX	6:2dc23167c8d8	3346	if (useProgMem) {
pHysiX	6:2dc23167c8d8	3347	special = pgm_read_byte(data + i++);
pHysiX	6:2dc23167c8d8	3348	} else {
pHysiX	6:2dc23167c8d8	3349	special = data[i++];
pHysiX	6:2dc23167c8d8	3350	}
pHysiX	6:2dc23167c8d8	3351	/*Serial.print("Special command code ");
pHysiX	6:2dc23167c8d8	3352	Serial.print(special, HEX);
pHysiX	6:2dc23167c8d8	3353	Serial.println(" found...");*/
pHysiX	6:2dc23167c8d8	3354	if (special == 0x01) {
pHysiX	6:2dc23167c8d8	3355	// enable DMP-related interrupts
pHysiX	6:2dc23167c8d8	3356
pHysiX	6:2dc23167c8d8	3357	//setIntZeroMotionEnabled(true);
pHysiX	6:2dc23167c8d8	3358	//setIntFIFOBufferOverflowEnabled(true);
pHysiX	6:2dc23167c8d8	3359	//setIntDMPEnabled(true);
pHysiX	6:2dc23167c8d8	3360	i2Cdev.writeByte(devAddr, MPU6050_RA_INT_ENABLE, 0x32); // single operation
pHysiX	6:2dc23167c8d8	3361
pHysiX	6:2dc23167c8d8	3362	success = true;
pHysiX	6:2dc23167c8d8	3363	} else {
pHysiX	6:2dc23167c8d8	3364	// unknown special command
pHysiX	6:2dc23167c8d8	3365	success = false;
pHysiX	6:2dc23167c8d8	3366	}
pHysiX	6:2dc23167c8d8	3367	}
pHysiX	6:2dc23167c8d8	3368
pHysiX	6:2dc23167c8d8	3369	if (!success) {
pHysiX	6:2dc23167c8d8	3370	if (useProgMem) free(progBuffer);
pHysiX	6:2dc23167c8d8	3371	return false; // uh oh
pHysiX	6:2dc23167c8d8	3372	}
pHysiX	6:2dc23167c8d8	3373	}
pHysiX	6:2dc23167c8d8	3374	if (useProgMem) free(progBuffer);
pHysiX	6:2dc23167c8d8	3375	return true;
pHysiX	6:2dc23167c8d8	3376	}
pHysiX	6:2dc23167c8d8	3377	bool MPU6050::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize)
pHysiX	6:2dc23167c8d8	3378	{
pHysiX	6:2dc23167c8d8	3379	return writeDMPConfigurationSet(data, dataSize, false);
pHysiX	6:2dc23167c8d8	3380	}
pHysiX	6:2dc23167c8d8	3381
pHysiX	6:2dc23167c8d8	3382	// DMP_CFG_1 register
pHysiX	6:2dc23167c8d8	3383
pHysiX	6:2dc23167c8d8	3384	uint8_t MPU6050::getDMPConfig1()
pHysiX	6:2dc23167c8d8	3385	{
pHysiX	6:2dc23167c8d8	3386	i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer);
pHysiX	6:2dc23167c8d8	3387	return buffer[0];
pHysiX	6:2dc23167c8d8	3388	}
pHysiX	6:2dc23167c8d8	3389	void MPU6050::setDMPConfig1(uint8_t config)
pHysiX	6:2dc23167c8d8	3390	{
pHysiX	6:2dc23167c8d8	3391	i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config);
pHysiX	6:2dc23167c8d8	3392	}
pHysiX	6:2dc23167c8d8	3393
pHysiX	6:2dc23167c8d8	3394	// DMP_CFG_2 register
pHysiX	6:2dc23167c8d8	3395
pHysiX	6:2dc23167c8d8	3396	uint8_t MPU6050::getDMPConfig2()
pHysiX	6:2dc23167c8d8	3397	{
pHysiX	6:2dc23167c8d8	3398	i2Cdev.readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer);
pHysiX	6:2dc23167c8d8	3399	return buffer[0];
pHysiX	6:2dc23167c8d8	3400	}
pHysiX	6:2dc23167c8d8	3401	void MPU6050::setDMPConfig2(uint8_t config)
pHysiX	6:2dc23167c8d8	3402	{
pHysiX	6:2dc23167c8d8	3403	i2Cdev.writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config);
pHysiX	6:2dc23167c8d8	3404	}

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Type:	Library
Created:	29 Mar 2015
Imports:	21
Forks:	0
Commits:	18
Dependents:	5
Dependencies:	0
Followers:	2

The code in this repository is Apache licensed.

MPU/MPU6050.cpp@6:2dc23167c8d8, 2014-04-29 (annotated)

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