Aidan Walton
Library to control and transfer data from NXP SGTL5000. As used on the Teensy Audio Shield. It uses DMA to transfer I2S FIFO data.
The Library now supports dual codecs. Allowing all 4 channels of the Teensy I2S interface to RX and TX data to separate SGTL5000 devices.
The ISR routines that handles pointer swaps for double buffering has been fully coded in assembler to reduce overhead and now takes < 800nS per FIFO transfer when using all 4 channels.
Support added for all typical sample rates and system Clock speeds of 96Mhz or 120Mhz.
Pause and Resume functions added to allow quick and simple suppression of IRQs and stream halting and restart. This required software triggered IRQ, in order to ensure accurate word sync control.
History
doc updates
2017-09-27, by aidan1971 [Wed, 27 Sep 2017 11:23:28 +0000] rev 14
doc updates
doc updates
2017-09-27, by aidan1971 [Wed, 27 Sep 2017 11:20:43 +0000] rev 13
doc updates
docs updated, noteing sync timing considerations
2017-09-27, by aidan1971 [Wed, 27 Sep 2017 10:59:09 +0000] rev 12
docs updated, noteing sync timing considerations
A few documentation updates
2017-09-27, by aidan1971 [Wed, 27 Sep 2017 10:39:01 +0000] rev 11
A few documentation updates
Significant re-work.; The library now supports dual codecs. Using channel 0 and channel 1 of the I2S silicon of Teensy 3.2.; replaced c code with inline assembler reduces time of pointer swaps < 800nS.
2017-09-26, by aidan1971 [Tue, 26 Sep 2017 23:03:32 +0000] rev 10
Significant re-work.; The library now supports dual codecs. Using channel 0 and channel 1 of the I2S silicon of Teensy 3.2.; replaced c code with inline assembler reduces time of pointer swaps < 800nS.
Changed the stop functions to suspend IRQs and DMA requests, also the codec's I2S interface is disabled. During start, the MCUs I2S state machine is now reset, before acquiring sync.
2017-07-15, by aidan1971 [Sat, 15 Jul 2017 13:15:08 +0000] rev 9
Changed the stop functions to suspend IRQs and DMA requests, also the codec's I2S interface is disabled. During start, the MCUs I2S state machine is now reset, before acquiring sync.
Added init function to allow control over timing of I2C comms.
2017-07-07, by aidan1971 [Fri, 07 Jul 2017 11:38:57 +0000] rev 8
Added init function to allow control over timing of I2C comms.
Placed locks around I2C access.
2017-07-05, by aidan1971 [Wed, 05 Jul 2017 17:30:08 +0000] rev 7
Placed locks around I2C access.
Separated ISRs into Callback type and IRQ type to avoid unnecessary checks. ; Replaced ISR code with inline assembler to optimize memory calls.
2017-07-01, by aidan1971 [Sat, 01 Jul 2017 10:20:45 +0000] rev 6
Separated ISRs into Callback type and IRQ type to avoid unnecessary checks. ; Replaced ISR code with inline assembler to optimize memory calls.
Packed data delivered as int16_t !
2017-06-30, by aidan1971 [Fri, 30 Jun 2017 09:46:54 +0000] rev 5
Packed data delivered as int16_t !