Updated functions to deal with USB clocking. (PPL1) See http://www.nxp.com/documents/user_manual/UM10360.pdf Section 4.6 & 4.7.3

Dependencies:   mbed

Fork of ClockControl by Michael Wei

Files at this revision

API Documentation at this revision

Comitter:
aidan1971
Date:
Mon Sep 12 13:11:32 2016 +0000
Parent:
1:8b04bd33c7cd
Commit message:
Added comments and command to change TIMER3 prescaler

Changed in this revision

ClockControl/ClockControl.cpp Show annotated file Show diff for this revision Revisions of this file
diff -r 8b04bd33c7cd -r ab85c20317b5 ClockControl/ClockControl.cpp
--- a/ClockControl/ClockControl.cpp	Sun Sep 11 22:36:20 2016 +0000
+++ b/ClockControl/ClockControl.cpp	Mon Sep 12 13:11:32 2016 +0000
@@ -32,10 +32,10 @@
     setPLL0Frequency(clkSrc, M, N);
     LPC_SC->CCLKCFG = clkDivider - 1;
     LPC_SC->USBCLKCFG = USBclkDivider - 1;
-    // Sets divider for TIMER3. Although not very useful. Default is "PCLK_peripheral = CCLK/4". There must be a scaler elsewhere (mbed.h ??) to translate this peripheral base frequency into uS. 
+    // Default "PCLK_peripheral = CCLK/4". 
     // If System Clock is changed from default, TIMER3 changes with it. eg 96Mhz System clock TIMER3 1uS = 1uS. System Clock = 120Mhz. 1uS will actually become 0.8uS.
-    // Is could be useful also for getting Timer resolution below 1uS. i.e set divider to 1, as below and min Timer resolution should be 250nS.
-    //LPC_SC->PCLKSEL1 = 1 << 14;    
+    //LPC_SC->PCLKSEL1 = 1 << 14; // Sets divider for TIMER3 to CCLK / 1.
+    //LPC_TIM3->PR = 74;    // Sets prescaler for TIMER3 counter. (Default at 96Mhz and PCLKSEL = 0 (ie. CCLK/4) is 23) Therefore if we set PCLKSEL = CCLK/1 and scale down by (23*4) * 96Mhz/120hz = 73.6. Not perfect...but it works 
     SystemCoreClockUpdate();
     return SystemCoreClock;
 }