Updated functions to deal with USB clocking. (PPL1) See http://www.nxp.com/documents/user_manual/UM10360.pdf Section 4.6 & 4.7.3
Fork of ClockControl by
ClockControl/ClockControl.cpp@2:ab85c20317b5, 2016-09-12 (annotated)
- Committer:
- aidan1971
- Date:
- Mon Sep 12 13:11:32 2016 +0000
- Revision:
- 2:ab85c20317b5
- Parent:
- 1:8b04bd33c7cd
Added comments and command to change TIMER3 prescaler
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
no2chem | 0:b5d3bd64d2dc | 1 | #include "ClockControl.h" |
no2chem | 0:b5d3bd64d2dc | 2 | |
no2chem | 0:b5d3bd64d2dc | 3 | void setPLL0Frequency(unsigned char clkSrc, unsigned short M, unsigned char N) |
no2chem | 0:b5d3bd64d2dc | 4 | { |
no2chem | 0:b5d3bd64d2dc | 5 | LPC_SC->CLKSRCSEL = clkSrc; |
no2chem | 0:b5d3bd64d2dc | 6 | LPC_SC->PLL0CFG = (((unsigned int)N-1) << 16) | M-1; |
no2chem | 0:b5d3bd64d2dc | 7 | LPC_SC->PLL0CON = 0x01; |
no2chem | 0:b5d3bd64d2dc | 8 | LPC_SC->PLL0FEED = 0xAA; |
no2chem | 0:b5d3bd64d2dc | 9 | LPC_SC->PLL0FEED = 0x55; |
no2chem | 0:b5d3bd64d2dc | 10 | while (!(LPC_SC->PLL0STAT & (1<<26))); |
no2chem | 0:b5d3bd64d2dc | 11 | |
no2chem | 0:b5d3bd64d2dc | 12 | LPC_SC->PLL0CON = 0x03; |
no2chem | 0:b5d3bd64d2dc | 13 | LPC_SC->PLL0FEED = 0xAA; |
no2chem | 0:b5d3bd64d2dc | 14 | LPC_SC->PLL0FEED = 0x55; |
no2chem | 0:b5d3bd64d2dc | 15 | } |
no2chem | 0:b5d3bd64d2dc | 16 | |
aidan1971 | 1:8b04bd33c7cd | 17 | void setPLL1Frequency(unsigned short M, unsigned char P) |
no2chem | 0:b5d3bd64d2dc | 18 | { |
aidan1971 | 1:8b04bd33c7cd | 19 | LPC_SC->PLL1CFG = (((unsigned int)P-1) << 16) | M-1; |
no2chem | 0:b5d3bd64d2dc | 20 | LPC_SC->PLL1CON = 0x01; |
no2chem | 0:b5d3bd64d2dc | 21 | LPC_SC->PLL1FEED = 0xAA; |
no2chem | 0:b5d3bd64d2dc | 22 | LPC_SC->PLL1FEED = 0x55; |
aidan1971 | 1:8b04bd33c7cd | 23 | while (!(LPC_SC->PLL1STAT & (1<<10))); |
no2chem | 0:b5d3bd64d2dc | 24 | |
no2chem | 0:b5d3bd64d2dc | 25 | LPC_SC->PLL1CON = 0x03; |
no2chem | 0:b5d3bd64d2dc | 26 | LPC_SC->PLL1FEED = 0xAA; |
no2chem | 0:b5d3bd64d2dc | 27 | LPC_SC->PLL1FEED = 0x55; |
no2chem | 0:b5d3bd64d2dc | 28 | } |
no2chem | 0:b5d3bd64d2dc | 29 | |
aidan1971 | 1:8b04bd33c7cd | 30 | unsigned int setSystemFrequency( unsigned char USBclkDivider, unsigned char clkDivider, unsigned char clkSrc, unsigned short M, unsigned char N) |
no2chem | 0:b5d3bd64d2dc | 31 | { |
no2chem | 0:b5d3bd64d2dc | 32 | setPLL0Frequency(clkSrc, M, N); |
no2chem | 0:b5d3bd64d2dc | 33 | LPC_SC->CCLKCFG = clkDivider - 1; |
aidan1971 | 1:8b04bd33c7cd | 34 | LPC_SC->USBCLKCFG = USBclkDivider - 1; |
aidan1971 | 2:ab85c20317b5 | 35 | // Default "PCLK_peripheral = CCLK/4". |
aidan1971 | 1:8b04bd33c7cd | 36 | // If System Clock is changed from default, TIMER3 changes with it. eg 96Mhz System clock TIMER3 1uS = 1uS. System Clock = 120Mhz. 1uS will actually become 0.8uS. |
aidan1971 | 2:ab85c20317b5 | 37 | //LPC_SC->PCLKSEL1 = 1 << 14; // Sets divider for TIMER3 to CCLK / 1. |
aidan1971 | 2:ab85c20317b5 | 38 | //LPC_TIM3->PR = 74; // Sets prescaler for TIMER3 counter. (Default at 96Mhz and PCLKSEL = 0 (ie. CCLK/4) is 23) Therefore if we set PCLKSEL = CCLK/1 and scale down by (23*4) * 96Mhz/120hz = 73.6. Not perfect...but it works |
no2chem | 0:b5d3bd64d2dc | 39 | SystemCoreClockUpdate(); |
no2chem | 0:b5d3bd64d2dc | 40 | return SystemCoreClock; |
aidan1971 | 1:8b04bd33c7cd | 41 | } |
aidan1971 | 1:8b04bd33c7cd | 42 | |
aidan1971 | 1:8b04bd33c7cd | 43 | void setPPL1forUSB(unsigned short M, unsigned char P) |
aidan1971 | 1:8b04bd33c7cd | 44 | { |
aidan1971 | 1:8b04bd33c7cd | 45 | setPLL1Frequency(M, P); // Drive USB subsystem from PLL1 |
no2chem | 0:b5d3bd64d2dc | 46 | } |