With the DDS RAM registers a desired function "frequency (time)" can be implemented for one of the output channels and triggered either by the serial terminal or by an external signal on one of the mbed pins.

Dependencies:   mbed

Committer:
ahambi
Date:
Fri Nov 09 16:02:56 2012 +0000
Revision:
7:c186636817d0
Parent:
0:2160f1821475
With the DDS RAM registers  a desired function "frequency(time)" can be implemented for one of the output channels and triggered either by the serial terminal or by an external signal on one of the mbed pins.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ahambi 0:2160f1821475 1 // ****************************************
ahambi 7:c186636817d0 2 // *** frequency ramps with the RAM ***
ahambi 0:2160f1821475 3 // ****************************************
ahambi 0:2160f1821475 4
ahambi 0:2160f1821475 5 #include "mbed.h"
ahambi 0:2160f1821475 6 #include "DDS.h"
ahambi 0:2160f1821475 7
ahambi 0:2160f1821475 8 Serial pc(USBTX, USBRX);
ahambi 0:2160f1821475 9 DigitalOut myled(LED1);
ahambi 0:2160f1821475 10 DigitalOut cs2(p11);
ahambi 0:2160f1821475 11 DigitalOut cs1(p8);
ahambi 0:2160f1821475 12 DigitalOut rst(p9);
ahambi 0:2160f1821475 13 DigitalOut update(p10);
ahambi 0:2160f1821475 14 DigitalOut ps0(p12);
ahambi 0:2160f1821475 15 DigitalOut ps1(p14);
ahambi 0:2160f1821475 16 DigitalOut trigger(p13);
ahambi 0:2160f1821475 17 DigitalOut trigger1(p23);
ahambi 0:2160f1821475 18 DigitalOut trigger2(p24);
ahambi 0:2160f1821475 19 InterruptIn mcs(p21); //InterruptIn description: http://mbed.org/handbook/InterruptIn
ahambi 0:2160f1821475 20 DigitalIn mexp(p22); //DigitalIn description: http://mbed.org/handbook/DigitalIn
ahambi 0:2160f1821475 21 DDS DDS(p5, p6, p7, p8, p9, p10);
ahambi 0:2160f1821475 22
ahambi 0:2160f1821475 23 // counting variables:
ahambi 0:2160f1821475 24 int i = 0;
ahambi 0:2160f1821475 25 int j = 0;
ahambi 0:2160f1821475 26 // frequency of reference clock connected to the DDS board:
ahambi 0:2160f1821475 27 double ref_clock = 400.0e6;
ahambi 0:2160f1821475 28
ahambi 0:2160f1821475 29 // ##################### definition of functions ############################
ahambi 7:c186636817d0 30
ahambi 7:c186636817d0 31 // reset the DDS:
ahambi 0:2160f1821475 32 int reset() {
ahambi 0:2160f1821475 33 rst = 0;
ahambi 0:2160f1821475 34 rst = 1;
ahambi 0:2160f1821475 35 wait(0.1);
ahambi 0:2160f1821475 36 rst = 0 ;
ahambi 0:2160f1821475 37 return 0;
ahambi 0:2160f1821475 38 }
ahambi 0:2160f1821475 39
ahambi 0:2160f1821475 40 // choosing one of the two output channels is done with this functions:
ahambi 0:2160f1821475 41 int ch_1() {
ahambi 0:2160f1821475 42 cs1 = 0;
ahambi 0:2160f1821475 43 cs2 = 1;
ahambi 0:2160f1821475 44 return 0;
ahambi 0:2160f1821475 45 }
ahambi 0:2160f1821475 46 int ch_2() {
ahambi 0:2160f1821475 47 cs1 = 1;
ahambi 0:2160f1821475 48 cs2 = 0;
ahambi 0:2160f1821475 49 return 0;
ahambi 0:2160f1821475 50 }
ahambi 0:2160f1821475 51
ahambi 7:c186636817d0 52 // This function always rounds values up (in mode ?? of the DDS a problem occurs
ahambi 7:c186636817d0 53 // if the final value is not reached
ahambi 0:2160f1821475 54 int round(double a) {
ahambi 0:2160f1821475 55 return int(a + 0.5);
ahambi 0:2160f1821475 56 }
ahambi 0:2160f1821475 57
ahambi 7:c186636817d0 58 // Calculate the "Frequency Tuning Word (FTWO)" for the DDS registers:
ahambi 0:2160f1821475 59 uint32_t FTWO_func(double frequency) {
ahambi 0:2160f1821475 60 return 0xFFFFFFFF & round(frequency/ref_clock*pow(2.0,32.0));
ahambi 0:2160f1821475 61 }
ahambi 7:c186636817d0 62
ahambi 7:c186636817d0 63 // RSCW0, RSCW1, RSCW2 and RSCW3 are the RAM profiles of the DDS which can be filled with different
ahambi 7:c186636817d0 64 // parts of the ramp:
ahambi 7:c186636817d0 65 // ************* RSCW0 ******************
ahambi 0:2160f1821475 66 void writeRSCW0(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 67 int R_used = r1-r0;
ahambi 0:2160f1821475 68 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 69 ps0 = 0;
ahambi 0:2160f1821475 70 ps1 = 0;
ahambi 0:2160f1821475 71 update = 0;
ahambi 7:c186636817d0 72 // For the structure of the RSCW0 byte see the register map of the DDS.
ahambi 0:2160f1821475 73 // Instruction byte: page 25, we want to write (0), so 0100
ahambi 7:c186636817d0 74 // and internal adress of the register to be written in
ahambi 0:2160f1821475 75 DDS._spi.write(0x00 | (0x07 & 0x1F));
ahambi 0:2160f1821475 76 // byte 5: Ramp rate first part
ahambi 0:2160f1821475 77 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 78 // byte 4: Ramp rate second part
ahambi 0:2160f1821475 79 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 80 // byte 3: final address <7:0>
ahambi 0:2160f1821475 81 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 82 // byte 2
ahambi 0:2160f1821475 83 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 84 // byte 1: beginning address <9:6>
ahambi 0:2160f1821475 85 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 86 update = 1;
ahambi 0:2160f1821475 87 wait_us(10);//5*1/(12.0e6));
ahambi 0:2160f1821475 88 update =0;
ahambi 7:c186636817d0 89
ahambi 7:c186636817d0 90 // The frequency ramp is given as an array of frequencies. Here the frequency tuning
ahambi 7:c186636817d0 91 // words (FTWOs) are calculated:
ahambi 0:2160f1821475 92 i = 0;
ahambi 0:2160f1821475 93 while (i<=(R_used)) {
ahambi 0:2160f1821475 94 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 95 i += 1;
ahambi 0:2160f1821475 96 }
ahambi 7:c186636817d0 97 // Print start and final value of the RAM part:
ahambi 0:2160f1821475 98 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 7:c186636817d0 99 // Select the combination of ps0 and ps1 belonging to RSCW0 and start the RAM writing process:
ahambi 0:2160f1821475 100 ps0 = 0;
ahambi 0:2160f1821475 101 ps1 = 0;
ahambi 7:c186636817d0 102 // Send instruction byte to start the RAM writing process:
ahambi 0:2160f1821475 103 DDS._spi.write(0x0B);
ahambi 7:c186636817d0 104 // Write the frequency tuning words into the RAM:
ahambi 0:2160f1821475 105 i = 0;
ahambi 0:2160f1821475 106 while (i<=(R_used)) {
ahambi 0:2160f1821475 107 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 108 i += 1;
ahambi 0:2160f1821475 109 }
ahambi 0:2160f1821475 110 }
ahambi 0:2160f1821475 111
ahambi 7:c186636817d0 112 // ************* RSCW1 ******************
ahambi 0:2160f1821475 113 void writeRSCW1(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 114 int R_used = r1-r0;
ahambi 0:2160f1821475 115 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 116 ps0 = 1;
ahambi 0:2160f1821475 117 ps1 = 0;
ahambi 0:2160f1821475 118 update = 0;
ahambi 0:2160f1821475 119 DDS._spi.write(0x00 | (0x08 & 0x1F));
ahambi 0:2160f1821475 120 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 121 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 122 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 123 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 124 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 125 update = 1;
ahambi 7:c186636817d0 126 wait_us(10);
ahambi 0:2160f1821475 127 update =0;
ahambi 0:2160f1821475 128
ahambi 0:2160f1821475 129 i = 0;
ahambi 0:2160f1821475 130 while (i<=(R_used)) {
ahambi 0:2160f1821475 131 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 132 i += 1;
ahambi 7:c186636817d0 133 }
ahambi 0:2160f1821475 134 pc.printf("RSCW1 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 135
ahambi 0:2160f1821475 136 ps0 = 1;
ahambi 0:2160f1821475 137 ps1 = 0;
ahambi 0:2160f1821475 138 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 139 i = 0;
ahambi 0:2160f1821475 140 while (i<=(R_used)) {
ahambi 0:2160f1821475 141 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 142 i += 1;
ahambi 0:2160f1821475 143 }
ahambi 0:2160f1821475 144 }
ahambi 7:c186636817d0 145
ahambi 7:c186636817d0 146 // ************* RSCW2 ******************
ahambi 0:2160f1821475 147 void writeRSCW2(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 148 int R_used = r1-r0;
ahambi 0:2160f1821475 149 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 150 ps0 = 0;
ahambi 0:2160f1821475 151 ps1 = 1;
ahambi 0:2160f1821475 152 update = 0;
ahambi 0:2160f1821475 153 DDS._spi.write(0x00 | (0x09 & 0x1F));
ahambi 0:2160f1821475 154 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 155 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 156 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 157 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 158 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 159 update = 1;
ahambi 7:c186636817d0 160 wait_us(10);
ahambi 0:2160f1821475 161 update =0;
ahambi 0:2160f1821475 162
ahambi 0:2160f1821475 163 i = 0;
ahambi 0:2160f1821475 164 while (i<=(R_used)) {
ahambi 0:2160f1821475 165 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 166 i += 1;
ahambi 0:2160f1821475 167 }
ahambi 0:2160f1821475 168
ahambi 7:c186636817d0 169 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 170 ps0 = 0;
ahambi 0:2160f1821475 171 ps1 = 1;
ahambi 0:2160f1821475 172
ahambi 0:2160f1821475 173 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 174 i = 0;
ahambi 0:2160f1821475 175 while (i<=(R_used)) {
ahambi 0:2160f1821475 176 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 177 i += 1;
ahambi 0:2160f1821475 178 }
ahambi 0:2160f1821475 179 }
ahambi 0:2160f1821475 180
ahambi 7:c186636817d0 181 // ************* RSCW3 ******************
ahambi 0:2160f1821475 182 void writeRSCW3(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 183 int R_used = r1-r0;
ahambi 0:2160f1821475 184 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 185 ps0 = 1;
ahambi 0:2160f1821475 186 ps1 = 1;
ahambi 0:2160f1821475 187 update = 0;
ahambi 7:c186636817d0 188 DDS._spi.write(0x00 | (0x0A & 0x1F));
ahambi 0:2160f1821475 189 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 190 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 191 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 192 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 193 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 194 update = 1;
ahambi 7:c186636817d0 195 wait_us(10);
ahambi 0:2160f1821475 196 update =0;
ahambi 0:2160f1821475 197
ahambi 0:2160f1821475 198 i = 0;
ahambi 0:2160f1821475 199 while (i<=(R_used)) {
ahambi 0:2160f1821475 200 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 201 i += 1;
ahambi 0:2160f1821475 202 }
ahambi 0:2160f1821475 203
ahambi 0:2160f1821475 204 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 205
ahambi 0:2160f1821475 206 ps0 = 1;
ahambi 0:2160f1821475 207 ps1 = 1;
ahambi 0:2160f1821475 208 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 209 i = 0;
ahambi 0:2160f1821475 210 while (i<=(R_used)) {
ahambi 0:2160f1821475 211 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 212 i += 1;
ahambi 0:2160f1821475 213 }
ahambi 0:2160f1821475 214 }
ahambi 0:2160f1821475 215
ahambi 7:c186636817d0 216 // Function to calculate the RSCW-word used in RSCW1, RSCW2, RSCW3 and RSCW4
ahambi 0:2160f1821475 217 uint64_t RSCW_func(int ram0, int ram1, double trise) {
ahambi 0:2160f1821475 218 int RAM_used = ram1-ram0+1;
ahambi 0:2160f1821475 219 double tmin = 1.0*4.0/ref_clock*RAM_used; // minimum 1 dwell of time 4/clock at each address
ahambi 0:2160f1821475 220 double tmax = 65535.0*4.0/ref_clock*RAM_used; // 16 bit register corresponding to 65535 dwells
ahambi 0:2160f1821475 221 if (trise < tmin) { pc.printf("ERROR: ramp time too small. Minimum: %f \r \n", tmin); };
ahambi 0:2160f1821475 222 if (trise > tmax) { pc.printf("ERROR: ramp time too large. Maximum: %f \r \n", tmax); };
ahambi 0:2160f1821475 223 int dwells = round(trise/(4.0/ref_clock*RAM_used));
ahambi 0:2160f1821475 224 pc.printf(" %i dwells at each address ---> %f ramp time. \r \n", dwells, dwells*RAM_used*4.0/ref_clock);
ahambi 0:2160f1821475 225 return 0xFFFF & dwells;
ahambi 0:2160f1821475 226 }
ahambi 0:2160f1821475 227
ahambi 7:c186636817d0 228 // The wait-function doesn't offer time resolution of mikroseconds. By using a process like
ahambi 7:c186636817d0 229 // counting up an integer number and measuring the time the mbed needs for this process a time
ahambi 7:c186636817d0 230 // resolution of some tens of nano-seconds can be reached. "counter()" is used in "start_ramp()"
ahambi 7:c186636817d0 231 // below:
ahambi 7:c186636817d0 232 int counter(double t) {
ahambi 0:2160f1821475 233 int bins = int((t-91.8160e-9)/(41.6664e-9) + 0.5);
ahambi 0:2160f1821475 234 return bins;
ahambi 0:2160f1821475 235 };
ahambi 0:2160f1821475 236
ahambi 0:2160f1821475 237 int start_ramp(double trise, double tstay) {
ahambi 0:2160f1821475 238 int i = 0;
ahambi 0:2160f1821475 239 int count = counter(trise+tstay);
ahambi 0:2160f1821475 240 ps0 = 1;
ahambi 0:2160f1821475 241 ps1 = 0;
ahambi 0:2160f1821475 242 //-----------------------------
ahambi 7:c186636817d0 243 // NEVER EVER change this loop! (Allows for time measurement, see above)
ahambi 0:2160f1821475 244 trigger = 0;
ahambi 0:2160f1821475 245 trigger = 1;
ahambi 0:2160f1821475 246 while(i<count){
ahambi 0:2160f1821475 247 i += 1;
ahambi 0:2160f1821475 248 }
ahambi 0:2160f1821475 249 trigger = 0;
ahambi 0:2160f1821475 250 //-----------------------------
ahambi 0:2160f1821475 251 ps0 = 0;
ahambi 0:2160f1821475 252 ps1 = 0;
ahambi 0:2160f1821475 253 i = 0;
ahambi 7:c186636817d0 254 while(i<count){
ahambi 7:c186636817d0 255 i += 1;
ahambi 7:c186636817d0 256 }
ahambi 0:2160f1821475 257 return 0;
ahambi 0:2160f1821475 258 };
ahambi 0:2160f1821475 259
ahambi 7:c186636817d0 260 // Functions used to select output channel 1 or 2 upon receive of an external trigger signal:
ahambi 0:2160f1821475 261 void check_up(){
ahambi 0:2160f1821475 262 ps0 = 0;
ahambi 0:2160f1821475 263 ps1 = 1;
ahambi 0:2160f1821475 264 ch_1(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 265 ch_2(); DDS.CFR1_write(0x80000200);
ahambi 0:2160f1821475 266 };
ahambi 0:2160f1821475 267
ahambi 0:2160f1821475 268 void check_down() {
ahambi 0:2160f1821475 269 ps0 = 0;
ahambi 0:2160f1821475 270 ps1 = 1;
ahambi 0:2160f1821475 271 ch_2(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 272 ch_1(); DDS.CFR1_write(0x80000200);
ahambi 0:2160f1821475 273 };
ahambi 0:2160f1821475 274
ahambi 0:2160f1821475 275 // ############################################################
ahambi 0:2160f1821475 276 // ##################### main part ############################
ahambi 0:2160f1821475 277
ahambi 0:2160f1821475 278 int main() {
ahambi 0:2160f1821475 279
ahambi 0:2160f1821475 280 pc.printf(" \r \r \n \n ***** frequency sweep with DDS in RAM mode***** \r \r \n \n");
ahambi 7:c186636817d0 281 pc.printf("Enter: \r \n");
ahambi 7:c186636817d0 282 pc.printf("'1' or '2' --> select which of the two output channel should be ramped. \r \n");
ahambi 7:c186636817d0 283 pc.printf("'a' --> frequency ramp with parameters 'trise' and 'tstay' and the frequency values in the mbed code is started and repeated with about 50 Hz. A trigger signal lies on output pin 13 of the mbed. \r \n");
ahambi 7:c186636817d0 284 pc.printf("'t' --> read in a new value for 'tstay' \r \n");
ahambi 0:2160f1821475 285
ahambi 0:2160f1821475 286 reset();
ahambi 0:2160f1821475 287
ahambi 7:c186636817d0 288 double tstay = 50.0e-6;
ahambi 0:2160f1821475 289
ahambi 0:2160f1821475 290 // intermediate frequencies
ahambi 7:c186636817d0 291 double frequency0 = 79.5e6;// both channels are initiated on this frequency
ahambi 7:c186636817d0 292 double frequency1 = 80.5e6;
ahambi 0:2160f1821475 293 // tuning word RSCW0 variables
ahambi 7:c186636817d0 294 double trise_00 = 100e-6;
ahambi 7:c186636817d0 295 int ram0_00 = 1;
ahambi 7:c186636817d0 296 int ram1_00 = 156;
ahambi 0:2160f1821475 297 const int RAM_used_00 = ram1_00 - ram0_00;
ahambi 0:2160f1821475 298 double f00 [RAM_used_00+1];
ahambi 0:2160f1821475 299 double frequency_init [1];
ahambi 0:2160f1821475 300 frequency_init[0] = frequency0;
ahambi 0:2160f1821475 301
ahambi 0:2160f1821475 302 j = 0;
ahambi 0:2160f1821475 303 while (j<=(RAM_used_00)) {
ahambi 0:2160f1821475 304 f00[j] = frequency1 - (frequency1-frequency0)/trise_00*j*trise_00/(RAM_used_00);
ahambi 0:2160f1821475 305 j += 1;
ahambi 0:2160f1821475 306 }
ahambi 0:2160f1821475 307
ahambi 0:2160f1821475 308 // tuning word RSCW1 variables
ahambi 7:c186636817d0 309 double trise_10 = 10.0e-6;//0.1e-6;
ahambi 0:2160f1821475 310 int ram0_10 = 250;
ahambi 7:c186636817d0 311 int ram1_10 = 500;
ahambi 0:2160f1821475 312 int RAM_used_10 = ram1_10-ram0_10;
ahambi 0:2160f1821475 313 double f10 [RAM_used_10+1];
ahambi 0:2160f1821475 314 double P [RAM_used_10+1];
ahambi 0:2160f1821475 315
ahambi 0:2160f1821475 316 j = 0;
ahambi 0:2160f1821475 317 while (j<=(RAM_used_10)) {
ahambi 7:c186636817d0 318 f10[j] = frequency0 + (frequency1-frequency0)/trise_10*j*trise_10/(RAM_used_10);
ahambi 0:2160f1821475 319 j += 1;
ahambi 0:2160f1821475 320 }
ahambi 7:c186636817d0 321
ahambi 7:c186636817d0 322 // (Logistic function from below could be added here)
ahambi 0:2160f1821475 323
ahambi 0:2160f1821475 324 // ### calculation of RSCW-words ###
ahambi 0:2160f1821475 325 uint64_t RSCW0 = RSCW_func(ram0_00, ram1_00, trise_00);
ahambi 0:2160f1821475 326 uint64_t RSCW1 = RSCW_func(ram0_10, ram1_10, trise_10);
ahambi 0:2160f1821475 327 uint64_t RSCW2 = RSCW_func(501, 501, 10.0e-6);
ahambi 0:2160f1821475 328
ahambi 0:2160f1821475 329 // ### initialize both channels on the first intermediate frequency and write into their RAM
ahambi 0:2160f1821475 330 ch_1();
ahambi 0:2160f1821475 331
ahambi 0:2160f1821475 332 DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 333 DDS.FTW0_write(FTWO_func(frequency0));
ahambi 0:2160f1821475 334 writeRSCW1(ram0_10, ram1_10, RSCW1, f10);
ahambi 0:2160f1821475 335 writeRSCW0(ram0_00, ram1_00, RSCW0, f00);
ahambi 0:2160f1821475 336 writeRSCW2(501, 501, RSCW2, frequency_init);
ahambi 0:2160f1821475 337
ahambi 0:2160f1821475 338 ch_2();
ahambi 0:2160f1821475 339
ahambi 0:2160f1821475 340 DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 341 DDS.FTW0_write(FTWO_func(frequency0));
ahambi 0:2160f1821475 342 writeRSCW1(ram0_10, ram1_10, RSCW1, f10);
ahambi 0:2160f1821475 343 writeRSCW0(ram0_00, ram1_00, RSCW0, f00);
ahambi 0:2160f1821475 344 writeRSCW2(501, 501, RSCW2, frequency_init);
ahambi 7:c186636817d0 345
ahambi 0:2160f1821475 346 //pc.printf("enter: \r \n 'u' to trigger ramp up \r \n 'd' to trigger ramp down \r \n 't' to enter new ramp time \r \n 's' for new start frequency \r \n 'e' for new end frequency \r \n");
ahambi 0:2160f1821475 347 char up_or_down = '0';
ahambi 7:c186636817d0 348 double trise = trise_00;
ahambi 0:2160f1821475 349
ahambi 0:2160f1821475 350 while(1) {
ahambi 0:2160f1821475 351 if(pc.readable()) {
ahambi 0:2160f1821475 352 up_or_down = pc.getc();
ahambi 0:2160f1821475 353 if(up_or_down == 'a') {
ahambi 7:c186636817d0 354 pc.printf("a --> ramp started");
ahambi 0:2160f1821475 355 while(1) {
ahambi 0:2160f1821475 356 start_ramp(trise, tstay);
ahambi 0:2160f1821475 357 wait(2e-2);
ahambi 0:2160f1821475 358 if(pc.readable()) break;
ahambi 0:2160f1821475 359 }
ahambi 0:2160f1821475 360 if (up_or_down == 't') {
ahambi 0:2160f1821475 361 pc.printf("enter new tstay value in us: \n");
ahambi 0:2160f1821475 362 pc.scanf("%lf", &tstay);
ahambi 0:2160f1821475 363 tstay = tstay*1.0e-6;
ahambi 0:2160f1821475 364 }
ahambi 0:2160f1821475 365 if (up_or_down == 'u') {
ahambi 0:2160f1821475 366 pc.printf("u");
ahambi 0:2160f1821475 367 trigger = 1;
ahambi 0:2160f1821475 368 wait(trise/4.0);
ahambi 0:2160f1821475 369 trigger = 0;
ahambi 0:2160f1821475 370 /////
ahambi 0:2160f1821475 371 ps0 = 1;
ahambi 0:2160f1821475 372 ps1 = 0;
ahambi 0:2160f1821475 373 /////
ahambi 0:2160f1821475 374 }
ahambi 0:2160f1821475 375 if (up_or_down == 'd') {
ahambi 0:2160f1821475 376 pc.printf("d");
ahambi 0:2160f1821475 377 trigger = 1;
ahambi 0:2160f1821475 378 wait(trise/4.0);
ahambi 0:2160f1821475 379 trigger = 0;
ahambi 0:2160f1821475 380 /////
ahambi 0:2160f1821475 381 ps0 = 0;
ahambi 0:2160f1821475 382 ps1 = 0;
ahambi 0:2160f1821475 383 /////
ahambi 0:2160f1821475 384 }
ahambi 0:2160f1821475 385 if (up_or_down == '1') {
ahambi 0:2160f1821475 386 trigger = 0;
ahambi 0:2160f1821475 387 trigger = 1;
ahambi 0:2160f1821475 388 /*ps0 = 0;
ahambi 0:2160f1821475 389 ch_2(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 390 ch_1(); DDS.CFR1_write(0x80000200);*/
ahambi 0:2160f1821475 391 check_down();
ahambi 0:2160f1821475 392 trigger = 0;
ahambi 0:2160f1821475 393 pc.printf("ramping channel 1 \r\n");
ahambi 0:2160f1821475 394 }
ahambi 0:2160f1821475 395 if (up_or_down == '2') {
ahambi 0:2160f1821475 396 trigger = 0;
ahambi 0:2160f1821475 397 trigger = 1;
ahambi 0:2160f1821475 398 /*ps0 = 0;
ahambi 0:2160f1821475 399 ch_1(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 400 ch_2(); DDS.CFR1_write(0x80000200);*/
ahambi 0:2160f1821475 401 check_up();
ahambi 0:2160f1821475 402 trigger = 0;
ahambi 0:2160f1821475 403 pc.printf("ramping channel 2 \r\n");
ahambi 0:2160f1821475 404 }
ahambi 0:2160f1821475 405 /*if (up_or_down == 's') {
ahambi 0:2160f1821475 406 pc.printf("enter new frequency0 value in MHz: \n");
ahambi 0:2160f1821475 407 pc.scanf("%lf", &frequency0);
ahambi 0:2160f1821475 408 frequency0 = frequency0*1.0e6;
ahambi 0:2160f1821475 409 initialize(frequency0, frequency1, RAM_start, RAM_final, trise);
ahambi 0:2160f1821475 410 }*/
ahambi 0:2160f1821475 411 /*if (up_or_down == 'e') {
ahambi 0:2160f1821475 412 pc.printf("enter new frequency1 value in MHz: \n");
ahambi 0:2160f1821475 413 pc.scanf("%lf", &frequency1);
ahambi 0:2160f1821475 414 frequency1 = frequency1*1.0e6;
ahambi 0:2160f1821475 415 initialize(frequency0, frequency1, RAM_start, RAM_final, trise);
ahambi 0:2160f1821475 416 }*/
ahambi 0:2160f1821475 417 }
ahambi 7:c186636817d0 418 // Wait for a rising or falling edge on the mbed-mcs pin and select accordingly channel 1 or
ahambi 7:c186636817d0 419 // channel 2 for ramping
ahambi 0:2160f1821475 420 mcs.rise(&check_up);
ahambi 0:2160f1821475 421 mcs.fall(&check_down);
ahambi 7:c186636817d0 422 // start the ramp when a signal sets the mbed pin 'mexp' to '1'
ahambi 0:2160f1821475 423 if(mexp) {
ahambi 0:2160f1821475 424 while(mexp);
ahambi 0:2160f1821475 425 start_ramp(trise, tstay);
ahambi 0:2160f1821475 426 // pc.printf(" exp trigger in registered \r \n");
ahambi 0:2160f1821475 427 }
ahambi 0:2160f1821475 428 }
ahambi 0:2160f1821475 429
ahambi 0:2160f1821475 430 return 0;
ahambi 0:2160f1821475 431 }
ahambi 0:2160f1821475 432
ahambi 7:c186636817d0 433 /* LOGISTIC FUNCTION
ahambi 7:c186636817d0 434 j = 0;
ahambi 7:c186636817d0 435 double alpha = log(double((RAM_used_10-1.0)*(RAM_used_10-1.0)))*1/RAM_used_10;
ahambi 7:c186636817d0 436 pc.printf("alpha %f\r\n",alpha);
ahambi 7:c186636817d0 437 double beta = 1/alpha*log(double(RAM_used_10-1));
ahambi 7:c186636817d0 438 pc.printf("beta %f\r\n",beta);
ahambi 7:c186636817d0 439 while (j<=(RAM_used_10)) {
ahambi 7:c186636817d0 440 P[j] = 1.0/(1.0+exp(-(j-beta)*alpha));
ahambi 7:c186636817d0 441 f10[j] = frequency0*(1-P[j]) + frequency1*P[j];
ahambi 7:c186636817d0 442 j += 1;
ahambi 7:c186636817d0 443 }
ahambi 7:c186636817d0 444 f10[0] = frequency0;
ahambi 7:c186636817d0 445 f10[RAM_used_10] = frequency1;
ahambi 7:c186636817d0 446 pc.printf("P(0) = %f P(RAM_used) = %f \r\n", P[0], P[RAM_used_10]);*/
ahambi 0:2160f1821475 447
ahambi 7:c186636817d0 448