a hambi / Mbed 2 deprecated Frequency_ramps_with_RAM

With the DDS RAM registers a desired function "frequency (time)" can be implemented for one of the output channels and triggered either by the serial terminal or by an external signal on one of the mbed pins.

Dependencies:   mbed

main.cpp@0:2160f1821475, 2012-07-03 (annotated)

Committer:
ahambi
Date:
Tue Jul 03 08:42:52 2012 +0000
Revision:
0:2160f1821475
Child:
1:dfbf1ff7562f
Child:
3:62e50cb85890
Child:
7:c186636817d0
a --> starts frequency ramp every few ms;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ahambi 0:2160f1821475 1 // compile --> copy to mbed
ahambi 0:2160f1821475 2 // ALT + B in serial terminal --> break command for mbed
ahambi 0:2160f1821475 3
ahambi 0:2160f1821475 4 // ****************************************
ahambi 0:2160f1821475 5 // *** frequency ramps with the the RAM ***
ahambi 0:2160f1821475 6 // ****************************************
ahambi 0:2160f1821475 7
ahambi 0:2160f1821475 8 #include "mbed.h"
ahambi 0:2160f1821475 9 #include "DDS.h"
ahambi 0:2160f1821475 10
ahambi 0:2160f1821475 11 Serial pc(USBTX, USBRX);
ahambi 0:2160f1821475 12 DigitalOut myled(LED1);
ahambi 0:2160f1821475 13 DigitalOut cs2(p11);
ahambi 0:2160f1821475 14 DigitalOut cs1(p8);
ahambi 0:2160f1821475 15 DigitalOut rst(p9);
ahambi 0:2160f1821475 16 DigitalOut update(p10);
ahambi 0:2160f1821475 17 DigitalOut ps0(p12);
ahambi 0:2160f1821475 18 DigitalOut ps1(p14);
ahambi 0:2160f1821475 19 DigitalOut trigger(p13);
ahambi 0:2160f1821475 20 DigitalOut trigger1(p23);
ahambi 0:2160f1821475 21 DigitalOut trigger2(p24);
ahambi 0:2160f1821475 22 InterruptIn mcs(p21); //InterruptIn description: http://mbed.org/handbook/InterruptIn
ahambi 0:2160f1821475 23 DigitalIn mexp(p22); //DigitalIn description: http://mbed.org/handbook/DigitalIn
ahambi 0:2160f1821475 24 DDS DDS(p5, p6, p7, p8, p9, p10);
ahambi 0:2160f1821475 25
ahambi 0:2160f1821475 26 // counting variables:
ahambi 0:2160f1821475 27 int i = 0;
ahambi 0:2160f1821475 28 int j = 0;
ahambi 0:2160f1821475 29 // frequency of reference clock connected to the DDS board:
ahambi 0:2160f1821475 30 double ref_clock = 400.0e6;
ahambi 0:2160f1821475 31
ahambi 0:2160f1821475 32 // ##################### definition of functions ############################
ahambi 0:2160f1821475 33 int reset() {
ahambi 0:2160f1821475 34 rst = 0;
ahambi 0:2160f1821475 35 rst = 1;
ahambi 0:2160f1821475 36 wait(0.1);
ahambi 0:2160f1821475 37 rst = 0 ;
ahambi 0:2160f1821475 38 return 0;
ahambi 0:2160f1821475 39 }
ahambi 0:2160f1821475 40
ahambi 0:2160f1821475 41 // choosing one of the two output channels is done with this functions:
ahambi 0:2160f1821475 42 int ch_1() {
ahambi 0:2160f1821475 43 cs1 = 0;
ahambi 0:2160f1821475 44 cs2 = 1;
ahambi 0:2160f1821475 45 return 0;
ahambi 0:2160f1821475 46 }
ahambi 0:2160f1821475 47 int ch_2() {
ahambi 0:2160f1821475 48 cs1 = 1;
ahambi 0:2160f1821475 49 cs2 = 0;
ahambi 0:2160f1821475 50 return 0;
ahambi 0:2160f1821475 51 }
ahambi 0:2160f1821475 52
ahambi 0:2160f1821475 53 int round(double a) {
ahambi 0:2160f1821475 54 return int(a + 0.5);
ahambi 0:2160f1821475 55 }
ahambi 0:2160f1821475 56
ahambi 0:2160f1821475 57 uint32_t FTWO_func(double frequency) {
ahambi 0:2160f1821475 58 return 0xFFFFFFFF & round(frequency/ref_clock*pow(2.0,32.0));
ahambi 0:2160f1821475 59 }
ahambi 0:2160f1821475 60
ahambi 0:2160f1821475 61 void writeRSCW0(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 62 int R_used = r1-r0;
ahambi 0:2160f1821475 63 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 64 ps0 = 0;
ahambi 0:2160f1821475 65 ps1 = 0;
ahambi 0:2160f1821475 66 update = 0;
ahambi 0:2160f1821475 67 // Instruction byte: page 25, we want to write (0), so 0100
ahambi 0:2160f1821475 68 // + internal adress of the register to be written in
ahambi 0:2160f1821475 69 DDS._spi.write(0x00 | (0x07 & 0x1F));
ahambi 0:2160f1821475 70 // byte 5: Ramp rate first part
ahambi 0:2160f1821475 71 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 72 // byte 4: Ramp rate second part
ahambi 0:2160f1821475 73 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 74 // byte 3: final address <7:0>
ahambi 0:2160f1821475 75 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 76 // byte 2
ahambi 0:2160f1821475 77 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 78 // byte 1: beginning address <9:6>
ahambi 0:2160f1821475 79 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 80 update = 1;
ahambi 0:2160f1821475 81 wait_us(10);//5*1/(12.0e6));
ahambi 0:2160f1821475 82 update =0;
ahambi 0:2160f1821475 83
ahambi 0:2160f1821475 84 i = 0;
ahambi 0:2160f1821475 85 while (i<=(R_used)) {
ahambi 0:2160f1821475 86 //FTWO[i] = FTWO_func(frequency[i]);
ahambi 0:2160f1821475 87 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 88 //pc.printf("written %i %lf \r \n", i, f[i]);
ahambi 0:2160f1821475 89 i += 1;
ahambi 0:2160f1821475 90 }
ahambi 0:2160f1821475 91
ahambi 0:2160f1821475 92 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 93
ahambi 0:2160f1821475 94 ps0 = 0;
ahambi 0:2160f1821475 95 ps1 = 0;
ahambi 0:2160f1821475 96
ahambi 0:2160f1821475 97 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 98
ahambi 0:2160f1821475 99 i = 0;
ahambi 0:2160f1821475 100 while (i<=(R_used)) {
ahambi 0:2160f1821475 101 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 102 // pc.printf("calculated %d : %x, %f \n", i, FTWO[i], frequency[i]);
ahambi 0:2160f1821475 103 i += 1;
ahambi 0:2160f1821475 104 }
ahambi 0:2160f1821475 105 }
ahambi 0:2160f1821475 106
ahambi 0:2160f1821475 107 void writeRSCW1(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 108 int R_used = r1-r0;
ahambi 0:2160f1821475 109 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 110 ps0 = 1;
ahambi 0:2160f1821475 111 ps1 = 0;
ahambi 0:2160f1821475 112 update = 0;
ahambi 0:2160f1821475 113 // Instruction byte: page 25, we want to write (0), so 0100
ahambi 0:2160f1821475 114 // + internal adress of the register to be written in
ahambi 0:2160f1821475 115 DDS._spi.write(0x00 | (0x08 & 0x1F));
ahambi 0:2160f1821475 116 // byte 5: Ramp rate first part
ahambi 0:2160f1821475 117 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 118 // byte 4: Ramp rate second part
ahambi 0:2160f1821475 119 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 120 // byte 3: final address <7:0>
ahambi 0:2160f1821475 121 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 122 // byte 2
ahambi 0:2160f1821475 123 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 124 // byte 1: beginning address <9:6>
ahambi 0:2160f1821475 125 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 126 update = 1;
ahambi 0:2160f1821475 127 wait_us(10);//5*1/(12.0e6));
ahambi 0:2160f1821475 128 update =0;
ahambi 0:2160f1821475 129
ahambi 0:2160f1821475 130 i = 0;
ahambi 0:2160f1821475 131 while (i<=(R_used)) {
ahambi 0:2160f1821475 132 //FTWO[i] = FTWO_func(frequency[i]);
ahambi 0:2160f1821475 133 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 134 //pc.printf("written %i %lf \r \n", i, f[i]);
ahambi 0:2160f1821475 135 i += 1;
ahambi 0:2160f1821475 136 }
ahambi 0:2160f1821475 137
ahambi 0:2160f1821475 138 pc.printf("RSCW1 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 139
ahambi 0:2160f1821475 140 ps0 = 1;
ahambi 0:2160f1821475 141 ps1 = 0;
ahambi 0:2160f1821475 142
ahambi 0:2160f1821475 143 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 144
ahambi 0:2160f1821475 145 i = 0;
ahambi 0:2160f1821475 146 while (i<=(R_used)) {
ahambi 0:2160f1821475 147 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 148 // pc.printf("calculated %d : %x, %f \n", i, FTWO[i], frequency[i]);
ahambi 0:2160f1821475 149 i += 1;
ahambi 0:2160f1821475 150 }
ahambi 0:2160f1821475 151 }
ahambi 0:2160f1821475 152
ahambi 0:2160f1821475 153 void writeRSCW2(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 154 int R_used = r1-r0;
ahambi 0:2160f1821475 155 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 156 ps0 = 0;
ahambi 0:2160f1821475 157 ps1 = 1;
ahambi 0:2160f1821475 158 update = 0;
ahambi 0:2160f1821475 159 // Instruction byte: page 25, we want to write (0), so 0100
ahambi 0:2160f1821475 160 // + internal adress of the register to be written in
ahambi 0:2160f1821475 161 DDS._spi.write(0x00 | (0x09 & 0x1F));
ahambi 0:2160f1821475 162 // byte 5: Ramp rate first part
ahambi 0:2160f1821475 163 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 164 // byte 4: Ramp rate second part
ahambi 0:2160f1821475 165 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 166 // byte 3: final address <7:0>
ahambi 0:2160f1821475 167 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 168 // byte 2
ahambi 0:2160f1821475 169 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 170 // byte 1: beginning address <9:6>
ahambi 0:2160f1821475 171 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 172 update = 1;
ahambi 0:2160f1821475 173 wait_us(10);//5*1/(12.0e6));
ahambi 0:2160f1821475 174 update =0;
ahambi 0:2160f1821475 175
ahambi 0:2160f1821475 176 i = 0;
ahambi 0:2160f1821475 177 while (i<=(R_used)) {
ahambi 0:2160f1821475 178 //FTWO[i] = FTWO_func(frequency[i]);
ahambi 0:2160f1821475 179 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 180 //pc.printf("written %i %lf \r \n", i, f[i]);
ahambi 0:2160f1821475 181 i += 1;
ahambi 0:2160f1821475 182 }
ahambi 0:2160f1821475 183
ahambi 0:2160f1821475 184 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 185
ahambi 0:2160f1821475 186 ps0 = 0;
ahambi 0:2160f1821475 187 ps1 = 1;
ahambi 0:2160f1821475 188
ahambi 0:2160f1821475 189 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 190
ahambi 0:2160f1821475 191 i = 0;
ahambi 0:2160f1821475 192 while (i<=(R_used)) {
ahambi 0:2160f1821475 193 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 194 // pc.printf("calculated %d : %x, %f \n", i, FTWO[i], frequency[i]);
ahambi 0:2160f1821475 195 i += 1;
ahambi 0:2160f1821475 196 }
ahambi 0:2160f1821475 197 }
ahambi 0:2160f1821475 198
ahambi 0:2160f1821475 199
ahambi 0:2160f1821475 200 void writeRSCW3(int r0, int r1, uint32_t RSCW, double f[]) {
ahambi 0:2160f1821475 201 int R_used = r1-r0;
ahambi 0:2160f1821475 202 uint32_t FTWO[R_used];
ahambi 0:2160f1821475 203 ps0 = 1;
ahambi 0:2160f1821475 204 ps1 = 1;
ahambi 0:2160f1821475 205 update = 0;
ahambi 0:2160f1821475 206 // Instruction byte: page 25, we want to write (0), so 0100
ahambi 0:2160f1821475 207 // + internal adress of the register to be written in
ahambi 0:2160f1821475 208 DDS._spi.write(0x00 | (0x10 & 0x1F));
ahambi 0:2160f1821475 209 // byte 5: Ramp rate first part
ahambi 0:2160f1821475 210 DDS._spi.write(0xFF & RSCW);
ahambi 0:2160f1821475 211 // byte 4: Ramp rate second part
ahambi 0:2160f1821475 212 DDS._spi.write(0xFF & (RSCW >> 8));
ahambi 0:2160f1821475 213 // byte 3: final address <7:0>
ahambi 0:2160f1821475 214 DDS._spi.write(0xFF & r1);
ahambi 0:2160f1821475 215 // byte 2
ahambi 0:2160f1821475 216 DDS._spi.write(((r0 << 2) & 0xFC) | ((r1 >> 8) & 0x03));
ahambi 0:2160f1821475 217 // byte 1: beginning address <9:6>
ahambi 0:2160f1821475 218 DDS._spi.write(0x20 | (((r0 >> 6) & 0x0F)));
ahambi 0:2160f1821475 219 update = 1;
ahambi 0:2160f1821475 220 wait_us(10);//5*1/(12.0e6));
ahambi 0:2160f1821475 221 update =0;
ahambi 0:2160f1821475 222
ahambi 0:2160f1821475 223 i = 0;
ahambi 0:2160f1821475 224 while (i<=(R_used)) {
ahambi 0:2160f1821475 225 //FTWO[i] = FTWO_func(frequency[i]);
ahambi 0:2160f1821475 226 FTWO[R_used-i] = FTWO_func(f[i]);
ahambi 0:2160f1821475 227 //pc.printf("written %i %lf \r \n", i, f[i]);
ahambi 0:2160f1821475 228 i += 1;
ahambi 0:2160f1821475 229 }
ahambi 0:2160f1821475 230
ahambi 0:2160f1821475 231 pc.printf("RSCW0 written: %lf %lf \r\n", f[0], f[R_used]);
ahambi 0:2160f1821475 232
ahambi 0:2160f1821475 233 ps0 = 1;
ahambi 0:2160f1821475 234 ps1 = 1;
ahambi 0:2160f1821475 235
ahambi 0:2160f1821475 236 DDS._spi.write(0x0B);
ahambi 0:2160f1821475 237
ahambi 0:2160f1821475 238 i = 0;
ahambi 0:2160f1821475 239 while (i<=(R_used)) {
ahambi 0:2160f1821475 240 DDS.RAM_write_FTWO(FTWO[i]);
ahambi 0:2160f1821475 241 // pc.printf("calculated %d : %x, %f \n", i, FTWO[i], frequency[i]);
ahambi 0:2160f1821475 242 i += 1;
ahambi 0:2160f1821475 243 }
ahambi 0:2160f1821475 244 }
ahambi 0:2160f1821475 245
ahambi 0:2160f1821475 246 uint64_t RSCW_func(int ram0, int ram1, double trise) {
ahambi 0:2160f1821475 247 int RAM_used = ram1-ram0+1;
ahambi 0:2160f1821475 248 double tmin = 1.0*4.0/ref_clock*RAM_used; // minimum 1 dwell of time 4/clock at each address
ahambi 0:2160f1821475 249 double tmax = 65535.0*4.0/ref_clock*RAM_used; // 16 bit register corresponding to 65535 dwells
ahambi 0:2160f1821475 250 if (trise < tmin) { pc.printf("ERROR: ramp time too small. Minimum: %f \r \n", tmin); };
ahambi 0:2160f1821475 251 if (trise > tmax) { pc.printf("ERROR: ramp time too large. Maximum: %f \r \n", tmax); };
ahambi 0:2160f1821475 252 int dwells = round(trise/(4.0/ref_clock*RAM_used));
ahambi 0:2160f1821475 253 pc.printf(" %i dwells at each address ---> %f ramp time. \r \n", dwells, dwells*RAM_used*4.0/ref_clock);
ahambi 0:2160f1821475 254 return 0xFFFF & dwells;
ahambi 0:2160f1821475 255 }
ahambi 0:2160f1821475 256
ahambi 0:2160f1821475 257 int counter(double t) {// for t in us
ahambi 0:2160f1821475 258 int bins = int((t-91.8160e-9)/(41.6664e-9) + 0.5);
ahambi 0:2160f1821475 259 //pc.printf("bins = %i", bins);
ahambi 0:2160f1821475 260 return bins;
ahambi 0:2160f1821475 261 };
ahambi 0:2160f1821475 262
ahambi 0:2160f1821475 263 int start_ramp(double trise, double tstay) {
ahambi 0:2160f1821475 264 int i = 0;
ahambi 0:2160f1821475 265 int count = counter(trise+tstay);
ahambi 0:2160f1821475 266 ps0 = 1;
ahambi 0:2160f1821475 267 ps1 = 0;
ahambi 0:2160f1821475 268 //-----------------------------
ahambi 0:2160f1821475 269 // NEVER EVER change this loop!
ahambi 0:2160f1821475 270 trigger = 0;
ahambi 0:2160f1821475 271 trigger = 1;
ahambi 0:2160f1821475 272 while(i<count){
ahambi 0:2160f1821475 273 i += 1;
ahambi 0:2160f1821475 274 }
ahambi 0:2160f1821475 275 trigger = 0;
ahambi 0:2160f1821475 276 //-----------------------------
ahambi 0:2160f1821475 277 ps0 = 0;
ahambi 0:2160f1821475 278 ps1 = 0;
ahambi 0:2160f1821475 279 i = 0;
ahambi 0:2160f1821475 280 return 0;
ahambi 0:2160f1821475 281 };
ahambi 0:2160f1821475 282
ahambi 0:2160f1821475 283 void check_up(){
ahambi 0:2160f1821475 284 // try to avoid initialization ramp
ahambi 0:2160f1821475 285 ps0 = 0;
ahambi 0:2160f1821475 286 ps1 = 1;
ahambi 0:2160f1821475 287 ch_1(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 288 ch_2(); DDS.CFR1_write(0x80000200);
ahambi 0:2160f1821475 289 };
ahambi 0:2160f1821475 290
ahambi 0:2160f1821475 291 void check_down() {
ahambi 0:2160f1821475 292 // try to avoid initialization ramp
ahambi 0:2160f1821475 293 ps0 = 0;
ahambi 0:2160f1821475 294 ps1 = 1;
ahambi 0:2160f1821475 295 ch_2(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 296 ch_1(); DDS.CFR1_write(0x80000200);
ahambi 0:2160f1821475 297 };
ahambi 0:2160f1821475 298
ahambi 0:2160f1821475 299 // ############################################################
ahambi 0:2160f1821475 300
ahambi 0:2160f1821475 301
ahambi 0:2160f1821475 302 // ##################### main part ############################
ahambi 0:2160f1821475 303
ahambi 0:2160f1821475 304 int main() {
ahambi 0:2160f1821475 305
ahambi 0:2160f1821475 306 pc.printf(" \r \r \n \n ***** frequency sweep with DDS in RAM mode***** \r \r \n \n");
ahambi 0:2160f1821475 307
ahambi 0:2160f1821475 308 reset();
ahambi 0:2160f1821475 309
ahambi 0:2160f1821475 310 double tstay = 500.0e-6;
ahambi 0:2160f1821475 311
ahambi 0:2160f1821475 312 // intermediate frequencies
ahambi 0:2160f1821475 313 double frequency0 = 78.98e6;//100.0e6; // both channels are initiated on this frequency
ahambi 0:2160f1821475 314 double frequency1 = 79.02e6;//110.0e6;
ahambi 0:2160f1821475 315 // tuning word RSCW0 variables
ahambi 0:2160f1821475 316 double trise_00 = 0.1e-6;//20.0e-6;
ahambi 0:2160f1821475 317 int ram0_00 = 50;
ahambi 0:2160f1821475 318 int ram1_00 = 55;//100;
ahambi 0:2160f1821475 319 const int RAM_used_00 = ram1_00 - ram0_00;
ahambi 0:2160f1821475 320 double f00 [RAM_used_00+1];
ahambi 0:2160f1821475 321 double frequency_init [1];
ahambi 0:2160f1821475 322 frequency_init[0] = frequency0;
ahambi 0:2160f1821475 323
ahambi 0:2160f1821475 324 j = 0;
ahambi 0:2160f1821475 325 while (j<=(RAM_used_00)) {
ahambi 0:2160f1821475 326 f00[j] = frequency1 - (frequency1-frequency0)/trise_00*j*trise_00/(RAM_used_00);
ahambi 0:2160f1821475 327 j += 1;
ahambi 0:2160f1821475 328 }
ahambi 0:2160f1821475 329
ahambi 0:2160f1821475 330 // tuning word RSCW1 variables
ahambi 0:2160f1821475 331 double trise_10 = 0.1e-6;
ahambi 0:2160f1821475 332 int ram0_10 = 250;
ahambi 0:2160f1821475 333 int ram1_10 = 255;//500;
ahambi 0:2160f1821475 334 int RAM_used_10 = ram1_10-ram0_10;
ahambi 0:2160f1821475 335 double f10 [RAM_used_10+1];
ahambi 0:2160f1821475 336 double P [RAM_used_10+1];
ahambi 0:2160f1821475 337
ahambi 0:2160f1821475 338 j = 0;
ahambi 0:2160f1821475 339 while (j<=(RAM_used_10)) {
ahambi 0:2160f1821475 340 f10[j] = frequency1 + (frequency1-frequency0)/trise_10*j*trise_10/(RAM_used_10);
ahambi 0:2160f1821475 341 j += 1;
ahambi 0:2160f1821475 342 }
ahambi 0:2160f1821475 343 //### logistic function
ahambi 0:2160f1821475 344 /*
ahambi 0:2160f1821475 345 j = 0;
ahambi 0:2160f1821475 346 double alpha = log(double((RAM_used_10-1.0)*(RAM_used_10-1.0)))*1/RAM_used_10;
ahambi 0:2160f1821475 347 pc.printf("alpha %f\r\n",alpha);
ahambi 0:2160f1821475 348 double beta = 1/alpha*log(double(RAM_used_10-1));
ahambi 0:2160f1821475 349 pc.printf("beta %f\r\n",beta);
ahambi 0:2160f1821475 350 while (j<=(RAM_used_10)) {
ahambi 0:2160f1821475 351 P[j] = 1.0/(1.0+exp(-(j-beta)*alpha));
ahambi 0:2160f1821475 352 f10[j] = frequency0*(1-P[j]) + frequency1*P[j];
ahambi 0:2160f1821475 353 j += 1;
ahambi 0:2160f1821475 354 }
ahambi 0:2160f1821475 355 f10[0] = frequency0;
ahambi 0:2160f1821475 356 f10[RAM_used_10] = frequency1;
ahambi 0:2160f1821475 357 pc.printf("P(0) = %f P(RAM_used) = %f \r\n", P[0], P[RAM_used_10]);*/
ahambi 0:2160f1821475 358
ahambi 0:2160f1821475 359 // ### calculation of RSCW-words ###
ahambi 0:2160f1821475 360 uint64_t RSCW0 = RSCW_func(ram0_00, ram1_00, trise_00);
ahambi 0:2160f1821475 361 uint64_t RSCW1 = RSCW_func(ram0_10, ram1_10, trise_10);
ahambi 0:2160f1821475 362 uint64_t RSCW2 = RSCW_func(501, 501, 10.0e-6);
ahambi 0:2160f1821475 363
ahambi 0:2160f1821475 364 // ### initialize both channels on the first intermediate frequency and write into their RAM
ahambi 0:2160f1821475 365
ahambi 0:2160f1821475 366 ch_1();
ahambi 0:2160f1821475 367
ahambi 0:2160f1821475 368 DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 369 DDS.FTW0_write(FTWO_func(frequency0));
ahambi 0:2160f1821475 370 writeRSCW1(ram0_10, ram1_10, RSCW1, f10);
ahambi 0:2160f1821475 371 writeRSCW0(ram0_00, ram1_00, RSCW0, f00);
ahambi 0:2160f1821475 372 writeRSCW2(501, 501, RSCW2, frequency_init);
ahambi 0:2160f1821475 373
ahambi 0:2160f1821475 374 ch_2();
ahambi 0:2160f1821475 375
ahambi 0:2160f1821475 376 DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 377 DDS.FTW0_write(FTWO_func(frequency0));
ahambi 0:2160f1821475 378 writeRSCW1(ram0_10, ram1_10, RSCW1, f10);
ahambi 0:2160f1821475 379 writeRSCW0(ram0_00, ram1_00, RSCW0, f00);
ahambi 0:2160f1821475 380 writeRSCW2(501, 501, RSCW2, frequency_init);
ahambi 0:2160f1821475 381 /*
ahambi 0:2160f1821475 382 DDS.ASF_write(0xFFFF);
ahambi 0:2160f1821475 383 DDS.ARR_write(0xFF);
ahambi 0:2160f1821475 384 DDS.CFR1_write(0x84000200);
ahambi 0:2160f1821475 385 DDS.CFR1_write(0x80000200);
ahambi 0:2160f1821475 386 */
ahambi 0:2160f1821475 387 //pc.printf("enter: \r \n 'u' to trigger ramp up \r \n 'd' to trigger ramp down \r \n 't' to enter new ramp time \r \n 's' for new start frequency \r \n 'e' for new end frequency \r \n");
ahambi 0:2160f1821475 388 char up_or_down = '0';
ahambi 0:2160f1821475 389 double trise = trise_00;
ahambi 0:2160f1821475 390
ahambi 0:2160f1821475 391
ahambi 0:2160f1821475 392 while(1) {
ahambi 0:2160f1821475 393 if(pc.readable()) {
ahambi 0:2160f1821475 394 up_or_down = pc.getc();
ahambi 0:2160f1821475 395 if(up_or_down == 'a') {
ahambi 0:2160f1821475 396 while(1) {
ahambi 0:2160f1821475 397 start_ramp(trise, tstay);
ahambi 0:2160f1821475 398 wait(2e-2);
ahambi 0:2160f1821475 399 if(pc.readable()) break;
ahambi 0:2160f1821475 400 }
ahambi 0:2160f1821475 401 //start_ramp(trise, tstay);
ahambi 0:2160f1821475 402 //pc.printf("sequence over ST \r \n");
ahambi 0:2160f1821475 403 }
ahambi 0:2160f1821475 404 /*if (up_or_down == 'r') {
ahambi 0:2160f1821475 405 pc.printf("enter new time value in us: \n");
ahambi 0:2160f1821475 406 pc.scanf("%lf", &trise);
ahambi 0:2160f1821475 407 trise = trise*1.0e-6;
ahambi 0:2160f1821475 408 initialize(frequency0, frequency1, RAM_start, RAM_final, trise);
ahambi 0:2160f1821475 409 check_down();
ahambi 0:2160f1821475 410 }*/
ahambi 0:2160f1821475 411 if (up_or_down == 't') {
ahambi 0:2160f1821475 412 pc.printf("enter new tstay value in us: \n");
ahambi 0:2160f1821475 413 pc.scanf("%lf", &tstay);
ahambi 0:2160f1821475 414 tstay = tstay*1.0e-6;
ahambi 0:2160f1821475 415 }
ahambi 0:2160f1821475 416 if (up_or_down == 'u') {
ahambi 0:2160f1821475 417 pc.printf("u");
ahambi 0:2160f1821475 418 trigger = 1;
ahambi 0:2160f1821475 419 wait(trise/4.0);
ahambi 0:2160f1821475 420 trigger = 0;
ahambi 0:2160f1821475 421 /////
ahambi 0:2160f1821475 422 ps0 = 1;
ahambi 0:2160f1821475 423 ps1 = 0;
ahambi 0:2160f1821475 424 /////
ahambi 0:2160f1821475 425 }
ahambi 0:2160f1821475 426 if (up_or_down == 'd') {
ahambi 0:2160f1821475 427 pc.printf("d");
ahambi 0:2160f1821475 428 trigger = 1;
ahambi 0:2160f1821475 429 wait(trise/4.0);
ahambi 0:2160f1821475 430 trigger = 0;
ahambi 0:2160f1821475 431 /////
ahambi 0:2160f1821475 432 ps0 = 0;
ahambi 0:2160f1821475 433 ps1 = 0;
ahambi 0:2160f1821475 434 /////
ahambi 0:2160f1821475 435 }
ahambi 0:2160f1821475 436 if (up_or_down == '1') {
ahambi 0:2160f1821475 437 trigger = 0;
ahambi 0:2160f1821475 438 trigger = 1;
ahambi 0:2160f1821475 439 /*ps0 = 0;
ahambi 0:2160f1821475 440 ch_2(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 441 ch_1(); DDS.CFR1_write(0x80000200);*/
ahambi 0:2160f1821475 442 check_down();
ahambi 0:2160f1821475 443 trigger = 0;
ahambi 0:2160f1821475 444 pc.printf("ramping channel 1 \r\n");
ahambi 0:2160f1821475 445 }
ahambi 0:2160f1821475 446 if (up_or_down == '2') {
ahambi 0:2160f1821475 447 trigger = 0;
ahambi 0:2160f1821475 448 trigger = 1;
ahambi 0:2160f1821475 449 /*ps0 = 0;
ahambi 0:2160f1821475 450 ch_1(); DDS.CFR1_write(0x00000200);
ahambi 0:2160f1821475 451 ch_2(); DDS.CFR1_write(0x80000200);*/
ahambi 0:2160f1821475 452 check_up();
ahambi 0:2160f1821475 453 trigger = 0;
ahambi 0:2160f1821475 454 pc.printf("ramping channel 2 \r\n");
ahambi 0:2160f1821475 455 }
ahambi 0:2160f1821475 456 /*if (up_or_down == 's') {
ahambi 0:2160f1821475 457 pc.printf("enter new frequency0 value in MHz: \n");
ahambi 0:2160f1821475 458 pc.scanf("%lf", &frequency0);
ahambi 0:2160f1821475 459 frequency0 = frequency0*1.0e6;
ahambi 0:2160f1821475 460 initialize(frequency0, frequency1, RAM_start, RAM_final, trise);
ahambi 0:2160f1821475 461 }*/
ahambi 0:2160f1821475 462 /*if (up_or_down == 'e') {
ahambi 0:2160f1821475 463 pc.printf("enter new frequency1 value in MHz: \n");
ahambi 0:2160f1821475 464 pc.scanf("%lf", &frequency1);
ahambi 0:2160f1821475 465 frequency1 = frequency1*1.0e6;
ahambi 0:2160f1821475 466 initialize(frequency0, frequency1, RAM_start, RAM_final, trise);
ahambi 0:2160f1821475 467 }*/
ahambi 0:2160f1821475 468 }
ahambi 0:2160f1821475 469 mcs.rise(&check_up);
ahambi 0:2160f1821475 470 mcs.fall(&check_down);
ahambi 0:2160f1821475 471 if(mexp) {
ahambi 0:2160f1821475 472 while(mexp);
ahambi 0:2160f1821475 473 start_ramp(trise, tstay);
ahambi 0:2160f1821475 474 // pc.printf(" exp trigger in registered \r \n");
ahambi 0:2160f1821475 475 }
ahambi 0:2160f1821475 476 }
ahambi 0:2160f1821475 477
ahambi 0:2160f1821475 478 return 0;
ahambi 0:2160f1821475 479 }
ahambi 0:2160f1821475 480
ahambi 0:2160f1821475 481