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Nrf52
Configuration_of_CMSIS Device_Peripheral_Registers enum IRQn_Type { Reset_IRQn = -15,
NonMaskableInt_IRQn = -14,
HardFault_IRQn = -13,
SVCall_IRQn = -5,
DebugMonitor_IRQn = -4,
PendSV_IRQn = -2,
SysTick_IRQn = -1,
POWER_CLOCK_IRQn = 0,
RADIO_IRQn = 1,
UART0_IRQn = 2,
SPI0_TWI0_IRQn = 3,
SPI1_TWI1_IRQn = 4,
GPIOTE_IRQn = 6,
ADC_IRQn = 7,
TIMER0_IRQn = 8,
TIMER1_IRQn = 9,
TIMER2_IRQn = 10,
RTC0_IRQn = 11,
TEMP_IRQn = 12,
RNG_IRQn = 13,
ECB_IRQn = 14,
CCM_AAR_IRQn = 15,
WDT_IRQn = 16,
RTC1_IRQn = 17,
QDEC_IRQn = 18,
LPCOMP_IRQn = 19,
SWI0_IRQn = 20,
SWI1_IRQn = 21,
SWI2_IRQn = 22,
SWI3_IRQn = 23,
SWI4_IRQn = 24,
SWI5_IRQn = 25,
Reset_IRQn = -15,
NonMaskableInt_IRQn = -14,
HardFault_IRQn = -13,
MemoryManagement_IRQn = -12,
BusFault_IRQn = -11,
UsageFault_IRQn = -10,
SVCall_IRQn = -5,
DebugMonitor_IRQn = -4,
PendSV_IRQn = -2,
SysTick_IRQn = -1,
POWER_CLOCK_IRQn = 0,
RADIO_IRQn = 1,
UARTE0_UART0_IRQn = 2,
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn = 3,
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn = 4,
NFCT_IRQn = 5,
GPIOTE_IRQn = 6,
SAADC_IRQn = 7,
TIMER0_IRQn = 8,
TIMER1_IRQn = 9,
TIMER2_IRQn = 10,
RTC0_IRQn = 11,
TEMP_IRQn = 12,
RNG_IRQn = 13,
ECB_IRQn = 14,
CCM_AAR_IRQn = 15,
WDT_IRQn = 16,
RTC1_IRQn = 17,
QDEC_IRQn = 18,
COMP_LPCOMP_IRQn = 19,
SWI0_EGU0_IRQn = 20,
SWI1_EGU1_IRQn = 21,
SWI2_EGU2_IRQn = 22,
SWI3_EGU3_IRQn = 23,
SWI4_EGU4_IRQn = 24,
SWI5_EGU5_IRQn = 25,
TIMER3_IRQn = 26,
TIMER4_IRQn = 27,
PWM0_IRQn = 28,
PDM_IRQn = 29,
MWU_IRQn = 32,
PWM1_IRQn = 33,
PWM2_IRQn = 34,
SPIM2_SPIS2_SPI2_IRQn = 35,
RTC2_IRQn = 36,
I2S_IRQn = 37,
FPU_IRQn = 38
Enumeration Type Documentation
Enumerator:
1 Reset Vector, invoked on Power up and warm reset
2 Non maskable Interrupt, cannot be stopped or preempted
3 Hard Fault, all classes of Fault
11 System Service Call via SVC instruction
12 Debug Monitor
14 Pendable request for system service
15 System Tick Timer
0 POWER_CLOCK
1 RADIO
2 UART0
3 SPI0_TWI0
4 SPI1_TWI1
6 GPIOTE
7 ADC
8 TIMER0
9 TIMER1
10 TIMER2
11 RTC0
12 TEMP
13 RNG
14 ECB
15 CCM_AAR
16 WDT
17 RTC1
18 QDEC
19 LPCOMP
20 SWI0
21 SWI1
22 SWI2
23 SWI3
24 SWI4
25 SWI5
1 Reset Vector, invoked on Power up and warm reset
2 Non maskable Interrupt, cannot be stopped or preempted
3 Hard Fault, all classes of Fault
4 Memory Management, MPU mismatch, including Access Violation and No Match
5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory related Fault
6 Usage Fault, i.e. Undef Instruction, Illegal State Transition
11 System Service Call via SVC instruction
12 Debug Monitor
14 Pendable request for system service
15 System Tick Timer
0 POWER_CLOCK
1 RADIO
2 UARTE0_UART0
3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0
4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1
5 NFCT
6 GPIOTE
7 SAADC
8 TIMER0
9 TIMER1
10 TIMER2
11 RTC0
12 TEMP
13 RNG
14 ECB
15 CCM_AAR
16 WDT
17 RTC1
18 QDEC
19 COMP_LPCOMP
20 SWI0_EGU0
21 SWI1_EGU1
22 SWI2_EGU2
23 SWI3_EGU3
24 SWI4_EGU4
25 SWI5_EGU5
26 TIMER3
27 TIMER4
28 PWM0
29 PDM
32 MWU
33 PWM1
34 PWM2
35 SPIM2_SPIS2_SPI2
36 RTC2
37 I2S
38 FPU
Definition at line 65 of file nrf52.h .
Nordic Semiconductor
1.7.2