Diff: inc/admw1001/ADMW1001_REGISTERS.h

Revision:

36:54e2418e7620

Parent:

32:52445bef314d

Child:

43:e1789b7214cf

diff -r cf6a5a005a58 -r 54e2418e7620 inc/admw1001/ADMW1001_REGISTERS.h
--- a/inc/admw1001/ADMW1001_REGISTERS.h	Tue Nov 19 11:28:40 2019 +0000
+++ b/inc/admw1001/ADMW1001_REGISTERS.h	Tue Nov 19 12:10:45 2019 +0000
@@ -260,6 +260,8 @@
 #define REG_CORE_ERROR_CODE                  0x0000004C            /*  CORE Code Indicating Source of Error */
 #define REG_CORE_EXTERNAL_REFERENCE_RESISTOR_RESET 0x447A0000            /*      Reset Value for External_Reference_Resistor  */
 #define REG_CORE_EXTERNAL_REFERENCE_RESISTOR 0x00000050            /*  CORE External Reference Resistor Value */
+#define REG_CORE_EXTERNAL_VOLTAGE_REFERENCE_RESET 0x3F99999A            /*      Reset Value for External_Voltage_Reference  */
+#define REG_CORE_EXTERNAL_VOLTAGE_REFERENCE  0x00000054            /*  CORE External Reference Information */
 #define REG_CORE_DIAGNOSTICS_CONTROL_RESET   0x00000000            /*      Reset Value for Diagnostics_Control  */
 #define REG_CORE_DIAGNOSTICS_CONTROL         0x0000005C            /*  CORE Diagnostic Control */
 #define REG_CORE_DATA_FIFO_RESET             0x00000000            /*      Reset Value for Data_FIFO  */
@@ -853,6 +855,12 @@
 #define BITM_CORE_EXTERNAL_REFERENCE_RESISTOR_EXT_REFIN1_VALUE 0xFFFFFFFF    /*  External Reference Resistor Value */
 
 /* -------------------------------------------------------------------------------------------------------------------------
+          CORE_EXTERNAL_VOLTAGE_REFERENCE      Pos/Masks         Description
+   ------------------------------------------------------------------------------------------------------------------------- */
+#define BITP_CORE_EXTERNAL_VOLTAGE_REFERENCE_EXT_REFIN2_VALUE  0            /*  Reference Input Value */
+#define BITM_CORE_EXTERNAL_VOLTAGE_REFERENCE_EXT_REFIN2_VALUE 0xFFFFFFFF    /*  Reference Input Value */
+
+/* -------------------------------------------------------------------------------------------------------------------------
           CORE_DIAGNOSTICS_CONTROL             Pos/Masks         Description
    ------------------------------------------------------------------------------------------------------------------------- */
 #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ  1            /*  Diagnostics Open Sensor Detect Frequency */