Minor changes to support ADMW FWv1.17.75

Committer:
Vkadaba
Date:
Wed Jun 05 05:39:15 2019 +0000
Revision:
5:0728bde67bdb
Child:
6:9d393a9677f4
Replaced all references to ADISense/ADISENSE1000/adi_sense with ADMW/ADMW1001/admw and the prject builds.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vkadaba 5:0728bde67bdb 1 /* ================================================================================
Vkadaba 5:0728bde67bdb 2
Vkadaba 5:0728bde67bdb 3 Project : ADMW1000_REGISTERS
Vkadaba 5:0728bde67bdb 4 File : ADMW1000_REGISTERS.h
Vkadaba 5:0728bde67bdb 5 Description : Register Definitions
Vkadaba 5:0728bde67bdb 6
Vkadaba 5:0728bde67bdb 7 Date : Nov 5, 2018
Vkadaba 5:0728bde67bdb 8
Vkadaba 5:0728bde67bdb 9 Copyright (c) 2018 Analog Devices, Inc. All Rights Reserved.
Vkadaba 5:0728bde67bdb 10 This software is proprietary and confidential to Analog Devices, Inc. and
Vkadaba 5:0728bde67bdb 11 its licensors.
Vkadaba 5:0728bde67bdb 12
Vkadaba 5:0728bde67bdb 13 This file was auto-generated. Do not make local changes to this file.
Vkadaba 5:0728bde67bdb 14
Vkadaba 5:0728bde67bdb 15 ================================================================================ */
Vkadaba 5:0728bde67bdb 16
Vkadaba 5:0728bde67bdb 17 #ifndef _DEF_ADMW1001_REGISTERS_H
Vkadaba 5:0728bde67bdb 18 #define _DEF_ADMW1001_REGISTERS_H
Vkadaba 5:0728bde67bdb 19
Vkadaba 5:0728bde67bdb 20 #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
Vkadaba 5:0728bde67bdb 21 #include <stdint.h>
Vkadaba 5:0728bde67bdb 22 #endif /* _LANGUAGE_C */
Vkadaba 5:0728bde67bdb 23
Vkadaba 5:0728bde67bdb 24 #ifndef __ADI_GENERATED_DEF_HEADERS__
Vkadaba 5:0728bde67bdb 25 #define __ADI_GENERATED_DEF_HEADERS__ 1
Vkadaba 5:0728bde67bdb 26 #endif
Vkadaba 5:0728bde67bdb 27
Vkadaba 5:0728bde67bdb 28 #define __ADI_HAS_CORE__ 1
Vkadaba 5:0728bde67bdb 29 #define __ADI_HAS_SPI__ 1
Vkadaba 5:0728bde67bdb 30 #define __ADI_HAS_TEST__ 1
Vkadaba 5:0728bde67bdb 31
Vkadaba 5:0728bde67bdb 32 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 33
Vkadaba 5:0728bde67bdb 34 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 35
Vkadaba 5:0728bde67bdb 36 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 37 ADMW_SPI
Vkadaba 5:0728bde67bdb 38 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 39 #define REG_SPI_INTERFACE_CONFIG_A_RESET 0x00000030 /* Reset Value for Interface_Config_A */
Vkadaba 5:0728bde67bdb 40 #define REG_SPI_INTERFACE_CONFIG_A 0x00000000 /* ADMW_SPI Interface Configuration A */
Vkadaba 5:0728bde67bdb 41 #define REG_SPI_INTERFACE_CONFIG_B_RESET 0x00000000 /* Reset Value for Interface_Config_B */
Vkadaba 5:0728bde67bdb 42 #define REG_SPI_INTERFACE_CONFIG_B 0x00000001 /* ADMW_SPI Interface Configuration B */
Vkadaba 5:0728bde67bdb 43 #define REG_SPI_DEVICE_CONFIG_RESET 0x00000000 /* Reset Value for Device_Config */
Vkadaba 5:0728bde67bdb 44 #define REG_SPI_DEVICE_CONFIG 0x00000002 /* ADMW_SPI Device Configuration */
Vkadaba 5:0728bde67bdb 45 #define REG_SPI_CHIP_TYPE_RESET 0x00000007 /* Reset Value for Chip_Type */
Vkadaba 5:0728bde67bdb 46 #define REG_SPI_CHIP_TYPE 0x00000003 /* ADMW_SPI Chip Type */
Vkadaba 5:0728bde67bdb 47 #define REG_SPI_PRODUCT_ID_L_RESET 0x00000020 /* Reset Value for Product_ID_L */
Vkadaba 5:0728bde67bdb 48 #define REG_SPI_PRODUCT_ID_L 0x00000004 /* ADMW_SPI Product ID Low */
Vkadaba 5:0728bde67bdb 49 #define REG_SPI_PRODUCT_ID_H_RESET 0x00000000 /* Reset Value for Product_ID_H */
Vkadaba 5:0728bde67bdb 50 #define REG_SPI_PRODUCT_ID_H 0x00000005 /* ADMW_SPI Product ID High */
Vkadaba 5:0728bde67bdb 51 #define REG_SPI_CHIP_GRADE_RESET 0x00000000 /* Reset Value for Chip_Grade */
Vkadaba 5:0728bde67bdb 52 #define REG_SPI_CHIP_GRADE 0x00000006 /* ADMW_SPI Chip Grade */
Vkadaba 5:0728bde67bdb 53 #define REG_SPI_SCRATCH_PAD_RESET 0x00000000 /* Reset Value for Scratch_Pad */
Vkadaba 5:0728bde67bdb 54 #define REG_SPI_SCRATCH_PAD 0x0000000A /* ADMW_SPI Scratch Pad */
Vkadaba 5:0728bde67bdb 55 #define REG_SPI_SPI_REVISION_RESET 0x00000082 /* Reset Value for SPI_Revision */
Vkadaba 5:0728bde67bdb 56 #define REG_SPI_SPI_REVISION 0x0000000B /* ADMW_SPI SPI Revision */
Vkadaba 5:0728bde67bdb 57 #define REG_SPI_VENDOR_L_RESET 0x00000056 /* Reset Value for Vendor_L */
Vkadaba 5:0728bde67bdb 58 #define REG_SPI_VENDOR_L 0x0000000C /* ADMW_SPI Vendor ID Low */
Vkadaba 5:0728bde67bdb 59 #define REG_SPI_VENDOR_H_RESET 0x00000004 /* Reset Value for Vendor_H */
Vkadaba 5:0728bde67bdb 60 #define REG_SPI_VENDOR_H 0x0000000D /* ADMW_SPI Vendor ID High */
Vkadaba 5:0728bde67bdb 61 #define REG_SPI_STREAM_MODE_RESET 0x00000000 /* Reset Value for Stream_Mode */
Vkadaba 5:0728bde67bdb 62 #define REG_SPI_STREAM_MODE 0x0000000E /* ADMW_SPI Stream Mode */
Vkadaba 5:0728bde67bdb 63 #define REG_SPI_TRANSFER_CONFIG_RESET 0x00000000 /* Reset Value for Transfer_Config */
Vkadaba 5:0728bde67bdb 64 #define REG_SPI_TRANSFER_CONFIG 0x0000000F /* ADMW_SPI Transfer Config */
Vkadaba 5:0728bde67bdb 65 #define REG_SPI_INTERFACE_CONFIG_C_RESET 0x00000033 /* Reset Value for Interface_Config_C */
Vkadaba 5:0728bde67bdb 66 #define REG_SPI_INTERFACE_CONFIG_C 0x00000010 /* ADMW_SPI Interface Configuration C */
Vkadaba 5:0728bde67bdb 67 #define REG_SPI_INTERFACE_STATUS_A_RESET 0x00000000 /* Reset Value for Interface_Status_A */
Vkadaba 5:0728bde67bdb 68 #define REG_SPI_INTERFACE_STATUS_A 0x00000011 /* ADMW_SPI Interface Status A */
Vkadaba 5:0728bde67bdb 69
Vkadaba 5:0728bde67bdb 70 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 71 ADMW_SPI Register BitMasks, Positions & Enumerations
Vkadaba 5:0728bde67bdb 72 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 73 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 74 ADMW_SPI_INTERFACE_CONFIG_A Pos/Masks Description
Vkadaba 5:0728bde67bdb 75 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 76 #define BITP_SPI_INTERFACE_CONFIG_A_SW_RESET 7 /* First of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 77 #define BITP_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 5 /* Determines Sequential Addressing Behavior */
Vkadaba 5:0728bde67bdb 78 #define BITP_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 4 /* SDO Pin Enable */
Vkadaba 5:0728bde67bdb 79 #define BITP_SPI_INTERFACE_CONFIG_A_SW_RESETX 0 /* Second of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 80 #define BITM_SPI_INTERFACE_CONFIG_A_SW_RESET 0x00000080 /* First of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 81 #define BITM_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 0x00000020 /* Determines Sequential Addressing Behavior */
Vkadaba 5:0728bde67bdb 82 #define BITM_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 0x00000010 /* SDO Pin Enable */
Vkadaba 5:0728bde67bdb 83 #define BITM_SPI_INTERFACE_CONFIG_A_SW_RESETX 0x00000001 /* Second of Two of SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 84 #define ENUM_SPI_INTERFACE_CONFIG_A_DESCEND 0x00000000 /* Addr_Ascension: Address accessed is decremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 85 #define ENUM_SPI_INTERFACE_CONFIG_A_ASCEND 0x00000020 /* Addr_Ascension: Address accessed is incremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 86
Vkadaba 5:0728bde67bdb 87 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 88 ADMW_SPI_INTERFACE_CONFIG_B Pos/Masks Description
Vkadaba 5:0728bde67bdb 89 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 90 #define BITP_SPI_SPI_INTERFACE_CONFIG_B_SINGLE_INST 7 /* Select Streaming or Single Instruction Mode */
Vkadaba 5:0728bde67bdb 91 #define BITM_SPI_INTERFACE_CONFIG_B_SINGLE_INST 0x00000080 /* Select Streaming or Single Instruction Mode */
Vkadaba 5:0728bde67bdb 92 #define ENUM_SPI_INTERFACE_CONFIG_B_STREAMING_MODE 0x00000000 /* Single_Inst: Streaming mode is enabled */
Vkadaba 5:0728bde67bdb 93 #define ENUM_SPI_INTERFACE_CONFIG_B_SINGLE_INSTRUCTION_MODE 0x00000080 /* Single_Inst: Single Instruction mode is enabled */
Vkadaba 5:0728bde67bdb 94
Vkadaba 5:0728bde67bdb 95 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 96 ADMW_SPI_DEVICE_CONFIG Pos/Masks Description
Vkadaba 5:0728bde67bdb 97 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 98 #define BITP_SPI_SPI_DEVICE_CONFIG_OPERATING_MODES 0 /* Power Modes */
Vkadaba 5:0728bde67bdb 99 #define BITM_SPI_DEVICE_CONFIG_OPERATING_MODES 0x00000003 /* Power Modes */
Vkadaba 5:0728bde67bdb 100 #define ENUM_SPI_DEVICE_CONFIG_NORMAL 0x00000000 /* Operating_Modes: Normal Operating Mode */
Vkadaba 5:0728bde67bdb 101 #define ENUM_SPI_DEVICE_CONFIG_SLEEP 0x00000003 /* Operating_Modes: Low Power Mode */
Vkadaba 5:0728bde67bdb 102
Vkadaba 5:0728bde67bdb 103 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 104 ADMW_SPI_CHIP_TYPE Pos/Masks Description
Vkadaba 5:0728bde67bdb 105 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 106 #define BITP_SPI_CHIP_TYPE_CHIP_TYPE 0 /* Precision ADC */
Vkadaba 5:0728bde67bdb 107 #define BITM_SPI_CHIP_TYPE_CHIP_TYPE 0x0000000F /* Precision ADC */
Vkadaba 5:0728bde67bdb 108
Vkadaba 5:0728bde67bdb 109 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 110 ADMW_SPI_PRODUCT_ID_L Pos/Masks Description
Vkadaba 5:0728bde67bdb 111 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 112 #define BITP_SPI_PRODUCT_ID_L_PRODUCT_ID 0 /* This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 113 #define BITM_SPI_PRODUCT_ID_L_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 114
Vkadaba 5:0728bde67bdb 115 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 116 ADMW_SPI_PRODUCT_ID_H Pos/Masks Description
Vkadaba 5:0728bde67bdb 117 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 118 #define BITP_SPI_PRODUCT_ID_H_PRODUCT_ID 0 /* This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 119 #define BITM_SPI_PRODUCT_ID_H_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */
Vkadaba 5:0728bde67bdb 120
Vkadaba 5:0728bde67bdb 121 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 122 ADMW_SPI_CHIP_GRADE Pos/Masks Description
Vkadaba 5:0728bde67bdb 123 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 124 #define BITP_SPI_CHIP_GRADE_GRADE 4 /* This is the Device Performance Grade */
Vkadaba 5:0728bde67bdb 125 #define BITP_SPI_CHIP_GRADE_DEVICE_REVISION 0 /* This is the Device Hardware Revision */
Vkadaba 5:0728bde67bdb 126 #define BITM_SPI_CHIP_GRADE_GRADE 0x000000F0 /* This is the Device Performance Grade */
Vkadaba 5:0728bde67bdb 127 #define BITM_SPI_CHIP_GRADE_DEVICE_REVISION 0x0000000F /* This is the Device Hardware Revision */
Vkadaba 5:0728bde67bdb 128
Vkadaba 5:0728bde67bdb 129 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 130 ADMW_SPI_SCRATCH_PAD Pos/Masks Description
Vkadaba 5:0728bde67bdb 131 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 132 #define BITP_SPI_SCRATCH_PAD_SCRATCH_VALUE 0 /* Software Scratchpad */
Vkadaba 5:0728bde67bdb 133 #define BITM_SPI_SCRATCH_PAD_SCRATCH_VALUE 0x000000FF /* Software Scratchpad */
Vkadaba 5:0728bde67bdb 134
Vkadaba 5:0728bde67bdb 135 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 136 ADMW_SPI_SPI_REVISION Pos/Masks Description
Vkadaba 5:0728bde67bdb 137 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 138 #define BITP_SPI_SPI_REVISION_SPI_TYPE 6 /* Always Reads as 0x2 */
Vkadaba 5:0728bde67bdb 139 #define BITP_SPI_SPI_REVISION_VERSION 0 /* SPI Version */
Vkadaba 5:0728bde67bdb 140 #define BITM_SPI_SPI_REVISION_SPI_TYPE 0x000000C0 /* Always Reads as 0x2 */
Vkadaba 5:0728bde67bdb 141 #define BITM_SPI_SPI_REVISION_VERSION 0x0000003F /* SPI Version */
Vkadaba 5:0728bde67bdb 142 #define ENUM_SPI_SPI_REVISION_ADI_SPI 0x00000000
Vkadaba 5:0728bde67bdb 143 #define ENUM_SPI_SPI_REVISION_LPT_SPI 0x00000080
Vkadaba 5:0728bde67bdb 144 #define ENUM_SPI_SPI_REVISION_REV1_0 0x00000002 /* Version: Revision 1.0 */
Vkadaba 5:0728bde67bdb 145
Vkadaba 5:0728bde67bdb 146 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 147 ADMW_SPI_VENDOR_L Pos/Masks Description
Vkadaba 5:0728bde67bdb 148 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 149 #define BITP_SPI_VENDOR_L_VID 0 /* Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 150 #define BITM_SPI_VENDOR_L_VID 0x000000FF /* Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 151
Vkadaba 5:0728bde67bdb 152 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 153 ADMW_SPI_VENDOR_H Pos/Masks Description
Vkadaba 5:0728bde67bdb 154 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 155 #define BITP_SPI_VENDOR_H_VID 0 /* Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 156 #define BITM_SPI_VENDOR_H_VID 0x000000FF /* Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 157
Vkadaba 5:0728bde67bdb 158 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 159 ADMW_SPI_STREAM_MODE Pos/Masks Description
Vkadaba 5:0728bde67bdb 160 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 161 #define BITP_SPI_STREAM_MODE_LOOP_COUNT 0 /* Sets the Data Byte Count Before Looping to Start Address */
Vkadaba 5:0728bde67bdb 162 #define BITM_SPI_STREAM_MODE_LOOP_COUNT 0x000000FF /* Sets the Data Byte Count Before Looping to Start Address */
Vkadaba 5:0728bde67bdb 163
Vkadaba 5:0728bde67bdb 164 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 165 ADMW_SPI_TRANSFER_CONFIG Pos/Masks Description
Vkadaba 5:0728bde67bdb 166 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 167 #define BITP_SPI_TRANSFER_CONFIG_STREAM_MODE 1 /* When Streaming, Controls Master-Slave Transfer */
Vkadaba 5:0728bde67bdb 168 #define BITM_SPI_TRANSFER_CONFIG_STREAM_MODE 0x00000002 /* When Streaming, Controls Master-Slave Transfer */
Vkadaba 5:0728bde67bdb 169 #define ENUM_SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE 0x00000000 /* Stream_Mode: Transfers after each byte/mulit-byte register */
Vkadaba 5:0728bde67bdb 170 #define ENUM_SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP 0x00000002 /* Stream_Mode: Transfers when address loops */
Vkadaba 5:0728bde67bdb 171
Vkadaba 5:0728bde67bdb 172 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 173 ADMW_SPI_INTERFACE_CONFIG_C Pos/Masks Description
Vkadaba 5:0728bde67bdb 174 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 175 #define BITP_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 6 /* CRC Enable */
Vkadaba 5:0728bde67bdb 176 #define BITP_SPI_INTERFACE_CONFIG_C_STRICT_REGISTER_ACCESS 5 /* Multi-byte Registers Must Be Read/Written in Full */
Vkadaba 5:0728bde67bdb 177 #define BITP_SPI_INTERFACE_CONFIG_C_SEND_STATUS 4 /* Enables Sending of Status in 4-wire Mode */
Vkadaba 5:0728bde67bdb 178 #define BITP_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0 /* Inverted CRC Enable */
Vkadaba 5:0728bde67bdb 179 #define BITM_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 0x000000C0 /* CRC Enable */
Vkadaba 5:0728bde67bdb 180 #define BITM_SPI_INTERFACE_CONFIG_C_STRICT_REGISTER_ACCESS 0x00000020 /* Multi-byte Registers Must Be Read/Written in Full */
Vkadaba 5:0728bde67bdb 181 #define BITM_SPI_INTERFACE_CONFIG_C_SEND_STATUS 0x00000010 /* Enables Sending of Status in 4-wire Mode */
Vkadaba 5:0728bde67bdb 182 #define BITM_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0x00000003 /* Inverted CRC Enable */
Vkadaba 5:0728bde67bdb 183 #define ENUM_SPI_INTERFACE_CONFIG_C_DISABLED 0x00000000 /* CRC_Enable: CRC Disabled */
Vkadaba 5:0728bde67bdb 184 #define ENUM_SPI_INTERFACE_CONFIG_C_ENABLED 0x00000040 /* CRC_Enable: CRC Enabled */
Vkadaba 5:0728bde67bdb 185 #define ENUM_SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS 0x00000000 /* Strict_Register_Access: Normal mode, no access restrictions */
Vkadaba 5:0728bde67bdb 186 #define ENUM_SPI_INTERFACE_CONFIG_C_STRICT_ACCESS 0x00000020 /* Strict_Register_Access: Strict mode, multi-byte registers require all bytes read/written */
Vkadaba 5:0728bde67bdb 187
Vkadaba 5:0728bde67bdb 188 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 189 ADMW_SPI_INTERFACE_STATUS_A Pos/Masks Description
Vkadaba 5:0728bde67bdb 190 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 191 #define BITP_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 7 /* Device Not Ready for Transaction */
Vkadaba 5:0728bde67bdb 192 #define BITP_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 4 /* Incorrect Number of Clocks Detected in a Transaction */
Vkadaba 5:0728bde67bdb 193 #define BITP_SPI_INTERFACE_STATUS_A_CRC_ERROR 3 /* Invalid/No CRC Received */
Vkadaba 5:0728bde67bdb 194 #define BITP_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 2 /* Write to Read-Only Register Attempted */
Vkadaba 5:0728bde67bdb 195 #define BITP_SPI_INTERFACE_STATUS_A_REGISTER_PARTIAL_ACCESS_ERROR 1 /* Set When Fewer Than Expected Number of Bytes Read/Written */
Vkadaba 5:0728bde67bdb 196 #define BITP_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0 /* Attempt to Read/Write Non-existent Register Address */
Vkadaba 5:0728bde67bdb 197 #define BITM_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 0x00000080 /* Device Not Ready for Transaction */
Vkadaba 5:0728bde67bdb 198 #define BITM_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 0x00000010 /* Incorrect Number of Clocks Detected in a Transaction */
Vkadaba 5:0728bde67bdb 199 #define BITM_SPI_INTERFACE_STATUS_A_CRC_ERROR 0x00000008 /* Invalid/No CRC Received */
Vkadaba 5:0728bde67bdb 200 #define BITM_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 0x00000004 /* Write to Read-Only Register Attempted */
Vkadaba 5:0728bde67bdb 201 #define BITM_SPI_INTERFACE_STATUS_A_REGISTER_PARTIAL_ACCESS_ERROR 0x00000002 /* Set When Fewer Than Expected Number of Bytes Read/Written */
Vkadaba 5:0728bde67bdb 202 #define BITM_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0x00000001 /* Attempt to Read/Write Non-existent Register Address */
Vkadaba 5:0728bde67bdb 203
Vkadaba 5:0728bde67bdb 204
Vkadaba 5:0728bde67bdb 205 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 206 ADMW1000 Core Registers
Vkadaba 5:0728bde67bdb 207 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 208
Vkadaba 5:0728bde67bdb 209 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 210 ADMW_CORE
Vkadaba 5:0728bde67bdb 211 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 212 #define REG_CORE_COMMAND_RESET 0x00000000 /* Reset Value for Command */
Vkadaba 5:0728bde67bdb 213 #define REG_CORE_COMMAND 0x00000014 /* ADMW_CORE Special Command */
Vkadaba 5:0728bde67bdb 214 #define REG_CORE_MODE_RESET 0x00000000 /* Reset Value for Mode */
Vkadaba 5:0728bde67bdb 215 #define REG_CORE_MODE 0x00000016 /* ADMW_CORE Operating Mode and DRDY Control */
Vkadaba 5:0728bde67bdb 216 #define REG_CORE_POWER_CONFIG_RESET 0x00000000 /* Reset Value for Power_Config */
Vkadaba 5:0728bde67bdb 217 #define REG_CORE_POWER_CONFIG 0x00000017 /* ADMW_CORE General Configuration */
Vkadaba 5:0728bde67bdb 218 #define REG_CORE_CYCLE_CONTROL_RESET 0x00000000 /* Reset Value for Cycle_Control */
Vkadaba 5:0728bde67bdb 219 #define REG_CORE_CYCLE_CONTROL 0x00000018 /* ADMW_CORE Measurement Cycle */
Vkadaba 5:0728bde67bdb 220 #define REG_CORE_FIFO_NUM_CYCLES_RESET 0x00000001 /* Reset Value for Fifo_Num_Cycles */
Vkadaba 5:0728bde67bdb 221 #define REG_CORE_FIFO_NUM_CYCLES 0x0000001A /* ADMW_CORE Number of Measurement Cycles to Store in FIFO */
Vkadaba 5:0728bde67bdb 222 #define REG_CORE_MULTI_CYCLE_REPEAT_INTERVAL_RESET 0x00000000 /* Reset Value for Multi_Cycle_Repeat_Interval */
Vkadaba 5:0728bde67bdb 223 #define REG_CORE_MULTI_CYCLE_REPEAT_INTERVAL 0x0000001C /* ADMW_CORE Time Between Repeats of Multi-Cycle Conversions.... */
Vkadaba 5:0728bde67bdb 224 #define REG_CORE_STATUS_RESET 0x00000000 /* Reset Value for Status */
Vkadaba 5:0728bde67bdb 225 #define REG_CORE_STATUS 0x00000020 /* ADMW_CORE General Status */
Vkadaba 5:0728bde67bdb 226 #define REG_CORE_DIAGNOSTICS_STATUS_RESET 0x00000000 /* Reset Value for Diagnostics_Status */
Vkadaba 5:0728bde67bdb 227 #define REG_CORE_DIAGNOSTICS_STATUS 0x00000024 /* ADMW_CORE Diagnostics Status */
Vkadaba 5:0728bde67bdb 228 #define REG_CORE_CHANNEL_ALERT_STATUS_RESET 0x00000000 /* Reset Value for Channel_Alert_Status */
Vkadaba 5:0728bde67bdb 229 #define REG_CORE_CHANNEL_ALERT_STATUS 0x00000026 /* ADMW_CORE Alert Status Summary */
Vkadaba 5:0728bde67bdb 230 #define REG_CORE_ALERT_STATUS_2_RESET 0x00000000 /* Reset Value for Alert_Status_2 */
Vkadaba 5:0728bde67bdb 231 #define REG_CORE_ALERT_STATUS_2 0x00000028 /* ADMW_CORE Additional Alert Status Information */
Vkadaba 5:0728bde67bdb 232 #define REG_CORE_ALERT_DETAIL_CHn_RESET 0x00000000 /* Reset Value for Alert_Detail_Ch[n] */
Vkadaba 5:0728bde67bdb 233 #define REG_CORE_ALERT_DETAIL_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH0 */
Vkadaba 5:0728bde67bdb 234 #define REG_CORE_ALERT_DETAIL_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH1 */
Vkadaba 5:0728bde67bdb 235 #define REG_CORE_ALERT_DETAIL_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH2 */
Vkadaba 5:0728bde67bdb 236 #define REG_CORE_ALERT_DETAIL_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH3 */
Vkadaba 5:0728bde67bdb 237 #define REG_CORE_ALERT_DETAIL_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH4 */
Vkadaba 5:0728bde67bdb 238 #define REG_CORE_ALERT_DETAIL_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH5 */
Vkadaba 5:0728bde67bdb 239 #define REG_CORE_ALERT_DETAIL_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH6 */
Vkadaba 5:0728bde67bdb 240 #define REG_CORE_ALERT_DETAIL_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH7 */
Vkadaba 5:0728bde67bdb 241 #define REG_CORE_ALERT_DETAIL_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH8 */
Vkadaba 5:0728bde67bdb 242 #define REG_CORE_ALERT_DETAIL_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH9 */
Vkadaba 5:0728bde67bdb 243 #define REG_CORE_ALERT_DETAIL_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH10 */
Vkadaba 5:0728bde67bdb 244 #define REG_CORE_ALERT_DETAIL_CH11_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH11 */
Vkadaba 5:0728bde67bdb 245 #define REG_CORE_ALERT_DETAIL_CH12_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH12 */
Vkadaba 5:0728bde67bdb 246 #define REG_CORE_ALERT_DETAIL_CH13_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH13 */
Vkadaba 5:0728bde67bdb 247 #define REG_CORE_ALERT_DETAIL_CH14_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH14 */
Vkadaba 5:0728bde67bdb 248 #define REG_CORE_ALERT_DETAIL_CH15_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH15 */
Vkadaba 5:0728bde67bdb 249 #define REG_CORE_ALERT_DETAIL_CH0 0x0000002A /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 250 #define REG_CORE_ALERT_DETAIL_CH1 0x0000002C /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 251 #define REG_CORE_ALERT_DETAIL_CH2 0x0000002E /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 252 #define REG_CORE_ALERT_DETAIL_CH3 0x00000030 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 253 #define REG_CORE_ALERT_DETAIL_CH4 0x00000032 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 254 #define REG_CORE_ALERT_DETAIL_CH5 0x00000034 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 255 #define REG_CORE_ALERT_DETAIL_CH6 0x00000036 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 256 #define REG_CORE_ALERT_DETAIL_CH7 0x00000038 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 257 #define REG_CORE_ALERT_DETAIL_CH8 0x0000003A /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 258 #define REG_CORE_ALERT_DETAIL_CH9 0x0000003C /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 259 #define REG_CORE_ALERT_DETAIL_CH10 0x0000003E /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 260 #define REG_CORE_ALERT_DETAIL_CH11 0x00000040 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 261 #define REG_CORE_ALERT_DETAIL_CH12 0x00000042 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 262 #define REG_CORE_ALERT_DETAIL_CH13 0x00000044 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 263 #define REG_CORE_ALERT_DETAIL_CH14 0x00000046 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 264 #define REG_CORE_ALERT_DETAIL_CH15 0x00000048 /* ADMW_CORE Detailed Error Information */
Vkadaba 5:0728bde67bdb 265 #define REG_CORE_ALERT_DETAIL_CHn(i) (REG_CORE_ALERT_DETAIL_CH0 + ((i) * 2))
Vkadaba 5:0728bde67bdb 266 #define REG_CORE_ALERT_DETAIL_CHn_COUNT 16
Vkadaba 5:0728bde67bdb 267 #define REG_CORE_ERROR_CODE_RESET 0x00000000 /* Reset Value for Error_Code */
Vkadaba 5:0728bde67bdb 268 #define REG_CORE_ERROR_CODE 0x0000004C /* ADMW_CORE Code Indicating Source of Error */
Vkadaba 5:0728bde67bdb 269 #define REG_CORE_ALERT_CODE_RESET 0x00000000 /* Reset Value for Alert_Code */
Vkadaba 5:0728bde67bdb 270 #define REG_CORE_ALERT_CODE 0x0000004E /* ADMW_CORE Code Indicating Source of Alert */
Vkadaba 5:0728bde67bdb 271 #define REG_CORE_EXTERNAL_REFERENCE1_RESET 0x00000000 /* Reset Value for External_Reference1 */
Vkadaba 5:0728bde67bdb 272 #define REG_CORE_EXTERNAL_REFERENCE1 0x00000050 /* ADMW_CORE External Reference Information */
Vkadaba 5:0728bde67bdb 273 #define REG_CORE_EXTERNAL_REFERENCE2_RESET 0x00000000 /* Reset Value for External_Reference2 */
Vkadaba 5:0728bde67bdb 274 #define REG_CORE_EXTERNAL_REFERENCE2 0x00000054 /* ADMW_CORE External Reference Information */
Vkadaba 5:0728bde67bdb 275 #define REG_CORE_DIAGNOSTICS_CONTROL_RESET 0x00000000 /* Reset Value for Diagnostics_Control */
Vkadaba 5:0728bde67bdb 276 #define REG_CORE_DIAGNOSTICS_CONTROL 0x0000005C /* ADMW_CORE Diagnostic Control */
Vkadaba 5:0728bde67bdb 277 #define REG_CORE_DATA_FIFO_RESET 0x00000000 /* Reset Value for Data_FIFO */
Vkadaba 5:0728bde67bdb 278 #define REG_CORE_DATA_FIFO 0x00000060 /* ADMW_CORE FIFO Buffer of Sensor Results */
Vkadaba 5:0728bde67bdb 279 #define REG_CORE_DEBUG_CODE_RESET 0x00000000 /* Reset Value for Debug_Code */
Vkadaba 5:0728bde67bdb 280 #define REG_CORE_DEBUG_CODE 0x00000064 /* ADMW_CORE Additional Information on Source of Alert or Errors */
Vkadaba 5:0728bde67bdb 281 #define REG_CORE_FFT_CONFIG_RESET 0x00000000 /* Reset Value for FFT_Config */
Vkadaba 5:0728bde67bdb 282 #define REG_CORE_FFT_CONFIG 0x00000068 /* ADMW_CORE FFT Configuration */
Vkadaba 5:0728bde67bdb 283 #define REG_CORE_ADVANCED_SENSOR_ACCESS_RESET 0x00000000 /* Reset Value for Advanced_Sensor_Access */
Vkadaba 5:0728bde67bdb 284 #define REG_CORE_ADVANCED_SENSOR_ACCESS 0x0000006E /* ADMW_CORE Enables Access to Advanced Sensor Configuration */
Vkadaba 5:0728bde67bdb 285 #define REG_CORE_LUT_SELECT_RESET 0x00000000 /* Reset Value for LUT_Select */
Vkadaba 5:0728bde67bdb 286 #define REG_CORE_LUT_SELECT 0x00000070 /* ADMW_CORE Read/Write Strobe */
Vkadaba 5:0728bde67bdb 287 #define REG_CORE_LUT_OFFSET_RESET 0x00000000 /* Reset Value for LUT_Offset */
Vkadaba 5:0728bde67bdb 288 #define REG_CORE_LUT_OFFSET 0x00000072 /* ADMW_CORE Offset into Selected LUT */
Vkadaba 5:0728bde67bdb 289 #define REG_CORE_LUT_DATA_RESET 0x00000000 /* Reset Value for LUT_Data */
Vkadaba 5:0728bde67bdb 290 #define REG_CORE_LUT_DATA 0x00000074 /* ADMW_CORE Data to Read/Write from Addressed LUT Entry */
Vkadaba 5:0728bde67bdb 291 #define REG_CORE_EXT_FLASH_INDEX_RESET 0x00000000 /* Reset Value for Ext_Flash_Index */
Vkadaba 5:0728bde67bdb 292 #define REG_CORE_EXT_FLASH_INDEX 0x00000080 /* ADMW_CORE Start Position (Sample No.) for Retrieval of Ext. Flash Data */
Vkadaba 5:0728bde67bdb 293 #define REG_CORE_EXT_FLASH_SAMPLE_COUNT_RESET 0x00000000 /* Reset Value for Ext_Flash_Sample_Count */
Vkadaba 5:0728bde67bdb 294 #define REG_CORE_EXT_FLASH_SAMPLE_COUNT 0x00000084 /* ADMW_CORE Indicates How Many Samples Stored in External Flash */
Vkadaba 5:0728bde67bdb 295 #define REG_CORE_EXT_FLASH_DATA_RESET 0x00000000 /* Reset Value for Ext_Flash_Data */
Vkadaba 5:0728bde67bdb 296 #define REG_CORE_EXT_FLASH_DATA 0x00000088 /* ADMW_CORE Data Read Back from External Flash */
Vkadaba 5:0728bde67bdb 297 #define REG_CORE_REVISION_RESET 0x00000000 /* Reset Value for Revision */
Vkadaba 5:0728bde67bdb 298 #define REG_CORE_REVISION 0x0000008C /* ADMW_CORE Hardware, Firmware Revision */
Vkadaba 5:0728bde67bdb 299 #define REG_CORE_CHANNEL_COUNTn_RESET 0x00000000 /* Reset Value for Channel_Count[n] */
Vkadaba 5:0728bde67bdb 300 #define REG_CORE_CHANNEL_COUNT0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT0 */
Vkadaba 5:0728bde67bdb 301 #define REG_CORE_CHANNEL_COUNT1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT1 */
Vkadaba 5:0728bde67bdb 302 #define REG_CORE_CHANNEL_COUNT2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT2 */
Vkadaba 5:0728bde67bdb 303 #define REG_CORE_CHANNEL_COUNT3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT3 */
Vkadaba 5:0728bde67bdb 304 #define REG_CORE_CHANNEL_COUNT4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT4 */
Vkadaba 5:0728bde67bdb 305 #define REG_CORE_CHANNEL_COUNT5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT5 */
Vkadaba 5:0728bde67bdb 306 #define REG_CORE_CHANNEL_COUNT6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT6 */
Vkadaba 5:0728bde67bdb 307 #define REG_CORE_CHANNEL_COUNT7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT7 */
Vkadaba 5:0728bde67bdb 308 #define REG_CORE_CHANNEL_COUNT8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT8 */
Vkadaba 5:0728bde67bdb 309 #define REG_CORE_CHANNEL_COUNT9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT9 */
Vkadaba 5:0728bde67bdb 310 #define REG_CORE_CHANNEL_COUNT10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT10 */
Vkadaba 5:0728bde67bdb 311 #define REG_CORE_CHANNEL_COUNT11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT11 */
Vkadaba 5:0728bde67bdb 312 #define REG_CORE_CHANNEL_COUNT12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT12 */
Vkadaba 5:0728bde67bdb 313 #define REG_CORE_CHANNEL_COUNT13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT13 */
Vkadaba 5:0728bde67bdb 314 #define REG_CORE_CHANNEL_COUNT14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT14 */
Vkadaba 5:0728bde67bdb 315 #define REG_CORE_CHANNEL_COUNT15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT15 */
Vkadaba 5:0728bde67bdb 316 #define REG_CORE_CHANNEL_COUNT0 0x00000090 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 317 #define REG_CORE_CHANNEL_COUNT1 0x000000D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 318 #define REG_CORE_CHANNEL_COUNT2 0x00000110 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 319 #define REG_CORE_CHANNEL_COUNT3 0x00000150 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 320 #define REG_CORE_CHANNEL_COUNT4 0x00000190 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 321 #define REG_CORE_CHANNEL_COUNT5 0x000001D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 322 #define REG_CORE_CHANNEL_COUNT6 0x00000210 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 323 #define REG_CORE_CHANNEL_COUNT7 0x00000250 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 324 #define REG_CORE_CHANNEL_COUNT8 0x00000290 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 325 #define REG_CORE_CHANNEL_COUNT9 0x000002D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 326 #define REG_CORE_CHANNEL_COUNT10 0x00000310 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 327 #define REG_CORE_CHANNEL_COUNT11 0x00000350 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 328 #define REG_CORE_CHANNEL_COUNT12 0x00000390 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 329 #define REG_CORE_CHANNEL_COUNT13 0x000003D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 330 #define REG_CORE_CHANNEL_COUNT14 0x00000410 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 331 #define REG_CORE_CHANNEL_COUNT15 0x00000450 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */
Vkadaba 5:0728bde67bdb 332 #define REG_CORE_CHANNEL_COUNTn(i) (REG_CORE_CHANNEL_COUNT0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 333 #define REG_CORE_CHANNEL_COUNTn_COUNT 16
Vkadaba 5:0728bde67bdb 334 #define REG_CORE_CHANNEL_OPTIONSn_RESET 0x00000000 /* Reset Value for Channel_Options[n] */
Vkadaba 5:0728bde67bdb 335 #define REG_CORE_CHANNEL_OPTIONS0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS0 */
Vkadaba 5:0728bde67bdb 336 #define REG_CORE_CHANNEL_OPTIONS1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS1 */
Vkadaba 5:0728bde67bdb 337 #define REG_CORE_CHANNEL_OPTIONS2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS2 */
Vkadaba 5:0728bde67bdb 338 #define REG_CORE_CHANNEL_OPTIONS3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS3 */
Vkadaba 5:0728bde67bdb 339 #define REG_CORE_CHANNEL_OPTIONS4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS4 */
Vkadaba 5:0728bde67bdb 340 #define REG_CORE_CHANNEL_OPTIONS5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS5 */
Vkadaba 5:0728bde67bdb 341 #define REG_CORE_CHANNEL_OPTIONS6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS6 */
Vkadaba 5:0728bde67bdb 342 #define REG_CORE_CHANNEL_OPTIONS7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS7 */
Vkadaba 5:0728bde67bdb 343 #define REG_CORE_CHANNEL_OPTIONS8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS8 */
Vkadaba 5:0728bde67bdb 344 #define REG_CORE_CHANNEL_OPTIONS9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS9 */
Vkadaba 5:0728bde67bdb 345 #define REG_CORE_CHANNEL_OPTIONS10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS10 */
Vkadaba 5:0728bde67bdb 346 #define REG_CORE_CHANNEL_OPTIONS11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS11 */
Vkadaba 5:0728bde67bdb 347 #define REG_CORE_CHANNEL_OPTIONS12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS12 */
Vkadaba 5:0728bde67bdb 348 #define REG_CORE_CHANNEL_OPTIONS13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS13 */
Vkadaba 5:0728bde67bdb 349 #define REG_CORE_CHANNEL_OPTIONS14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS14 */
Vkadaba 5:0728bde67bdb 350 #define REG_CORE_CHANNEL_OPTIONS15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS15 */
Vkadaba 5:0728bde67bdb 351 #define REG_CORE_CHANNEL_OPTIONS0 0x00000091 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 352 #define REG_CORE_CHANNEL_OPTIONS1 0x000000D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 353 #define REG_CORE_CHANNEL_OPTIONS2 0x00000111 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 354 #define REG_CORE_CHANNEL_OPTIONS3 0x00000151 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 355 #define REG_CORE_CHANNEL_OPTIONS4 0x00000191 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 356 #define REG_CORE_CHANNEL_OPTIONS5 0x000001D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 357 #define REG_CORE_CHANNEL_OPTIONS6 0x00000211 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 358 #define REG_CORE_CHANNEL_OPTIONS7 0x00000251 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 359 #define REG_CORE_CHANNEL_OPTIONS8 0x00000291 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 360 #define REG_CORE_CHANNEL_OPTIONS9 0x000002D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 361 #define REG_CORE_CHANNEL_OPTIONS10 0x00000311 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 362 #define REG_CORE_CHANNEL_OPTIONS11 0x00000351 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 363 #define REG_CORE_CHANNEL_OPTIONS12 0x00000391 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 364 #define REG_CORE_CHANNEL_OPTIONS13 0x000003D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 365 #define REG_CORE_CHANNEL_OPTIONS14 0x00000411 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 366 #define REG_CORE_CHANNEL_OPTIONS15 0x00000451 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */
Vkadaba 5:0728bde67bdb 367 #define REG_CORE_CHANNEL_OPTIONSn(i) (REG_CORE_CHANNEL_OPTIONS0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 368 #define REG_CORE_CHANNEL_OPTIONSn_COUNT 16
Vkadaba 5:0728bde67bdb 369 #define REG_CORE_SENSOR_TYPEn_RESET 0x00000000 /* Reset Value for Sensor_Type[n] */
Vkadaba 5:0728bde67bdb 370 #define REG_CORE_SENSOR_TYPE0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE0 */
Vkadaba 5:0728bde67bdb 371 #define REG_CORE_SENSOR_TYPE1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE1 */
Vkadaba 5:0728bde67bdb 372 #define REG_CORE_SENSOR_TYPE2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE2 */
Vkadaba 5:0728bde67bdb 373 #define REG_CORE_SENSOR_TYPE3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE3 */
Vkadaba 5:0728bde67bdb 374 #define REG_CORE_SENSOR_TYPE4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE4 */
Vkadaba 5:0728bde67bdb 375 #define REG_CORE_SENSOR_TYPE5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE5 */
Vkadaba 5:0728bde67bdb 376 #define REG_CORE_SENSOR_TYPE6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE6 */
Vkadaba 5:0728bde67bdb 377 #define REG_CORE_SENSOR_TYPE7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE7 */
Vkadaba 5:0728bde67bdb 378 #define REG_CORE_SENSOR_TYPE8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE8 */
Vkadaba 5:0728bde67bdb 379 #define REG_CORE_SENSOR_TYPE9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE9 */
Vkadaba 5:0728bde67bdb 380 #define REG_CORE_SENSOR_TYPE10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE10 */
Vkadaba 5:0728bde67bdb 381 #define REG_CORE_SENSOR_TYPE11_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE11 */
Vkadaba 5:0728bde67bdb 382 #define REG_CORE_SENSOR_TYPE12_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE12 */
Vkadaba 5:0728bde67bdb 383 #define REG_CORE_SENSOR_TYPE13_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE13 */
Vkadaba 5:0728bde67bdb 384 #define REG_CORE_SENSOR_TYPE14_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE14 */
Vkadaba 5:0728bde67bdb 385 #define REG_CORE_SENSOR_TYPE15_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE15 */
Vkadaba 5:0728bde67bdb 386 #define REG_CORE_SENSOR_TYPE0 0x00000092 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 387 #define REG_CORE_SENSOR_TYPE1 0x000000D2 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 388 #define REG_CORE_SENSOR_TYPE2 0x00000112 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 389 #define REG_CORE_SENSOR_TYPE3 0x00000152 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 390 #define REG_CORE_SENSOR_TYPE4 0x00000192 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 391 #define REG_CORE_SENSOR_TYPE5 0x000001D2 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 392 #define REG_CORE_SENSOR_TYPE6 0x00000212 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 393 #define REG_CORE_SENSOR_TYPE7 0x00000252 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 394 #define REG_CORE_SENSOR_TYPE8 0x00000292 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 395 #define REG_CORE_SENSOR_TYPE9 0x000002D2 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 396 #define REG_CORE_SENSOR_TYPE10 0x00000312 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 397 #define REG_CORE_SENSOR_TYPE11 0x00000352 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 398 #define REG_CORE_SENSOR_TYPE12 0x00000392 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 399 #define REG_CORE_SENSOR_TYPE13 0x000003D2 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 400 #define REG_CORE_SENSOR_TYPE14 0x00000412 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 401 #define REG_CORE_SENSOR_TYPE15 0x00000452 /* ADMW_CORE Sensor Select */
Vkadaba 5:0728bde67bdb 402 #define REG_CORE_SENSOR_TYPEn(i) (REG_CORE_SENSOR_TYPE0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 403 #define REG_CORE_SENSOR_TYPEn_COUNT 16
Vkadaba 5:0728bde67bdb 404 #define REG_CORE_SENSOR_DETAILSn_RESET 0x0000FFF0 /* Reset Value for Sensor_Details[n] */
Vkadaba 5:0728bde67bdb 405 #define REG_CORE_SENSOR_DETAILS0_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS0 */
Vkadaba 5:0728bde67bdb 406 #define REG_CORE_SENSOR_DETAILS1_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS1 */
Vkadaba 5:0728bde67bdb 407 #define REG_CORE_SENSOR_DETAILS2_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS2 */
Vkadaba 5:0728bde67bdb 408 #define REG_CORE_SENSOR_DETAILS3_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS3 */
Vkadaba 5:0728bde67bdb 409 #define REG_CORE_SENSOR_DETAILS4_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS4 */
Vkadaba 5:0728bde67bdb 410 #define REG_CORE_SENSOR_DETAILS5_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS5 */
Vkadaba 5:0728bde67bdb 411 #define REG_CORE_SENSOR_DETAILS6_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS6 */
Vkadaba 5:0728bde67bdb 412 #define REG_CORE_SENSOR_DETAILS7_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS7 */
Vkadaba 5:0728bde67bdb 413 #define REG_CORE_SENSOR_DETAILS8_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS8 */
Vkadaba 5:0728bde67bdb 414 #define REG_CORE_SENSOR_DETAILS9_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS9 */
Vkadaba 5:0728bde67bdb 415 #define REG_CORE_SENSOR_DETAILS10_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS10 */
Vkadaba 5:0728bde67bdb 416 #define REG_CORE_SENSOR_DETAILS11_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS11 */
Vkadaba 5:0728bde67bdb 417 #define REG_CORE_SENSOR_DETAILS12_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS12 */
Vkadaba 5:0728bde67bdb 418 #define REG_CORE_SENSOR_DETAILS13_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS13 */
Vkadaba 5:0728bde67bdb 419 #define REG_CORE_SENSOR_DETAILS14_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS14 */
Vkadaba 5:0728bde67bdb 420 #define REG_CORE_SENSOR_DETAILS15_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS15 */
Vkadaba 5:0728bde67bdb 421 #define REG_CORE_SENSOR_DETAILS0 0x00000094 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 422 #define REG_CORE_SENSOR_DETAILS1 0x000000D4 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 423 #define REG_CORE_SENSOR_DETAILS2 0x00000114 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 424 #define REG_CORE_SENSOR_DETAILS3 0x00000154 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 425 #define REG_CORE_SENSOR_DETAILS4 0x00000194 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 426 #define REG_CORE_SENSOR_DETAILS5 0x000001D4 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 427 #define REG_CORE_SENSOR_DETAILS6 0x00000214 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 428 #define REG_CORE_SENSOR_DETAILS7 0x00000254 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 429 #define REG_CORE_SENSOR_DETAILS8 0x00000294 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 430 #define REG_CORE_SENSOR_DETAILS9 0x000002D4 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 431 #define REG_CORE_SENSOR_DETAILS10 0x00000314 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 432 #define REG_CORE_SENSOR_DETAILS11 0x00000354 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 433 #define REG_CORE_SENSOR_DETAILS12 0x00000394 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 434 #define REG_CORE_SENSOR_DETAILS13 0x000003D4 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 435 #define REG_CORE_SENSOR_DETAILS14 0x00000414 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 436 #define REG_CORE_SENSOR_DETAILS15 0x00000454 /* ADMW_CORE Sensor Details */
Vkadaba 5:0728bde67bdb 437 #define REG_CORE_SENSOR_DETAILSn(i) (REG_CORE_SENSOR_DETAILS0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 438 #define REG_CORE_SENSOR_DETAILSn_COUNT 16
Vkadaba 5:0728bde67bdb 439 #define REG_CORE_CHANNEL_EXCITATIONn_RESET 0x00000000 /* Reset Value for Channel_Excitation[n] */
Vkadaba 5:0728bde67bdb 440 #define REG_CORE_CHANNEL_EXCITATION0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION0 */
Vkadaba 5:0728bde67bdb 441 #define REG_CORE_CHANNEL_EXCITATION1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION1 */
Vkadaba 5:0728bde67bdb 442 #define REG_CORE_CHANNEL_EXCITATION2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION2 */
Vkadaba 5:0728bde67bdb 443 #define REG_CORE_CHANNEL_EXCITATION3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION3 */
Vkadaba 5:0728bde67bdb 444 #define REG_CORE_CHANNEL_EXCITATION4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION4 */
Vkadaba 5:0728bde67bdb 445 #define REG_CORE_CHANNEL_EXCITATION5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION5 */
Vkadaba 5:0728bde67bdb 446 #define REG_CORE_CHANNEL_EXCITATION6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION6 */
Vkadaba 5:0728bde67bdb 447 #define REG_CORE_CHANNEL_EXCITATION7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION7 */
Vkadaba 5:0728bde67bdb 448 #define REG_CORE_CHANNEL_EXCITATION8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION8 */
Vkadaba 5:0728bde67bdb 449 #define REG_CORE_CHANNEL_EXCITATION9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION9 */
Vkadaba 5:0728bde67bdb 450 #define REG_CORE_CHANNEL_EXCITATION10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION10 */
Vkadaba 5:0728bde67bdb 451 #define REG_CORE_CHANNEL_EXCITATION11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION11 */
Vkadaba 5:0728bde67bdb 452 #define REG_CORE_CHANNEL_EXCITATION12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION12 */
Vkadaba 5:0728bde67bdb 453 #define REG_CORE_CHANNEL_EXCITATION13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION13 */
Vkadaba 5:0728bde67bdb 454 #define REG_CORE_CHANNEL_EXCITATION14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION14 */
Vkadaba 5:0728bde67bdb 455 #define REG_CORE_CHANNEL_EXCITATION15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION15 */
Vkadaba 5:0728bde67bdb 456 #define REG_CORE_CHANNEL_EXCITATION0 0x00000098 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 457 #define REG_CORE_CHANNEL_EXCITATION1 0x000000D8 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 458 #define REG_CORE_CHANNEL_EXCITATION2 0x00000118 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 459 #define REG_CORE_CHANNEL_EXCITATION3 0x00000158 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 460 #define REG_CORE_CHANNEL_EXCITATION4 0x00000198 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 461 #define REG_CORE_CHANNEL_EXCITATION5 0x000001D8 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 462 #define REG_CORE_CHANNEL_EXCITATION6 0x00000218 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 463 #define REG_CORE_CHANNEL_EXCITATION7 0x00000258 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 464 #define REG_CORE_CHANNEL_EXCITATION8 0x00000298 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 465 #define REG_CORE_CHANNEL_EXCITATION9 0x000002D8 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 466 #define REG_CORE_CHANNEL_EXCITATION10 0x00000318 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 467 #define REG_CORE_CHANNEL_EXCITATION11 0x00000358 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 468 #define REG_CORE_CHANNEL_EXCITATION12 0x00000398 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 469 #define REG_CORE_CHANNEL_EXCITATION13 0x000003D8 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 470 #define REG_CORE_CHANNEL_EXCITATION14 0x00000418 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 471 #define REG_CORE_CHANNEL_EXCITATION15 0x00000458 /* ADMW_CORE Excitation Current */
Vkadaba 5:0728bde67bdb 472 #define REG_CORE_CHANNEL_EXCITATIONn(i) (REG_CORE_CHANNEL_EXCITATION0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 473 #define REG_CORE_CHANNEL_EXCITATIONn_COUNT 16
Vkadaba 5:0728bde67bdb 474 #define REG_CORE_SETTLING_TIMEn_RESET 0x00000000 /* Reset Value for Settling_Time[n] */
Vkadaba 5:0728bde67bdb 475 #define REG_CORE_SETTLING_TIME0_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME0 */
Vkadaba 5:0728bde67bdb 476 #define REG_CORE_SETTLING_TIME1_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME1 */
Vkadaba 5:0728bde67bdb 477 #define REG_CORE_SETTLING_TIME2_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME2 */
Vkadaba 5:0728bde67bdb 478 #define REG_CORE_SETTLING_TIME3_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME3 */
Vkadaba 5:0728bde67bdb 479 #define REG_CORE_SETTLING_TIME4_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME4 */
Vkadaba 5:0728bde67bdb 480 #define REG_CORE_SETTLING_TIME5_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME5 */
Vkadaba 5:0728bde67bdb 481 #define REG_CORE_SETTLING_TIME6_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME6 */
Vkadaba 5:0728bde67bdb 482 #define REG_CORE_SETTLING_TIME7_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME7 */
Vkadaba 5:0728bde67bdb 483 #define REG_CORE_SETTLING_TIME8_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME8 */
Vkadaba 5:0728bde67bdb 484 #define REG_CORE_SETTLING_TIME9_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME9 */
Vkadaba 5:0728bde67bdb 485 #define REG_CORE_SETTLING_TIME10_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME10 */
Vkadaba 5:0728bde67bdb 486 #define REG_CORE_SETTLING_TIME11_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME11 */
Vkadaba 5:0728bde67bdb 487 #define REG_CORE_SETTLING_TIME12_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME12 */
Vkadaba 5:0728bde67bdb 488 #define REG_CORE_SETTLING_TIME13_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME13 */
Vkadaba 5:0728bde67bdb 489 #define REG_CORE_SETTLING_TIME14_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME14 */
Vkadaba 5:0728bde67bdb 490 #define REG_CORE_SETTLING_TIME15_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME15 */
Vkadaba 5:0728bde67bdb 491 #define REG_CORE_SETTLING_TIME0 0x0000009A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 492 #define REG_CORE_SETTLING_TIME1 0x000000DA /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 493 #define REG_CORE_SETTLING_TIME2 0x0000011A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 494 #define REG_CORE_SETTLING_TIME3 0x0000015A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 495 #define REG_CORE_SETTLING_TIME4 0x0000019A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 496 #define REG_CORE_SETTLING_TIME5 0x000001DA /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 497 #define REG_CORE_SETTLING_TIME6 0x0000021A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 498 #define REG_CORE_SETTLING_TIME7 0x0000025A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 499 #define REG_CORE_SETTLING_TIME8 0x0000029A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 500 #define REG_CORE_SETTLING_TIME9 0x000002DA /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 501 #define REG_CORE_SETTLING_TIME10 0x0000031A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 502 #define REG_CORE_SETTLING_TIME11 0x0000035A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 503 #define REG_CORE_SETTLING_TIME12 0x0000039A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 504 #define REG_CORE_SETTLING_TIME13 0x000003DA /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 505 #define REG_CORE_SETTLING_TIME14 0x0000041A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 506 #define REG_CORE_SETTLING_TIME15 0x0000045A /* ADMW_CORE Settling Time */
Vkadaba 5:0728bde67bdb 507 #define REG_CORE_SETTLING_TIMEn(i) (REG_CORE_SETTLING_TIME0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 508 #define REG_CORE_SETTLING_TIMEn_COUNT 16
Vkadaba 5:0728bde67bdb 509 #define REG_CORE_FILTER_SELECTn_RESET 0x00000000 /* Reset Value for Filter_Select[n] */
Vkadaba 5:0728bde67bdb 510 #define REG_CORE_FILTER_SELECT0_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT0 */
Vkadaba 5:0728bde67bdb 511 #define REG_CORE_FILTER_SELECT1_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT1 */
Vkadaba 5:0728bde67bdb 512 #define REG_CORE_FILTER_SELECT2_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT2 */
Vkadaba 5:0728bde67bdb 513 #define REG_CORE_FILTER_SELECT3_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT3 */
Vkadaba 5:0728bde67bdb 514 #define REG_CORE_FILTER_SELECT4_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT4 */
Vkadaba 5:0728bde67bdb 515 #define REG_CORE_FILTER_SELECT5_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT5 */
Vkadaba 5:0728bde67bdb 516 #define REG_CORE_FILTER_SELECT6_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT6 */
Vkadaba 5:0728bde67bdb 517 #define REG_CORE_FILTER_SELECT7_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT7 */
Vkadaba 5:0728bde67bdb 518 #define REG_CORE_FILTER_SELECT8_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT8 */
Vkadaba 5:0728bde67bdb 519 #define REG_CORE_FILTER_SELECT9_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT9 */
Vkadaba 5:0728bde67bdb 520 #define REG_CORE_FILTER_SELECT10_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT10 */
Vkadaba 5:0728bde67bdb 521 #define REG_CORE_FILTER_SELECT11_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT11 */
Vkadaba 5:0728bde67bdb 522 #define REG_CORE_FILTER_SELECT12_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT12 */
Vkadaba 5:0728bde67bdb 523 #define REG_CORE_FILTER_SELECT13_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT13 */
Vkadaba 5:0728bde67bdb 524 #define REG_CORE_FILTER_SELECT14_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT14 */
Vkadaba 5:0728bde67bdb 525 #define REG_CORE_FILTER_SELECT15_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT15 */
Vkadaba 5:0728bde67bdb 526 #define REG_CORE_FILTER_SELECT0 0x0000009C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 527 #define REG_CORE_FILTER_SELECT1 0x000000DC /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 528 #define REG_CORE_FILTER_SELECT2 0x0000011C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 529 #define REG_CORE_FILTER_SELECT3 0x0000015C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 530 #define REG_CORE_FILTER_SELECT4 0x0000019C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 531 #define REG_CORE_FILTER_SELECT5 0x000001DC /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 532 #define REG_CORE_FILTER_SELECT6 0x0000021C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 533 #define REG_CORE_FILTER_SELECT7 0x0000025C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 534 #define REG_CORE_FILTER_SELECT8 0x0000029C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 535 #define REG_CORE_FILTER_SELECT9 0x000002DC /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 536 #define REG_CORE_FILTER_SELECT10 0x0000031C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 537 #define REG_CORE_FILTER_SELECT11 0x0000035C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 538 #define REG_CORE_FILTER_SELECT12 0x0000039C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 539 #define REG_CORE_FILTER_SELECT13 0x000003DC /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 540 #define REG_CORE_FILTER_SELECT14 0x0000041C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 541 #define REG_CORE_FILTER_SELECT15 0x0000045C /* ADMW_CORE ADC Digital Filter Selection */
Vkadaba 5:0728bde67bdb 542 #define REG_CORE_FILTER_SELECTn(i) (REG_CORE_FILTER_SELECT0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 543 #define REG_CORE_FILTER_SELECTn_COUNT 16
Vkadaba 5:0728bde67bdb 544 #define REG_CORE_HIGH_THRESHOLD_LIMITn_RESET 0x7F800000 /* Reset Value for High_Threshold_Limit[n] */
Vkadaba 5:0728bde67bdb 545 #define REG_CORE_HIGH_THRESHOLD_LIMIT0_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT0 */
Vkadaba 5:0728bde67bdb 546 #define REG_CORE_HIGH_THRESHOLD_LIMIT1_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT1 */
Vkadaba 5:0728bde67bdb 547 #define REG_CORE_HIGH_THRESHOLD_LIMIT2_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT2 */
Vkadaba 5:0728bde67bdb 548 #define REG_CORE_HIGH_THRESHOLD_LIMIT3_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT3 */
Vkadaba 5:0728bde67bdb 549 #define REG_CORE_HIGH_THRESHOLD_LIMIT4_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT4 */
Vkadaba 5:0728bde67bdb 550 #define REG_CORE_HIGH_THRESHOLD_LIMIT5_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT5 */
Vkadaba 5:0728bde67bdb 551 #define REG_CORE_HIGH_THRESHOLD_LIMIT6_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT6 */
Vkadaba 5:0728bde67bdb 552 #define REG_CORE_HIGH_THRESHOLD_LIMIT7_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT7 */
Vkadaba 5:0728bde67bdb 553 #define REG_CORE_HIGH_THRESHOLD_LIMIT8_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT8 */
Vkadaba 5:0728bde67bdb 554 #define REG_CORE_HIGH_THRESHOLD_LIMIT9_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT9 */
Vkadaba 5:0728bde67bdb 555 #define REG_CORE_HIGH_THRESHOLD_LIMIT10_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT10 */
Vkadaba 5:0728bde67bdb 556 #define REG_CORE_HIGH_THRESHOLD_LIMIT11_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT11 */
Vkadaba 5:0728bde67bdb 557 #define REG_CORE_HIGH_THRESHOLD_LIMIT12_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT12 */
Vkadaba 5:0728bde67bdb 558 #define REG_CORE_HIGH_THRESHOLD_LIMIT13_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT13 */
Vkadaba 5:0728bde67bdb 559 #define REG_CORE_HIGH_THRESHOLD_LIMIT14_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT14 */
Vkadaba 5:0728bde67bdb 560 #define REG_CORE_HIGH_THRESHOLD_LIMIT15_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT15 */
Vkadaba 5:0728bde67bdb 561 #define REG_CORE_HIGH_THRESHOLD_LIMIT0 0x000000A0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 562 #define REG_CORE_HIGH_THRESHOLD_LIMIT1 0x000000E0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 563 #define REG_CORE_HIGH_THRESHOLD_LIMIT2 0x00000120 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 564 #define REG_CORE_HIGH_THRESHOLD_LIMIT3 0x00000160 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 565 #define REG_CORE_HIGH_THRESHOLD_LIMIT4 0x000001A0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 566 #define REG_CORE_HIGH_THRESHOLD_LIMIT5 0x000001E0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 567 #define REG_CORE_HIGH_THRESHOLD_LIMIT6 0x00000220 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 568 #define REG_CORE_HIGH_THRESHOLD_LIMIT7 0x00000260 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 569 #define REG_CORE_HIGH_THRESHOLD_LIMIT8 0x000002A0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 570 #define REG_CORE_HIGH_THRESHOLD_LIMIT9 0x000002E0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 571 #define REG_CORE_HIGH_THRESHOLD_LIMIT10 0x00000320 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 572 #define REG_CORE_HIGH_THRESHOLD_LIMIT11 0x00000360 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 573 #define REG_CORE_HIGH_THRESHOLD_LIMIT12 0x000003A0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 574 #define REG_CORE_HIGH_THRESHOLD_LIMIT13 0x000003E0 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 575 #define REG_CORE_HIGH_THRESHOLD_LIMIT14 0x00000420 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 576 #define REG_CORE_HIGH_THRESHOLD_LIMIT15 0x00000460 /* ADMW_CORE High Threshold */
Vkadaba 5:0728bde67bdb 577 #define REG_CORE_HIGH_THRESHOLD_LIMITn(i) (REG_CORE_HIGH_THRESHOLD_LIMIT0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 578 #define REG_CORE_HIGH_THRESHOLD_LIMITn_COUNT 16
Vkadaba 5:0728bde67bdb 579 #define REG_CORE_LOW_THRESHOLD_LIMITn_RESET 0xFF800000 /* Reset Value for Low_Threshold_Limit[n] */
Vkadaba 5:0728bde67bdb 580 #define REG_CORE_LOW_THRESHOLD_LIMIT0_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT0 */
Vkadaba 5:0728bde67bdb 581 #define REG_CORE_LOW_THRESHOLD_LIMIT1_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT1 */
Vkadaba 5:0728bde67bdb 582 #define REG_CORE_LOW_THRESHOLD_LIMIT2_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT2 */
Vkadaba 5:0728bde67bdb 583 #define REG_CORE_LOW_THRESHOLD_LIMIT3_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT3 */
Vkadaba 5:0728bde67bdb 584 #define REG_CORE_LOW_THRESHOLD_LIMIT4_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT4 */
Vkadaba 5:0728bde67bdb 585 #define REG_CORE_LOW_THRESHOLD_LIMIT5_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT5 */
Vkadaba 5:0728bde67bdb 586 #define REG_CORE_LOW_THRESHOLD_LIMIT6_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT6 */
Vkadaba 5:0728bde67bdb 587 #define REG_CORE_LOW_THRESHOLD_LIMIT7_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT7 */
Vkadaba 5:0728bde67bdb 588 #define REG_CORE_LOW_THRESHOLD_LIMIT8_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT8 */
Vkadaba 5:0728bde67bdb 589 #define REG_CORE_LOW_THRESHOLD_LIMIT9_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT9 */
Vkadaba 5:0728bde67bdb 590 #define REG_CORE_LOW_THRESHOLD_LIMIT10_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT10 */
Vkadaba 5:0728bde67bdb 591 #define REG_CORE_LOW_THRESHOLD_LIMIT11_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT11 */
Vkadaba 5:0728bde67bdb 592 #define REG_CORE_LOW_THRESHOLD_LIMIT12_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT12 */
Vkadaba 5:0728bde67bdb 593 #define REG_CORE_LOW_THRESHOLD_LIMIT13_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT13 */
Vkadaba 5:0728bde67bdb 594 #define REG_CORE_LOW_THRESHOLD_LIMIT14_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT14 */
Vkadaba 5:0728bde67bdb 595 #define REG_CORE_LOW_THRESHOLD_LIMIT15_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT15 */
Vkadaba 5:0728bde67bdb 596 #define REG_CORE_LOW_THRESHOLD_LIMIT0 0x000000A4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 597 #define REG_CORE_LOW_THRESHOLD_LIMIT1 0x000000E4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 598 #define REG_CORE_LOW_THRESHOLD_LIMIT2 0x00000124 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 599 #define REG_CORE_LOW_THRESHOLD_LIMIT3 0x00000164 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 600 #define REG_CORE_LOW_THRESHOLD_LIMIT4 0x000001A4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 601 #define REG_CORE_LOW_THRESHOLD_LIMIT5 0x000001E4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 602 #define REG_CORE_LOW_THRESHOLD_LIMIT6 0x00000224 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 603 #define REG_CORE_LOW_THRESHOLD_LIMIT7 0x00000264 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 604 #define REG_CORE_LOW_THRESHOLD_LIMIT8 0x000002A4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 605 #define REG_CORE_LOW_THRESHOLD_LIMIT9 0x000002E4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 606 #define REG_CORE_LOW_THRESHOLD_LIMIT10 0x00000324 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 607 #define REG_CORE_LOW_THRESHOLD_LIMIT11 0x00000364 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 608 #define REG_CORE_LOW_THRESHOLD_LIMIT12 0x000003A4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 609 #define REG_CORE_LOW_THRESHOLD_LIMIT13 0x000003E4 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 610 #define REG_CORE_LOW_THRESHOLD_LIMIT14 0x00000424 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 611 #define REG_CORE_LOW_THRESHOLD_LIMIT15 0x00000464 /* ADMW_CORE Low Threshold */
Vkadaba 5:0728bde67bdb 612 #define REG_CORE_LOW_THRESHOLD_LIMITn(i) (REG_CORE_LOW_THRESHOLD_LIMIT0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 613 #define REG_CORE_LOW_THRESHOLD_LIMITn_COUNT 16
Vkadaba 5:0728bde67bdb 614 #define REG_CORE_SENSOR_OFFSETn_RESET 0x00000000 /* Reset Value for Sensor_Offset[n] */
Vkadaba 5:0728bde67bdb 615 #define REG_CORE_SENSOR_OFFSET0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET0 */
Vkadaba 5:0728bde67bdb 616 #define REG_CORE_SENSOR_OFFSET1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET1 */
Vkadaba 5:0728bde67bdb 617 #define REG_CORE_SENSOR_OFFSET2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET2 */
Vkadaba 5:0728bde67bdb 618 #define REG_CORE_SENSOR_OFFSET3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET3 */
Vkadaba 5:0728bde67bdb 619 #define REG_CORE_SENSOR_OFFSET4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET4 */
Vkadaba 5:0728bde67bdb 620 #define REG_CORE_SENSOR_OFFSET5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET5 */
Vkadaba 5:0728bde67bdb 621 #define REG_CORE_SENSOR_OFFSET6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET6 */
Vkadaba 5:0728bde67bdb 622 #define REG_CORE_SENSOR_OFFSET7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET7 */
Vkadaba 5:0728bde67bdb 623 #define REG_CORE_SENSOR_OFFSET8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET8 */
Vkadaba 5:0728bde67bdb 624 #define REG_CORE_SENSOR_OFFSET9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET9 */
Vkadaba 5:0728bde67bdb 625 #define REG_CORE_SENSOR_OFFSET10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET10 */
Vkadaba 5:0728bde67bdb 626 #define REG_CORE_SENSOR_OFFSET11_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET11 */
Vkadaba 5:0728bde67bdb 627 #define REG_CORE_SENSOR_OFFSET12_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET12 */
Vkadaba 5:0728bde67bdb 628 #define REG_CORE_SENSOR_OFFSET13_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET13 */
Vkadaba 5:0728bde67bdb 629 #define REG_CORE_SENSOR_OFFSET14_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET14 */
Vkadaba 5:0728bde67bdb 630 #define REG_CORE_SENSOR_OFFSET15_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET15 */
Vkadaba 5:0728bde67bdb 631 #define REG_CORE_SENSOR_OFFSET0 0x000000A8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 632 #define REG_CORE_SENSOR_OFFSET1 0x000000E8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 633 #define REG_CORE_SENSOR_OFFSET2 0x00000128 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 634 #define REG_CORE_SENSOR_OFFSET3 0x00000168 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 635 #define REG_CORE_SENSOR_OFFSET4 0x000001A8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 636 #define REG_CORE_SENSOR_OFFSET5 0x000001E8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 637 #define REG_CORE_SENSOR_OFFSET6 0x00000228 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 638 #define REG_CORE_SENSOR_OFFSET7 0x00000268 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 639 #define REG_CORE_SENSOR_OFFSET8 0x000002A8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 640 #define REG_CORE_SENSOR_OFFSET9 0x000002E8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 641 #define REG_CORE_SENSOR_OFFSET10 0x00000328 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 642 #define REG_CORE_SENSOR_OFFSET11 0x00000368 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 643 #define REG_CORE_SENSOR_OFFSET12 0x000003A8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 644 #define REG_CORE_SENSOR_OFFSET13 0x000003E8 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 645 #define REG_CORE_SENSOR_OFFSET14 0x00000428 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 646 #define REG_CORE_SENSOR_OFFSET15 0x00000468 /* ADMW_CORE Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 647 #define REG_CORE_SENSOR_OFFSETn(i) (REG_CORE_SENSOR_OFFSET0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 648 #define REG_CORE_SENSOR_OFFSETn_COUNT 16
Vkadaba 5:0728bde67bdb 649 #define REG_CORE_SENSOR_GAINn_RESET 0x3F800000 /* Reset Value for Sensor_Gain[n] */
Vkadaba 5:0728bde67bdb 650 #define REG_CORE_SENSOR_GAIN0_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN0 */
Vkadaba 5:0728bde67bdb 651 #define REG_CORE_SENSOR_GAIN1_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN1 */
Vkadaba 5:0728bde67bdb 652 #define REG_CORE_SENSOR_GAIN2_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN2 */
Vkadaba 5:0728bde67bdb 653 #define REG_CORE_SENSOR_GAIN3_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN3 */
Vkadaba 5:0728bde67bdb 654 #define REG_CORE_SENSOR_GAIN4_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN4 */
Vkadaba 5:0728bde67bdb 655 #define REG_CORE_SENSOR_GAIN5_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN5 */
Vkadaba 5:0728bde67bdb 656 #define REG_CORE_SENSOR_GAIN6_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN6 */
Vkadaba 5:0728bde67bdb 657 #define REG_CORE_SENSOR_GAIN7_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN7 */
Vkadaba 5:0728bde67bdb 658 #define REG_CORE_SENSOR_GAIN8_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN8 */
Vkadaba 5:0728bde67bdb 659 #define REG_CORE_SENSOR_GAIN9_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN9 */
Vkadaba 5:0728bde67bdb 660 #define REG_CORE_SENSOR_GAIN10_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN10 */
Vkadaba 5:0728bde67bdb 661 #define REG_CORE_SENSOR_GAIN11_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN11 */
Vkadaba 5:0728bde67bdb 662 #define REG_CORE_SENSOR_GAIN12_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN12 */
Vkadaba 5:0728bde67bdb 663 #define REG_CORE_SENSOR_GAIN13_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN13 */
Vkadaba 5:0728bde67bdb 664 #define REG_CORE_SENSOR_GAIN14_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN14 */
Vkadaba 5:0728bde67bdb 665 #define REG_CORE_SENSOR_GAIN15_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN15 */
Vkadaba 5:0728bde67bdb 666 #define REG_CORE_SENSOR_GAIN0 0x000000AC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 667 #define REG_CORE_SENSOR_GAIN1 0x000000EC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 668 #define REG_CORE_SENSOR_GAIN2 0x0000012C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 669 #define REG_CORE_SENSOR_GAIN3 0x0000016C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 670 #define REG_CORE_SENSOR_GAIN4 0x000001AC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 671 #define REG_CORE_SENSOR_GAIN5 0x000001EC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 672 #define REG_CORE_SENSOR_GAIN6 0x0000022C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 673 #define REG_CORE_SENSOR_GAIN7 0x0000026C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 674 #define REG_CORE_SENSOR_GAIN8 0x000002AC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 675 #define REG_CORE_SENSOR_GAIN9 0x000002EC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 676 #define REG_CORE_SENSOR_GAIN10 0x0000032C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 677 #define REG_CORE_SENSOR_GAIN11 0x0000036C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 678 #define REG_CORE_SENSOR_GAIN12 0x000003AC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 679 #define REG_CORE_SENSOR_GAIN13 0x000003EC /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 680 #define REG_CORE_SENSOR_GAIN14 0x0000042C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 681 #define REG_CORE_SENSOR_GAIN15 0x0000046C /* ADMW_CORE Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 682 #define REG_CORE_SENSOR_GAINn(i) (REG_CORE_SENSOR_GAIN0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 683 #define REG_CORE_SENSOR_GAINn_COUNT 16
Vkadaba 5:0728bde67bdb 684 #define REG_CORE_ALERT_CODE_CHn_RESET 0x00000000 /* Reset Value for Alert_Code_Ch[n] */
Vkadaba 5:0728bde67bdb 685 #define REG_CORE_ALERT_CODE_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH0 */
Vkadaba 5:0728bde67bdb 686 #define REG_CORE_ALERT_CODE_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH1 */
Vkadaba 5:0728bde67bdb 687 #define REG_CORE_ALERT_CODE_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH2 */
Vkadaba 5:0728bde67bdb 688 #define REG_CORE_ALERT_CODE_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH3 */
Vkadaba 5:0728bde67bdb 689 #define REG_CORE_ALERT_CODE_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH4 */
Vkadaba 5:0728bde67bdb 690 #define REG_CORE_ALERT_CODE_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH5 */
Vkadaba 5:0728bde67bdb 691 #define REG_CORE_ALERT_CODE_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH6 */
Vkadaba 5:0728bde67bdb 692 #define REG_CORE_ALERT_CODE_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH7 */
Vkadaba 5:0728bde67bdb 693 #define REG_CORE_ALERT_CODE_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH8 */
Vkadaba 5:0728bde67bdb 694 #define REG_CORE_ALERT_CODE_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH9 */
Vkadaba 5:0728bde67bdb 695 #define REG_CORE_ALERT_CODE_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH10 */
Vkadaba 5:0728bde67bdb 696 #define REG_CORE_ALERT_CODE_CH11_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH11 */
Vkadaba 5:0728bde67bdb 697 #define REG_CORE_ALERT_CODE_CH12_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH12 */
Vkadaba 5:0728bde67bdb 698 #define REG_CORE_ALERT_CODE_CH13_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH13 */
Vkadaba 5:0728bde67bdb 699 #define REG_CORE_ALERT_CODE_CH14_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH14 */
Vkadaba 5:0728bde67bdb 700 #define REG_CORE_ALERT_CODE_CH15_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH15 */
Vkadaba 5:0728bde67bdb 701 #define REG_CORE_ALERT_CODE_CH0 0x000000B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 702 #define REG_CORE_ALERT_CODE_CH1 0x000000F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 703 #define REG_CORE_ALERT_CODE_CH2 0x00000130 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 704 #define REG_CORE_ALERT_CODE_CH3 0x00000170 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 705 #define REG_CORE_ALERT_CODE_CH4 0x000001B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 706 #define REG_CORE_ALERT_CODE_CH5 0x000001F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 707 #define REG_CORE_ALERT_CODE_CH6 0x00000230 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 708 #define REG_CORE_ALERT_CODE_CH7 0x00000270 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 709 #define REG_CORE_ALERT_CODE_CH8 0x000002B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 710 #define REG_CORE_ALERT_CODE_CH9 0x000002F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 711 #define REG_CORE_ALERT_CODE_CH10 0x00000330 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 712 #define REG_CORE_ALERT_CODE_CH11 0x00000370 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 713 #define REG_CORE_ALERT_CODE_CH12 0x000003B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 714 #define REG_CORE_ALERT_CODE_CH13 0x000003F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 715 #define REG_CORE_ALERT_CODE_CH14 0x00000430 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 716 #define REG_CORE_ALERT_CODE_CH15 0x00000470 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */
Vkadaba 5:0728bde67bdb 717 #define REG_CORE_ALERT_CODE_CHn(i) (REG_CORE_ALERT_CODE_CH0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 718 #define REG_CORE_ALERT_CODE_CHn_COUNT 16
Vkadaba 5:0728bde67bdb 719 #define REG_CORE_CHANNEL_SKIPn_RESET 0x00000000 /* Reset Value for Channel_Skip[n] */
Vkadaba 5:0728bde67bdb 720 #define REG_CORE_CHANNEL_SKIP0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP0 */
Vkadaba 5:0728bde67bdb 721 #define REG_CORE_CHANNEL_SKIP1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP1 */
Vkadaba 5:0728bde67bdb 722 #define REG_CORE_CHANNEL_SKIP2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP2 */
Vkadaba 5:0728bde67bdb 723 #define REG_CORE_CHANNEL_SKIP3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP3 */
Vkadaba 5:0728bde67bdb 724 #define REG_CORE_CHANNEL_SKIP4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP4 */
Vkadaba 5:0728bde67bdb 725 #define REG_CORE_CHANNEL_SKIP5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP5 */
Vkadaba 5:0728bde67bdb 726 #define REG_CORE_CHANNEL_SKIP6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP6 */
Vkadaba 5:0728bde67bdb 727 #define REG_CORE_CHANNEL_SKIP7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP7 */
Vkadaba 5:0728bde67bdb 728 #define REG_CORE_CHANNEL_SKIP8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP8 */
Vkadaba 5:0728bde67bdb 729 #define REG_CORE_CHANNEL_SKIP9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP9 */
Vkadaba 5:0728bde67bdb 730 #define REG_CORE_CHANNEL_SKIP10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP10 */
Vkadaba 5:0728bde67bdb 731 #define REG_CORE_CHANNEL_SKIP11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP11 */
Vkadaba 5:0728bde67bdb 732 #define REG_CORE_CHANNEL_SKIP12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP12 */
Vkadaba 5:0728bde67bdb 733 #define REG_CORE_CHANNEL_SKIP13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP13 */
Vkadaba 5:0728bde67bdb 734 #define REG_CORE_CHANNEL_SKIP14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP14 */
Vkadaba 5:0728bde67bdb 735 #define REG_CORE_CHANNEL_SKIP15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP15 */
Vkadaba 5:0728bde67bdb 736 #define REG_CORE_CHANNEL_SKIP0 0x000000B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 737 #define REG_CORE_CHANNEL_SKIP1 0x000000F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 738 #define REG_CORE_CHANNEL_SKIP2 0x00000132 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 739 #define REG_CORE_CHANNEL_SKIP3 0x00000172 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 740 #define REG_CORE_CHANNEL_SKIP4 0x000001B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 741 #define REG_CORE_CHANNEL_SKIP5 0x000001F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 742 #define REG_CORE_CHANNEL_SKIP6 0x00000232 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 743 #define REG_CORE_CHANNEL_SKIP7 0x00000272 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 744 #define REG_CORE_CHANNEL_SKIP8 0x000002B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 745 #define REG_CORE_CHANNEL_SKIP9 0x000002F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 746 #define REG_CORE_CHANNEL_SKIP10 0x00000332 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 747 #define REG_CORE_CHANNEL_SKIP11 0x00000372 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 748 #define REG_CORE_CHANNEL_SKIP12 0x000003B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 749 #define REG_CORE_CHANNEL_SKIP13 0x000003F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 750 #define REG_CORE_CHANNEL_SKIP14 0x00000432 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 751 #define REG_CORE_CHANNEL_SKIP15 0x00000472 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 752 #define REG_CORE_CHANNEL_SKIPn(i) (REG_CORE_CHANNEL_SKIP0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 753 #define REG_CORE_CHANNEL_SKIPn_COUNT 16
Vkadaba 5:0728bde67bdb 754 #define REG_CORE_SENSOR_PARAMETERn_RESET 0x7FC00000 /* Reset Value for Sensor_Parameter[n] */
Vkadaba 5:0728bde67bdb 755 #define REG_CORE_SENSOR_PARAMETER0_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER0 */
Vkadaba 5:0728bde67bdb 756 #define REG_CORE_SENSOR_PARAMETER1_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER1 */
Vkadaba 5:0728bde67bdb 757 #define REG_CORE_SENSOR_PARAMETER2_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER2 */
Vkadaba 5:0728bde67bdb 758 #define REG_CORE_SENSOR_PARAMETER3_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER3 */
Vkadaba 5:0728bde67bdb 759 #define REG_CORE_SENSOR_PARAMETER4_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER4 */
Vkadaba 5:0728bde67bdb 760 #define REG_CORE_SENSOR_PARAMETER5_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER5 */
Vkadaba 5:0728bde67bdb 761 #define REG_CORE_SENSOR_PARAMETER6_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER6 */
Vkadaba 5:0728bde67bdb 762 #define REG_CORE_SENSOR_PARAMETER7_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER7 */
Vkadaba 5:0728bde67bdb 763 #define REG_CORE_SENSOR_PARAMETER8_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER8 */
Vkadaba 5:0728bde67bdb 764 #define REG_CORE_SENSOR_PARAMETER9_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER9 */
Vkadaba 5:0728bde67bdb 765 #define REG_CORE_SENSOR_PARAMETER10_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER10 */
Vkadaba 5:0728bde67bdb 766 #define REG_CORE_SENSOR_PARAMETER11_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER11 */
Vkadaba 5:0728bde67bdb 767 #define REG_CORE_SENSOR_PARAMETER12_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER12 */
Vkadaba 5:0728bde67bdb 768 #define REG_CORE_SENSOR_PARAMETER13_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER13 */
Vkadaba 5:0728bde67bdb 769 #define REG_CORE_SENSOR_PARAMETER14_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER14 */
Vkadaba 5:0728bde67bdb 770 #define REG_CORE_SENSOR_PARAMETER15_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER15 */
Vkadaba 5:0728bde67bdb 771 #define REG_CORE_SENSOR_PARAMETER0 0x000000B4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 772 #define REG_CORE_SENSOR_PARAMETER1 0x000000F4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 773 #define REG_CORE_SENSOR_PARAMETER2 0x00000134 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 774 #define REG_CORE_SENSOR_PARAMETER3 0x00000174 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 775 #define REG_CORE_SENSOR_PARAMETER4 0x000001B4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 776 #define REG_CORE_SENSOR_PARAMETER5 0x000001F4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 777 #define REG_CORE_SENSOR_PARAMETER6 0x00000234 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 778 #define REG_CORE_SENSOR_PARAMETER7 0x00000274 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 779 #define REG_CORE_SENSOR_PARAMETER8 0x000002B4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 780 #define REG_CORE_SENSOR_PARAMETER9 0x000002F4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 781 #define REG_CORE_SENSOR_PARAMETER10 0x00000334 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 782 #define REG_CORE_SENSOR_PARAMETER11 0x00000374 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 783 #define REG_CORE_SENSOR_PARAMETER12 0x000003B4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 784 #define REG_CORE_SENSOR_PARAMETER13 0x000003F4 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 785 #define REG_CORE_SENSOR_PARAMETER14 0x00000434 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 786 #define REG_CORE_SENSOR_PARAMETER15 0x00000474 /* ADMW_CORE Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 787 #define REG_CORE_SENSOR_PARAMETERn(i) (REG_CORE_SENSOR_PARAMETER0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 788 #define REG_CORE_SENSOR_PARAMETERn_COUNT 16
Vkadaba 5:0728bde67bdb 789 #define REG_CORE_CALIBRATION_PARAMETERn_RESET 0x00000000 /* Reset Value for Calibration_Parameter[n] */
Vkadaba 5:0728bde67bdb 790 #define REG_CORE_CALIBRATION_PARAMETER0_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER0 */
Vkadaba 5:0728bde67bdb 791 #define REG_CORE_CALIBRATION_PARAMETER1_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER1 */
Vkadaba 5:0728bde67bdb 792 #define REG_CORE_CALIBRATION_PARAMETER2_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER2 */
Vkadaba 5:0728bde67bdb 793 #define REG_CORE_CALIBRATION_PARAMETER3_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER3 */
Vkadaba 5:0728bde67bdb 794 #define REG_CORE_CALIBRATION_PARAMETER4_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER4 */
Vkadaba 5:0728bde67bdb 795 #define REG_CORE_CALIBRATION_PARAMETER5_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER5 */
Vkadaba 5:0728bde67bdb 796 #define REG_CORE_CALIBRATION_PARAMETER6_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER6 */
Vkadaba 5:0728bde67bdb 797 #define REG_CORE_CALIBRATION_PARAMETER7_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER7 */
Vkadaba 5:0728bde67bdb 798 #define REG_CORE_CALIBRATION_PARAMETER8_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER8 */
Vkadaba 5:0728bde67bdb 799 #define REG_CORE_CALIBRATION_PARAMETER9_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER9 */
Vkadaba 5:0728bde67bdb 800 #define REG_CORE_CALIBRATION_PARAMETER10_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER10 */
Vkadaba 5:0728bde67bdb 801 #define REG_CORE_CALIBRATION_PARAMETER11_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER11 */
Vkadaba 5:0728bde67bdb 802 #define REG_CORE_CALIBRATION_PARAMETER12_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER12 */
Vkadaba 5:0728bde67bdb 803 #define REG_CORE_CALIBRATION_PARAMETER13_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER13 */
Vkadaba 5:0728bde67bdb 804 #define REG_CORE_CALIBRATION_PARAMETER14_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER14 */
Vkadaba 5:0728bde67bdb 805 #define REG_CORE_CALIBRATION_PARAMETER15_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER15 */
Vkadaba 5:0728bde67bdb 806 #define REG_CORE_CALIBRATION_PARAMETER0 0x000000B8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 807 #define REG_CORE_CALIBRATION_PARAMETER1 0x000000F8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 808 #define REG_CORE_CALIBRATION_PARAMETER2 0x00000138 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 809 #define REG_CORE_CALIBRATION_PARAMETER3 0x00000178 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 810 #define REG_CORE_CALIBRATION_PARAMETER4 0x000001B8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 811 #define REG_CORE_CALIBRATION_PARAMETER5 0x000001F8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 812 #define REG_CORE_CALIBRATION_PARAMETER6 0x00000238 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 813 #define REG_CORE_CALIBRATION_PARAMETER7 0x00000278 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 814 #define REG_CORE_CALIBRATION_PARAMETER8 0x000002B8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 815 #define REG_CORE_CALIBRATION_PARAMETER9 0x000002F8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 816 #define REG_CORE_CALIBRATION_PARAMETER10 0x00000338 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 817 #define REG_CORE_CALIBRATION_PARAMETER11 0x00000378 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 818 #define REG_CORE_CALIBRATION_PARAMETER12 0x000003B8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 819 #define REG_CORE_CALIBRATION_PARAMETER13 0x000003F8 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 820 #define REG_CORE_CALIBRATION_PARAMETER14 0x00000438 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 821 #define REG_CORE_CALIBRATION_PARAMETER15 0x00000478 /* ADMW_CORE Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 822 #define REG_CORE_CALIBRATION_PARAMETERn(i) (REG_CORE_CALIBRATION_PARAMETER0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 823 #define REG_CORE_CALIBRATION_PARAMETERn_COUNT 16
Vkadaba 5:0728bde67bdb 824 #define REG_CORE_DIGITAL_SENSOR_CONFIGn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Config[n] */
Vkadaba 5:0728bde67bdb 825 #define REG_CORE_DIGITAL_SENSOR_CONFIG0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG0 */
Vkadaba 5:0728bde67bdb 826 #define REG_CORE_DIGITAL_SENSOR_CONFIG1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG1 */
Vkadaba 5:0728bde67bdb 827 #define REG_CORE_DIGITAL_SENSOR_CONFIG2_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG2 */
Vkadaba 5:0728bde67bdb 828 #define REG_CORE_DIGITAL_SENSOR_CONFIG3_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG3 */
Vkadaba 5:0728bde67bdb 829 #define REG_CORE_DIGITAL_SENSOR_CONFIG4_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG4 */
Vkadaba 5:0728bde67bdb 830 #define REG_CORE_DIGITAL_SENSOR_CONFIG5_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG5 */
Vkadaba 5:0728bde67bdb 831 #define REG_CORE_DIGITAL_SENSOR_CONFIG6_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG6 */
Vkadaba 5:0728bde67bdb 832 #define REG_CORE_DIGITAL_SENSOR_CONFIG7_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG7 */
Vkadaba 5:0728bde67bdb 833 #define REG_CORE_DIGITAL_SENSOR_CONFIG8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG8 */
Vkadaba 5:0728bde67bdb 834 #define REG_CORE_DIGITAL_SENSOR_CONFIG9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG9 */
Vkadaba 5:0728bde67bdb 835 #define REG_CORE_DIGITAL_SENSOR_CONFIG10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG10 */
Vkadaba 5:0728bde67bdb 836 #define REG_CORE_DIGITAL_SENSOR_CONFIG11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG11 */
Vkadaba 5:0728bde67bdb 837 #define REG_CORE_DIGITAL_SENSOR_CONFIG12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG12 */
Vkadaba 5:0728bde67bdb 838 #define REG_CORE_DIGITAL_SENSOR_CONFIG13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG13 */
Vkadaba 5:0728bde67bdb 839 #define REG_CORE_DIGITAL_SENSOR_CONFIG14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG14 */
Vkadaba 5:0728bde67bdb 840 #define REG_CORE_DIGITAL_SENSOR_CONFIG15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG15 */
Vkadaba 5:0728bde67bdb 841 #define REG_CORE_DIGITAL_SENSOR_CONFIG0 0x000000BC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 842 #define REG_CORE_DIGITAL_SENSOR_CONFIG1 0x000000FC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 843 #define REG_CORE_DIGITAL_SENSOR_CONFIG2 0x0000013C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 844 #define REG_CORE_DIGITAL_SENSOR_CONFIG3 0x0000017C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 845 #define REG_CORE_DIGITAL_SENSOR_CONFIG4 0x000001BC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 846 #define REG_CORE_DIGITAL_SENSOR_CONFIG5 0x000001FC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 847 #define REG_CORE_DIGITAL_SENSOR_CONFIG6 0x0000023C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 848 #define REG_CORE_DIGITAL_SENSOR_CONFIG7 0x0000027C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 849 #define REG_CORE_DIGITAL_SENSOR_CONFIG8 0x000002BC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 850 #define REG_CORE_DIGITAL_SENSOR_CONFIG9 0x000002FC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 851 #define REG_CORE_DIGITAL_SENSOR_CONFIG10 0x0000033C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 852 #define REG_CORE_DIGITAL_SENSOR_CONFIG11 0x0000037C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 853 #define REG_CORE_DIGITAL_SENSOR_CONFIG12 0x000003BC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 854 #define REG_CORE_DIGITAL_SENSOR_CONFIG13 0x000003FC /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 855 #define REG_CORE_DIGITAL_SENSOR_CONFIG14 0x0000043C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 856 #define REG_CORE_DIGITAL_SENSOR_CONFIG15 0x0000047C /* ADMW_CORE Digital Sensor Data Coding */
Vkadaba 5:0728bde67bdb 857 #define REG_CORE_DIGITAL_SENSOR_CONFIGn(i) (REG_CORE_DIGITAL_SENSOR_CONFIG0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 858 #define REG_CORE_DIGITAL_SENSOR_CONFIGn_COUNT 16
Vkadaba 5:0728bde67bdb 859 #define REG_CORE_DIGITAL_SENSOR_ADDRESSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Address[n] */
Vkadaba 5:0728bde67bdb 860 #define REG_CORE_DIGITAL_SENSOR_ADDRESS0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS0 */
Vkadaba 5:0728bde67bdb 861 #define REG_CORE_DIGITAL_SENSOR_ADDRESS1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS1 */
Vkadaba 5:0728bde67bdb 862 #define REG_CORE_DIGITAL_SENSOR_ADDRESS2_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS2 */
Vkadaba 5:0728bde67bdb 863 #define REG_CORE_DIGITAL_SENSOR_ADDRESS3_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS3 */
Vkadaba 5:0728bde67bdb 864 #define REG_CORE_DIGITAL_SENSOR_ADDRESS4_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS4 */
Vkadaba 5:0728bde67bdb 865 #define REG_CORE_DIGITAL_SENSOR_ADDRESS5_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS5 */
Vkadaba 5:0728bde67bdb 866 #define REG_CORE_DIGITAL_SENSOR_ADDRESS6_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS6 */
Vkadaba 5:0728bde67bdb 867 #define REG_CORE_DIGITAL_SENSOR_ADDRESS7_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS7 */
Vkadaba 5:0728bde67bdb 868 #define REG_CORE_DIGITAL_SENSOR_ADDRESS8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS8 */
Vkadaba 5:0728bde67bdb 869 #define REG_CORE_DIGITAL_SENSOR_ADDRESS9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS9 */
Vkadaba 5:0728bde67bdb 870 #define REG_CORE_DIGITAL_SENSOR_ADDRESS10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS10 */
Vkadaba 5:0728bde67bdb 871 #define REG_CORE_DIGITAL_SENSOR_ADDRESS11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS11 */
Vkadaba 5:0728bde67bdb 872 #define REG_CORE_DIGITAL_SENSOR_ADDRESS12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS12 */
Vkadaba 5:0728bde67bdb 873 #define REG_CORE_DIGITAL_SENSOR_ADDRESS13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS13 */
Vkadaba 5:0728bde67bdb 874 #define REG_CORE_DIGITAL_SENSOR_ADDRESS14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS14 */
Vkadaba 5:0728bde67bdb 875 #define REG_CORE_DIGITAL_SENSOR_ADDRESS15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS15 */
Vkadaba 5:0728bde67bdb 876 #define REG_CORE_DIGITAL_SENSOR_ADDRESS0 0x000000BE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 877 #define REG_CORE_DIGITAL_SENSOR_ADDRESS1 0x000000FE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 878 #define REG_CORE_DIGITAL_SENSOR_ADDRESS2 0x0000013E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 879 #define REG_CORE_DIGITAL_SENSOR_ADDRESS3 0x0000017E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 880 #define REG_CORE_DIGITAL_SENSOR_ADDRESS4 0x000001BE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 881 #define REG_CORE_DIGITAL_SENSOR_ADDRESS5 0x000001FE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 882 #define REG_CORE_DIGITAL_SENSOR_ADDRESS6 0x0000023E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 883 #define REG_CORE_DIGITAL_SENSOR_ADDRESS7 0x0000027E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 884 #define REG_CORE_DIGITAL_SENSOR_ADDRESS8 0x000002BE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 885 #define REG_CORE_DIGITAL_SENSOR_ADDRESS9 0x000002FE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 886 #define REG_CORE_DIGITAL_SENSOR_ADDRESS10 0x0000033E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 887 #define REG_CORE_DIGITAL_SENSOR_ADDRESS11 0x0000037E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 888 #define REG_CORE_DIGITAL_SENSOR_ADDRESS12 0x000003BE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 889 #define REG_CORE_DIGITAL_SENSOR_ADDRESS13 0x000003FE /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 890 #define REG_CORE_DIGITAL_SENSOR_ADDRESS14 0x0000043E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 891 #define REG_CORE_DIGITAL_SENSOR_ADDRESS15 0x0000047E /* ADMW_CORE Sensor Address */
Vkadaba 5:0728bde67bdb 892 #define REG_CORE_DIGITAL_SENSOR_ADDRESSn(i) (REG_CORE_DIGITAL_SENSOR_ADDRESS0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 893 #define REG_CORE_DIGITAL_SENSOR_ADDRESSn_COUNT 16
Vkadaba 5:0728bde67bdb 894 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Num_Cmds[n] */
Vkadaba 5:0728bde67bdb 895 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 */
Vkadaba 5:0728bde67bdb 896 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS1 */
Vkadaba 5:0728bde67bdb 897 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS2_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS2 */
Vkadaba 5:0728bde67bdb 898 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS3_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS3 */
Vkadaba 5:0728bde67bdb 899 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS4_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS4 */
Vkadaba 5:0728bde67bdb 900 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS5_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS5 */
Vkadaba 5:0728bde67bdb 901 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS6_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS6 */
Vkadaba 5:0728bde67bdb 902 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS7_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS7 */
Vkadaba 5:0728bde67bdb 903 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS8 */
Vkadaba 5:0728bde67bdb 904 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS9 */
Vkadaba 5:0728bde67bdb 905 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS10 */
Vkadaba 5:0728bde67bdb 906 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS11 */
Vkadaba 5:0728bde67bdb 907 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS12 */
Vkadaba 5:0728bde67bdb 908 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS13 */
Vkadaba 5:0728bde67bdb 909 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS14 */
Vkadaba 5:0728bde67bdb 910 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS15 */
Vkadaba 5:0728bde67bdb 911 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 0x000000BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 912 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS1 0x000000FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 913 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS2 0x0000013F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 914 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS3 0x0000017F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 915 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS4 0x000001BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 916 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS5 0x000001FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 917 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS6 0x0000023F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 918 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS7 0x0000027F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 919 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS8 0x000002BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 920 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS9 0x000002FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 921 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS10 0x0000033F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 922 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS11 0x0000037F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 923 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS12 0x000003BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 924 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS13 0x000003FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 925 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS14 0x0000043F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 926 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS15 0x0000047F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */
Vkadaba 5:0728bde67bdb 927 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn(i) (REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 928 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn_COUNT 16
Vkadaba 5:0728bde67bdb 929 #define REG_CORE_DIGITAL_SENSOR_COMMSn_RESET 0x00000006 /* Reset Value for Digital_Sensor_Comms[n] */
Vkadaba 5:0728bde67bdb 930 #define REG_CORE_DIGITAL_SENSOR_COMMS0_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS0 */
Vkadaba 5:0728bde67bdb 931 #define REG_CORE_DIGITAL_SENSOR_COMMS1_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS1 */
Vkadaba 5:0728bde67bdb 932 #define REG_CORE_DIGITAL_SENSOR_COMMS2_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS2 */
Vkadaba 5:0728bde67bdb 933 #define REG_CORE_DIGITAL_SENSOR_COMMS3_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS3 */
Vkadaba 5:0728bde67bdb 934 #define REG_CORE_DIGITAL_SENSOR_COMMS4_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS4 */
Vkadaba 5:0728bde67bdb 935 #define REG_CORE_DIGITAL_SENSOR_COMMS5_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS5 */
Vkadaba 5:0728bde67bdb 936 #define REG_CORE_DIGITAL_SENSOR_COMMS6_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS6 */
Vkadaba 5:0728bde67bdb 937 #define REG_CORE_DIGITAL_SENSOR_COMMS7_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS7 */
Vkadaba 5:0728bde67bdb 938 #define REG_CORE_DIGITAL_SENSOR_COMMS8_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS8 */
Vkadaba 5:0728bde67bdb 939 #define REG_CORE_DIGITAL_SENSOR_COMMS9_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS9 */
Vkadaba 5:0728bde67bdb 940 #define REG_CORE_DIGITAL_SENSOR_COMMS10_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS10 */
Vkadaba 5:0728bde67bdb 941 #define REG_CORE_DIGITAL_SENSOR_COMMS11_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS11 */
Vkadaba 5:0728bde67bdb 942 #define REG_CORE_DIGITAL_SENSOR_COMMS12_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS12 */
Vkadaba 5:0728bde67bdb 943 #define REG_CORE_DIGITAL_SENSOR_COMMS13_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS13 */
Vkadaba 5:0728bde67bdb 944 #define REG_CORE_DIGITAL_SENSOR_COMMS14_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS14 */
Vkadaba 5:0728bde67bdb 945 #define REG_CORE_DIGITAL_SENSOR_COMMS15_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS15 */
Vkadaba 5:0728bde67bdb 946 #define REG_CORE_DIGITAL_SENSOR_COMMS0 0x000000C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 947 #define REG_CORE_DIGITAL_SENSOR_COMMS1 0x00000100 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 948 #define REG_CORE_DIGITAL_SENSOR_COMMS2 0x00000140 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 949 #define REG_CORE_DIGITAL_SENSOR_COMMS3 0x00000180 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 950 #define REG_CORE_DIGITAL_SENSOR_COMMS4 0x000001C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 951 #define REG_CORE_DIGITAL_SENSOR_COMMS5 0x00000200 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 952 #define REG_CORE_DIGITAL_SENSOR_COMMS6 0x00000240 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 953 #define REG_CORE_DIGITAL_SENSOR_COMMS7 0x00000280 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 954 #define REG_CORE_DIGITAL_SENSOR_COMMS8 0x000002C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 955 #define REG_CORE_DIGITAL_SENSOR_COMMS9 0x00000300 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 956 #define REG_CORE_DIGITAL_SENSOR_COMMS10 0x00000340 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 957 #define REG_CORE_DIGITAL_SENSOR_COMMS11 0x00000380 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 958 #define REG_CORE_DIGITAL_SENSOR_COMMS12 0x000003C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 959 #define REG_CORE_DIGITAL_SENSOR_COMMS13 0x00000400 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 960 #define REG_CORE_DIGITAL_SENSOR_COMMS14 0x00000440 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 961 #define REG_CORE_DIGITAL_SENSOR_COMMS15 0x00000480 /* ADMW_CORE Digital Sensor Communication Clock Configuration */
Vkadaba 5:0728bde67bdb 962 #define REG_CORE_DIGITAL_SENSOR_COMMSn(i) (REG_CORE_DIGITAL_SENSOR_COMMS0 + ((i) * 64))
Vkadaba 5:0728bde67bdb 963 #define REG_CORE_DIGITAL_SENSOR_COMMSn_COUNT 16
Vkadaba 5:0728bde67bdb 964 #define REG_CORE_DIGITAL_SENSOR_COMMAND1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command1[n] */
Vkadaba 5:0728bde67bdb 965 #define REG_CORE_DIGITAL_SENSOR_COMMAND10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND10 */
Vkadaba 5:0728bde67bdb 966 #define REG_CORE_DIGITAL_SENSOR_COMMAND11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND11 */
Vkadaba 5:0728bde67bdb 967 #define REG_CORE_DIGITAL_SENSOR_COMMAND12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND12 */
Vkadaba 5:0728bde67bdb 968 #define REG_CORE_DIGITAL_SENSOR_COMMAND13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND13 */
Vkadaba 5:0728bde67bdb 969 #define REG_CORE_DIGITAL_SENSOR_COMMAND14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND14 */
Vkadaba 5:0728bde67bdb 970 #define REG_CORE_DIGITAL_SENSOR_COMMAND15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND15 */
Vkadaba 5:0728bde67bdb 971 #define REG_CORE_DIGITAL_SENSOR_COMMAND16_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND16 */
Vkadaba 5:0728bde67bdb 972 #define REG_CORE_DIGITAL_SENSOR_COMMAND17_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND17 */
Vkadaba 5:0728bde67bdb 973 #define REG_CORE_DIGITAL_SENSOR_COMMAND18_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND18 */
Vkadaba 5:0728bde67bdb 974 #define REG_CORE_DIGITAL_SENSOR_COMMAND19_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND19 */
Vkadaba 5:0728bde67bdb 975 #define REG_CORE_DIGITAL_SENSOR_COMMAND110_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND110 */
Vkadaba 5:0728bde67bdb 976 #define REG_CORE_DIGITAL_SENSOR_COMMAND111_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND111 */
Vkadaba 5:0728bde67bdb 977 #define REG_CORE_DIGITAL_SENSOR_COMMAND112_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND112 */
Vkadaba 5:0728bde67bdb 978 #define REG_CORE_DIGITAL_SENSOR_COMMAND113_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND113 */
Vkadaba 5:0728bde67bdb 979 #define REG_CORE_DIGITAL_SENSOR_COMMAND114_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND114 */
Vkadaba 5:0728bde67bdb 980 #define REG_CORE_DIGITAL_SENSOR_COMMAND115_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND115 */
Vkadaba 5:0728bde67bdb 981 #define REG_CORE_DIGITAL_SENSOR_COMMAND10 0x000000C2 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 982 #define REG_CORE_DIGITAL_SENSOR_COMMAND11 0x00000102 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 983 #define REG_CORE_DIGITAL_SENSOR_COMMAND12 0x00000142 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 984 #define REG_CORE_DIGITAL_SENSOR_COMMAND13 0x00000182 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 985 #define REG_CORE_DIGITAL_SENSOR_COMMAND14 0x000001C2 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 986 #define REG_CORE_DIGITAL_SENSOR_COMMAND15 0x00000202 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 987 #define REG_CORE_DIGITAL_SENSOR_COMMAND16 0x00000242 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 988 #define REG_CORE_DIGITAL_SENSOR_COMMAND17 0x00000282 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 989 #define REG_CORE_DIGITAL_SENSOR_COMMAND18 0x000002C2 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 990 #define REG_CORE_DIGITAL_SENSOR_COMMAND19 0x00000302 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 991 #define REG_CORE_DIGITAL_SENSOR_COMMAND110 0x00000342 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 992 #define REG_CORE_DIGITAL_SENSOR_COMMAND111 0x00000382 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 993 #define REG_CORE_DIGITAL_SENSOR_COMMAND112 0x000003C2 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 994 #define REG_CORE_DIGITAL_SENSOR_COMMAND113 0x00000402 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 995 #define REG_CORE_DIGITAL_SENSOR_COMMAND114 0x00000442 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 996 #define REG_CORE_DIGITAL_SENSOR_COMMAND115 0x00000482 /* ADMW_CORE Sensor Configuration Command1 */
Vkadaba 5:0728bde67bdb 997 #define REG_CORE_DIGITAL_SENSOR_COMMAND1n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND10 + ((i) * 64))
Vkadaba 5:0728bde67bdb 998 #define REG_CORE_DIGITAL_SENSOR_COMMAND1n_COUNT 16
Vkadaba 5:0728bde67bdb 999 #define REG_CORE_DIGITAL_SENSOR_COMMAND2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command2[n] */
Vkadaba 5:0728bde67bdb 1000 #define REG_CORE_DIGITAL_SENSOR_COMMAND20_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND20 */
Vkadaba 5:0728bde67bdb 1001 #define REG_CORE_DIGITAL_SENSOR_COMMAND21_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND21 */
Vkadaba 5:0728bde67bdb 1002 #define REG_CORE_DIGITAL_SENSOR_COMMAND22_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND22 */
Vkadaba 5:0728bde67bdb 1003 #define REG_CORE_DIGITAL_SENSOR_COMMAND23_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND23 */
Vkadaba 5:0728bde67bdb 1004 #define REG_CORE_DIGITAL_SENSOR_COMMAND24_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND24 */
Vkadaba 5:0728bde67bdb 1005 #define REG_CORE_DIGITAL_SENSOR_COMMAND25_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND25 */
Vkadaba 5:0728bde67bdb 1006 #define REG_CORE_DIGITAL_SENSOR_COMMAND26_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND26 */
Vkadaba 5:0728bde67bdb 1007 #define REG_CORE_DIGITAL_SENSOR_COMMAND27_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND27 */
Vkadaba 5:0728bde67bdb 1008 #define REG_CORE_DIGITAL_SENSOR_COMMAND28_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND28 */
Vkadaba 5:0728bde67bdb 1009 #define REG_CORE_DIGITAL_SENSOR_COMMAND29_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND29 */
Vkadaba 5:0728bde67bdb 1010 #define REG_CORE_DIGITAL_SENSOR_COMMAND210_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND210 */
Vkadaba 5:0728bde67bdb 1011 #define REG_CORE_DIGITAL_SENSOR_COMMAND211_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND211 */
Vkadaba 5:0728bde67bdb 1012 #define REG_CORE_DIGITAL_SENSOR_COMMAND212_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND212 */
Vkadaba 5:0728bde67bdb 1013 #define REG_CORE_DIGITAL_SENSOR_COMMAND213_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND213 */
Vkadaba 5:0728bde67bdb 1014 #define REG_CORE_DIGITAL_SENSOR_COMMAND214_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND214 */
Vkadaba 5:0728bde67bdb 1015 #define REG_CORE_DIGITAL_SENSOR_COMMAND215_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND215 */
Vkadaba 5:0728bde67bdb 1016 #define REG_CORE_DIGITAL_SENSOR_COMMAND20 0x000000C3 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1017 #define REG_CORE_DIGITAL_SENSOR_COMMAND21 0x00000103 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1018 #define REG_CORE_DIGITAL_SENSOR_COMMAND22 0x00000143 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1019 #define REG_CORE_DIGITAL_SENSOR_COMMAND23 0x00000183 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1020 #define REG_CORE_DIGITAL_SENSOR_COMMAND24 0x000001C3 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1021 #define REG_CORE_DIGITAL_SENSOR_COMMAND25 0x00000203 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1022 #define REG_CORE_DIGITAL_SENSOR_COMMAND26 0x00000243 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1023 #define REG_CORE_DIGITAL_SENSOR_COMMAND27 0x00000283 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1024 #define REG_CORE_DIGITAL_SENSOR_COMMAND28 0x000002C3 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1025 #define REG_CORE_DIGITAL_SENSOR_COMMAND29 0x00000303 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1026 #define REG_CORE_DIGITAL_SENSOR_COMMAND210 0x00000343 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1027 #define REG_CORE_DIGITAL_SENSOR_COMMAND211 0x00000383 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1028 #define REG_CORE_DIGITAL_SENSOR_COMMAND212 0x000003C3 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1029 #define REG_CORE_DIGITAL_SENSOR_COMMAND213 0x00000403 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1030 #define REG_CORE_DIGITAL_SENSOR_COMMAND214 0x00000443 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1031 #define REG_CORE_DIGITAL_SENSOR_COMMAND215 0x00000483 /* ADMW_CORE Sensor Configuration Command2 */
Vkadaba 5:0728bde67bdb 1032 #define REG_CORE_DIGITAL_SENSOR_COMMAND2n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND20 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1033 #define REG_CORE_DIGITAL_SENSOR_COMMAND2n_COUNT 16
Vkadaba 5:0728bde67bdb 1034 #define REG_CORE_DIGITAL_SENSOR_COMMAND3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command3[n] */
Vkadaba 5:0728bde67bdb 1035 #define REG_CORE_DIGITAL_SENSOR_COMMAND30_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND30 */
Vkadaba 5:0728bde67bdb 1036 #define REG_CORE_DIGITAL_SENSOR_COMMAND31_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND31 */
Vkadaba 5:0728bde67bdb 1037 #define REG_CORE_DIGITAL_SENSOR_COMMAND32_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND32 */
Vkadaba 5:0728bde67bdb 1038 #define REG_CORE_DIGITAL_SENSOR_COMMAND33_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND33 */
Vkadaba 5:0728bde67bdb 1039 #define REG_CORE_DIGITAL_SENSOR_COMMAND34_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND34 */
Vkadaba 5:0728bde67bdb 1040 #define REG_CORE_DIGITAL_SENSOR_COMMAND35_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND35 */
Vkadaba 5:0728bde67bdb 1041 #define REG_CORE_DIGITAL_SENSOR_COMMAND36_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND36 */
Vkadaba 5:0728bde67bdb 1042 #define REG_CORE_DIGITAL_SENSOR_COMMAND37_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND37 */
Vkadaba 5:0728bde67bdb 1043 #define REG_CORE_DIGITAL_SENSOR_COMMAND38_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND38 */
Vkadaba 5:0728bde67bdb 1044 #define REG_CORE_DIGITAL_SENSOR_COMMAND39_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND39 */
Vkadaba 5:0728bde67bdb 1045 #define REG_CORE_DIGITAL_SENSOR_COMMAND310_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND310 */
Vkadaba 5:0728bde67bdb 1046 #define REG_CORE_DIGITAL_SENSOR_COMMAND311_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND311 */
Vkadaba 5:0728bde67bdb 1047 #define REG_CORE_DIGITAL_SENSOR_COMMAND312_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND312 */
Vkadaba 5:0728bde67bdb 1048 #define REG_CORE_DIGITAL_SENSOR_COMMAND313_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND313 */
Vkadaba 5:0728bde67bdb 1049 #define REG_CORE_DIGITAL_SENSOR_COMMAND314_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND314 */
Vkadaba 5:0728bde67bdb 1050 #define REG_CORE_DIGITAL_SENSOR_COMMAND315_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND315 */
Vkadaba 5:0728bde67bdb 1051 #define REG_CORE_DIGITAL_SENSOR_COMMAND30 0x000000C4 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1052 #define REG_CORE_DIGITAL_SENSOR_COMMAND31 0x00000104 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1053 #define REG_CORE_DIGITAL_SENSOR_COMMAND32 0x00000144 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1054 #define REG_CORE_DIGITAL_SENSOR_COMMAND33 0x00000184 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1055 #define REG_CORE_DIGITAL_SENSOR_COMMAND34 0x000001C4 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1056 #define REG_CORE_DIGITAL_SENSOR_COMMAND35 0x00000204 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1057 #define REG_CORE_DIGITAL_SENSOR_COMMAND36 0x00000244 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1058 #define REG_CORE_DIGITAL_SENSOR_COMMAND37 0x00000284 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1059 #define REG_CORE_DIGITAL_SENSOR_COMMAND38 0x000002C4 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1060 #define REG_CORE_DIGITAL_SENSOR_COMMAND39 0x00000304 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1061 #define REG_CORE_DIGITAL_SENSOR_COMMAND310 0x00000344 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1062 #define REG_CORE_DIGITAL_SENSOR_COMMAND311 0x00000384 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1063 #define REG_CORE_DIGITAL_SENSOR_COMMAND312 0x000003C4 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1064 #define REG_CORE_DIGITAL_SENSOR_COMMAND313 0x00000404 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1065 #define REG_CORE_DIGITAL_SENSOR_COMMAND314 0x00000444 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1066 #define REG_CORE_DIGITAL_SENSOR_COMMAND315 0x00000484 /* ADMW_CORE Sensor Configuration Command3 */
Vkadaba 5:0728bde67bdb 1067 #define REG_CORE_DIGITAL_SENSOR_COMMAND3n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND30 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1068 #define REG_CORE_DIGITAL_SENSOR_COMMAND3n_COUNT 16
Vkadaba 5:0728bde67bdb 1069 #define REG_CORE_DIGITAL_SENSOR_COMMAND4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command4[n] */
Vkadaba 5:0728bde67bdb 1070 #define REG_CORE_DIGITAL_SENSOR_COMMAND40_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND40 */
Vkadaba 5:0728bde67bdb 1071 #define REG_CORE_DIGITAL_SENSOR_COMMAND41_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND41 */
Vkadaba 5:0728bde67bdb 1072 #define REG_CORE_DIGITAL_SENSOR_COMMAND42_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND42 */
Vkadaba 5:0728bde67bdb 1073 #define REG_CORE_DIGITAL_SENSOR_COMMAND43_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND43 */
Vkadaba 5:0728bde67bdb 1074 #define REG_CORE_DIGITAL_SENSOR_COMMAND44_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND44 */
Vkadaba 5:0728bde67bdb 1075 #define REG_CORE_DIGITAL_SENSOR_COMMAND45_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND45 */
Vkadaba 5:0728bde67bdb 1076 #define REG_CORE_DIGITAL_SENSOR_COMMAND46_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND46 */
Vkadaba 5:0728bde67bdb 1077 #define REG_CORE_DIGITAL_SENSOR_COMMAND47_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND47 */
Vkadaba 5:0728bde67bdb 1078 #define REG_CORE_DIGITAL_SENSOR_COMMAND48_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND48 */
Vkadaba 5:0728bde67bdb 1079 #define REG_CORE_DIGITAL_SENSOR_COMMAND49_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND49 */
Vkadaba 5:0728bde67bdb 1080 #define REG_CORE_DIGITAL_SENSOR_COMMAND410_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND410 */
Vkadaba 5:0728bde67bdb 1081 #define REG_CORE_DIGITAL_SENSOR_COMMAND411_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND411 */
Vkadaba 5:0728bde67bdb 1082 #define REG_CORE_DIGITAL_SENSOR_COMMAND412_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND412 */
Vkadaba 5:0728bde67bdb 1083 #define REG_CORE_DIGITAL_SENSOR_COMMAND413_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND413 */
Vkadaba 5:0728bde67bdb 1084 #define REG_CORE_DIGITAL_SENSOR_COMMAND414_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND414 */
Vkadaba 5:0728bde67bdb 1085 #define REG_CORE_DIGITAL_SENSOR_COMMAND415_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND415 */
Vkadaba 5:0728bde67bdb 1086 #define REG_CORE_DIGITAL_SENSOR_COMMAND40 0x000000C5 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1087 #define REG_CORE_DIGITAL_SENSOR_COMMAND41 0x00000105 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1088 #define REG_CORE_DIGITAL_SENSOR_COMMAND42 0x00000145 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1089 #define REG_CORE_DIGITAL_SENSOR_COMMAND43 0x00000185 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1090 #define REG_CORE_DIGITAL_SENSOR_COMMAND44 0x000001C5 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1091 #define REG_CORE_DIGITAL_SENSOR_COMMAND45 0x00000205 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1092 #define REG_CORE_DIGITAL_SENSOR_COMMAND46 0x00000245 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1093 #define REG_CORE_DIGITAL_SENSOR_COMMAND47 0x00000285 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1094 #define REG_CORE_DIGITAL_SENSOR_COMMAND48 0x000002C5 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1095 #define REG_CORE_DIGITAL_SENSOR_COMMAND49 0x00000305 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1096 #define REG_CORE_DIGITAL_SENSOR_COMMAND410 0x00000345 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1097 #define REG_CORE_DIGITAL_SENSOR_COMMAND411 0x00000385 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1098 #define REG_CORE_DIGITAL_SENSOR_COMMAND412 0x000003C5 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1099 #define REG_CORE_DIGITAL_SENSOR_COMMAND413 0x00000405 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1100 #define REG_CORE_DIGITAL_SENSOR_COMMAND414 0x00000445 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1101 #define REG_CORE_DIGITAL_SENSOR_COMMAND415 0x00000485 /* ADMW_CORE Sensor Configuration Command4 */
Vkadaba 5:0728bde67bdb 1102 #define REG_CORE_DIGITAL_SENSOR_COMMAND4n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND40 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1103 #define REG_CORE_DIGITAL_SENSOR_COMMAND4n_COUNT 16
Vkadaba 5:0728bde67bdb 1104 #define REG_CORE_DIGITAL_SENSOR_COMMAND5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command5[n] */
Vkadaba 5:0728bde67bdb 1105 #define REG_CORE_DIGITAL_SENSOR_COMMAND50_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND50 */
Vkadaba 5:0728bde67bdb 1106 #define REG_CORE_DIGITAL_SENSOR_COMMAND51_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND51 */
Vkadaba 5:0728bde67bdb 1107 #define REG_CORE_DIGITAL_SENSOR_COMMAND52_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND52 */
Vkadaba 5:0728bde67bdb 1108 #define REG_CORE_DIGITAL_SENSOR_COMMAND53_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND53 */
Vkadaba 5:0728bde67bdb 1109 #define REG_CORE_DIGITAL_SENSOR_COMMAND54_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND54 */
Vkadaba 5:0728bde67bdb 1110 #define REG_CORE_DIGITAL_SENSOR_COMMAND55_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND55 */
Vkadaba 5:0728bde67bdb 1111 #define REG_CORE_DIGITAL_SENSOR_COMMAND56_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND56 */
Vkadaba 5:0728bde67bdb 1112 #define REG_CORE_DIGITAL_SENSOR_COMMAND57_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND57 */
Vkadaba 5:0728bde67bdb 1113 #define REG_CORE_DIGITAL_SENSOR_COMMAND58_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND58 */
Vkadaba 5:0728bde67bdb 1114 #define REG_CORE_DIGITAL_SENSOR_COMMAND59_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND59 */
Vkadaba 5:0728bde67bdb 1115 #define REG_CORE_DIGITAL_SENSOR_COMMAND510_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND510 */
Vkadaba 5:0728bde67bdb 1116 #define REG_CORE_DIGITAL_SENSOR_COMMAND511_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND511 */
Vkadaba 5:0728bde67bdb 1117 #define REG_CORE_DIGITAL_SENSOR_COMMAND512_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND512 */
Vkadaba 5:0728bde67bdb 1118 #define REG_CORE_DIGITAL_SENSOR_COMMAND513_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND513 */
Vkadaba 5:0728bde67bdb 1119 #define REG_CORE_DIGITAL_SENSOR_COMMAND514_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND514 */
Vkadaba 5:0728bde67bdb 1120 #define REG_CORE_DIGITAL_SENSOR_COMMAND515_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND515 */
Vkadaba 5:0728bde67bdb 1121 #define REG_CORE_DIGITAL_SENSOR_COMMAND50 0x000000C6 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1122 #define REG_CORE_DIGITAL_SENSOR_COMMAND51 0x00000106 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1123 #define REG_CORE_DIGITAL_SENSOR_COMMAND52 0x00000146 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1124 #define REG_CORE_DIGITAL_SENSOR_COMMAND53 0x00000186 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1125 #define REG_CORE_DIGITAL_SENSOR_COMMAND54 0x000001C6 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1126 #define REG_CORE_DIGITAL_SENSOR_COMMAND55 0x00000206 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1127 #define REG_CORE_DIGITAL_SENSOR_COMMAND56 0x00000246 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1128 #define REG_CORE_DIGITAL_SENSOR_COMMAND57 0x00000286 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1129 #define REG_CORE_DIGITAL_SENSOR_COMMAND58 0x000002C6 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1130 #define REG_CORE_DIGITAL_SENSOR_COMMAND59 0x00000306 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1131 #define REG_CORE_DIGITAL_SENSOR_COMMAND510 0x00000346 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1132 #define REG_CORE_DIGITAL_SENSOR_COMMAND511 0x00000386 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1133 #define REG_CORE_DIGITAL_SENSOR_COMMAND512 0x000003C6 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1134 #define REG_CORE_DIGITAL_SENSOR_COMMAND513 0x00000406 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1135 #define REG_CORE_DIGITAL_SENSOR_COMMAND514 0x00000446 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1136 #define REG_CORE_DIGITAL_SENSOR_COMMAND515 0x00000486 /* ADMW_CORE Sensor Configuration Command5 */
Vkadaba 5:0728bde67bdb 1137 #define REG_CORE_DIGITAL_SENSOR_COMMAND5n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND50 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1138 #define REG_CORE_DIGITAL_SENSOR_COMMAND5n_COUNT 16
Vkadaba 5:0728bde67bdb 1139 #define REG_CORE_DIGITAL_SENSOR_COMMAND6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command6[n] */
Vkadaba 5:0728bde67bdb 1140 #define REG_CORE_DIGITAL_SENSOR_COMMAND60_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND60 */
Vkadaba 5:0728bde67bdb 1141 #define REG_CORE_DIGITAL_SENSOR_COMMAND61_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND61 */
Vkadaba 5:0728bde67bdb 1142 #define REG_CORE_DIGITAL_SENSOR_COMMAND62_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND62 */
Vkadaba 5:0728bde67bdb 1143 #define REG_CORE_DIGITAL_SENSOR_COMMAND63_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND63 */
Vkadaba 5:0728bde67bdb 1144 #define REG_CORE_DIGITAL_SENSOR_COMMAND64_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND64 */
Vkadaba 5:0728bde67bdb 1145 #define REG_CORE_DIGITAL_SENSOR_COMMAND65_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND65 */
Vkadaba 5:0728bde67bdb 1146 #define REG_CORE_DIGITAL_SENSOR_COMMAND66_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND66 */
Vkadaba 5:0728bde67bdb 1147 #define REG_CORE_DIGITAL_SENSOR_COMMAND67_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND67 */
Vkadaba 5:0728bde67bdb 1148 #define REG_CORE_DIGITAL_SENSOR_COMMAND68_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND68 */
Vkadaba 5:0728bde67bdb 1149 #define REG_CORE_DIGITAL_SENSOR_COMMAND69_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND69 */
Vkadaba 5:0728bde67bdb 1150 #define REG_CORE_DIGITAL_SENSOR_COMMAND610_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND610 */
Vkadaba 5:0728bde67bdb 1151 #define REG_CORE_DIGITAL_SENSOR_COMMAND611_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND611 */
Vkadaba 5:0728bde67bdb 1152 #define REG_CORE_DIGITAL_SENSOR_COMMAND612_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND612 */
Vkadaba 5:0728bde67bdb 1153 #define REG_CORE_DIGITAL_SENSOR_COMMAND613_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND613 */
Vkadaba 5:0728bde67bdb 1154 #define REG_CORE_DIGITAL_SENSOR_COMMAND614_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND614 */
Vkadaba 5:0728bde67bdb 1155 #define REG_CORE_DIGITAL_SENSOR_COMMAND615_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND615 */
Vkadaba 5:0728bde67bdb 1156 #define REG_CORE_DIGITAL_SENSOR_COMMAND60 0x000000C7 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1157 #define REG_CORE_DIGITAL_SENSOR_COMMAND61 0x00000107 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1158 #define REG_CORE_DIGITAL_SENSOR_COMMAND62 0x00000147 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1159 #define REG_CORE_DIGITAL_SENSOR_COMMAND63 0x00000187 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1160 #define REG_CORE_DIGITAL_SENSOR_COMMAND64 0x000001C7 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1161 #define REG_CORE_DIGITAL_SENSOR_COMMAND65 0x00000207 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1162 #define REG_CORE_DIGITAL_SENSOR_COMMAND66 0x00000247 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1163 #define REG_CORE_DIGITAL_SENSOR_COMMAND67 0x00000287 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1164 #define REG_CORE_DIGITAL_SENSOR_COMMAND68 0x000002C7 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1165 #define REG_CORE_DIGITAL_SENSOR_COMMAND69 0x00000307 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1166 #define REG_CORE_DIGITAL_SENSOR_COMMAND610 0x00000347 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1167 #define REG_CORE_DIGITAL_SENSOR_COMMAND611 0x00000387 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1168 #define REG_CORE_DIGITAL_SENSOR_COMMAND612 0x000003C7 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1169 #define REG_CORE_DIGITAL_SENSOR_COMMAND613 0x00000407 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1170 #define REG_CORE_DIGITAL_SENSOR_COMMAND614 0x00000447 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1171 #define REG_CORE_DIGITAL_SENSOR_COMMAND615 0x00000487 /* ADMW_CORE Sensor Configuration Command6 */
Vkadaba 5:0728bde67bdb 1172 #define REG_CORE_DIGITAL_SENSOR_COMMAND6n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND60 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1173 #define REG_CORE_DIGITAL_SENSOR_COMMAND6n_COUNT 16
Vkadaba 5:0728bde67bdb 1174 #define REG_CORE_DIGITAL_SENSOR_COMMAND7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command7[n] */
Vkadaba 5:0728bde67bdb 1175 #define REG_CORE_DIGITAL_SENSOR_COMMAND70_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND70 */
Vkadaba 5:0728bde67bdb 1176 #define REG_CORE_DIGITAL_SENSOR_COMMAND71_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND71 */
Vkadaba 5:0728bde67bdb 1177 #define REG_CORE_DIGITAL_SENSOR_COMMAND72_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND72 */
Vkadaba 5:0728bde67bdb 1178 #define REG_CORE_DIGITAL_SENSOR_COMMAND73_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND73 */
Vkadaba 5:0728bde67bdb 1179 #define REG_CORE_DIGITAL_SENSOR_COMMAND74_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND74 */
Vkadaba 5:0728bde67bdb 1180 #define REG_CORE_DIGITAL_SENSOR_COMMAND75_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND75 */
Vkadaba 5:0728bde67bdb 1181 #define REG_CORE_DIGITAL_SENSOR_COMMAND76_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND76 */
Vkadaba 5:0728bde67bdb 1182 #define REG_CORE_DIGITAL_SENSOR_COMMAND77_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND77 */
Vkadaba 5:0728bde67bdb 1183 #define REG_CORE_DIGITAL_SENSOR_COMMAND78_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND78 */
Vkadaba 5:0728bde67bdb 1184 #define REG_CORE_DIGITAL_SENSOR_COMMAND79_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND79 */
Vkadaba 5:0728bde67bdb 1185 #define REG_CORE_DIGITAL_SENSOR_COMMAND710_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND710 */
Vkadaba 5:0728bde67bdb 1186 #define REG_CORE_DIGITAL_SENSOR_COMMAND711_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND711 */
Vkadaba 5:0728bde67bdb 1187 #define REG_CORE_DIGITAL_SENSOR_COMMAND712_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND712 */
Vkadaba 5:0728bde67bdb 1188 #define REG_CORE_DIGITAL_SENSOR_COMMAND713_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND713 */
Vkadaba 5:0728bde67bdb 1189 #define REG_CORE_DIGITAL_SENSOR_COMMAND714_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND714 */
Vkadaba 5:0728bde67bdb 1190 #define REG_CORE_DIGITAL_SENSOR_COMMAND715_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND715 */
Vkadaba 5:0728bde67bdb 1191 #define REG_CORE_DIGITAL_SENSOR_COMMAND70 0x000000C8 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1192 #define REG_CORE_DIGITAL_SENSOR_COMMAND71 0x00000108 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1193 #define REG_CORE_DIGITAL_SENSOR_COMMAND72 0x00000148 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1194 #define REG_CORE_DIGITAL_SENSOR_COMMAND73 0x00000188 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1195 #define REG_CORE_DIGITAL_SENSOR_COMMAND74 0x000001C8 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1196 #define REG_CORE_DIGITAL_SENSOR_COMMAND75 0x00000208 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1197 #define REG_CORE_DIGITAL_SENSOR_COMMAND76 0x00000248 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1198 #define REG_CORE_DIGITAL_SENSOR_COMMAND77 0x00000288 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1199 #define REG_CORE_DIGITAL_SENSOR_COMMAND78 0x000002C8 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1200 #define REG_CORE_DIGITAL_SENSOR_COMMAND79 0x00000308 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1201 #define REG_CORE_DIGITAL_SENSOR_COMMAND710 0x00000348 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1202 #define REG_CORE_DIGITAL_SENSOR_COMMAND711 0x00000388 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1203 #define REG_CORE_DIGITAL_SENSOR_COMMAND712 0x000003C8 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1204 #define REG_CORE_DIGITAL_SENSOR_COMMAND713 0x00000408 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1205 #define REG_CORE_DIGITAL_SENSOR_COMMAND714 0x00000448 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1206 #define REG_CORE_DIGITAL_SENSOR_COMMAND715 0x00000488 /* ADMW_CORE Sensor Configuration Command7 */
Vkadaba 5:0728bde67bdb 1207 #define REG_CORE_DIGITAL_SENSOR_COMMAND7n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND70 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1208 #define REG_CORE_DIGITAL_SENSOR_COMMAND7n_COUNT 16
Vkadaba 5:0728bde67bdb 1209 #define REG_CORE_DIGITAL_SENSOR_READ_CMD1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd1[n] */
Vkadaba 5:0728bde67bdb 1210 #define REG_CORE_DIGITAL_SENSOR_READ_CMD10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD10 */
Vkadaba 5:0728bde67bdb 1211 #define REG_CORE_DIGITAL_SENSOR_READ_CMD11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD11 */
Vkadaba 5:0728bde67bdb 1212 #define REG_CORE_DIGITAL_SENSOR_READ_CMD12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD12 */
Vkadaba 5:0728bde67bdb 1213 #define REG_CORE_DIGITAL_SENSOR_READ_CMD13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD13 */
Vkadaba 5:0728bde67bdb 1214 #define REG_CORE_DIGITAL_SENSOR_READ_CMD14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD14 */
Vkadaba 5:0728bde67bdb 1215 #define REG_CORE_DIGITAL_SENSOR_READ_CMD15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD15 */
Vkadaba 5:0728bde67bdb 1216 #define REG_CORE_DIGITAL_SENSOR_READ_CMD16_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD16 */
Vkadaba 5:0728bde67bdb 1217 #define REG_CORE_DIGITAL_SENSOR_READ_CMD17_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD17 */
Vkadaba 5:0728bde67bdb 1218 #define REG_CORE_DIGITAL_SENSOR_READ_CMD18_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD18 */
Vkadaba 5:0728bde67bdb 1219 #define REG_CORE_DIGITAL_SENSOR_READ_CMD19_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD19 */
Vkadaba 5:0728bde67bdb 1220 #define REG_CORE_DIGITAL_SENSOR_READ_CMD110_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD110 */
Vkadaba 5:0728bde67bdb 1221 #define REG_CORE_DIGITAL_SENSOR_READ_CMD111_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD111 */
Vkadaba 5:0728bde67bdb 1222 #define REG_CORE_DIGITAL_SENSOR_READ_CMD112_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD112 */
Vkadaba 5:0728bde67bdb 1223 #define REG_CORE_DIGITAL_SENSOR_READ_CMD113_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD113 */
Vkadaba 5:0728bde67bdb 1224 #define REG_CORE_DIGITAL_SENSOR_READ_CMD114_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD114 */
Vkadaba 5:0728bde67bdb 1225 #define REG_CORE_DIGITAL_SENSOR_READ_CMD115_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD115 */
Vkadaba 5:0728bde67bdb 1226 #define REG_CORE_DIGITAL_SENSOR_READ_CMD10 0x000000C9 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1227 #define REG_CORE_DIGITAL_SENSOR_READ_CMD11 0x00000109 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1228 #define REG_CORE_DIGITAL_SENSOR_READ_CMD12 0x00000149 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1229 #define REG_CORE_DIGITAL_SENSOR_READ_CMD13 0x00000189 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1230 #define REG_CORE_DIGITAL_SENSOR_READ_CMD14 0x000001C9 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1231 #define REG_CORE_DIGITAL_SENSOR_READ_CMD15 0x00000209 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1232 #define REG_CORE_DIGITAL_SENSOR_READ_CMD16 0x00000249 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1233 #define REG_CORE_DIGITAL_SENSOR_READ_CMD17 0x00000289 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1234 #define REG_CORE_DIGITAL_SENSOR_READ_CMD18 0x000002C9 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1235 #define REG_CORE_DIGITAL_SENSOR_READ_CMD19 0x00000309 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1236 #define REG_CORE_DIGITAL_SENSOR_READ_CMD110 0x00000349 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1237 #define REG_CORE_DIGITAL_SENSOR_READ_CMD111 0x00000389 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1238 #define REG_CORE_DIGITAL_SENSOR_READ_CMD112 0x000003C9 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1239 #define REG_CORE_DIGITAL_SENSOR_READ_CMD113 0x00000409 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1240 #define REG_CORE_DIGITAL_SENSOR_READ_CMD114 0x00000449 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1241 #define REG_CORE_DIGITAL_SENSOR_READ_CMD115 0x00000489 /* ADMW_CORE Sensor Read Command1 */
Vkadaba 5:0728bde67bdb 1242 #define REG_CORE_DIGITAL_SENSOR_READ_CMD1n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD10 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1243 #define REG_CORE_DIGITAL_SENSOR_READ_CMD1n_COUNT 16
Vkadaba 5:0728bde67bdb 1244 #define REG_CORE_DIGITAL_SENSOR_READ_CMD2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd2[n] */
Vkadaba 5:0728bde67bdb 1245 #define REG_CORE_DIGITAL_SENSOR_READ_CMD20_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD20 */
Vkadaba 5:0728bde67bdb 1246 #define REG_CORE_DIGITAL_SENSOR_READ_CMD21_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD21 */
Vkadaba 5:0728bde67bdb 1247 #define REG_CORE_DIGITAL_SENSOR_READ_CMD22_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD22 */
Vkadaba 5:0728bde67bdb 1248 #define REG_CORE_DIGITAL_SENSOR_READ_CMD23_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD23 */
Vkadaba 5:0728bde67bdb 1249 #define REG_CORE_DIGITAL_SENSOR_READ_CMD24_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD24 */
Vkadaba 5:0728bde67bdb 1250 #define REG_CORE_DIGITAL_SENSOR_READ_CMD25_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD25 */
Vkadaba 5:0728bde67bdb 1251 #define REG_CORE_DIGITAL_SENSOR_READ_CMD26_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD26 */
Vkadaba 5:0728bde67bdb 1252 #define REG_CORE_DIGITAL_SENSOR_READ_CMD27_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD27 */
Vkadaba 5:0728bde67bdb 1253 #define REG_CORE_DIGITAL_SENSOR_READ_CMD28_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD28 */
Vkadaba 5:0728bde67bdb 1254 #define REG_CORE_DIGITAL_SENSOR_READ_CMD29_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD29 */
Vkadaba 5:0728bde67bdb 1255 #define REG_CORE_DIGITAL_SENSOR_READ_CMD210_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD210 */
Vkadaba 5:0728bde67bdb 1256 #define REG_CORE_DIGITAL_SENSOR_READ_CMD211_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD211 */
Vkadaba 5:0728bde67bdb 1257 #define REG_CORE_DIGITAL_SENSOR_READ_CMD212_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD212 */
Vkadaba 5:0728bde67bdb 1258 #define REG_CORE_DIGITAL_SENSOR_READ_CMD213_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD213 */
Vkadaba 5:0728bde67bdb 1259 #define REG_CORE_DIGITAL_SENSOR_READ_CMD214_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD214 */
Vkadaba 5:0728bde67bdb 1260 #define REG_CORE_DIGITAL_SENSOR_READ_CMD215_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD215 */
Vkadaba 5:0728bde67bdb 1261 #define REG_CORE_DIGITAL_SENSOR_READ_CMD20 0x000000CA /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1262 #define REG_CORE_DIGITAL_SENSOR_READ_CMD21 0x0000010A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1263 #define REG_CORE_DIGITAL_SENSOR_READ_CMD22 0x0000014A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1264 #define REG_CORE_DIGITAL_SENSOR_READ_CMD23 0x0000018A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1265 #define REG_CORE_DIGITAL_SENSOR_READ_CMD24 0x000001CA /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1266 #define REG_CORE_DIGITAL_SENSOR_READ_CMD25 0x0000020A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1267 #define REG_CORE_DIGITAL_SENSOR_READ_CMD26 0x0000024A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1268 #define REG_CORE_DIGITAL_SENSOR_READ_CMD27 0x0000028A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1269 #define REG_CORE_DIGITAL_SENSOR_READ_CMD28 0x000002CA /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1270 #define REG_CORE_DIGITAL_SENSOR_READ_CMD29 0x0000030A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1271 #define REG_CORE_DIGITAL_SENSOR_READ_CMD210 0x0000034A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1272 #define REG_CORE_DIGITAL_SENSOR_READ_CMD211 0x0000038A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1273 #define REG_CORE_DIGITAL_SENSOR_READ_CMD212 0x000003CA /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1274 #define REG_CORE_DIGITAL_SENSOR_READ_CMD213 0x0000040A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1275 #define REG_CORE_DIGITAL_SENSOR_READ_CMD214 0x0000044A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1276 #define REG_CORE_DIGITAL_SENSOR_READ_CMD215 0x0000048A /* ADMW_CORE Sensor Read Command2 */
Vkadaba 5:0728bde67bdb 1277 #define REG_CORE_DIGITAL_SENSOR_READ_CMD2n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD20 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1278 #define REG_CORE_DIGITAL_SENSOR_READ_CMD2n_COUNT 16
Vkadaba 5:0728bde67bdb 1279 #define REG_CORE_DIGITAL_SENSOR_READ_CMD3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd3[n] */
Vkadaba 5:0728bde67bdb 1280 #define REG_CORE_DIGITAL_SENSOR_READ_CMD30_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD30 */
Vkadaba 5:0728bde67bdb 1281 #define REG_CORE_DIGITAL_SENSOR_READ_CMD31_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD31 */
Vkadaba 5:0728bde67bdb 1282 #define REG_CORE_DIGITAL_SENSOR_READ_CMD32_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD32 */
Vkadaba 5:0728bde67bdb 1283 #define REG_CORE_DIGITAL_SENSOR_READ_CMD33_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD33 */
Vkadaba 5:0728bde67bdb 1284 #define REG_CORE_DIGITAL_SENSOR_READ_CMD34_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD34 */
Vkadaba 5:0728bde67bdb 1285 #define REG_CORE_DIGITAL_SENSOR_READ_CMD35_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD35 */
Vkadaba 5:0728bde67bdb 1286 #define REG_CORE_DIGITAL_SENSOR_READ_CMD36_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD36 */
Vkadaba 5:0728bde67bdb 1287 #define REG_CORE_DIGITAL_SENSOR_READ_CMD37_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD37 */
Vkadaba 5:0728bde67bdb 1288 #define REG_CORE_DIGITAL_SENSOR_READ_CMD38_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD38 */
Vkadaba 5:0728bde67bdb 1289 #define REG_CORE_DIGITAL_SENSOR_READ_CMD39_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD39 */
Vkadaba 5:0728bde67bdb 1290 #define REG_CORE_DIGITAL_SENSOR_READ_CMD310_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD310 */
Vkadaba 5:0728bde67bdb 1291 #define REG_CORE_DIGITAL_SENSOR_READ_CMD311_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD311 */
Vkadaba 5:0728bde67bdb 1292 #define REG_CORE_DIGITAL_SENSOR_READ_CMD312_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD312 */
Vkadaba 5:0728bde67bdb 1293 #define REG_CORE_DIGITAL_SENSOR_READ_CMD313_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD313 */
Vkadaba 5:0728bde67bdb 1294 #define REG_CORE_DIGITAL_SENSOR_READ_CMD314_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD314 */
Vkadaba 5:0728bde67bdb 1295 #define REG_CORE_DIGITAL_SENSOR_READ_CMD315_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD315 */
Vkadaba 5:0728bde67bdb 1296 #define REG_CORE_DIGITAL_SENSOR_READ_CMD30 0x000000CB /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1297 #define REG_CORE_DIGITAL_SENSOR_READ_CMD31 0x0000010B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1298 #define REG_CORE_DIGITAL_SENSOR_READ_CMD32 0x0000014B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1299 #define REG_CORE_DIGITAL_SENSOR_READ_CMD33 0x0000018B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1300 #define REG_CORE_DIGITAL_SENSOR_READ_CMD34 0x000001CB /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1301 #define REG_CORE_DIGITAL_SENSOR_READ_CMD35 0x0000020B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1302 #define REG_CORE_DIGITAL_SENSOR_READ_CMD36 0x0000024B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1303 #define REG_CORE_DIGITAL_SENSOR_READ_CMD37 0x0000028B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1304 #define REG_CORE_DIGITAL_SENSOR_READ_CMD38 0x000002CB /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1305 #define REG_CORE_DIGITAL_SENSOR_READ_CMD39 0x0000030B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1306 #define REG_CORE_DIGITAL_SENSOR_READ_CMD310 0x0000034B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1307 #define REG_CORE_DIGITAL_SENSOR_READ_CMD311 0x0000038B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1308 #define REG_CORE_DIGITAL_SENSOR_READ_CMD312 0x000003CB /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1309 #define REG_CORE_DIGITAL_SENSOR_READ_CMD313 0x0000040B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1310 #define REG_CORE_DIGITAL_SENSOR_READ_CMD314 0x0000044B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1311 #define REG_CORE_DIGITAL_SENSOR_READ_CMD315 0x0000048B /* ADMW_CORE Sensor Read Command3 */
Vkadaba 5:0728bde67bdb 1312 #define REG_CORE_DIGITAL_SENSOR_READ_CMD3n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD30 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1313 #define REG_CORE_DIGITAL_SENSOR_READ_CMD3n_COUNT 16
Vkadaba 5:0728bde67bdb 1314 #define REG_CORE_DIGITAL_SENSOR_READ_CMD4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd4[n] */
Vkadaba 5:0728bde67bdb 1315 #define REG_CORE_DIGITAL_SENSOR_READ_CMD40_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD40 */
Vkadaba 5:0728bde67bdb 1316 #define REG_CORE_DIGITAL_SENSOR_READ_CMD41_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD41 */
Vkadaba 5:0728bde67bdb 1317 #define REG_CORE_DIGITAL_SENSOR_READ_CMD42_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD42 */
Vkadaba 5:0728bde67bdb 1318 #define REG_CORE_DIGITAL_SENSOR_READ_CMD43_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD43 */
Vkadaba 5:0728bde67bdb 1319 #define REG_CORE_DIGITAL_SENSOR_READ_CMD44_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD44 */
Vkadaba 5:0728bde67bdb 1320 #define REG_CORE_DIGITAL_SENSOR_READ_CMD45_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD45 */
Vkadaba 5:0728bde67bdb 1321 #define REG_CORE_DIGITAL_SENSOR_READ_CMD46_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD46 */
Vkadaba 5:0728bde67bdb 1322 #define REG_CORE_DIGITAL_SENSOR_READ_CMD47_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD47 */
Vkadaba 5:0728bde67bdb 1323 #define REG_CORE_DIGITAL_SENSOR_READ_CMD48_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD48 */
Vkadaba 5:0728bde67bdb 1324 #define REG_CORE_DIGITAL_SENSOR_READ_CMD49_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD49 */
Vkadaba 5:0728bde67bdb 1325 #define REG_CORE_DIGITAL_SENSOR_READ_CMD410_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD410 */
Vkadaba 5:0728bde67bdb 1326 #define REG_CORE_DIGITAL_SENSOR_READ_CMD411_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD411 */
Vkadaba 5:0728bde67bdb 1327 #define REG_CORE_DIGITAL_SENSOR_READ_CMD412_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD412 */
Vkadaba 5:0728bde67bdb 1328 #define REG_CORE_DIGITAL_SENSOR_READ_CMD413_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD413 */
Vkadaba 5:0728bde67bdb 1329 #define REG_CORE_DIGITAL_SENSOR_READ_CMD414_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD414 */
Vkadaba 5:0728bde67bdb 1330 #define REG_CORE_DIGITAL_SENSOR_READ_CMD415_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD415 */
Vkadaba 5:0728bde67bdb 1331 #define REG_CORE_DIGITAL_SENSOR_READ_CMD40 0x000000CC /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1332 #define REG_CORE_DIGITAL_SENSOR_READ_CMD41 0x0000010C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1333 #define REG_CORE_DIGITAL_SENSOR_READ_CMD42 0x0000014C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1334 #define REG_CORE_DIGITAL_SENSOR_READ_CMD43 0x0000018C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1335 #define REG_CORE_DIGITAL_SENSOR_READ_CMD44 0x000001CC /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1336 #define REG_CORE_DIGITAL_SENSOR_READ_CMD45 0x0000020C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1337 #define REG_CORE_DIGITAL_SENSOR_READ_CMD46 0x0000024C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1338 #define REG_CORE_DIGITAL_SENSOR_READ_CMD47 0x0000028C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1339 #define REG_CORE_DIGITAL_SENSOR_READ_CMD48 0x000002CC /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1340 #define REG_CORE_DIGITAL_SENSOR_READ_CMD49 0x0000030C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1341 #define REG_CORE_DIGITAL_SENSOR_READ_CMD410 0x0000034C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1342 #define REG_CORE_DIGITAL_SENSOR_READ_CMD411 0x0000038C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1343 #define REG_CORE_DIGITAL_SENSOR_READ_CMD412 0x000003CC /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1344 #define REG_CORE_DIGITAL_SENSOR_READ_CMD413 0x0000040C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1345 #define REG_CORE_DIGITAL_SENSOR_READ_CMD414 0x0000044C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1346 #define REG_CORE_DIGITAL_SENSOR_READ_CMD415 0x0000048C /* ADMW_CORE Sensor Read Command4 */
Vkadaba 5:0728bde67bdb 1347 #define REG_CORE_DIGITAL_SENSOR_READ_CMD4n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD40 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1348 #define REG_CORE_DIGITAL_SENSOR_READ_CMD4n_COUNT 16
Vkadaba 5:0728bde67bdb 1349 #define REG_CORE_DIGITAL_SENSOR_READ_CMD5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd5[n] */
Vkadaba 5:0728bde67bdb 1350 #define REG_CORE_DIGITAL_SENSOR_READ_CMD50_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD50 */
Vkadaba 5:0728bde67bdb 1351 #define REG_CORE_DIGITAL_SENSOR_READ_CMD51_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD51 */
Vkadaba 5:0728bde67bdb 1352 #define REG_CORE_DIGITAL_SENSOR_READ_CMD52_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD52 */
Vkadaba 5:0728bde67bdb 1353 #define REG_CORE_DIGITAL_SENSOR_READ_CMD53_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD53 */
Vkadaba 5:0728bde67bdb 1354 #define REG_CORE_DIGITAL_SENSOR_READ_CMD54_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD54 */
Vkadaba 5:0728bde67bdb 1355 #define REG_CORE_DIGITAL_SENSOR_READ_CMD55_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD55 */
Vkadaba 5:0728bde67bdb 1356 #define REG_CORE_DIGITAL_SENSOR_READ_CMD56_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD56 */
Vkadaba 5:0728bde67bdb 1357 #define REG_CORE_DIGITAL_SENSOR_READ_CMD57_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD57 */
Vkadaba 5:0728bde67bdb 1358 #define REG_CORE_DIGITAL_SENSOR_READ_CMD58_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD58 */
Vkadaba 5:0728bde67bdb 1359 #define REG_CORE_DIGITAL_SENSOR_READ_CMD59_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD59 */
Vkadaba 5:0728bde67bdb 1360 #define REG_CORE_DIGITAL_SENSOR_READ_CMD510_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD510 */
Vkadaba 5:0728bde67bdb 1361 #define REG_CORE_DIGITAL_SENSOR_READ_CMD511_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD511 */
Vkadaba 5:0728bde67bdb 1362 #define REG_CORE_DIGITAL_SENSOR_READ_CMD512_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD512 */
Vkadaba 5:0728bde67bdb 1363 #define REG_CORE_DIGITAL_SENSOR_READ_CMD513_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD513 */
Vkadaba 5:0728bde67bdb 1364 #define REG_CORE_DIGITAL_SENSOR_READ_CMD514_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD514 */
Vkadaba 5:0728bde67bdb 1365 #define REG_CORE_DIGITAL_SENSOR_READ_CMD515_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD515 */
Vkadaba 5:0728bde67bdb 1366 #define REG_CORE_DIGITAL_SENSOR_READ_CMD50 0x000000CD /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1367 #define REG_CORE_DIGITAL_SENSOR_READ_CMD51 0x0000010D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1368 #define REG_CORE_DIGITAL_SENSOR_READ_CMD52 0x0000014D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1369 #define REG_CORE_DIGITAL_SENSOR_READ_CMD53 0x0000018D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1370 #define REG_CORE_DIGITAL_SENSOR_READ_CMD54 0x000001CD /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1371 #define REG_CORE_DIGITAL_SENSOR_READ_CMD55 0x0000020D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1372 #define REG_CORE_DIGITAL_SENSOR_READ_CMD56 0x0000024D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1373 #define REG_CORE_DIGITAL_SENSOR_READ_CMD57 0x0000028D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1374 #define REG_CORE_DIGITAL_SENSOR_READ_CMD58 0x000002CD /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1375 #define REG_CORE_DIGITAL_SENSOR_READ_CMD59 0x0000030D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1376 #define REG_CORE_DIGITAL_SENSOR_READ_CMD510 0x0000034D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1377 #define REG_CORE_DIGITAL_SENSOR_READ_CMD511 0x0000038D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1378 #define REG_CORE_DIGITAL_SENSOR_READ_CMD512 0x000003CD /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1379 #define REG_CORE_DIGITAL_SENSOR_READ_CMD513 0x0000040D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1380 #define REG_CORE_DIGITAL_SENSOR_READ_CMD514 0x0000044D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1381 #define REG_CORE_DIGITAL_SENSOR_READ_CMD515 0x0000048D /* ADMW_CORE Sensor Read Command5 */
Vkadaba 5:0728bde67bdb 1382 #define REG_CORE_DIGITAL_SENSOR_READ_CMD5n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD50 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1383 #define REG_CORE_DIGITAL_SENSOR_READ_CMD5n_COUNT 16
Vkadaba 5:0728bde67bdb 1384 #define REG_CORE_DIGITAL_SENSOR_READ_CMD6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd6[n] */
Vkadaba 5:0728bde67bdb 1385 #define REG_CORE_DIGITAL_SENSOR_READ_CMD60_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD60 */
Vkadaba 5:0728bde67bdb 1386 #define REG_CORE_DIGITAL_SENSOR_READ_CMD61_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD61 */
Vkadaba 5:0728bde67bdb 1387 #define REG_CORE_DIGITAL_SENSOR_READ_CMD62_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD62 */
Vkadaba 5:0728bde67bdb 1388 #define REG_CORE_DIGITAL_SENSOR_READ_CMD63_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD63 */
Vkadaba 5:0728bde67bdb 1389 #define REG_CORE_DIGITAL_SENSOR_READ_CMD64_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD64 */
Vkadaba 5:0728bde67bdb 1390 #define REG_CORE_DIGITAL_SENSOR_READ_CMD65_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD65 */
Vkadaba 5:0728bde67bdb 1391 #define REG_CORE_DIGITAL_SENSOR_READ_CMD66_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD66 */
Vkadaba 5:0728bde67bdb 1392 #define REG_CORE_DIGITAL_SENSOR_READ_CMD67_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD67 */
Vkadaba 5:0728bde67bdb 1393 #define REG_CORE_DIGITAL_SENSOR_READ_CMD68_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD68 */
Vkadaba 5:0728bde67bdb 1394 #define REG_CORE_DIGITAL_SENSOR_READ_CMD69_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD69 */
Vkadaba 5:0728bde67bdb 1395 #define REG_CORE_DIGITAL_SENSOR_READ_CMD610_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD610 */
Vkadaba 5:0728bde67bdb 1396 #define REG_CORE_DIGITAL_SENSOR_READ_CMD611_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD611 */
Vkadaba 5:0728bde67bdb 1397 #define REG_CORE_DIGITAL_SENSOR_READ_CMD612_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD612 */
Vkadaba 5:0728bde67bdb 1398 #define REG_CORE_DIGITAL_SENSOR_READ_CMD613_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD613 */
Vkadaba 5:0728bde67bdb 1399 #define REG_CORE_DIGITAL_SENSOR_READ_CMD614_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD614 */
Vkadaba 5:0728bde67bdb 1400 #define REG_CORE_DIGITAL_SENSOR_READ_CMD615_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD615 */
Vkadaba 5:0728bde67bdb 1401 #define REG_CORE_DIGITAL_SENSOR_READ_CMD60 0x000000CE /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1402 #define REG_CORE_DIGITAL_SENSOR_READ_CMD61 0x0000010E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1403 #define REG_CORE_DIGITAL_SENSOR_READ_CMD62 0x0000014E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1404 #define REG_CORE_DIGITAL_SENSOR_READ_CMD63 0x0000018E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1405 #define REG_CORE_DIGITAL_SENSOR_READ_CMD64 0x000001CE /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1406 #define REG_CORE_DIGITAL_SENSOR_READ_CMD65 0x0000020E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1407 #define REG_CORE_DIGITAL_SENSOR_READ_CMD66 0x0000024E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1408 #define REG_CORE_DIGITAL_SENSOR_READ_CMD67 0x0000028E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1409 #define REG_CORE_DIGITAL_SENSOR_READ_CMD68 0x000002CE /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1410 #define REG_CORE_DIGITAL_SENSOR_READ_CMD69 0x0000030E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1411 #define REG_CORE_DIGITAL_SENSOR_READ_CMD610 0x0000034E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1412 #define REG_CORE_DIGITAL_SENSOR_READ_CMD611 0x0000038E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1413 #define REG_CORE_DIGITAL_SENSOR_READ_CMD612 0x000003CE /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1414 #define REG_CORE_DIGITAL_SENSOR_READ_CMD613 0x0000040E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1415 #define REG_CORE_DIGITAL_SENSOR_READ_CMD614 0x0000044E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1416 #define REG_CORE_DIGITAL_SENSOR_READ_CMD615 0x0000048E /* ADMW_CORE Sensor Read Command6 */
Vkadaba 5:0728bde67bdb 1417 #define REG_CORE_DIGITAL_SENSOR_READ_CMD6n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD60 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1418 #define REG_CORE_DIGITAL_SENSOR_READ_CMD6n_COUNT 16
Vkadaba 5:0728bde67bdb 1419 #define REG_CORE_DIGITAL_SENSOR_READ_CMD7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd7[n] */
Vkadaba 5:0728bde67bdb 1420 #define REG_CORE_DIGITAL_SENSOR_READ_CMD70_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD70 */
Vkadaba 5:0728bde67bdb 1421 #define REG_CORE_DIGITAL_SENSOR_READ_CMD71_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD71 */
Vkadaba 5:0728bde67bdb 1422 #define REG_CORE_DIGITAL_SENSOR_READ_CMD72_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD72 */
Vkadaba 5:0728bde67bdb 1423 #define REG_CORE_DIGITAL_SENSOR_READ_CMD73_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD73 */
Vkadaba 5:0728bde67bdb 1424 #define REG_CORE_DIGITAL_SENSOR_READ_CMD74_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD74 */
Vkadaba 5:0728bde67bdb 1425 #define REG_CORE_DIGITAL_SENSOR_READ_CMD75_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD75 */
Vkadaba 5:0728bde67bdb 1426 #define REG_CORE_DIGITAL_SENSOR_READ_CMD76_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD76 */
Vkadaba 5:0728bde67bdb 1427 #define REG_CORE_DIGITAL_SENSOR_READ_CMD77_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD77 */
Vkadaba 5:0728bde67bdb 1428 #define REG_CORE_DIGITAL_SENSOR_READ_CMD78_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD78 */
Vkadaba 5:0728bde67bdb 1429 #define REG_CORE_DIGITAL_SENSOR_READ_CMD79_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD79 */
Vkadaba 5:0728bde67bdb 1430 #define REG_CORE_DIGITAL_SENSOR_READ_CMD710_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD710 */
Vkadaba 5:0728bde67bdb 1431 #define REG_CORE_DIGITAL_SENSOR_READ_CMD711_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD711 */
Vkadaba 5:0728bde67bdb 1432 #define REG_CORE_DIGITAL_SENSOR_READ_CMD712_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD712 */
Vkadaba 5:0728bde67bdb 1433 #define REG_CORE_DIGITAL_SENSOR_READ_CMD713_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD713 */
Vkadaba 5:0728bde67bdb 1434 #define REG_CORE_DIGITAL_SENSOR_READ_CMD714_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD714 */
Vkadaba 5:0728bde67bdb 1435 #define REG_CORE_DIGITAL_SENSOR_READ_CMD715_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD715 */
Vkadaba 5:0728bde67bdb 1436 #define REG_CORE_DIGITAL_SENSOR_READ_CMD70 0x000000CF /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1437 #define REG_CORE_DIGITAL_SENSOR_READ_CMD71 0x0000010F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1438 #define REG_CORE_DIGITAL_SENSOR_READ_CMD72 0x0000014F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1439 #define REG_CORE_DIGITAL_SENSOR_READ_CMD73 0x0000018F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1440 #define REG_CORE_DIGITAL_SENSOR_READ_CMD74 0x000001CF /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1441 #define REG_CORE_DIGITAL_SENSOR_READ_CMD75 0x0000020F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1442 #define REG_CORE_DIGITAL_SENSOR_READ_CMD76 0x0000024F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1443 #define REG_CORE_DIGITAL_SENSOR_READ_CMD77 0x0000028F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1444 #define REG_CORE_DIGITAL_SENSOR_READ_CMD78 0x000002CF /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1445 #define REG_CORE_DIGITAL_SENSOR_READ_CMD79 0x0000030F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1446 #define REG_CORE_DIGITAL_SENSOR_READ_CMD710 0x0000034F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1447 #define REG_CORE_DIGITAL_SENSOR_READ_CMD711 0x0000038F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1448 #define REG_CORE_DIGITAL_SENSOR_READ_CMD712 0x000003CF /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1449 #define REG_CORE_DIGITAL_SENSOR_READ_CMD713 0x0000040F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1450 #define REG_CORE_DIGITAL_SENSOR_READ_CMD714 0x0000044F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1451 #define REG_CORE_DIGITAL_SENSOR_READ_CMD715 0x0000048F /* ADMW_CORE Sensor Read Command7 */
Vkadaba 5:0728bde67bdb 1452 #define REG_CORE_DIGITAL_SENSOR_READ_CMD7n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD70 + ((i) * 64))
Vkadaba 5:0728bde67bdb 1453 #define REG_CORE_DIGITAL_SENSOR_READ_CMD7n_COUNT 16
Vkadaba 5:0728bde67bdb 1454
Vkadaba 5:0728bde67bdb 1455 /* ============================================================================================================================
Vkadaba 5:0728bde67bdb 1456 ADMW_CORE Register BitMasks, Positions & Enumerations
Vkadaba 5:0728bde67bdb 1457 ============================================================================================================================ */
Vkadaba 5:0728bde67bdb 1458 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1459 ADMW_CORE_COMMAND Pos/Masks Description
Vkadaba 5:0728bde67bdb 1460 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1461 #define BITP_CORE_COMMAND_SPECIAL_COMMAND 0 /* Special Command */
Vkadaba 5:0728bde67bdb 1462 #define BITM_CORE_COMMAND_SPECIAL_COMMAND 0x000000FF /* Special Command */
Vkadaba 5:0728bde67bdb 1463 #define ENUM_CORE_COMMAND_NOP 0x00000000 /* Special_Command: No Command */
Vkadaba 5:0728bde67bdb 1464 #define ENUM_CORE_COMMAND_CONVERT 0x00000001 /* Special_Command: Start ADC Conversions */
Vkadaba 5:0728bde67bdb 1465 #define ENUM_CORE_COMMAND_CONVERT_WITH_RAW 0x00000002 /* Special_Command: Start Conversions with Added RAW ADC Data */
Vkadaba 5:0728bde67bdb 1466 #define ENUM_CORE_COMMAND_RUN_DIAGNOSTICS 0x00000003 /* Special_Command: Initiate a Diagnostics Cycle */
Vkadaba 5:0728bde67bdb 1467 #define ENUM_CORE_COMMAND_SELF_CALIBRATION 0x00000004 /* Special_Command: Initiate a Self-Calibration Cycle */
Vkadaba 5:0728bde67bdb 1468 #define ENUM_CORE_COMMAND_LATCH_CONFIG 0x00000007 /* Special_Command: Latch Configuration. */
Vkadaba 5:0728bde67bdb 1469 #define ENUM_CORE_COMMAND_LOAD_LUT 0x00000008 /* Special_Command: Load LUT from FLASH */
Vkadaba 5:0728bde67bdb 1470 #define ENUM_CORE_COMMAND_SAVE_LUT 0x00000009 /* Special_Command: Save LUT to FLASH */
Vkadaba 5:0728bde67bdb 1471 #define ENUM_CORE_COMMAND_SYSTEM_CHECK 0x0000000A /* Special_Command: Full Suite of Measurement Diagnostics */
Vkadaba 5:0728bde67bdb 1472 #define ENUM_CORE_COMMAND_CONVERT_FFT 0x0000000B /* Special_Command: Perform FFTs on Selected Channel(s) */
Vkadaba 5:0728bde67bdb 1473 #define ENUM_CORE_COMMAND_ERASE_EXTERNAL_FLASH 0x00000010 /* Special_Command: Erase Contents of External Flash */
Vkadaba 5:0728bde67bdb 1474 #define ENUM_CORE_COMMAND_POWER_DOWN 0x00000014 /* Special_Command: Enter Low Power State */
Vkadaba 5:0728bde67bdb 1475 #define ENUM_CORE_COMMAND_LOAD_CONFIG_1 0x00000018 /* Special_Command: Load Registers with Configuration#1 from FLASH */
Vkadaba 5:0728bde67bdb 1476 #define ENUM_CORE_COMMAND_SAVE_CONFIG_1 0x00000019 /* Special_Command: Store Current Registers to FLASH Configuration#1 */
Vkadaba 5:0728bde67bdb 1477 #define ENUM_CORE_COMMAND_LOAD_CONFIG_2 0x0000001A /* Special_Command: Load Registers with Configuration#2 from FLASH */
Vkadaba 5:0728bde67bdb 1478 #define ENUM_CORE_COMMAND_SAVE_CONFIG_2 0x0000001B /* Special_Command: Store Current Registers to FLASH Configuration#2 */
Vkadaba 5:0728bde67bdb 1479 #define ENUM_CORE_COMMAND_LOAD_CONFIG_3 0x0000001C /* Special_Command: Load Registers with Configuration#3 from FLASH */
Vkadaba 5:0728bde67bdb 1480 #define ENUM_CORE_COMMAND_SAVE_CONFIG_3 0x0000001D /* Special_Command: Store Current Registers to FLASH Configuration#3 */
Vkadaba 5:0728bde67bdb 1481 #define ENUM_CORE_COMMAND_LOAD_CONFIG_4 0x0000001E /* Special_Command: Load Registers with Configuration#4 from FLASH */
Vkadaba 5:0728bde67bdb 1482 #define ENUM_CORE_COMMAND_SAVE_CONFIG_4 0x0000001F /* Special_Command: Store Current Registers to FLASH Configuration#4 */
Vkadaba 5:0728bde67bdb 1483 #define ENUM_CORE_COMMAND_CALIBRATE_DIGITAL 0x00000020 /* Special_Command: Performs a Calibration of Digital Sensor, if Supported & Enabled. */
Vkadaba 5:0728bde67bdb 1484
Vkadaba 5:0728bde67bdb 1485 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1486 ADMW_CORE_MODE Pos/Masks Description
Vkadaba 5:0728bde67bdb 1487 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1488 #define BITP_CORE_MODE_EXT_FLASH_STORE 7 /* Indicates If Measurement Data Should Be Stored in Flash */
Vkadaba 5:0728bde67bdb 1489 #define BITP_CORE_MODE_FFT_MODE 5 /* Indicates Single or Multiple Sequence of FFTs */
Vkadaba 5:0728bde67bdb 1490 #define BITP_CORE_MODE_CALIBRATION_METHOD 4 /* Indicates If Calibration is Required on 'Latch' Command */
Vkadaba 5:0728bde67bdb 1491 #define BITP_CORE_MODE_DRDY_MODE 2 /* Indicates Behavior of DRDY with Respect to FIFO State */
Vkadaba 5:0728bde67bdb 1492 #define BITP_CORE_MODE_CONVERSION_MODE 0 /* Conversion Mode */
Vkadaba 5:0728bde67bdb 1493 #define BITM_CORE_MODE_EXT_FLASH_STORE 0x00000080 /* Indicates If Measurement Data Should Be Stored in Flash */
Vkadaba 5:0728bde67bdb 1494 #define BITM_CORE_MODE_FFT_MODE 0x00000020 /* Indicates Single or Multiple Sequence of FFTs */
Vkadaba 5:0728bde67bdb 1495 #define BITM_CORE_MODE_CALIBRATION_METHOD 0x00000010 /* Indicates If Calibration is Required on 'Latch' Command */
Vkadaba 5:0728bde67bdb 1496 #define BITM_CORE_MODE_DRDY_MODE 0x0000000C /* Indicates Behavior of DRDY with Respect to FIFO State */
Vkadaba 5:0728bde67bdb 1497 #define BITM_CORE_MODE_CONVERSION_MODE 0x00000003 /* Conversion Mode */
Vkadaba 5:0728bde67bdb 1498 #define ENUM_CORE_MODE_EXT_FLASH_NOT_USED 0x00000000 /* Ext_Flash_Store: Do Not Use External Flash */
Vkadaba 5:0728bde67bdb 1499 #define ENUM_CORE_MODE_EXT_FLASH_USED 0x00000080 /* Ext_Flash_Store: Use External Flash */
Vkadaba 5:0728bde67bdb 1500 #define ENUM_CORE_MODE_FFT_MODE_SINGLE 0x00000000 /* FFT_Mode: Perform Single Sequence of FFT(s) on Selected Channel(s) */
Vkadaba 5:0728bde67bdb 1501 #define ENUM_CORE_MODE_FFT_MODE_CONTINUOUS 0x00000020 /* FFT_Mode: Perform Continuous Sequence of FFTs on Selected Channel(s) */
Vkadaba 5:0728bde67bdb 1502 #define ENUM_CORE_MODE_NO_CAL 0x00000000 /* Calibration_Method: No Calibration Performed */
Vkadaba 5:0728bde67bdb 1503 #define ENUM_CORE_MODE_DO_CAL 0x00000010 /* Calibration_Method: Calibration Performed */
Vkadaba 5:0728bde67bdb 1504 #define ENUM_CORE_MODE_DRDY_PER_CONVERSION 0x00000000 /* Drdy_Mode: Data Ready Per Conversion */
Vkadaba 5:0728bde67bdb 1505 #define ENUM_CORE_MODE_DRDY_PER_CYCLE 0x00000004 /* Drdy_Mode: Data Ready Per Cycle */
Vkadaba 5:0728bde67bdb 1506 #define ENUM_CORE_MODE_DRDY_PER_FIFO_FILL 0x00000008 /* Drdy_Mode: Data Ready Per FIFO Fill / Multi-Cycle Burst */
Vkadaba 5:0728bde67bdb 1507 #define ENUM_CORE_MODE_SINGLECYCLE 0x00000000 /* Conversion_Mode: Single Cycle */
Vkadaba 5:0728bde67bdb 1508 #define ENUM_CORE_MODE_MULTICYCLE 0x00000001 /* Conversion_Mode: Multi Cycle */
Vkadaba 5:0728bde67bdb 1509 #define ENUM_CORE_MODE_CONTINUOUS 0x00000002 /* Conversion_Mode: Continuous Conversion */
Vkadaba 5:0728bde67bdb 1510
Vkadaba 5:0728bde67bdb 1511 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1512 ADMW_CORE_POWER_CONFIG Pos/Masks Description
Vkadaba 5:0728bde67bdb 1513 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1514 #define BITP_CORE_POWER_CONFIG_POWER_MODE_ADC 0 /* ADC Power Mode */
Vkadaba 5:0728bde67bdb 1515 #define BITM_CORE_POWER_CONFIG_POWER_MODE_ADC 0x00000003 /* ADC Power Mode */
Vkadaba 5:0728bde67bdb 1516 #define ENUM_CORE_POWER_CONFIG_ADC_LOW_POWER 0x00000000 /* Power_Mode_ADC: ADC Low Power Mode */
Vkadaba 5:0728bde67bdb 1517 #define ENUM_CORE_POWER_CONFIG_ADC_MID_POWER 0x00000001 /* Power_Mode_ADC: ADC Mid Power Mode */
Vkadaba 5:0728bde67bdb 1518 #define ENUM_CORE_POWER_CONFIG_ADC_FULL_POWER 0x00000002 /* Power_Mode_ADC: ADC Full Power Mode */
Vkadaba 5:0728bde67bdb 1519
Vkadaba 5:0728bde67bdb 1520 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1521 ADMW_CORE_CYCLE_CONTROL Pos/Masks Description
Vkadaba 5:0728bde67bdb 1522 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1523 #define BITP_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 14 /* Units for Cycle Time */
Vkadaba 5:0728bde67bdb 1524 #define BITP_CORE_CYCLE_CONTROL_FILTER_SETTLING 13 /* Determines ADC Filter Settling in a Multi-Channel Sequence */
Vkadaba 5:0728bde67bdb 1525 #define BITP_CORE_CYCLE_CONTROL_CYCLE_TYPE 12 /* Type of Measurement Cycle */
Vkadaba 5:0728bde67bdb 1526 #define BITP_CORE_CYCLE_CONTROL_CYCLE_TIME 0 /* Duration of a Full Measurement Cycle */
Vkadaba 5:0728bde67bdb 1527 #define BITM_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 0x0000C000 /* Units for Cycle Time */
Vkadaba 5:0728bde67bdb 1528 #define BITM_CORE_CYCLE_CONTROL_FILTER_SETTLING 0x00002000 /* Determines ADC Filter Settling in a Multi-Channel Sequence */
Vkadaba 5:0728bde67bdb 1529 #define BITM_CORE_CYCLE_CONTROL_CYCLE_TYPE 0x00001000 /* Type of Measurement Cycle */
Vkadaba 5:0728bde67bdb 1530 #define BITM_CORE_CYCLE_CONTROL_CYCLE_TIME 0x00000FFF /* Duration of a Full Measurement Cycle */
Vkadaba 5:0728bde67bdb 1531 #define ENUM_CORE_CYCLE_CONTROL_MICROSECONDS 0x00000000 /* Cycle_Time_Units: Micro-Seconds */
Vkadaba 5:0728bde67bdb 1532 #define ENUM_CORE_CYCLE_CONTROL_MILLISECONDS 0x00004000 /* Cycle_Time_Units: Milli-Seconds */
Vkadaba 5:0728bde67bdb 1533 #define ENUM_CORE_CYCLE_CONTROL_SECONDS 0x00008000 /* Cycle_Time_Units: Seconds */
Vkadaba 5:0728bde67bdb 1534 #define ENUM_CORE_CYCLE_CONTROL_FILTER_SETTLING_SETTLED 0x00000000 /* Filter_Settling: ADC Result Fully Settles for Every Output */
Vkadaba 5:0728bde67bdb 1535 #define ENUM_CORE_CYCLE_CONTROL_FILTER_SETTLING_FAST 0x00002000 /* Filter_Settling: ADC Result Appears at Higher Update Rate for Consecutive Conversions */
Vkadaba 5:0728bde67bdb 1536 #define ENUM_CORE_CYCLE_CONTROL_CYCLE_TYPE_SWITCH 0x00000000 /* Cycle_Type: Switch Channels After Every Conversion */
Vkadaba 5:0728bde67bdb 1537 #define ENUM_CORE_CYCLE_CONTROL_CYCLE_TYPE_FULL 0x00001000 /* Cycle_Type: Perform Full Number Of Conversions On A Channel Consecutively */
Vkadaba 5:0728bde67bdb 1538
Vkadaba 5:0728bde67bdb 1539 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1540 ADMW_CORE_FIFO_NUM_CYCLES Pos/Masks Description
Vkadaba 5:0728bde67bdb 1541 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1542 #define BITP_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0 /* How Many Cycles to Fill FIFO */
Vkadaba 5:0728bde67bdb 1543 #define BITM_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0x000000FF /* How Many Cycles to Fill FIFO */
Vkadaba 5:0728bde67bdb 1544
Vkadaba 5:0728bde67bdb 1545 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1546 ADMW_CORE_MULTI_CYCLE_REPEAT_INTERVAL Pos/Masks Description
Vkadaba 5:0728bde67bdb 1547 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1548 #define BITP_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0 /* Defines Time Between Repetitions of Measurement Cycles. */
Vkadaba 5:0728bde67bdb 1549 #define BITM_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0x00FFFFFF /* Defines Time Between Repetitions of Measurement Cycles. */
Vkadaba 5:0728bde67bdb 1550
Vkadaba 5:0728bde67bdb 1551 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1552 ADMW_CORE_STATUS Pos/Masks Description
Vkadaba 5:0728bde67bdb 1553 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1554 #define BITP_CORE_STATUS_FIFO_ERROR 5 /* Indicates Error with FIFO */
Vkadaba 5:0728bde67bdb 1555 #define BITP_CORE_STATUS_CMD_RUNNING 4 /* Indicates a Special Command is Active */
Vkadaba 5:0728bde67bdb 1556 #define BITP_CORE_STATUS_DRDY 3 /* Indicates a New Sensor Result is Available to Be Read */
Vkadaba 5:0728bde67bdb 1557 #define BITP_CORE_STATUS_ERROR 2 /* Indicates an Error */
Vkadaba 5:0728bde67bdb 1558 #define BITP_CORE_STATUS_ALERT_ACTIVE 1 /* Indicates One or More Sensors Alerts are Active */
Vkadaba 5:0728bde67bdb 1559 #define BITM_CORE_STATUS_FIFO_ERROR 0x00000020 /* Indicates Error with FIFO */
Vkadaba 5:0728bde67bdb 1560 #define BITM_CORE_STATUS_CMD_RUNNING 0x00000010 /* Indicates a Special Command is Active */
Vkadaba 5:0728bde67bdb 1561 #define BITM_CORE_STATUS_DRDY 0x00000008 /* Indicates a New Sensor Result is Available to Be Read */
Vkadaba 5:0728bde67bdb 1562 #define BITM_CORE_STATUS_ERROR 0x00000004 /* Indicates an Error */
Vkadaba 5:0728bde67bdb 1563 #define BITM_CORE_STATUS_ALERT_ACTIVE 0x00000002 /* Indicates One or More Sensors Alerts are Active */
Vkadaba 5:0728bde67bdb 1564
Vkadaba 5:0728bde67bdb 1565 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1566 ADMW_CORE_DIAGNOSTICS_STATUS Pos/Masks Description
Vkadaba 5:0728bde67bdb 1567 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1568 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 13 /* Indicates Error During Internal Device Calibrations */
Vkadaba 5:0728bde67bdb 1569 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 12 /* Indicates Error During Internal ADC Conversions */
Vkadaba 5:0728bde67bdb 1570 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 3 /* Indicates Fault on Internal Supply Regulator Capacitor */
Vkadaba 5:0728bde67bdb 1571 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 2 /* Indicates Low Voltage on Internal Supply Voltages */
Vkadaba 5:0728bde67bdb 1572 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 1 /* Indicates Error on Internal Device Communications */
Vkadaba 5:0728bde67bdb 1573 #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0 /* Indicates Error on Internal Checksum Calculations */
Vkadaba 5:0728bde67bdb 1574 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 0x00002000 /* Indicates Error During Internal Device Calibrations */
Vkadaba 5:0728bde67bdb 1575 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 0x00001000 /* Indicates Error During Internal ADC Conversions */
Vkadaba 5:0728bde67bdb 1576 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 0x00000008 /* Indicates Fault on Internal Supply Regulator Capacitor */
Vkadaba 5:0728bde67bdb 1577 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 0x00000004 /* Indicates Low Voltage on Internal Supply Voltages */
Vkadaba 5:0728bde67bdb 1578 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 0x00000002 /* Indicates Error on Internal Device Communications */
Vkadaba 5:0728bde67bdb 1579 #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0x00000001 /* Indicates Error on Internal Checksum Calculations */
Vkadaba 5:0728bde67bdb 1580
Vkadaba 5:0728bde67bdb 1581 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1582 ADMW_CORE_CHANNEL_ALERT_STATUS Pos/Masks Description
Vkadaba 5:0728bde67bdb 1583 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1584 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH15 15 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1585 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH14 14 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1586 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH13 13 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1587 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 12 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1588 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 11 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1589 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 10 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1590 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 9 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1591 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 8 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1592 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 7 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1593 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 6 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1594 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 5 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1595 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 4 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1596 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 3 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1597 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 2 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1598 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 1 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1599 #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1600 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH15 0x00008000 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1601 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH14 0x00004000 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1602 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH13 0x00002000 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1603 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 0x00001000 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1604 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 0x00000800 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1605 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 0x00000400 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1606 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 0x00000200 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1607 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 0x00000100 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1608 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 0x00000080 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1609 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 0x00000040 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1610 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 0x00000020 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1611 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 0x00000010 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1612 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 0x00000008 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1613 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 0x00000004 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1614 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 0x00000002 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1615 #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0x00000001 /* Indicates Channel Alert is Active */
Vkadaba 5:0728bde67bdb 1616
Vkadaba 5:0728bde67bdb 1617 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1618 ADMW_CORE_ALERT_STATUS_2 Pos/Masks Description
Vkadaba 5:0728bde67bdb 1619 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1620 #define BITP_CORE_ALERT_STATUS_2_EXT_FLASH_ERROR 7 /* Indicates with External Flash Memory */
Vkadaba 5:0728bde67bdb 1621 #define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_LO 6 /* Indicates Device Temperature Low Alarm */
Vkadaba 5:0728bde67bdb 1622 #define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_HI 5 /* Indicates Device Temperature High Alarm */
Vkadaba 5:0728bde67bdb 1623 #define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_LO 4 /* Indicates Device Temperature Low Alert */
Vkadaba 5:0728bde67bdb 1624 #define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_HI 3 /* Indicates Device Temperature High Alert */
Vkadaba 5:0728bde67bdb 1625 #define BITP_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 2 /* Indicates Error with Programmed Configuration */
Vkadaba 5:0728bde67bdb 1626 #define BITP_CORE_ALERT_STATUS_2_LUT_ERROR 1 /* Indicates Error with One or More Look-Up-Tables */
Vkadaba 5:0728bde67bdb 1627 #define BITM_CORE_ALERT_STATUS_2_EXT_FLASH_ERROR 0x00000080 /* Indicates with External Flash Memory */
Vkadaba 5:0728bde67bdb 1628 #define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_LO 0x00000040 /* Indicates Device Temperature Low Alarm */
Vkadaba 5:0728bde67bdb 1629 #define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_HI 0x00000020 /* Indicates Device Temperature High Alarm */
Vkadaba 5:0728bde67bdb 1630 #define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_LO 0x00000010 /* Indicates Device Temperature Low Alert */
Vkadaba 5:0728bde67bdb 1631 #define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_HI 0x00000008 /* Indicates Device Temperature High Alert */
Vkadaba 5:0728bde67bdb 1632 #define BITM_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 0x00000004 /* Indicates Error with Programmed Configuration */
Vkadaba 5:0728bde67bdb 1633 #define BITM_CORE_ALERT_STATUS_2_LUT_ERROR 0x00000002 /* Indicates Error with One or More Look-Up-Tables */
Vkadaba 5:0728bde67bdb 1634
Vkadaba 5:0728bde67bdb 1635 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1636 ADMW_CORE_ALERT_DETAIL_CH[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 1637 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1638 #define BITP_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 15 /* Indicates Compensation Channel Not Ready When Required */
Vkadaba 5:0728bde67bdb 1639 #define BITP_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 14 /* Indicates Digital Sensor Not Ready When Read */
Vkadaba 5:0728bde67bdb 1640 #define BITP_CORE_ALERT_DETAIL_CH_CORRECTION_OVERRANGE 13 /* Indicates Result Larger Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 1641 #define BITP_CORE_ALERT_DETAIL_CH_CORRECTION_UNDERRANGE 12 /* Indicates Result Less Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 1642 #define BITP_CORE_ALERT_DETAIL_CH_OVER_VOLTAGE 11 /* Indicates Channel Over-Voltage */
Vkadaba 5:0728bde67bdb 1643 #define BITP_CORE_ALERT_DETAIL_CH_UNDER_VOLTAGE 10 /* Indicates Channel Under-Voltage */
Vkadaba 5:0728bde67bdb 1644 #define BITP_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 9 /* Indicates Error with Channel Look-Up-Table */
Vkadaba 5:0728bde67bdb 1645 #define BITP_CORE_ALERT_DETAIL_CH_CONFIG_ERR 8 /* Indicates Configuration Error on Channel */
Vkadaba 5:0728bde67bdb 1646 #define BITP_CORE_ALERT_DETAIL_CH_CALIBRATION_INVALID 7 /* Indicates Problem During Calibration of Channel */
Vkadaba 5:0728bde67bdb 1647 #define BITP_CORE_ALERT_DETAIL_CH_REF_DETECT 6 /* Indicates Whether ADC Reference is Valid */
Vkadaba 5:0728bde67bdb 1648 #define BITP_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 5 /* Indicates Sensor Input is Open Circuit */
Vkadaba 5:0728bde67bdb 1649 #define BITP_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 4 /* Indicates Sensor Result is Greater Than High Limit */
Vkadaba 5:0728bde67bdb 1650 #define BITP_CORE_ALERT_DETAIL_CH_LOW_LIMIT 3 /* Indicates Sensor Result is Less Than Low Limit */
Vkadaba 5:0728bde67bdb 1651 #define BITP_CORE_ALERT_DETAIL_CH_OVER_RANGE 2 /* Indicates Channel Over-Range */
Vkadaba 5:0728bde67bdb 1652 #define BITP_CORE_ALERT_DETAIL_CH_UNDER_RANGE 1 /* Indicates Channel Under-Range */
Vkadaba 5:0728bde67bdb 1653 #define BITP_CORE_ALERT_DETAIL_CH_TIME_OUT 0 /* Indicates Time-Out Error from Digital Sensor */
Vkadaba 5:0728bde67bdb 1654 #define BITM_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 0x00008000 /* Indicates Compensation Channel Not Ready When Required */
Vkadaba 5:0728bde67bdb 1655 #define BITM_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 0x00004000 /* Indicates Digital Sensor Not Ready When Read */
Vkadaba 5:0728bde67bdb 1656 #define BITM_CORE_ALERT_DETAIL_CH_CORRECTION_OVERRANGE 0x00002000 /* Indicates Result Larger Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 1657 #define BITM_CORE_ALERT_DETAIL_CH_CORRECTION_UNDERRANGE 0x00001000 /* Indicates Result Less Than LUT/Equation Range */
Vkadaba 5:0728bde67bdb 1658 #define BITM_CORE_ALERT_DETAIL_CH_OVER_VOLTAGE 0x00000800 /* Indicates Channel Over-Voltage */
Vkadaba 5:0728bde67bdb 1659 #define BITM_CORE_ALERT_DETAIL_CH_UNDER_VOLTAGE 0x00000400 /* Indicates Channel Under-Voltage */
Vkadaba 5:0728bde67bdb 1660 #define BITM_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 0x00000200 /* Indicates Error with Channel Look-Up-Table */
Vkadaba 5:0728bde67bdb 1661 #define BITM_CORE_ALERT_DETAIL_CH_CONFIG_ERR 0x00000100 /* Indicates Configuration Error on Channel */
Vkadaba 5:0728bde67bdb 1662 #define BITM_CORE_ALERT_DETAIL_CH_CALIBRATION_INVALID 0x00000080 /* Indicates Problem During Calibration of Channel */
Vkadaba 5:0728bde67bdb 1663 #define BITM_CORE_ALERT_DETAIL_CH_REF_DETECT 0x00000040 /* Indicates Whether ADC Reference is Valid */
Vkadaba 5:0728bde67bdb 1664 #define BITM_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 0x00000020 /* Indicates Sensor Input is Open Circuit */
Vkadaba 5:0728bde67bdb 1665 #define BITM_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 0x00000010 /* Indicates Sensor Result is Greater Than High Limit */
Vkadaba 5:0728bde67bdb 1666 #define BITM_CORE_ALERT_DETAIL_CH_LOW_LIMIT 0x00000008 /* Indicates Sensor Result is Less Than Low Limit */
Vkadaba 5:0728bde67bdb 1667 #define BITM_CORE_ALERT_DETAIL_CH_OVER_RANGE 0x00000004 /* Indicates Channel Over-Range */
Vkadaba 5:0728bde67bdb 1668 #define BITM_CORE_ALERT_DETAIL_CH_UNDER_RANGE 0x00000002 /* Indicates Channel Under-Range */
Vkadaba 5:0728bde67bdb 1669 #define BITM_CORE_ALERT_DETAIL_CH_TIME_OUT 0x00000001 /* Indicates Time-Out Error from Digital Sensor */
Vkadaba 5:0728bde67bdb 1670
Vkadaba 5:0728bde67bdb 1671 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1672 ADMW_CORE_ERROR_CODE Pos/Masks Description
Vkadaba 5:0728bde67bdb 1673 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1674 #define BITP_CORE_ERROR_CODE_ERROR_CODE 0 /* Code Indicating Type of Error */
Vkadaba 5:0728bde67bdb 1675 #define BITM_CORE_ERROR_CODE_ERROR_CODE 0x0000FFFF /* Code Indicating Type of Error */
Vkadaba 5:0728bde67bdb 1676
Vkadaba 5:0728bde67bdb 1677 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1678 ADMW_CORE_ALERT_CODE Pos/Masks Description
Vkadaba 5:0728bde67bdb 1679 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1680 #define BITP_CORE_ALERT_CODE_ALERT_CODE 0 /* Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 1681 #define BITM_CORE_ALERT_CODE_ALERT_CODE 0x0000FFFF /* Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 1682
Vkadaba 5:0728bde67bdb 1683 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1684 ADMW_CORE_EXTERNAL_REFERENCE1 Pos/Masks Description
Vkadaba 5:0728bde67bdb 1685 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1686 #define BITP_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0 /* Refin1 Value */
Vkadaba 5:0728bde67bdb 1687 #define BITM_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0xFFFFFFFF /* Refin1 Value */
Vkadaba 5:0728bde67bdb 1688
Vkadaba 5:0728bde67bdb 1689 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1690 ADMW_CORE_EXTERNAL_REFERENCE2 Pos/Masks Description
Vkadaba 5:0728bde67bdb 1691 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1692 #define BITP_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0 /* Refin2 Value */
Vkadaba 5:0728bde67bdb 1693 #define BITM_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0xFFFFFFFF /* Refin2 Value */
Vkadaba 5:0728bde67bdb 1694
Vkadaba 5:0728bde67bdb 1695 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1696 ADMW_CORE_DIAGNOSTICS_CONTROL Pos/Masks Description
Vkadaba 5:0728bde67bdb 1697 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1698 #define BITP_CORE_DIAGNOSTICS_CONTROL_TEMPERARURE_ALARM_ACTION 4 /* Determines Output in Response to Temperature Alarm */
Vkadaba 5:0728bde67bdb 1699 #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 2 /* Diagnostics Open Sensor Detect Frequency */
Vkadaba 5:0728bde67bdb 1700 #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 1 /* Diagnostics Measure Enable */
Vkadaba 5:0728bde67bdb 1701 #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0 /* Diagnostics Global Enable */
Vkadaba 5:0728bde67bdb 1702 #define BITM_CORE_DIAGNOSTICS_CONTROL_TEMPERARURE_ALARM_ACTION 0x00000010 /* Determines Output in Response to Temperature Alarm */
Vkadaba 5:0728bde67bdb 1703 #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 0x0000000C /* Diagnostics Open Sensor Detect Frequency */
Vkadaba 5:0728bde67bdb 1704 #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 0x00000002 /* Diagnostics Measure Enable */
Vkadaba 5:0728bde67bdb 1705 #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0x00000001 /* Diagnostics Global Enable */
Vkadaba 5:0728bde67bdb 1706 #define ENUM_CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_NAN 0x00000000 /* Temperarure_Alarm_Action: Sensor Output Equals Not-A-Number in Response to Temperature Alarm */
Vkadaba 5:0728bde67bdb 1707 #define ENUM_CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_OUTPUT_ACTIVE 0x00000010 /* Temperarure_Alarm_Action: Sensor Output is not Clamped to Not-A-Number in Response to Temperature Alarm */
Vkadaba 5:0728bde67bdb 1708 #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_OFF 0x00000000 /* Diag_OSD_Freq: No Open-Circuit Detection During Measurement */
Vkadaba 5:0728bde67bdb 1709 #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE 0x00000004 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Measurement Cycle */
Vkadaba 5:0728bde67bdb 1710 #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES 0x00000008 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */
Vkadaba 5:0728bde67bdb 1711 #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES 0x0000000C /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */
Vkadaba 5:0728bde67bdb 1712
Vkadaba 5:0728bde67bdb 1713 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1714 ADMW_CORE_DATA_FIFO Pos/Masks Description
Vkadaba 5:0728bde67bdb 1715 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1716 #define BITP_CORE_DATA_FIFO_DATA_FIFO 0 /* Fifo Buffer of Sensor Results */
Vkadaba 5:0728bde67bdb 1717 #define BITM_CORE_DATA_FIFO_DATA_FIFO 0x000000FF /* Fifo Buffer of Sensor Results */
Vkadaba 5:0728bde67bdb 1718
Vkadaba 5:0728bde67bdb 1719 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1720 ADMW_CORE_DEBUG_CODE Pos/Masks Description
Vkadaba 5:0728bde67bdb 1721 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1722 #define BITP_CORE_DEBUG_CODE_DEBUG_CODE 0 /* Additional Information on Source of Alert or Errors */
Vkadaba 5:0728bde67bdb 1723 #define BITM_CORE_DEBUG_CODE_DEBUG_CODE 0xFFFFFFFF /* Additional Information on Source of Alert or Errors */
Vkadaba 5:0728bde67bdb 1724
Vkadaba 5:0728bde67bdb 1725 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1726 ADMW_CORE_FFT_CONFIG Pos/Masks Description
Vkadaba 5:0728bde67bdb 1727 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1728 #define BITP_CORE_FFT_CONFIG_FFT_NUM_CHANNELS 6 /* Indicates Number of Channels for FFT */
Vkadaba 5:0728bde67bdb 1729 #define BITP_CORE_FFT_CONFIG_FFT_OUTPUT 4 /* Indicates FFT Output Format */
Vkadaba 5:0728bde67bdb 1730 #define BITP_CORE_FFT_CONFIG_FFT_WINDOW 2 /* Indicates Window Type for FFT */
Vkadaba 5:0728bde67bdb 1731 #define BITP_CORE_FFT_CONFIG_FFT_NUM_BINS 0 /* Indicates Number of Bins in FFT */
Vkadaba 5:0728bde67bdb 1732 #define BITM_CORE_FFT_CONFIG_FFT_NUM_CHANNELS 0x000000C0 /* Indicates Number of Channels for FFT */
Vkadaba 5:0728bde67bdb 1733 #define BITM_CORE_FFT_CONFIG_FFT_OUTPUT 0x00000030 /* Indicates FFT Output Format */
Vkadaba 5:0728bde67bdb 1734 #define BITM_CORE_FFT_CONFIG_FFT_WINDOW 0x0000000C /* Indicates Window Type for FFT */
Vkadaba 5:0728bde67bdb 1735 #define BITM_CORE_FFT_CONFIG_FFT_NUM_BINS 0x00000003 /* Indicates Number of Bins in FFT */
Vkadaba 5:0728bde67bdb 1736 #define ENUM_CORE_FFT_CONFIG_FFT_CHANS_1 0x00000000 /* FFT_Num_Channels: One FFT Channel */
Vkadaba 5:0728bde67bdb 1737 #define ENUM_CORE_FFT_CONFIG_FFT_CHANS_2 0x00000040 /* FFT_Num_Channels: Two FFT Channels */
Vkadaba 5:0728bde67bdb 1738 #define ENUM_CORE_FFT_CONFIG_FFT_CHANS_3 0x00000080 /* FFT_Num_Channels: Three FFT Channels */
Vkadaba 5:0728bde67bdb 1739 #define ENUM_CORE_FFT_CONFIG_FFT_CHANS_4 0x000000C0 /* FFT_Num_Channels: Four FFT Channels */
Vkadaba 5:0728bde67bdb 1740 #define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_FULL 0x00000000 /* FFT_Output: N/2-Term Amplitude Response */
Vkadaba 5:0728bde67bdb 1741 #define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_MAX16 0x00000010 /* FFT_Output: Bin-Number and Amplitude of 16 Highest Peaks of Amplitude Response */
Vkadaba 5:0728bde67bdb 1742 #define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_FULL_WITH_RAW 0x00000020 /* FFT_Output: N/2-Term Amplitude Response Plus N Raw ADC Samples */
Vkadaba 5:0728bde67bdb 1743 #define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_NONE 0x00000000 /* FFT_Window: No Window */
Vkadaba 5:0728bde67bdb 1744 #define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_HANN 0x00000004 /* FFT_Window: Hann Window */
Vkadaba 5:0728bde67bdb 1745 #define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_BLACKMANN_HARRIS 0x00000008 /* FFT_Window: Blackman-Harris-Nuttall Window */
Vkadaba 5:0728bde67bdb 1746 #define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_TBD 0x0000000C /* FFT_Window: Reserved */
Vkadaba 5:0728bde67bdb 1747 #define ENUM_CORE_FFT_CONFIG_FFT_BINS_256 0x00000000 /* FFT_Num_Bins: FFT Size 256 */
Vkadaba 5:0728bde67bdb 1748 #define ENUM_CORE_FFT_CONFIG_FFT_BINS_512 0x00000001 /* FFT_Num_Bins: FFT Size 512 */
Vkadaba 5:0728bde67bdb 1749 #define ENUM_CORE_FFT_CONFIG_FFT_BINS_1024 0x00000002 /* FFT_Num_Bins: FFT Size 1024 */
Vkadaba 5:0728bde67bdb 1750 #define ENUM_CORE_FFT_CONFIG_FFT_BINS_2048 0x00000003 /* FFT_Num_Bins: FFT Size 2048 */
Vkadaba 5:0728bde67bdb 1751
Vkadaba 5:0728bde67bdb 1752 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1753 ADMW_CORE_ADVANCED_SENSOR_ACCESS Pos/Masks Description
Vkadaba 5:0728bde67bdb 1754 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1755 #define BITP_CORE_ADVANCED_SENSOR_ACCESS_ADVANCED_SENSOR_ACCESS 0 /* Write Specific Key Value to Access Advanced Sensors */
Vkadaba 5:0728bde67bdb 1756 #define BITM_CORE_ADVANCED_SENSOR_ACCESS_ADVANCED_SENSOR_ACCESS 0x0000FFFF /* Write Specific Key Value to Access Advanced Sensors */
Vkadaba 5:0728bde67bdb 1757
Vkadaba 5:0728bde67bdb 1758 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1759 ADMW_CORE_LUT_SELECT Pos/Masks Description
Vkadaba 5:0728bde67bdb 1760 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1761 #define BITP_CORE_LUT_SELECT_LUT_RW 7 /* Read or Write LUT Data */
Vkadaba 5:0728bde67bdb 1762 #define BITM_CORE_LUT_SELECT_LUT_RW 0x00000080 /* Read or Write LUT Data */
Vkadaba 5:0728bde67bdb 1763 #define ENUM_CORE_LUT_SELECT_LUT_READ 0x00000000 /* LUT_RW: Read Addressed LUT Data */
Vkadaba 5:0728bde67bdb 1764 #define ENUM_CORE_LUT_SELECT_LUT_WRITE 0x00000080 /* LUT_RW: Write Addressed LUT Data */
Vkadaba 5:0728bde67bdb 1765
Vkadaba 5:0728bde67bdb 1766 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1767 ADMW_CORE_LUT_OFFSET Pos/Masks Description
Vkadaba 5:0728bde67bdb 1768 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1769 #define BITP_CORE_LUT_OFFSET_LUT_OFFSET 0 /* Offset into Look-Up-Table */
Vkadaba 5:0728bde67bdb 1770 #define BITM_CORE_LUT_OFFSET_LUT_OFFSET 0x00003FFF /* Offset into Look-Up-Table */
Vkadaba 5:0728bde67bdb 1771
Vkadaba 5:0728bde67bdb 1772 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1773 ADMW_CORE_LUT_DATA Pos/Masks Description
Vkadaba 5:0728bde67bdb 1774 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1775 #define BITP_CORE_LUT_DATA_LUT_DATA 0 /* Data Byte to Write to / Read from Look-Up-Table */
Vkadaba 5:0728bde67bdb 1776 #define BITM_CORE_LUT_DATA_LUT_DATA 0x000000FF /* Data Byte to Write to / Read from Look-Up-Table */
Vkadaba 5:0728bde67bdb 1777
Vkadaba 5:0728bde67bdb 1778 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1779 ADMW_CORE_EXT_FLASH_INDEX Pos/Masks Description
Vkadaba 5:0728bde67bdb 1780 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1781 #define BITP_CORE_EXT_FLASH_INDEX_EXT_FLASH_INDEX 0 /* Start Position (Sample No.) for Retrieval of Ext. Flash Data */
Vkadaba 5:0728bde67bdb 1782 #define BITM_CORE_EXT_FLASH_INDEX_EXT_FLASH_INDEX 0xFFFFFFFF /* Start Position (Sample No.) for Retrieval of Ext. Flash Data */
Vkadaba 5:0728bde67bdb 1783
Vkadaba 5:0728bde67bdb 1784 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1785 ADMW_CORE_EXT_FLASH_SAMPLE_COUNT Pos/Masks Description
Vkadaba 5:0728bde67bdb 1786 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1787 #define BITP_CORE_EXT_FLASH_SAMPLE_COUNT_EXT_FLASH_SAMPLE_COUNT 0 /* Indicates How Many Samples Stored in External Flash */
Vkadaba 5:0728bde67bdb 1788 #define BITM_CORE_EXT_FLASH_SAMPLE_COUNT_EXT_FLASH_SAMPLE_COUNT 0xFFFFFFFF /* Indicates How Many Samples Stored in External Flash */
Vkadaba 5:0728bde67bdb 1789
Vkadaba 5:0728bde67bdb 1790 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1791 ADMW_CORE_EXT_FLASH_DATA Pos/Masks Description
Vkadaba 5:0728bde67bdb 1792 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1793 #define BITP_CORE_EXT_FLASH_DATA_EXT_FLASH_DATA 0 /* Data Read Back from External Flash */
Vkadaba 5:0728bde67bdb 1794 #define BITM_CORE_EXT_FLASH_DATA_EXT_FLASH_DATA 0x000000FF /* Data Read Back from External Flash */
Vkadaba 5:0728bde67bdb 1795
Vkadaba 5:0728bde67bdb 1796 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1797 ADMW_CORE_REVISION Pos/Masks Description
Vkadaba 5:0728bde67bdb 1798 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1799 #define BITP_CORE_REVISION_REV_MAJOR 24 /* Major Revision Information */
Vkadaba 5:0728bde67bdb 1800 #define BITP_CORE_REVISION_REV_MINOR 16 /* Minor Revision Information */
Vkadaba 5:0728bde67bdb 1801 #define BITP_CORE_REVISION_REV_PATCH 0 /* Patch Revision Information */
Vkadaba 5:0728bde67bdb 1802 #define BITM_CORE_REVISION_REV_MAJOR 0xFF000000 /* Major Revision Information */
Vkadaba 5:0728bde67bdb 1803 #define BITM_CORE_REVISION_REV_MINOR 0x00FF0000 /* Minor Revision Information */
Vkadaba 5:0728bde67bdb 1804 #define BITM_CORE_REVISION_REV_PATCH 0x0000FFFF /* Patch Revision Information */
Vkadaba 5:0728bde67bdb 1805
Vkadaba 5:0728bde67bdb 1806 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1807 ADMW_CORE_CHANNEL_COUNT[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 1808 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1809 #define BITP_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 7 /* Enable Channel in Measurement Cycle */
Vkadaba 5:0728bde67bdb 1810 #define BITP_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0 /* How Many Times Channel Should Appear in One Cycle */
Vkadaba 5:0728bde67bdb 1811 #define BITM_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 0x00000080 /* Enable Channel in Measurement Cycle */
Vkadaba 5:0728bde67bdb 1812 #define BITM_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0x0000007F /* How Many Times Channel Should Appear in One Cycle */
Vkadaba 5:0728bde67bdb 1813
Vkadaba 5:0728bde67bdb 1814 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1815 ADMW_CORE_CHANNEL_OPTIONS[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 1816 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1817 #define BITP_CORE_CHANNEL_OPTIONS_FFT_ENABLE_CH 7 /* Indicates Channel to Be Used for FFT */
Vkadaba 5:0728bde67bdb 1818 #define BITP_CORE_CHANNEL_OPTIONS_CHANNEL_PRIORITY 0 /* Indicates Priority or Position of This Channel in Sequence */
Vkadaba 5:0728bde67bdb 1819 #define BITM_CORE_CHANNEL_OPTIONS_FFT_ENABLE_CH 0x00000080 /* Indicates Channel to Be Used for FFT */
Vkadaba 5:0728bde67bdb 1820 #define BITM_CORE_CHANNEL_OPTIONS_CHANNEL_PRIORITY 0x0000000F /* Indicates Priority or Position of This Channel in Sequence */
Vkadaba 5:0728bde67bdb 1821 #define ENUM_CORE_CHANNEL_OPTIONS_NO_FFT 0x00000000 /* FFT_Enable_Ch: FFT Will not be Performed on This Channel */
Vkadaba 5:0728bde67bdb 1822 #define ENUM_CORE_CHANNEL_OPTIONS_DO_FFT 0x00000080 /* FFT_Enable_Ch: FFT Will be Performed on This Channel */
Vkadaba 5:0728bde67bdb 1823
Vkadaba 5:0728bde67bdb 1824 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1825 ADMW_CORE_SENSOR_TYPE[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 1826 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1827 #define BITP_CORE_SENSOR_TYPE_SENSOR_TYPE 0 /* Sensor Type */
Vkadaba 5:0728bde67bdb 1828 #define BITM_CORE_SENSOR_TYPE_SENSOR_TYPE 0x00000FFF /* Sensor Type */
Vkadaba 5:0728bde67bdb 1829 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_DEF_L1 0x00000000 /* Sensor_Type: Thermocouple T-Type Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1830 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_DEF_L1 0x00000001 /* Sensor_Type: Thermocouple J-Type Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1831 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_DEF_L1 0x00000002 /* Sensor_Type: Thermocouple K-Type Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1832 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_DEF_L2 0x00000008 /* Sensor_Type: Thermocouple Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1833 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_DEF_L2 0x00000009 /* Sensor_Type: Thermocouple Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1834 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_DEF_L2 0x0000000A /* Sensor_Type: Thermocouple Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1835 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_DEF_L2 0x0000000B /* Sensor_Type: Thermocouple Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1836 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_ADV_L1 0x00000010 /* Sensor_Type: Thermocouple T-Type Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1837 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_ADV_L1 0x00000011 /* Sensor_Type: Thermocouple J-Type Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1838 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_ADV_L1 0x00000012 /* Sensor_Type: Thermocouple K-Type Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1839 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_ADV_L2 0x00000018 /* Sensor_Type: Thermocouple Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1840 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_ADV_L2 0x00000019 /* Sensor_Type: Thermocouple Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1841 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_ADV_L2 0x0000001A /* Sensor_Type: Thermocouple Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1842 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_ADV_L2 0x0000001B /* Sensor_Type: Thermocouple Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1843 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_DEF_L1 0x00000020 /* Sensor_Type: RTD 2 Wire PT100 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1844 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_DEF_L1 0x00000021 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1845 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_DEF_L2 0x00000028 /* Sensor_Type: RTD 2 Wire Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1846 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_DEF_L2 0x00000029 /* Sensor_Type: RTD 2 Wire Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1847 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_DEF_L2 0x0000002A /* Sensor_Type: RTD 2 Wire Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1848 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_DEF_L2 0x0000002B /* Sensor_Type: RTD 2 Wire Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1849 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_ADV_L1 0x00000030 /* Sensor_Type: RTD 2 Wire PT100 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1850 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_ADV_L1 0x00000031 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1851 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_ADV_L2 0x00000038 /* Sensor_Type: RTD 2 Wire Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1852 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_ADV_L2 0x00000039 /* Sensor_Type: RTD 2 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1853 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_ADV_L2 0x0000003A /* Sensor_Type: RTD 2 Wire Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1854 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_ADV_L2 0x0000003B /* Sensor_Type: RTD 2 Wire Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1855 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_DEF_L1 0x00000040 /* Sensor_Type: RTD 3 Wire PT100 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1856 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_DEF_L1 0x00000041 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1857 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_DEF_L2 0x00000048 /* Sensor_Type: RTD 3 Wire Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1858 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_DEF_L2 0x00000049 /* Sensor_Type: RTD 3 Wire Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1859 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_DEF_L2 0x0000004A /* Sensor_Type: RTD 3 Wire Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1860 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_DEF_L2 0x0000004B /* Sensor_Type: RTD 3 Wire Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1861 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_ADV_L1 0x00000050 /* Sensor_Type: RTD 3 Wire PT100 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1862 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_ADV_L1 0x00000051 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1863 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_ADV_L2 0x00000058 /* Sensor_Type: RTD 3 Wire Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1864 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_ADV_L2 0x00000059 /* Sensor_Type: RTD 3 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1865 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_ADV_L2 0x0000005A /* Sensor_Type: RTD 3 Wire Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1866 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_ADV_L2 0x0000005B /* Sensor_Type: RTD 3 Wire Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1867 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_DEF_L1 0x00000060 /* Sensor_Type: RTD 4 Wire PT100 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1868 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_DEF_L1 0x00000061 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1869 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_DEF_L2 0x00000068 /* Sensor_Type: RTD 4 Wire Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1870 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_DEF_L2 0x00000069 /* Sensor_Type: RTD 4 Wire Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1871 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_DEF_L2 0x0000006A /* Sensor_Type: RTD 4 Wire Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1872 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_DEF_L2 0x0000006B /* Sensor_Type: RTD 4 Wire Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1873 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_ADV_L1 0x00000070 /* Sensor_Type: RTD 4 Wire PT100 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1874 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_ADV_L1 0x00000071 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1875 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_ADV_L2 0x00000078 /* Sensor_Type: RTD 4 Wire Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1876 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_ADV_L2 0x00000079 /* Sensor_Type: RTD 4 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1877 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_ADV_L2 0x0000007A /* Sensor_Type: RTD 4 Wire Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1878 #define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_ADV_L2 0x0000007B /* Sensor_Type: RTD 4 Wire Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1879 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_DEF_L1 0x00000080 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1880 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_DEF_L1 0x00000081 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1881 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_DEF_L2 0x00000088 /* Sensor_Type: Thermistor Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1882 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_DEF_L2 0x00000089 /* Sensor_Type: Thermistor Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1883 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_DEF_L2 0x0000008A /* Sensor_Type: Thermistor Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1884 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_DEF_L2 0x0000008B /* Sensor_Type: Thermistor Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1885 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_ADV_L1 0x00000090 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1886 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_ADV_L1 0x00000091 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1887 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_ADV_L2 0x00000098 /* Sensor_Type: Thermistor Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1888 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_ADV_L2 0x00000099 /* Sensor_Type: Thermistor Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1889 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_ADV_L2 0x0000009A /* Sensor_Type: Thermistor Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1890 #define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_ADV_L2 0x0000009B /* Sensor_Type: Thermistor Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1891 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_DEF_L2 0x000000A8 /* Sensor_Type: Bridge 4 Wire Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1892 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_DEF_L2 0x000000A9 /* Sensor_Type: Bridge 4 Wire Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1893 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_DEF_L2 0x000000AA /* Sensor_Type: Bridge 4 Wire Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1894 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_DEF_L2 0x000000AB /* Sensor_Type: Bridge 4 Wire Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1895 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_ADV_L2 0x000000B8 /* Sensor_Type: Bridge 4 Wire Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1896 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_ADV_L2 0x000000B9 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1897 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_ADV_L2 0x000000BA /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1898 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_ADV_L2 0x000000BB /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1899 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_DEF_L2 0x000000C8 /* Sensor_Type: Bridge 6 Wire Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1900 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_DEF_L2 0x000000C9 /* Sensor_Type: Bridge 6 Wire Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1901 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_DEF_L2 0x000000CA /* Sensor_Type: Bridge 6 Wire Sensor 3 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1902 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_DEF_L2 0x000000CB /* Sensor_Type: Bridge 6 Wire Sensor 4 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1903 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_ADV_L2 0x000000D8 /* Sensor_Type: Bridge 6 Wire Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1904 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_ADV_L2 0x000000D9 /* Sensor_Type: Bridge 6 Wire Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1905 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_ADV_L2 0x000000DA /* Sensor_Type: Bridge 6 Wire Sensor 3 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1906 #define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_ADV_L2 0x000000DB /* Sensor_Type: Bridge 6 Wire Sensor 4 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1907 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_DEF_L1 0x000000E0 /* Sensor_Type: Diode 2 Current Type A Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1908 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_DEF_L1 0x000000E1 /* Sensor_Type: Diode 3 Current Type A Sensor Defined Level 1 */
Vkadaba 5:0728bde67bdb 1909 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_DEF_L2 0x000000E8 /* Sensor_Type: Diode 2 Current Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1910 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_DEF_L2 0x000000E9 /* Sensor_Type: Diode 3 Current Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1911 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_ADV_L1 0x000000F0 /* Sensor_Type: Diode 2 Current Type A Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1912 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_ADV_L1 0x000000F1 /* Sensor_Type: Diode 3 Current Type A Sensor Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1913 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_ADV_L2 0x000000F8 /* Sensor_Type: Diode 2 Current Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1914 #define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_ADV_L2 0x000000F9 /* Sensor_Type: Diode 3 Current Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1915 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_DEF_L1 0x00000100 /* Sensor_Type: Microphone With No External Amplifier Defined Level 1 */
Vkadaba 5:0728bde67bdb 1916 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_DEF_L1 0x00000101 /* Sensor_Type: Microphone With External Amplifier Defined Level 1 */
Vkadaba 5:0728bde67bdb 1917 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_DEF_L2 0x00000108 /* Sensor_Type: Microphone With No External Amplifier Defined Level 2 */
Vkadaba 5:0728bde67bdb 1918 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_DEF_L2 0x00000109 /* Sensor_Type: Microphone With External Amplifier Defined Level 2 */
Vkadaba 5:0728bde67bdb 1919 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_ADV_L1 0x00000110 /* Sensor_Type: Microphone With No External Amplifier Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1920 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_ADV_L1 0x00000111 /* Sensor_Type: Microphone With External Amplifier Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1921 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_ADV_L2 0x00000116 /* Sensor_Type: Microphone With No External Amplifier Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1922 #define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_ADV_L2 0x00000117 /* Sensor_Type: Microphone With External Amplifier Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1923 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE 0x00000200 /* Sensor_Type: Voltage Input */
Vkadaba 5:0728bde67bdb 1924 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1 0x00000220 /* Sensor_Type: Voltage Output Pressure Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1925 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_DEF_L1 0x00000221 /* Sensor_Type: Voltage Output Pressure Sensor B Defined Level 1 */
Vkadaba 5:0728bde67bdb 1926 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_DEF_L2 0x00000228 /* Sensor_Type: Voltage Output Pressure Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1927 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_DEF_L2 0x00000229 /* Sensor_Type: Voltage Output Pressure Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1928 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_ADV_L1 0x00000230 /* Sensor_Type: Voltage Output Pressure Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1929 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_ADV_L1 0x00000231 /* Sensor_Type: Voltage Output Pressure Sensor B Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1930 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_ADV_L2 0x00000238 /* Sensor_Type: Voltage Output Pressure Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1931 #define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_ADV_L2 0x00000239 /* Sensor_Type: Voltage Output Pressure Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1932 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT 0x00000300 /* Sensor_Type: Current Input */
Vkadaba 5:0728bde67bdb 1933 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_DEF_L1 0x00000320 /* Sensor_Type: Current Output Pressure Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1934 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_DEF_L2 0x00000328 /* Sensor_Type: Current Output Pressure Sensor 1 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1935 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_DEF_L2 0x00000329 /* Sensor_Type: Current Output Pressure Sensor 2 Defined Level 2 */
Vkadaba 5:0728bde67bdb 1936 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_ADV_L1 0x00000330 /* Sensor_Type: Current Output Pressure Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1937 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_ADV_L2 0x00000338 /* Sensor_Type: Current Output Pressure Sensor 1 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1938 #define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_ADV_L2 0x00000339 /* Sensor_Type: Current Output Pressure Sensor 2 Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1939 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L1 0x00000800 /* Sensor_Type: I2C Pressure Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1940 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L1 0x00000801 /* Sensor_Type: I2C Pressure Sensor B Defined Level 1 */
Vkadaba 5:0728bde67bdb 1941 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L2 0x00000808 /* Sensor_Type: I2C Pressure Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1942 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L2 0x00000809 /* Sensor_Type: I2C Pressure Sensor B Defined Level 2 */
Vkadaba 5:0728bde67bdb 1943 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L1 0x00000810 /* Sensor_Type: I2C Pressure Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1944 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L1 0x00000811 /* Sensor_Type: I2C Pressure Sensor B Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1945 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L2 0x00000818 /* Sensor_Type: I2C Pressure Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1946 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L2 0x00000819 /* Sensor_Type: I2C Pressure Sensor B Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1947 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L1 0x00000840 /* Sensor_Type: I2C Humidity Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1948 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L1 0x00000841 /* Sensor_Type: I2C Humidity Sensor B Defined Level 1 */
Vkadaba 5:0728bde67bdb 1949 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L2 0x00000848 /* Sensor_Type: I2C Humidity Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1950 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L2 0x00000849 /* Sensor_Type: I2C Humidity Sensor B Defined Level 2 */
Vkadaba 5:0728bde67bdb 1951 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L1 0x00000850 /* Sensor_Type: I2C Humidity Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1952 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L1 0x00000851 /* Sensor_Type: I2C Humidity Sensor B Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1953 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L2 0x00000858 /* Sensor_Type: I2C Humidity Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1954 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L2 0x00000859 /* Sensor_Type: I2C Humidity Sensor B Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1955 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L1 0x00000880 /* Sensor_Type: I2C Ambient Light Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1956 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L2 0x00000888 /* Sensor_Type: I2C Ambient Light Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1957 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L1 0x00000890 /* Sensor_Type: I2C Ambient Light Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1958 #define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L2 0x00000898 /* Sensor_Type: I2C Ambient Light Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1959 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L1 0x00000C00 /* Sensor_Type: SPI Pressure Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1960 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L2 0x00000C08 /* Sensor_Type: SPI Pressure Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1961 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L1 0x00000C10 /* Sensor_Type: SPI Pressure Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1962 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L2 0x00000C18 /* Sensor_Type: SPI Pressure Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1963 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L1 0x00000C40 /* Sensor_Type: SPI Humidity Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1964 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L1 0x00000C41 /* Sensor_Type: SPI Humidity Sensor B Defined Level 1 */
Vkadaba 5:0728bde67bdb 1965 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L2 0x00000C48 /* Sensor_Type: SPI Humidity Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1966 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L2 0x00000C49 /* Sensor_Type: SPI Humidity Sensor B Defined Level 2 */
Vkadaba 5:0728bde67bdb 1967 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L1 0x00000C50 /* Sensor_Type: SPI Humidity Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1968 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L1 0x00000C51 /* Sensor_Type: SPI Humidity Sensor B Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1969 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L2 0x00000C58 /* Sensor_Type: SPI Humidity Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1970 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L2 0x00000C59 /* Sensor_Type: SPI Humidity Sensor B Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1971 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L1 0x00000C80 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Defined Level 1 */
Vkadaba 5:0728bde67bdb 1972 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L1 0x00000C81 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Defined Level 1 */
Vkadaba 5:0728bde67bdb 1973 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L2 0x00000C88 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Defined Level 2 */
Vkadaba 5:0728bde67bdb 1974 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L2 0x00000C89 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Defined Level 2 */
Vkadaba 5:0728bde67bdb 1975 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L1 0x00000C90 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1976 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L1 0x00000C91 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1977 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L2 0x00000C98 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1978 #define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L2 0x00000C99 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1979 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L1 0x00000E00 /* Sensor_Type: UART CO2 Sensor A Defined Level 1 */
Vkadaba 5:0728bde67bdb 1980 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L1 0x00000E01 /* Sensor_Type: UART CO2 Sensor B Defined Level 1 */
Vkadaba 5:0728bde67bdb 1981 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L2 0x00000E08 /* Sensor_Type: UART CO2 Sensor A Defined Level 2 */
Vkadaba 5:0728bde67bdb 1982 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L2 0x00000E09 /* Sensor_Type: UART CO2 Sensor B Defined Level 2 */
Vkadaba 5:0728bde67bdb 1983 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L1 0x00000E10 /* Sensor_Type: UART CO2 Sensor A Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1984 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_ADV_L1 0x00000E11 /* Sensor_Type: UART CO2 Sensor B Advanced Level 1 */
Vkadaba 5:0728bde67bdb 1985 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L2 0x00000E18 /* Sensor_Type: UART CO2 Sensor A Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1986 #define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_ADV_L2 0x00000E19 /* Sensor_Type: UART CO2 Sensor B Advanced Level 2 */
Vkadaba 5:0728bde67bdb 1987
Vkadaba 5:0728bde67bdb 1988 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 1989 ADMW_CORE_SENSOR_DETAILS[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 1990 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 1991 #define BITP_CORE_SENSOR_DETAILS_COMPENSATION_DISABLE 31 /* Indicates Compensation Data Should Not Be Used */
Vkadaba 5:0728bde67bdb 1992 #define BITP_CORE_SENSOR_DETAILS_AVERAGING 28 /* Number of ADC Results to Average */
Vkadaba 5:0728bde67bdb 1993 #define BITP_CORE_SENSOR_DETAILS_PGA_GAIN 24 /* PGA Gain */
Vkadaba 5:0728bde67bdb 1994 #define BITP_CORE_SENSOR_DETAILS_REFERENCE_SELECT 20 /* Reference Selection */
Vkadaba 5:0728bde67bdb 1995 #define BITP_CORE_SENSOR_DETAILS_VBIAS 19 /* Controls ADC Vbias Output */
Vkadaba 5:0728bde67bdb 1996 #define BITP_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 18 /* Enable or Disable ADC Reference Buffer */
Vkadaba 5:0728bde67bdb 1997 #define BITP_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 17 /* Do Not Publish Channel Result */
Vkadaba 5:0728bde67bdb 1998 #define BITP_CORE_SENSOR_DETAILS_UNITY_LUT_SELECT 16 /* Selects Unity Transfer Function Instead of Sensor Default */
Vkadaba 5:0728bde67bdb 1999 #define BITP_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 4 /* Indicates Which Channel is Used to Compensate Sensor Result */
Vkadaba 5:0728bde67bdb 2000 #define BITP_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0 /* Units of Sensor Measurement */
Vkadaba 5:0728bde67bdb 2001 #define BITM_CORE_SENSOR_DETAILS_COMPENSATION_DISABLE 0x80000000 /* Indicates Compensation Data Should Not Be Used */
Vkadaba 5:0728bde67bdb 2002 #define BITM_CORE_SENSOR_DETAILS_AVERAGING 0x70000000 /* Number of ADC Results to Average */
Vkadaba 5:0728bde67bdb 2003 #define BITM_CORE_SENSOR_DETAILS_PGA_GAIN 0x07000000 /* PGA Gain */
Vkadaba 5:0728bde67bdb 2004 #define BITM_CORE_SENSOR_DETAILS_REFERENCE_SELECT 0x00F00000 /* Reference Selection */
Vkadaba 5:0728bde67bdb 2005 #define BITM_CORE_SENSOR_DETAILS_VBIAS 0x00080000 /* Controls ADC Vbias Output */
Vkadaba 5:0728bde67bdb 2006 #define BITM_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 0x00040000 /* Enable or Disable ADC Reference Buffer */
Vkadaba 5:0728bde67bdb 2007 #define BITM_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 0x00020000 /* Do Not Publish Channel Result */
Vkadaba 5:0728bde67bdb 2008 #define BITM_CORE_SENSOR_DETAILS_UNITY_LUT_SELECT 0x00010000 /* Selects Unity Transfer Function Instead of Sensor Default */
Vkadaba 5:0728bde67bdb 2009 #define BITM_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 0x000000F0 /* Indicates Which Channel is Used to Compensate Sensor Result */
Vkadaba 5:0728bde67bdb 2010 #define BITM_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0x0000000F /* Units of Sensor Measurement */
Vkadaba 5:0728bde67bdb 2011 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_1 0x00000000 /* PGA_Gain: Gain of 1 */
Vkadaba 5:0728bde67bdb 2012 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_2 0x01000000 /* PGA_Gain: Gain of 2 */
Vkadaba 5:0728bde67bdb 2013 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_4 0x02000000 /* PGA_Gain: Gain of 4 */
Vkadaba 5:0728bde67bdb 2014 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_8 0x03000000 /* PGA_Gain: Gain of 8 */
Vkadaba 5:0728bde67bdb 2015 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_16 0x04000000 /* PGA_Gain: Gain of 16 */
Vkadaba 5:0728bde67bdb 2016 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_32 0x05000000 /* PGA_Gain: Gain of 32 */
Vkadaba 5:0728bde67bdb 2017 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_64 0x06000000 /* PGA_Gain: Gain of 64 */
Vkadaba 5:0728bde67bdb 2018 #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_128 0x07000000 /* PGA_Gain: Gain of 128 */
Vkadaba 5:0728bde67bdb 2019 #define ENUM_CORE_SENSOR_DETAILS_REF_INT 0x00000000 /* Reference_Select: Internal Reference */
Vkadaba 5:0728bde67bdb 2020 #define ENUM_CORE_SENSOR_DETAILS_REF_AVDD 0x00100000 /* Reference_Select: AVDD */
Vkadaba 5:0728bde67bdb 2021 #define ENUM_CORE_SENSOR_DETAILS_REF_VEXT1 0x00200000 /* Reference_Select: External Voltage on Refin1 */
Vkadaba 5:0728bde67bdb 2022 #define ENUM_CORE_SENSOR_DETAILS_REF_VEXT2 0x00300000 /* Reference_Select: External Voltage on Refin2 */
Vkadaba 5:0728bde67bdb 2023 #define ENUM_CORE_SENSOR_DETAILS_REF_RINT1 0x00400000 /* Reference_Select: Internal Resistor1 */
Vkadaba 5:0728bde67bdb 2024 #define ENUM_CORE_SENSOR_DETAILS_REF_RINT2 0x00500000 /* Reference_Select: Internal Resistor2 */
Vkadaba 5:0728bde67bdb 2025 #define ENUM_CORE_SENSOR_DETAILS_REF_REXT1 0x00600000 /* Reference_Select: External Resistor on Refin1 */
Vkadaba 5:0728bde67bdb 2026 #define ENUM_CORE_SENSOR_DETAILS_REF_REXT2 0x00700000 /* Reference_Select: External Resistor on Refin2 */
Vkadaba 5:0728bde67bdb 2027 #define ENUM_CORE_SENSOR_DETAILS_REF_EXC 0x00800000 /* Reference_Select: Bridge Excitation Voltage */
Vkadaba 5:0728bde67bdb 2028 #define ENUM_CORE_SENSOR_DETAILS_UNITS_UNSPECIFIED 0x00000000 /* Measurement_Units: Not Specified */
Vkadaba 5:0728bde67bdb 2029 #define ENUM_CORE_SENSOR_DETAILS_UNITS_RESERVED 0x00000001 /* Measurement_Units: Reserved */
Vkadaba 5:0728bde67bdb 2030 #define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGC 0x00000002 /* Measurement_Units: Degrees C */
Vkadaba 5:0728bde67bdb 2031 #define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGF 0x00000003 /* Measurement_Units: Degrees F */
Vkadaba 5:0728bde67bdb 2032
Vkadaba 5:0728bde67bdb 2033 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2034 ADMW_CORE_CHANNEL_EXCITATION[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2035 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2036 #define BITP_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 7 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
Vkadaba 5:0728bde67bdb 2037 #define BITP_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 5 /* Modify Current Ratios Used for Diode Sensor */
Vkadaba 5:0728bde67bdb 2038 #define BITP_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0 /* Current Source Value */
Vkadaba 5:0728bde67bdb 2039 #define BITM_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 0x00000080 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
Vkadaba 5:0728bde67bdb 2040 #define BITM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 0x00000020 /* Modify Current Ratios Used for Diode Sensor */
Vkadaba 5:0728bde67bdb 2041 #define BITM_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0x00000007 /* Current Source Value */
Vkadaba 5:0728bde67bdb 2042 #define ENUM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_DEFAULT 0x00000000 /* IOUT_Diode_Ratio: Default Excitation Current Ratios */
Vkadaba 5:0728bde67bdb 2043 #define ENUM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_MAX 0x00000020 /* IOUT_Diode_Ratio: Higher Excitation Current Ratios */
Vkadaba 5:0728bde67bdb 2044 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_OFF 0x00000000 /* IOUT_Excitation_Current: Disabled */
Vkadaba 5:0728bde67bdb 2045 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_50UA 0x00000001 /* IOUT_Excitation_Current: 50 \mu;A */
Vkadaba 5:0728bde67bdb 2046 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_100UA 0x00000002 /* IOUT_Excitation_Current: 100 \mu;A */
Vkadaba 5:0728bde67bdb 2047 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_250UA 0x00000003 /* IOUT_Excitation_Current: 250 \mu;A */
Vkadaba 5:0728bde67bdb 2048 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_500UA 0x00000004 /* IOUT_Excitation_Current: 500 \mu;A */
Vkadaba 5:0728bde67bdb 2049 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_750UA 0x00000005 /* IOUT_Excitation_Current: 750 \mu;A */
Vkadaba 5:0728bde67bdb 2050 #define ENUM_CORE_CHANNEL_EXCITATION_IEXC_1000UA 0x00000006 /* IOUT_Excitation_Current: 1000 \mu;A */
Vkadaba 5:0728bde67bdb 2051
Vkadaba 5:0728bde67bdb 2052 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2053 ADMW_CORE_SETTLING_TIME[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2054 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2055 #define BITP_CORE_SETTLING_TIME_SETTLING_TIME_UNITS 14 /* Units for Settling Time */
Vkadaba 5:0728bde67bdb 2056 #define BITP_CORE_SETTLING_TIME_SETTLING_TIME 0 /* Settling Time to Allow When Switching to Channel */
Vkadaba 5:0728bde67bdb 2057 #define BITM_CORE_SETTLING_TIME_SETTLING_TIME_UNITS 0x0000C000 /* Units for Settling Time */
Vkadaba 5:0728bde67bdb 2058 #define BITM_CORE_SETTLING_TIME_SETTLING_TIME 0x00003FFF /* Settling Time to Allow When Switching to Channel */
Vkadaba 5:0728bde67bdb 2059 #define ENUM_CORE_SETTLING_TIME_MICROSECONDS 0x00000000 /* Settling_Time_Units: Micro-Seconds */
Vkadaba 5:0728bde67bdb 2060 #define ENUM_CORE_SETTLING_TIME_MILLISECONDS 0x00004000 /* Settling_Time_Units: Milli-Seconds */
Vkadaba 5:0728bde67bdb 2061 #define ENUM_CORE_SETTLING_TIME_SECONDS 0x00008000 /* Settling_Time_Units: Seconds */
Vkadaba 5:0728bde67bdb 2062
Vkadaba 5:0728bde67bdb 2063 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2064 ADMW_CORE_FILTER_SELECT[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2065 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2066 #define BITP_CORE_FILTER_SELECT_ADC_FILTER_TYPE 11 /* ADC Digital Filter Type */
Vkadaba 5:0728bde67bdb 2067 #define BITP_CORE_FILTER_SELECT_ADC_FS 0 /* ADC Digital Filter Select */
Vkadaba 5:0728bde67bdb 2068 #define BITM_CORE_FILTER_SELECT_ADC_FILTER_TYPE 0x0000F800 /* ADC Digital Filter Type */
Vkadaba 5:0728bde67bdb 2069 #define BITM_CORE_FILTER_SELECT_ADC_FS 0x000007FF /* ADC Digital Filter Select */
Vkadaba 5:0728bde67bdb 2070 #define ENUM_CORE_FILTER_SELECT_FILTER_FIR_25SPS 0x00000000 /* ADC_Filter_Type: FIR Filter 25 SPS */
Vkadaba 5:0728bde67bdb 2071 #define ENUM_CORE_FILTER_SELECT_FILTER_FIR_20SPS 0x00000800 /* ADC_Filter_Type: FIR Filter 20 SPS */
Vkadaba 5:0728bde67bdb 2072 #define ENUM_CORE_FILTER_SELECT_FILTER_SINC4 0x00001000 /* ADC_Filter_Type: Sinc4 Filter */
Vkadaba 5:0728bde67bdb 2073 #define ENUM_CORE_FILTER_SELECT_FILTER_TBD 0x00001800 /* ADC_Filter_Type: TBD Filter */
Vkadaba 5:0728bde67bdb 2074
Vkadaba 5:0728bde67bdb 2075 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2076 ADMW_CORE_HIGH_THRESHOLD_LIMIT[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2077 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2078 #define BITP_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0 /* Upper Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 2079 #define BITM_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0xFFFFFFFF /* Upper Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 2080
Vkadaba 5:0728bde67bdb 2081 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2082 ADMW_CORE_LOW_THRESHOLD_LIMIT[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2083 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2084 #define BITP_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0 /* Lower Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 2085 #define BITM_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0xFFFFFFFF /* Lower Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 2086
Vkadaba 5:0728bde67bdb 2087 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2088 ADMW_CORE_SENSOR_OFFSET[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2089 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2090 #define BITP_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0 /* Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 2091 #define BITM_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0xFFFFFFFF /* Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 2092
Vkadaba 5:0728bde67bdb 2093 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2094 ADMW_CORE_SENSOR_GAIN[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2095 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2096 #define BITP_CORE_SENSOR_GAIN_SENSOR_GAIN 0 /* Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 2097 #define BITM_CORE_SENSOR_GAIN_SENSOR_GAIN 0xFFFFFFFF /* Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 2098
Vkadaba 5:0728bde67bdb 2099 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2100 ADMW_CORE_ALERT_CODE_CH[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2101 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2102 #define BITP_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0 /* Per-Channel Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 2103 #define BITM_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0x0000FFFF /* Per-Channel Code Indicating Type of Alert */
Vkadaba 5:0728bde67bdb 2104
Vkadaba 5:0728bde67bdb 2105 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2106 ADMW_CORE_CHANNEL_SKIP[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2107 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2108 #define BITP_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0 /* Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 2109 #define BITM_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0x000000FF /* Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 2110
Vkadaba 5:0728bde67bdb 2111 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2112 ADMW_CORE_SENSOR_PARAMETER[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2113 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2114 #define BITP_CORE_SENSOR_PARAMETER_SENSOR_PARAMETER 0 /* Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 2115 #define BITM_CORE_SENSOR_PARAMETER_SENSOR_PARAMETER 0xFFFFFFFF /* Sensor Parameter Adjustment */
Vkadaba 5:0728bde67bdb 2116
Vkadaba 5:0728bde67bdb 2117 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2118 ADMW_CORE_CALIBRATION_PARAMETER[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2119 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2120 #define BITP_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER_ENABLE 24 /* Enables Use of Calibration_Parameter */
Vkadaba 5:0728bde67bdb 2121 #define BITP_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER 0 /* Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 2122 #define BITM_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER_ENABLE 0x01000000 /* Enables Use of Calibration_Parameter */
Vkadaba 5:0728bde67bdb 2123 #define BITM_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER 0x00FFFFFF /* Calibration Parameter Value */
Vkadaba 5:0728bde67bdb 2124
Vkadaba 5:0728bde67bdb 2125 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2126 ADMW_CORE_DIGITAL_SENSOR_CONFIG[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2127 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2128 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_DATA_BITS 11 /* Number of Relevant Data Bits */
Vkadaba 5:0728bde67bdb 2129 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_READ_BYTES 8 /* Number of Bytes to Read from the Sensor */
Vkadaba 5:0728bde67bdb 2130 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_BIT_OFFSET 4 /* Data Bit Offset, Relative to Alignment */
Vkadaba 5:0728bde67bdb 2131 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_LEFT_ALIGNED 3 /* Data Alignment Within the Data Frame */
Vkadaba 5:0728bde67bdb 2132 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_LITTLE_ENDIAN 2 /* Data Endianness of Sensor Result */
Vkadaba 5:0728bde67bdb 2133 #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0 /* Data Encoding of Sensor Result */
Vkadaba 5:0728bde67bdb 2134 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_DATA_BITS 0x0000F800 /* Number of Relevant Data Bits */
Vkadaba 5:0728bde67bdb 2135 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_READ_BYTES 0x00000700 /* Number of Bytes to Read from the Sensor */
Vkadaba 5:0728bde67bdb 2136 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_BIT_OFFSET 0x000000F0 /* Data Bit Offset, Relative to Alignment */
Vkadaba 5:0728bde67bdb 2137 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_LEFT_ALIGNED 0x00000008 /* Data Alignment Within the Data Frame */
Vkadaba 5:0728bde67bdb 2138 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_LITTLE_ENDIAN 0x00000004 /* Data Endianness of Sensor Result */
Vkadaba 5:0728bde67bdb 2139 #define BITM_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0x00000003 /* Data Encoding of Sensor Result */
Vkadaba 5:0728bde67bdb 2140 #define ENUM_CORE_DIGITAL_SENSOR_CONFIG_CODING_NONE 0x00000000 /* Digital_Sensor_Coding: None/Invalid */
Vkadaba 5:0728bde67bdb 2141 #define ENUM_CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR 0x00000001 /* Digital_Sensor_Coding: Unipolar */
Vkadaba 5:0728bde67bdb 2142 #define ENUM_CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL 0x00000002 /* Digital_Sensor_Coding: Twos Complement */
Vkadaba 5:0728bde67bdb 2143 #define ENUM_CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY 0x00000003 /* Digital_Sensor_Coding: Offset Binary */
Vkadaba 5:0728bde67bdb 2144
Vkadaba 5:0728bde67bdb 2145 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2146 ADMW_CORE_DIGITAL_SENSOR_ADDRESS[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2147 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2148 #define BITP_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0 /* I2C Address or Write Address Command for SPI Sensor */
Vkadaba 5:0728bde67bdb 2149 #define BITM_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0x000000FF /* I2C Address or Write Address Command for SPI Sensor */
Vkadaba 5:0728bde67bdb 2150
Vkadaba 5:0728bde67bdb 2151 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2152 ADMW_CORE_DIGITAL_SENSOR_NUM_CMDS[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2153 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2154 #define BITP_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_READ_CMDS 4 /* Number of Read Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 2155 #define BITP_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0 /* Number of Configuration Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 2156 #define BITM_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_READ_CMDS 0x00000070 /* Number of Read Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 2157 #define BITM_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0x00000007 /* Number of Configuration Commands for Digital Sensor */
Vkadaba 5:0728bde67bdb 2158
Vkadaba 5:0728bde67bdb 2159 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2160 ADMW_CORE_DIGITAL_SENSOR_COMMS[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2161 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2162 #define BITP_CORE_DIGITAL_SENSOR_COMMS_UART_MODE 12 /* Configuration for Sensor UART Protocol */
Vkadaba 5:0728bde67bdb 2163 #define BITP_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE 10 /* Configuration for Sensor SPI Protocol */
Vkadaba 5:0728bde67bdb 2164 #define BITP_CORE_DIGITAL_SENSOR_COMMS_UART_BAUD 7 /* Controls Baud Rate for UART Sensors */
Vkadaba 5:0728bde67bdb 2165 #define BITP_CORE_DIGITAL_SENSOR_COMMS_I2C_CLOCK 5 /* Controls SCLK Frequency for I2C Sensors */
Vkadaba 5:0728bde67bdb 2166 #define BITP_CORE_DIGITAL_SENSOR_COMMS_SPI_CLOCK 1 /* Controls Clock Frequency for SPI Sensors */
Vkadaba 5:0728bde67bdb 2167 #define BITP_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_SENSOR_COMMS_EN 0 /* Enable Digital Sensor Comms Register Parameters */
Vkadaba 5:0728bde67bdb 2168 #define BITM_CORE_DIGITAL_SENSOR_COMMS_UART_MODE 0x0000F000 /* Configuration for Sensor UART Protocol */
Vkadaba 5:0728bde67bdb 2169 #define BITM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE 0x00000C00 /* Configuration for Sensor SPI Protocol */
Vkadaba 5:0728bde67bdb 2170 #define BITM_CORE_DIGITAL_SENSOR_COMMS_UART_BAUD 0x00000380 /* Controls Baud Rate for UART Sensors */
Vkadaba 5:0728bde67bdb 2171 #define BITM_CORE_DIGITAL_SENSOR_COMMS_I2C_CLOCK 0x00000060 /* Controls SCLK Frequency for I2C Sensors */
Vkadaba 5:0728bde67bdb 2172 #define BITM_CORE_DIGITAL_SENSOR_COMMS_SPI_CLOCK 0x0000001E /* Controls Clock Frequency for SPI Sensors */
Vkadaba 5:0728bde67bdb 2173 #define BITM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_SENSOR_COMMS_EN 0x00000001 /* Enable Digital Sensor Comms Register Parameters */
Vkadaba 5:0728bde67bdb 2174 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N1 0x00000000 /* Uart_Mode: 8 Data Bits No Parity 1 Stop Bit */
Vkadaba 5:0728bde67bdb 2175 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N2 0x00001000 /* Uart_Mode: 8 Data Bits No Parity 2 Stop Bits */
Vkadaba 5:0728bde67bdb 2176 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N3 0x00002000 /* Uart_Mode: 8 Data Bits No Parity 3 Stop Bits */
Vkadaba 5:0728bde67bdb 2177 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E1 0x00004000 /* Uart_Mode: 8 Data Bits Even Parity 1 Stop Bit */
Vkadaba 5:0728bde67bdb 2178 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E2 0x00005000 /* Uart_Mode: 8 Data Bits Even Parity 2 Stop Bits */
Vkadaba 5:0728bde67bdb 2179 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E3 0x00006000 /* Uart_Mode: 8 Data Bits Even Parity 3 Stop Bits */
Vkadaba 5:0728bde67bdb 2180 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O1 0x00008000 /* Uart_Mode: 8 Data Bits Odd Parity 1 Stop Bit */
Vkadaba 5:0728bde67bdb 2181 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O2 0x00009000 /* Uart_Mode: 8 Data Bits Odd Parity 2 Stop Bits */
Vkadaba 5:0728bde67bdb 2182 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O3 0x0000A000 /* Uart_Mode: 8 Data Bits Odd Parity 3 Stop Bits */
Vkadaba 5:0728bde67bdb 2183 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_0 0x00000000 /* SPI_Mode: Clock Polarity = 0 Clock Phase = 0 */
Vkadaba 5:0728bde67bdb 2184 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 0x00000400 /* SPI_Mode: Clock Polarity = 0 Clock Phase = 1 */
Vkadaba 5:0728bde67bdb 2185 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 0x00000800 /* SPI_Mode: Clock Polarity = 1 Clock Phase = 0 */
Vkadaba 5:0728bde67bdb 2186 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 0x00000C00 /* SPI_Mode: Clock Polarity = 1 Clock Phase = 1 */
Vkadaba 5:0728bde67bdb 2187 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_115200 0x00000000 /* Uart_Baud: 115200 bps */
Vkadaba 5:0728bde67bdb 2188 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_57600 0x00000080 /* Uart_Baud: 57600 bps */
Vkadaba 5:0728bde67bdb 2189 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_38400 0x00000100 /* Uart_Baud: 38400 bps */
Vkadaba 5:0728bde67bdb 2190 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_19200 0x00000180 /* Uart_Baud: 19200 bps */
Vkadaba 5:0728bde67bdb 2191 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_9600 0x00000200 /* Uart_Baud: 9600 bps */
Vkadaba 5:0728bde67bdb 2192 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_4800 0x00000280 /* Uart_Baud: 4800 bps */
Vkadaba 5:0728bde67bdb 2193 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_2400 0x00000300 /* Uart_Baud: 2400 bps */
Vkadaba 5:0728bde67bdb 2194 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_1200 0x00000380 /* Uart_Baud: 1200 bps */
Vkadaba 5:0728bde67bdb 2195 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_100K 0x00000000 /* I2C_Clock: 100kHz SCL */
Vkadaba 5:0728bde67bdb 2196 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_400K 0x00000020 /* I2C_Clock: 400kHz SCL */
Vkadaba 5:0728bde67bdb 2197 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 0x00000040 /* I2C_Clock: Reserved */
Vkadaba 5:0728bde67bdb 2198 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 0x00000060 /* I2C_Clock: Reserved */
Vkadaba 5:0728bde67bdb 2199 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_13MHZ 0x00000000 /* SPI_Clock: 13 MHz */
Vkadaba 5:0728bde67bdb 2200 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_6_5MHZ 0x00000002 /* SPI_Clock: 6.5 MHz */
Vkadaba 5:0728bde67bdb 2201 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_3_25MHZ 0x00000004 /* SPI_Clock: 3.25 MHz */
Vkadaba 5:0728bde67bdb 2202 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1_625MHZ 0x00000006 /* SPI_Clock: 1.625 MHz */
Vkadaba 5:0728bde67bdb 2203 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_812KHZ 0x00000008 /* SPI_Clock: 812.5kHz */
Vkadaba 5:0728bde67bdb 2204 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_406KHZ 0x0000000A /* SPI_Clock: 406.2kHz */
Vkadaba 5:0728bde67bdb 2205 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_203KHZ 0x0000000C /* SPI_Clock: 203.1kHz */
Vkadaba 5:0728bde67bdb 2206 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_101KHZ 0x0000000E /* SPI_Clock: 101.5kHz */
Vkadaba 5:0728bde67bdb 2207 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_50KHZ 0x00000010 /* SPI_Clock: 50.8kHz */
Vkadaba 5:0728bde67bdb 2208 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_25KHZ 0x00000012 /* SPI_Clock: 25.4kHz */
Vkadaba 5:0728bde67bdb 2209 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_12KHZ 0x00000014 /* SPI_Clock: 12.7kHz */
Vkadaba 5:0728bde67bdb 2210 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_6KHZ 0x00000016 /* SPI_Clock: 6.3kHz */
Vkadaba 5:0728bde67bdb 2211 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_3KHZ 0x00000018 /* SPI_Clock: 3.2kHz */
Vkadaba 5:0728bde67bdb 2212 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1_5KHZ 0x0000001A /* SPI_Clock: 1.58kHz */
Vkadaba 5:0728bde67bdb 2213 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_793HZ 0x0000001C /* SPI_Clock: 793Hz */
Vkadaba 5:0728bde67bdb 2214 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_396HZ 0x0000001E /* SPI_Clock: 396Hz */
Vkadaba 5:0728bde67bdb 2215 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_DEFAULT 0x00000000 /* Digital_Sensor_Comms_En: Default Parameters Used for Digital Sensor Communications */
Vkadaba 5:0728bde67bdb 2216 #define ENUM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_USER 0x00000001 /* Digital_Sensor_Comms_En: User Supplied Parameters Used for Digital Sensor Communications */
Vkadaba 5:0728bde67bdb 2217
Vkadaba 5:0728bde67bdb 2218 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2219 ADMW_CORE_DIGITAL_SENSOR_COMMAND1[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2220 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2221 #define BITP_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2222 #define BITM_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2223
Vkadaba 5:0728bde67bdb 2224 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2225 ADMW_CORE_DIGITAL_SENSOR_COMMAND2[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2226 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2227 #define BITP_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2228 #define BITM_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2229
Vkadaba 5:0728bde67bdb 2230 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2231 ADMW_CORE_DIGITAL_SENSOR_COMMAND3[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2232 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2233 #define BITP_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2234 #define BITM_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2235
Vkadaba 5:0728bde67bdb 2236 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2237 ADMW_CORE_DIGITAL_SENSOR_COMMAND4[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2238 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2239 #define BITP_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2240 #define BITM_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2241
Vkadaba 5:0728bde67bdb 2242 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2243 ADMW_CORE_DIGITAL_SENSOR_COMMAND5[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2244 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2245 #define BITP_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2246 #define BITM_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2247
Vkadaba 5:0728bde67bdb 2248 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2249 ADMW_CORE_DIGITAL_SENSOR_COMMAND6[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2250 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2251 #define BITP_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2252 #define BITM_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2253
Vkadaba 5:0728bde67bdb 2254 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2255 ADMW_CORE_DIGITAL_SENSOR_COMMAND7[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2256 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2257 #define BITP_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2258 #define BITM_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2259
Vkadaba 5:0728bde67bdb 2260 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2261 ADMW_CORE_DIGITAL_SENSOR_READ_CMD1[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2262 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2263 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2264 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2265
Vkadaba 5:0728bde67bdb 2266 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2267 ADMW_CORE_DIGITAL_SENSOR_READ_CMD2[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2268 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2269 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2270 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2271
Vkadaba 5:0728bde67bdb 2272 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2273 ADMW_CORE_DIGITAL_SENSOR_READ_CMD3[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2274 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2275 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2276 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2277
Vkadaba 5:0728bde67bdb 2278 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2279 ADMW_CORE_DIGITAL_SENSOR_READ_CMD4[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2280 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2281 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2282 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2283
Vkadaba 5:0728bde67bdb 2284 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2285 ADMW_CORE_DIGITAL_SENSOR_READ_CMD5[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2286 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2287 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2288 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2289
Vkadaba 5:0728bde67bdb 2290 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2291 ADMW_CORE_DIGITAL_SENSOR_READ_CMD6[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2292 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2293 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2294 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2295
Vkadaba 5:0728bde67bdb 2296 /* -------------------------------------------------------------------------------------------------------------------------
Vkadaba 5:0728bde67bdb 2297 ADMW_CORE_DIGITAL_SENSOR_READ_CMD7[n] Pos/Masks Description
Vkadaba 5:0728bde67bdb 2298 ------------------------------------------------------------------------------------------------------------------------- */
Vkadaba 5:0728bde67bdb 2299 #define BITP_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2300 #define BITM_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
Vkadaba 5:0728bde67bdb 2301
Vkadaba 5:0728bde67bdb 2302
Vkadaba 5:0728bde67bdb 2303 #endif /* end ifndef _DEF1000_REGISTERS_H */
Vkadaba 5:0728bde67bdb 2304