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CHIP: LPC11xx Power Management Unit block driver
Data Structures | Typedefs | Enumerations | Functions

CHIP: LPC11xx Power Management Unit block driver

This driver only applies to devices in the CHIP_LPC11AXX, CHIP_LPC11CXX, CHIP_LPC11EXX, CHIP_LPC11UXX, and CHIP_LPC1125 families. More...

Data Structures

struct  LPC_PMU_T
 LPC11xx Power Management Unit register block structure. More...

Typedefs

typedef enum CHIP_PMU_MCUPOWER CHIP_PMU_MCUPOWER_T
 LPC11xx low power mode type definitions.

Enumerations

enum  CHIP_PMU_MCUPOWER { PMU_MCU_SLEEP = 0, PMU_MCU_DEEP_SLEEP, PMU_MCU_POWER_DOWN, PMU_MCU_DEEP_PWRDOWN }
 

LPC11xx low power mode type definitions.

More...

Functions

STATIC INLINE void Chip_PMU_WriteGPREG (LPC_PMU_T *pPMU, uint8_t regIndex, uint32_t value)
 Write a value to a GPREG register.
STATIC INLINE uint32_t Chip_PMU_ReadGPREG (LPC_PMU_T *pPMU, uint8_t regIndex)
 Read a value to a GPREG register.
void Chip_PMU_SleepState (LPC_PMU_T *pPMU)
 Enter MCU Sleep mode.
void Chip_PMU_DeepSleepState (LPC_PMU_T *pPMU)
 Enter MCU Deep Sleep mode.
void Chip_PMU_PowerDownState (LPC_PMU_T *pPMU)
 Enter MCU Power down mode.
void Chip_PMU_DeepPowerDownState (LPC_PMU_T *pPMU)
 Enter MCU Deep Power down mode.
void Chip_PMU_Sleep (LPC_PMU_T *pPMU, CHIP_PMU_MCUPOWER_T SleepMode)
 Place the MCU in a low power state.
STATIC INLINE uint32_t Chip_PMU_GetSleepFlags (LPC_PMU_T *pPMU)
 Returns sleep/power-down flags.
STATIC INLINE void Chip_PMU_ClearSleepFlags (LPC_PMU_T *pPMU, uint32_t flags)
 Clears sleep/power-down flags.

Detailed Description

This driver only applies to devices in the CHIP_LPC11AXX, CHIP_LPC11CXX, CHIP_LPC11EXX, CHIP_LPC11UXX, and CHIP_LPC1125 families.

Note different families may have slightly different PMU support.

Typedef Documentation

typedef enum CHIP_PMU_MCUPOWER CHIP_PMU_MCUPOWER_T

LPC11xx low power mode type definitions.

Enumeration Type Documentation

enum CHIP_PMU_MCUPOWER

LPC11xx low power mode type definitions.

Enumerator:
PMU_MCU_SLEEP 

Sleep mode

PMU_MCU_DEEP_SLEEP 

Deep Sleep mode

PMU_MCU_POWER_DOWN 

Power down mode

PMU_MCU_DEEP_PWRDOWN 

Deep power down mode Deep power down mode

Definition at line 63 of file pmu_11xx.h.

Function Documentation

STATIC INLINE void Chip_PMU_ClearSleepFlags ( LPC_PMU_T *  pPMU,
uint32_t  flags 
)

Clears sleep/power-down flags.

Parameters:
pPMU: Pointer to PMU register block
flags: Or'ed value of PMU_PCON_SLEEPFLAG and PMU_PCON_DPDFLAG
Returns:
Nothing
Note:
Use this function to clear a low power state prior to calling WFI().

Definition at line 186 of file pmu_11xx.h.

void Chip_PMU_DeepPowerDownState ( LPC_PMU_T *  pPMU )

Enter MCU Deep Power down mode.

Parameters:
pPMU: Pointer to PMU register block
Returns:
None
Note:
For maximal power savings, the entire system is shut down except for the general purpose registers in the PMU and the self wake-up timer. Only the general purpose registers in the PMU maintain their internal states. The part can wake up on a pulse on the WAKEUP pin or when the self wake-up timer times out. On wake-up, the part reboots.
void Chip_PMU_DeepSleepState ( LPC_PMU_T *  pPMU )

Enter MCU Deep Sleep mode.

Parameters:
pPMU: Pointer to PMU register block
Returns:
None
Note:
In Deep-sleep mode, the peripherals receive no internal clocks. The flash is in stand-by mode. The SRAM memory and all peripheral registers as well as the processor maintain their internal states. The WWDT, WKT, and BOD can remain active to wake up the system on an interrupt.
STATIC INLINE uint32_t Chip_PMU_GetSleepFlags ( LPC_PMU_T *  pPMU )

Returns sleep/power-down flags.

Parameters:
pPMU: Pointer to PMU register block
Returns:
Or'ed values of PMU_PCON_SLEEPFLAG and PMU_PCON_DPDFLAG
Note:
These indicate that the PMU is setup for entry into a low power state on the next WFI() instruction.

Definition at line 173 of file pmu_11xx.h.

void Chip_PMU_PowerDownState ( LPC_PMU_T *  pPMU )

Enter MCU Power down mode.

Parameters:
pPMU: Pointer to PMU register block
Returns:
None
Note:
In Power-down mode, the peripherals receive no internal clocks. The internal SRAM memory and all peripheral registers as well as the processor maintain their internal states. The flash memory is powered down. The WWDT, WKT, and BOD can remain active to wake up the system on an interrupt.
STATIC INLINE uint32_t Chip_PMU_ReadGPREG ( LPC_PMU_T *  pPMU,
uint8_t  regIndex 
)

Read a value to a GPREG register.

Parameters:
pPMU: Pointer to PMU register block
regIndex: Register index to read from, must be 0..3
Returns:
Value read from the GPREG register

Definition at line 106 of file pmu_11xx.h.

void Chip_PMU_Sleep ( LPC_PMU_T *  pPMU,
CHIP_PMU_MCUPOWER_T  SleepMode 
)

Place the MCU in a low power state.

Parameters:
pPMU: Pointer to PMU register block
SleepMode: Sleep mode
Returns:
None
void Chip_PMU_SleepState ( LPC_PMU_T *  pPMU )

Enter MCU Sleep mode.

Parameters:
pPMU: Pointer to PMU register block
Returns:
None
Note:
The sleep mode affects the ARM Cortex-M0+ core only. Peripherals and memories are active.
STATIC INLINE void Chip_PMU_WriteGPREG ( LPC_PMU_T *  pPMU,
uint8_t  regIndex,
uint32_t  value 
)

Write a value to a GPREG register.

Parameters:
pPMU: Pointer to PMU register block
regIndex: Register index to write to, must be 0..3
value: Value to write
Returns:
None

Definition at line 95 of file pmu_11xx.h.

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